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authorJack F Vogel <jfv@FreeBSD.org>2010-03-29 23:36:34 +0000
committerJack F Vogel <jfv@FreeBSD.org>2010-03-29 23:36:34 +0000
commit8ec87fc5149977b627672979fb2e593310e8bbae (patch)
tree52adde5169569de66f66f886a5c368751c45c604 /sys/dev/e1000/e1000_82575.h
parent4cc5f38e975d1548434c32511c8cf4dd392e76db (diff)
downloadsrc-8ec87fc5149977b627672979fb2e593310e8bbae.tar.gz
src-8ec87fc5149977b627672979fb2e593310e8bbae.zip
Update to igb and em:
em revision 7.0.0: - Using driver devclass, seperate legacy (pre-pcie) code into a seperate source file. This will at least help protect against regression issues. It compiles along with em, and is transparent to end use, devices in each appear to be 'emX'. When using em in a modular form this also allows the legacy stuff to be defined out. - Add tx and rx rings as in igb, in the 82574 this becomes actual multiqueue for the first time (2 queues) while in other PCIE adapters its just make code cleaner. - Add RX mbuf handling logic that matches igb, this will eliminate packet drops due to temporary mbuf shortage. igb revision 1.9.3: - Following the ixgbe code, use a new approach in what was called 'get_buf', the routine now has been made independent of rxeof, it now does the update to the engine TDT register, this design allows temporary mbuf resources to become non-critical, not requiring a packet to be discarded, instead it just returns and does not increment the tail pointer. - With the above change it was also unnecessary to keep 'spare' maps around, since we do not have the discard issue. - Performance tweaks and improvements to the code also. MFC in a week
Notes
Notes: svn path=/head/; revision=205869
Diffstat (limited to 'sys/dev/e1000/e1000_82575.h')
-rw-r--r--sys/dev/e1000/e1000_82575.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/sys/dev/e1000/e1000_82575.h b/sys/dev/e1000/e1000_82575.h
index 582f4a4058db..1fc7e26dd590 100644
--- a/sys/dev/e1000/e1000_82575.h
+++ b/sys/dev/e1000/e1000_82575.h
@@ -49,8 +49,8 @@
* For 82576, there are an additional set of RARs that begin at an offset
* separate from the first set of RARs.
*/
-#define E1000_RAR_ENTRIES_82575 16
-#define E1000_RAR_ENTRIES_82576 24
+#define E1000_RAR_ENTRIES_82575 16
+#define E1000_RAR_ENTRIES_82576 24
#define E1000_RAR_ENTRIES_82580 24
#define E1000_SW_SYNCH_MB 0x00000100
#define E1000_STAT_DEV_RST_SET 0x00100000
@@ -425,6 +425,7 @@ struct e1000_adv_tx_context_desc {
#define E1000_VMOLR_STRVLAN 0x40000000 /* Vlan stripping enable */
#define E1000_VMOLR_STRCRC 0x80000000 /* CRC stripping enable */
+
#define E1000_VLVF_ARRAY_SIZE 32
#define E1000_VLVF_VLANID_MASK 0x00000FFF
#define E1000_VLVF_POOLSEL_SHIFT 12