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authorConrad Meyer <cem@FreeBSD.org>2015-10-28 02:37:24 +0000
committerConrad Meyer <cem@FreeBSD.org>2015-10-28 02:37:24 +0000
commit1693d27b71fe4cff20e3b4dad55dcb27c9c7d11a (patch)
tree4728d31ac082193ae91f5c134d6c342658236a97 /sys/dev/ioat/ioat_hw.h
parent523e46d486693f42295cfc026c999d35aa67f099 (diff)
downloadsrc-1693d27b71fe4cff20e3b4dad55dcb27c9c7d11a.tar.gz
src-1693d27b71fe4cff20e3b4dad55dcb27c9c7d11a.zip
ioat: Define DMACAPABILITY bits
Check for BFILL capability before initiating blockfill operations. Sponsored by: EMC / Isilon Storage Division
Notes
Notes: svn path=/head/; revision=290087
Diffstat (limited to 'sys/dev/ioat/ioat_hw.h')
-rw-r--r--sys/dev/ioat/ioat_hw.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/sys/dev/ioat/ioat_hw.h b/sys/dev/ioat/ioat_hw.h
index b3a21cb14dc7..99b8d3e88aba 100644
--- a/sys/dev/ioat/ioat_hw.h
+++ b/sys/dev/ioat/ioat_hw.h
@@ -54,6 +54,21 @@ __FBSDID("$FreeBSD$");
#define IOAT_CS_STATUS_OFFSET 0x0E
#define IOAT_DMACAPABILITY_OFFSET 0x10
+#define IOAT_DMACAP_PB (1 << 0)
+#define IOAT_DMACAP_DCA (1 << 4)
+#define IOAT_DMACAP_BFILL (1 << 6)
+#define IOAT_DMACAP_XOR (1 << 8)
+#define IOAT_DMACAP_PQ (1 << 9)
+#define IOAT_DMACAP_DMA_DIF (1 << 10)
+#define IOAT_DMACAP_DWBES (1 << 13)
+#define IOAT_DMACAP_RAID16SS (1 << 17)
+#define IOAT_DMACAP_DMAMC (1 << 18)
+#define IOAT_DMACAP_CTOS (1 << 19)
+
+#define IOAT_DMACAP_STR \
+ "\20\24Completion_Timeout_Support\23DMA_with_Multicasting_Support" \
+ "\22RAID_Super_descriptors\16Descriptor_Write_Back_Error_Support" \
+ "\13DMA_with_DIF\12PQ\11XOR\07Block_Fill\05DCA\01Page_Break"
/* DMA Channel Registers */
#define IOAT_CHANCTRL_OFFSET 0x80