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authorConrad Meyer <cem@FreeBSD.org>2016-02-13 19:01:56 +0000
committerConrad Meyer <cem@FreeBSD.org>2016-02-13 19:01:56 +0000
commit564af7a65425dc066b5edbf9813a524466b678d7 (patch)
tree3b56592b5aab142a9d51c08388c157fe588812b8 /sys/dev/ioat/ioat_hw.h
parent2dd7d0560aad8e717f15329e1814f654fe10547c (diff)
downloadsrc-564af7a65425dc066b5edbf9813a524466b678d7.tar.gz
src-564af7a65425dc066b5edbf9813a524466b678d7.zip
ioat(4): Decode/define more capabilities, operations
These are defined in the Intel Haswell EDS volume 2 (registers) (507849 v2.1). Sponsored by: EMC / Isilon Storage Division
Notes
Notes: svn path=/head/; revision=295603
Diffstat (limited to 'sys/dev/ioat/ioat_hw.h')
-rw-r--r--sys/dev/ioat/ioat_hw.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/sys/dev/ioat/ioat_hw.h b/sys/dev/ioat/ioat_hw.h
index 46ffaeb9408d..6dfe9a63d944 100644
--- a/sys/dev/ioat/ioat_hw.h
+++ b/sys/dev/ioat/ioat_hw.h
@@ -56,8 +56,13 @@ __FBSDID("$FreeBSD$");
#define IOAT_DMACAPABILITY_OFFSET 0x10
#define IOAT_DMACAP_PB (1 << 0)
+#define IOAT_DMACAP_CRC (1 << 1)
+#define IOAT_DMACAP_MARKER_SKIP (1 << 2)
+#define IOAT_DMACAP_OLD_XOR (1 << 3)
#define IOAT_DMACAP_DCA (1 << 4)
+#define IOAT_DMACAP_MOVECRC (1 << 5)
#define IOAT_DMACAP_BFILL (1 << 6)
+#define IOAT_DMACAP_EXT_APIC (1 << 7)
#define IOAT_DMACAP_XOR (1 << 8)
#define IOAT_DMACAP_PQ (1 << 9)
#define IOAT_DMACAP_DMA_DIF (1 << 10)
@@ -69,7 +74,8 @@ __FBSDID("$FreeBSD$");
#define IOAT_DMACAP_STR \
"\20\24Completion_Timeout_Support\23DMA_with_Multicasting_Support" \
"\22RAID_Super_descriptors\16Descriptor_Write_Back_Error_Support" \
- "\13DMA_with_DIF\12PQ\11XOR\07Block_Fill\05DCA\01Page_Break"
+ "\13DMA_with_DIF\12PQ\11XOR\10Extended_APIC_ID\07Block_Fill\06Move_CRC" \
+ "\05DCA\04Old_XOR\03Marker_Skipping\02CRC\01Page_Break"
/* DMA Channel Registers */
#define IOAT_CHANCTRL_OFFSET 0x80