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authorEric Joyner <erj@FreeBSD.org>2016-05-12 18:22:12 +0000
committerEric Joyner <erj@FreeBSD.org>2016-05-12 18:22:12 +0000
commitd4683565fd0673f8f140afb297bbcd7a1959ced0 (patch)
tree8fa96eace77a47b4dd0d0d875173a8af89a05410 /sys/dev/ixl/i40e_register.h
parent6d011ad5f677a2d2c99eb1d848089000ea3f463c (diff)
downloadsrc-d4683565fd0673f8f140afb297bbcd7a1959ced0.tar.gz
src-d4683565fd0673f8f140afb297bbcd7a1959ced0.zip
ixl: Update to 1.4.27-k.
Changes: Kevin Scott i40e-shared: Save off VSI resource count when updating VSI Anjali Singhai Jain i40e-shared: Expose some registers to program parser, FD and RSS logic Eric Joyner ixl: Fix errors in queue interrupt setup in MSIX mode. Shannon Nelson i40e-shared: implement and use rx ctl helper functions Shannon Nelson i40e-shared: don't use AQ calls from clear_hw Eric Joyner ixl: Use rx ctl read/write functions instead of register accesses in certain places. Shannon Nelson i40e-shared: add adminq commands for rx ctl registers Shannon Nelson i40e-shared: implement and use rx ctl helper functions Jeremiah Kyle i40e-shared: Corrected function name in comment block Deepthi Kavalur i40e-shared: correcting a HW capability display info Shannon Nelson i40e-shared: fixups for (Linux) upstream consistency Eric Joyner ixl: Only stop firmware's LLDP agent on older firmware versions. Differential Revision: https://reviews.freebsd.org/D6211 Reviewed by: sbruno, kmacy, jeffrey.e.pieper@intel.com MFC after: 2 weeks Sponsored by: Intel Corporation
Notes
Notes: svn path=/head/; revision=299555
Diffstat (limited to 'sys/dev/ixl/i40e_register.h')
-rw-r--r--sys/dev/ixl/i40e_register.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/sys/dev/ixl/i40e_register.h b/sys/dev/ixl/i40e_register.h
index db23251ce51c..9fbfc7b826c2 100644
--- a/sys/dev/ixl/i40e_register.h
+++ b/sys/dev/ixl/i40e_register.h
@@ -2054,6 +2054,14 @@
#define I40E_PRTPM_TLPIC 0x001E43C0 /* Reset: GLOBR */
#define I40E_PRTPM_TLPIC_ETLPIC_SHIFT 0
#define I40E_PRTPM_TLPIC_ETLPIC_MASK I40E_MASK(0xFFFFFFFF, I40E_PRTPM_TLPIC_ETLPIC_SHIFT)
+#define I40E_GL_PRS_FVBM(_i) (0x00269760 + ((_i) * 4)) /* _i=0...3 */ /* Reset: CORER */
+#define I40E_GL_PRS_FVBM_MAX_INDEX 3
+#define I40E_GL_PRS_FVBM_FV_BYTE_INDX_SHIFT 0
+#define I40E_GL_PRS_FVBM_FV_BYTE_INDX_MASK I40E_MASK(0x7F, I40E_GL_PRS_FVBM_FV_BYTE_INDX_SHIFT)
+#define I40E_GL_PRS_FVBM_RULE_BUS_INDX_SHIFT 8
+#define I40E_GL_PRS_FVBM_RULE_BUS_INDX_MASK I40E_MASK(0x3F, I40E_GL_PRS_FVBM_RULE_BUS_INDX_SHIFT)
+#define I40E_GL_PRS_FVBM_MSK_ENA_SHIFT 31
+#define I40E_GL_PRS_FVBM_MSK_ENA_MASK I40E_MASK(0x1, I40E_GL_PRS_FVBM_MSK_ENA_SHIFT)
#define I40E_GLRPB_DPSS 0x000AC828 /* Reset: CORER */
#define I40E_GLRPB_DPSS_DPS_TCN_SHIFT 0
#define I40E_GLRPB_DPSS_DPS_TCN_MASK I40E_MASK(0xFFFFF, I40E_GLRPB_DPSS_DPS_TCN_SHIFT)
@@ -2225,6 +2233,14 @@
#define I40E_PRTQF_FD_FLXINSET_MAX_INDEX 63
#define I40E_PRTQF_FD_FLXINSET_INSET_SHIFT 0
#define I40E_PRTQF_FD_FLXINSET_INSET_MASK I40E_MASK(0xFF, I40E_PRTQF_FD_FLXINSET_INSET_SHIFT)
+#define I40E_PRTQF_FD_INSET(_i, _j) (0x00250000 + ((_i) * 64 + (_j) * 32)) /* _i=0...63, _j=0...1 */ /* Reset: CORER */
+#define I40E_PRTQF_FD_INSET_MAX_INDEX 63
+#define I40E_PRTQF_FD_INSET_INSET_SHIFT 0
+#define I40E_PRTQF_FD_INSET_INSET_MASK I40E_MASK(0xFFFFFFFF, I40E_PRTQF_FD_INSET_INSET_SHIFT)
+#define I40E_PRTQF_FD_INSET(_i, _j) (0x00250000 + ((_i) * 64 + (_j) * 32)) /* _i=0...63, _j=0...1 */ /* Reset: CORER */
+#define I40E_PRTQF_FD_INSET_MAX_INDEX 63
+#define I40E_PRTQF_FD_INSET_INSET_SHIFT 0
+#define I40E_PRTQF_FD_INSET_INSET_MASK I40E_MASK(0xFFFFFFFF, I40E_PRTQF_FD_INSET_INSET_SHIFT)
#define I40E_PRTQF_FD_MSK(_i, _j) (0x00252000 + ((_i) * 64 + (_j) * 32)) /* _i=0...63, _j=0...1 */ /* Reset: CORER */
#define I40E_PRTQF_FD_MSK_MAX_INDEX 63
#define I40E_PRTQF_FD_MSK_MASK_SHIFT 0