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author | Eric Joyner <erj@FreeBSD.org> | 2016-02-19 22:45:09 +0000 |
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committer | Eric Joyner <erj@FreeBSD.org> | 2016-02-19 22:45:09 +0000 |
commit | 42d7398e7eb94326a335055f6f165f310afe5c69 (patch) | |
tree | 68a0a11e3f09bf9b01d357b7dea1453eae0b78ec /sys/dev/ixl/if_ixl.c | |
parent | 300d1454801278e771899077fa136644c7cef561 (diff) | |
download | src-42d7398e7eb94326a335055f6f165f310afe5c69.tar.gz src-42d7398e7eb94326a335055f6f165f310afe5c69.zip |
ixl(4): Fix errors in queue interrupt setup in MSIX mode.
- I40E_PFINT_DYN_CTLN needs to be cleared, and not have a queue index
written to it.
- The interrupt linked list for each queue is changed to only include
the queue's Rx and Tx queues.
Differential Revision: https://reviews.freebsd.org/D5206
Reviewed by: sbruno
Tested by: jeffrey.e.pieper@intel.com
Sponsored by: Intel Corporation
Notes
Notes:
svn path=/head/; revision=295829
Diffstat (limited to 'sys/dev/ixl/if_ixl.c')
-rw-r--r-- | sys/dev/ixl/if_ixl.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/sys/dev/ixl/if_ixl.c b/sys/dev/ixl/if_ixl.c index a11200a228a5..f972c5fe2a6e 100644 --- a/sys/dev/ixl/if_ixl.c +++ b/sys/dev/ixl/if_ixl.c @@ -2246,7 +2246,8 @@ ixl_configure_msix(struct ixl_pf *pf) /* Next configure the queues */ for (int i = 0; i < vsi->num_queues; i++, vector++) { - wr32(hw, I40E_PFINT_DYN_CTLN(i), i); + wr32(hw, I40E_PFINT_DYN_CTLN(i), 0); + /* First queue type is RX / type 0 */ wr32(hw, I40E_PFINT_LNKLSTN(i), i); reg = I40E_QINT_RQCTL_CAUSE_ENA_MASK | @@ -2259,11 +2260,8 @@ ixl_configure_msix(struct ixl_pf *pf) reg = I40E_QINT_TQCTL_CAUSE_ENA_MASK | (IXL_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | - ((i+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) | + (IXL_QUEUE_EOL << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) | (I40E_QUEUE_TYPE_RX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); - if (i == (vsi->num_queues - 1)) - reg |= (IXL_QUEUE_EOL - << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); wr32(hw, I40E_QINT_TQCTL(i), reg); } } |