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authorKrzysztof Galazka <krzysztof.galazka@intel.com>2021-03-03 01:33:11 +0000
committerEric Joyner <erj@FreeBSD.org>2021-03-03 01:37:04 +0000
commit9f99061ef9c95b171fc92d34026222bb5e052337 (patch)
treea1111d04de3d8d7baef80866fb37bb836e08c92e /sys/dev/ixl/ixl_txrx.c
parentb3fce46a3eac600935f3aac2b224a83defcf1cb3 (diff)
downloadsrc-9f99061ef9c95b171fc92d34026222bb5e052337.tar.gz
src-9f99061ef9c95b171fc92d34026222bb5e052337.zip
ixl(4): Report RX errors as sum of all RX error counters
HW keeps track of RX errors using several counters, each for specific type of errors. Report RX errors to OS as sum of all those counters: CRC errors, illegal bytes, checksum, length, undersize, fragment, oversize and jabber errors. There is no HW counter for frames with invalid L3/L4 checksums so add a SW one. Also add a "rx_errors" sysctl with a copy of netstat IERRORS counter value to make it easier accessible from scripts. Reviewed By: erj Tested By: gowtham.kumar.ks@intel.com Sponsored By: Intel Corporation Differential Revision: https://reviews.freebsd.org/D27639
Diffstat (limited to 'sys/dev/ixl/ixl_txrx.c')
-rw-r--r--sys/dev/ixl/ixl_txrx.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/sys/dev/ixl/ixl_txrx.c b/sys/dev/ixl/ixl_txrx.c
index e589bb8392cd..bdd3cb8725f8 100644
--- a/sys/dev/ixl/ixl_txrx.c
+++ b/sys/dev/ixl/ixl_txrx.c
@@ -51,7 +51,7 @@
#endif
/* Local Prototypes */
-static void ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype);
+static u8 ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype);
static int ixl_isc_txd_encap(void *arg, if_pkt_info_t pi);
static void ixl_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx);
@@ -720,7 +720,7 @@ ixl_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri)
rxr->rx_packets++;
if ((if_getcapenable(vsi->ifp) & IFCAP_RXCSUM) != 0)
- ixl_rx_checksum(ri, status, error, ptype);
+ rxr->csum_errs += ixl_rx_checksum(ri, status, error, ptype);
ri->iri_flowid = le32toh(cur->wb.qword0.hi_dword.rss);
ri->iri_rsstype = ixl_ptype_to_hash(ptype);
ri->iri_vtag = vtag;
@@ -737,7 +737,7 @@ ixl_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri)
* doesn't spend time verifying the checksum.
*
*********************************************************************/
-static void
+static u8
ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype)
{
struct i40e_rx_ptype_decoded decoded;
@@ -746,7 +746,7 @@ ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype)
/* No L3 or L4 checksum was calculated */
if (!(status & (1 << I40E_RX_DESC_STATUS_L3L4P_SHIFT)))
- return;
+ return (0);
decoded = decode_rx_desc_ptype(ptype);
@@ -756,7 +756,7 @@ ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype)
if (status &
(1 << I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT)) {
ri->iri_csum_flags = 0;
- return;
+ return (1);
}
}
@@ -764,17 +764,19 @@ ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype)
/* IPv4 checksum error */
if (error & (1 << I40E_RX_DESC_ERROR_IPE_SHIFT))
- return;
+ return (1);
ri->iri_csum_flags |= CSUM_L3_VALID;
ri->iri_csum_flags |= CSUM_L4_CALC;
/* L4 checksum error */
if (error & (1 << I40E_RX_DESC_ERROR_L4E_SHIFT))
- return;
+ return (1);
ri->iri_csum_flags |= CSUM_L4_VALID;
ri->iri_csum_data |= htons(0xffff);
+
+ return (0);
}
/* Set Report Status queue fields to 0 */