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authorMarius Strobl <marius@FreeBSD.org>2011-07-02 12:56:03 +0000
committerMarius Strobl <marius@FreeBSD.org>2011-07-02 12:56:03 +0000
commitdf41287464a65426380bfae6078994751947305b (patch)
tree8cca35c9a5ef7d1afc2e34b606bf57784de21a2c /sys/sys/ttydevsw.h
parentc70f826b25d431194c54a64cee0b2c4f504f7519 (diff)
downloadsrc-df41287464a65426380bfae6078994751947305b.tar.gz
src-df41287464a65426380bfae6078994751947305b.zip
UltraSPARC-IV CPUs seem to be affected by a not publicly documented
erratum causing them to trigger stray vector interrupts accompanied by a state in which they even fault on locked TLB entries. Just retrying the instruction in that case gets the CPU back on track though. OpenSolaris also just ignores a certain number of stray vector interrupts. While at it, implement the stray vector interrupt handling for SPARC64-VI which use these for indicating uncorrectable errors in interrupt packets.
Notes
Notes: svn path=/head/; revision=223721
Diffstat (limited to 'sys/sys/ttydevsw.h')
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