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authorMitchell Horne <mhorne@FreeBSD.org>2021-01-20 15:07:53 +0000
committerMitchell Horne <mhorne@FreeBSD.org>2021-02-18 21:17:41 +0000
commit04d2d2d7fd22bba638ccb5a0b2e0805087a70cd3 (patch)
tree0ecd59522a0a3bf2983da41d22c63c76e6861b4d /sys
parentcee8be2c78f15bed6d2339d41e3f8c232d41bb33 (diff)
downloadsrc-04d2d2d7fd22bba638ccb5a0b2e0805087a70cd3.tar.gz
src-04d2d2d7fd22bba638ccb5a0b2e0805087a70cd3.zip
cgem: improve usage of busdma(9) KPI
BUS_DMA_NOCACHE should only be used when one needs to guarantee the created mapping has uncached memory attributes, usually as a result of buggy hardware. Normal use cases should pass BUS_DMA_COHERENT, to create an appropriate mapping based on the flags passed to bus_dma_tag_create(). This should have no functional change, since the DMA tags in this driver are created without the BUS_DMA_COHERENT flag. Reported by: mmel Reviewed by: mmel, Thomas Skibo <thomas-bsd@skibo.net> MFC after: 3 days
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/cadence/if_cgem.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/sys/dev/cadence/if_cgem.c b/sys/dev/cadence/if_cgem.c
index 81fc39b831af..0583e846458a 100644
--- a/sys/dev/cadence/if_cgem.c
+++ b/sys/dev/cadence/if_cgem.c
@@ -443,17 +443,13 @@ cgem_setup_descs(struct cgem_softc *sc)
return (err);
/*
- * Allocate DMA memory in non-cacheable space. We allocate transmit,
- * receive and null descriptor queues all at once because the
- * hardware only provides one register for the upper 32 bits of
- * rx and tx descriptor queues hardware addresses.
+ * Allocate DMA memory. We allocate transmit, receive and null
+ * descriptor queues all at once because the hardware only provides
+ * one register for the upper 32 bits of rx and tx descriptor queues
+ * hardware addresses.
*/
err = bus_dmamem_alloc(sc->desc_dma_tag, (void **)&sc->rxring,
-#ifdef __arm__
BUS_DMA_NOWAIT | BUS_DMA_COHERENT | BUS_DMA_ZERO,
-#else
- BUS_DMA_NOWAIT | BUS_DMA_NOCACHE | BUS_DMA_ZERO,
-#endif
&sc->rxring_dma_map);
if (err)
return (err);