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author | Dimitry Andric <dim@FreeBSD.org> | 2017-07-29 21:25:18 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2017-07-29 21:25:18 +0000 |
commit | 3ad6a4b447326bc16c17df65637ca02330b8d090 (patch) | |
tree | 568321855815f8ca008258972e27d4a3ea487475 /test/CodeGen/AMDGPU | |
parent | 93c91e39b29142dec1d03a30df9f6e757f56c193 (diff) | |
download | src-3ad6a4b447326bc16c17df65637ca02330b8d090.tar.gz src-3ad6a4b447326bc16c17df65637ca02330b8d090.zip |
Vendor import of llvm release_50 branch r309439:vendor/llvm/llvm-release_50-r309439
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=321691
svn path=/vendor/llvm/llvm-release_50-r309439/; revision=321692; tag=vendor/llvm/llvm-release_50-r309439
Diffstat (limited to 'test/CodeGen/AMDGPU')
-rw-r--r-- | test/CodeGen/AMDGPU/spill-empty-live-interval.mir | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/test/CodeGen/AMDGPU/spill-empty-live-interval.mir b/test/CodeGen/AMDGPU/spill-empty-live-interval.mir new file mode 100644 index 000000000000..bb58da7a59f6 --- /dev/null +++ b/test/CodeGen/AMDGPU/spill-empty-live-interval.mir @@ -0,0 +1,74 @@ +# RUN: llc -mtriple=amdgcn-amd-amdhsa-opencl -verify-machineinstrs -stress-regalloc=1 -start-before=simple-register-coalescing -stop-after=greedy -o - %s | FileCheck %s +# https://bugs.llvm.org/show_bug.cgi?id=33620 + +--- +# This would assert due to the empty live interval created for %vreg9 +# on the last S_NOP with an undef subreg use. + +# CHECK-LABEL: name: expecting_non_empty_interval + +# CHECK: undef %7.sub1 = V_MAC_F32_e32 0, undef %1, undef %7.sub1, implicit %exec +# CHECK-NEXT: SI_SPILL_V64_SAVE %7, %stack.0, %sgpr0_sgpr1_sgpr2_sgpr3, %sgpr5, 0, implicit %exec :: (store 8 into %stack.0, align 4) +# CHECK-NEXT: undef %5.sub1 = V_MOV_B32_e32 1786773504, implicit %exec +# CHECK-NEXT: dead %2 = V_MUL_F32_e32 0, %5.sub1, implicit %exec + +# CHECK: S_NOP 0, implicit %6.sub1 +# CHECK-NEXT: %8 = SI_SPILL_V64_RESTORE %stack.0, %sgpr0_sgpr1_sgpr2_sgpr3, %sgpr5, 0, implicit %exec :: (load 8 from %stack.0, align 4) +# CHECK-NEXT: S_NOP 0, implicit %8.sub1 +# CHECK-NEXT: S_NOP 0, implicit undef %9.sub0 + +name: expecting_non_empty_interval +tracksRegLiveness: true +registers: + - { id: 0, class: vreg_64, preferred-register: '' } + - { id: 1, class: vgpr_32, preferred-register: '' } + - { id: 2, class: vgpr_32, preferred-register: '' } + - { id: 3, class: vreg_64, preferred-register: '' } +body: | + bb.0: + successors: %bb.1 + undef %0.sub1 = V_MAC_F32_e32 0, undef %1, undef %0.sub1, implicit %exec + undef %3.sub1 = V_MOV_B32_e32 1786773504, implicit %exec + dead %2 = V_MUL_F32_e32 0, %3.sub1, implicit %exec + + bb.1: + S_NOP 0, implicit %3.sub1 + S_NOP 0, implicit %0.sub1 + S_NOP 0, implicit undef %0.sub0 + S_ENDPGM + +... + +# Similar assert which happens when trying to rematerialize. +# https://bugs.llvm.org/show_bug.cgi?id=33884 +--- +# CHECK-LABEL: name: rematerialize_empty_interval_has_reference + +# CHECK-NOT: MOV +# CHECK: undef %3.sub2 = V_MOV_B32_e32 1786773504, implicit %exec + +# CHECK: bb.1: +# CHECK-NEXT: S_NOP 0, implicit %3.sub2 +# CHECK-NEXT: S_NOP 0, implicit undef %6.sub0 +# CHECK-NEXT: undef %4.sub2 = V_MOV_B32_e32 0, implicit %exec +# CHECK-NEXT: S_NOP 0, implicit %4.sub2 +name: rematerialize_empty_interval_has_reference +tracksRegLiveness: true +registers: + - { id: 0, class: vreg_128, preferred-register: '' } + - { id: 1, class: vgpr_32, preferred-register: '' } + - { id: 2, class: vgpr_32, preferred-register: '' } + - { id: 3, class: vreg_128, preferred-register: '' } +body: | + bb.0: + successors: %bb.1 + + undef %0.sub2 = V_MOV_B32_e32 0, implicit %exec + undef %3.sub2 = V_MOV_B32_e32 1786773504, implicit %exec + + bb.1: + S_NOP 0, implicit %3.sub2 + S_NOP 0, implicit undef %0.sub0 + S_NOP 0, implicit %0.sub2 + +... |