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author | Dimitry Andric <dim@FreeBSD.org> | 2013-06-10 20:36:52 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2013-06-10 20:36:52 +0000 |
commit | 59d6cff90eecf31cb3dd860c4e786674cfdd42eb (patch) | |
tree | 909310b2e05119d1d6efda049977042abbb58bb1 /test/CodeGen/SystemZ/atomicrmw-or-03.ll | |
parent | 4a16efa3e43e35f0cc9efe3a67f620f0017c3d36 (diff) | |
download | src-59d6cff90eecf31cb3dd860c4e786674cfdd42eb.tar.gz src-59d6cff90eecf31cb3dd860c4e786674cfdd42eb.zip |
Vendor import of llvm tags/RELEASE_33/final r183502 (effectively, 3.3vendor/llvm/llvm-release_33-r183502
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=251607
svn path=/vendor/llvm/llvm-release_33-r183502/; revision=251608; tag=vendor/llvm/llvm-release_33-r183502
Diffstat (limited to 'test/CodeGen/SystemZ/atomicrmw-or-03.ll')
-rw-r--r-- | test/CodeGen/SystemZ/atomicrmw-or-03.ll | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/atomicrmw-or-03.ll b/test/CodeGen/SystemZ/atomicrmw-or-03.ll new file mode 100644 index 000000000000..33fd21b04c6c --- /dev/null +++ b/test/CodeGen/SystemZ/atomicrmw-or-03.ll @@ -0,0 +1,85 @@ +; Test 32-bit atomic ORs. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s + +; Check ORs of a variable. +define i32 @f1(i32 %dummy, i32 *%src, i32 %b) { +; CHECK: f1: +; CHECK: l %r2, 0(%r3) +; CHECK: [[LABEL:\.[^ ]*]]: +; CHECK: lr %r0, %r2 +; CHECK: or %r0, %r4 +; CHECK: cs %r2, %r0, 0(%r3) +; CHECK: j{{g?}}lh [[LABEL]] +; CHECK: br %r14 + %res = atomicrmw or i32 *%src, i32 %b seq_cst + ret i32 %res +} + +; Check the lowest useful OILL value. +define i32 @f2(i32 %dummy, i32 *%src) { +; CHECK: f2: +; CHECK: l %r2, 0(%r3) +; CHECK: [[LABEL:\.[^ ]*]]: +; CHECK: lr %r0, %r2 +; CHECK: oill %r0, 1 +; CHECK: cs %r2, %r0, 0(%r3) +; CHECK: j{{g?}}lh [[LABEL]] +; CHECK: br %r14 + %res = atomicrmw or i32 *%src, i32 1 seq_cst + ret i32 %res +} + +; Check the high end of the OILL range. +define i32 @f3(i32 %dummy, i32 *%src) { +; CHECK: f3: +; CHECK: oill %r0, 65535 +; CHECK: br %r14 + %res = atomicrmw or i32 *%src, i32 65535 seq_cst + ret i32 %res +} + +; Check the lowest useful OILH value, which is the next value up. +define i32 @f4(i32 %dummy, i32 *%src) { +; CHECK: f4: +; CHECK: oilh %r0, 1 +; CHECK: br %r14 + %res = atomicrmw or i32 *%src, i32 65536 seq_cst + ret i32 %res +} + +; Check the lowest useful OILF value, which is the next value up. +define i32 @f5(i32 %dummy, i32 *%src) { +; CHECK: f5: +; CHECK: oilf %r0, 65537 +; CHECK: br %r14 + %res = atomicrmw or i32 *%src, i32 65537 seq_cst + ret i32 %res +} + +; Check the high end of the OILH range. +define i32 @f6(i32 %dummy, i32 *%src) { +; CHECK: f6: +; CHECK: oilh %r0, 65535 +; CHECK: br %r14 + %res = atomicrmw or i32 *%src, i32 -65536 seq_cst + ret i32 %res +} + +; Check the next value up, which must use OILF. +define i32 @f7(i32 %dummy, i32 *%src) { +; CHECK: f7: +; CHECK: oilf %r0, 4294901761 +; CHECK: br %r14 + %res = atomicrmw or i32 *%src, i32 -65535 seq_cst + ret i32 %res +} + +; Check the largest useful OILF value. +define i32 @f8(i32 %dummy, i32 *%src) { +; CHECK: f8: +; CHECK: oilf %r0, 4294967294 +; CHECK: br %r14 + %res = atomicrmw or i32 *%src, i32 -2 seq_cst + ret i32 %res +} |