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author | Dimitry Andric <dim@FreeBSD.org> | 2013-06-10 20:36:52 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2013-06-10 20:36:52 +0000 |
commit | 59d6cff90eecf31cb3dd860c4e786674cfdd42eb (patch) | |
tree | 909310b2e05119d1d6efda049977042abbb58bb1 /test/CodeGen/SystemZ/fp-div-02.ll | |
parent | 4a16efa3e43e35f0cc9efe3a67f620f0017c3d36 (diff) | |
download | src-59d6cff90eecf31cb3dd860c4e786674cfdd42eb.tar.gz src-59d6cff90eecf31cb3dd860c4e786674cfdd42eb.zip |
Vendor import of llvm tags/RELEASE_33/final r183502 (effectively, 3.3vendor/llvm/llvm-release_33-r183502
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=251607
svn path=/vendor/llvm/llvm-release_33-r183502/; revision=251608; tag=vendor/llvm/llvm-release_33-r183502
Diffstat (limited to 'test/CodeGen/SystemZ/fp-div-02.ll')
-rw-r--r-- | test/CodeGen/SystemZ/fp-div-02.ll | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/fp-div-02.ll b/test/CodeGen/SystemZ/fp-div-02.ll new file mode 100644 index 000000000000..c5cae15a824b --- /dev/null +++ b/test/CodeGen/SystemZ/fp-div-02.ll @@ -0,0 +1,71 @@ +; Test 64-bit floating-point division. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s + +; Check register division. +define double @f1(double %f1, double %f2) { +; CHECK: f1: +; CHECK: ddbr %f0, %f2 +; CHECK: br %r14 + %res = fdiv double %f1, %f2 + ret double %res +} + +; Check the low end of the DDB range. +define double @f2(double %f1, double *%ptr) { +; CHECK: f2: +; CHECK: ddb %f0, 0(%r2) +; CHECK: br %r14 + %f2 = load double *%ptr + %res = fdiv double %f1, %f2 + ret double %res +} + +; Check the high end of the aligned DDB range. +define double @f3(double %f1, double *%base) { +; CHECK: f3: +; CHECK: ddb %f0, 4088(%r2) +; CHECK: br %r14 + %ptr = getelementptr double *%base, i64 511 + %f2 = load double *%ptr + %res = fdiv double %f1, %f2 + ret double %res +} + +; Check the next doubleword up, which needs separate address logic. +; Other sequences besides this one would be OK. +define double @f4(double %f1, double *%base) { +; CHECK: f4: +; CHECK: aghi %r2, 4096 +; CHECK: ddb %f0, 0(%r2) +; CHECK: br %r14 + %ptr = getelementptr double *%base, i64 512 + %f2 = load double *%ptr + %res = fdiv double %f1, %f2 + ret double %res +} + +; Check negative displacements, which also need separate address logic. +define double @f5(double %f1, double *%base) { +; CHECK: f5: +; CHECK: aghi %r2, -8 +; CHECK: ddb %f0, 0(%r2) +; CHECK: br %r14 + %ptr = getelementptr double *%base, i64 -1 + %f2 = load double *%ptr + %res = fdiv double %f1, %f2 + ret double %res +} + +; Check that DDB allows indices. +define double @f6(double %f1, double *%base, i64 %index) { +; CHECK: f6: +; CHECK: sllg %r1, %r3, 3 +; CHECK: ddb %f0, 800(%r1,%r2) +; CHECK: br %r14 + %ptr1 = getelementptr double *%base, i64 %index + %ptr2 = getelementptr double *%ptr1, i64 100 + %f2 = load double *%ptr2 + %res = fdiv double %f1, %f2 + ret double %res +} |