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author | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:04:03 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:04:03 +0000 |
commit | f8af5cf600354830d4ccf59732403f0f073eccb9 (patch) | |
tree | 2ba0398b4c42ad4f55561327538044fd2c925a8b /test/CodeGen/SystemZ/int-add-16.ll | |
parent | 59d6cff90eecf31cb3dd860c4e786674cfdd42eb (diff) | |
download | src-f8af5cf600354830d4ccf59732403f0f073eccb9.tar.gz src-f8af5cf600354830d4ccf59732403f0f073eccb9.zip |
Vendor import of llvm release_34 branch r197841 (effectively, 3.4 RC3):vendor/llvm/llvm-release_34-r197841
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=259698
svn path=/vendor/llvm/llvm-release_34-r197841/; revision=259700; tag=vendor/llvm/llvm-release_34-r197841
Diffstat (limited to 'test/CodeGen/SystemZ/int-add-16.ll')
-rw-r--r-- | test/CodeGen/SystemZ/int-add-16.ll | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/int-add-16.ll b/test/CodeGen/SystemZ/int-add-16.ll new file mode 100644 index 000000000000..36cc13e5fc6e --- /dev/null +++ b/test/CodeGen/SystemZ/int-add-16.ll @@ -0,0 +1,93 @@ +; Test 128-bit addition when the distinct-operands facility is available. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s + +; Test the case where both operands are in registers. +define i64 @f1(i64 %a, i64 %b, i64 %c, i64 %d, i64 *%ptr) { +; CHECK-LABEL: f1: +; CHECK: algrk %r2, %r4, %r5 +; CHECK: alcgr +; CHECK: br %r14 + %x1 = insertelement <2 x i64> undef, i64 %b, i32 0 + %x2 = insertelement <2 x i64> %x1, i64 %c, i32 1 + %x = bitcast <2 x i64> %x2 to i128 + %y2 = insertelement <2 x i64> %x1, i64 %d, i32 1 + %y = bitcast <2 x i64> %y2 to i128 + %add = add i128 %x, %y + %addv = bitcast i128 %add to <2 x i64> + %high = extractelement <2 x i64> %addv, i32 0 + store i64 %high, i64 *%ptr + %low = extractelement <2 x i64> %addv, i32 1 + ret i64 %low +} + +; Test addition of 1. +define void @f2(i64 %a, i64 %b, i128 *%ptr) { +; CHECK-LABEL: f2: +; CHECK: alghsik {{%r[0-5]}}, %r3, 1 +; CHECK: alcgr +; CHECK: br %r14 + %x1 = insertelement <2 x i64> undef, i64 %a, i32 0 + %x2 = insertelement <2 x i64> %x1, i64 %b, i32 1 + %x = bitcast <2 x i64> %x2 to i128 + %add = add i128 %x, 1 + store i128 %add, i128 *%ptr + ret void +} + +; Test the upper end of the ALGHSIK range. +define void @f3(i64 %a, i64 %b, i128 *%ptr) { +; CHECK-LABEL: f3: +; CHECK: alghsik {{%r[0-5]}}, %r3, 32767 +; CHECK: alcgr +; CHECK: br %r14 + %x1 = insertelement <2 x i64> undef, i64 %a, i32 0 + %x2 = insertelement <2 x i64> %x1, i64 %b, i32 1 + %x = bitcast <2 x i64> %x2 to i128 + %add = add i128 %x, 32767 + store i128 %add, i128 *%ptr + ret void +} + +; Test the next value up, which should use ALGFI instead. +define void @f4(i64 %a, i64 %b, i128 *%ptr) { +; CHECK-LABEL: f4: +; CHECK: algfi %r3, 32768 +; CHECK: alcgr +; CHECK: br %r14 + %x1 = insertelement <2 x i64> undef, i64 %a, i32 0 + %x2 = insertelement <2 x i64> %x1, i64 %b, i32 1 + %x = bitcast <2 x i64> %x2 to i128 + %add = add i128 %x, 32768 + store i128 %add, i128 *%ptr + ret void +} + +; Test the lower end of the ALGHSIK range. +define void @f5(i64 %a, i64 %b, i128 *%ptr) { +; CHECK-LABEL: f5: +; CHECK: alghsik {{%r[0-5]}}, %r3, -32768 +; CHECK: alcgr +; CHECK: br %r14 + %x1 = insertelement <2 x i64> undef, i64 %a, i32 0 + %x2 = insertelement <2 x i64> %x1, i64 %b, i32 1 + %x = bitcast <2 x i64> %x2 to i128 + %add = add i128 %x, -32768 + store i128 %add, i128 *%ptr + ret void +} + +; Test the next value down, which cannot use either ALGHSIK or ALGFI. +define void @f6(i64 %a, i64 %b, i128 *%ptr) { +; CHECK-LABEL: f6: +; CHECK-NOT: alghsik +; CHECK-NOT: algfi +; CHECK: alcgr +; CHECK: br %r14 + %x1 = insertelement <2 x i64> undef, i64 %a, i32 0 + %x2 = insertelement <2 x i64> %x1, i64 %b, i32 1 + %x = bitcast <2 x i64> %x2 to i128 + %add = add i128 %x, -32769 + store i128 %add, i128 *%ptr + ret void +} |