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| author | Roman Divacky <rdivacky@FreeBSD.org> | 2010-07-13 17:19:57 +0000 |
|---|---|---|
| committer | Roman Divacky <rdivacky@FreeBSD.org> | 2010-07-13 17:19:57 +0000 |
| commit | 66e41e3c6e8b8fbc48d5d3b4d2bd9ce0be4ecb75 (patch) | |
| tree | 9de1c5f67a98cd0e73c60838396486c984f63ac2 /test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll | |
| parent | abdf259d487163e72081a8cf4991b1617206b41e (diff) | |
| download | src-66e41e3c6e8b8fbc48d5d3b4d2bd9ce0be4ecb75.tar.gz src-66e41e3c6e8b8fbc48d5d3b4d2bd9ce0be4ecb75.zip | |
Update LLVM to r108243.vendor/llvm/llvm-r108243
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=210006
svn path=/vendor/llvm/llvm-r108243/; revision=210077; tag=vendor/llvm/llvm-r108243
Diffstat (limited to 'test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll')
| -rw-r--r-- | test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll b/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll index 363f5719d17c..c153092288a1 100644 --- a/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll +++ b/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" -define arm_apcscc i32 @test(i32 %n) nounwind { +define i32 @test(i32 %n) nounwind { ; CHECK: test: ; CHECK-NOT: mov ; CHECK: return @@ -16,11 +16,11 @@ bb.nph: ; preds = %entry bb: ; preds = %bb.nph, %bb %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=1] %u.05 = phi i64 [ undef, %bb.nph ], [ %ins, %bb ] ; <i64> [#uses=1] - %1 = tail call arm_apcscc i32 @f() nounwind ; <i32> [#uses=1] + %1 = tail call i32 @f() nounwind ; <i32> [#uses=1] %tmp4 = zext i32 %1 to i64 ; <i64> [#uses=1] %mask = and i64 %u.05, -4294967296 ; <i64> [#uses=1] %ins = or i64 %tmp4, %mask ; <i64> [#uses=2] - tail call arm_apcscc void @g(i64 %ins) nounwind + tail call void @g(i64 %ins) nounwind %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2] %exitcond = icmp eq i32 %indvar.next, %tmp ; <i1> [#uses=1] br i1 %exitcond, label %return, label %bb @@ -29,7 +29,7 @@ return: ; preds = %bb, %entry ret i32 undef } -define arm_apcscc i32 @test_dead_cycle(i32 %n) nounwind { +define i32 @test_dead_cycle(i32 %n) nounwind { ; CHECK: test_dead_cycle: ; CHECK: blx ; CHECK-NOT: mov @@ -50,11 +50,11 @@ bb: ; preds = %bb.nph, %bb2 br i1 %1, label %bb1, label %bb2 bb1: ; preds = %bb - %2 = tail call arm_apcscc i32 @f() nounwind ; <i32> [#uses=1] + %2 = tail call i32 @f() nounwind ; <i32> [#uses=1] %tmp6 = zext i32 %2 to i64 ; <i64> [#uses=1] %mask = and i64 %u.17, -4294967296 ; <i64> [#uses=1] %ins = or i64 %tmp6, %mask ; <i64> [#uses=1] - tail call arm_apcscc void @g(i64 %ins) nounwind + tail call void @g(i64 %ins) nounwind br label %bb2 bb2: ; preds = %bb1, %bb @@ -71,6 +71,6 @@ return: ; preds = %bb2, %entry ret i32 undef } -declare arm_apcscc i32 @f() +declare i32 @f() -declare arm_apcscc void @g(i64) +declare void @g(i64) |