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author | Ed Schouten <ed@FreeBSD.org> | 2009-06-02 17:52:33 +0000 |
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committer | Ed Schouten <ed@FreeBSD.org> | 2009-06-02 17:52:33 +0000 |
commit | 009b1c42aa6266385f2c37e227516b24077e6dd7 (patch) | |
tree | 64ba909838c23261cace781ece27d106134ea451 /test/CodeGen/X86/2008-09-18-inline-asm-2.ll | |
download | src-009b1c42aa6266385f2c37e227516b24077e6dd7.tar.gz src-009b1c42aa6266385f2c37e227516b24077e6dd7.zip |
Import LLVM, at r72732.vendor/llvm/llvm-r72732
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=193323
svn path=/vendor/llvm/llvm-r72732/; revision=193324; tag=vendor/llvm/llvm-r72732
Diffstat (limited to 'test/CodeGen/X86/2008-09-18-inline-asm-2.ll')
-rw-r--r-- | test/CodeGen/X86/2008-09-18-inline-asm-2.ll | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll new file mode 100644 index 000000000000..62e3233f9b3a --- /dev/null +++ b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep "#%ebp %edi %esi 8(%edx) %eax (%ebx)" +; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep "#%edi %edx %ebp 8(%ebx) %eax (%esi)" +; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers +; referenced in the 4th and 6th operands must not be the same as the 1st or 5th +; operand. There are many combinations that work; this is what llc puts out now. +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin8" + %struct.foo = type { i32, i32, i8* } + +define i32 @get(%struct.foo* %c, i8* %state) nounwind { +entry: + %0 = getelementptr %struct.foo* %c, i32 0, i32 0 ; <i32*> [#uses=2] + %1 = getelementptr %struct.foo* %c, i32 0, i32 1 ; <i32*> [#uses=2] + %2 = getelementptr %struct.foo* %c, i32 0, i32 2 ; <i8**> [#uses=2] + %3 = load i32* %0, align 4 ; <i32> [#uses=1] + %4 = load i32* %1, align 4 ; <i32> [#uses=1] + %5 = load i8* %state, align 1 ; <i8> [#uses=1] + %asmtmp = tail call { i32, i32, i32, i32 } asm sideeffect "#$0 $1 $2 $3 $4 $5", "=&r,=r,=r,=*m,=&q,=*imr,1,2,*m,5,~{dirflag},~{fpsr},~{flags},~{cx}"(i8** %2, i8* %state, i32 %3, i32 %4, i8** %2, i8 %5) nounwind ; <{ i32, i32, i32, i32 }> [#uses=3] + %asmresult = extractvalue { i32, i32, i32, i32 } %asmtmp, 0 ; <i32> [#uses=1] + %asmresult1 = extractvalue { i32, i32, i32, i32 } %asmtmp, 1 ; <i32> [#uses=1] + store i32 %asmresult1, i32* %0 + %asmresult2 = extractvalue { i32, i32, i32, i32 } %asmtmp, 2 ; <i32> [#uses=1] + store i32 %asmresult2, i32* %1 + ret i32 %asmresult +} |