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author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-20 21:19:10 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-20 21:19:10 +0000 |
commit | d99dafe2e4a385dd2a6c76da6d8258deb100657b (patch) | |
tree | ba60bf957558bd114f25dbff3d4996b5d7a61c82 /test/CodeGen/X86/avx-logic.ll | |
parent | 71d5a2540a98c81f5bcaeb48805e0e2881f530ef (diff) | |
download | src-d99dafe2e4a385dd2a6c76da6d8258deb100657b.tar.gz src-d99dafe2e4a385dd2a6c76da6d8258deb100657b.zip |
Vendor import of llvm trunk r300890:vendor/llvm/llvm-trunk-r300890
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=317218
svn path=/vendor/llvm/llvm-trunk-r300890/; revision=317219; tag=vendor/llvm/llvm-trunk-r300890
Diffstat (limited to 'test/CodeGen/X86/avx-logic.ll')
-rw-r--r-- | test/CodeGen/X86/avx-logic.ll | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/test/CodeGen/X86/avx-logic.ll b/test/CodeGen/X86/avx-logic.ll index e9e7d5aea273..89abbabee27c 100644 --- a/test/CodeGen/X86/avx-logic.ll +++ b/test/CodeGen/X86/avx-logic.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 define <4 x double> @andpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { ; CHECK-LABEL: andpd256: @@ -271,3 +271,35 @@ entry: ret <2 x i64> %x } +define <4 x i32> @and_xor_splat1_v4i32(<4 x i32> %x) nounwind { +; AVX-LABEL: and_xor_splat1_v4i32: +; AVX: # BB#0: +; AVX-NEXT: vandnps {{.*}}(%rip), %xmm0, %xmm0 +; AVX-NEXT: retq +; +; AVX512-LABEL: and_xor_splat1_v4i32: +; AVX512: # BB#0: +; AVX512-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 +; AVX512-NEXT: vandnps %xmm1, %xmm0, %xmm0 +; AVX512-NEXT: retq + %xor = xor <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1> + %and = and <4 x i32> %xor, <i32 1, i32 1, i32 1, i32 1> + ret <4 x i32> %and +} + +define <4 x i64> @and_xor_splat1_v4i64(<4 x i64> %x) nounwind { +; AVX-LABEL: and_xor_splat1_v4i64: +; AVX: # BB#0: +; AVX-NEXT: vandnps {{.*}}(%rip), %ymm0, %ymm0 +; AVX-NEXT: retq +; +; AVX512-LABEL: and_xor_splat1_v4i64: +; AVX512: # BB#0: +; AVX512-NEXT: vbroadcastsd {{.*}}(%rip), %ymm1 +; AVX512-NEXT: vandnps %ymm1, %ymm0, %ymm0 +; AVX512-NEXT: retq + %xor = xor <4 x i64> %x, <i64 1, i64 1, i64 1, i64 1> + %and = and <4 x i64> %xor, <i64 1, i64 1, i64 1, i64 1> + ret <4 x i64> %and +} + |