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authorDimitry Andric <dim@FreeBSD.org>2015-06-21 13:59:01 +0000
committerDimitry Andric <dim@FreeBSD.org>2015-06-21 13:59:01 +0000
commit3a0822f094b578157263e04114075ad7df81db41 (patch)
treebc48361fe2cd1ca5f93ac01b38b183774468fc79 /test/CodeGen/X86/pmul.ll
parent85d8b2bbe386bcfe669575d05b61482d7be07e5d (diff)
downloadsrc-3a0822f094b578157263e04114075ad7df81db41.tar.gz
src-3a0822f094b578157263e04114075ad7df81db41.zip
Vendor import of llvm trunk r240225:vendor/llvm/llvm-trunk-r240225
Notes
Notes: svn path=/vendor/llvm/dist/; revision=284677 svn path=/vendor/llvm/llvm-trunk-r240225/; revision=284678; tag=vendor/llvm/llvm-trunk-r240225
Diffstat (limited to 'test/CodeGen/X86/pmul.ll')
-rw-r--r--test/CodeGen/X86/pmul.ll37
1 files changed, 33 insertions, 4 deletions
diff --git a/test/CodeGen/X86/pmul.ll b/test/CodeGen/X86/pmul.ll
index 21463b8539dc..dbe5bd646c7f 100644
--- a/test/CodeGen/X86/pmul.ll
+++ b/test/CodeGen/X86/pmul.ll
@@ -1,5 +1,6 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX2
define <16 x i8> @mul8c(<16 x i8> %i) nounwind {
; SSE2-LABEL: mul8c:
@@ -75,10 +76,6 @@ define <2 x i64> @b(<2 x i64> %i) nounwind {
; ALL-NEXT: movdqa {{.*#+}} xmm1 = [117,117]
; ALL-NEXT: movdqa %xmm0, %xmm2
; ALL-NEXT: pmuludq %xmm1, %xmm2
-; ALL-NEXT: pxor %xmm3, %xmm3
-; ALL-NEXT: pmuludq %xmm0, %xmm3
-; ALL-NEXT: psllq $32, %xmm3
-; ALL-NEXT: paddq %xmm3, %xmm2
; ALL-NEXT: psrlq $32, %xmm0
; ALL-NEXT: pmuludq %xmm1, %xmm0
; ALL-NEXT: psllq $32, %xmm0
@@ -248,3 +245,35 @@ entry:
%A = mul <2 x i64> %i, %j
ret <2 x i64> %A
}
+
+define <4 x i64> @b1(<4 x i64> %i) nounwind {
+; AVX2-LABEL: @b1
+; AVX2: vpbroadcastq
+; AVX2-NEXT: vpmuludq
+; AVX2-NEXT: vpsrlq $32
+; AVX2-NEXT: vpmuludq
+; AVX2-NEXT: vpsllq $32
+; AVX2-NEXT: vpaddq
+; AVX2-NEXT: retq
+entry:
+ %A = mul <4 x i64> %i, < i64 117, i64 117, i64 117, i64 117 >
+ ret <4 x i64> %A
+}
+
+define <4 x i64> @b2(<4 x i64> %i, <4 x i64> %j) nounwind {
+; AVX2-LABEL: @b2
+; AVX2: vpmuludq
+; AVX2-NEXT: vpsrlq $32
+; AVX2-NEXT: vpmuludq
+; AVX2-NEXT: vpsllq $32
+; AVX2-NEXT: vpaddq
+; AVX2-NEXT: vpsrlq $32
+; AVX2-NEXT: vpmuludq
+; AVX2-NEXT: vpsllq $32
+; AVX2-NEXT: vpaddq
+; AVX2-NEXT: retq
+entry:
+ %A = mul <4 x i64> %i, %j
+ ret <4 x i64> %A
+}
+