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| author | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
| commit | 044eb2f6afba375a914ac9d8024f8f5142bb912e (patch) | |
| tree | 1475247dc9f9fe5be155ebd4c9069c75aadf8c20 /test/CodeGen/X86/vec_ext_inreg.ll | |
| parent | eb70dddbd77e120e5d490bd8fbe7ff3f8fa81c6b (diff) | |
| download | src-044eb2f6afba375a914ac9d8024f8f5142bb912e.tar.gz src-044eb2f6afba375a914ac9d8024f8f5142bb912e.zip | |
Vendor import of llvm trunk r321017:vendor/llvm/llvm-trunk-r321017
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=326938
svn path=/vendor/llvm/llvm-trunk-r321017/; revision=326939; tag=vendor/llvm/llvm-trunk-r321017
Diffstat (limited to 'test/CodeGen/X86/vec_ext_inreg.ll')
| -rw-r--r-- | test/CodeGen/X86/vec_ext_inreg.ll | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/test/CodeGen/X86/vec_ext_inreg.ll b/test/CodeGen/X86/vec_ext_inreg.ll index 1ee4b24b62f2..157f2cad6fa5 100644 --- a/test/CodeGen/X86/vec_ext_inreg.ll +++ b/test/CodeGen/X86/vec_ext_inreg.ll @@ -5,7 +5,7 @@ define <8 x i32> @a(<8 x i32> %a) nounwind { ; SSE-LABEL: a: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pslld $16, %xmm0 ; SSE-NEXT: psrad $16, %xmm0 ; SSE-NEXT: pslld $16, %xmm1 @@ -13,7 +13,7 @@ define <8 x i32> @a(<8 x i32> %a) nounwind { ; SSE-NEXT: retq ; ; AVX1-LABEL: a: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpslld $16, %xmm0, %xmm1 ; AVX1-NEXT: vpsrad $16, %xmm1, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 @@ -23,7 +23,7 @@ define <8 x i32> @a(<8 x i32> %a) nounwind { ; AVX1-NEXT: retq ; ; AVX2-LABEL: a: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpslld $16, %ymm0, %ymm0 ; AVX2-NEXT: vpsrad $16, %ymm0, %ymm0 ; AVX2-NEXT: retq @@ -34,13 +34,13 @@ define <8 x i32> @a(<8 x i32> %a) nounwind { define <3 x i32> @b(<3 x i32> %a) nounwind { ; SSE-LABEL: b: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pslld $16, %xmm0 ; SSE-NEXT: psrad $16, %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: b: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpslld $16, %xmm0, %xmm0 ; AVX-NEXT: vpsrad $16, %xmm0, %xmm0 ; AVX-NEXT: retq @@ -51,7 +51,7 @@ define <3 x i32> @b(<3 x i32> %a) nounwind { define <1 x i32> @c(<1 x i32> %a) nounwind { ; ALL-LABEL: c: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: movswl %di, %eax ; ALL-NEXT: retq %b = trunc <1 x i32> %a to <1 x i16> @@ -61,20 +61,20 @@ define <1 x i32> @c(<1 x i32> %a) nounwind { define <8 x i32> @d(<8 x i32> %a) nounwind { ; SSE-LABEL: d: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm2 = [65535,0,65535,0,65535,0,65535,0] ; SSE-NEXT: andps %xmm2, %xmm0 ; SSE-NEXT: andps %xmm2, %xmm1 ; SSE-NEXT: retq ; ; AVX1-LABEL: d: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: d: -; AVX2: # BB#0: -; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; AVX2: # %bb.0: +; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15] ; AVX2-NEXT: retq %b = trunc <8 x i32> %a to <8 x i16> @@ -84,12 +84,12 @@ define <8 x i32> @d(<8 x i32> %a) nounwind { define <3 x i32> @e(<3 x i32> %a) nounwind { ; SSE-LABEL: e: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: andps {{.*}}(%rip), %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: e: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6,7] ; AVX-NEXT: retq @@ -100,7 +100,7 @@ define <3 x i32> @e(<3 x i32> %a) nounwind { define <1 x i32> @f(<1 x i32> %a) nounwind { ; ALL-LABEL: f: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: movzwl %di, %eax ; ALL-NEXT: retq %b = trunc <1 x i32> %a to <1 x i16> |