Vendor import of llvm release_40 branch r294803:vendor/llvm/llvm-release_40-r294803

https://llvm.org/svn/llvm-project/llvm/branches/release_40@294803

3 files changed, 4 insertions, 140 deletions

diff --git a/test/CodeGen/X86/conditional-tailcall.ll b/test/CodeGen/X86/conditional-tailcall.ll
deleted file mode 100644
index 502643d9a917..000000000000
--- a/test/CodeGen/X86/conditional-tailcall.ll
+++ /dev/null
@@ -1,53 +0,0 @@
-; RUN: llc < %s -mtriple=i686-linux -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux -show-mc-encoding | FileCheck %s
-
-declare void @foo()
-declare void @bar()
-
-define void @f(i32 %x, i32 %y) optsize {
-entry:
-	%p = icmp eq i32 %x, %y
-  br i1 %p, label %bb1, label %bb2
-bb1:
-  tail call void @foo()
-  ret void
-bb2:
-  tail call void @bar()
-  ret void
-
-; CHECK-LABEL: f:
-; CHECK: cmp
-; CHECK: jne bar
-; Check that the asm doesn't just look good, but uses the correct encoding.
-; CHECK: encoding: [0x75,A]
-; CHECK: jmp foo
-}
-
-
-declare x86_thiscallcc zeroext i1 @baz(i8*, i32)
-define x86_thiscallcc zeroext i1 @BlockPlacementTest(i8* %this, i32 %x) optsize {
-entry:
-  %and = and i32 %x, 42
-  %tobool = icmp eq i32 %and, 0
-  br i1 %tobool, label %land.end, label %land.rhs
-
-land.rhs:
-  %and6 = and i32 %x, 44
-  %tobool7 = icmp eq i32 %and6, 0
-  br i1 %tobool7, label %lor.rhs, label %land.end
-
-lor.rhs:
-  %call = tail call x86_thiscallcc zeroext i1 @baz(i8* %this, i32 %x) #2
-  br label %land.end
-
-land.end:
-  %0 = phi i1 [ false, %entry ], [ true, %land.rhs ], [ %call, %lor.rhs ]
-  ret i1 %0
-
-; Make sure machine block placement isn't confused by the conditional tail call,
-; but sees that it can fall through to the next block.
-; CHECK-LABEL: BlockPlacementTest
-; CHECK: je baz
-; CHECK-NOT: xor
-; CHECK: ret
-}
diff --git a/test/CodeGen/X86/shrink-compare.ll b/test/CodeGen/X86/shrink-compare.ll
index 41f5d2d5be23..11facc4f009d 100644
--- a/test/CodeGen/X86/shrink-compare.ll
+++ b/test/CodeGen/X86/shrink-compare.ll
@@ -93,7 +93,8 @@ if.end:
 ; CHECK-LABEL: test2_1:
 ; CHECK: movzbl
 ; CHECK: cmpl $256
-; CHECK: je bar
+; CHECK: jne .LBB
+; CHECK: jmp bar
 define void @test2_1(i32 %X) nounwind minsize {
 entry:
   %and = and i32 %X, 255
@@ -223,7 +224,8 @@ if.end:
 ; CHECK-LABEL: test_sext_i8_icmp_255:
 ; CHECK: movb $1,
 ; CHECK: testb
-; CHECK: je bar
+; CHECK: jne .LBB
+; CHECK: jmp bar
 define void @test_sext_i8_icmp_255(i8 %x) nounwind minsize {
 entry:
   %sext = sext i8 %x to i32
diff --git a/test/CodeGen/X86/tail-call-conditional.mir b/test/CodeGen/X86/tail-call-conditional.mir
deleted file mode 100644
index 75cb1e451d83..000000000000
--- a/test/CodeGen/X86/tail-call-conditional.mir
+++ /dev/null
@@ -1,85 +0,0 @@
-# RUN: llc -mtriple x86_64-- -verify-machineinstrs -run-pass branch-folder -o - %s | FileCheck %s
-
-# Check the TCRETURNdi64cc optimization.
-
---- |
-  target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
-
-  define i64 @test(i64 %arg, i8* %arg1) optsize {
-    %tmp = icmp ult i64 %arg, 100
-    br i1 %tmp, label %1, label %4
-
-    %tmp3 = icmp ult i64 %arg, 10
-    br i1 %tmp3, label %2, label %3
-
-    %tmp5 = tail call i64 @f1(i8* %arg1, i64 %arg)
-    ret i64 %tmp5
-
-    %tmp7 = tail call i64 @f2(i8* %arg1, i64 %arg)
-    ret i64 %tmp7
-
-    ret i64 123
-  }
-
-  declare i64 @f1(i8*, i64)
-  declare i64 @f2(i8*, i64)
-
-...
----
-name: test
-tracksRegLiveness: true
-liveins:
-  - { reg: '%rdi' }
-  - { reg: '%rsi' }
-body:             |
-  bb.0:
-    successors: %bb.1, %bb.4
-    liveins: %rdi, %rsi
-
-    %rax = COPY %rdi
-    CMP64ri8 %rax, 99, implicit-def %eflags
-    JA_1 %bb.4, implicit %eflags
-    JMP_1 %bb.1
-
-  ; CHECK: bb.1:
-  ; CHECK-NEXT: successors: %bb.2({{[^)]+}}){{$}}
-  ; CHECK-NEXT: liveins: %rax, %rsi
-  ; CHECK-NEXT: {{^  $}}
-  ; CHECK-NEXT: %rdi = COPY %rsi
-  ; CHECK-NEXT: %rsi = COPY %rax
-  ; CHECK-NEXT: CMP64ri8 %rax, 9, implicit-def %eflags
-  ; CHECK-NEXT: TCRETURNdi64cc @f1, 0, 3, csr_64, implicit %rsp, implicit %eflags, implicit %rsp, implicit %rdi, implicit %rsi
-
-  bb.1:
-    successors: %bb.2, %bb.3
-    liveins: %rax, %rsi
-
-    CMP64ri8 %rax, 9, implicit-def %eflags
-    JA_1 %bb.3, implicit %eflags
-    JMP_1 %bb.2
-
-  bb.2:
-    liveins: %rax, %rsi
-
-    %rdi = COPY %rsi
-    %rsi = COPY %rax
-
-    TCRETURNdi64 @f1, 0, csr_64, implicit %rsp, implicit %rdi, implicit %rsi
-
-  ; CHECK: bb.2:
-  ; CHECK-NEXT: liveins: %rax, %rdi, %rsi
-  ; CHECK-NEXT: {{^  $}}
-  ; CHECK-NEXT: TCRETURNdi64 @f2, 0, csr_64, implicit %rsp, implicit %rdi, implicit %rsi
-
-  bb.3:
-    liveins: %rax, %rsi
-
-    %rdi = COPY %rsi
-    %rsi = COPY %rax
-    TCRETURNdi64 @f2, 0, csr_64, implicit %rsp, implicit %rdi, implicit %rsi
-
-  bb.4:
-    dead %eax = MOV32ri64 123, implicit-def %rax
-    RET 0, %rax
-
-...