Vendor import of llvm RELEASE_360/rc1 tag r226102 (effectively, 3.6.0 RC1):vendor/llvm/llvm-release_360-r226102

https://llvm.org/svn/llvm-project/llvm/tags/RELEASE_360/rc1@226102

68 files changed, 6400 insertions, 75 deletions

diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
index acc2d9fec609..008bb1154e57 100644
--- a/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -1,6 +1,6 @@
-# RUN: llvm-mc --disassemble %s -triple=armv7-apple-darwin9 -mcpu=cortex-a9-mp | FileCheck %s
+# RUN: llvm-mc --disassemble %s -triple=armv7-apple-darwin9 -mcpu=cortex-a9 | FileCheck %s
 
-# CHECK:	addpl	r4, pc, #318767104
+# CHECK:	addpl	r4, pc, #76, #10
 0x4c 0x45 0x8f 0x52
 
 # CHECK:	b	#0
diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/test/MC/Disassembler/ARM/basic-arm-instructions.txt
index 8bcf4e6e3faa..335e69fe2410 100644
--- a/test/MC/Disassembler/ARM/basic-arm-instructions.txt
+++ b/test/MC/Disassembler/ARM/basic-arm-instructions.txt
@@ -10,9 +10,12 @@
 # CHECK: adc r1, r2, #983040
 # CHECK: adc r1, r2, #15728640
 # CHECK: adc r1, r2, #251658240
-# CHECK: adc r1, r2, #4026531840
-# CHECK: adc r1, r2, #4026531855
+# CHECK: adc r1, r2, #-268435456
+# CHECK: adc r1, r2, #-268435441
+# CHECK: adc r7, r8, #-2147483638
+# CHECK: adc r7, r8, #40, #2
 # CHECK: adcs r1, r2, #3840
+# CHECK: adcs r7, r8, #40, #2
 # CHECK: adcseq r1, r2, #3840
 # CHECK: adceq r1, r2, #3840
 
@@ -25,8 +28,11 @@
 0x0f 0x14 0xa2 0xe2
 0x0f 0x12 0xa2 0xe2
 0xff 0x12 0xa2 0xe2
+0x2a 0x71 0xa8 0xe2
+0x28 0x71 0xa8 0xe2
 
 0x0f 0x1c 0xb2 0xe2
+0x28 0x71 0xb8 0xe2
 0x0f 0x1c 0xb2 0x02
 0x0f 0x1c 0xa2 0x02
 
@@ -112,6 +118,8 @@
 # ADD
 #------------------------------------------------------------------------------
 # CHECK: add r4, r5, #61440
+# CHECK: add r7, r8, #-2147483638
+# CHECK: add r7, r8, #40, #2
 # CHECK: add r4, r5, r6
 # CHECK: add r4, r5, r6, lsl #5
 # CHECK: add r4, r5, r6, lsr #5
@@ -138,6 +146,8 @@
 # CHECK: add r4, r4, r5, rrx
 
 0x0f 0x4a 0x85 0xe2
+0x2a 0x71 0x88 0xe2
+0x28 0x71 0x88 0xe2
 0x06 0x40 0x85 0xe0
 0x86 0x42 0x85 0xe0
 0xa6 0x42 0x85 0xe0
@@ -165,6 +175,15 @@
 0x65 0x40 0x84 0xe0
 
 #------------------------------------------------------------------------------
+# ADDS
+#------------------------------------------------------------------------------
+# CHECK: adds   r7, r8, #-2147483638
+# CHECK: adds   r7, r8, #40, #2
+
+0x2a 0x71 0x98 0xe2
+0x28 0x71 0x98 0xe2
+
+#------------------------------------------------------------------------------
 # ADR
 #------------------------------------------------------------------------------
 # CHECK: add	r2, pc, #3
@@ -183,6 +202,8 @@
 # AND
 #------------------------------------------------------------------------------
 # CHECK: and r10, r1, #15
+# CHECK: and r7, r8, #-2147483638
+# CHECK: and r7, r8, #40, #2
 # CHECK: and r10, r1, r6
 # CHECK: and r10, r1, r6, lsl #10
 # CHECK: and r10, r1, r6, lsr #10
@@ -209,6 +230,8 @@
 # CHECK: and r10, r10, r1, rrx
 
 0x0f 0xa0 0x01 0xe2
+0x2a 0x71 0x08 0xe2
+0x28 0x71 0x08 0xe2
 0x06 0xa0 0x01 0xe0
 0x06 0xa5 0x01 0xe0
 0x26 0xa5 0x01 0xe0
@@ -262,6 +285,8 @@
 # BIC
 #------------------------------------------------------------------------------
 # CHECK: bic r10, r1, #15
+# CHECK: bic r7, r8, #-2147483638
+# CHECK: bic r7, r8, #40, #2
 # CHECK: bic r10, r1, r6
 # CHECK: bic r10, r1, r6, lsl #10
 # CHECK: bic r10, r1, r6, lsr #10
@@ -288,6 +313,8 @@
 # CHECK: bic r10, r10, r1, rrx
 
 0x0f 0xa0 0xc1 0xe3
+0x2a 0x71 0xc8 0xe3
+0x28 0x71 0xc8 0xe3
 0x06 0xa0 0xc1 0xe1
 0x06 0xa5 0xc1 0xe1
 0x26 0xa5 0xc1 0xe1
@@ -393,6 +420,8 @@
 # CMN
 #------------------------------------------------------------------------------
 # CHECK: cmn r1, #15
+# CHECK: cmn r7, #40, #2
+# CHECK: cmn r7, #-2147483638
 # CHECK: cmn r1, r6
 # CHECK: cmn r1, r6, lsl #10
 # CHECK: cmn r1, r6, lsr #10
@@ -406,6 +435,8 @@
 # CHECK: cmn r1, r6, rrx
 
 0x0f 0x00 0x71 0xe3
+0x28 0x01 0x77 0xe3
+0x2a 0x01 0x77 0xe3
 0x06 0x00 0x71 0xe1
 0x06 0x05 0x71 0xe1
 0x26 0x05 0x71 0xe1
@@ -422,6 +453,8 @@
 # CMP
 #------------------------------------------------------------------------------
 # CHECK: cmp r1, #15
+# CHECK: cmp r7, #40, #2
+# CHECK: cmp r7, #-2147483638
 # CHECK: cmp r1, r6
 # CHECK: cmp r1, r6, lsl #10
 # CHECK: cmp r1, r6, lsr #10
@@ -435,6 +468,8 @@
 # CHECK: cmp r1, r6, rrx
 
 0x0f 0x00 0x51 0xe3
+0x28 0x01 0x57 0xe3
+0x2a 0x01 0x57 0xe3
 0x06 0x00 0x51 0xe1
 0x06 0x05 0x51 0xe1
 0x26 0x05 0x51 0xe1
@@ -556,6 +591,8 @@
 # EOR
 #------------------------------------------------------------------------------
 # CHECK: eor r4, r5, #61440
+# CHECK: eor r7, r8, #-2147483638
+# CHECK: eor r7, r8, #40, #2
 # CHECK: eor r4, r5, r6
 # CHECK: eor r4, r5, r6, lsl #5
 # CHECK: eor r4, r5, r6, lsr #5
@@ -582,6 +619,8 @@
 # CHECK: eor r4, r4, r5, rrx
 
 0x0f 0x4a 0x25 0xe2
+0x2a 0x71 0x28 0xe2
+0x28 0x71 0x28 0xe2
 0x06 0x40 0x25 0xe0
 0x86 0x42 0x25 0xe0
 0xa6 0x42 0x25 0xe0
@@ -714,10 +753,15 @@
 # CHECK: mov r4, #4080
 # CHECK: mov r5, #16711680
 # CHECK: mov sp, #35
+# CHECK: mov r9, #240, #30
+# CHECK: mov r7, #-2147483638
+# CHECK: mov pc, #2147483658
 # CHECK: movw r6, #65535
 # CHECK: movw r9, #65535
 # CHECK: movw sp, #1193
 # CHECK: movs r3, #7
+# CHECK: movs r11, #99
+# CHECK: movs r11, #240, #30
 # CHECK: moveq r4, #4080
 # CHECK: movseq r5, #16711680
 
@@ -725,10 +769,15 @@
 0xff 0x4e 0xa0 0xe3
 0xff 0x58 0xa0 0xe3
 0x23 0xd0 0xa0 0xe3
+0xf0 0x9f 0xa0 0xe3
+0x2a 0x71 0xa0 0xe3
+0x2a 0xf1 0xa0 0xe3
 0xff 0x6f 0x0f 0xe3
 0xff 0x9f 0x0f 0xe3
 0xa9 0xd4 0x00 0xe3
 0x07 0x30 0xb0 0xe3
+0x63 0xb0 0xb0 0xe3
+0xf0 0xbf 0xb0 0xe3
 0xff 0x4e 0xa0 0x03
 0xff 0x58 0xb0 0x03
 
@@ -810,6 +859,8 @@
 # CHECK: msr  SPSR_fc, #5
 # CHECK: msr  SPSR_fsxc, #5
 # CHECK: msr  CPSR_fsxc, #5
+# CHECK: msr  APSR_nzcvq, #2147483658
+# CHECK: msr  SPSR_fsxc, #40, #2
 
 0x05 0xf0 0x29 0xe3
 0x05 0xf0 0x24 0xe3
@@ -825,6 +876,8 @@
 0x05 0xf0 0x69 0xe3
 0x05 0xf0 0x6f 0xe3
 0x05 0xf0 0x2f 0xe3
+0x2a 0xf1 0x28 0xe3
+0x28 0xf1 0x6f 0xe3
 
 # CHECK: msr  CPSR_fc, r0
 # CHECK: msr  APSR_g, r0
@@ -877,14 +930,22 @@
 # CHECK: mvn r3, #7
 # CHECK: mvn r4, #4080
 # CHECK: mvn r5, #16711680
+# CHECK: mvn r7, #40, #2
+# CHECK: mvn r7, #-2147483638
 # CHECK: mvns r3, #7
+# CHECK: mvns r11, #240, #30
+# CHECK: mvns r11, #-2147483638
 # CHECK: mvneq r4, #4080
 # CHECK: mvnseq r5, #16711680
 
 0x07 0x30 0xe0 0xe3
 0xff 0x4e 0xe0 0xe3
 0xff 0x58 0xe0 0xe3
+0x28 0x71 0xe0 0xe3
+0x2a 0x71 0xe0 0xe3
 0x07 0x30 0xf0 0xe3
+0xf0 0xbf 0xf0 0xe3
+0x2a 0xb1 0xf0 0xe3
 0xff 0x4e 0xe0 0x03
 0xff 0x58 0xf0 0x03
 
@@ -940,6 +1001,8 @@
 # ORR
 #------------------------------------------------------------------------------
 # CHECK: orr r4, r5, #61440
+# CHECK: orr r7, r8, #-2147483638
+# CHECK: orr r7, r8, #40, #2
 # CHECK: orr r4, r5, r6
 # CHECK: orr r4, r5, r6, lsl #5
 # CHECK: orr r4, r5, r6, lsr #5
@@ -966,6 +1029,8 @@
 # CHECK: orr r4, r4, r5, rrx
 
 0x0f 0x4a 0x85 0xe3
+0x2a 0x71 0x88 0xe3
+0x28 0x71 0x88 0xe3
 0x06 0x40 0x85 0xe1
 0x86 0x42 0x85 0xe1
 0xa6 0x42 0x85 0xe1
@@ -1204,6 +1269,8 @@
 # RSB
 #------------------------------------------------------------------------------
 # CHECK: rsb r4, r5, #61440
+# CHECK: rsb r7, r8, #-2147483638
+# CHECK: rsb r7, r8, #40, #2
 # CHECK: rsb r4, r5, r6
 # CHECK: rsb r4, r5, r6, lsl #5
 # CHECK: rsblo r4, r5, r6, lsr #5
@@ -1230,6 +1297,8 @@
 # CHECK: rsb r4, r4, r5, rrx
 
 0x0f 0x4a 0x65 0xe2
+0x2a 0x71 0x68 0xe2
+0x28 0x71 0x68 0xe2
 0x06 0x40 0x65 0xe0
 0x86 0x42 0x65 0xe0
 0xa6 0x42 0x65 0x30
@@ -1256,9 +1325,20 @@
 0x65 0x40 0x64 0xe0
 
 #------------------------------------------------------------------------------
+# RSBS
+#------------------------------------------------------------------------------
+# CHECK: rsbs   r7, r8, #-2147483638
+# CHECK: rsbs   r7, r8, #40, #2
+
+0x2a 0x71 0x78 0xe2
+0x28 0x71 0x78 0xe2
+
+#------------------------------------------------------------------------------
 # RSC
 #------------------------------------------------------------------------------
 # CHECK: rsc r4, r5, #61440
+# CHECK: rsc r7, r8, #-2147483638
+# CHECK: rsc r7, r8, #40, #2
 # CHECK: rsc r4, r5, r6
 # CHECK: rsc r4, r5, r6, lsl #5
 # CHECK: rsclo r4, r5, r6, lsr #5
@@ -1283,6 +1363,8 @@
 # CHECK: rsc r6, r6, r7, ror r9
 
 0x0f 0x4a 0xe5 0xe2
+0x2a 0x71 0xe8 0xe2
+0x28 0x71 0xe8 0xe2
 0x06 0x40 0xe5 0xe0
 0x86 0x42 0xe5 0xe0
 0xa6 0x42 0xe5 0x30
@@ -1357,6 +1439,8 @@
 # SBC
 #------------------------------------------------------------------------------
 # CHECK: sbc r4, r5, #61440
+# CHECK: sbc r7, r8, #-2147483638
+# CHECK: sbc r7, r8, #40, #2
 # CHECK: sbc r4, r5, r6
 # CHECK: sbc r4, r5, r6, lsl #5
 # CHECK: sbc r4, r5, r6, lsr #5
@@ -1381,6 +1465,8 @@
 # CHECK: sbc r6, r6, r7, ror r9
 
 0x0f 0x4a 0xc5 0xe2
+0x2a 0x71 0xc8 0xe2
+0x28 0x71 0xc8 0xe2
 0x06 0x40 0xc5 0xe0
 0x86 0x42 0xc5 0xe0
 0xa6 0x42 0xc5 0xe0
@@ -1868,6 +1954,8 @@
 # SUB
 #------------------------------------------------------------------------------
 # CHECK: sub r4, r5, #61440
+# CHECK: sub r7, r8, #-2147483638
+# CHECK: sub r7, r8, #40, #2
 # CHECK: sub r4, r5, r6
 # CHECK: sub r4, r5, r6, lsl #5
 # CHECK: sub r4, r5, r6, lsr #5
@@ -1892,6 +1980,8 @@
 # CHECK: sub r6, r6, r7, ror r9
 
 0x0f 0x4a 0x45 0xe2
+0x2a 0x71 0x48 0xe2
+0x28 0x71 0x48 0xe2
 0x06 0x40 0x45 0xe0
 0x86 0x42 0x45 0xe0
 0xa6 0x42 0x45 0xe0
@@ -1916,6 +2006,14 @@
 0x57 0x69 0x46 0xe0
 0x77 0x69 0x46 0xe0
 
+#------------------------------------------------------------------------------
+# SUBS
+#------------------------------------------------------------------------------
+# CHECK: subs   r7, r8, #-2147483638
+# CHECK: subs   r7, r8, #40, #2
+
+0x2a 0x71 0x58 0xe2
+0x28 0x71 0x58 0xe2
 
 #------------------------------------------------------------------------------
 # SVC
@@ -2044,6 +2142,8 @@
 # TEQ
 #------------------------------------------------------------------------------
 # CHECK: teq r5, #61440
+# CHECK: teq r7, #-2147483638
+# CHECK: teq r7, #40, #2
 # CHECK: teq r4, r5
 # CHECK: teq r4, r5, lsl #5
 # CHECK: teq r4, r5, lsr #5
@@ -2056,6 +2156,8 @@
 # CHECK: teq r6, r7, ror r9
 
 0x0f 0x0a 0x35 0xe3
+0x2a 0x01 0x37 0xe3
+0x28 0x01 0x37 0xe3
 0x05 0x00 0x34 0xe1
 0x85 0x02 0x34 0xe1
 0xa5 0x02 0x34 0xe1
@@ -2072,6 +2174,8 @@
 # TST
 #------------------------------------------------------------------------------
 # CHECK: tst r5, #61440
+# CHECK: tst r7, #-2147483638
+# CHECK: tst r7, #40, #2
 # CHECK: tst r4, r5
 # CHECK: tst r4, r5, lsl #5
 # CHECK: tst r4, r5, lsr #5
@@ -2084,6 +2188,8 @@
 # CHECK: tst r6, r7, ror r9
 
 0x0f 0x0a 0x15 0xe3
+0x2a 0x01 0x17 0xe3
+0x28 0x01 0x17 0xe3
 0x05 0x00 0x14 0xe1
 0x85 0x02 0x14 0xe1
 0xa5 0x02 0x14 0xe1
diff --git a/test/MC/Disassembler/ARM/d16.txt b/test/MC/Disassembler/ARM/d16.txt
new file mode 100644
index 000000000000..735af811df0f
--- /dev/null
+++ b/test/MC/Disassembler/ARM/d16.txt
@@ -0,0 +1,23 @@
+# RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -disassemble -mattr=+vfp4,-d16 2>&1 | FileCheck %s --check-prefix=D32
+# RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -disassemble -mattr=+vfp4,-d16 2>&1 | FileCheck %s --check-prefix=D32
+
+
+# D32: vadd.f64 d1, d2, d16
+# D16: warning: invalid instruction encoding
+[0x32,0xee,0x20,0x1b]
+
+# D32: vadd.f64 d1, d17, d6
+# D16: warning: invalid instruction encoding
+[0x31,0xee,0x86,0x1b]
+
+# D32: vadd.f64 d19, d7, d6
+# D16: warning: invalid instruction encoding
+[0x77,0xee,0x06,0x3b]
+
+# D32: vcvt.f64.f32 d22, s4
+# D16: warning: invalid instruction encoding
+[0xf7,0xee,0xc2,0x6a]
+
+# D32: vcvt.f32.f64 s26, d30
+# D16: warning: invalid instruction encoding
+[0xb7,0xee,0xee,0xdb]
diff --git a/test/MC/Disassembler/ARM/invalid-thumb-MSR-MClass.txt b/test/MC/Disassembler/ARM/invalid-thumb-MSR-MClass.txt
new file mode 100644
index 000000000000..26fa907084e9
--- /dev/null
+++ b/test/MC/Disassembler/ARM/invalid-thumb-MSR-MClass.txt
@@ -0,0 +1,35 @@
+# RUN: not llvm-mc -disassemble %s -triple=thumbv7em 2>&1 | FileCheck --check-prefix=CHECK %s
+# RUN: not llvm-mc -disassemble %s -triple=thumbv7m 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7M %s
+
+#------------------------------------------------------------------------------
+# Undefined encodings for mrs
+#------------------------------------------------------------------------------
+
+# invalid SYSm
+# CHECK: warning: invalid instruction encoding
+# CHECK-NEXT: [0xef 0xf3 0x80 0x80]
+[0xef 0xf3 0x80 0x80]
+
+#------------------------------------------------------------------------------
+# Undefined encodings for msr
+#------------------------------------------------------------------------------
+
+# invalid mask = '00'
+# CHECK: warning: potentially undefined instruction encoding
+# CHECK-NEXT: [0x80 0xf3 0x00 0x80]
+[0x80 0xf3 0x00 0x80]
+
+# invalid mask = '11' with SYSm not in {0..3}
+# CHECK: warning: potentially undefined instruction encoding
+# CHECK-NEXT: [0x80 0xf3 0x05 0x8c]
+[0x80 0xf3 0x05 0x8c]
+
+# invalid mask = '01' (ThumbV7M does not have the DSP extension)
+# CHECK-V7M: warning: potentially undefined instruction encoding
+# CHECK-V7M-NEXT: [0x80 0xf3 0x00 0x84]
+[0x80 0xf3 0x00 0x84]
+
+# invalid SYSm
+# CHECK: warning: invalid instruction encoding
+# CHECK-NEXT: [0x80 0xf3 0x80 0x88]
+[0x80 0xf3 0x80 0x88]
diff --git a/test/MC/Disassembler/ARM/invalid-virtexts.arm.txt b/test/MC/Disassembler/ARM/invalid-virtexts.arm.txt
new file mode 100644
index 000000000000..1daada98d67f
--- /dev/null
+++ b/test/MC/Disassembler/ARM/invalid-virtexts.arm.txt
@@ -0,0 +1,10 @@
+# RUN: not llvm-mc -disassemble -triple armv7a -mcpu=cortex-a15 %s 2>&1 | FileCheck --check-prefix=CHECK-ARM %s
+
+# HVC (ARM)
+[0x7f,0xff,0x4f,0xf1]
+# CHECK-ARM:   warning: invalid instruction encoding
+
+[0x70,0xff,0x4f,0x01]
+[0x7f,0xff,0x4f,0xd1]
+# CHECK-ARM:   warning: potentially undefined instruction encoding
+# CHECK-ARM:   warning: potentially undefined instruction encoding
diff --git a/test/MC/Disassembler/ARM/move-banked-regs-arm.txt b/test/MC/Disassembler/ARM/move-banked-regs-arm.txt
new file mode 100644
index 000000000000..b92c5779a664
--- /dev/null
+++ b/test/MC/Disassembler/ARM/move-banked-regs-arm.txt
@@ -0,0 +1,150 @@
+@ RUN: llvm-mc -disassemble -triple armv7 -mcpu=cyclone %s | FileCheck %s
+
+
+[0x00,0x22,0x00,0xe1]
+[0x00,0x32,0x01,0xe1]
+[0x00,0x52,0x02,0xe1]
+[0x00,0x72,0x03,0xe1]
+[0x00,0xb2,0x04,0xe1]
+[0x00,0x12,0x05,0xe1]
+[0x00,0x22,0x06,0xe1]
+@ CHECK:         mrs     r2, r8_usr
+@ CHECK:         mrs     r3, r9_usr
+@ CHECK:         mrs     r5, r10_usr
+@ CHECK:         mrs     r7, r11_usr
+@ CHECK:         mrs     r11, r12_usr
+@ CHECK:         mrs     r1, sp_usr
+@ CHECK:         mrs     r2, lr_usr
+
+[0x00,0x22,0x08,0xe1]
+[0x00,0x32,0x09,0xe1]
+[0x00,0x52,0x0a,0xe1]
+[0x00,0x72,0x0b,0xe1]
+[0x00,0xb2,0x0c,0xe1]
+[0x00,0x12,0x0d,0xe1]
+[0x00,0x22,0x0e,0xe1]
+[0x00,0x32,0x4e,0xe1]
+@ CHECK:         mrs     r2, r8_fiq
+@ CHECK:         mrs     r3, r9_fiq
+@ CHECK:         mrs     r5, r10_fiq
+@ CHECK:         mrs     r7, r11_fiq
+@ CHECK:         mrs     r11, r12_fiq
+@ CHECK:         mrs     r1, sp_fiq
+@ CHECK:         mrs     r2, lr_fiq
+@ CHECK:         mrs     r3, SPSR_fiq
+
+[0x00,0x43,0x00,0xe1]
+[0x00,0x93,0x01,0xe1]
+[0x00,0x13,0x40,0xe1]
+@ CHECK:         mrs     r4, lr_irq
+@ CHECK:         mrs     r9, sp_irq
+@ CHECK:         mrs     r1, SPSR_irq
+
+[0x00,0x13,0x02,0xe1]
+[0x00,0x33,0x03,0xe1]
+[0x00,0x53,0x42,0xe1]
+@ CHECK:         mrs     r1, lr_svc
+@ CHECK:         mrs     r3, sp_svc
+@ CHECK:         mrs     r5, SPSR_svc
+
+[0x00,0x53,0x04,0xe1]
+[0x00,0x73,0x05,0xe1]
+[0x00,0x93,0x44,0xe1]
+@ CHECK:         mrs     r5, lr_abt
+@ CHECK:         mrs     r7, sp_abt
+@ CHECK:         mrs     r9, SPSR_abt
+
+[0x00,0x93,0x06,0xe1]
+[0x00,0xb3,0x07,0xe1]
+[0x00,0xc3,0x46,0xe1]
+@ CHECK:         mrs     r9, lr_und
+@ CHECK:         mrs     r11, sp_und
+@ CHECK:         mrs     r12, SPSR_und
+
+[0x00,0x23,0x0c,0xe1]
+[0x00,0x43,0x0d,0xe1]
+[0x00,0x63,0x4c,0xe1]
+@ CHECK:         mrs     r2, lr_mon
+@ CHECK:         mrs     r4, sp_mon
+@ CHECK:         mrs     r6, SPSR_mon
+
+[0x00,0x63,0x0e,0xe1]
+[0x00,0x83,0x0f,0xe1]
+[0x00,0xa3,0x4e,0xe1]
+@ CHECK:         mrs     r6, elr_hyp
+@ CHECK:         mrs     r8, sp_hyp
+@ CHECK:         mrs     r10, SPSR_hyp
+
+[0x02,0xf2,0x20,0xe1]
+[0x03,0xf2,0x21,0xe1]
+[0x05,0xf2,0x22,0xe1]
+[0x07,0xf2,0x23,0xe1]
+[0x0b,0xf2,0x24,0xe1]
+[0x01,0xf2,0x25,0xe1]
+[0x02,0xf2,0x26,0xe1]
+@ CHECK:         msr     r8_usr, r2
+@ CHECK:         msr     r9_usr, r3
+@ CHECK:         msr     r10_usr, r5
+@ CHECK:         msr     r11_usr, r7
+@ CHECK:         msr     r12_usr, r11
+@ CHECK:         msr     sp_usr, r1
+@ CHECK:         msr     lr_usr, r2
+
+[0x02,0xf2,0x28,0xe1]
+[0x03,0xf2,0x29,0xe1]
+[0x05,0xf2,0x2a,0xe1]
+[0x07,0xf2,0x2b,0xe1]
+[0x0b,0xf2,0x2c,0xe1]
+[0x01,0xf2,0x2d,0xe1]
+[0x02,0xf2,0x2e,0xe1]
+[0x03,0xf2,0x6e,0xe1]
+@ CHECK:         msr     r8_fiq, r2
+@ CHECK:         msr     r9_fiq, r3
+@ CHECK:         msr     r10_fiq, r5
+@ CHECK:         msr     r11_fiq, r7
+@ CHECK:         msr     r12_fiq, r11
+@ CHECK:         msr     sp_fiq, r1
+@ CHECK:         msr     lr_fiq, r2
+@ CHECK:         msr     SPSR_fiq, r3
+
+[0x04,0xf3,0x20,0xe1]
+[0x09,0xf3,0x21,0xe1]
+[0x0b,0xf3,0x60,0xe1]
+@ CHECK:         msr     lr_irq, r4
+@ CHECK:         msr     sp_irq, r9
+@ CHECK:         msr     SPSR_irq, r11
+
+[0x01,0xf3,0x22,0xe1]
+[0x03,0xf3,0x23,0xe1]
+[0x05,0xf3,0x62,0xe1]
+@ CHECK:         msr     lr_svc, r1
+@ CHECK:         msr     sp_svc, r3
+@ CHECK:         msr     SPSR_svc, r5
+
+[0x05,0xf3,0x24,0xe1]
+[0x07,0xf3,0x25,0xe1]
+[0x09,0xf3,0x64,0xe1]
+@ CHECK:         msr     lr_abt, r5
+@ CHECK:         msr     sp_abt, r7
+@ CHECK:         msr     SPSR_abt, r9
+
+[0x09,0xf3,0x26,0xe1]
+[0x0b,0xf3,0x27,0xe1]
+[0x0c,0xf3,0x66,0xe1]
+@ CHECK:         msr     lr_und, r9
+@ CHECK:         msr     sp_und, r11
+@ CHECK:         msr     SPSR_und, r12
+
+[0x02,0xf3,0x2c,0xe1]
+[0x04,0xf3,0x2d,0xe1]
+[0x06,0xf3,0x6c,0xe1]
+@ CHECK:         msr     lr_mon, r2
+@ CHECK:         msr     sp_mon, r4
+@ CHECK:         msr     SPSR_mon, r6
+
+[0x06,0xf3,0x2e,0xe1]
+[0x08,0xf3,0x2f,0xe1]
+[0x0a,0xf3,0x6e,0xe1]
+@ CHECK:         msr     elr_hyp, r6
+@ CHECK:         msr     sp_hyp, r8
+@ CHECK:         msr     SPSR_hyp, r10
diff --git a/test/MC/Disassembler/ARM/move-banked-regs-thumb.txt b/test/MC/Disassembler/ARM/move-banked-regs-thumb.txt
new file mode 100644
index 000000000000..29e91abcc7f1
--- /dev/null
+++ b/test/MC/Disassembler/ARM/move-banked-regs-thumb.txt
@@ -0,0 +1,153 @@
+@ RUN: llvm-mc -disassemble -triple thumb -mcpu=cyclone %s | FileCheck %s
+
+[0xe0,0xf3,0x20,0x82]
+[0xe1,0xf3,0x20,0x83]
+[0xe2,0xf3,0x20,0x85]
+[0xe3,0xf3,0x20,0x87]
+[0xe4,0xf3,0x20,0x8b]
+[0xe5,0xf3,0x20,0x81]
+[0xe6,0xf3,0x20,0x82]
+@ CHECK:         mrs     r2, r8_usr
+@ CHECK:         mrs     r3, r9_usr
+@ CHECK:         mrs     r5, r10_usr
+@ CHECK:         mrs     r7, r11_usr
+@ CHECK:         mrs     r11, r12_usr
+@ CHECK:         mrs     r1, sp_usr
+@ CHECK:         mrs     r2, lr_usr
+
+[0xe8,0xf3,0x20,0x82]
+[0xe9,0xf3,0x20,0x83]
+[0xea,0xf3,0x20,0x85]
+[0xeb,0xf3,0x20,0x87]
+[0xec,0xf3,0x20,0x8b]
+[0xed,0xf3,0x20,0x81]
+[0xee,0xf3,0x20,0x82]
+[0xfe,0xf3,0x20,0x83]
+@ CHECK:         mrs     r2, r8_fiq
+@ CHECK:         mrs     r3, r9_fiq
+@ CHECK:         mrs     r5, r10_fiq
+@ CHECK:         mrs     r7, r11_fiq
+@ CHECK:         mrs     r11, r12_fiq
+@ CHECK:         mrs     r1, sp_fiq
+@ CHECK:         mrs     r2, lr_fiq
+@ CHECK:         mrs     r3, SPSR_fiq
+
+[0xe0,0xf3,0x30,0x84]
+[0xe1,0xf3,0x30,0x89]
+[0xf0,0xf3,0x30,0x81]
+@ CHECK:         mrs     r4, lr_irq
+@ CHECK:         mrs     r9, sp_irq
+@ CHECK:         mrs     r1, SPSR_irq
+
+[0xe2,0xf3,0x30,0x81]
+[0xe3,0xf3,0x30,0x83]
+[0xf2,0xf3,0x30,0x85]
+@ CHECK:         mrs     r1, lr_svc
+@ CHECK:         mrs     r3, sp_svc
+@ CHECK:         mrs     r5, SPSR_svc
+
+[0xe4,0xf3,0x30,0x85]
+[0xe5,0xf3,0x30,0x87]
+[0xf4,0xf3,0x30,0x89]
+@ CHECK:         mrs     r5, lr_abt
+@ CHECK:         mrs     r7, sp_abt
+@ CHECK:         mrs     r9, SPSR_abt
+
+[0xe6,0xf3,0x30,0x89]
+[0xe7,0xf3,0x30,0x8b]
+[0xf6,0xf3,0x30,0x8c]
+@ CHECK:         mrs     r9, lr_und
+@ CHECK:         mrs     r11, sp_und
+@ CHECK:         mrs     r12, SPSR_und
+
+
+[0xec,0xf3,0x30,0x82]
+[0xed,0xf3,0x30,0x84]
+[0xfc,0xf3,0x30,0x86]
+@ CHECK:         mrs     r2, lr_mon
+@ CHECK:         mrs     r4, sp_mon
+@ CHECK:         mrs     r6, SPSR_mon
+
+
+[0xee,0xf3,0x30,0x86]
+[0xef,0xf3,0x30,0x88]
+[0xfe,0xf3,0x30,0x8a]
+@ CHECK:         mrs     r6, elr_hyp
+@ CHECK:         mrs     r8, sp_hyp
+@ CHECK:         mrs     r10, SPSR_hyp
+
+
+[0x82,0xf3,0x20,0x80]
+[0x83,0xf3,0x20,0x81]
+[0x85,0xf3,0x20,0x82]
+[0x87,0xf3,0x20,0x83]
+[0x8b,0xf3,0x20,0x84]
+[0x81,0xf3,0x20,0x85]
+[0x82,0xf3,0x20,0x86]
+@ CHECK:         msr     r8_usr, r2
+@ CHECK:         msr     r9_usr, r3
+@ CHECK:         msr     r10_usr, r5
+@ CHECK:         msr     r11_usr, r7
+@ CHECK:         msr     r12_usr, r11
+@ CHECK:         msr     sp_usr, r1
+@ CHECK:         msr     lr_usr, r2
+
+[0x82,0xf3,0x20,0x88]
+[0x83,0xf3,0x20,0x89]
+[0x85,0xf3,0x20,0x8a]
+[0x87,0xf3,0x20,0x8b]
+[0x8b,0xf3,0x20,0x8c]
+[0x81,0xf3,0x20,0x8d]
+[0x82,0xf3,0x20,0x8e]
+[0x93,0xf3,0x20,0x8e]
+@ CHECK:         msr     r8_fiq, r2
+@ CHECK:         msr     r9_fiq, r3
+@ CHECK:         msr     r10_fiq, r5
+@ CHECK:         msr     r11_fiq, r7
+@ CHECK:         msr     r12_fiq, r11
+@ CHECK:         msr     sp_fiq, r1
+@ CHECK:         msr     lr_fiq, r2
+@ CHECK:        msr     SPSR_fiq, r3
+
+[0x84,0xf3,0x30,0x80]
+[0x89,0xf3,0x30,0x81]
+[0x9b,0xf3,0x30,0x80]
+@ CHECK:         msr     lr_irq, r4
+@ CHECK:         msr     sp_irq, r9
+@ CHECK:         msr     SPSR_irq, r11
+
+[0x81,0xf3,0x30,0x82]
+[0x83,0xf3,0x30,0x83]
+[0x95,0xf3,0x30,0x82]
+@ CHECK:         msr     lr_svc, r1
+@ CHECK:         msr     sp_svc, r3
+@ CHECK:         msr     SPSR_svc, r5
+
+[0x85,0xf3,0x30,0x84]
+[0x87,0xf3,0x30,0x85]
+[0x99,0xf3,0x30,0x84]
+@ CHECK:         msr     lr_abt, r5
+@ CHECK:         msr     sp_abt, r7
+@ CHECK:         msr     SPSR_abt, r9
+
+[0x89,0xf3,0x30,0x86]
+[0x8b,0xf3,0x30,0x87]
+[0x9c,0xf3,0x30,0x86]
+@ CHECK:         msr     lr_und, r9
+@ CHECK:         msr     sp_und, r11
+@ CHECK:         msr     SPSR_und, r12
+
+
+[0x82,0xf3,0x30,0x8c]
+[0x84,0xf3,0x30,0x8d]
+[0x96,0xf3,0x30,0x8c]
+@ CHECK:         msr     lr_mon, r2
+@ CHECK:         msr     sp_mon, r4
+@ CHECK:         msr     SPSR_mon, r6
+
+[0x86,0xf3,0x30,0x8e]
+[0x88,0xf3,0x30,0x8f]
+[0x9a,0xf3,0x30,0x8e]
+@ CHECK:         msr     elr_hyp, r6
+@ CHECK:         msr     sp_hyp, r8
+@ CHECK:         msr     SPSR_hyp, r10
diff --git a/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt b/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt
index 497cb9a2a5e0..c1a2790e3f73 100644
--- a/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt
+++ b/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt
@@ -1,7 +1,94 @@
-# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu cortex-m3 | FileCheck %s
+# RUN: llvm-mc --disassemble %s -triple=thumbv7em | FileCheck %s
 
-# CHECK: msr    primask, r0
-0x80 0xf3 0x10 0x80
+#------------------------------------------------------------------------------
+# MRS
+#------------------------------------------------------------------------------
 
-# CHECK: mrs    r0, primask
+# CHECK: mrs r0, apsr
+# CHECK: mrs r0, iapsr
+# CHECK: mrs r0, eapsr
+# CHECK: mrs r0, xpsr
+# CHECK: mrs r0, ipsr
+# CHECK: mrs r0, epsr
+# CHECK: mrs r0, iepsr
+# CHECK: mrs r0, msp
+# CHECK: mrs r0, psp
+# CHECK: mrs r0, primask
+# CHECK: mrs r0, basepri
+# CHECK: mrs r0, basepri_max
+# CHECK: mrs r0, faultmask
+# CHECK: mrs r0, control
+
+0xef 0xf3 0x00 0x80
+0xef 0xf3 0x01 0x80
+0xef 0xf3 0x02 0x80
+0xef 0xf3 0x03 0x80
+0xef 0xf3 0x05 0x80
+0xef 0xf3 0x06 0x80
+0xef 0xf3 0x07 0x80
+0xef 0xf3 0x08 0x80
+0xef 0xf3 0x09 0x80
 0xef 0xf3 0x10 0x80
+0xef 0xf3 0x11 0x80
+0xef 0xf3 0x12 0x80
+0xef 0xf3 0x13 0x80
+0xef 0xf3 0x14 0x80
+
+
+#------------------------------------------------------------------------------
+# MSR
+#------------------------------------------------------------------------------
+
+# CHECK: msr apsr_nzcvq, r0
+# CHECK: msr apsr_g, r0
+# CHECK: msr apsr_nzcvqg, r0
+
+0x80 0xf3 0x00 0x88
+0x80 0xf3 0x00 0x84
+0x80 0xf3 0x00 0x8c
+
+# CHECK: msr iapsr_nzcvq, r0
+# CHECK: msr iapsr_g, r0
+# CHECK: msr iapsr_nzcvqg, r0
+
+0x80 0xf3 0x01 0x88
+0x80 0xf3 0x01 0x84
+0x80 0xf3 0x01 0x8c
+
+# CHECK: msr eapsr_nzcvq, r0
+# CHECK: msr eapsr_g, r0
+# CHECK: msr eapsr_nzcvqg, r0
+
+0x80 0xf3 0x02 0x88
+0x80 0xf3 0x02 0x84
+0x80 0xf3 0x02 0x8c
+
+# CHECK: msr xpsr_nzcvq, r0
+# CHECK: msr xpsr_g, r0
+# CHECK: msr xpsr_nzcvqg, r0
+
+0x80 0xf3 0x03 0x88
+0x80 0xf3 0x03 0x84
+0x80 0xf3 0x03 0x8c
+
+# CHECK: msr ipsr, r0
+# CHECK: msr epsr, r0
+# CHECK: msr iepsr, r0
+# CHECK: msr msp, r0
+# CHECK: msr psp, r0
+# CHECK: msr primask, r0
+# CHECK: msr basepri, r0
+# CHECK: msr basepri_max, r0
+# CHECK: msr faultmask, r0
+# CHECK: msr control, r0
+
+0x80 0xf3 0x05 0x88
+0x80 0xf3 0x06 0x88
+0x80 0xf3 0x07 0x88
+0x80 0xf3 0x08 0x88
+0x80 0xf3 0x09 0x88
+0x80 0xf3 0x10 0x88
+0x80 0xf3 0x11 0x88
+0x80 0xf3 0x12 0x88
+0x80 0xf3 0x13 0x88
+0x80 0xf3 0x14 0x88
diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt
index df2bac140cf7..dcb6e3f6721d 100644
--- a/test/MC/Disassembler/ARM/thumb-tests.txt
+++ b/test/MC/Disassembler/ARM/thumb-tests.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu=cortex-a9-mp | FileCheck %s
+# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu=cortex-a9 | FileCheck %s
 
 # CHECK:	add	r5, sp, #68
 0x11 0xad
diff --git a/test/MC/Disassembler/ARM/thumb2-preloads.txt b/test/MC/Disassembler/ARM/thumb2-preloads.txt
new file mode 100644
index 000000000000..dec4d648e92c
--- /dev/null
+++ b/test/MC/Disassembler/ARM/thumb2-preloads.txt
@@ -0,0 +1,69 @@
+# RUN: not llvm-mc -triple=thumbv6t2-none-eabi -disassemble            < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2
+# RUN: not llvm-mc -triple=thumbv7a-none-eabi  -disassemble -mattr=-mp < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7
+# RUN:     llvm-mc -triple=thumbv7a-none-eabi  -disassemble -mattr=+mp < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7 --check-prefix=MP
+# RUN: not llvm-mc -triple=thumbv7m-none-eabi  -disassemble            < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7
+
+# RUN: not llvm-mc -triple=thumbv6t2-none-eabi -disassemble            < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR --check-prefix=V7-ERR
+# RUN: not llvm-mc -triple=thumbv7a-none-eabi  -disassemble -mattr=-mp < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR
+# RUN:     llvm-mc -triple=thumbv7a-none-eabi  -disassemble -mattr=+mp < %s 2>&1 >/dev/null
+# RUN: not llvm-mc -triple=thumbv7m-none-eabi  -disassemble            < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR
+
+# V6T2: pld     [r1, #3]
+[0x91,0xf8,0x03,0xf0]
+
+# V6T2: pld     [r2, #-5]
+[0x12,0xf8,0x05,0xfc]
+
+# MP: pldw    [r3, #4]
+# MP-ERR: invalid instruction encoding
+# MP-ERR-NEXT: [0xb3,0xf8,0x04,0xf0]
+[0xb3,0xf8,0x04,0xf0]
+
+# MP: pldw    [r4, #-6]
+# MP-ERR: invalid instruction encoding
+# MP-ERR-NEXT: [0x34,0xf8,0x06,0xfc]
+[0x34,0xf8,0x06,0xfc]
+
+# V6T2: pld     [pc, #8]
+[0x9f,0xf8,0x08,0xf0]
+
+# V6T2: pld     [pc, #-5]
+[0x1f,0xf8,0x05,0xf0]
+
+# V6T2: pld     [r5, r6]
+[0x15,0xf8,0x06,0xf0]
+
+# V6T2: pld     [r7, r8, lsl #1]
+[0x17,0xf8,0x18,0xf0]
+
+# MP: pldw    [r9, r10]
+# MP-ERR: invalid instruction encoding
+# MP-ERR-NEXT: [0x39,0xf8,0x0a,0xf0]
+[0x39,0xf8,0x0a,0xf0]
+
+# MP: pldw    [r11, r12, lsl #2]
+# MP-ERR: invalid instruction encoding
+# MP-ERR-NEXT: [0x3b,0xf8,0x2c,0xf0]
+[0x3b,0xf8,0x2c,0xf0]
+
+# V7: pli     [r1, #10]
+# V7-ERR: invalid instruction encoding
+# V7-ERR-NEXT: [0x91,0xf9,0x0a,0xf0]
+[0x91,0xf9,0x0a,0xf0]
+
+# V7: pli     [r2, #-3]
+# V7-ERR: invalid instruction encoding
+# V7-ERR-NEXT: [0x12,0xf9,0x03,0xfc]
+[0x12,0xf9,0x03,0xfc]
+
+# V7: pli     [pc, #6]
+# V7-ERR: invalid instruction encoding
+# V7-ERR-NEXT: [0x9f,0xf9,0x06,0xf0]
+[0x9f,0xf9,0x06,0xf0]
+
+# V7: pli     [pc, #-8]
+# V7-ERR: invalid instruction encoding
+# V7-ERR-NEXT: [0x1f,0xf9,0x08,0xf0]
+[0x1f,0xf9,0x08,0xf0]
+
+# NO-ERR-NOT: invalid instruction encoding
diff --git a/test/MC/Disassembler/ARM/virtexts-arm.txt b/test/MC/Disassembler/ARM/virtexts-arm.txt
new file mode 100644
index 000000000000..a18466f2d663
--- /dev/null
+++ b/test/MC/Disassembler/ARM/virtexts-arm.txt
@@ -0,0 +1,41 @@
+# RUN: llvm-mc -disassemble -triple armv7a -mcpu=cortex-a15 %s | FileCheck %s
+
+[0x71,0x00,0x40,0xe1]
+[0x77,0x00,0x40,0xe1]
+[0x71,0x10,0x40,0xe1]
+[0x7f,0xff,0x4f,0xe1]
+# CHECK:    hvc    #1
+# CHECK:    hvc    #7
+# CHECK:    hvc    #257
+# CHECK:    hvc    #65535
+
+[0x6e,0x00,0x60,0xe1]
+[0x6e,0x00,0x60,0x01]
+[0x6e,0x00,0x60,0x11]
+[0x6e,0x00,0x60,0x21]
+[0x6e,0x00,0x60,0x31]
+[0x6e,0x00,0x60,0x41]
+[0x6e,0x00,0x60,0x51]
+[0x6e,0x00,0x60,0x61]
+[0x6e,0x00,0x60,0x71]
+[0x6e,0x00,0x60,0x81]
+[0x6e,0x00,0x60,0x91]
+[0x6e,0x00,0x60,0xa1]
+[0x6e,0x00,0x60,0xb1]
+[0x6e,0x00,0x60,0xc1]
+[0x6e,0x00,0x60,0xd1]
+# CHECK:    eret
+# CHECK:    ereteq
+# CHECK:    eretne
+# CHECK:    ereths
+# CHECK:    eretlo
+# CHECK:    eretmi
+# CHECK:    eretpl
+# CHECK:    eretvs
+# CHECK:    eretvc
+# CHECK:    erethi
+# CHECK:    eretls
+# CHECK:    eretge
+# CHECK:    eretlt
+# CHECK:    eretgt
+# CHECK:    eretle
diff --git a/test/MC/Disassembler/ARM/virtexts-thumb.txt b/test/MC/Disassembler/ARM/virtexts-thumb.txt
new file mode 100644
index 000000000000..da0f621dcacd
--- /dev/null
+++ b/test/MC/Disassembler/ARM/virtexts-thumb.txt
@@ -0,0 +1,61 @@
+# RUN: llvm-mc -disassemble -triple thumbv7 -mcpu=cortex-a15 %s | FileCheck %s --check-prefix=CHECK-THUMB
+# RUN: not llvm-mc -disassemble -triple thumbv7 -mcpu=cortex-a9 %s 2>&1 | FileCheck %s --check-prefix=CHECK-NOVIRT
+
+[0xe0,0xf7,0x01,0x80]
+[0xe0,0xf7,0x07,0x80]
+[0xe0,0xf7,0x01,0x81]
+[0xef,0xf7,0xff,0x8f]
+# CHECK-THUMB:    hvc.w    #1
+# CHECK-THUMB:    hvc.w    #7
+# CHECK-THUMB:    hvc.w    #257
+# CHECK-THUMB:    hvc.w    #65535
+# CHECK-NOVIRT:    warning: invalid instruction encoding
+# CHECK-NOVIRT:    warning: invalid instruction encoding
+# CHECK-NOVIRT:    warning: invalid instruction encoding
+# CHECK-NOVIRT:    warning: invalid instruction encoding
+
+[0xde,0xf3,0x00,0x8f]
+[0x08,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x18,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x28,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x38,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x48,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x58,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x68,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x78,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x88,0xbf] [0xde,0xf3,0x00,0x8f]
+[0x98,0xbf] [0xde,0xf3,0x00,0x8f]
+[0xa8,0xbf] [0xde,0xf3,0x00,0x8f]
+[0xb8,0xbf] [0xde,0xf3,0x00,0x8f]
+[0xc8,0xbf] [0xde,0xf3,0x00,0x8f]
+[0xd8,0xbf] [0xde,0xf3,0x00,0x8f]
+# CHECK-THUMB:    eret
+# CHECK-THUMB:    ereteq
+# CHECK-THUMB:    eretne
+# CHECK-THUMB:    ereths
+# CHECK-THUMB:    eretlo
+# CHECK-THUMB:    eretmi
+# CHECK-THUMB:    eretpl
+# CHECK-THUMB:    eretvs
+# CHECK-THUMB:    eretvc
+# CHECK-THUMB:    erethi
+# CHECK-THUMB:    eretls
+# CHECK-THUMB:    eretge
+# CHECK-THUMB:    eretlt
+# CHECK-THUMB:    eretgt
+# CHECK-THUMB:    eretle
+# CHECK-NOVIRT:    subs    pc, lr, #0
+# CHECK-NOVIRT:    subseq  pc, lr, #0
+# CHECK-NOVIRT:    subsne  pc, lr, #0
+# CHECK-NOVIRT:    subshs  pc, lr, #0
+# CHECK-NOVIRT:    subslo  pc, lr, #0
+# CHECK-NOVIRT:    subsmi  pc, lr, #0
+# CHECK-NOVIRT:    subspl  pc, lr, #0
+# CHECK-NOVIRT:    subsvs  pc, lr, #0
+# CHECK-NOVIRT:    subsvc  pc, lr, #0
+# CHECK-NOVIRT:    subshi  pc, lr, #0
+# CHECK-NOVIRT:    subsls  pc, lr, #0
+# CHECK-NOVIRT:    subsge  pc, lr, #0
+# CHECK-NOVIRT:    subslt  pc, lr, #0
+# CHECK-NOVIRT:    subsgt  pc, lr, #0
+# CHECK-NOVIRT:    subsle  pc, lr, #0
diff --git a/test/MC/Disassembler/Hexagon/alu32_alu.txt b/test/MC/Disassembler/Hexagon/alu32_alu.txt
new file mode 100644
index 000000000000..7fd400779292
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/alu32_alu.txt
@@ -0,0 +1,44 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0xf1 0xc3 0x15 0xb0
+# CHECK: r17 = add(r21, #31)
+0x11 0xdf 0x15 0xf3
+# CHECK: r17 = add(r21, r31)
+0x11 0xdf 0x55 0xf6
+# CHECK: r17 = add(r21, r31):sat
+0xf1 0xc3 0x15 0x76
+# CHECK: r17 = and(r21, #31)
+0xf1 0xc3 0x95 0x76
+# CHECK: r17 = or(r21, #31)
+0x11 0xdf 0x15 0xf1
+# CHECK: r17 = and(r21, r31)
+0x11 0xdf 0x35 0xf1
+# CHECK: r17 = or(r21, r31)
+0x11 0xdf 0x75 0xf1
+# CHECK: r17 = xor(r21, r31)
+0x11 0xd5 0x9f 0xf1
+# CHECK: r17 = and(r21, ~r31)
+0x11 0xd5 0xbf 0xf1
+# CHECK: r17 = or(r21, ~r31)
+0x00 0xc0 0x00 0x7f
+# CHECK: nop
+0xb1 0xc2 0x5f 0x76
+# CHECK: r17 = sub(#21, r31)
+0x11 0xdf 0x35 0xf3
+# CHECK: r17 = sub(r31, r21)
+0x11 0xdf 0xd5 0xf6
+# CHECK: r17 = sub(r31, r21):sat
+0x11 0xc0 0xbf 0x70
+# CHECK: r17 = sxtb(r31)
+0x15 0xc0 0x31 0x72
+# CHECK: r17.h = #21
+0x15 0xc0 0x31 0x71
+# CHECK: r17.l = #21
+0xf1 0xff 0x5f 0x78
+# CHECK: r17 = #32767
+0xf1 0xff 0xdf 0x78
+# CHECK: r17 = ##65535
+0x11 0xc0 0x75 0x70
+# CHECK: r17 = r21
+0x11 0xc0 0xd5 0x70
+# CHECK: r17 = zxth(r21)
diff --git a/test/MC/Disassembler/Hexagon/alu32_perm.txt b/test/MC/Disassembler/Hexagon/alu32_perm.txt
new file mode 100644
index 000000000000..15977edbd6b7
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/alu32_perm.txt
@@ -0,0 +1,32 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x11 0xdf 0x95 0xf3
+# CHECK: r17 = combine(r31.h, r21.h)
+0x11 0xdf 0xb5 0xf3
+# CHECK: r17 = combine(r31.h, r21.l)
+0x11 0xdf 0xd5 0xf3
+# CHECK: r17 = combine(r31.l, r21.h)
+0x11 0xdf 0xf5 0xf3
+# CHECK: r17 = combine(r31.l, r21.l)
+0xb0 0xe2 0x0f 0x7c
+# CHECK: r17:16 = combine(#21, #31)
+0xb0 0xe2 0x3f 0x73
+# CHECK: r17:16 = combine(#21, r31)
+0xf0 0xe3 0x15 0x73
+# CHECK: r17:16 = combine(r21, #31)
+0x10 0xdf 0x15 0xf5
+# CHECK: r17:16 = combine(r21, r31)
+0xf1 0xc3 0x75 0x73
+# CHECK: r17 = mux(p3, r21, #31)
+0xb1 0xc2 0xff 0x73
+# CHECK: r17 = mux(p3, #21, r31)
+0xb1 0xe2 0x8f 0x7b
+# CHECK: r17 = mux(p3, #21, #31)
+0x71 0xdf 0x15 0xf4
+# CHECK: r17 = mux(p3, r21, r31)
+0x11 0xc0 0x15 0x70
+# CHECK: r17 = aslh(r21)
+0x11 0xc0 0x35 0x70
+# CHECK: r17 = asrh(r21)
+0x10 0xdf 0x95 0xf5
+# CHECK: r17:16 = packhl(r21, r31)
diff --git a/test/MC/Disassembler/Hexagon/alu32_pred.txt b/test/MC/Disassembler/Hexagon/alu32_pred.txt
new file mode 100644
index 000000000000..28a800359ea1
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/alu32_pred.txt
@@ -0,0 +1,70 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x71 0xdf 0x15 0xfb
+# CHECK: if (p3) r17 = add(r21, r31)
+0x11 0xe3 0x15 0x70
+# CHECK: if (p3) r17 = aslh(r21)
+0x11 0xe3 0x35 0x70
+# CHECK: if (p3) r17 = asrh(r21)
+0x70 0xdf 0x15 0xfd
+# CHECK: if (p3) r17:16 = combine(r21, r31)
+0xf0 0xdf 0x15 0xfd
+# CHECK: if (!p3) r17:16 = combine(r21, r31)
+0x03 0x40 0x45 0x85 0x70 0xff 0x15 0xfd
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17:16 = combine(r21, r31)
+0x03 0x40 0x45 0x85 0xf0 0xff 0x15 0xfd
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17:16 = combine(r21, r31)
+0x03 0x40 0x45 0x85 0x70 0xff 0x15 0xfd
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17:16 = combine(r21, r31)
+0x03 0x40 0x45 0x85 0xf0 0xff 0x15 0xfd
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17:16 = combine(r21, r31)
+0x71 0xdf 0x15 0xf9
+# CHECK: if (p3) r17 = and(r21, r31)
+0x71 0xdf 0x35 0xf9
+# CHECK: if (p3) r17 = or(r21, r31)
+0x71 0xdf 0x75 0xf9
+# CHECK: if (p3) r17 = xor(r21, r31)
+0x71 0xdf 0x35 0xfb
+# CHECK: if (p3) r17 = sub(r31, r21)
+0x11 0xe3 0xb5 0x70
+# CHECK: if (p3) r17 = sxtb(r21)
+0x11 0xe3 0xf5 0x70
+# CHECK: if (p3) r17 = sxth(r21)
+0xb1 0xc2 0x60 0x7e
+# CHECK: if (p3) r17 = #21
+0xb1 0xc2 0xe0 0x7e
+# CHECK: if (!p3) r17 = #21
+0x03 0x40 0x45 0x85 0xb1 0xe2 0x60 0x7e
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = #21
+0x03 0x40 0x45 0x85 0xb1 0xe2 0xe0 0x7e
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = #21
+0x11 0xe3 0x95 0x70
+# CHECK: if (p3) r17 = zxtb(r21)
+0x11 0xe3 0xd5 0x70
+# CHECK: if (p3) r17 = zxth(r21)
+0x03 0xdf 0x15 0xf2
+# CHECK: p3 = cmp.eq(r21, r31)
+0x13 0xdf 0x15 0xf2
+# CHECK: p3 = !cmp.eq(r21, r31)
+0x03 0xdf 0x55 0xf2
+# CHECK: p3 = cmp.gt(r21, r31)
+0x13 0xdf 0x55 0xf2
+# CHECK: p3 = !cmp.gt(r21, r31)
+0x03 0xdf 0x75 0xf2
+# CHECK: p3 = cmp.gtu(r21, r31)
+0x13 0xdf 0x75 0xf2
+# CHECK: p3 = !cmp.gtu(r21, r31)
+0xf1 0xe3 0x55 0x73
+# CHECK: r17 = cmp.eq(r21, #31)
+0xf1 0xe3 0x75 0x73
+# CHECK: r17 = !cmp.eq(r21, #31)
+0x11 0xdf 0x55 0xf3
+# CHECK: r17 = cmp.eq(r21, r31)
+0x11 0xdf 0x75 0xf3
+# CHECK: r17 = !cmp.eq(r21, r31)
diff --git a/test/MC/Disassembler/Hexagon/cr.txt b/test/MC/Disassembler/Hexagon/cr.txt
new file mode 100644
index 000000000000..89157156cffd
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/cr.txt
@@ -0,0 +1,66 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x93 0xe1 0x12 0x6b
+# CHECK: p3 = !fastcorner9(p2, p1)
+0x91 0xe3 0x02 0x6b
+# CHECK: p1 = fastcorner9(p2, p3)
+0x01 0xc0 0x82 0x6b
+# CHECK: p1 = any8(p2)
+0x01 0xc0 0xa2 0x6b
+# CHECK: p1 = all8(p2)
+0x08 0xc4 0x15 0x60
+# CHECK: loop0
+0x08 0xc4 0x35 0x60
+# CHECK: loop1
+0x68 0xc4 0x00 0x69
+# CHECK: loop0
+0x68 0xc4 0x20 0x69
+# CHECK: loop1
+0x08 0xc4 0xb5 0x60
+# CHECK: p3 = sp1loop0
+0x08 0xc4 0xd5 0x60
+# CHECK: p3 = sp2loop0
+0x08 0xc4 0xf5 0x60
+# CHECK: p3 = sp3loop0
+0xa9 0xc4 0xa0 0x69
+# CHECK: p3 = sp1loop0
+0xa9 0xc4 0xc0 0x69
+# CHECK: p3 = sp2loop0
+0xa9 0xc4 0xe0 0x69
+# CHECK: p3 = sp3loop0
+0x01 0xc3 0x02 0x6b
+# CHECK: p1 = and(p3, p2)
+0xc1 0xc3 0x12 0x6b
+# CHECK: p1 = and(p2, and(p3, p3))
+0x01 0xc3 0x62 0x6b
+# CHECK: p1 = and(p3, !p2)
+0x01 0xc3 0x22 0x6b
+# CHECK: p1 = or(p3, p2)
+0xc1 0xc3 0x32 0x6b
+# CHECK: p1 = and(p2, or(p3, p3))
+0x01 0xc3 0xe2 0x6b
+# CHECK: p1 = or(p3, !p2)
+0x01 0xc2 0x43 0x6b
+# CHECK: p1 = xor(p3, p2)
+0xc1 0xc3 0x52 0x6b
+# CHECK: p1 = or(p2, and(p3, p3))
+0x01 0xc2 0x63 0x6b 
+# CHECK: p1 = and(p2, !p3)
+0xc1 0xc3 0x72 0x6b
+# CHECK: p1 = or(p2, or(p3, p3))
+0xc1 0xc3 0x92 0x6b
+# CHECK: p1 = and(p2, and(p3, !p3))
+0xc1 0xc3 0xb2 0x6b
+# CHECK: p1 = and(p2, or(p3, !p3))
+0x01 0xc0 0xc2 0x6b
+# CHECK: p1 = not(p2)
+0xc1 0xc3 0xd2 0x6b
+# CHECK: p1 = or(p2, and(p3, !p3))
+0x01 0xc2 0xe3 0x6b
+# CHECK: p1 = or(p2, !p3)
+0xc1 0xc3 0xf2 0x6b
+# CHECK: p1 = or(p2, or(p3, !p3))
+0x0d 0xc0 0x35 0x62
+# CHECK: cs1 = r21
+0x11 0xc0 0x0d 0x6a
+# CHECK: r17 = cs1
diff --git a/test/MC/Disassembler/Hexagon/j.txt b/test/MC/Disassembler/Hexagon/j.txt
new file mode 100644
index 000000000000..c14d0341547c
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/j.txt
@@ -0,0 +1,156 @@
+# RUN: llvm-mc -triple hexagon -disassemble < %s | FileCheck %s
+
+0x22 0xc0 0x00 0x5a
+# CHECK: call
+0x22 0xc3 0x00 0x5d
+# CHECK: if (p3) call
+0x22 0xc3 0x20 0x5d
+# CHECK: if (!p3) call
+0x00 0xc0 0x89 0x11
+# CHECK: p0 = cmp.eq(r9,#-1); if (p0.new) jump:nt
+0x00 0xc1 0x89 0x11
+# CHECK: p0 = cmp.gt(r9,#-1); if (p0.new) jump:nt
+0x00 0xc3 0x89 0x11
+# CHECK: p0 = tstbit(r9, #0); if (p0.new) jump:nt
+0x00 0xe0 0x89 0x11
+# CHECK: p0 = cmp.eq(r9,#-1); if (p0.new) jump:t
+0x00 0xe1 0x89 0x11
+# CHECK: p0 = cmp.gt(r9,#-1); if (p0.new) jump:t
+0x00 0xe3 0x89 0x11
+# CHECK: p0 = tstbit(r9, #0); if (p0.new) jump:t
+0x00 0xc0 0xc9 0x11
+# CHECK: p0 = cmp.eq(r9,#-1); if (!p0.new) jump:nt
+0x00 0xc1 0xc9 0x11
+# CHECK: p0 = cmp.gt(r9,#-1); if (!p0.new) jump:nt
+0x00 0xc3 0xc9 0x11
+# CHECK: p0 = tstbit(r9, #0); if (!p0.new) jump:nt
+0x00 0xe0 0xc9 0x11
+# CHECK: p0 = cmp.eq(r9,#-1); if (!p0.new) jump:t
+0x00 0xe1 0xc9 0x11
+# CHECK: p0 = cmp.gt(r9,#-1); if (!p0.new) jump:t
+0x00 0xe3 0xc9 0x11
+# CHECK: p0 = tstbit(r9, #0); if (!p0.new) jump:t
+0x00 0xd5 0x09 0x10
+# CHECK: p0 = cmp.eq(r9, #21); if (p0.new) jump:nt
+0x00 0xf5 0x09 0x10
+# CHECK: p0 = cmp.eq(r9, #21); if (p0.new) jump:t
+0x00 0xd5 0x49 0x10
+# CHECK: p0 = cmp.eq(r9, #21); if (!p0.new) jump:nt
+0x00 0xf5 0x49 0x10
+# CHECK: p0 = cmp.eq(r9, #21); if (!p0.new) jump:t
+0x00 0xd5 0x89 0x10
+# CHECK: p0 = cmp.gt(r9, #21); if (p0.new) jump:nt
+0x00 0xf5 0x89 0x10
+# CHECK: p0 = cmp.gt(r9, #21); if (p0.new) jump:t
+0x00 0xd5 0xc9 0x10
+# CHECK: p0 = cmp.gt(r9, #21); if (!p0.new) jump:nt
+0x00 0xf5 0xc9 0x10
+# CHECK: p0 = cmp.gt(r9, #21); if (!p0.new) jump:t
+0x00 0xd5 0x09 0x11
+# CHECK: p0 = cmp.gtu(r9, #21); if (p0.new) jump:nt
+0x00 0xf5 0x09 0x11
+# CHECK: p0 = cmp.gtu(r9, #21); if (p0.new) jump:t
+0x00 0xd5 0x49 0x11
+# CHECK: p0 = cmp.gtu(r9, #21); if (!p0.new) jump:nt
+0x00 0xf5 0x49 0x11
+# CHECK: p0 = cmp.gtu(r9, #21); if (!p0.new) jump:t
+0x00 0xc0 0x89 0x13
+# CHECK: p1 = cmp.eq(r9,#-1); if (p1.new) jump:nt
+0x00 0xc1 0x89 0x13
+# CHECK: p1 = cmp.gt(r9,#-1); if (p1.new) jump:nt
+0x00 0xc3 0x89 0x13
+# CHECK: p1 = tstbit(r9, #0); if (p1.new) jump:nt
+0x00 0xe0 0x89 0x13
+# CHECK: p1 = cmp.eq(r9,#-1); if (p1.new) jump:t
+0x00 0xe1 0x89 0x13
+# CHECK: p1 = cmp.gt(r9,#-1); if (p1.new) jump:t
+0x00 0xe3 0x89 0x13
+# CHECK: p1 = tstbit(r9, #0); if (p1.new) jump:t
+0x00 0xc0 0xc9 0x13
+# CHECK: p1 = cmp.eq(r9,#-1); if (!p1.new) jump:nt
+0x00 0xc1 0xc9 0x13
+# CHECK: p1 = cmp.gt(r9,#-1); if (!p1.new) jump:nt
+0x00 0xc3 0xc9 0x13
+# CHECK: p1 = tstbit(r9, #0); if (!p1.new) jump:nt
+0x00 0xe0 0xc9 0x13
+# CHECK: p1 = cmp.eq(r9,#-1); if (!p1.new) jump:t
+0x00 0xe1 0xc9 0x13
+# CHECK: p1 = cmp.gt(r9,#-1); if (!p1.new) jump:t
+0x00 0xe3 0xc9 0x13
+# CHECK: p1 = tstbit(r9, #0); if (!p1.new) jump:t
+0x00 0xd5 0x09 0x12
+# CHECK: p1 = cmp.eq(r9, #21); if (p1.new) jump:nt
+0x00 0xf5 0x09 0x12
+# CHECK: p1 = cmp.eq(r9, #21); if (p1.new) jump:t
+0x00 0xd5 0x49 0x12
+# CHECK: p1 = cmp.eq(r9, #21); if (!p1.new) jump:nt
+0x00 0xf5 0x49 0x12
+# CHECK: p1 = cmp.eq(r9, #21); if (!p1.new) jump:t
+0x00 0xd5 0x89 0x12
+# CHECK: p1 = cmp.gt(r9, #21); if (p1.new) jump:nt
+0x00 0xf5 0x89 0x12
+# CHECK: p1 = cmp.gt(r9, #21); if (p1.new) jump:t
+0x00 0xd5 0xc9 0x12
+# CHECK: p1 = cmp.gt(r9, #21); if (!p1.new) jump:nt
+0x00 0xf5 0xc9 0x12
+# CHECK: p1 = cmp.gt(r9, #21); if (!p1.new) jump:t
+0x00 0xd5 0x09 0x13
+# CHECK: p1 = cmp.gtu(r9, #21); if (p1.new) jump:nt
+0x00 0xf5 0x09 0x13
+# CHECK: p1 = cmp.gtu(r9, #21); if (p1.new) jump:t
+0x00 0xd5 0x49 0x13
+# CHECK: p1 = cmp.gtu(r9, #21); if (!p1.new) jump:nt
+0x00 0xf5 0x49 0x13
+# CHECK: p1 = cmp.gtu(r9, #21); if (!p1.new) jump:t
+0x00 0xcd 0x09 0x14
+# CHECK: p0 = cmp.eq(r9, r13); if (p0.new) jump:nt
+0x00 0xdd 0x09 0x14
+# CHECK: p1 = cmp.eq(r9, r13); if (p1.new) jump:nt
+0x00 0xed 0x09 0x14
+# CHECK: p0 = cmp.eq(r9, r13); if (p0.new) jump:t
+0x00 0xfd 0x09 0x14
+# CHECK: p1 = cmp.eq(r9, r13); if (p1.new) jump:t
+0x00 0xcd 0x49 0x14
+# CHECK: p0 = cmp.eq(r9, r13); if (!p0.new) jump:nt
+0x00 0xdd 0x49 0x14
+# CHECK: p1 = cmp.eq(r9, r13); if (!p1.new) jump:nt
+0x00 0xed 0x49 0x14
+# CHECK: p0 = cmp.eq(r9, r13); if (!p0.new) jump:t
+0x00 0xfd 0x49 0x14
+# CHECK: p1 = cmp.eq(r9, r13); if (!p1.new) jump:t
+0x00 0xcd 0x89 0x14
+# CHECK: p0 = cmp.gt(r9, r13); if (p0.new) jump:nt
+0x00 0xdd 0x89 0x14
+# CHECK: p1 = cmp.gt(r9, r13); if (p1.new) jump:nt
+0x00 0xed 0x89 0x14
+# CHECK: p0 = cmp.gt(r9, r13); if (p0.new) jump:t
+0x00 0xfd 0x89 0x14
+# CHECK: p1 = cmp.gt(r9, r13); if (p1.new) jump:t
+0x00 0xcd 0xc9 0x14
+# CHECK: p0 = cmp.gt(r9, r13); if (!p0.new) jump:nt
+0x00 0xdd 0xc9 0x14
+# CHECK: p1 = cmp.gt(r9, r13); if (!p1.new) jump:nt
+0x00 0xed 0xc9 0x14
+# CHECK: p0 = cmp.gt(r9, r13); if (!p0.new) jump:t
+0x00 0xfd 0xc9 0x14
+# CHECK: p1 = cmp.gt(r9, r13); if (!p1.new) jump:t
+0x00 0xcd 0x09 0x15
+# CHECK: p0 = cmp.gtu(r9, r13); if (p0.new) jump:nt
+0x00 0xdd 0x09 0x15
+# CHECK: p1 = cmp.gtu(r9, r13); if (p1.new) jump:nt
+0x00 0xed 0x09 0x15
+# CHECK: p0 = cmp.gtu(r9, r13); if (p0.new) jump:t
+0x00 0xfd 0x09 0x15
+# CHECK: p1 = cmp.gtu(r9, r13); if (p1.new) jump:t
+0x00 0xcd 0x49 0x15
+# CHECK: p0 = cmp.gtu(r9, r13); if (!p0.new) jump:nt
+0x00 0xdd 0x49 0x15
+# CHECK: p1 = cmp.gtu(r9, r13); if (!p1.new) jump:nt
+0x00 0xed 0x49 0x15
+# CHECK: p0 = cmp.gtu(r9, r13); if (!p0.new) jump:t
+0x00 0xfd 0x49 0x15
+# CHECK: p1 = cmp.gtu(r9, r13); if (!p1.new) jump:t
+0x00 0xd5 0x09 0x16
+# CHECK: r9 = #21 ; jump
+0x00 0xc9 0x0d 0x17
+# CHECK: r9 = r13 ; jump
diff --git a/test/MC/Disassembler/Hexagon/jr.txt b/test/MC/Disassembler/Hexagon/jr.txt
new file mode 100644
index 000000000000..880a3399297b
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/jr.txt
@@ -0,0 +1,26 @@
+# RUN: llvm-mc -triple hexagon -disassemble < %s | FileCheck %s
+
+0x00 0xc0 0xb5 0x50
+# CHECK: callr r21
+0x00 0xc1 0x15 0x51
+# CHECK: if (p1) callr r21
+0x00 0xc3 0x35 0x51
+# CHECK: if (!p3) callr r21
+0x00 0xc0 0x95 0x52
+# CHECK: jumpr r21
+0x00 0xc1 0x55 0x53
+# CHECK: if (p1) jumpr r21
+0x03 0x40 0x45 0x85 0x00 0xcb 0x55 0x53
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) jumpr:nt r21
+0x03 0x40 0x45 0x85 0x00 0xdb 0x55 0x53
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) jumpr:t r21
+0x00 0xc3 0x75 0x53
+# CHECK: if (!p3) jumpr r21
+0x03 0x40 0x45 0x85 0x00 0xcb 0x75 0x53
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) jumpr:nt r21
+0x03 0x40 0x45 0x85 0x00 0xdb 0x75 0x53
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) jumpr:t r21
diff --git a/test/MC/Disassembler/Hexagon/ld.txt b/test/MC/Disassembler/Hexagon/ld.txt
new file mode 100644
index 000000000000..9440480e4e31
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/ld.txt
@@ -0,0 +1,292 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x90 0xff 0xd5 0x3a
+# CHECK: r17:16 = memd(r21 + r31<<#3)
+0x10 0xc5 0xc0 0x49
+# CHECK: r17:16 = memd(##320)
+0xb0 0xe0 0xd5 0x99
+# CHECK: r17:16 = memd(r21 ++ #40:circ(m1))
+0x10 0xe2 0xd5 0x99
+# CHECK: r17:16 = memd(r21 ++ I:circ(m1))
+0xb0 0xc0 0xd5 0x9b
+# CHECK: r17:16 = memd(r21++#40)
+0x10 0xe0 0xd5 0x9d
+# CHECK: r17:16 = memd(r21++m1)
+0x10 0xe0 0xd5 0x9f
+# CHECK: r17:16 = memd(r21 ++ m1:brev)
+0xf0 0xff 0xd5 0x30
+# CHECK: if (p3) r17:16 = memd(r21+r31<<#3)
+0xf0 0xff 0xd5 0x31
+# CHECK: if (!p3) r17:16 = memd(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf0 0xff 0xd5 0x32
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17:16 = memd(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf0 0xff 0xd5 0x33
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17:16 = memd(r21+r31<<#3)
+0x70 0xd8 0xd5 0x41
+# CHECK: if (p3) r17:16 = memd(r21 + #24)
+0x03 0x40 0x45 0x85 0x70 0xd8 0xd5 0x43
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17:16 = memd(r21 + #24)
+0x70 0xd8 0xd5 0x45
+# CHECK: if (!p3) r17:16 = memd(r21 + #24)
+0x03 0x40 0x45 0x85 0x70 0xd8 0xd5 0x47
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17:16 = memd(r21 + #24)
+0xb0 0xe6 0xd5 0x9b
+# CHECK: if (p3) r17:16 = memd(r21++#40)
+0xb0 0xee 0xd5 0x9b
+# CHECK: if (!p3) r17:16 = memd(r21++#40)
+0x03 0x40 0x45 0x85 0xb0 0xf6 0xd5 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17:16 = memd(r21++#40)
+0x03 0x40 0x45 0x85 0xb0 0xfe 0xd5 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17:16 = memd(r21++#40)
+
+0x91 0xff 0x15 0x3a
+# CHECK: r17 = memb(r21 + r31<<#3)
+0xb1 0xc2 0x00 0x49
+# CHECK: r17 = memb(##21)
+0xf1 0xc3 0x15 0x91
+# CHECK: r17 = memb(r21 + #31)
+0xb1 0xe0 0x15 0x99
+# CHECK: r17 = memb(r21 ++ #5:circ(m1))
+0x11 0xe2 0x15 0x99
+# CHECK: r17 = memb(r21 ++ I:circ(m1))
+0xb1 0xc0 0x15 0x9b
+# CHECK: r17 = memb(r21++#5)
+0x11 0xe0 0x15 0x9d
+# CHECK: r17 = memb(r21++m1)
+0x11 0xe0 0x15 0x9f
+# CHECK: r17 = memb(r21 ++ m1:brev)
+0xf1 0xff 0x15 0x30
+# CHECK: if (p3) r17 = memb(r21+r31<<#3)
+0xf1 0xff 0x15 0x31
+# CHECK: if (!p3) r17 = memb(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x15 0x32
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memb(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x15 0x33
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memb(r21+r31<<#3)
+0x91 0xdd 0x15 0x41
+# CHECK: if (p3) r17 = memb(r21 + #44)
+0x03 0x40 0x45 0x85 0x91 0xdd 0x15 0x43
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memb(r21 + #44)
+0x91 0xdd 0x15 0x45
+# CHECK: if (!p3) r17 = memb(r21 + #44)
+0x03 0x40 0x45 0x85 0x91 0xdd 0x15 0x47
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memb(r21 + #44)
+0xb1 0xe6 0x15 0x9b
+# CHECK: if (p3) r17 = memb(r21++#5)
+0xb1 0xee 0x15 0x9b
+# CHECK: if (!p3) r17 = memb(r21++#5)
+0x03 0x40 0x45 0x85 0xb1 0xf6 0x15 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memb(r21++#5)
+0x03 0x40 0x45 0x85 0xb1 0xfe 0x15 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memb(r21++#5)
+
+0x91 0xff 0x55 0x3a
+# CHECK: r17 = memh(r21 + r31<<#3)
+0x51 0xc5 0x40 0x49
+# CHECK: r17 = memh(##84)
+0xf1 0xc3 0x55 0x91
+# CHECK: r17 = memh(r21 + #62)
+0xb1 0xe0 0x55 0x99
+# CHECK: r17 = memh(r21 ++ #10:circ(m1))
+0x11 0xe2 0x55 0x99
+# CHECK: r17 = memh(r21 ++ I:circ(m1))
+0xb1 0xc0 0x55 0x9b
+# CHECK: r17 = memh(r21++#10)
+0x11 0xe0 0x55 0x9d
+# CHECK: r17 = memh(r21++m1)
+0x11 0xe0 0x55 0x9f
+# CHECK: r17 = memh(r21 ++ m1:brev)
+0xf1 0xff 0x55 0x30
+# CHECK: if (p3) r17 = memh(r21+r31<<#3)
+0xf1 0xff 0x55 0x31
+# CHECK: if (!p3) r17 = memh(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x55 0x32
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memh(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x55 0x33
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memh(r21+r31<<#3)
+0xb1 0xe6 0x55 0x9b
+# CHECK: if (p3) r17 = memh(r21++#10)
+0xb1 0xee 0x55 0x9b
+# CHECK: if (!p3) r17 = memh(r21++#10)
+0x03 0x40 0x45 0x85 0xb1 0xf6 0x55 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memh(r21++#10)
+0x03 0x40 0x45 0x85 0xb1 0xfe 0x55 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memh(r21++#10)
+
+0x91 0xff 0x35 0x3a
+# CHECK: r17 = memub(r21 + r31<<#3)
+0xb1 0xc2 0x20 0x49
+# CHECK: r17 = memub(##21)
+0xf1 0xc3 0x35 0x91
+# CHECK: r17 = memub(r21 + #31)
+0xb1 0xe0 0x35 0x99
+# CHECK: r17 = memub(r21 ++ #5:circ(m1))
+0x11 0xe2 0x35 0x99
+# CHECK: r17 = memub(r21 ++ I:circ(m1))
+0xb1 0xc0 0x35 0x9b
+# CHECK: r17 = memub(r21++#5)
+0x11 0xe0 0x35 0x9d
+# CHECK: r17 = memub(r21++m1)
+0x11 0xe0 0x35 0x9f
+# CHECK: r17 = memub(r21 ++ m1:brev)
+0xf1 0xff 0x35 0x30
+# CHECK: if (p3) r17 = memub(r21+r31<<#3)
+0xf1 0xff 0x35 0x31
+# CHECK: if (!p3) r17 = memub(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x35 0x32
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memub(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x35 0x33
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memub(r21+r31<<#3)
+0xf1 0xdb 0x35 0x41
+# CHECK: if (p3) r17 = memub(r21 + #31)
+0x03 0x40 0x45 0x85 0xf1 0xdb 0x35 0x43
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memub(r21 + #31)
+0xf1 0xdb 0x35 0x45
+# CHECK: if (!p3) r17 = memub(r21 + #31)
+0x03 0x40 0x45 0x85 0xf1 0xdb 0x35 0x47
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memub(r21 + #31)
+0xb1 0xe6 0x35 0x9b
+# CHECK: if (p3) r17 = memub(r21++#5)
+0xb1 0xee 0x35 0x9b
+# CHECK: if (!p3) r17 = memub(r21++#5)
+0x03 0x40 0x45 0x85 0xb1 0xf6 0x35 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memub(r21++#5)
+0x03 0x40 0x45 0x85 0xb1 0xfe 0x35 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memub(r21++#5)
+
+0x91 0xff 0x75 0x3a
+# CHECK: r17 = memuh(r21 + r31<<#3)
+0x51 0xc5 0x60 0x49
+# CHECK: r17 = memuh(##84)
+0xb1 0xc2 0x75 0x91
+# CHECK: r17 = memuh(r21 + #42)
+0xb1 0xe0 0x75 0x99
+# CHECK: r17 = memuh(r21 ++ #10:circ(m1))
+0x11 0xe2 0x75 0x99
+# CHECK: r17 = memuh(r21 ++ I:circ(m1))
+0xb1 0xc0 0x75 0x9b
+# CHECK: r17 = memuh(r21++#10)
+0x11 0xe0 0x75 0x9d
+# CHECK: r17 = memuh(r21++m1)
+0x11 0xe0 0x75 0x9f
+# CHECK: r17 = memuh(r21 ++ m1:brev)
+0xf1 0xff 0x75 0x30
+# CHECK: if (p3) r17 = memuh(r21+r31<<#3)
+0xf1 0xff 0x75 0x31
+# CHECK: if (!p3) r17 = memuh(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x75 0x32
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memuh(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x75 0x33
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memuh(r21+r31<<#3)
+0xb1 0xda 0x75 0x41
+# CHECK: if (p3) r17 = memuh(r21 + #42)
+0xb1 0xda 0x75 0x45
+# CHECK: if (!p3) r17 = memuh(r21 + #42)
+0x03 0x40 0x45 0x85 0xb1 0xda 0x75 0x43
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memuh(r21 + #42)
+0x03 0x40 0x45 0x85 0xb1 0xda 0x75 0x47
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memuh(r21 + #42)
+0xb1 0xe6 0x75 0x9b
+# CHECK: if (p3) r17 = memuh(r21++#10)
+0xb1 0xee 0x75 0x9b
+# CHECK: if (!p3) r17 = memuh(r21++#10)
+0x03 0x40 0x45 0x85 0xb1 0xf6 0x75 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memuh(r21++#10)
+0x03 0x40 0x45 0x85 0xb1 0xfe 0x75 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memuh(r21++#10)
+
+0x91 0xff 0x95 0x3a
+# CHECK: r17 = memw(r21 + r31<<#3)
+0x91 0xc2 0x80 0x49
+# CHECK: r17 = memw(##80)
+0xb1 0xc2 0x95 0x91
+# CHECK: r17 = memw(r21 + #84)
+0xb1 0xe0 0x95 0x99
+# CHECK: r17 = memw(r21 ++ #20:circ(m1))
+0x11 0xe2 0x95 0x99
+# CHECK: r17 = memw(r21 ++ I:circ(m1))
+0xb1 0xc0 0x95 0x9b
+# CHECK: r17 = memw(r21++#20)
+0x11 0xe0 0x95 0x9d
+# CHECK: r17 = memw(r21++m1)
+0x11 0xe0 0x95 0x9f
+# CHECK: r17 = memw(r21 ++ m1:brev)
+0xf1 0xff 0x95 0x30
+# CHECK: if (p3) r17 = memw(r21+r31<<#3)
+0xf1 0xff 0x95 0x31
+# CHECK: if (!p3) r17 = memw(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x95 0x32
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memw(r21+r31<<#3)
+0x03 0x40 0x45 0x85 0xf1 0xff 0x95 0x33
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memw(r21+r31<<#3)
+0xb1 0xda 0x95 0x41
+# CHECK: if (p3) r17 = memw(r21 + #84)
+0xb1 0xda 0x95 0x45
+# CHECK: if (!p3) r17 = memw(r21 + #84)
+0x03 0x40 0x45 0x85 0xb1 0xda 0x95 0x43
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memw(r21 + #84)
+0x03 0x40 0x45 0x85 0xb1 0xda 0x95 0x47
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memw(r21 + #84)
+0xb1 0xe6 0x95 0x9b
+# CHECK: if (p3) r17 = memw(r21++#20)
+0xb1 0xee 0x95 0x9b
+# CHECK: if (!p3) r17 = memw(r21++#20)
+0x03 0x40 0x45 0x85 0xb1 0xf6 0x95 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memw(r21++#20)
+0x03 0x40 0x45 0x85 0xb1 0xfe 0x95 0x9b
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memw(r21++#20)
+
+0x1e 0xc0 0x1e 0x90
+# CHECK: deallocframe
+0x1e 0xc0 0x1e 0x96
+# CHECK: dealloc_return
+0x03 0x40 0x45 0x85 0x1e 0xcb 0x1e 0x96
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) dealloc_return:nt
+0x1e 0xd3 0x1e 0x96
+# CHECK: if (p3) dealloc_return
+0x03 0x40 0x45 0x85 0x1e 0xdb 0x1e 0x96
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) dealloc_return:t
+0x03 0x40 0x45 0x85 0x1e 0xeb 0x1e 0x96
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) dealloc_return:nt
+0x1e 0xf3 0x1e 0x96
+# CHECK: if (!p3) dealloc_return
+0x03 0x40 0x45 0x85 0x1e 0xfb 0x1e 0x96
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) dealloc_return:t
diff --git a/test/MC/Disassembler/Hexagon/lit.local.cfg b/test/MC/Disassembler/Hexagon/lit.local.cfg
new file mode 100644
index 000000000000..6500d4dd7d5a
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/lit.local.cfg
@@ -0,0 +1,3 @@
+if not 'Hexagon' in config.root.targets:

+    config.unsupported = True

+

diff --git a/test/MC/Disassembler/Hexagon/memop.txt b/test/MC/Disassembler/Hexagon/memop.txt
new file mode 100644
index 000000000000..7c944121ddcc
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/memop.txt
@@ -0,0 +1,50 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x95 0xd9 0x11 0x3e
+# CHECK: memb(r17+#51) += r21
+0xb5 0xd9 0x11 0x3e
+# CHECK: memb(r17+#51) -= r21
+0xd5 0xd9 0x11 0x3e
+# CHECK: memb(r17+#51) &= r21
+0xf5 0xd9 0x11 0x3e
+# CHECK: memb(r17+#51) |= r21
+0x95 0xd9 0x11 0x3f
+# CHECK: memb(r17+#51) += #21
+0xb5 0xd9 0x11 0x3f
+# CHECK: memb(r17+#51) -= #21
+0xd5 0xd9 0x11 0x3f
+# CHECK: memb(r17+#51) = clrbit(#21)
+0xf5 0xd9 0x11 0x3f
+# CHECK: memb(r17+#51) = setbit(#21)
+0x95 0xd9 0x31 0x3e
+# CHECK: memh(r17+#102) += r21
+0xb5 0xd9 0x31 0x3e
+# CHECK: memh(r17+#102) -= r21
+0xd5 0xd9 0x31 0x3e
+# CHECK: memh(r17+#102) &= r21
+0xf5 0xd9 0x31 0x3e
+# CHECK: memh(r17+#102) |= r21
+0x95 0xd9 0x31 0x3f
+# CHECK: memh(r17+#102) += #21
+0xb5 0xd9 0x31 0x3f
+# CHECK: memh(r17+#102) -= #21
+0xd5 0xd9 0x31 0x3f
+# CHECK: memh(r17+#102) = clrbit(#21)
+0xf5 0xd9 0x31 0x3f
+# CHECK: memh(r17+#102) = setbit(#21)
+0x95 0xd9 0x51 0x3e
+# CHECK: memw(r17+#204) += r21
+0xb5 0xd9 0x51 0x3e
+# CHECK: memw(r17+#204) -= r21
+0xd5 0xd9 0x51 0x3e
+# CHECK: memw(r17+#204) &= r21
+0xf5 0xd9 0x51 0x3e
+# CHECK: memw(r17+#204) |= r21
+0x95 0xd9 0x51 0x3f
+# CHECK: memw(r17+#204) += #21
+0xb5 0xd9 0x51 0x3f
+# CHECK: memw(r17+#204) -= #21
+0xd5 0xd9 0x51 0x3f
+# CHECK: memw(r17+#204) = clrbit(#21)
+0xf5 0xd9 0x51 0x3f
+# CHECK: memw(r17+#204) = setbit(#21)
diff --git a/test/MC/Disassembler/Hexagon/nv_j.txt b/test/MC/Disassembler/Hexagon/nv_j.txt
new file mode 100644
index 000000000000..e5cee4d44384
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/nv_j.txt
@@ -0,0 +1,134 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x20
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.eq(r2.new, r21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x20
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.eq(r2.new, r21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x20
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.eq(r2.new, r21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x20
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.eq(r2.new, r21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x82 0x20
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gt(r2.new, r21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x82 0x20
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gt(r2.new, r21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0xc2 0x20
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gt(r2.new, r21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0xc2 0x20
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gt(r2.new, r21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x21
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gtu(r2.new, r21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x21
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gtu(r2.new, r21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x21
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gtu(r2.new, r21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x21
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gtu(r2.new, r21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x82 0x21
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gt(r21, r2.new)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x82 0x21
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gt(r21, r2.new)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0xc2 0x21
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gt(r21, r2.new)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0xc2 0x21
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gt(r21, r2.new)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x22
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gtu(r21, r2.new)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x22
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gtu(r21, r2.new)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x22
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gtu(r21, r2.new)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x22
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gtu(r21, r2.new)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x24
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.eq(r2.new, #21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x24
+# CHECK: r17 = r17
+# CHECK-NETX: if (cmp.eq(r2.new, #21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x24
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.eq(r2.new, #21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x24
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.eq(r2.new, #21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x82 0x24
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gt(r2.new, #21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x82 0x24
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gt(r2.new, #21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0xc2 0x24
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gt(r2.new, #21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0xc2 0x24
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gt(r2.new, #21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x25
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gtu(r2.new, #21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x25
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gtu(r2.new, #21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x25
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gtu(r2.new, #21)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x25
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gtu(r2.new, #21)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xc0 0x82 0x25
+# CHECK: r17 = r17
+# CHECK-NEXT: if (tstbit(r2.new, #0)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xe0 0x82 0x25
+# CHECK: r17 = r17
+# CHECK-NEXT: if (tstbit(r2.new, #0)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xc0 0xc2 0x25
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!tstbit(r2.new, #0)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xe0 0xc2 0x25
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!tstbit(r2.new, #0)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xc0 0x02 0x26
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.eq(r2.new, #-1)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xe0 0x02 0x26
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.eq(r2.new, #-1)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xc0 0x42 0x26
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.eq(r2.new, #-1)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xe0 0x42 0x26
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.eq(r2.new, #-1)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xc0 0x82 0x26
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gt(r2.new, #-1)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xe0 0x82 0x26
+# CHECK: r17 = r17
+# CHECK-NEXT: if (cmp.gt(r2.new, #-1)) jump:t
+0x11 0x40 0x71 0x70 0x92 0xc0 0xc2 0x26
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gt(r2.new, #-1)) jump:nt
+0x11 0x40 0x71 0x70 0x92 0xe0 0xc2 0x26
+# CHECK: r17 = r17
+# CHECK-NEXT: if (!cmp.gt(r2.new, #-1)) jump:t
diff --git a/test/MC/Disassembler/Hexagon/nv_st.txt b/test/MC/Disassembler/Hexagon/nv_st.txt
new file mode 100644
index 000000000000..830570987340
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/nv_st.txt
@@ -0,0 +1,166 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x1f 0x40 0x7f 0x70 0x82 0xf5 0xb1 0x3b
+# CHECK: r31 = r31
+# CHECK-NEXT: memb(r17 + r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0x15 0xc2 0xb1 0xa1
+# CHECK: r31 = r31
+# CHECK-NEXT: memb(r17+#21) = r2.new
+0x1f 0x40 0x7f 0x70 0x28 0xc2 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: memb(r17++#5) = r2.new
+0x1f 0x40 0x7f 0x70 0x00 0xe2 0xb1 0xad
+# CHECK: r31 = r31
+# CHECK-NEXT: memb(r17++m1) = r2.new
+0x1f 0x40 0x7f 0x70 0xe2 0xf5 0xb1 0x34
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memb(r17+r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0xe2 0xf5 0xb1 0x35
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memb(r17+r21<<#3) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xe2 0xf5 0xb1 0x36
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memb(r17+r21<<#3) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xe2 0xf5 0xb1 0x37
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memb(r17+r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0xab 0xc2 0xb1 0x40
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memb(r17+#21) = r2.new
+0x1f 0x40 0x7f 0x70 0xab 0xc2 0xb1 0x44
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memb(r17+#21) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xc2 0xb1 0x42
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memb(r17+#21) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xc2 0xb1 0x46
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memb(r17+#21) = r2.new
+0x1f 0x40 0x7f 0x70 0x2b 0xe2 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memb(r17++#5) = r2.new
+0x1f 0x40 0x7f 0x70 0x2f 0xe2 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memb(r17++#5) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xe2 0xb1 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memb(r17++#5) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xaf 0xe2 0xb1 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memb(r17++#5) = r2.new
+
+0x1f 0x40 0x7f 0x70 0x8a 0xf5 0xb1 0x3b
+# CHECK: r31 = r31
+# CHECK-NEXT: memh(r17 + r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0x15 0xca 0xb1 0xa1
+# CHECK: r31 = r31
+# CHECK-NEXT: memh(r17+#42) = r2.new
+0x1f 0x40 0x7f 0x70 0x28 0xca 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: memh(r17++#10) = r2.new
+0x1f 0x40 0x7f 0x70 0x00 0xea 0xb1 0xad
+# CHECK: r31 = r31
+# CHECK-NEXT: memh(r17++m1) = r2.new
+0x1f 0x40 0x7f 0x70 0xea 0xf5 0xb1 0x34
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memh(r17+r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0xea 0xf5 0xb1 0x35
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memh(r17+r21<<#3) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xea 0xf5 0xb1 0x36
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memh(r17+r21<<#3) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xea 0xf5 0xb1 0x37
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memh(r17+r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0xab 0xca 0xb1 0x40
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memh(r17+#42) = r2.new
+0x1f 0x40 0x7f 0x70 0xab 0xca 0xb1 0x44
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memh(r17+#42) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xca 0xb1 0x42
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memh(r17+#42) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xca 0xb1 0x46
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memh(r17+#42) = r2.new
+0x1f 0x40 0x7f 0x70 0x2b 0xea 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memh(r17++#10) = r2.new
+0x1f 0x40 0x7f 0x70 0x2f 0xea 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memh(r17++#10) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xea 0xb1 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memh(r17++#10) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xaf 0xea 0xb1 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memh(r17++#10) = r2.new
+
+0x1f 0x40 0x7f 0x70 0x92 0xf5 0xb1 0x3b
+# CHECK: r31 = r31
+# CHECK-NEXT: memw(r17 + r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0x15 0xd2 0xb1 0xa1
+# CHECK: r31 = r31
+# CHECK-NEXT: memw(r17+#84) = r2.new
+0x1f 0x40 0x7f 0x70 0x28 0xd2 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: memw(r17++#20) = r2.new
+0x1f 0x40 0x7f 0x70 0x00 0xf2 0xb1 0xad
+# CHECK: r31 = r31
+# CHECK-NEXT: memw(r17++m1) = r2.new
+0x1f 0x40 0x7f 0x70 0xf2 0xf5 0xb1 0x34
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memw(r17+r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0xf2 0xf5 0xb1 0x35
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memw(r17+r21<<#3) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xf2 0xf5 0xb1 0x36
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memw(r17+r21<<#3) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xf2 0xf5 0xb1 0x37
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memw(r17+r21<<#3) = r2.new
+0x1f 0x40 0x7f 0x70 0xab 0xd2 0xb1 0x40
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memw(r17+#84) = r2.new
+0x1f 0x40 0x7f 0x70 0xab 0xd2 0xb1 0x44
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memw(r17+#84) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xd2 0xb1 0x42
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memw(r17+#84) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xd2 0xb1 0x46
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memw(r17+#84) = r2.new
+0x1f 0x40 0x7f 0x70 0x2b 0xf2 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: if (p3) memw(r17++#20) = r2.new
+0x1f 0x40 0x7f 0x70 0x2f 0xf2 0xb1 0xab
+# CHECK: r31 = r31
+# CHECK-NEXT: if (!p3) memw(r17++#20) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xab 0xf2 0xb1 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (p3.new) memw(r17++#20) = r2.new
+0x03 0x40 0x45 0x85 0x1f 0x40 0x7f 0x70 0xaf 0xf2 0xb1 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: r31 = r31
+# CHECK-NEXT: if (!p3.new) memw(r17++#20) = r2.new
diff --git a/test/MC/Disassembler/Hexagon/st.txt b/test/MC/Disassembler/Hexagon/st.txt
new file mode 100644
index 000000000000..4d1a491b344a
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/st.txt
@@ -0,0 +1,274 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x9e 0xf5 0xd1 0x3b
+# CHECK: memd(r17 + r21<<#3) = r31:30
+0x28 0xd4 0xc0 0x48
+# CHECK: memd(##320) = r21:20
+0x15 0xd4 0xd1 0xa1
+# CHECK: memd(r17+#168) = r21:20
+0x02 0xf4 0xd1 0xa9
+# CHECK: memd(r17 ++ I:circ(m1)) = r21:20
+0x28 0xf4 0xd1 0xa9
+# CHECK: memd(r17 ++ #40:circ(m1)) = r21:20
+0x28 0xd4 0xd1 0xab
+# CHECK: memd(r17++#40) = r21:20
+0x00 0xf4 0xd1 0xad
+# CHECK: memd(r17++m1) = r21:20
+0x00 0xf4 0xd1 0xaf
+# CHECK: memd(r17 ++ m1:brev) = r21:20
+0xfe 0xf5 0xd1 0x34
+# CHECK: if (p3) memd(r17+r21<<#3) = r31:30
+0xfe 0xf5 0xd1 0x35
+# CHECK: if (!p3) memd(r17+r21<<#3) = r31:30
+0x03 0x40 0x45 0x85 0xfe 0xf5 0xd1 0x36
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memd(r17+r21<<#3) = r31:30
+0x03 0x40 0x45 0x85 0xfe 0xf5 0xd1 0x37
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memd(r17+r21<<#3) = r31:30
+0xab 0xde 0xd1 0x40
+# CHECK: if (p3) memd(r17+#168) = r31:30
+0xab 0xde 0xd1 0x44
+# CHECK: if (!p3) memd(r17+#168) = r31:30
+0x03 0x40 0x45 0x85 0xab 0xde 0xd1 0x42
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memd(r17+#168) = r31:30
+0x03 0x40 0x45 0x85 0xab 0xde 0xd1 0x46
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memd(r17+#168) = r31:30
+0x2b 0xf4 0xd1 0xab
+# CHECK: if (p3) memd(r17++#40) = r21:20
+0x2f 0xf4 0xd1 0xab
+# CHECK: if (!p3) memd(r17++#40) = r21:20
+0x03 0x40 0x45 0x85 0xab 0xf4 0xd1 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memd(r17++#40) = r21:20
+0x03 0x40 0x45 0x85 0xaf 0xf4 0xd1 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memd(r17++#40) = r21:20
+
+0x9f 0xf5 0x11 0x3b
+# CHECK: memb(r17 + r21<<#3) = r31
+0x9f 0xca 0x11 0x3c
+# CHECK: memb(r17+#21)=#31
+0x15 0xd5 0x00 0x48
+# CHECK: memb(##21) = r21
+0x15 0xd5 0x11 0xa1
+# CHECK: memb(r17+#21) = r21
+0x02 0xf5 0x11 0xa9
+# CHECK: memb(r17 ++ I:circ(m1)) = r21
+0x28 0xf5 0x11 0xa9
+# CHECK: memb(r17 ++ #5:circ(m1)) = r21
+0x28 0xd5 0x11 0xab
+# CHECK: memb(r17++#5) = r21
+0x00 0xf5 0x11 0xad
+# CHECK: memb(r17++m1) = r21
+0x00 0xf5 0x11 0xaf
+# CHECK: memb(r17 ++ m1:brev) = r21
+0xff 0xf5 0x11 0x34
+# CHECK: if (p3) memb(r17+r21<<#3) = r31
+0xff 0xf5 0x11 0x35
+# CHECK: if (!p3) memb(r17+r21<<#3) = r31
+0x03 0x40 0x45 0x85 0xff 0xf5 0x11 0x36
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memb(r17+r21<<#3) = r31
+0x03 0x40 0x45 0x85 0xff 0xf5 0x11 0x37
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memb(r17+r21<<#3) = r31
+0xff 0xca 0x11 0x38
+# CHECK: if (p3) memb(r17+#21)=#31
+0xff 0xca 0x91 0x38
+# CHECK: if (!p3) memb(r17+#21)=#31
+0x03 0x40 0x45 0x85 0xff 0xca 0x11 0x39
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memb(r17+#21)=#31
+0x03 0x40 0x45 0x85 0xff 0xca 0x91 0x39
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memb(r17+#21)=#31
+0xab 0xdf 0x11 0x40
+# CHECK: if (p3) memb(r17+#21) = r31
+0xab 0xdf 0x11 0x44
+# CHECK: if (!p3) memb(r17+#21) = r31
+0x03 0x40 0x45 0x85 0xab 0xdf 0x11 0x42
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memb(r17+#21) = r31
+0x03 0x40 0x45 0x85 0xab 0xdf 0x11 0x46
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memb(r17+#21) = r31
+0x2b 0xf5 0x11 0xab
+# CHECK: if (p3) memb(r17++#5) = r21
+0x2f 0xf5 0x11 0xab
+# CHECK: if (!p3) memb(r17++#5) = r21
+0x03 0x40 0x45 0x85 0xab 0xf5 0x11 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memb(r17++#5) = r21
+0x03 0x40 0x45 0x85 0xaf 0xf5 0x11 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memb(r17++#5) = r21
+
+0x9f 0xf5 0x51 0x3b
+# CHECK: memh(r17 + r21<<#3) = r31
+0x9f 0xf5 0x71 0x3b
+# CHECK: memh(r17 + r21<<#3) = r31.h
+0x95 0xcf 0x31 0x3c
+# CHECK: memh(r17+#62)=#21
+0x2a 0xd5 0x40 0x48
+# CHECK: memh(##84) = r21
+0x2a 0xd5 0x60 0x48
+# CHECK: memh(##84) = r21.h
+0x15 0xdf 0x51 0xa1
+# CHECK: memh(r17+#42) = r31
+0x15 0xdf 0x71 0xa1
+# CHECK: memh(r17+#42) = r31.h
+0x02 0xf5 0x51 0xa9
+# CHECK: memh(r17 ++ I:circ(m1)) = r21
+0x28 0xf5 0x51 0xa9
+# CHECK: memh(r17 ++ #10:circ(m1)) = r21
+0x02 0xf5 0x71 0xa9
+# CHECK: memh(r17 ++ I:circ(m1)) = r21.h
+0x28 0xf5 0x71 0xa9
+# CHECK: memh(r17 ++ #10:circ(m1)) = r21.h
+0x28 0xd5 0x51 0xab
+# CHECK: memh(r17++#10) = r21
+0x28 0xd5 0x71 0xab
+# CHECK: memh(r17++#10) = r21.h
+0x00 0xf5 0x51 0xad
+# CHECK: memh(r17++m1) = r21
+0x00 0xf5 0x71 0xad
+# CHECK: memh(r17++m1) = r21.h
+0x00 0xf5 0x51 0xaf
+# CHECK: memh(r17 ++ m1:brev) = r21
+0x00 0xf5 0x71 0xaf
+# CHECK: memh(r17 ++ m1:brev) = r21.h
+0xff 0xf5 0x51 0x34
+# CHECK: if (p3) memh(r17+r21<<#3) = r31
+0xff 0xf5 0x71 0x34
+# CHECK: if (p3) memh(r17+r21<<#3) = r31.h
+0xff 0xf5 0x51 0x35
+# CHECK: if (!p3) memh(r17+r21<<#3) = r31
+0xff 0xf5 0x71 0x35
+# CHECK: if (!p3) memh(r17+r21<<#3) = r31.h
+0x03 0x40 0x45 0x85 0xff 0xf5 0x51 0x36
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memh(r17+r21<<#3) = r31
+0x03 0x40 0x45 0x85 0xff 0xf5 0x71 0x36
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memh(r17+r21<<#3) = r31.h
+0x03 0x40 0x45 0x85 0xff 0xf5 0x51 0x37
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memh(r17+r21<<#3) = r31
+0x03 0x40 0x45 0x85 0xff 0xf5 0x71 0x37
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memh(r17+r21<<#3) = r31.h
+0xf5 0xcf 0x31 0x38
+# CHECK: if (p3) memh(r17+#62)=#21
+0xf5 0xcf 0xb1 0x38
+# CHECK: if (!p3) memh(r17+#62)=#21
+0x03 0x40 0x45 0x85 0xf5 0xcf 0x31 0x39
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memh(r17+#62)=#21
+0x03 0x40 0x45 0x85 0xf5 0xcf 0xb1 0x39
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memh(r17+#62)=#21
+0xfb 0xd5 0x51 0x40
+# CHECK: if (p3) memh(r17+#62) = r21
+0xfb 0xd5 0x71 0x40
+# CHECK: if (p3) memh(r17+#62) = r21.h
+0xfb 0xd5 0x51 0x44
+# CHECK: if (!p3) memh(r17+#62) = r21
+0xfb 0xd5 0x71 0x44
+# CHECK: if (!p3) memh(r17+#62) = r21.h
+0x03 0x40 0x45 0x85 0xfb 0xd5 0x51 0x42
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memh(r17+#62) = r21
+0x03 0x40 0x45 0x85 0xfb 0xd5 0x71 0x42
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memh(r17+#62) = r21.h
+0x03 0x40 0x45 0x85 0xfb 0xd5 0x51 0x46
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memh(r17+#62) = r21
+0x03 0x40 0x45 0x85 0xfb 0xd5 0x71 0x46
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memh(r17+#62) = r21.h
+0x2b 0xf5 0x51 0xab
+# CHECK: if (p3) memh(r17++#10) = r21
+0x2f 0xf5 0x51 0xab
+# CHECK: if (!p3) memh(r17++#10) = r21
+0x03 0x40 0x45 0x85 0xab 0xf5 0x51 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memh(r17++#10) = r21
+0x03 0x40 0x45 0x85 0xaf 0xf5 0x51 0xab 
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memh(r17++#10) = r21
+0x2b 0xf5 0x71 0xab
+# CHECK: if (p3) memh(r17++#10) = r21.h
+0x2f 0xf5 0x71 0xab
+# CHECK: if (!p3) memh(r17++#10) = r21.h
+0x03 0x40 0x45 0x85 0xab 0xf5 0x71 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memh(r17++#10) = r21.h
+0x03 0x40 0x45 0x85 0xaf 0xf5 0x71 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memh(r17++#10) = r21.h
+
+0x9f 0xf5 0x91 0x3b
+# CHECK: memw(r17 + r21<<#3) = r31
+0x9f 0xca 0x51 0x3c
+# CHECK: memw(r17+#84)=#31
+0x15 0xdf 0x91 0xa1
+# CHECK: memw(r17+#84) = r31
+0x14 0xd5 0x80 0x48
+# CHECK: memw(##80) = r21
+0x02 0xf5 0x91 0xa9
+# CHECK: memw(r17 ++ I:circ(m1)) = r21
+0x28 0xf5 0x91 0xa9
+# CHECK: memw(r17 ++ #20:circ(m1)) = r21
+0x28 0xd5 0x91 0xab
+# CHECK: memw(r17++#20) = r21
+0x00 0xf5 0x91 0xad
+# CHECK: memw(r17++m1) = r21
+0x00 0xf5 0x91 0xaf
+# CHECK: memw(r17 ++ m1:brev) = r21
+0xff 0xf5 0x91 0x34
+# CHECK: if (p3) memw(r17+r21<<#3) = r31
+0xff 0xf5 0x91 0x35
+# CHECK: if (!p3) memw(r17+r21<<#3) = r31
+0x03 0x40 0x45 0x85 0xff 0xf5 0x91 0x36
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memw(r17+r21<<#3) = r31
+0x03 0x40 0x45 0x85 0xff 0xf5 0x91 0x37
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memw(r17+r21<<#3) = r31
+0xff 0xca 0x51 0x38
+# CHECK: if (p3) memw(r17+#84)=#31
+0xff 0xca 0xd1 0x38
+# CHECK: if (!p3) memw(r17+#84)=#31
+0x03 0x40 0x45 0x85 0xff 0xca 0x51 0x39
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memw(r17+#84)=#31
+0x03 0x40 0x45 0x85 0xff 0xca 0xd1 0x39
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memw(r17+#84)=#31
+0xab 0xdf 0x91 0x40
+# CHECK: if (p3) memw(r17+#84) = r31
+0xab 0xdf 0x91 0x44 
+# CHECK: if (!p3) memw(r17+#84) = r31
+0x03 0x40 0x45 0x85 0xab 0xdf 0x91 0x42
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memw(r17+#84) = r31
+0x03 0x40 0x45 0x85 0xab 0xdf 0x91 0x46
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memw(r17+#84) = r31
+0x2b 0xf5 0x91 0xab
+# CHECK: if (p3) memw(r17++#20) = r21
+0x2f 0xf5 0x91 0xab
+# CHECK: if (!p3) memw(r17++#20) = r21
+0x03 0x40 0x45 0x85 0xaf 0xf5 0x91 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) memw(r17++#20) = r21
+0x03 0x40 0x45 0x85 0xab 0xf5 0x91 0xab
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) memw(r17++#20) = r21
+
+0x1f 0xc0 0x9d 0xa0
+# CHECK: allocframe(#248)
\ No newline at end of file
diff --git a/test/MC/Disassembler/Hexagon/system_user.txt b/test/MC/Disassembler/Hexagon/system_user.txt
new file mode 100644
index 000000000000..51d082a9e180
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/system_user.txt
@@ -0,0 +1,12 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x11 0xc0 0x15 0x92
+# CHECK: r17 = memw_locked(r21)
+0x10 0xd0 0x15 0x92
+# CHECK: r17:16 = memd_locked(r21)
+0x00 0xc0 0x00 0xa8
+# CHECK: barrier
+0x15 0xc0 0x11 0x94
+# CHECK: dcfetch(r17 + #168)
+0x00 0xc0 0x51 0x62
+# CHECK: trace(r17)
diff --git a/test/MC/Disassembler/Hexagon/xtype_alu.txt b/test/MC/Disassembler/Hexagon/xtype_alu.txt
new file mode 100644
index 000000000000..d39260c63228
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/xtype_alu.txt
@@ -0,0 +1,164 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0xd0 0xc0 0x94 0x80
+# CHECK: r17:16 = abs(r21:20)
+0x91 0xc0 0x95 0x8c
+# CHECK: r17 = abs(r21)
+0xb1 0xc0 0x95 0x8c
+# CHECK: r17 = abs(r21):sat
+0xff 0xd1 0x35 0xdb
+# CHECK: r17 = add(r21, add(r31, #23))
+0xff 0xd1 0xb5 0xdb
+# CHECK: r17 = add(r21, sub(#23, r31))
+0xf1 0xc2 0x15 0xe2
+# CHECK: r17 += add(r21, #23)
+0xf1 0xc2 0x95 0xe2
+# CHECK: r17 -= add(r21, #23)
+0x31 0xdf 0x15 0xef
+# CHECK: r17 += add(r21, r31)
+0x31 0xdf 0x95 0xef
+# CHECK: r17 -= add(r21, r31)
+0xf0 0xde 0x14 0xd3
+# CHECK: r17:16 = add(r21:20, r31:30)
+0x11 0xd5 0x1f 0xd5
+# CHECK: r17 = add(r21.l, r31.l)
+0x51 0xd5 0x1f 0xd5
+# CHECK: r17 = add(r21.l, r31.h)
+0x91 0xd5 0x1f 0xd5
+# CHECK: r17 = add(r21.l, r31.l):sat
+0xd1 0xd5 0x1f 0xd5
+# CHECK: r17 = add(r21.l, r31.h):sat
+0x11 0xd5 0x5f 0xd5
+# CHECK: r17 = add(r21.l, r31.l):<<16
+0x31 0xd5 0x5f 0xd5
+# CHECK: r17 = add(r21.l, r31.h):<<16
+0x51 0xd5 0x5f 0xd5
+# CHECK: r17 = add(r21.h, r31.l):<<16
+0x71 0xd5 0x5f 0xd5
+# CHECK: r17 = add(r21.h, r31.h):<<16
+0x91 0xd5 0x5f 0xd5
+# CHECK: r17 = add(r21.l, r31.l):sat:<<16
+0xb1 0xd5 0x5f 0xd5
+# CHECK: r17 = add(r21.l, r31.h):sat:<<16
+0xd1 0xd5 0x5f 0xd5
+# CHECK: r17 = add(r21.h, r31.l):sat:<<16
+0xf1 0xd5 0x5f 0xd5
+# CHECK: r17 = add(r21.h, r31.h):sat:<<16
+0x70 0xde 0xd4 0xc2
+# CHECK: r17:16 = add(r21:20, r31:30, p3):carry
+0x70 0xde 0xf4 0xc2
+# CHECK: r17:16 = sub(r21:20, r31:30, p3):carry
+0x90 0xc0 0x94 0x80
+# CHECK: r17:16 = not(r21:20)
+0xf0 0xde 0x14 0xd3
+# CHECK: r17:16 = add(r21:20, r31:30)
+0xb0 0xde 0x74 0xd3
+# CHECK: r17:16 = add(r21:20, r31:30):sat
+0xd0 0xde 0x74 0xd3
+# CHECK: r17:16 = add(r21:20, r31:30):raw:lo
+0xf0 0xde 0x74 0xd3
+# CHECK: r17:16 = add(r21:20, r31:30):raw:hi
+0x10 0xde 0xf4 0xd3
+# CHECK: r17:16 = and(r21:20, r31:30)
+0x30 0xd4 0xfe 0xd3
+# CHECK: r17:16 = and(r21:20, ~r31:30)
+0x50 0xde 0xf4 0xd3
+# CHECK: r17:16 = or(r21:20, r31:30)
+0x70 0xd4 0xfe 0xd3
+# CHECK: r17:16 = or(r21:20, ~r31:30)
+0x10 0xde 0x94 0xca
+# CHECK: r17:16 ^= xor(r21:20, r31:30)
+0xf1 0xc3 0x15 0xda
+# CHECK: r17 |= and(r21, #31)
+0xf5 0xc3 0x51 0xda
+# CHECK: r17 = or(r21, and(r17, #31))
+0xf1 0xc3 0x95 0xda
+# CHECK: r17 |= or(r21, #31)
+0x11 0xdf 0x35 0xef
+# CHECK: r17 |= and(r21, ~r31)
+0x31 0xdf 0x35 0xef
+# CHECK: r17 &= and(r21, ~r31)
+0x51 0xdf 0x35 0xef
+# CHECK: r17 ^= and(r21, ~r31)
+0x11 0xdf 0x55 0xef
+# CHECK: r17 &= and(r21, r31)
+0x31 0xdf 0x55 0xef
+# CHECK: r17 &= or(r21, r31)
+0x51 0xdf 0x55 0xef
+# CHECK: r17 &= xor(r21, r31)
+0x71 0xdf 0x55 0xef
+# CHECK: r17 |= and(r21, r31)
+0x71 0xdf 0x95 0xef
+# CHECK: r17 ^= xor(r21, r31)
+0x11 0xdf 0xd5 0xef
+# CHECK: r17 |= or(r21, r31)
+0x31 0xdf 0xd5 0xef
+# CHECK: r17 |= xor(r21, r31)
+0x51 0xdf 0xd5 0xef
+# CHECK: r17 ^= and(r21, r31)
+0x71 0xdf 0xd5 0xef
+# CHECK: r17 ^= or(r21, r31)
+0x11 0xdf 0xd5 0xd5
+# CHECK: r17 = max(r21, r31)
+0x91 0xdf 0xd5 0xd5
+# CHECK: r17 = maxu(r21, r31)
+0x90 0xde 0xd4 0xd3
+# CHECK: r17:16 = max(r21:20, r31:30)
+0xb0 0xde 0xd4 0xd3
+# CHECK: r17:16 = maxu(r21:20, r31:30)
+0x11 0xd5 0xbf 0xd5
+# CHECK: r17 = min(r21, r31)
+0x91 0xd5 0xbf 0xd5
+# CHECK: r17 = minu(r21, r31)
+0xd0 0xd4 0xbe 0xd3
+# CHECK: r17:16 = min(r21:20, r31:30)
+0xf0 0xd4 0xbe 0xd3
+# CHECK: r17:16 = minu(r21:20, r31:30)
+0xf1 0xdf 0xf5 0xd3
+# CHECK: r17 = modwrap(r21, r31)
+0xb0 0xc0 0x94 0x80
+# CHECK: r17:16 = neg(r21:20)
+0xd1 0xc0 0x95 0x8c
+# CHECK: r17 = neg(r21):sat
+0x11 0xdf 0xf5 0x8c
+# CHECK: r17 = cround(r21, #31)
+0x91 0xdf 0xf5 0x8c
+# CHECK: r17 = round(r21, #31)
+0xd1 0xdf 0xf5 0x8c
+# CHECK: r17 = round(r21, #31):sat
+0x11 0xdf 0xd5 0xc6
+# CHECK: r17 = cround(r21, r31)
+0x91 0xdf 0xd5 0xc6
+# CHECK: r17 = round(r21, r31)
+0xd1 0xdf 0xd5 0xc6
+# CHECK: r17 = round(r21, r31):sat
+0x71 0xd5 0x1f 0xef
+# CHECK: r17 += sub(r21, r31)
+0x11 0xd5 0x3f 0xd5
+# CHECK: r17 = sub(r21.l, r31.l)
+0x51 0xd5 0x3f 0xd5
+# CHECK: r17 = sub(r21.l, r31.h)
+0x91 0xd5 0x3f 0xd5
+# CHECK: r17 = sub(r21.l, r31.l):sat
+0xd1 0xd5 0x3f 0xd5
+# CHECK: r17 = sub(r21.l, r31.h):sat
+0x11 0xd5 0x7f 0xd5
+# CHECK: r17 = sub(r21.l, r31.l):<<16
+0x31 0xd5 0x7f 0xd5
+# CHECK: r17 = sub(r21.l, r31.h):<<16
+0x51 0xd5 0x7f 0xd5
+# CHECK: r17 = sub(r21.h, r31.l):<<16
+0x71 0xd5 0x7f 0xd5
+# CHECK: r17 = sub(r21.h, r31.h):<<16
+0x91 0xd5 0x7f 0xd5
+# CHECK: r17 = sub(r21.l, r31.l):sat:<<16
+0xb1 0xd5 0x7f 0xd5
+# CHECK: r17 = sub(r21.l, r31.h):sat:<<16
+0xd1 0xd5 0x7f 0xd5
+# CHECK: r17 = sub(r21.h, r31.l):sat:<<16
+0xf1 0xd5 0x7f 0xd5
+# CHECK: r17 = sub(r21.h, r31.h):sat:<<16
+0x10 0xc0 0x55 0x84
+# CHECK: r17:16 = sxtw(r21)
+0x90 0xde 0xf4 0xd3
+# CHECK: r17:16 = xor(r21:20, r31:30)
diff --git a/test/MC/Disassembler/Hexagon/xtype_bit.txt b/test/MC/Disassembler/Hexagon/xtype_bit.txt
new file mode 100644
index 000000000000..d1ec38e02183
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/xtype_bit.txt
@@ -0,0 +1,92 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x11 0xc0 0x54 0x88
+# CHECK: r17 = clb(r21:20)
+0x51 0xc0 0x54 0x88
+# CHECK: r17 = cl0(r21:20)
+0x91 0xc0 0x54 0x88
+# CHECK: r17 = cl1(r21:20)
+0x11 0xc0 0x74 0x88
+# CHECK: r17 = normamt(r21:20)
+0x51 0xd7 0x74 0x88
+# CHECK: r17 = add(clb(r21:20), #23)
+0x11 0xd7 0x35 0x8c
+# CHECK: r17 = add(clb(r21), #23)
+0x91 0xc0 0x15 0x8c
+# CHECK: r17 = clb(r21)
+0xb1 0xc0 0x15 0x8c
+# CHECK: r17 = cl0(r21)
+0xd1 0xc0 0x15 0x8c
+# CHECK: r17 = cl1(r21)
+0xf1 0xc0 0x15 0x8c
+# CHECK: r17 = normamt(r21)
+0x71 0xc0 0x74 0x88
+# CHECK: r17 = popcount(r21:20)
+0x51 0xc0 0xf4 0x88
+# CHECK: r17 = ct0(r21:20)
+0x91 0xc0 0xf4 0x88
+# CHECK: r17 = ct1(r21:20)
+0x91 0xc0 0x55 0x8c
+# CHECK: r17 = ct0(r21)
+0xb1 0xc0 0x55 0x8c
+# CHECK: r17 = ct1(r21)
+0xf0 0xdf 0x54 0x81
+# CHECK: r17:16 = extractu(r21:20, #31, #23)
+0xf0 0xdf 0x54 0x8a
+# CHECK: r17:16 = extract(r21:20, #31, #23)
+0xf1 0xdf 0x55 0x8d
+# CHECK: r17 = extractu(r21, #31, #23)
+0xf1 0xdf 0xd5 0x8d
+# CHECK: r17 = extract(r21, #31, #23)
+0x10 0xde 0x14 0xc1
+# CHECK: r17:16 = extractu(r21:20, r31:30)
+0x90 0xde 0xd4 0xc1
+# CHECK: r17:16 = extract(r21:20, r31:30)
+0x11 0xde 0x15 0xc9
+# CHECK: r17 = extractu(r21, r31:30)
+0x51 0xde 0x15 0xc9
+# CHECK: r17 = extract(r21, r31:30)
+0xf0 0xdf 0x54 0x83
+# CHECK: r17:16 = insert(r21:20, #31, #23)
+0xf1 0xdf 0x55 0x8f
+# CHECK: r17 = insert(r21, #31, #23)
+0x11 0xde 0x15 0xc8
+# CHECK: r17 = insert(r21, r31:30)
+0x10 0xde 0x14 0xca
+# CHECK: r17:16 = insert(r21:20, r31:30)
+0x90 0xc0 0xd4 0x80
+# CHECK: r17:16 = deinterleave(r21:20)
+0xb0 0xc0 0xd4 0x80
+# CHECK: r17:16 = interleave(r21:20)
+0xd0 0xde 0x94 0xc1
+# CHECK: r17:16 = lfs(r21:20, r31:30)
+0x11 0xde 0x14 0xd0
+# CHECK: r17 = parity(r21:20, r31:30)
+0x11 0xdf 0xf5 0xd5
+# CHECK: r17 = parity(r21, r31)
+0xd0 0xc0 0xd4 0x80
+# CHECK: r17:16 = brev(r21:20)
+0x11 0xdf 0xd5 0x8c
+# CHECK: r17 = setbit(r21, #31)
+0x31 0xdf 0xd5 0x8c
+# CHECK: r17 = clrbit(r21, #31)
+0x51 0xdf 0xd5 0x8c
+# CHECK: r17 = togglebit(r21, #31)
+0x11 0xdf 0x95 0xc6
+# CHECK: r17 = setbit(r21, r31)
+0x51 0xdf 0x95 0xc6
+# CHECK: r17 = clrbit(r21, r31)
+0x91 0xdf 0x95 0xc6
+# CHECK: r17 = togglebit(r21, r31)
+0x90 0xdf 0xd5 0x88
+# CHECK: r17:16 = bitsplit(r21, #31)
+0x10 0xdf 0x35 0xd4
+# CHECK: r17:16 = bitsplit(r21, r31)
+0xf1 0xcd 0x15 0x87
+# CHECK: r17 = tableidxb(r21, #7, #13):raw
+0xf1 0xcd 0x55 0x87
+# CHECK: r17 = tableidxh(r21, #7, #13):raw
+0xf1 0xcd 0x95 0x87
+# CHECK: r17 = tableidxw(r21, #7, #13):raw
+0xf1 0xcd 0xd5 0x87
+# CHECK: r17 = tableidxd(r21, #7, #13):raw
diff --git a/test/MC/Disassembler/Hexagon/xtype_fp.txt b/test/MC/Disassembler/Hexagon/xtype_fp.txt
new file mode 100644
index 000000000000..97c072730bd4
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/xtype_fp.txt
@@ -0,0 +1,110 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x11 0xdf 0x15 0xeb
+# CHECK: r17 = sfadd(r21, r31)
+0x03 0xd5 0xf1 0x85
+# CHECK: p3 = sfclass(r17, #21)
+0xb3 0xc2 0x90 0xdc
+# CHECK: p3 = dfclass(r17:16, #21)
+0x03 0xd5 0xf1 0xc7
+# CHECK: p3 = sfcmp.ge(r17, r21)
+0x23 0xd5 0xf1 0xc7
+# CHECK: p3 = sfcmp.uo(r17, r21)
+0x63 0xd5 0xf1 0xc7
+# CHECK: p3 = sfcmp.eq(r17, r21)
+0x83 0xd5 0xf1 0xc7
+# CHECK: p3 = sfcmp.gt(r17, r21)
+0x03 0xd4 0xf0 0xd2
+# CHECK: p3 = dfcmp.eq(r17:16, r21:20)
+0x23 0xd4 0xf0 0xd2
+# CHECK: p3 = dfcmp.gt(r17:16, r21:20)
+0x43 0xd4 0xf0 0xd2
+# CHECK: p3 = dfcmp.ge(r17:16, r21:20)
+0x63 0xd4 0xf0 0xd2
+# CHECK: p3 = dfcmp.uo(r17:16, r21:20)
+0x10 0xc0 0x95 0x84
+# CHECK: r17:16 = convert_sf2df(r21)
+0x31 0xc0 0x14 0x88
+# CHECK: r17 = convert_df2sf(r21:20)
+0x50 0xc0 0xf4 0x80
+# CHECK: r17:16 = convert_ud2df(r21:20)
+0x70 0xc0 0xf4 0x80
+# CHECK: r17:16 = convert_d2df(r21:20)
+0x30 0xc0 0x95 0x84
+# CHECK: r17:16 = convert_uw2df(r21)
+0x50 0xc0 0x95 0x84
+# CHECK: r17:16 = convert_w2df(r21)
+0x31 0xc0 0x34 0x88
+# CHECK: r17 = convert_ud2sf(r21:20)
+0x31 0xc0 0x54 0x88
+# CHECK: r17 = convert_d2sf(r21:20)
+0x11 0xc0 0x35 0x8b
+# CHECK: r17 = convert_uw2sf(r21)
+0x11 0xc0 0x55 0x8b
+# CHECK: r17 = convert_w2sf(r21)
+0x10 0xc0 0xf4 0x80
+# CHECK: r17:16 = convert_df2d(r21:20)
+0x30 0xc0 0xf4 0x80
+# CHECK: r17:16 = convert_df2ud(r21:20)
+0xd0 0xc0 0xf4 0x80
+# CHECK: r17:16 = convert_df2d(r21:20):chop
+0xf0 0xc0 0xf4 0x80
+# CHECK: r17:16 = convert_df2ud(r21:20):chop
+0x70 0xc0 0x95 0x84
+# CHECK: r17:16 = convert_sf2ud(r21)
+0x90 0xc0 0x95 0x84
+# CHECK: r17:16 = convert_sf2d(r21)
+0xb0 0xc0 0x95 0x84
+# CHECK: r17:16 = convert_sf2ud(r21):chop
+0xd0 0xc0 0x95 0x84
+# CHECK: r17:16 = convert_sf2d(r21):chop
+0x31 0xc0 0x74 0x88
+# CHECK: r17 = convert_df2uw(r21:20)
+0x31 0xc0 0x94 0x88
+# CHECK: r17 = convert_df2w(r21:20)
+0x31 0xc0 0xb4 0x88
+# CHECK: r17 = convert_df2uw(r21:20):chop
+0x31 0xc0 0xf4 0x88
+# CHECK: r17 = convert_df2w(r21:20):chop
+0x11 0xc0 0x75 0x8b
+# CHECK: r17 = convert_sf2uw(r21)
+0x31 0xc0 0x75 0x8b
+# CHECK: r17 = convert_sf2uw(r21):chop
+0x11 0xc0 0x95 0x8b
+# CHECK: r17 = convert_sf2w(r21)
+0x31 0xc0 0x95 0x8b
+# CHECK: r17 = convert_sf2w(r21):chop
+0x11 0xc0 0xb5 0x8b
+# CHECK: r17 = sffixupr(r21)
+0x11 0xdf 0xd5 0xeb
+# CHECK: r17 = sffixupn(r21, r31)
+0x31 0xdf 0xd5 0xeb
+# CHECK: r17 = sffixupd(r21, r31)
+0x91 0xdf 0x15 0xef
+# CHECK: r17 += sfmpy(r21, r31)
+0xb1 0xdf 0x15 0xef
+# CHECK: r17 -= sfmpy(r21, r31)
+0xf1 0xdf 0x75 0xef
+# CHECK: r17 += sfmpy(r21, r31, p3):scale
+0xd1 0xdf 0x15 0xef
+# CHECK: r17 += sfmpy(r21, r31):lib
+0xf1 0xdf 0x15 0xef
+# CHECK: r17 -= sfmpy(r21, r31):lib
+0xb1 0xc2 0x00 0xd6
+# CHECK: r17 = sfmake(#21):pos
+0xb1 0xc2 0x40 0xd6
+# CHECK: r17 = sfmake(#21):neg
+0xb0 0xc2 0x00 0xd9
+# CHECK: r17:16 = dfmake(#21):pos
+0xb0 0xc2 0x40 0xd9
+# CHECK: r17:16 = dfmake(#21):neg
+0x11 0xdf 0x95 0xeb
+# CHECK: r17 = sfmax(r21, r31)
+0x31 0xdf 0x95 0xeb
+# CHECK: r17 = sfmin(r21, r31)
+0x11 0xdf 0x55 0xeb
+# CHECK: r17 = sfmpy(r21, r31)
+0xf1 0xdf 0xf5 0xeb
+# CHECK: r17, p3 = sfrecipa(r21, r31)
+0x31 0xdf 0x15 0xeb
+# CHECK: r17 = sfsub(r21, r31)
diff --git a/test/MC/Disassembler/Hexagon/xtype_mpy.txt b/test/MC/Disassembler/Hexagon/xtype_mpy.txt
new file mode 100644
index 000000000000..b6ccaa6f31e0
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/xtype_mpy.txt
@@ -0,0 +1,202 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0xb1 0xdf 0x35 0xd7
+# CHECK: r17 = add(#21, mpyi(r21, r31))
+0xbf 0xd1 0x35 0xd8
+# CHECK: r17 = add(#21, mpyi(r21, #31))
+0xb5 0xd1 0x3f 0xdf
+# CHECK: r17 = add(r21, mpyi(#84, r31))
+0xf5 0xf1 0xb5 0xdf
+# CHECK: r17 = add(r21, mpyi(r21, #31))
+0x15 0xd1 0x1f 0xe3
+# CHECK: r17 = add(r21, mpyi(r17, r31))
+0xf1 0xc3 0x15 0xe0
+# CHECK: r17 =+ mpyi(r21, #31)
+0xf1 0xc3 0x95 0xe0
+# CHECK: r17 =- mpyi(r21, #31)
+0xf1 0xc3 0x15 0xe1
+# CHECK: r17 += mpyi(r21, #31)
+0xf1 0xc3 0x95 0xe1
+# CHECK: r17 -= mpyi(r21, #31)
+0x11 0xdf 0x15 0xed
+# CHECK: r17 = mpyi(r21, r31)
+0x11 0xdf 0x15 0xef
+# CHECK: r17 += mpyi(r21, r31)
+0x10 0xdf 0x95 0xe4
+# CHECK: r17:16 = mpy(r21.l, r31.l):<<1
+0x30 0xdf 0x95 0xe4
+# CHECK: r17:16 = mpy(r21.l, r31.h):<<1
+0x50 0xdf 0x95 0xe4
+# CHECK: r17:16 = mpy(r21.h, r31.l):<<1
+0x70 0xdf 0x95 0xe4
+# CHECK: r17:16 = mpy(r21.h, r31.h):<<1
+0x10 0xdf 0xb5 0xe4
+# CHECK: r17:16 = mpy(r21.l, r31.l):<<1:rnd
+0x30 0xdf 0xb5 0xe4
+# CHECK: r17:16 = mpy(r21.l, r31.h):<<1:rnd
+0x50 0xdf 0xb5 0xe4
+# CHECK: r17:16 = mpy(r21.h, r31.l):<<1:rnd
+0x70 0xdf 0xb5 0xe4
+# CHECK: r17:16 = mpy(r21.h, r31.h):<<1:rnd
+0x10 0xdf 0x95 0xe6
+# CHECK: r17:16 += mpy(r21.l, r31.l):<<1
+0x30 0xdf 0x95 0xe6
+# CHECK: r17:16 += mpy(r21.l, r31.h):<<1
+0x50 0xdf 0x95 0xe6
+# CHECK: r17:16 += mpy(r21.h, r31.l):<<1
+0x70 0xdf 0x95 0xe6
+# CHECK: r17:16 += mpy(r21.h, r31.h):<<1
+0x10 0xdf 0xb5 0xe6
+# CHECK: r17:16 -= mpy(r21.l, r31.l):<<1
+0x30 0xdf 0xb5 0xe6
+# CHECK: r17:16 -= mpy(r21.l, r31.h):<<1
+0x50 0xdf 0xb5 0xe6
+# CHECK: r17:16 -= mpy(r21.h, r31.l):<<1
+0x70 0xdf 0xb5 0xe6
+# CHECK: r17:16 -= mpy(r21.h, r31.h):<<1
+0x11 0xdf 0x95 0xec
+# CHECK: r17 = mpy(r21.l, r31.l):<<1
+0x31 0xdf 0x95 0xec
+# CHECK: r17 = mpy(r21.l, r31.h):<<1
+0x51 0xdf 0x95 0xec
+# CHECK: r17 = mpy(r21.h, r31.l):<<1
+0x71 0xdf 0x95 0xec
+# CHECK: r17 = mpy(r21.h, r31.h):<<1
+0x91 0xdf 0x95 0xec
+# CHECK: r17 = mpy(r21.l, r31.l):<<1:sat
+0xb1 0xdf 0x95 0xec
+# CHECK: r17 = mpy(r21.l, r31.h):<<1:sat
+0xd1 0xdf 0x95 0xec
+# CHECK: r17 = mpy(r21.h, r31.l):<<1:sat
+0xf1 0xdf 0x95 0xec
+# CHECK: r17 = mpy(r21.h, r31.h):<<1:sat
+0x11 0xdf 0xb5 0xec
+# CHECK: r17 = mpy(r21.l, r31.l):<<1:rnd
+0x31 0xdf 0xb5 0xec
+# CHECK: r17 = mpy(r21.l, r31.h):<<1:rnd
+0x51 0xdf 0xb5 0xec
+# CHECK: r17 = mpy(r21.h, r31.l):<<1:rnd
+0x71 0xdf 0xb5 0xec
+# CHECK: r17 = mpy(r21.h, r31.h):<<1:rnd
+0x91 0xdf 0xb5 0xec
+# CHECK: r17 = mpy(r21.l, r31.l):<<1:rnd:sat
+0xb1 0xdf 0xb5 0xec
+# CHECK: r17 = mpy(r21.l, r31.h):<<1:rnd:sat
+0xd1 0xdf 0xb5 0xec
+# CHECK: r17 = mpy(r21.h, r31.l):<<1:rnd:sat
+0xf1 0xdf 0xb5 0xec
+# CHECK: r17 = mpy(r21.h, r31.h):<<1:rnd:sat
+0x11 0xdf 0x95 0xee
+# CHECK: r17 += mpy(r21.l, r31.l):<<1
+0x31 0xdf 0x95 0xee
+# CHECK: r17 += mpy(r21.l, r31.h):<<1
+0x51 0xdf 0x95 0xee
+# CHECK: r17 += mpy(r21.h, r31.l):<<1
+0x71 0xdf 0x95 0xee
+# CHECK: r17 += mpy(r21.h, r31.h):<<1
+0x91 0xdf 0x95 0xee
+# CHECK: r17 += mpy(r21.l, r31.l):<<1:sat
+0xb1 0xdf 0x95 0xee
+# CHECK: r17 += mpy(r21.l, r31.h):<<1:sat
+0xd1 0xdf 0x95 0xee
+# CHECK: r17 += mpy(r21.h, r31.l):<<1:sat
+0xf1 0xdf 0x95 0xee
+# CHECK: r17 += mpy(r21.h, r31.h):<<1:sat
+0x11 0xdf 0xb5 0xee
+# CHECK: r17 -= mpy(r21.l, r31.l):<<1
+0x31 0xdf 0xb5 0xee
+# CHECK: r17 -= mpy(r21.l, r31.h):<<1
+0x51 0xdf 0xb5 0xee
+# CHECK: r17 -= mpy(r21.h, r31.l):<<1
+0x71 0xdf 0xb5 0xee
+# CHECK: r17 -= mpy(r21.h, r31.h):<<1
+0x91 0xdf 0xb5 0xee
+# CHECK: r17 -= mpy(r21.l, r31.l):<<1:sat
+0xb1 0xdf 0xb5 0xee
+# CHECK: r17 -= mpy(r21.l, r31.h):<<1:sat
+0xd1 0xdf 0xb5 0xee
+# CHECK: r17 -= mpy(r21.h, r31.l):<<1:sat
+0xf1 0xdf 0xb5 0xee
+# CHECK: r17 -= mpy(r21.h, r31.h):<<1:sat
+0x10 0xdf 0xd5 0xe4
+# CHECK: r17:16 = mpyu(r21.l, r31.l):<<1
+0x30 0xdf 0xd5 0xe4
+# CHECK: r17:16 = mpyu(r21.l, r31.h):<<1
+0x50 0xdf 0xd5 0xe4
+# CHECK: r17:16 = mpyu(r21.h, r31.l):<<1
+0x70 0xdf 0xd5 0xe4
+# CHECK: r17:16 = mpyu(r21.h, r31.h):<<1
+0x10 0xdf 0xd5 0xe6
+# CHECK: r17:16 += mpyu(r21.l, r31.l):<<1
+0x30 0xdf 0xd5 0xe6
+# CHECK: r17:16 += mpyu(r21.l, r31.h):<<1
+0x50 0xdf 0xd5 0xe6
+# CHECK: r17:16 += mpyu(r21.h, r31.l):<<1
+0x70 0xdf 0xd5 0xe6
+# CHECK: r17:16 += mpyu(r21.h, r31.h):<<1
+0x10 0xdf 0xf5 0xe6
+# CHECK: r17:16 -= mpyu(r21.l, r31.l):<<1
+0x30 0xdf 0xf5 0xe6
+# CHECK: r17:16 -= mpyu(r21.l, r31.h):<<1
+0x50 0xdf 0xf5 0xe6
+# CHECK: r17:16 -= mpyu(r21.h, r31.l):<<1
+0x70 0xdf 0xf5 0xe6
+# CHECK: r17:16 -= mpyu(r21.h, r31.h):<<1
+0x11 0xdf 0xd5 0xec
+# CHECK: r17 = mpyu(r21.l, r31.l):<<1
+0x31 0xdf 0xd5 0xec
+# CHECK: r17 = mpyu(r21.l, r31.h):<<1
+0x51 0xdf 0xd5 0xec
+# CHECK: r17 = mpyu(r21.h, r31.l):<<1
+0x71 0xdf 0xd5 0xec
+# CHECK: r17 = mpyu(r21.h, r31.h):<<1
+0x11 0xdf 0xd5 0xee
+# CHECK: r17 += mpyu(r21.l, r31.l):<<1
+0x31 0xdf 0xd5 0xee
+# CHECK: r17 += mpyu(r21.l, r31.h):<<1
+0x51 0xdf 0xd5 0xee
+# CHECK: r17 += mpyu(r21.h, r31.l):<<1
+0x71 0xdf 0xd5 0xee
+# CHECK: r17 += mpyu(r21.h, r31.h):<<1
+0x11 0xdf 0xf5 0xee
+# CHECK: r17 -= mpyu(r21.l, r31.l):<<1
+0x31 0xdf 0xf5 0xee
+# CHECK: r17 -= mpyu(r21.l, r31.h):<<1
+0x51 0xdf 0xf5 0xee
+# CHECK: r17 -= mpyu(r21.h, r31.l):<<1
+0x71 0xdf 0xf5 0xee
+# CHECK: r17 -= mpyu(r21.h, r31.h):<<1
+0x31 0xdf 0x15 0xed
+# CHECK: r17 = mpy(r21, r31)
+0x31 0xdf 0x35 0xed
+# CHECK: r17 = mpy(r21, r31):rnd
+0x31 0xdf 0x55 0xed
+# CHECK: r17 = mpyu(r21, r31)
+0x31 0xdf 0x75 0xed
+# CHECK: r17 = mpysu(r21, r31)
+0x11 0xdf 0xb5 0xed
+# CHECK: r17 = mpy(r21, r31.h):<<1:sat
+0x31 0xdf 0xb5 0xed
+# CHECK: r17 = mpy(r21, r31.l):<<1:sat
+0x11 0xdf 0xf5 0xed
+# CHECK: r17 = mpy(r21, r31):<<1:sat
+0x91 0xdf 0xb5 0xed
+# CHECK: r17 = mpy(r21, r31.h):<<1:rnd:sat
+0x91 0xdf 0xf5 0xed
+# CHECK: r17 = mpy(r21, r31.l):<<1:rnd:sat
+0x11 0xdf 0x75 0xef
+# CHECK: r17 += mpy(r21, r31):<<1:sat
+0x31 0xdf 0x75 0xef
+# CHECK: r17 -= mpy(r21, r31):<<1:sat
+0x10 0xdf 0x15 0xe5
+# CHECK: r17:16 = mpy(r21, r31)
+0x10 0xdf 0x55 0xe5
+# CHECK: r17:16 = mpyu(r21, r31)
+0x10 0xdf 0x15 0xe7
+# CHECK: r17:16 += mpy(r21, r31)
+0x10 0xdf 0x35 0xe7
+# CHECK: r17:16 -= mpy(r21, r31)
+0x10 0xdf 0x55 0xe7
+# CHECK: r17:16 += mpyu(r21, r31)
+0x10 0xdf 0x75 0xe7
+# CHECK: r17:16 -= mpyu(r21, r31)
diff --git a/test/MC/Disassembler/Hexagon/xtype_perm.txt b/test/MC/Disassembler/Hexagon/xtype_perm.txt
new file mode 100644
index 000000000000..1de3d11d820a
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/xtype_perm.txt
@@ -0,0 +1,14 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x11 0xc0 0xd4 0x88
+# CHECK: r17 = sat(r21:20)
+0x91 0xc0 0xd5 0x8c
+# CHECK: r17 = sath(r21)
+0xb1 0xc0 0xd5 0x8c
+# CHECK: r17 = satuh(r21)
+0xd1 0xc0 0xd5 0x8c
+# CHECK: r17 = satub(r21)
+0xf1 0xc0 0xd5 0x8c
+# CHECK: r17 = satb(r21)
+0xf1 0xc0 0x95 0x8c
+# CHECK: r17 = swiz(r21)
diff --git a/test/MC/Disassembler/Hexagon/xtype_pred.txt b/test/MC/Disassembler/Hexagon/xtype_pred.txt
new file mode 100644
index 000000000000..0fa4f05bce82
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/xtype_pred.txt
@@ -0,0 +1,66 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x83 0xf4 0x10 0xd2
+# CHECK: p3 = boundscheck(r17:16, r21:20):raw:lo
+0xa3 0xf4 0x10 0xd2
+# CHECK: p3 = boundscheck(r17:16, r21:20):raw:hi
+0x43 0xd5 0xd1 0xc7
+# CHECK: p3 = cmpb.gt(r17, r21)
+0xc3 0xd5 0xd1 0xc7
+# CHECK: p3 = cmpb.eq(r17, r21)
+0xe3 0xd5 0xd1 0xc7
+# CHECK: p3 = cmpb.gtu(r17, r21)
+0xa3 0xc2 0x11 0xdd
+# CHECK: p3 = cmpb.eq(r17, #21)
+0xa3 0xc2 0x31 0xdd
+# CHECK: p3 = cmpb.gt(r17, #21)
+0xa3 0xc2 0x51 0xdd
+# CHECK: p3 = cmpb.gtu(r17, #21)
+0x63 0xd5 0xd1 0xc7
+# CHECK: p3 = cmph.eq(r17, r21)
+0x83 0xd5 0xd1 0xc7
+# CHECK: p3 = cmph.gt(r17, r21)
+0xa3 0xd5 0xd1 0xc7
+# CHECK: p3 = cmph.gtu(r17, r21)
+0xab 0xc2 0x11 0xdd
+# CHECK: p3 = cmph.eq(r17, #21)
+0xab 0xc2 0x31 0xdd
+# CHECK: p3 = cmph.gt(r17, #21)
+0xab 0xc2 0x51 0xdd
+# CHECK: p3 = cmph.gtu(r17, #21)
+0x03 0xde 0x94 0xd2
+# CHECK: p3 = cmp.eq(r21:20, r31:30)
+0x43 0xde 0x94 0xd2
+# CHECK: p3 = cmp.gt(r21:20, r31:30)
+0x83 0xde 0x94 0xd2
+# CHECK: p3 = cmp.gtu(r21:20, r31:30)
+0x03 0xd5 0x91 0x85
+# CHECK: p3 = bitsclr(r17, #21)
+0x03 0xd5 0xb1 0x85
+# CHECK: p3 = !bitsclr(r17, #21)
+0x03 0xd5 0x51 0xc7
+# CHECK: p3 = bitsset(r17, r21)
+0x03 0xd5 0x71 0xc7
+# CHECK: p3 = !bitsset(r17, r21)
+0x03 0xd5 0x91 0xc7
+# CHECK: p3 = bitsclr(r17, r21)
+0x03 0xd5 0xb1 0xc7
+# CHECK: p3 = !bitsclr(r17, r21)
+0x10 0xc3 0x00 0x86
+# CHECK: r17:16 = mask(p3)
+0x63 0xf5 0x10 0xd2
+# CHECK: p3 = tlbmatch(r17:16, r21)
+0x03 0xc0 0x45 0x85
+# CHECK: p3 = r5
+0x05 0xc0 0x43 0x89
+# CHECK: r5 = p3
+0x03 0xd5 0x11 0x85
+# CHECK: p3 = tstbit(r17, #21)
+0x03 0xd5 0x31 0x85
+# CHECK: p3 = !tstbit(r17, #21)
+0x03 0xd5 0x11 0xc7
+# CHECK: p3 = tstbit(r17, r21)
+0x03 0xd5 0x31 0xc7
+# CHECK: p3 = !tstbit(r17, r21)
+0x11 0xc2 0x03 0x89
+# CHECK: r17 = vitpack(p3, p2)
\ No newline at end of file
diff --git a/test/MC/Disassembler/Hexagon/xtype_shift.txt b/test/MC/Disassembler/Hexagon/xtype_shift.txt
new file mode 100644
index 000000000000..9912fd3f1f41
--- /dev/null
+++ b/test/MC/Disassembler/Hexagon/xtype_shift.txt
@@ -0,0 +1,188 @@
+# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+
+0x10 0xdf 0x14 0x80
+# CHECK: r17:16 = asr(r21:20, #31)
+0x30 0xdf 0x14 0x80
+# CHECK: r17:16 = lsr(r21:20, #31)
+0x50 0xdf 0x14 0x80
+# CHECK: r17:16 = asl(r21:20, #31)
+0x11 0xdf 0x15 0x8c
+# CHECK: r17 = asr(r21, #31)
+0x31 0xdf 0x15 0x8c
+# CHECK: r17 = lsr(r21, #31)
+0x51 0xdf 0x15 0x8c
+# CHECK: r17 = asl(r21, #31)
+0x10 0xdf 0x14 0x82
+# CHECK: r17:16 -= asr(r21:20, #31)
+0x30 0xdf 0x14 0x82
+# CHECK: r17:16 -= lsr(r21:20, #31)
+0x50 0xdf 0x14 0x82
+# CHECK: r17:16 -= asl(r21:20, #31)
+0x90 0xdf 0x14 0x82
+# CHECK: r17:16 += asr(r21:20, #31)
+0xb0 0xdf 0x14 0x82
+# CHECK: r17:16 += lsr(r21:20, #31)
+0xd0 0xdf 0x14 0x82
+# CHECK: r17:16 += asl(r21:20, #31)
+0x11 0xdf 0x15 0x8e
+# CHECK: r17 -= asr(r21, #31)
+0x31 0xdf 0x15 0x8e
+# CHECK: r17 -= lsr(r21, #31)
+0x51 0xdf 0x15 0x8e
+# CHECK: r17 -= asl(r21, #31)
+0x91 0xdf 0x15 0x8e
+# CHECK: r17 += asr(r21, #31)
+0xb1 0xdf 0x15 0x8e
+# CHECK: r17 += lsr(r21, #31)
+0xd1 0xdf 0x15 0x8e
+# CHECK: r17 += asl(r21, #31)
+0x4c 0xf7 0x11 0xde
+# CHECK: r17 = add(#21, asl(r17, #23))
+0x4e 0xf7 0x11 0xde
+# CHECK: r17 = sub(#21, asl(r17, #23))
+0x5c 0xf7 0x11 0xde
+# CHECK: r17 = add(#21, lsr(r17, #23))
+0x5e 0xf7 0x11 0xde
+# CHECK: r17 = sub(#21, lsr(r17, #23))
+0xf1 0xd5 0x1f 0xc4
+# CHECK: r17 = addasl(r21, r31, #7)
+0x10 0xdf 0x54 0x82
+# CHECK: r17:16 &= asr(r21:20, #31)
+0x30 0xdf 0x54 0x82
+# CHECK: r17:16 &= lsr(r21:20, #31)
+0x50 0xdf 0x54 0x82
+# CHECK: r17:16 &= asl(r21:20, #31)
+0x90 0xdf 0x54 0x82
+# CHECK: r17:16 |= asr(r21:20, #31)
+0xb0 0xdf 0x54 0x82
+# CHECK: r17:16 |= lsr(r21:20, #31)
+0xd0 0xdf 0x54 0x82
+# CHECK: r17:16 |= asl(r21:20, #31)
+0x30 0xdf 0x94 0x82
+# CHECK: r17:16 ^= lsr(r21:20, #31)
+0x50 0xdf 0x94 0x82
+# CHECK: r17:16 ^= asl(r21:20, #31)
+0x48 0xff 0x11 0xde
+# CHECK: r17 = and(#21, asl(r17, #31))
+0x4a 0xff 0x11 0xde
+# CHECK: r17 = or(#21, asl(r17, #31))
+0x58 0xff 0x11 0xde
+# CHECK: r17 = and(#21, lsr(r17, #31))
+0x5a 0xff 0x11 0xde
+# CHECK: r17 = or(#21, lsr(r17, #31))
+0x11 0xdf 0x55 0x8e
+# CHECK: r17 &= asr(r21, #31)
+0x31 0xdf 0x55 0x8e
+# CHECK: r17 &= lsr(r21, #31)
+0x51 0xdf 0x55 0x8e
+# CHECK: r17 &= asl(r21, #31)
+0x91 0xdf 0x55 0x8e
+# CHECK: r17 |= asr(r21, #31)
+0xb1 0xdf 0x55 0x8e
+# CHECK: r17 |= lsr(r21, #31)
+0xd1 0xdf 0x55 0x8e
+# CHECK: r17 |= asl(r21, #31)
+0x31 0xdf 0x95 0x8e
+# CHECK: r17 ^= lsr(r21, #31)
+0x51 0xdf 0x95 0x8e
+# CHECK: r17 ^= asl(r21, #31)
+0xf0 0xdf 0xd4 0x80
+# CHECK: r17:16 = asr(r21:20, #31):rnd
+0x11 0xdf 0x55 0x8c
+# CHECK: r17 = asr(r21, #31):rnd
+0x51 0xdf 0x55 0x8c
+# CHECK: r17 = asl(r21, #31):sat
+0x10 0xdf 0x94 0xc3
+# CHECK: r17:16 = asr(r21:20, r31)
+0x50 0xdf 0x94 0xc3
+# CHECK: r17:16 = lsr(r21:20, r31)
+0x90 0xdf 0x94 0xc3
+# CHECK: r17:16 = asl(r21:20, r31)
+0xd0 0xdf 0x94 0xc3
+# CHECK: r17:16 = lsl(r21:20, r31)
+0x11 0xdf 0x55 0xc6
+# CHECK: r17 = asr(r21, r31)
+0x51 0xdf 0x55 0xc6
+# CHECK: r17 = lsr(r21, r31)
+0x91 0xdf 0x55 0xc6
+# CHECK: r17 = asl(r21, r31)
+0xd1 0xdf 0x55 0xc6
+# CHECK: r17 = lsl(r21, r31)
+0xf1 0xdf 0x8a 0xc6
+# CHECK: r17 = lsl(#21, r31)
+0x10 0xdf 0x94 0xcb
+# CHECK: r17:16 -= asr(r21:20, r31)
+0x50 0xdf 0x94 0xcb
+# CHECK: r17:16 -= lsr(r21:20, r31)
+0x90 0xdf 0x94 0xcb
+# CHECK: r17:16 -= asl(r21:20, r31)
+0xd0 0xdf 0x94 0xcb
+# CHECK: r17:16 -= lsl(r21:20, r31)
+0x10 0xdf 0xd4 0xcb
+# CHECK: r17:16 += asr(r21:20, r31)
+0x50 0xdf 0xd4 0xcb
+# CHECK: r17:16 += lsr(r21:20, r31)
+0x90 0xdf 0xd4 0xcb
+# CHECK: r17:16 += asl(r21:20, r31)
+0xd0 0xdf 0xd4 0xcb
+# CHECK: r17:16 += lsl(r21:20, r31)
+0x11 0xdf 0x95 0xcc
+# CHECK: r17 -= asr(r21, r31)
+0x51 0xdf 0x95 0xcc
+# CHECK: r17 -= lsr(r21, r31)
+0x91 0xdf 0x95 0xcc
+# CHECK: r17 -= asl(r21, r31)
+0xd1 0xdf 0x95 0xcc
+# CHECK: r17 -= lsl(r21, r31)
+0x11 0xdf 0xd5 0xcc
+# CHECK: r17 += asr(r21, r31)
+0x51 0xdf 0xd5 0xcc
+# CHECK: r17 += lsr(r21, r31)
+0x91 0xdf 0xd5 0xcc
+# CHECK: r17 += asl(r21, r31)
+0xd1 0xdf 0xd5 0xcc
+# CHECK: r17 += lsl(r21, r31)
+0x10 0xdf 0x14 0xcb
+# CHECK: r17:16 |= asr(r21:20, r31)
+0x50 0xdf 0x14 0xcb
+# CHECK: r17:16 |= lsr(r21:20, r31)
+0x90 0xdf 0x14 0xcb
+# CHECK: r17:16 |= asl(r21:20, r31)
+0xd0 0xdf 0x14 0xcb
+# CHECK: r17:16 |= lsl(r21:20, r31)
+0x10 0xdf 0x54 0xcb
+# CHECK: r17:16 &= asr(r21:20, r31)
+0x50 0xdf 0x54 0xcb
+# CHECK: r17:16 &= lsr(r21:20, r31)
+0x90 0xdf 0x54 0xcb
+# CHECK: r17:16 &= asl(r21:20, r31)
+0xd0 0xdf 0x54 0xcb
+# CHECK: r17:16 &= lsl(r21:20, r31)
+0x10 0xdf 0x74 0xcb
+# CHECK: r17:16 ^= asr(r21:20, r31)
+0x50 0xdf 0x74 0xcb
+# CHECK: r17:16 ^= lsr(r21:20, r31)
+0x90 0xdf 0x74 0xcb
+# CHECK: r17:16 ^= asl(r21:20, r31)
+0xd0 0xdf 0x74 0xcb
+# CHECK: r17:16 ^= lsl(r21:20, r31)
+0x11 0xdf 0x15 0xcc
+# CHECK: r17 |= asr(r21, r31)
+0x51 0xdf 0x15 0xcc
+# CHECK: r17 |= lsr(r21, r31)
+0x91 0xdf 0x15 0xcc
+# CHECK: r17 |= asl(r21, r31)
+0xd1 0xdf 0x15 0xcc
+# CHECK: r17 |= lsl(r21, r31)
+0x11 0xdf 0x55 0xcc
+# CHECK: r17 &= asr(r21, r31)
+0x51 0xdf 0x55 0xcc
+# CHECK: r17 &= lsr(r21, r31)
+0x91 0xdf 0x55 0xcc
+# CHECK: r17 &= asl(r21, r31)
+0xd1 0xdf 0x55 0xcc
+# CHECK: r17 &= lsl(r21, r31)
+0x11 0xdf 0x15 0xc6
+# CHECK: r17 = asr(r21, r31):sat
+0x91 0xdf 0x15 0xc6
+# CHECK: r17 = asl(r21, r31):sat
diff --git a/test/MC/Disassembler/Mips/micromips.txt b/test/MC/Disassembler/Mips/micromips.txt
index 1458ce2ed4b3..07c1df91441a 100644
--- a/test/MC/Disassembler/Mips/micromips.txt
+++ b/test/MC/Disassembler/Mips/micromips.txt
@@ -16,6 +16,21 @@
 # CHECK: addiu $9, $6, -15001
 0x31 0x26 0xc5 0x67
 
+# CHECK: addiusp -16
+0x4f 0xf9
+
+# CHECK: addiusp -1028
+0x4f 0xff
+
+# CHECK: addiusp -1032
+0x4f 0xfd
+
+# CHECK: addiusp 1024
+0x4c 0x01
+
+# CHECK: addiusp 1028
+0x4c 0x03
+
 # CHECK: addu $9, $6, $7
 0x00 0xe6 0x49 0x50
 
@@ -61,6 +76,9 @@
 # CHECK: andi $9, $6, 17767
 0xd1 0x26 0x45 0x67
 
+# CHECK: andi16 $16, $2, 31
+0x2c 0x29
+
 # CHECK: or $3, $4, $5
 0x00 0xa4 0x1a 0x90
 
@@ -136,6 +154,9 @@
 # CHECK: lw  $6, 4($5)
 0xfc 0xc5 0x00 0x04
 
+# CHECK: lw $6, 123($sp)
+0xfc 0xdd 0x00 0x7b
+
 # CHECK: sb $5, 8($4)
 0x18 0xa4 0x00 0x08
 
@@ -145,6 +166,9 @@
 # CHECK: sw  $5, 4($6)
 0xf8 0xa6 0x00 0x04
 
+# CHECK: sw $5, 123($sp)
+0xf8 0xbd 0x00 0x7b
+
 # CHECK: lwu $2, 8($4)
 0x60 0x44 0xe0 0x08
 
@@ -229,6 +253,9 @@
 # CHECK: jr $7
 0x00 0x07 0x0f 0x3c
 
+# CHECK: jraddiusp 20
+0x47 0x05
+
 # CHECK: beq $9, $6, 1332
 0x94 0xc9 0x02 0x9a
 
@@ -289,8 +316,161 @@
 # CHECK: tnei $9, 17767
 0x41 0x89 0x45 0x67
 
+# CHECK: cache 1, 8($5)
+0x20 0x25 0x60 0x08
+
+# CHECK: pref 1, 8($5)
+0x60 0x25 0x20 0x08
+
+# CHECK: ssnop
+0x00 0x00 0x08 0x00
+
+# CHECK: ehb
+0x00 0x00 0x18 0x00
+
+# CHECK: pause
+0x00 0x00 0x28 0x00
+
 # CHECK: ll $2, 8($4)
 0x60 0x44 0x30 0x08
 
 # CHECK: sc $2, 8($4)
 0x60 0x44 0xb0 0x08
+
+# CHECK: lwxs $2, $3($4)
+0x00 0x64 0x11 0x18
+
+# CHECK: bgezals $6, 1332
+0x42 0x66 0x02 0x9a
+
+# CHECK: bltzals $6, 1332
+0x42 0x26 0x02 0x9a
+
+# CHECK: beqzc $9, 1332
+0x40 0xe9 0x02 0x9a
+
+# CHECK: bnezc $9, 1332
+0x40 0xa9 0x02 0x9a
+
+# CHECK: jals 1328
+0x74 0x00 0x02 0x98
+
+# CHECK: jalrs $ra, $6
+0x03 0xe6 0x4f 0x3c
+
+# CHECK: lwm32 $16, $17, 8($4)
+0x20 0x44 0x50 0x08
+
+# CHECK: swm32 $16, $17, 8($4)
+0x20 0x44 0xd0 0x08
+
+# CHECK: swp $16, 8($4)
+0x22 0x04 0x90 0x08
+
+# CHECK: lwp $16, 8($4)
+0x22 0x04 0x10 0x08
+
+# CHECK: nop
+0x00 0x00 0x00 0x00
+
+# CHECK: addu16 $6, $17, $4
+0x07 0x42
+
+# CHECK: subu16 $5, $16, $3
+0x06 0xb1
+
+# CHECK: and16 $16, $2
+0x44 0x82
+
+# CHECK: not16 $17, $3
+0x44 0x0b
+
+# CHECK: or16 $16, $4
+0x44 0xc4
+
+# CHECK: xor16 $17, $5
+0x44 0x4d
+
+# CHECK: sll16 $3, $16, 5
+0x25 0x8a
+
+# CHECK: srl16 $4, $17, 6
+0x26 0x1d
+
+# CHECK: lbu16 $3, 4($17)
+0x09 0x94
+
+# CHECK: lbu16 $3, -1($16)
+0x09 0x8f
+
+# CHECK: lhu16 $3, 4($16)
+0x29 0x82
+
+# CHECK: lw16 $4, 8($17)
+0x6a 0x12
+
+# CHECK: sb16 $3, 4($16)
+0x89 0x84
+
+# CHECK: sh16 $4, 8($17)
+0xaa 0x14
+
+# CHECK: sw16 $4, 4($17)
+0xea 0x11
+
+# CHECK: sw16 $zero, 4($17)
+0xe8 0x11
+
+# CHECK: mfhi $9
+0x46 0x09
+
+# CHECK: mflo $9
+0x46 0x49
+
+# CHECK: move $25, $1
+0x0f 0x21
+
+# CHECK: jrc $9
+0x45 0xa9
+
+# CHECK: jalr $9
+0x45 0xc9
+
+# CHECK: jalrs16 $9
+0x45 0xe9
+
+# CHECK: jr16 $9
+0x45 0x89
+
+# CHECK: li16 $3, -1
+0xed 0xff
+
+# CHECK: li16 $3, 126
+0xed 0xfe
+
+# CHECK: addiur1sp $7, 4
+0x6f 0x83
+
+# CHECK: addiur2 $6, $7, -1
+0x6f 0x7e
+
+# CHECK: addiur2 $6, $7, 12
+0x6f 0x76
+
+# CHECK: addius5 $7, -2
+0x4c 0xfc
+
+# CHECK: nop
+0x0c 0x00
+
+# CHECK: lw $3, 32($sp)
+0x48 0x68
+
+# CHECK: sw $4, 124($sp)
+0xc8 0x9f
+
+# CHECK: beqz16 $6, 20
+0x8f 0x0a
+
+# CHECK: bnez16 $6, 20
+0xaf 0x0a
diff --git a/test/MC/Disassembler/Mips/micromips_le.txt b/test/MC/Disassembler/Mips/micromips_le.txt
index bdfe88eaffbf..9a8c4a94530c 100644
--- a/test/MC/Disassembler/Mips/micromips_le.txt
+++ b/test/MC/Disassembler/Mips/micromips_le.txt
@@ -16,9 +16,27 @@
 # CHECK: addiu $9, $6, -15001
 0x26 0x31 0x67 0xc5
 
+# CHECK: addiusp -16
+0xf9 0x4f
+
+# CHECK: addiusp -1028
+0xff 0x4f
+
+# CHECK: addiusp -1032
+0xfd 0x4f
+
+# CHECK: addiusp 1024
+0x01 0x4c
+
+# CHECK: addiusp 1028
+0x03 0x4c
+
 # CHECK: addu $9, $6, $7
 0xe6 0x00 0x50 0x49
 
+# CHECK: andi16 $16, $2, 31
+0x29 0x2c
+
 # CHECK: sub $9, $6, $7
 0xe6 0x00 0x90 0x49
 
@@ -136,6 +154,9 @@
 # CHECK: lw $6, 4($5)
 0xc5 0xfc 0x04 0x00
 
+# CHECK: lw $6, 123($sp)
+0xdd 0xfc 0x7b 0x00
+
 # CHECK: sb $5, 8($4)
 0xa4 0x18 0x08 0x00
 
@@ -145,6 +166,9 @@
 # CHECK: sw $5, 4($6)
 0xa6 0xf8 0x04 0x00
 
+# CHECK: sw $5, 123($sp)
+0xbd 0xf8 0x7b 0x00
+
 # CHECK: lwu $2, 8($4)
 0x44 0x60 0x08 0xe0
 
@@ -229,6 +253,9 @@
 # CHECK: jr $7
 0x07 0x00 0x3c 0x0f
 
+# CHECK: jraddiusp 20
+0x05 0x47
+
 # CHECK: beq $9, $6, 1332
 0xc9 0x94 0x9a 0x02
 
@@ -289,8 +316,161 @@
 # CHECK: tnei $9, 17767
 0x89 0x41 0x67 0x45
 
+# CHECK: cache 1, 8($5)
+0x25 0x20 0x08 0x60
+
+# CHECK: pref 1, 8($5)
+0x25 0x60 0x08 0x20
+
+# CHECK: ssnop
+0x00 0x00 0x00 0x08
+
+# CHECK: ehb
+0x00 0x00 0x00 0x18
+
+# CHECK: pause
+0x00 0x00 0x00 0x28
+
 # CHECK: ll $2, 8($4)
 0x44 0x60 0x08 0x30
 
 # CHECK: sc $2, 8($4)
 0x44 0x60 0x08 0xb0
+
+# CHECK: lwxs $2, $3($4)
+0x64 0x00 0x18 0x11
+
+# CHECK: bgezals $6, 1332
+0x66 0x42 0x9a 0x02
+
+# CHECK: bltzals $6, 1332
+0x26 0x42 0x9a 0x02
+
+# CHECK: beqzc $9, 1332
+0xe9 0x40 0x9a 0x02
+
+# CHECK: bnezc $9, 1332
+0xa9 0x40 0x9a 0x02
+
+# CHECK: jals 1328
+0x00 0x74 0x98 0x02
+
+# CHECK: jalrs $ra, $6
+0xe6 0x03 0x3c 0x4f
+
+# CHECK: lwm32 $16, $17, 8($4)
+0x44 0x20 0x08 0x50
+
+# CHECK: swm32 $16, $17, 8($4)
+0x44 0x20 0x08 0xd0
+
+# CHECK: swp $16, 8($4)
+0x04 0x22  0x08 0x90
+
+# CHECK: lwp $16, 8($4)
+0x04 0x22 0x08 0x10
+
+# CHECK: nop
+0x00 0x00 0x00 0x00
+
+# CHECK: addu16 $6, $17, $4
+0x42 0x07
+
+# CHECK: subu16 $5, $16, $3
+0xb1 0x06
+
+# CHECK: and16 $16, $2
+0x82 0x44
+
+# CHECK: not16 $17, $3
+0x0b 0x44
+
+# CHECK: or16 $16, $4
+0xc4 0x44
+
+# CHECK: xor16 $17, $5
+0x4d 0x44
+
+# CHECK: sll16 $3, $16, 5
+0x8a 0x25
+
+# CHECK: srl16 $4, $17, 6
+0x1d 0x26
+
+# CHECK: lbu16 $3, 4($17)
+0x94 0x09
+
+# CHECK: lbu16 $3, -1($16)
+0x8f 0x09
+
+# CHECK: lhu16 $3, 4($16)
+0x82 0x29
+
+# CHECK: lw16 $4, 8($17)
+0x12 0x6a
+
+# CHECK: sb16 $3, 4($16)
+0x84 0x89
+
+# CHECK: sh16 $4, 8($17)
+0x14 0xaa
+
+# CHECK: sw16 $4, 4($17)
+0x11 0xea
+
+# CHECK: sw16 $zero, 4($17)
+0x11 0xe8
+
+# CHECK: mfhi $9
+0x09 0x46
+
+# CHECK: mflo $9
+0x49 0x46
+
+# CHECK: move $25, $1
+0x21 0x0f
+
+# CHECK: jrc $9
+0xa9 0x45
+
+# CHECK: jalr $9
+0xc9 0x45
+
+# CHECK: jalrs16 $9
+0xe9 0x45
+
+# CHECK: jr16 $9
+0x89 0x45
+
+# CHECK: li16 $3, -1
+0xff 0xed
+
+# CHECK: li16 $3, 126
+0xfe 0xed
+
+# CHECK: addiur1sp $7, 4
+0x83 0x6f
+
+# CHECK: addiur2 $6, $7, -1
+0x7e 0x6f
+
+# CHECK: addiur2 $6, $7, 12
+0x76 0x6f
+
+# CHECK: addius5 $7, -2
+0xfc 0x4c
+
+# CHECK: nop
+0x00 0x0c
+
+# CHECK: lw $3, 32($sp)
+0x68 0x48
+
+# CHECK: sw $4, 124($sp)
+0x9f 0xc8
+
+# CHECK: beqz16 $6, 20
+0x0a 0x8f
+
+# CHECK: bnez16 $6, 20
+0x0a 0xaf
diff --git a/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt b/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt
new file mode 100644
index 000000000000..474bd17d4bb1
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt
@@ -0,0 +1,116 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -disassemble -mcpu=mips1 | FileCheck %s
+# CHECK: .text
+ 0x85 0xc1 0x20 0x46   	# CHECK:       abs.d	$f6, $f24
+ 0x45 0x82 0x00 0x46   	# CHECK:       abs.s	$f9, $f16
+ 0x20 0xb8 0x45 0x02   	# CHECK:       add	$23, $18, $5
+ 0x00 0x30 0x3c 0x46   	# CHECK:       add.d	$f0, $f6, $f28
+ 0x00 0xaa 0x18 0x46   	# CHECK:       add.s	$f8, $f21, $f24
+ 0xd2 0x66 0x2d 0x21   	# CHECK:       addi	$13, $9, 26322
+ 0xfe 0xff 0x08 0x21   	# CHECK:       addi	$8, $8, -2
+ 0x48 0x3b 0xc9 0x21   	# CHECK:       addi	$9, $14, 15176
+ 0xe7 0xe3 0x18 0x23   	# CHECK:       addi	$24, $24, -7193
+ 0x21 0x48 0x86 0x00   	# CHECK:       addu	$9, $4, $6
+ 0x0a 0x00 0x29 0x25   	# CHECK:       addiu	$9, $9, 10
+ 0x24 0xb8 0x4c 0x00   	# CHECK:       and	$23, $2, $12
+ 0x01 0x00 0x00 0x45   	# CHECK:       bc1f	8
+ 0x04 0x00 0x42 0x30   	# CHECK:       andi	$2, $2, 4
+ 0x01 0x00 0x01 0x45   	# CHECK:       bc1t	8
+ 0x00 0x00 0x00 0x00   	# CHECK:       nop
+ 0x9b 0x14 0x11 0x04   	# CHECK:       bal	21104
+ 0x00 0x00 0x00 0x00   	# CHECK:       nop
+ 0x9b 0x14 0x11 0x04   	# CHECK:       bal	21104
+ 0x00 0x00 0x00 0x00   	# CHECK:       nop
+ 0x9b 0x14 0xd1 0x04   	# CHECK:       bgezal	$6, 21104
+ 0x00 0x00 0x00 0x00   	# CHECK:       nop
+ 0x9b 0x14 0xd0 0x04   	# CHECK:       bltzal	$6, 21104
+ 0x00 0x00 0x00 0x00   	# CHECK:       nop
+ 0x3b 0xe0 0x3c 0x46   	# CHECK:       c.ngl.d	$f28, $f28
+ 0x39 0x00 0x30 0x46   	# CHECK:       c.ngle.d	$f0, $f16
+ 0x38 0xf0 0x20 0x46   	# CHECK:       c.sf.d	$f30, $f0
+ 0x38 0x70 0x16 0x46   	# CHECK:       c.sf.s	$f14, $f22
+ 0x00 0xa8 0x51 0x44   	# CHECK:       cfc1	$17, $21
+ 0x00 0xd0 0xc6 0x44   	# CHECK:       ctc1	$6, $26
+ 0xa1 0xe5 0x00 0x46   	# CHECK:       cvt.d.s	$f22, $f28
+ 0xa1 0x5e 0x80 0x46   	# CHECK:       cvt.d.w	$f26, $f11
+ 0xa0 0x46 0x20 0x46   	# CHECK:       cvt.s.d	$f26, $f8
+ 0xa0 0x7d 0x80 0x46   	# CHECK:       cvt.s.w	$f22, $f15
+ 0x24 0x75 0x20 0x46   	# CHECK:       cvt.w.d	$f20, $f14
+ 0x24 0xc5 0x00 0x46   	# CHECK:       cvt.w.s	$f20, $f24
+ 0x1a 0x00 0x2b 0x03   	# CHECK:       div	$zero, $25, $11
+ 0x03 0xa7 0x3a 0x46   	# CHECK:       div.d	$f28, $f20, $f26
+ 0x03 0x29 0x0f 0x46   	# CHECK:       div.s	$f4, $f5, $f15
+ 0x1b 0x00 0x2f 0x03   	# CHECK:       divu	$zero, $25, $15
+ 0x4d 0xc7 0x58 0x81   	# CHECK:       lb	$24, -14515($10)
+ 0xf3 0x75 0x68 0x90   	# CHECK:       lbu	$8, 30195($3)
+ 0x94 0xde 0xab 0x86   	# CHECK:       lh	$11, -8556($21)
+ 0xbd 0xa6 0x53 0x94   	# CHECK:       lhu	$19, -22851($2)
+ 0xb3 0x8b 0x01 0x24   	# CHECK:       addiu $1, $zero, -29773
+ 0x3f 0x8b 0x00 0x24   	# CHECK:       addiu   $zero, $zero, -29889
+ 0x2a 0x16 0xa8 0x8c   	# CHECK:       lw	$8, 5674($5)
+ 0xf1 0x27 0x50 0xc7   	# CHECK:       lwc1	$f16, 10225($26)
+ 0xb7 0xfc 0xd2 0xc8   	# CHECK:       lwc2	$18, -841($6)
+ 0xf7 0x81 0x4a 0xcf   	# CHECK:       lwc3	$10, -32265($26)
+ 0x79 0xef 0xf4 0x89   	# CHECK:       lwl	$20, -4231($15)
+ 0x35 0xb5 0x80 0x9b   	# CHECK:       lwr	$zero, -19147($gp)
+ 0x00 0xd8 0x07 0x44   	# CHECK:       mfc1	$7, $f27
+ 0x10 0x98 0x00 0x00   	# CHECK:       mfhi	$19
+ 0x10 0xe8 0x00 0x00   	# CHECK:       mfhi	$sp
+ 0x12 0x88 0x00 0x00   	# CHECK:       mflo	$17
+ 0x06 0x75 0x20 0x46   	# CHECK:       mov.d	$f20, $f14
+ 0x86 0xd8 0x00 0x46   	# CHECK:       mov.s	$f2, $f27
+ 0x21 0xf0 0x80 0x00   	# CHECK:       move	$fp, $4
+ 0x21 0xc8 0xc0 0x00   	# CHECK:       move	$25, $6
+ 0x00 0x48 0x9e 0x44   	# CHECK:       mtc1	$fp, $f9
+ 0x11 0x00 0x20 0x02   	# CHECK:       mthi	$17
+ 0x13 0x00 0xa0 0x03   	# CHECK:       mtlo	$sp
+ 0x13 0x00 0x20 0x03   	# CHECK:       mtlo	$25
+ 0x02 0xa5 0x30 0x46   	# CHECK:       mul.d	$f20, $f20, $f16
+ 0x82 0x57 0x02 0x46   	# CHECK:       mul.s	$f30, $f10, $f2
+ 0x18 0x00 0xb4 0x03   	# CHECK:       mult	$sp, $20
+ 0x18 0x00 0xa2 0x03   	# CHECK:       mult	$sp, $2
+ 0x19 0x00 0x9a 0x03   	# CHECK:       multu	$gp, $26
+ 0x19 0x00 0x32 0x01   	# CHECK:       multu	$9, $18
+ 0x23 0x10 0x02 0x00   	# CHECK:       negu	$2, $2
+ 0x23 0x10 0x03 0x00   	# CHECK:       negu	$2, $3
+ 0x87 0x96 0x20 0x46   	# CHECK:       neg.d	$f26, $f18
+ 0x47 0x78 0x00 0x46   	# CHECK:       neg.s	$f1, $f15
+ 0x00 0x00 0x00 0x00   	# CHECK:       nop
+ 0x27 0x38 0x07 0x00   	# CHECK:       nor	$7, $zero, $7
+ 0x25 0x60 0x1d 0x02   	# CHECK:       or	$12, $16, $sp
+ 0x04 0x00 0x42 0x34   	# CHECK:       ori	$2, $2, 4
+ 0x6f 0xb2 0xd6 0xa1   	# CHECK:       sb	$22, -19857($14)
+ 0xd0 0xe5 0xee 0xa5   	# CHECK:       sh	$14, -6704($15)
+ 0x80 0x3c 0x07 0x00   	# CHECK:       sll	$7, $7, 18
+ 0x80 0x3c 0x00 0x00   	# CHECK:       sll	$7, $zero, 18
+ 0x04 0x38 0x20 0x01   	# CHECK:       sllv	$7, $zero, $9
+ 0x04 0x38 0x20 0x01   	# CHECK:       sllv	$7, $zero, $9
+ 0x2a 0xb8 0x7b 0x01   	# CHECK:       slt	$23, $11, $27
+ 0x11 0x25 0x51 0x29   	# CHECK:       slti	$17, $10, 9489
+ 0x55 0xc3 0x39 0x2f   	# CHECK:       sltiu	$25, $25, -15531
+ 0x2b 0xa0 0xab 0x02   	# CHECK:       sltu	$20, $21, $11
+ 0x55 0xc3 0x38 0x2f   	# CHECK:       sltiu	$24, $25, -15531
+ 0xc3 0x8b 0x11 0x00   	# CHECK:       sra	$17, $17, 15
+ 0xc3 0x8b 0x17 0x00   	# CHECK:       sra	$17, $23, 15
+ 0x07 0x88 0xb7 0x03   	# CHECK:       srav	$17, $23, $sp
+ 0x07 0x88 0xb7 0x03   	# CHECK:       srav	$17, $23, $sp
+ 0xc2 0x11 0x02 0x00   	# CHECK:       srl	$2, $2, 7
+ 0xc2 0x11 0x02 0x00   	# CHECK:       srl	$2, $2, 7
+ 0x06 0xc8 0x94 0x00   	# CHECK:       srlv	$25, $20, $4
+ 0x06 0xc8 0x94 0x00   	# CHECK:       srlv	$25, $20, $4
+ 0x40 0x00 0x00 0x00   	# CHECK:       ssnop
+ 0x22 0xb0 0x6c 0x02   	# CHECK:       sub	$22, $19, $12
+ 0x36 0x0c 0x36 0x22   	# CHECK:       addi	$22, $17, 3126
+ 0x90 0xe6 0xad 0x21   	# CHECK:       addi	$13, $13, -6512
+ 0x81 0x14 0x30 0x46   	# CHECK:       sub.d	$f18, $f2, $f16
+ 0xc1 0xb5 0x16 0x46   	# CHECK:       sub.s	$f23, $f22, $f22
+ 0x23 0xe8 0xd6 0x02   	# CHECK:       subu	$sp, $22, $22
+ 0x50 0xd8 0xbf 0xaf   	# CHECK:       sw	$ra, -10160($sp)
+ 0xef 0xde 0x06 0xe7   	# CHECK:       swc1	$f6, -8465($24)
+ 0x30 0x61 0x19 0xea   	# CHECK:       swc2	$25, 24880($16)
+ 0x7e 0x35 0x6f 0xaa   	# CHECK:       swl	$15, 13694($19)
+ 0x22 0x98 0xd1 0xb9   	# CHECK:       swr	$17, -26590($14)
+ 0x08 0x00 0x00 0x42   	# CHECK:       tlbp
+ 0x01 0x00 0x00 0x42   	# CHECK:       tlbr
+ 0x02 0x00 0x00 0x42   	# CHECK:       tlbwi
+ 0x06 0x00 0x00 0x42   	# CHECK:       tlbwr
+ 0x26 0x90 0x9e 0x00   	# CHECK:       xor	$18, $4, $fp
diff --git a/test/MC/Disassembler/Mips/mips1/valid-mips1.txt b/test/MC/Disassembler/Mips/mips1/valid-mips1.txt
new file mode 100644
index 000000000000..957f82adbc8b
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips1/valid-mips1.txt
@@ -0,0 +1,116 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips1 | FileCheck %s
+# CHECK: .text
+ 0x46 0x20 0xc1 0x85 	# CHECK:       abs.d	$f6, $f24
+ 0x46 0x00 0x82 0x45 	# CHECK:       abs.s	$f9, $f16
+ 0x02 0x45 0xb8 0x20 	# CHECK:       add	$23, $18, $5
+ 0x46 0x3c 0x30 0x00 	# CHECK:       add.d	$f0, $f6, $f28
+ 0x46 0x18 0xaa 0x00 	# CHECK:       add.s	$f8, $f21, $f24
+ 0x21 0x2d 0x66 0xd2 	# CHECK:       addi	$13, $9, 26322
+ 0x21 0x08 0xff 0xfe 	# CHECK:       addi	$8, $8, -2
+ 0x21 0xc9 0x3b 0x48 	# CHECK:       addi	$9, $14, 15176
+ 0x23 0x18 0xe3 0xe7 	# CHECK:       addi	$24, $24, -7193
+ 0x00 0x86 0x48 0x21 	# CHECK:       addu	$9, $4, $6
+ 0x25 0x29 0x00 0x0a 	# CHECK:       addiu	$9, $9, 10
+ 0x00 0x4c 0xb8 0x24 	# CHECK:       and	$23, $2, $12
+ 0x45 0x00 0x00 0x01 	# CHECK:       bc1f	8
+ 0x30 0x42 0x00 0x04 	# CHECK:       andi	$2, $2, 4
+ 0x45 0x01 0x00 0x01 	# CHECK:       bc1t	8
+ 0x00 0x00 0x00 0x00 	# CHECK:       nop
+ 0x04 0x11 0x14 0x9b 	# CHECK:       bal	21104
+ 0x00 0x00 0x00 0x00 	# CHECK:       nop
+ 0x04 0x11 0x14 0x9b 	# CHECK:       bal	21104
+ 0x00 0x00 0x00 0x00 	# CHECK:       nop
+ 0x04 0xd1 0x14 0x9b 	# CHECK:       bgezal	$6, 21104
+ 0x00 0x00 0x00 0x00 	# CHECK:       nop
+ 0x04 0xd0 0x14 0x9b 	# CHECK:       bltzal	$6, 21104
+ 0x00 0x00 0x00 0x00 	# CHECK:       nop
+ 0x46 0x3c 0xe0 0x3b 	# CHECK:       c.ngl.d	$f28, $f28
+ 0x46 0x30 0x00 0x39 	# CHECK:       c.ngle.d	$f0, $f16
+ 0x46 0x20 0xf0 0x38 	# CHECK:       c.sf.d	$f30, $f0
+ 0x46 0x16 0x70 0x38 	# CHECK:       c.sf.s	$f14, $f22
+ 0x44 0x51 0xa8 0x00 	# CHECK:       cfc1	$17, $21
+ 0x44 0xc6 0xd0 0x00 	# CHECK:       ctc1	$6, $26
+ 0x46 0x00 0xe5 0xa1 	# CHECK:       cvt.d.s	$f22, $f28
+ 0x46 0x80 0x5e 0xa1 	# CHECK:       cvt.d.w	$f26, $f11
+ 0x46 0x20 0x46 0xa0 	# CHECK:       cvt.s.d	$f26, $f8
+ 0x46 0x80 0x7d 0xa0 	# CHECK:       cvt.s.w	$f22, $f15
+ 0x46 0x20 0x75 0x24 	# CHECK:       cvt.w.d	$f20, $f14
+ 0x46 0x00 0xc5 0x24 	# CHECK:       cvt.w.s	$f20, $f24
+ 0x03 0x2b 0x00 0x1a 	# CHECK:       div	$zero, $25, $11
+ 0x46 0x3a 0xa7 0x03 	# CHECK:       div.d	$f28, $f20, $f26
+ 0x46 0x0f 0x29 0x03 	# CHECK:       div.s	$f4, $f5, $f15
+ 0x03 0x2f 0x00 0x1b 	# CHECK:       divu	$zero, $25, $15
+ 0x81 0x58 0xc7 0x4d 	# CHECK:       lb	$24, -14515($10)
+ 0x90 0x68 0x75 0xf3 	# CHECK:       lbu	$8, 30195($3)
+ 0x86 0xab 0xde 0x94 	# CHECK:       lh	$11, -8556($21)
+ 0x94 0x53 0xa6 0xbd 	# CHECK:       lhu	$19, -22851($2)
+ 0x24 0x01 0x8b 0xb3 	# CHECK:       addiu $1, $zero, -29773
+ 0x24 0x00 0x8b 0x3f 	# CHECK:       addiu   $zero, $zero, -29889
+ 0x8c 0xa8 0x16 0x2a 	# CHECK:       lw	$8, 5674($5)
+ 0xc7 0x50 0x27 0xf1 	# CHECK:       lwc1	$f16, 10225($26)
+ 0xc8 0xd2 0xfc 0xb7 	# CHECK:       lwc2	$18, -841($6)
+ 0xcf 0x4a 0x81 0xf7 	# CHECK:       lwc3	$10, -32265($26)
+ 0x89 0xf4 0xef 0x79 	# CHECK:       lwl	$20, -4231($15)
+ 0x9b 0x80 0xb5 0x35 	# CHECK:       lwr	$zero, -19147($gp)
+ 0x44 0x07 0xd8 0x00 	# CHECK:       mfc1	$7, $f27
+ 0x00 0x00 0x98 0x10 	# CHECK:       mfhi	$19
+ 0x00 0x00 0xe8 0x10 	# CHECK:       mfhi	$sp
+ 0x00 0x00 0x88 0x12 	# CHECK:       mflo	$17
+ 0x46 0x20 0x75 0x06 	# CHECK:       mov.d	$f20, $f14
+ 0x46 0x00 0xd8 0x86 	# CHECK:       mov.s	$f2, $f27
+ 0x00 0x80 0xf0 0x21 	# CHECK:       move	$fp, $4
+ 0x00 0xc0 0xc8 0x21 	# CHECK:       move	$25, $6
+ 0x44 0x9e 0x48 0x00 	# CHECK:       mtc1	$fp, $f9
+ 0x02 0x20 0x00 0x11 	# CHECK:       mthi	$17
+ 0x03 0xa0 0x00 0x13 	# CHECK:       mtlo	$sp
+ 0x03 0x20 0x00 0x13 	# CHECK:       mtlo	$25
+ 0x46 0x30 0xa5 0x02 	# CHECK:       mul.d	$f20, $f20, $f16
+ 0x46 0x02 0x57 0x82 	# CHECK:       mul.s	$f30, $f10, $f2
+ 0x03 0xb4 0x00 0x18 	# CHECK:       mult	$sp, $20
+ 0x03 0xa2 0x00 0x18 	# CHECK:       mult	$sp, $2
+ 0x03 0x9a 0x00 0x19 	# CHECK:       multu	$gp, $26
+ 0x01 0x32 0x00 0x19 	# CHECK:       multu	$9, $18
+ 0x00 0x02 0x10 0x23 	# CHECK:       negu	$2, $2
+ 0x00 0x03 0x10 0x23 	# CHECK:       negu	$2, $3
+ 0x46 0x20 0x96 0x87 	# CHECK:       neg.d	$f26, $f18
+ 0x46 0x00 0x78 0x47 	# CHECK:       neg.s	$f1, $f15
+ 0x00 0x00 0x00 0x00 	# CHECK:       nop
+ 0x00 0x07 0x38 0x27 	# CHECK:       nor	$7, $zero, $7
+ 0x02 0x1d 0x60 0x25 	# CHECK:       or	$12, $16, $sp
+ 0x34 0x42 0x00 0x04 	# CHECK:       ori	$2, $2, 4
+ 0xa1 0xd6 0xb2 0x6f 	# CHECK:       sb	$22, -19857($14)
+ 0xa5 0xee 0xe5 0xd0 	# CHECK:       sh	$14, -6704($15)
+ 0x00 0x07 0x3c 0x80 	# CHECK:       sll	$7, $7, 18
+ 0x00 0x00 0x3c 0x80 	# CHECK:       sll	$7, $zero, 18
+ 0x01 0x20 0x38 0x04 	# CHECK:       sllv	$7, $zero, $9
+ 0x01 0x20 0x38 0x04 	# CHECK:       sllv	$7, $zero, $9
+ 0x01 0x7b 0xb8 0x2a 	# CHECK:       slt	$23, $11, $27
+ 0x29 0x51 0x25 0x11 	# CHECK:       slti	$17, $10, 9489
+ 0x2f 0x39 0xc3 0x55 	# CHECK:       sltiu	$25, $25, -15531
+ 0x02 0xab 0xa0 0x2b 	# CHECK:       sltu	$20, $21, $11
+ 0x2f 0x38 0xc3 0x55 	# CHECK:       sltiu	$24, $25, -15531
+ 0x00 0x11 0x8b 0xc3 	# CHECK:       sra	$17, $17, 15
+ 0x00 0x17 0x8b 0xc3 	# CHECK:       sra	$17, $23, 15
+ 0x03 0xb7 0x88 0x07 	# CHECK:       srav	$17, $23, $sp
+ 0x03 0xb7 0x88 0x07 	# CHECK:       srav	$17, $23, $sp
+ 0x00 0x02 0x11 0xc2 	# CHECK:       srl	$2, $2, 7
+ 0x00 0x02 0x11 0xc2 	# CHECK:       srl	$2, $2, 7
+ 0x00 0x94 0xc8 0x06 	# CHECK:       srlv	$25, $20, $4
+ 0x00 0x94 0xc8 0x06 	# CHECK:       srlv	$25, $20, $4
+ 0x00 0x00 0x00 0x40 	# CHECK:       ssnop
+ 0x02 0x6c 0xb0 0x22 	# CHECK:       sub	$22, $19, $12
+ 0x22 0x36 0x0c 0x36 	# CHECK:       addi	$22, $17, 3126
+ 0x21 0xad 0xe6 0x90 	# CHECK:       addi	$13, $13, -6512
+ 0x46 0x30 0x14 0x81 	# CHECK:       sub.d	$f18, $f2, $f16
+ 0x46 0x16 0xb5 0xc1 	# CHECK:       sub.s	$f23, $f22, $f22
+ 0x02 0xd6 0xe8 0x23 	# CHECK:       subu	$sp, $22, $22
+ 0xaf 0xbf 0xd8 0x50 	# CHECK:       sw	$ra, -10160($sp)
+ 0xe7 0x06 0xde 0xef 	# CHECK:       swc1	$f6, -8465($24)
+ 0xea 0x19 0x61 0x30 	# CHECK:       swc2	$25, 24880($16)
+ 0xaa 0x6f 0x35 0x7e 	# CHECK:       swl	$15, 13694($19)
+ 0xb9 0xd1 0x98 0x22 	# CHECK:       swr	$17, -26590($14)
+ 0x42 0x00 0x00 0x08 	# CHECK:       tlbp
+ 0x42 0x00 0x00 0x01 	# CHECK:       tlbr
+ 0x42 0x00 0x00 0x02 	# CHECK:       tlbwi
+ 0x42 0x00 0x00 0x06 	# CHECK:       tlbwr
+ 0x00 0x9e 0x90 0x26 	# CHECK:       xor	$18, $4, $fp
diff --git a/test/MC/Disassembler/Mips/mips1/valid-xfail.txt b/test/MC/Disassembler/Mips/mips1/valid-xfail.txt
new file mode 100644
index 000000000000..b753f4d8a8ee
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips1/valid-xfail.txt
@@ -0,0 +1,5 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips1 | FileCheck %s
+# XFAIL: *
+
+0xc2 0x44 0xe3 0x67   # CHECK:     lwc0    $4,-7321($18)
+0xe2 0x64 0x49 0xd8   # CHECK:     swc0    $4,18904($19)
diff --git a/test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt b/test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt
new file mode 100644
index 000000000000..8722d43a7d4e
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt
@@ -0,0 +1,159 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -disassemble -mcpu=mips2 | FileCheck %s
+# CHECK: .text
+0x85 0xc1 0x20 0x46  # CHECK: abs.d	$f6, $f24
+0x45 0x82 0x00 0x46  # CHECK: abs.s	$f9, $f16
+0x20 0xb8 0x45 0x02  # CHECK: add	$23, $18, $5
+0x48 0x3b 0xc9 0x21  # CHECK: addi	$9, $14, 15176
+0xe7 0xe3 0x18 0x23  # CHECK: addi	$24, $24, -7193
+0x00 0x30 0x3c 0x46  # CHECK: add.d	$f0, $f6, $f28
+0x00 0xaa 0x18 0x46  # CHECK: add.s	$f8, $f21, $f24
+0xd2 0x66 0x2d 0x21  # CHECK: addi	$13, $9, 26322
+0xfe 0xff 0x08 0x21  # CHECK: addi	$8, $8, -2
+0x21 0x48 0x86 0x00  # CHECK: addu	$9, $4, $6
+0x0a 0x00 0x29 0x25  # CHECK: addiu	$9, $9, 10
+0x24 0xb8 0x4c 0x00  # CHECK: and	$23, $2, $12
+0x04 0x00 0x42 0x30  # CHECK: andi	$2, $2, 4
+0x01 0x00 0x00 0x45  # CHECK: bc1f	 8
+0x0c 0x00 0x02 0x45  # CHECK: bc1fl	 52
+0x01 0x00 0x01 0x45  # CHECK: bc1t	 8
+0xf4 0xf7 0x03 0x45  # CHECK: bc1tl	 -8236
+0x9b 0x14 0x11 0x04  # CHECK: bal	21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x9b 0x14 0xd0 0x04  # CHECK: bltzal	$6, 21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x40 0x0c 0xd3 0x51  # CHECK: beql	$14, $19, 12548
+0x1f 0x07 0x93 0x05  # CHECK: bgezall	$12, 7296
+0x4d 0xf9 0x83 0x04  # CHECK: bgezl	$4, -6856
+0x59 0xfc 0x40 0x5d  # CHECK: bgtzl	$10, -3736
+0xe7 0x02 0xc0 0x58  # CHECK: blezl	$6, 2976
+0x7a 0x00 0xd2 0x04  # CHECK: bltzall	$6, 492
+0x45 0xf6 0x22 0x06  # CHECK: bltzl	$17, -9960
+0xfc 0x04 0x94 0x57  # CHECK: bnel	$gp, $20, 5108
+0x3b 0xe0 0x3c 0x46  # CHECK: c.ngl.d	$f28, $f28
+0x39 0x00 0x30 0x46  # CHECK: c.ngle.d	$f0, $f16
+0x38 0xf0 0x20 0x46  # CHECK: c.sf.d	$f30, $f0
+0x38 0x70 0x16 0x46  # CHECK: c.sf.s	$f14, $f22
+0xce 0xc2 0x20 0x46  # CHECK: ceil.w.d	$f11, $f24
+0x8e 0xa1 0x00 0x46  # CHECK: ceil.w.s	$f6, $f20
+0x00 0xa8 0x51 0x44  # CHECK: cfc1	$17, $21
+0x00 0xd0 0xc6 0x44  # CHECK: ctc1	$6, $26
+0xa1 0xe5 0x00 0x46  # CHECK: cvt.d.s	$f22, $f28
+0xa1 0x5e 0x80 0x46  # CHECK: cvt.d.w	$f26, $f11
+0xa0 0x46 0x20 0x46  # CHECK: cvt.s.d	$f26, $f8
+0xa0 0x7d 0x80 0x46  # CHECK: cvt.s.w	$f22, $f15
+0x24 0x75 0x20 0x46  # CHECK: cvt.w.d	$f20, $f14
+0x24 0xc5 0x00 0x46  # CHECK: cvt.w.s	$f20, $f24
+0x1a 0x00 0x2b 0x03  # CHECK: div	$zero, $25, $11
+0x03 0xa7 0x3a 0x46  # CHECK: div.d	$f28, $f20, $f26
+0x03 0x29 0x0f 0x46  # CHECK: div.s	$f4, $f5, $f15
+0x1b 0x00 0x2f 0x03  # CHECK: divu	$zero, $25, $15
+0xc0 0x00 0x00 0x00  # CHECK: ehb
+0x8f 0x53 0x20 0x46  # CHECK: floor.w.d	$f14, $f10
+0x0f 0x4a 0x00 0x46  # CHECK: floor.w.s	$f8, $f9
+0x4d 0xc7 0x58 0x81  # CHECK: lb	$24, -14515($10)
+0xf3 0x75 0x68 0x90  # CHECK: lbu	$8, 30195($3)
+0x07 0x40 0x0a 0xd6  # CHECK: ldc1	$f10, 16391($16)
+0x43 0xad 0x28 0xd8  # CHECK: ldc2	$8, -21181($1)
+0x1b 0x90 0x3d 0xde  # CHECK: ldc3	$29, -28645($17)
+0x94 0xde 0xab 0x86  # CHECK: lh	$11, -8556($21)
+0xbd 0xa6 0x53 0x94  # CHECK: lhu	$19, -22851($2)
+0xb3 0x8b 0x01 0x24  # CHECK: addiu	$1, $zero, -29773
+0x3f 0x8b 0x00 0x24  # CHECK: addiu	$zero, $zero, -29889
+0x67 0xe3 0x42 0xc2  # CHECK: ll	$2, -7321($18)
+0x2a 0x16 0xa8 0x8c  # CHECK: lw	$8, 5674($5)
+0xf1 0x27 0x50 0xc7  # CHECK: lwc1	$f16, 10225($26)
+0xb7 0xfc 0xd2 0xc8  # CHECK: lwc2	$18, -841($6)
+0xf7 0x81 0x4a 0xcf  # CHECK: lwc3	$10, -32265($26)
+0x79 0xef 0xf4 0x89  # CHECK: lwl	$20, -4231($15)
+0x35 0xb5 0x80 0x9b  # CHECK: lwr	$zero, -19147($gp)
+0x00 0xd8 0x07 0x44  # CHECK: mfc1	$7, $f27
+0x10 0x98 0x00 0x00  # CHECK: mfhi	$19
+0x10 0xe8 0x00 0x00  # CHECK: mfhi	$sp
+0x12 0x88 0x00 0x00  # CHECK: mflo	$17
+0x06 0x75 0x20 0x46  # CHECK: mov.d	$f20, $f14
+0x86 0xd8 0x00 0x46  # CHECK: mov.s	$f2, $f27
+0x21 0xf0 0x80 0x00  # CHECK: move	 $fp, $4
+0x21 0xc8 0xc0 0x00  # CHECK: move	 $25, $6
+0x00 0x48 0x9e 0x44  # CHECK: mtc1	$fp, $f9
+0x11 0x00 0x20 0x02  # CHECK: mthi	$17
+0x13 0x00 0xa0 0x03  # CHECK: mtlo	$sp
+0x13 0x00 0x20 0x03  # CHECK: mtlo	$25
+0x02 0xa5 0x30 0x46  # CHECK: mul.d	$f20, $f20, $f16
+0x82 0x57 0x02 0x46  # CHECK: mul.s	$f30, $f10, $f2
+0x18 0x00 0xb4 0x03  # CHECK: mult	$sp, $20
+0x18 0x00 0xa2 0x03  # CHECK: mult	$sp, $2
+0x19 0x00 0x9a 0x03  # CHECK: multu	$gp, $26
+0x19 0x00 0x32 0x01  # CHECK: multu	$9, $18
+0x23 0x10 0x02 0x00  # CHECK: negu	 $2, $2
+0x23 0x10 0x03 0x00  # CHECK: negu	 $2, $3
+0x87 0x96 0x20 0x46  # CHECK: neg.d	$f26, $f18
+0x47 0x78 0x00 0x46  # CHECK: neg.s	$f1, $f15
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x27 0x38 0x07 0x00  # CHECK: nor	$7, $zero, $7
+0x25 0x60 0x1d 0x02  # CHECK: or	$12, $16, $sp
+0x04 0x00 0x42 0x34  # CHECK: ori	$2, $2, 4
+0x8c 0x21 0x20 0x46  # CHECK: round.w.d	$f6, $f4
+0xcc 0xe6 0x00 0x46  # CHECK: round.w.s	$f27, $f28
+0x6f 0xb2 0xd6 0xa1  # CHECK: sb	$22, -19857($14)
+0xd8 0x49 0x6f 0xe2  # CHECK: sc	$15, 18904($19)
+0x6e 0x77 0xbe 0xf5  # CHECK: sdc1	$f30, 30574($13)
+0x75 0x5a 0x54 0xfa  # CHECK: sdc2	$20, 23157($18)
+0xcb 0x16 0x4c 0xfd  # CHECK: sdc3	$12, 5835($10)
+0xd0 0xe5 0xee 0xa5  # CHECK: sh	$14, -6704($15)
+0x80 0x3c 0x07 0x00  # CHECK: sll	$7, $7, 18
+0x80 0x3c 0x00 0x00  # CHECK: sll	$7, $zero, 18
+0x04 0x38 0x20 0x01  # CHECK: sllv	$7, $zero, $9
+0x04 0x38 0x20 0x01  # CHECK: sllv	$7, $zero, $9
+0x2a 0xb8 0x7b 0x01  # CHECK: slt	$23, $11, $27
+0x11 0x25 0x51 0x29  # CHECK: slti	$17, $10, 9489
+0x55 0xc3 0x39 0x2f  # CHECK: sltiu	$25, $25, -15531
+0x2b 0xa0 0xab 0x02  # CHECK: sltu	$20, $21, $11
+0x55 0xc3 0x38 0x2f  # CHECK: sltiu	$24, $25, -15531
+0x04 0xb4 0x20 0x46  # CHECK: sqrt.d	$f16, $f22
+0x04 0x08 0x00 0x46  # CHECK: sqrt.s	$f0, $f1
+0xc3 0x8b 0x11 0x00  # CHECK: sra	$17, $17, 15
+0xc3 0x8b 0x17 0x00  # CHECK: sra	$17, $23, 15
+0x07 0x88 0xb7 0x03  # CHECK: srav	$17, $23, $sp
+0x07 0x88 0xb7 0x03  # CHECK: srav	$17, $23, $sp
+0xc2 0x11 0x02 0x00  # CHECK: srl	$2, $2, 7
+0xc2 0x11 0x02 0x00  # CHECK: srl	$2, $2, 7
+0x06 0xc8 0x94 0x00  # CHECK: srlv	$25, $20, $4
+0x06 0xc8 0x94 0x00  # CHECK: srlv	$25, $20, $4
+0x40 0x00 0x00 0x00  # CHECK: ssnop
+0x22 0xb0 0x6c 0x02  # CHECK: sub	$22, $19, $12
+0x36 0x0c 0x36 0x22  # CHECK: addi	$22, $17, 3126
+0x90 0xe6 0xad 0x21  # CHECK: addi	$13, $13, -6512
+0x81 0x14 0x30 0x46  # CHECK: sub.d	$f18, $f2, $f16
+0xc1 0xb5 0x16 0x46  # CHECK: sub.s	$f23, $f22, $f22
+0x23 0xe8 0xd6 0x02  # CHECK: subu	$sp, $22, $22
+0x50 0xd8 0xbf 0xaf  # CHECK: sw	$ra, -10160($sp)
+0xef 0xde 0x06 0xe7  # CHECK: swc1	$f6, -8465($24)
+0x30 0x61 0x19 0xea  # CHECK: swc2	$25, 24880($16)
+0xf7 0x81 0x4a 0xef  # CHECK: swc3	$10, -32265($26)
+0x7e 0x35 0x6f 0xaa  # CHECK: swl	$15, 13694($19)
+0x22 0x98 0xd1 0xb9  # CHECK: swr	$17, -26590($14)
+0x34 0x00 0x03 0x00  # CHECK: teq	 $zero, $3
+0x34 0x9b 0xa7 0x00  # CHECK: teq	$5, $7, 620
+0xa0 0xbb 0xac 0x06  # CHECK: teqi	$21, 48032
+0x30 0x00 0xea 0x00  # CHECK: tge	 $7, $10
+0x30 0x55 0xb3 0x00  # CHECK: tge	$5, $19, 340
+0xa1 0x13 0x28 0x06  # CHECK: tgei	$17, 5025
+0x33 0x90 0xa9 0x07  # CHECK: tgeiu	$sp, 36915
+0x31 0x00 0xdc 0x02  # CHECK: tgeu	 $22, $gp
+0xf1 0x5e 0x8e 0x02  # CHECK: tgeu	$20, $14, 379
+0x08 0x00 0x00 0x42  # CHECK: tlbp
+0x01 0x00 0x00 0x42  # CHECK: tlbr
+0x02 0x00 0x00 0x42  # CHECK: tlbwi
+0x06 0x00 0x00 0x42  # CHECK: tlbwr
+0x32 0x00 0xed 0x01  # CHECK: tlt	 $15, $13
+0x72 0x21 0x53 0x00  # CHECK: tlt	$2, $19, 133
+0xbd 0xad 0xca 0x05  # CHECK: tlti	$14, 44477
+0x2c 0xec 0xeb 0x07  # CHECK: tltiu	$ra, 60460
+0x33 0x00 0x70 0x01  # CHECK: tltu	 $11, $16
+0x33 0xfe 0x1d 0x02  # CHECK: tltu	$16, $sp, 1016
+0x36 0x00 0xd1 0x00  # CHECK: tne	 $6, $17
+0x76 0xdd 0xe8 0x00  # CHECK: tne	$7, $8, 885
+0x31 0x8c 0x8e 0x05  # CHECK: tnei	$12, 35889
+0x8d 0x75 0x20 0x46  # CHECK: trunc.w.d	$f22, $f14
+0x0d 0xf7 0x00 0x46  # CHECK: trunc.w.s	$f28, $f30
+0x26 0x90 0x9e 0x00  # CHECK: xor	$18, $4, $fp
diff --git a/test/MC/Disassembler/Mips/mips2/valid-mips2.txt b/test/MC/Disassembler/Mips/mips2/valid-mips2.txt
new file mode 100644
index 000000000000..3d20e629ff53
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips2/valid-mips2.txt
@@ -0,0 +1,159 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips2 | FileCheck %s
+# CHECK: .text
+0x46 0x20 0xc1 0x85  # CHECK: abs.d	$f6, $f24
+0x46 0x00 0x82 0x45  # CHECK: abs.s	$f9, $f16
+0x02 0x45 0xb8 0x20  # CHECK: add	$23, $18, $5
+0x21 0xc9 0x3b 0x48  # CHECK: addi	$9, $14, 15176
+0x23 0x18 0xe3 0xe7  # CHECK: addi	$24, $24, -7193
+0x46 0x3c 0x30 0x00  # CHECK: add.d	$f0, $f6, $f28
+0x46 0x18 0xaa 0x00  # CHECK: add.s	$f8, $f21, $f24
+0x21 0x2d 0x66 0xd2  # CHECK: addi	$13, $9, 26322
+0x21 0x08 0xff 0xfe  # CHECK: addi	$8, $8, -2
+0x00 0x86 0x48 0x21  # CHECK: addu	$9, $4, $6
+0x25 0x29 0x00 0x0a  # CHECK: addiu	$9, $9, 10
+0x00 0x4c 0xb8 0x24  # CHECK: and	$23, $2, $12
+0x30 0x42 0x00 0x04  # CHECK: andi	$2, $2, 4
+0x45 0x00 0x00 0x01  # CHECK: bc1f	 8
+0x45 0x02 0x00 0x0c  # CHECK: bc1fl	 52
+0x45 0x01 0x00 0x01  # CHECK: bc1t	 8
+0x45 0x03 0xf7 0xf4  # CHECK: bc1tl	 -8236
+0x04 0x11 0x14 0x9b  # CHECK: bal	21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x04 0xd0 0x14 0x9b  # CHECK: bltzal	$6, 21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x51 0xd3 0x0c 0x40  # CHECK: beql	$14, $19, 12548
+0x05 0x93 0x07 0x1f  # CHECK: bgezall	$12, 7296
+0x04 0x83 0xf9 0x4d  # CHECK: bgezl	$4, -6856
+0x5d 0x40 0xfc 0x59  # CHECK: bgtzl	$10, -3736
+0x58 0xc0 0x02 0xe7  # CHECK: blezl	$6, 2976
+0x04 0xd2 0x00 0x7a  # CHECK: bltzall	$6, 492
+0x06 0x22 0xf6 0x45  # CHECK: bltzl	$17, -9960
+0x57 0x94 0x04 0xfc  # CHECK: bnel	$gp, $20, 5108
+0x46 0x3c 0xe0 0x3b  # CHECK: c.ngl.d	$f28, $f28
+0x46 0x30 0x00 0x39  # CHECK: c.ngle.d	$f0, $f16
+0x46 0x20 0xf0 0x38  # CHECK: c.sf.d	$f30, $f0
+0x46 0x16 0x70 0x38  # CHECK: c.sf.s	$f14, $f22
+0x46 0x20 0xc2 0xce  # CHECK: ceil.w.d	$f11, $f24
+0x46 0x00 0xa1 0x8e  # CHECK: ceil.w.s	$f6, $f20
+0x44 0x51 0xa8 0x00  # CHECK: cfc1	$17, $21
+0x44 0xc6 0xd0 0x00  # CHECK: ctc1	$6, $26
+0x46 0x00 0xe5 0xa1  # CHECK: cvt.d.s	$f22, $f28
+0x46 0x80 0x5e 0xa1  # CHECK: cvt.d.w	$f26, $f11
+0x46 0x20 0x46 0xa0  # CHECK: cvt.s.d	$f26, $f8
+0x46 0x80 0x7d 0xa0  # CHECK: cvt.s.w	$f22, $f15
+0x46 0x20 0x75 0x24  # CHECK: cvt.w.d	$f20, $f14
+0x46 0x00 0xc5 0x24  # CHECK: cvt.w.s	$f20, $f24
+0x03 0x2b 0x00 0x1a  # CHECK: div	$zero, $25, $11
+0x46 0x3a 0xa7 0x03  # CHECK: div.d	$f28, $f20, $f26
+0x46 0x0f 0x29 0x03  # CHECK: div.s	$f4, $f5, $f15
+0x03 0x2f 0x00 0x1b  # CHECK: divu	$zero, $25, $15
+0x00 0x00 0x00 0xc0  # CHECK: ehb
+0x46 0x20 0x53 0x8f  # CHECK: floor.w.d	$f14, $f10
+0x46 0x00 0x4a 0x0f  # CHECK: floor.w.s	$f8, $f9
+0x81 0x58 0xc7 0x4d  # CHECK: lb	$24, -14515($10)
+0x90 0x68 0x75 0xf3  # CHECK: lbu	$8, 30195($3)
+0xd6 0x0a 0x40 0x07  # CHECK: ldc1	$f10, 16391($16)
+0xd8 0x28 0xad 0x43  # CHECK: ldc2	$8, -21181($1)
+0xde 0x3d 0x90 0x1b  # CHECK: ldc3	$29, -28645($17)
+0x86 0xab 0xde 0x94  # CHECK: lh	$11, -8556($21)
+0x94 0x53 0xa6 0xbd  # CHECK: lhu	$19, -22851($2)
+0x24 0x01 0x8b 0xb3  # CHECK: addiu	$1, $zero, -29773
+0x24 0x00 0x8b 0x3f  # CHECK: addiu	$zero, $zero, -29889
+0xc2 0x42 0xe3 0x67  # CHECK: ll	$2, -7321($18)
+0x8c 0xa8 0x16 0x2a  # CHECK: lw	$8, 5674($5)
+0xc7 0x50 0x27 0xf1  # CHECK: lwc1	$f16, 10225($26)
+0xc8 0xd2 0xfc 0xb7  # CHECK: lwc2	$18, -841($6)
+0xcf 0x4a 0x81 0xf7  # CHECK: lwc3	$10, -32265($26)
+0x89 0xf4 0xef 0x79  # CHECK: lwl	$20, -4231($15)
+0x9b 0x80 0xb5 0x35  # CHECK: lwr	$zero, -19147($gp)
+0x44 0x07 0xd8 0x00  # CHECK: mfc1	$7, $f27
+0x00 0x00 0x98 0x10  # CHECK: mfhi	$19
+0x00 0x00 0xe8 0x10  # CHECK: mfhi	$sp
+0x00 0x00 0x88 0x12  # CHECK: mflo	$17
+0x46 0x20 0x75 0x06  # CHECK: mov.d	$f20, $f14
+0x46 0x00 0xd8 0x86  # CHECK: mov.s	$f2, $f27
+0x00 0x80 0xf0 0x21  # CHECK: move	 $fp, $4
+0x00 0xc0 0xc8 0x21  # CHECK: move	 $25, $6
+0x44 0x9e 0x48 0x00  # CHECK: mtc1	$fp, $f9
+0x02 0x20 0x00 0x11  # CHECK: mthi	$17
+0x03 0xa0 0x00 0x13  # CHECK: mtlo	$sp
+0x03 0x20 0x00 0x13  # CHECK: mtlo	$25
+0x46 0x30 0xa5 0x02  # CHECK: mul.d	$f20, $f20, $f16
+0x46 0x02 0x57 0x82  # CHECK: mul.s	$f30, $f10, $f2
+0x03 0xb4 0x00 0x18  # CHECK: mult	$sp, $20
+0x03 0xa2 0x00 0x18  # CHECK: mult	$sp, $2
+0x03 0x9a 0x00 0x19  # CHECK: multu	$gp, $26
+0x01 0x32 0x00 0x19  # CHECK: multu	$9, $18
+0x00 0x02 0x10 0x23  # CHECK: negu	 $2, $2
+0x00 0x03 0x10 0x23  # CHECK: negu	 $2, $3
+0x46 0x20 0x96 0x87  # CHECK: neg.d	$f26, $f18
+0x46 0x00 0x78 0x47  # CHECK: neg.s	$f1, $f15
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x00 0x07 0x38 0x27  # CHECK: nor	$7, $zero, $7
+0x02 0x1d 0x60 0x25  # CHECK: or	$12, $16, $sp
+0x34 0x42 0x00 0x04  # CHECK: ori	$2, $2, 4
+0x46 0x20 0x21 0x8c  # CHECK: round.w.d	$f6, $f4
+0x46 0x00 0xe6 0xcc  # CHECK: round.w.s	$f27, $f28
+0xa1 0xd6 0xb2 0x6f  # CHECK: sb	$22, -19857($14)
+0xe2 0x6f 0x49 0xd8  # CHECK: sc	$15, 18904($19)
+0xf5 0xbe 0x77 0x6e  # CHECK: sdc1	$f30, 30574($13)
+0xfa 0x54 0x5a 0x75  # CHECK: sdc2	$20, 23157($18)
+0xfd 0x4c 0x16 0xcb  # CHECK: sdc3	$12, 5835($10)
+0xa5 0xee 0xe5 0xd0  # CHECK: sh	$14, -6704($15)
+0x00 0x07 0x3c 0x80  # CHECK: sll	$7, $7, 18
+0x00 0x00 0x3c 0x80  # CHECK: sll	$7, $zero, 18
+0x01 0x20 0x38 0x04  # CHECK: sllv	$7, $zero, $9
+0x01 0x20 0x38 0x04  # CHECK: sllv	$7, $zero, $9
+0x01 0x7b 0xb8 0x2a  # CHECK: slt	$23, $11, $27
+0x29 0x51 0x25 0x11  # CHECK: slti	$17, $10, 9489
+0x2f 0x39 0xc3 0x55  # CHECK: sltiu	$25, $25, -15531
+0x02 0xab 0xa0 0x2b  # CHECK: sltu	$20, $21, $11
+0x2f 0x38 0xc3 0x55  # CHECK: sltiu	$24, $25, -15531
+0x46 0x20 0xb4 0x04  # CHECK: sqrt.d	$f16, $f22
+0x46 0x00 0x08 0x04  # CHECK: sqrt.s	$f0, $f1
+0x00 0x11 0x8b 0xc3  # CHECK: sra	$17, $17, 15
+0x00 0x17 0x8b 0xc3  # CHECK: sra	$17, $23, 15
+0x03 0xb7 0x88 0x07  # CHECK: srav	$17, $23, $sp
+0x03 0xb7 0x88 0x07  # CHECK: srav	$17, $23, $sp
+0x00 0x02 0x11 0xc2  # CHECK: srl	$2, $2, 7
+0x00 0x02 0x11 0xc2  # CHECK: srl	$2, $2, 7
+0x00 0x94 0xc8 0x06  # CHECK: srlv	$25, $20, $4
+0x00 0x94 0xc8 0x06  # CHECK: srlv	$25, $20, $4
+0x00 0x00 0x00 0x40  # CHECK: ssnop
+0x02 0x6c 0xb0 0x22  # CHECK: sub	$22, $19, $12
+0x22 0x36 0x0c 0x36  # CHECK: addi	$22, $17, 3126
+0x21 0xad 0xe6 0x90  # CHECK: addi	$13, $13, -6512
+0x46 0x30 0x14 0x81  # CHECK: sub.d	$f18, $f2, $f16
+0x46 0x16 0xb5 0xc1  # CHECK: sub.s	$f23, $f22, $f22
+0x02 0xd6 0xe8 0x23  # CHECK: subu	$sp, $22, $22
+0xaf 0xbf 0xd8 0x50  # CHECK: sw	$ra, -10160($sp)
+0xe7 0x06 0xde 0xef  # CHECK: swc1	$f6, -8465($24)
+0xea 0x19 0x61 0x30  # CHECK: swc2	$25, 24880($16)
+0xef 0x4a 0x81 0xf7  # CHECK: swc3	$10, -32265($26)
+0xaa 0x6f 0x35 0x7e  # CHECK: swl	$15, 13694($19)
+0xb9 0xd1 0x98 0x22  # CHECK: swr	$17, -26590($14)
+0x00 0x03 0x00 0x34  # CHECK: teq	 $zero, $3
+0x00 0xa7 0x9b 0x34  # CHECK: teq	$5, $7, 620
+0x06 0xac 0xbb 0xa0  # CHECK: teqi	$21, 48032
+0x00 0xea 0x00 0x30  # CHECK: tge	 $7, $10
+0x00 0xb3 0x55 0x30  # CHECK: tge	$5, $19, 340
+0x06 0x28 0x13 0xa1  # CHECK: tgei	$17, 5025
+0x07 0xa9 0x90 0x33  # CHECK: tgeiu	$sp, 36915
+0x02 0xdc 0x00 0x31  # CHECK: tgeu	 $22, $gp
+0x02 0x8e 0x5e 0xf1  # CHECK: tgeu	$20, $14, 379
+0x42 0x00 0x00 0x08  # CHECK: tlbp
+0x42 0x00 0x00 0x01  # CHECK: tlbr
+0x42 0x00 0x00 0x02  # CHECK: tlbwi
+0x42 0x00 0x00 0x06  # CHECK: tlbwr
+0x01 0xed 0x00 0x32  # CHECK: tlt	 $15, $13
+0x00 0x53 0x21 0x72  # CHECK: tlt	$2, $19, 133
+0x05 0xca 0xad 0xbd  # CHECK: tlti	$14, 44477
+0x07 0xeb 0xec 0x2c  # CHECK: tltiu	$ra, 60460
+0x01 0x70 0x00 0x33  # CHECK: tltu	 $11, $16
+0x02 0x1d 0xfe 0x33  # CHECK: tltu	$16, $sp, 1016
+0x00 0xd1 0x00 0x36  # CHECK: tne	 $6, $17
+0x00 0xe8 0xdd 0x76  # CHECK: tne	$7, $8, 885
+0x05 0x8e 0x8c 0x31  # CHECK: tnei	$12, 35889
+0x46 0x20 0x75 0x8d  # CHECK: trunc.w.d	$f22, $f14
+0x46 0x00 0xf7 0x0d  # CHECK: trunc.w.s	$f28, $f30
+0x00 0x9e 0x90 0x26  # CHECK: xor	$18, $4, $fp
diff --git a/test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt b/test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt
new file mode 100644
index 000000000000..43397cb633ae
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt
@@ -0,0 +1,209 @@
+# RUN: llvm-mc %s -triple=mips64el-unknown-linux -disassemble -mcpu=mips3 | FileCheck %s
+# CHECK: .text
+0x85 0xc1 0x20 0x46 # CHECK: abs.d	$f6, $f24
+0x45 0x82 0x00 0x46 # CHECK: abs.s	$f9, $f16
+0x20 0xb8 0x45 0x02 # CHECK: add	$23, $18, $5
+0x48 0x3b 0xc9 0x21 # CHECK: addi	$9, $14, 15176
+0xe7 0xe3 0x18 0x23 # CHECK: addi	$24, $24, -7193
+0x00 0x30 0x3c 0x46 # CHECK: add.d	$f0, $f6, $f28
+0x00 0xaa 0x18 0x46 # CHECK: add.s	$f8, $f21, $f24
+0xd2 0x66 0x2d 0x21 # CHECK: addi	$13, $9, 26322
+0xfe 0xff 0x08 0x21 # CHECK: addi	$8, $8, -2
+0x21 0x48 0x86 0x00 # CHECK: addu	$9, $4, $6
+0x0a 0x00 0x29 0x25 # CHECK: addiu	$9, $9, 10
+0x24 0xb8 0x4c 0x00 # CHECK: and	$23, $2, $12
+0x04 0x00 0x42 0x30 # CHECK: andi	$2, $2, 4
+0x01 0x00 0x00 0x45 # CHECK: bc1f	 8
+0x0c 0x00 0x02 0x45 # CHECK: bc1fl	 52
+0x01 0x00 0x01 0x45 # CHECK: bc1t	 8
+0xf4 0xf7 0x03 0x45 # CHECK: bc1tl	 -8236
+0x9b 0x14 0x11 0x04 # CHECK: bal	21104
+0x00 0x00 0x00 0x00 # CHECK: nop
+0x9b 0x14 0xd0 0x04 # CHECK: bltzal	$6, 21104
+0x00 0x00 0x00 0x00 # CHECK: nop
+0x40 0x0c 0xd3 0x51 # CHECK: beql	$14, $19, 12548
+0x1f 0x07 0x93 0x05 # CHECK: bgezall	$12, 7296
+0x4d 0xf9 0x83 0x04 # CHECK: bgezl	$4, -6856
+0x59 0xfc 0x40 0x5d # CHECK: bgtzl	$10, -3736
+0xe7 0x02 0xc0 0x58 # CHECK: blezl	$6, 2976
+0x7a 0x00 0xd2 0x04 # CHECK: bltzall	$6, 492
+0x45 0xf6 0x22 0x06 # CHECK: bltzl	$17, -9960
+0xfc 0x04 0x94 0x57 # CHECK: bnel	$gp, $20, 5108
+0x08 0x00 0xa1 0xbc # CHECK: cache   1, 8($5)
+0x3b 0xe0 0x3c 0x46 # CHECK: c.ngl.d	$f28, $f28
+0x39 0x00 0x30 0x46 # CHECK: c.ngle.d	$f0, $f16
+0x38 0xf0 0x20 0x46 # CHECK: c.sf.d	$f30, $f0
+0x38 0x70 0x16 0x46 # CHECK: c.sf.s	$f14, $f22
+0x4a 0x18 0x20 0x46 # CHECK: ceil.l.d  $f1, $f3
+0x8a 0x6c 0x00 0x46 # CHECK: ceil.l.s  $f18, $f13
+0xce 0xc2 0x20 0x46 # CHECK: ceil.w.d	$f11, $f24
+0x8e 0xa1 0x00 0x46 # CHECK: ceil.w.s	$f6, $f20
+0x00 0xa8 0x51 0x44 # CHECK: cfc1	$17, $21
+0x00 0xd0 0xc6 0x44 # CHECK: ctc1	$6, $26
+0xa1 0xe5 0x00 0x46 # CHECK: cvt.d.s	$f22, $f28
+0xa1 0x5e 0x80 0x46 # CHECK: cvt.d.w	$f26, $f11
+0x21 0x81 0xa0 0x46 # CHECK: cvt.d.l $f4, $f16
+0x25 0x7e 0x20 0x46 # CHECK: cvt.l.d $f24, $f15
+0xe5 0xea 0x00 0x46 # CHECK: cvt.l.s $f11, $f29
+0xe0 0xf3 0xa0 0x46 # CHECK: cvt.s.l $f15, $f30
+0xa0 0x46 0x20 0x46 # CHECK: cvt.s.d	$f26, $f8
+0xa0 0x7d 0x80 0x46 # CHECK: cvt.s.w	$f22, $f15
+0x24 0x75 0x20 0x46 # CHECK: cvt.w.d	$f20, $f14
+0x24 0xc5 0x00 0x46 # CHECK: cvt.w.s	$f20, $f24
+0x2c 0x98 0x3f 0x00 # CHECK: dadd    $19, $1, $ra
+0xc7 0x93 0x9d 0x62 # CHECK: daddi   $sp, $20, -27705
+0xc7 0x93 0xbd 0x63 # CHECK: daddi   $sp, $sp, -27705
+0xc7 0x93 0x9d 0x62 # CHECK: daddi   $sp, $20, -27705
+0xc7 0x93 0x9d 0x62 # CHECK: daddi   $sp, $20, -27705
+0xc7 0x93 0xbd 0x63 # CHECK: daddi   $sp, $sp, -27705
+0x16 0xee 0xda 0x66 # CHECK: daddiu  $26, $22, -4586
+0x2d 0x98 0x3f 0x00 # CHECK: daddu   $19, $1, $ra
+0x9f 0x46 0x58 0x64 # CHECK: daddiu  $24, $2, 18079
+0x3f 0x69 0x73 0x66 # CHECK: daddiu  $19, $19, 26943
+0x1e 0x00 0x53 0x03 # CHECK: ddiv    $zero, $26, $19
+0x1f 0x00 0x11 0x02 # CHECK: ddivu   $zero, $16, $17
+0x1a 0x00 0x2b 0x03 # CHECK: div	$zero, $25, $11
+0x03 0xa7 0x3a 0x46 # CHECK: div.d	$f28, $f20, $f26
+0x03 0x29 0x0f 0x46 # CHECK: div.s	$f4, $f5, $f15
+0x1b 0x00 0x2f 0x03 # CHECK: divu	$zero, $25, $15
+0x00 0x68 0x2c 0x44 # CHECK: dmfc1   $12, $f13
+0x00 0x70 0xb0 0x44 # CHECK: dmtc1   $16, $f14
+0x1c 0x00 0xe9 0x02 # CHECK: dmult   $23, $9
+0x1d 0x00 0xa6 0x00 # CHECK: dmultu  $5, $6
+0xb8 0x04 0x00 0x00 # CHECK: dsll    $zero, $zero, 18
+0xb8 0x04 0x14 0x00 # CHECK: dsll    $zero, $20, 18
+0x14 0x00 0x94 0x01 # CHECK: dsllv   $zero, $20, $12
+0xbc 0x04 0x00 0x00 # CHECK: dsll32  $zero, $zero, 18
+0xbc 0x04 0x00 0x00 # CHECK: dsll32  $zero, $zero, 18
+0x14 0x00 0x94 0x01 # CHECK: dsllv   $zero, $20, $12
+0xbb 0xe2 0x1c 0x00 # CHECK: dsra    $gp, $gp, 10
+0xbb 0xe2 0x12 0x00 # CHECK: dsra    $gp, $18, 10
+0x17 0xe0 0x72 0x02 # CHECK: dsrav   $gp, $18, $19
+0xbf 0xe2 0x1c 0x00 # CHECK: dsra32  $gp, $gp, 10
+0xbf 0xe2 0x12 0x00 # CHECK: dsra32  $gp, $18, 10
+0x17 0xe0 0x72 0x02 # CHECK: dsrav   $gp, $18, $19
+0xfa 0x9d 0x13 0x00 # CHECK: dsrl    $19, $19, 23
+0xfa 0x9d 0x06 0x00 # CHECK: dsrl    $19, $6, 23
+0x16 0x98 0x86 0x02 # CHECK: dsrlv   $19, $6, $20
+0xfe 0x9d 0x13 0x00 # CHECK: dsrl32  $19, $19, 23
+0xfe 0x9d 0x06 0x00 # CHECK: dsrl32  $19, $6, 23
+0x16 0x98 0x86 0x02 # CHECK: dsrlv   $19, $6, $20
+0x2e 0x38 0xc8 0x02 # CHECK: dsub    $7, $22, $8
+0x2f 0x28 0xba 0x00 # CHECK: dsubu   $5, $5, $26
+0xc0 0x00 0x00 0x00 # CHECK: ehb
+0x18 0x00 0x00 0x42 # CHECK: eret
+0x8f 0x53 0x20 0x46 # CHECK: floor.w.d	$f14, $f10
+0x0f 0x4a 0x00 0x46 # CHECK: floor.w.s	$f8, $f9
+0x8b 0x3e 0x20 0x46 # CHECK: floor.l.d $f26, $f7
+0x0b 0x2b 0x00 0x46 # CHECK: floor.l.s $f12, $f5
+0x4d 0xc7 0x58 0x81 # CHECK: lb	$24, -14515($10)
+0xf3 0x75 0x68 0x90 # CHECK: lbu	$8, 30195($3)
+0x07 0x40 0x0a 0xd6 # CHECK: ldc1	$f10, 16391($16)
+0x43 0xad 0x28 0xd8 # CHECK: ldc2	$8, -21181($1)
+0x94 0xde 0xab 0x86 # CHECK: lh	$11, -8556($21)
+0xbd 0xa6 0x53 0x94 # CHECK: lhu	$19, -22851($2)
+0xb3 0x8b 0x01 0x24 # CHECK: addiu	$1, $zero, -29773
+0x3f 0x8b 0x00 0x24 # CHECK: addiu	$zero, $zero, -29889
+0x67 0xe3 0x42 0xc2 # CHECK: ll	$2, -7321($18)
+0x2a 0x16 0xa8 0x8c # CHECK: lw	$8, 5674($5)
+0xf1 0x27 0x50 0xc7 # CHECK: lwc1	$f16, 10225($26)
+0xb7 0xfc 0xd2 0xc8 # CHECK: lwc2	$18, -841($6)
+0x79 0xef 0xf4 0x89 # CHECK: lwl	$20, -4231($15)
+0x35 0xb5 0x80 0x9b # CHECK: lwr	$zero, -19147($gp)
+0x00 0xd8 0x07 0x44 # CHECK: mfc1	$7, $f27
+0x10 0x98 0x00 0x00 # CHECK: mfhi	$19
+0x10 0xe8 0x00 0x00 # CHECK: mfhi	$sp
+0x12 0x88 0x00 0x00 # CHECK: mflo	$17
+0x06 0x75 0x20 0x46 # CHECK: mov.d	$f20, $f14
+0x86 0xd8 0x00 0x46 # CHECK: mov.s	$f2, $f27
+0x21 0xf0 0x80 0x00 # CHECK: move	 $fp, $4
+0x21 0xc8 0xc0 0x00 # CHECK: move	 $25, $6
+0x00 0x48 0x9e 0x44 # CHECK: mtc1	$fp, $f9
+0x11 0x00 0x20 0x02 # CHECK: mthi	$17
+0x13 0x00 0xa0 0x03 # CHECK: mtlo	$sp
+0x13 0x00 0x20 0x03 # CHECK: mtlo	$25
+0x02 0xa5 0x30 0x46 # CHECK: mul.d	$f20, $f20, $f16
+0x82 0x57 0x02 0x46 # CHECK: mul.s	$f30, $f10, $f2
+0x18 0x00 0xb4 0x03 # CHECK: mult	$sp, $20
+0x18 0x00 0xa2 0x03 # CHECK: mult	$sp, $2
+0x19 0x00 0x9a 0x03 # CHECK: multu	$gp, $26
+0x19 0x00 0x32 0x01 # CHECK: multu	$9, $18
+0x23 0x10 0x02 0x00 # CHECK: negu	 $2, $2
+0x23 0x10 0x03 0x00 # CHECK: negu	 $2, $3
+0x87 0x96 0x20 0x46 # CHECK: neg.d	$f26, $f18
+0x47 0x78 0x00 0x46 # CHECK: neg.s	$f1, $f15
+0x00 0x00 0x00 0x00 # CHECK: nop
+0x27 0x38 0x07 0x00 # CHECK: nor	$7, $zero, $7
+0x25 0x60 0x1d 0x02 # CHECK: or	$12, $16, $sp
+0x04 0x00 0x42 0x34 # CHECK: ori	$2, $2, 4
+0x08 0x0b 0x20 0x46 # CHECK: round.l.d $f12, $f1
+0x48 0x2e 0x00 0x46 # CHECK: round.l.s $f25, $f5
+0x8c 0x21 0x20 0x46 # CHECK: round.w.d	$f6, $f4
+0xcc 0xe6 0x00 0x46 # CHECK: round.w.s	$f27, $f28
+0x6f 0xb2 0xd6 0xa1 # CHECK: sb	$22, -19857($14)
+0xd8 0x49 0x6f 0xe2 # CHECK: sc	$15, 18904($19)
+0xcd 0xdf 0xaf 0xf3 # CHECK: scd   $15, -8243($sp)
+0xcb 0x16 0x4c 0xfd # CHECK: sd    $12, 5835($10)
+0x1f 0xae 0xc7 0xb3 # CHECK: sdl   $7, -20961($fp)
+0x39 0xb0 0x8b 0xb5 # CHECK: sdr   $11, -20423($12)
+0x6e 0x77 0xbe 0xf5 # CHECK: sdc1	$f30, 30574($13)
+0x75 0x5a 0x54 0xfa # CHECK: sdc2	$20, 23157($18)
+0xd0 0xe5 0xee 0xa5 # CHECK: sh	$14, -6704($15)
+0x80 0x3c 0x07 0x00 # CHECK: sll	$7, $7, 18
+0x80 0x3c 0x00 0x00 # CHECK: sll	$7, $zero, 18
+0x04 0x38 0x20 0x01 # CHECK: sllv	$7, $zero, $9
+0x04 0x38 0x20 0x01 # CHECK: sllv	$7, $zero, $9
+0x2a 0xb8 0x7b 0x01 # CHECK: slt	$23, $11, $27
+0x11 0x25 0x51 0x29 # CHECK: slti	$17, $10, 9489
+0x55 0xc3 0x39 0x2f # CHECK: sltiu	$25, $25, -15531
+0x2b 0xa0 0xab 0x02 # CHECK: sltu	$20, $21, $11
+0x55 0xc3 0x38 0x2f # CHECK: sltiu	$24, $25, -15531
+0x04 0xb4 0x20 0x46 # CHECK: sqrt.d	$f16, $f22
+0x04 0x08 0x00 0x46 # CHECK: sqrt.s	$f0, $f1
+0xc3 0x8b 0x11 0x00 # CHECK: sra	$17, $17, 15
+0xc3 0x8b 0x17 0x00 # CHECK: sra	$17, $23, 15
+0x07 0x88 0xb7 0x03 # CHECK: srav	$17, $23, $sp
+0x07 0x88 0xb7 0x03 # CHECK: srav	$17, $23, $sp
+0xc2 0x11 0x02 0x00 # CHECK: srl	$2, $2, 7
+0xc2 0x11 0x02 0x00 # CHECK: srl	$2, $2, 7
+0x06 0xc8 0x94 0x00 # CHECK: srlv	$25, $20, $4
+0x06 0xc8 0x94 0x00 # CHECK: srlv	$25, $20, $4
+0x40 0x00 0x00 0x00 # CHECK: ssnop
+0x22 0xb0 0x6c 0x02 # CHECK: sub	$22, $19, $12
+0x36 0x0c 0x36 0x22 # CHECK: addi	$22, $17, 3126
+0x90 0xe6 0xad 0x21 # CHECK: addi	$13, $13, -6512
+0x81 0x14 0x30 0x46 # CHECK: sub.d	$f18, $f2, $f16
+0xc1 0xb5 0x16 0x46 # CHECK: sub.s	$f23, $f22, $f22
+0x23 0xe8 0xd6 0x02 # CHECK: subu	$sp, $22, $22
+0x50 0xd8 0xbf 0xaf # CHECK: sw	$ra, -10160($sp)
+0xef 0xde 0x06 0xe7 # CHECK: swc1	$f6, -8465($24)
+0x30 0x61 0x19 0xea # CHECK: swc2	$25, 24880($16)
+0x7e 0x35 0x6f 0xaa # CHECK: swl	$15, 13694($19)
+0x22 0x98 0xd1 0xb9 # CHECK: swr	$17, -26590($14)
+0x34 0x00 0x03 0x00 # CHECK: teq	 $zero, $3
+0x34 0x9b 0xa7 0x00 # CHECK: teq	$5, $7, 620
+0xa0 0xbb 0xac 0x06 # CHECK: teqi	$21, 48032
+0x30 0x00 0xea 0x00 # CHECK: tge	 $7, $10
+0x30 0x55 0xb3 0x00 # CHECK: tge	$5, $19, 340
+0xa1 0x13 0x28 0x06 # CHECK: tgei	$17, 5025
+0x33 0x90 0xa9 0x07 # CHECK: tgeiu	$sp, 36915
+0x31 0x00 0xdc 0x02 # CHECK: tgeu	 $22, $gp
+0xf1 0x5e 0x8e 0x02 # CHECK: tgeu	$20, $14, 379
+0x08 0x00 0x00 0x42 # CHECK: tlbp
+0x01 0x00 0x00 0x42 # CHECK: tlbr
+0x02 0x00 0x00 0x42 # CHECK: tlbwi
+0x06 0x00 0x00 0x42 # CHECK: tlbwr
+0x32 0x00 0xed 0x01 # CHECK: tlt	 $15, $13
+0x72 0x21 0x53 0x00 # CHECK: tlt	$2, $19, 133
+0xbd 0xad 0xca 0x05 # CHECK: tlti	$14, 44477
+0x2c 0xec 0xeb 0x07 # CHECK: tltiu	$ra, 60460
+0x33 0x00 0x70 0x01 # CHECK: tltu	 $11, $16
+0x33 0xfe 0x1d 0x02 # CHECK: tltu	$16, $sp, 1016
+0x36 0x00 0xd1 0x00 # CHECK: tne	 $6, $17
+0x76 0xdd 0xe8 0x00 # CHECK: tne	$7, $8, 885
+0x31 0x8c 0x8e 0x05 # CHECK: tnei	$12, 35889
+0xc9 0xbd 0x20 0x46 # CHECK: trunc.l.d $f23, $f23
+0x09 0xff 0x00 0x46 # CHECK: trunc.l.s $f28, $f31
+0x8d 0x75 0x20 0x46 # CHECK: trunc.w.d	$f22, $f14
+0x0d 0xf7 0x00 0x46 # CHECK: trunc.w.s	$f28, $f30
+0x26 0x90 0x9e 0x00 # CHECK: xor	$18, $4, $fp
diff --git a/test/MC/Disassembler/Mips/mips3/valid-mips3.txt b/test/MC/Disassembler/Mips/mips3/valid-mips3.txt
new file mode 100644
index 000000000000..95c06e0e68d7
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips3/valid-mips3.txt
@@ -0,0 +1,209 @@
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips3 | FileCheck %s
+# CHECK: .text
+0x46 0x20 0xc1 0x85  # CHECK: abs.d	$f6, $f24
+0x46 0x00 0x82 0x45  # CHECK: abs.s	$f9, $f16
+0x02 0x45 0xb8 0x20  # CHECK: add	$23, $18, $5
+0x21 0xc9 0x3b 0x48  # CHECK: addi	$9, $14, 15176
+0x23 0x18 0xe3 0xe7  # CHECK: addi	$24, $24, -7193
+0x46 0x3c 0x30 0x00  # CHECK: add.d	$f0, $f6, $f28
+0x46 0x18 0xaa 0x00  # CHECK: add.s	$f8, $f21, $f24
+0x21 0x2d 0x66 0xd2  # CHECK: addi	$13, $9, 26322
+0x21 0x08 0xff 0xfe  # CHECK: addi	$8, $8, -2
+0x00 0x86 0x48 0x21  # CHECK: addu	$9, $4, $6
+0x25 0x29 0x00 0x0a  # CHECK: addiu	$9, $9, 10
+0x00 0x4c 0xb8 0x24  # CHECK: and	$23, $2, $12
+0x30 0x42 0x00 0x04  # CHECK: andi	$2, $2, 4
+0x45 0x00 0x00 0x01  # CHECK: bc1f	 8
+0x45 0x02 0x00 0x0c  # CHECK: bc1fl	 52
+0x45 0x01 0x00 0x01  # CHECK: bc1t	 8
+0x45 0x03 0xf7 0xf4  # CHECK: bc1tl	 -8236
+0x04 0x11 0x14 0x9b  # CHECK: bal	21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x04 0xd0 0x14 0x9b  # CHECK: bltzal	$6, 21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x51 0xd3 0x0c 0x40  # CHECK: beql	$14, $19, 12548
+0x05 0x93 0x07 0x1f  # CHECK: bgezall	$12, 7296
+0x04 0x83 0xf9 0x4d  # CHECK: bgezl	$4, -6856
+0x5d 0x40 0xfc 0x59  # CHECK: bgtzl	$10, -3736
+0x58 0xc0 0x02 0xe7  # CHECK: blezl	$6, 2976
+0x04 0xd2 0x00 0x7a  # CHECK: bltzall	$6, 492
+0x06 0x22 0xf6 0x45  # CHECK: bltzl	$17, -9960
+0x57 0x94 0x04 0xfc  # CHECK: bnel	$gp, $20, 5108
+0xbc 0xa1 0x00 0x08  # CHECK: cache   1, 8($5)
+0x46 0x3c 0xe0 0x3b  # CHECK: c.ngl.d	$f28, $f28
+0x46 0x30 0x00 0x39  # CHECK: c.ngle.d	$f0, $f16
+0x46 0x20 0xf0 0x38  # CHECK: c.sf.d	$f30, $f0
+0x46 0x16 0x70 0x38  # CHECK: c.sf.s	$f14, $f22
+0x46 0x20 0x18 0x4a  # CHECK: ceil.l.d  $f1, $f3
+0x46 0x00 0x6c 0x8a  # CHECK: ceil.l.s  $f18, $f13
+0x46 0x20 0xc2 0xce  # CHECK: ceil.w.d	$f11, $f24
+0x46 0x00 0xa1 0x8e  # CHECK: ceil.w.s	$f6, $f20
+0x44 0x51 0xa8 0x00  # CHECK: cfc1	$17, $21
+0x44 0xc6 0xd0 0x00  # CHECK: ctc1	$6, $26
+0x46 0x00 0xe5 0xa1  # CHECK: cvt.d.s	$f22, $f28
+0x46 0x80 0x5e 0xa1  # CHECK: cvt.d.w	$f26, $f11
+0x46 0xa0 0x81 0x21  # CHECK: cvt.d.l $f4, $f16
+0x46 0x20 0x7e 0x25  # CHECK: cvt.l.d $f24, $f15
+0x46 0x00 0xea 0xe5  # CHECK: cvt.l.s $f11, $f29
+0x46 0xa0 0xf3 0xe0  # CHECK: cvt.s.l $f15, $f30
+0x46 0x20 0x46 0xa0  # CHECK: cvt.s.d	$f26, $f8
+0x46 0x80 0x7d 0xa0  # CHECK: cvt.s.w	$f22, $f15
+0x46 0x20 0x75 0x24  # CHECK: cvt.w.d	$f20, $f14
+0x46 0x00 0xc5 0x24  # CHECK: cvt.w.s	$f20, $f24
+0x00 0x3f 0x98 0x2c  # CHECK: dadd    $19, $1, $ra
+0x62 0x9d 0x93 0xc7  # CHECK: daddi   $sp, $20, -27705
+0x63 0xbd 0x93 0xc7  # CHECK: daddi   $sp, $sp, -27705
+0x62 0x9d 0x93 0xc7  # CHECK: daddi   $sp, $20, -27705
+0x62 0x9d 0x93 0xc7  # CHECK: daddi   $sp, $20, -27705
+0x63 0xbd 0x93 0xc7  # CHECK: daddi   $sp, $sp, -27705
+0x66 0xda 0xee 0x16  # CHECK: daddiu  $26, $22, -4586
+0x00 0x3f 0x98 0x2d  # CHECK: daddu   $19, $1, $ra
+0x64 0x58 0x46 0x9f  # CHECK: daddiu  $24, $2, 18079
+0x66 0x73 0x69 0x3f  # CHECK: daddiu  $19, $19, 26943
+0x03 0x53 0x00 0x1e  # CHECK: ddiv    $zero, $26, $19
+0x02 0x11 0x00 0x1f  # CHECK: ddivu   $zero, $16, $17
+0x03 0x2b 0x00 0x1a  # CHECK: div	$zero, $25, $11
+0x46 0x3a 0xa7 0x03  # CHECK: div.d	$f28, $f20, $f26
+0x46 0x0f 0x29 0x03  # CHECK: div.s	$f4, $f5, $f15
+0x03 0x2f 0x00 0x1b  # CHECK: divu	$zero, $25, $15
+0x44 0x2c 0x68 0x00  # CHECK: dmfc1   $12, $f13
+0x44 0xb0 0x70 0x00  # CHECK: dmtc1   $16, $f14
+0x02 0xe9 0x00 0x1c  # CHECK: dmult   $23, $9
+0x00 0xa6 0x00 0x1d  # CHECK: dmultu  $5, $6
+0x00 0x00 0x04 0xb8  # CHECK: dsll    $zero, $zero, 18
+0x00 0x14 0x04 0xb8  # CHECK: dsll    $zero, $20, 18
+0x01 0x94 0x00 0x14  # CHECK: dsllv   $zero, $20, $12
+0x00 0x00 0x04 0xbc  # CHECK: dsll32  $zero, $zero, 18
+0x00 0x00 0x04 0xbc  # CHECK: dsll32  $zero, $zero, 18
+0x01 0x94 0x00 0x14  # CHECK: dsllv   $zero, $20, $12
+0x00 0x1c 0xe2 0xbb  # CHECK: dsra    $gp, $gp, 10
+0x00 0x12 0xe2 0xbb  # CHECK: dsra    $gp, $18, 10
+0x02 0x72 0xe0 0x17  # CHECK: dsrav   $gp, $18, $19
+0x00 0x1c 0xe2 0xbf  # CHECK: dsra32  $gp, $gp, 10
+0x00 0x12 0xe2 0xbf  # CHECK: dsra32  $gp, $18, 10
+0x02 0x72 0xe0 0x17  # CHECK: dsrav   $gp, $18, $19
+0x00 0x13 0x9d 0xfa  # CHECK: dsrl    $19, $19, 23
+0x00 0x06 0x9d 0xfa  # CHECK: dsrl    $19, $6, 23
+0x02 0x86 0x98 0x16  # CHECK: dsrlv   $19, $6, $20
+0x00 0x13 0x9d 0xfe  # CHECK: dsrl32  $19, $19, 23
+0x00 0x06 0x9d 0xfe  # CHECK: dsrl32  $19, $6, 23
+0x02 0x86 0x98 0x16  # CHECK: dsrlv   $19, $6, $20
+0x02 0xc8 0x38 0x2e  # CHECK: dsub    $7, $22, $8
+0x00 0xba 0x28 0x2f  # CHECK: dsubu   $5, $5, $26
+0x00 0x00 0x00 0xc0  # CHECK: ehb
+0x42 0x00 0x00 0x18  # CHECK: eret
+0x46 0x20 0x53 0x8f  # CHECK: floor.w.d	$f14, $f10
+0x46 0x00 0x4a 0x0f  # CHECK: floor.w.s	$f8, $f9
+0x46 0x20 0x3e 0x8b  # CHECK: floor.l.d $f26, $f7
+0x46 0x00 0x2b 0x0b  # CHECK: floor.l.s $f12, $f5
+0x81 0x58 0xc7 0x4d  # CHECK: lb	$24, -14515($10)
+0x90 0x68 0x75 0xf3  # CHECK: lbu	$8, 30195($3)
+0xd6 0x0a 0x40 0x07  # CHECK: ldc1	$f10, 16391($16)
+0xd8 0x28 0xad 0x43  # CHECK: ldc2	$8, -21181($1)
+0x86 0xab 0xde 0x94  # CHECK: lh	$11, -8556($21)
+0x94 0x53 0xa6 0xbd  # CHECK: lhu	$19, -22851($2)
+0x24 0x01 0x8b 0xb3  # CHECK: addiu	$1, $zero, -29773
+0x24 0x00 0x8b 0x3f  # CHECK: addiu	$zero, $zero, -29889
+0xc2 0x42 0xe3 0x67  # CHECK: ll	$2, -7321($18)
+0x8c 0xa8 0x16 0x2a  # CHECK: lw	$8, 5674($5)
+0xc7 0x50 0x27 0xf1  # CHECK: lwc1	$f16, 10225($26)
+0xc8 0xd2 0xfc 0xb7  # CHECK: lwc2	$18, -841($6)
+0x89 0xf4 0xef 0x79  # CHECK: lwl	$20, -4231($15)
+0x9b 0x80 0xb5 0x35  # CHECK: lwr	$zero, -19147($gp)
+0x44 0x07 0xd8 0x00  # CHECK: mfc1	$7, $f27
+0x00 0x00 0x98 0x10  # CHECK: mfhi	$19
+0x00 0x00 0xe8 0x10  # CHECK: mfhi	$sp
+0x00 0x00 0x88 0x12  # CHECK: mflo	$17
+0x46 0x20 0x75 0x06  # CHECK: mov.d	$f20, $f14
+0x46 0x00 0xd8 0x86  # CHECK: mov.s	$f2, $f27
+0x00 0x80 0xf0 0x21  # CHECK: move	 $fp, $4
+0x00 0xc0 0xc8 0x21  # CHECK: move	 $25, $6
+0x44 0x9e 0x48 0x00  # CHECK: mtc1	$fp, $f9
+0x02 0x20 0x00 0x11  # CHECK: mthi	$17
+0x03 0xa0 0x00 0x13  # CHECK: mtlo	$sp
+0x03 0x20 0x00 0x13  # CHECK: mtlo	$25
+0x46 0x30 0xa5 0x02  # CHECK: mul.d	$f20, $f20, $f16
+0x46 0x02 0x57 0x82  # CHECK: mul.s	$f30, $f10, $f2
+0x03 0xb4 0x00 0x18  # CHECK: mult	$sp, $20
+0x03 0xa2 0x00 0x18  # CHECK: mult	$sp, $2
+0x03 0x9a 0x00 0x19  # CHECK: multu	$gp, $26
+0x01 0x32 0x00 0x19  # CHECK: multu	$9, $18
+0x00 0x02 0x10 0x23  # CHECK: negu	 $2, $2
+0x00 0x03 0x10 0x23  # CHECK: negu	 $2, $3
+0x46 0x20 0x96 0x87  # CHECK: neg.d	$f26, $f18
+0x46 0x00 0x78 0x47  # CHECK: neg.s	$f1, $f15
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x00 0x07 0x38 0x27  # CHECK: nor	$7, $zero, $7
+0x02 0x1d 0x60 0x25  # CHECK: or	$12, $16, $sp
+0x34 0x42 0x00 0x04  # CHECK: ori	$2, $2, 4
+0x46 0x20 0x0b 0x08  # CHECK: round.l.d $f12, $f1
+0x46 0x00 0x2e 0x48  # CHECK: round.l.s $f25, $f5
+0x46 0x20 0x21 0x8c  # CHECK: round.w.d	$f6, $f4
+0x46 0x00 0xe6 0xcc  # CHECK: round.w.s	$f27, $f28
+0xa1 0xd6 0xb2 0x6f  # CHECK: sb	$22, -19857($14)
+0xe2 0x6f 0x49 0xd8  # CHECK: sc	$15, 18904($19)
+0xf3 0xaf 0xdf 0xcd  # CHECK: scd   $15, -8243($sp)
+0xfd 0x4c 0x16 0xcb  # CHECK: sd    $12, 5835($10)
+0xb3 0xc7 0xae 0x1f  # CHECK: sdl   $7, -20961($fp)
+0xb5 0x8b 0xb0 0x39  # CHECK: sdr   $11, -20423($12)
+0xf5 0xbe 0x77 0x6e  # CHECK: sdc1	$f30, 30574($13)
+0xfa 0x54 0x5a 0x75  # CHECK: sdc2	$20, 23157($18)
+0xa5 0xee 0xe5 0xd0  # CHECK: sh	$14, -6704($15)
+0x00 0x07 0x3c 0x80  # CHECK: sll	$7, $7, 18
+0x00 0x00 0x3c 0x80  # CHECK: sll	$7, $zero, 18
+0x01 0x20 0x38 0x04  # CHECK: sllv	$7, $zero, $9
+0x01 0x20 0x38 0x04  # CHECK: sllv	$7, $zero, $9
+0x01 0x7b 0xb8 0x2a  # CHECK: slt	$23, $11, $27
+0x29 0x51 0x25 0x11  # CHECK: slti	$17, $10, 9489
+0x2f 0x39 0xc3 0x55  # CHECK: sltiu	$25, $25, -15531
+0x02 0xab 0xa0 0x2b  # CHECK: sltu	$20, $21, $11
+0x2f 0x38 0xc3 0x55  # CHECK: sltiu	$24, $25, -15531
+0x46 0x20 0xb4 0x04  # CHECK: sqrt.d	$f16, $f22
+0x46 0x00 0x08 0x04  # CHECK: sqrt.s	$f0, $f1
+0x00 0x11 0x8b 0xc3  # CHECK: sra	$17, $17, 15
+0x00 0x17 0x8b 0xc3  # CHECK: sra	$17, $23, 15
+0x03 0xb7 0x88 0x07  # CHECK: srav	$17, $23, $sp
+0x03 0xb7 0x88 0x07  # CHECK: srav	$17, $23, $sp
+0x00 0x02 0x11 0xc2  # CHECK: srl	$2, $2, 7
+0x00 0x02 0x11 0xc2  # CHECK: srl	$2, $2, 7
+0x00 0x94 0xc8 0x06  # CHECK: srlv	$25, $20, $4
+0x00 0x94 0xc8 0x06  # CHECK: srlv	$25, $20, $4
+0x00 0x00 0x00 0x40  # CHECK: ssnop
+0x02 0x6c 0xb0 0x22  # CHECK: sub	$22, $19, $12
+0x22 0x36 0x0c 0x36  # CHECK: addi	$22, $17, 3126
+0x21 0xad 0xe6 0x90  # CHECK: addi	$13, $13, -6512
+0x46 0x30 0x14 0x81  # CHECK: sub.d	$f18, $f2, $f16
+0x46 0x16 0xb5 0xc1  # CHECK: sub.s	$f23, $f22, $f22
+0x02 0xd6 0xe8 0x23  # CHECK: subu	$sp, $22, $22
+0xaf 0xbf 0xd8 0x50  # CHECK: sw	$ra, -10160($sp)
+0xe7 0x06 0xde 0xef  # CHECK: swc1	$f6, -8465($24)
+0xea 0x19 0x61 0x30  # CHECK: swc2	$25, 24880($16)
+0xaa 0x6f 0x35 0x7e  # CHECK: swl	$15, 13694($19)
+0xb9 0xd1 0x98 0x22  # CHECK: swr	$17, -26590($14)
+0x00 0x03 0x00 0x34  # CHECK: teq	 $zero, $3
+0x00 0xa7 0x9b 0x34  # CHECK: teq	$5, $7, 620
+0x06 0xac 0xbb 0xa0  # CHECK: teqi	$21, 48032
+0x00 0xea 0x00 0x30  # CHECK: tge	 $7, $10
+0x00 0xb3 0x55 0x30  # CHECK: tge	$5, $19, 340
+0x06 0x28 0x13 0xa1  # CHECK: tgei	$17, 5025
+0x07 0xa9 0x90 0x33  # CHECK: tgeiu	$sp, 36915
+0x02 0xdc 0x00 0x31  # CHECK: tgeu	 $22, $gp
+0x02 0x8e 0x5e 0xf1  # CHECK: tgeu	$20, $14, 379
+0x42 0x00 0x00 0x08  # CHECK: tlbp
+0x42 0x00 0x00 0x01  # CHECK: tlbr
+0x42 0x00 0x00 0x02  # CHECK: tlbwi
+0x42 0x00 0x00 0x06  # CHECK: tlbwr
+0x01 0xed 0x00 0x32  # CHECK: tlt	 $15, $13
+0x00 0x53 0x21 0x72  # CHECK: tlt	$2, $19, 133
+0x05 0xca 0xad 0xbd  # CHECK: tlti	$14, 44477
+0x07 0xeb 0xec 0x2c  # CHECK: tltiu	$ra, 60460
+0x01 0x70 0x00 0x33  # CHECK: tltu	 $11, $16
+0x02 0x1d 0xfe 0x33  # CHECK: tltu	$16, $sp, 1016
+0x00 0xd1 0x00 0x36  # CHECK: tne	 $6, $17
+0x00 0xe8 0xdd 0x76  # CHECK: tne	$7, $8, 885
+0x05 0x8e 0x8c 0x31  # CHECK: tnei	$12, 35889
+0x46 0x20 0xbd 0xc9  # CHECK: trunc.l.d $f23, $f23
+0x46 0x00 0xff 0x09  # CHECK: trunc.l.s $f28, $f31
+0x46 0x20 0x75 0x8d  # CHECK: trunc.w.d	$f22, $f14
+0x46 0x00 0xf7 0x0d  # CHECK: trunc.w.s	$f28, $f30
+0x00 0x9e 0x90 0x26  # CHECK: xor	$18, $4, $fp
diff --git a/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt b/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
new file mode 100644
index 000000000000..17d2094a87eb
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
@@ -0,0 +1,294 @@
+# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux | FileCheck %s
+
+0x05 0x73 0x20 0x46   # CHECK: abs.d $f12, $f14
+
+0x85 0x39 0x00 0x46   # CHECK: abs.s $f6, $f7
+
+0x20 0x48 0xc7 0x00   # CHECK: add $9, $6, $7
+
+0x00 0x62 0x2e 0x46   # CHECK: add.d $f8, $f12, $f14
+
+0x40 0x32 0x07 0x46   # CHECK: add.s $f9, $f6, $f7
+
+0x67 0x45 0xc9 0x20   # CHECK: addi $9, $6, 17767
+
+0x67 0xc5 0xc9 0x24   # CHECK: addiu $9, $6, -15001
+
+0x21 0x48 0xc7 0x00   # CHECK: addu $9, $6, $7
+
+0x24 0x48 0xc7 0x00   # CHECK: and $9, $6, $7
+
+0x67 0x45 0xc9 0x30   # CHECK: andi $9, $6, 17767
+
+0x4c 0x01 0x00 0x10   # CHECK: b 1332
+
+0x4c 0x01 0x00 0x45   # CHECK: bc1f 1332
+
+0x4c 0x01 0x1c 0x45   # CHECK: bc1f $fcc7, 1332
+
+0x4c 0x01 0x01 0x45   # CHECK: bc1t 1332
+
+0x4c 0x01 0x1d 0x45   # CHECK: bc1t $fcc7, 1332
+
+0x4c 0x01 0x26 0x11   # CHECK: beq $9, $6, 1332
+
+0x4c 0x01 0xc1 0x04   # CHECK: bgez  $6, 1332
+
+0x4c 0x01 0xd1 0x04   # CHECK: bgezal  $6, 1332
+
+0x4c 0x01 0xc0 0x1c   # CHECK: bgtz  $6, 1332
+
+0x4c 0x01 0xc0 0x18   # CHECK: blez  $6, 1332
+
+0x4c 0x01 0x26 0x15   # CHECK: bne $9, $6, 1332
+
+0x32 0x60 0x2e 0x46   # CHECK: c.eq.d $f12, $f14
+
+0x32 0x30 0x07 0x46   # CHECK: c.eq.s $f6, $f7
+
+0x30 0x60 0x2e 0x46   # CHECK: c.f.d $f12, $f14
+
+0x30 0x30 0x07 0x46   # CHECK: c.f.s $f6, $f7
+
+0x3e 0x60 0x2e 0x46   # CHECK: c.le.d $f12, $f14
+
+0x3e 0x30 0x07 0x46   # CHECK: c.le.s $f6, $f7
+
+0x3c 0x60 0x2e 0x46   # CHECK: c.lt.d $f12, $f14
+
+0x3c 0x30 0x07 0x46   # CHECK: c.lt.s $f6, $f7
+
+0x3d 0x60 0x2e 0x46   # CHECK: c.nge.d $f12, $f14
+
+0x3d 0x30 0x07 0x46   # CHECK: c.nge.s $f6, $f7
+
+0x3b 0x60 0x2e 0x46   # CHECK: c.ngl.d $f12, $f14
+
+0x3b 0x30 0x07 0x46   # CHECK: c.ngl.s $f6, $f7
+
+0x39 0x60 0x2e 0x46   # CHECK: c.ngle.d $f12, $f14
+
+0x39 0x30 0x07 0x46   # CHECK: c.ngle.s $f6, $f7
+
+0x3f 0x60 0x2e 0x46   # CHECK: c.ngt.d $f12, $f14
+
+0x3f 0x30 0x07 0x46   # CHECK: c.ngt.s $f6, $f7
+
+0x36 0x60 0x2e 0x46   # CHECK: c.ole.d $f12, $f14
+
+0x36 0x30 0x07 0x46   # CHECK: c.ole.s $f6, $f7
+
+0x34 0x60 0x2e 0x46   # CHECK: c.olt.d $f12, $f14
+
+0x34 0x30 0x07 0x46   # CHECK: c.olt.s $f6, $f7
+
+0x3a 0x60 0x2e 0x46   # CHECK: c.seq.d $f12, $f14
+
+0x3a 0x30 0x07 0x46   # CHECK: c.seq.s $f6, $f7
+
+0x38 0x60 0x2e 0x46   # CHECK: c.sf.d $f12, $f14
+
+0x38 0x30 0x07 0x46   # CHECK: c.sf.s $f6, $f7
+
+0x33 0x60 0x2e 0x46   # CHECK: c.ueq.d $f12, $f14
+
+0x33 0xe0 0x12 0x46   # CHECK: c.ueq.s $f28, $f18
+
+0x37 0x60 0x2e 0x46   # CHECK: c.ule.d $f12, $f14
+
+0x37 0x30 0x07 0x46   # CHECK: c.ule.s $f6, $f7
+
+0x35 0x60 0x2e 0x46   # CHECK: c.ult.d $f12, $f14
+
+0x35 0x30 0x07 0x46   # CHECK: c.ult.s $f6, $f7
+
+0x31 0x60 0x2e 0x46   # CHECK: c.un.d $f12, $f14
+
+0x31 0x30 0x07 0x46   # CHECK: c.un.s $f6, $f7
+
+0x0e 0x73 0x20 0x46   # CHECK: ceil.w.d $f12, $f14
+
+0x8e 0x39 0x00 0x46   # CHECK: ceil.w.s $f6, $f7
+
+0x00 0x38 0x46 0x44   # CHECK: cfc1  $6, $7
+
+0x21 0x30 0xe6 0x70   # CHECK: clo  $6, $7
+
+0x20 0x30 0xe6 0x70   # CHECK: clz  $6, $7
+
+0x00 0x38 0xc6 0x44   # CHECK: ctc1  $6, $7
+
+0xa1 0x39 0x00 0x46   # CHECK: cvt.d.s $f6, $f7
+
+0x21 0x73 0x80 0x46   # CHECK: cvt.d.w $f12, $f14
+
+0x20 0x73 0x20 0x46   # CHECK: cvt.s.d $f12, $f14
+
+0xa0 0x39 0x80 0x46   # CHECK: cvt.s.w $f6, $f7
+
+0x24 0x73 0x20 0x46   # CHECK: cvt.w.d $f12, $f14
+
+0xa4 0x39 0x00 0x46   # CHECK: cvt.w.s $f6, $f7
+
+0x0f 0x73 0x20 0x46   # CHECK: floor.w.d $f12, $f14
+
+0x8f 0x39 0x00 0x46   # CHECK: floor.w.s $f6, $f7
+
+0x4c 0x01 0x00 0x08   # CHECK: j 1328
+
+0x4c 0x01 0x00 0x0c   # CHECK: jal 1328
+
+0x4c 0x01 0x00 0x74   # CHECK: jalx 1328
+
+0x09 0xf8 0xe0 0x00   # CHECK: jalr  $7
+
+0x09 0xfc 0x80 0x00   # CHECK: jalr.hb  $4
+
+0x09 0x24 0xa0 0x00   # CHECK: jalr.hb  $4, $5
+
+0x08 0x00 0xe0 0x00   # CHECK: jr  $7
+
+0xc6 0x23 0xa4 0x80   # CHECK: lb  $4, 9158($5)
+
+0x06 0x00 0xa4 0x90   # CHECK: lbu $4, 6($5)
+
+0xc6 0x23 0xe9 0xd4   # CHECK: ldc1  $f9, 9158($7)
+
+0x0c 0x00 0xa4 0x84   # CHECK: lh  $4, 12($5)
+
+0x0c 0x00 0xa4 0x84   # CHECK: lh  $4, 12($5)
+
+0xc6 0x23 0xe9 0xc0   # CHECK: ll  $9, 9158($7)
+
+0x67 0x45 0x06 0x3c   # CHECK: lui  $6, 17767
+
+0x18 0x00 0xa4 0x8c   # CHECK: lw  $4, 24($5)
+
+0xc6 0x23 0xe9 0xc4   # CHECK: lwc1  $f9, 9158($7)
+
+0x03 0x00 0x82 0x88   # CHECK: lwl   $2,  3($4)
+
+0x10 0x00 0xa3 0x98   # CHECK: lwr   $3, 16($5)
+
+0x00 0x00 0xc7 0x70   # CHECK: madd   $6,  $7
+
+0x01 0x00 0xc7 0x70   # CHECK: maddu  $6,  $7
+
+0x00 0x38 0x06 0x44   # CHECK: mfc1   $6, $f7
+
+0x10 0x28 0x00 0x00   # CHECK: mfhi  $5
+
+0x12 0x28 0x00 0x00   # CHECK: mflo  $5
+
+0x86 0x41 0x20 0x46   # CHECK: mov.d $f6, $f8
+
+0x86 0x39 0x00 0x46   # CHECK: mov.s $f6, $f7
+
+0x04 0x00 0xc7 0x70   # CHECK: msub   $6,  $7
+
+0x05 0x00 0xc7 0x70   # CHECK: msubu  $6,  $7
+
+0x00 0x38 0x86 0x44   # CHECK: mtc1   $6, $f7
+
+0x11 0x00 0xe0 0x00   # CHECK: mthi   $7
+
+0x13 0x00 0xe0 0x00   # CHECK: mtlo   $7
+
+0x02 0x62 0x2e 0x46   # CHECK: mul.d $f8, $f12, $f14
+
+0x42 0x32 0x07 0x46   # CHECK: mul.s $f9, $f6, $f7
+
+0x02 0x48 0xc7 0x70   # CHECK: mul $9,  $6,  $7
+
+0x18 0x00 0x65 0x00   # CHECK: mult  $3, $5
+
+0x19 0x00 0x65 0x00   # CHECK: multu $3, $5
+
+0x07 0x73 0x20 0x46   # CHECK: neg.d $f12, $f14
+
+0x87 0x39 0x00 0x46   # CHECK: neg.s $f6, $f7
+
+0x00 0x00 0x00 0x00   # CHECK: nop
+
+0x27 0x48 0xc7 0x00   # CHECK: nor $9,  $6, $7
+
+0x25 0x18 0x65 0x00   # CHECK: or  $3, $3, $5
+
+0x67 0x45 0xc9 0x34   # CHECK: ori $9,  $6, 17767
+
+0x0c 0x73 0x20 0x46   # CHECK: round.w.d $f12, $f14
+
+0x8c 0x39 0x00 0x46   # CHECK: round.w.s $f6, $f7
+
+0xc6 0x23 0xa4 0xa0   # CHECK: sb  $4, 9158($5)
+
+0x06 0x00 0xa4 0xa0   # CHECK: sb  $4, 6($5)
+
+0xc6 0x23 0xe9 0xe0   # CHECK: sc  $9, 9158($7)
+
+0xc6 0x23 0xe9 0xf4   # CHECK: sdc1  $f9, 9158($7)
+
+0xc6 0x23 0xa4 0xa4   # CHECK: sh  $4, 9158($5)
+
+0xc0 0x21 0x03 0x00   # CHECK: sll $4, $3, 7
+
+0x04 0x10 0xa3 0x00   # CHECK: sllv  $2, $3, $5
+
+0x2a 0x18 0x65 0x00   # CHECK: slt $3, $3, $5
+
+0x67 0x00 0x63 0x28   # CHECK: slti  $3, $3, 103
+
+0x67 0x00 0x63 0x2c   # CHECK: sltiu $3, $3, 103
+
+0x2b 0x18 0x65 0x00   # CHECK: sltu  $3, $3, $5
+
+0x04 0x73 0x20 0x46   # CHECK: sqrt.d  $f12, $f14
+
+0x84 0x39 0x00 0x46   # CHECK: sqrt.s  $f6, $f7
+
+0xc3 0x21 0x03 0x00   # CHECK: sra $4, $3, 7
+
+0x07 0x10 0xa3 0x00   # CHECK: srav  $2, $3, $5
+
+0xc2 0x21 0x03 0x00   # CHECK: srl $4, $3, 7
+
+0x06 0x10 0xa3 0x00   # CHECK: srlv  $2, $3, $5
+
+0x01 0x62 0x2e 0x46   # CHECK: sub.d $f8, $f12, $f14
+
+0x41 0x32 0x07 0x46   # CHECK: sub.s $f9, $f6, $f7
+
+0x22 0x48 0xc7 0x00   # CHECK: sub $9,  $6, $7
+
+0x23 0x20 0x65 0x00   # CHECK: subu  $4, $3, $5
+
+0x18 0x00 0xa4 0xac   # CHECK: sw  $4, 24($5)
+
+0xc6 0x23 0xe9 0xe4   # CHECK: swc1  $f9, 9158($7)
+
+0x10 0x00 0xa4 0xa8   # CHECK: swl $4,  16($5)
+
+0x10 0x00 0xe6 0xb8   # CHECK: swr $6, 16($7)
+
+0xcf 0x01 0x00 0x00   # CHECK: sync  7
+
+0x0d 0x73 0x20 0x46   # CHECK: trunc.w.d $f12, $f14
+
+0x8d 0x39 0x00 0x46   # CHECK: trunc.w.s $f6, $f7
+
+0x26 0x18 0x65 0x00   # CHECK: xor $3, $3, $5
+
+0x67 0x45 0xc9 0x38   # CHECK: xori  $9,  $6, 17767
+
+0x3b 0xe8 0x05 0x7c   # CHECK: .set    push
+                      # CHECK: .set    mips32r2
+                      # CHECK: rdhwr   $5, $29
+                      # CHECK: .set    pop
+
+0x02 0x00 0x61 0xbc   # CHECK: cache 1, 2($3)
+
+0x04 0x00 0x43 0xcc   # CHECK: pref 3, 4($2)
+
+0xc6 0x23 0xe9 0xe8   # CHECK: swc2  $9, 9158($7)
+
+0xca 0x23 0xc8 0xc8   # CHECK: lwc2  $8, 9162($6)
diff --git a/test/MC/Disassembler/Mips/mips32/valid-mips32.txt b/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
new file mode 100644
index 000000000000..a7eb9b6a40ac
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
@@ -0,0 +1,294 @@
+# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s
+
+0x46 0x20 0x73 0x05   # CHECK: abs.d $f12, $f14
+
+0x46 0x00 0x39 0x85   # CHECK: abs.s $f6, $f7
+
+0x00 0xc7 0x48 0x20   # CHECK: add $9, $6, $7
+
+0x46 0x2e 0x62 0x00   # CHECK: add.d $f8, $f12, $f14
+
+0x46 0x07 0x32 0x40   # CHECK: add.s $f9, $f6, $f7
+
+0x20 0xc9 0x45 0x67   # CHECK: addi $9, $6, 17767
+
+0x24 0xc9 0xc5 0x67   # CHECK: addiu $9, $6, -15001
+
+0x00 0xc7 0x48 0x21   # CHECK: addu $9, $6, $7
+
+0x00 0xc7 0x48 0x24   # CHECK: and $9, $6, $7
+
+0x30 0xc9 0x45 0x67   # CHECK: andi $9, $6, 17767
+
+0x10 0x00 0x01 0x4c   # CHECK: b 1332
+
+0x45 0x00 0x01 0x4c   # CHECK: bc1f 1332
+
+0x45 0x1c 0x01 0x4c   # CHECK: bc1f $fcc7, 1332
+
+0x45 0x01 0x01 0x4c   # CHECK: bc1t 1332
+
+0x45 0x1d 0x01 0x4c   # CHECK: bc1t $fcc7, 1332
+
+0x11 0x26 0x01 0x4c   # CHECK: beq $9, $6, 1332
+
+0x04 0xc1 0x01 0x4c   # CHECK: bgez  $6, 1332
+
+0x04 0xd1 0x01 0x4c   # CHECK: bgezal  $6, 1332
+
+0x1c 0xc0 0x01 0x4c   # CHECK: bgtz  $6, 1332
+
+0x18 0xc0 0x01 0x4c   # CHECK: blez  $6, 1332
+
+0x15 0x26 0x01 0x4c   # CHECK: bne $9, $6, 1332
+
+0x46 0x2e 0x60 0x32   # CHECK: c.eq.d $f12, $f14
+
+0x46 0x07 0x30 0x32   # CHECK: c.eq.s $f6, $f7
+
+0x46 0x2e 0x60 0x30   # CHECK: c.f.d $f12, $f14
+
+0x46 0x07 0x30 0x30   # CHECK: c.f.s $f6, $f7
+
+0x46 0x2e 0x60 0x3e   # CHECK: c.le.d $f12, $f14
+
+0x46 0x07 0x30 0x3e   # CHECK: c.le.s $f6, $f7
+
+0x46 0x2e 0x60 0x3c   # CHECK: c.lt.d $f12, $f14
+
+0x46 0x07 0x30 0x3c   # CHECK: c.lt.s $f6, $f7
+
+0x46 0x2e 0x60 0x3d   # CHECK: c.nge.d $f12, $f14
+
+0x46 0x07 0x30 0x3d   # CHECK: c.nge.s $f6, $f7
+
+0x46 0x2e 0x60 0x3b   # CHECK: c.ngl.d $f12, $f14
+
+0x46 0x07 0x30 0x3b   # CHECK: c.ngl.s $f6, $f7
+
+0x46 0x2e 0x60 0x39   # CHECK: c.ngle.d $f12, $f14
+
+0x46 0x07 0x30 0x39   # CHECK: c.ngle.s $f6, $f7
+
+0x46 0x2e 0x60 0x3f   # CHECK: c.ngt.d $f12, $f14
+
+0x46 0x07 0x30 0x3f   # CHECK: c.ngt.s $f6, $f7
+
+0x46 0x2e 0x60 0x36   # CHECK: c.ole.d $f12, $f14
+
+0x46 0x07 0x30 0x36   # CHECK: c.ole.s $f6, $f7
+
+0x46 0x2e 0x60 0x34   # CHECK: c.olt.d $f12, $f14
+
+0x46 0x07 0x30 0x34   # CHECK: c.olt.s $f6, $f7
+
+0x46 0x2e 0x60 0x3a   # CHECK: c.seq.d $f12, $f14
+
+0x46 0x07 0x30 0x3a   # CHECK: c.seq.s $f6, $f7
+
+0x46 0x2e 0x60 0x38   # CHECK: c.sf.d $f12, $f14
+
+0x46 0x07 0x30 0x38   # CHECK: c.sf.s $f6, $f7
+
+0x46 0x2e 0x60 0x33   # CHECK: c.ueq.d $f12, $f14
+
+0x46 0x12 0xe0 0x33   # CHECK: c.ueq.s $f28, $f18
+
+0x46 0x2e 0x60 0x37   # CHECK: c.ule.d $f12, $f14
+
+0x46 0x07 0x30 0x37   # CHECK: c.ule.s $f6, $f7
+
+0x46 0x2e 0x60 0x35   # CHECK: c.ult.d $f12, $f14
+
+0x46 0x07 0x30 0x35   # CHECK: c.ult.s $f6, $f7
+
+0x46 0x2e 0x60 0x31   # CHECK: c.un.d $f12, $f14
+
+0x46 0x07 0x30 0x31   # CHECK: c.un.s $f6, $f7
+
+0x46 0x20 0x73 0x0e   # CHECK: ceil.w.d $f12, $f14
+
+0x46 0x00 0x39 0x8e   # CHECK: ceil.w.s $f6, $f7
+
+0x44 0x46 0x38 0x00   # CHECK: cfc1  $6, $7
+
+0x70 0xe6 0x30 0x21   # CHECK: clo  $6, $7
+
+0x70 0xe6 0x30 0x20   # CHECK: clz  $6, $7
+
+0x44 0xc6 0x38 0x00   # CHECK: ctc1  $6, $7
+
+0x46 0x00 0x39 0xa1   # CHECK: cvt.d.s $f6, $f7
+
+0x46 0x80 0x73 0x21   # CHECK: cvt.d.w $f12, $f14
+
+0x46 0x20 0x73 0x20   # CHECK: cvt.s.d $f12, $f14
+
+0x46 0x80 0x39 0xa0   # CHECK: cvt.s.w $f6, $f7
+
+0x46 0x20 0x73 0x24   # CHECK: cvt.w.d $f12, $f14
+
+0x46 0x00 0x39 0xa4   # CHECK: cvt.w.s $f6, $f7
+
+0x46 0x20 0x73 0x0f   # CHECK: floor.w.d $f12, $f14
+
+0x46 0x00 0x39 0x8f   # CHECK: floor.w.s $f6, $f7
+
+0x08 0x00 0x01 0x4c   # CHECK: j 1328
+
+0x0c 0x00 0x01 0x4c   # CHECK: jal 1328
+
+0x74 0x00 0x01 0x4c   # CHECK: jalx 1328
+
+0x00 0xe0 0xf8 0x09   # CHECK: jalr  $7
+
+0x00 0x80 0xfc 0x09   # CHECK: jalr.hb  $4
+
+0x00 0xa0 0x24 0x09   # CHECK: jalr.hb  $4, $5
+
+0x00 0xe0 0x00 0x08   # CHECK: jr  $7
+
+0x80 0xa4 0x23 0xc6   # CHECK: lb  $4, 9158($5)
+
+0x90 0xa4 0x00 0x06   # CHECK: lbu $4, 6($5)
+
+0xd4 0xe9 0x23 0xc6   # CHECK: ldc1  $f9, 9158($7)
+
+0x84 0xa4 0x00 0x0c   # CHECK: lh  $4, 12($5)
+
+0x84 0xa4 0x00 0x0c   # CHECK: lh  $4, 12($5)
+
+0xc0 0xe9 0x23 0xc6   # CHECK: ll  $9, 9158($7)
+
+0x3c 0x06 0x45 0x67   # CHECK: lui  $6, 17767
+
+0x8c 0xa4 0x00 0x18   # CHECK: lw  $4, 24($5)
+
+0xc4 0xe9 0x23 0xc6   # CHECK: lwc1  $f9, 9158($7)
+
+0x88 0x82 0x00 0x03   # CHECK: lwl   $2,  3($4)
+
+0x98 0xa3 0x00 0x10   # CHECK: lwr   $3, 16($5)
+
+0x70 0xc7 0x00 0x00   # CHECK: madd   $6,  $7
+
+0x70 0xc7 0x00 0x01   # CHECK: maddu  $6,  $7
+
+0x44 0x06 0x38 0x00   # CHECK: mfc1   $6, $f7
+
+0x00 0x00 0x28 0x10   # CHECK: mfhi  $5
+
+0x00 0x00 0x28 0x12   # CHECK: mflo  $5
+
+0x46 0x20 0x41 0x86   # CHECK: mov.d $f6, $f8
+
+0x46 0x00 0x39 0x86   # CHECK: mov.s $f6, $f7
+
+0x70 0xc7 0x00 0x04   # CHECK: msub   $6,  $7
+
+0x70 0xc7 0x00 0x05   # CHECK: msubu  $6,  $7
+
+0x44 0x86 0x38 0x00   # CHECK: mtc1   $6, $f7
+
+0x00 0xe0 0x00 0x11   # CHECK: mthi   $7
+
+0x00 0xe0 0x00 0x13   # CHECK: mtlo   $7
+
+0x46 0x2e 0x62 0x02   # CHECK: mul.d $f8, $f12, $f14
+
+0x46 0x07 0x32 0x42   # CHECK: mul.s $f9, $f6, $f7
+
+0x70 0xc7 0x48 0x02   # CHECK: mul $9,  $6,  $7
+
+0x00 0x65 0x00 0x18   # CHECK: mult  $3, $5
+
+0x00 0x65 0x00 0x19   # CHECK: multu $3, $5
+
+0x46 0x20 0x73 0x07   # CHECK: neg.d $f12, $f14
+
+0x46 0x00 0x39 0x87   # CHECK: neg.s $f6, $f7
+
+0x00 0x00 0x00 0x00   # CHECK: nop
+
+0x00 0xc7 0x48 0x27   # CHECK: nor $9,  $6, $7
+
+0x00 0x65 0x18 0x25   # CHECK: or  $3, $3, $5
+
+0x34 0xc9 0x45 0x67   # CHECK: ori $9,  $6, 17767
+
+0x46 0x20 0x73 0x0c   # CHECK: round.w.d $f12, $f14
+
+0x46 0x00 0x39 0x8c   # CHECK: round.w.s $f6, $f7
+
+0xa0 0xa4 0x23 0xc6   # CHECK: sb  $4, 9158($5)
+
+0xa0 0xa4 0x00 0x06   # CHECK: sb  $4, 6($5)
+
+0xe0 0xe9 0x23 0xc6   # CHECK: sc  $9, 9158($7)
+
+0xf4 0xe9 0x23 0xc6   # CHECK: sdc1  $f9, 9158($7)
+
+0xa4 0xa4 0x23 0xc6   # CHECK: sh  $4, 9158($5)
+
+0x00 0x03 0x21 0xc0   # CHECK: sll $4, $3, 7
+
+0x00 0xa3 0x10 0x04   # CHECK: sllv  $2, $3, $5
+
+0x00 0x65 0x18 0x2a   # CHECK: slt $3, $3, $5
+
+0x28 0x63 0x00 0x67   # CHECK: slti  $3, $3, 103
+
+0x2c 0x63 0x00 0x67   # CHECK: sltiu $3, $3, 103
+
+0x00 0x65 0x18 0x2b   # CHECK: sltu  $3, $3, $5
+
+0x46 0x20 0x73 0x04   # CHECK: sqrt.d  $f12, $f14
+
+0x46 0x00 0x39 0x84   # CHECK: sqrt.s  $f6, $f7
+
+0x00 0x03 0x21 0xc3   # CHECK: sra $4, $3, 7
+
+0x00 0xa3 0x10 0x07   # CHECK: srav  $2, $3, $5
+
+0x00 0x03 0x21 0xc2   # CHECK: srl $4, $3, 7
+
+0x00 0xa3 0x10 0x06   # CHECK: srlv  $2, $3, $5
+
+0x46 0x2e 0x62 0x01   # CHECK: sub.d $f8, $f12, $f14
+
+0x46 0x07 0x32 0x41   # CHECK: sub.s $f9, $f6, $f7
+
+0x00 0xc7 0x48 0x22   # CHECK: sub $9,  $6, $7
+
+0x00 0x65 0x20 0x23   # CHECK: subu  $4, $3, $5
+
+0xac 0xa4 0x00 0x18   # CHECK: sw  $4, 24($5)
+
+0xe4 0xe9 0x23 0xc6   # CHECK: swc1  $f9, 9158($7)
+
+0xa8 0xa4 0x00 0x10   # CHECK: swl $4,  16($5)
+
+0xb8 0xe6 0x00 0x10   # CHECK: swr $6, 16($7)
+
+0x00 0x00 0x01 0xcf   # CHECK: sync  7
+
+0x46 0x20 0x73 0x0d   # CHECK: trunc.w.d $f12, $f14
+
+0x46 0x00 0x39 0x8d   # CHECK: trunc.w.s $f6, $f7
+
+0x00 0x65 0x18 0x26   # CHECK: xor $3, $3, $5
+
+0x38 0xc9 0x45 0x67   # CHECK: xori  $9,  $6, 17767
+
+0x7c 0x05 0xe8 0x3b   # CHECK: .set    push
+                      # CHECK: .set    mips32r2
+                      # CHECK: rdhwr   $5, $29
+                      # CHECK: .set    pop
+
+0xbc 0x61 0x00 0x02   # CHECK: cache 1, 2($3)
+
+0xcc 0x43 0x00 0x04   # CHECK: pref 3, 4($2)
+
+0xe8 0xe9 0x23 0xc6   # CHECK: swc2  $9, 9158($7)
+
+0xc8 0xc8 0x23 0xca   # CHECK: lwc2  $8, 9162($6)
diff --git a/test/MC/Disassembler/Mips/mips32/valid-xfail-mips32.txt b/test/MC/Disassembler/Mips/mips32/valid-xfail-mips32.txt
new file mode 100644
index 000000000000..bcd1c8269644
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips32/valid-xfail-mips32.txt
@@ -0,0 +1,30 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble | FileCheck %s
+# XFAIL: *
+0x46 0x2f 0x79 0x32  # CHECK :      c.eq.d    $fcc1,$f15,$f15
+0x46 0x11 0xc5 0x32  # CHECK :      c.eq.s    $fcc5,$f24,$f17
+0x46 0x35 0x5c 0x30  # CHECK :      c.f.d     $fcc4,$f11,$f21
+0x46 0x07 0xf4 0x30  # CHECK :      c.f.s     $fcc4,$f30,$f7
+0x46 0x21 0x94 0x3e  # CHECK :      c.le.d    $fcc4,$f18,$f1
+0x46 0x04 0xc6 0x3e  # CHECK :      c.le.s    $fcc6,$f24,$f4
+0x46 0x23 0x4b 0x3c  # CHECK :      c.lt.d    $fcc3,$f9,$f3
+0x46 0x0e 0x8a 0x3c  # CHECK :      c.lt.s    $fcc2,$f17,$f14
+0x46 0x30 0xad 0x3d  # CHECK :      c.nge.d   $fcc5,$f21,$f16
+0x46 0x08 0x5b 0x3d  # CHECK :      c.nge.s   $fcc3,$f11,$f8
+0x46 0x17 0xfa 0x3b  # CHECK :      c.ngl.s   $fcc2,$f31,$f23
+0x46 0x17 0x92 0x39  # CHECK :      c.ngle.s  $fcc2,$f18,$f23
+0x46 0x27 0xc4 0x3f  # CHECK :      c.ngt.d   $fcc4,$f24,$f7
+0x46 0x0d 0x45 0x3f  # CHECK :      c.ngt.s   $fcc5,$f8,$f13
+0x46 0x3f 0x82 0x36  # CHECK :      c.ole.d   $fcc2,$f16,$f31
+0x46 0x14 0x3b 0x36  # CHECK :      c.ole.s   $fcc3,$f7,$f20
+0x46 0x3c 0x9c 0x34  # CHECK :      c.olt.d   $fcc4,$f19,$f28
+0x46 0x07 0xa6 0x34  # CHECK :      c.olt.s   $fcc6,$f20,$f7
+0x46 0x27 0xfc 0x3a  # CHECK :      c.seq.d   $fcc4,$f31,$f7
+0x46 0x19 0x0f 0x3a  # CHECK :      c.seq.s   $fcc7,$f1,$f25
+0x46 0x39 0x6c 0x33  # CHECK :      c.ueq.d   $fcc4,$f13,$f25
+0x46 0x1e 0x1e 0x33  # CHECK :      c.ueq.s   $fcc6,$f3,$f30
+0x46 0x32 0xcf 0x37  # CHECK :      c.ule.d   $fcc7,$f25,$f18
+0x46 0x1e 0xaf 0x37  # CHECK :      c.ule.s   $fcc7,$f21,$f30
+0x46 0x31 0x36 0x35  # CHECK :      c.ult.d   $fcc6,$f6,$f17
+0x46 0x0a 0xc7 0x35  # CHECK :      c.ult.s   $fcc7,$f24,$f10
+0x46 0x38 0xbe 0x31  # CHECK :      c.un.d    $fcc6,$f23,$f24
+0x46 0x04 0xf1 0x31  # CHECK :      c.un.s    $fcc1,$f30,$f4
diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt
index 299f6f0c8a3e..354ef74a75aa 100644
--- a/test/MC/Disassembler/Mips/mips32r2.txt
+++ b/test/MC/Disassembler/Mips/mips32r2.txt
@@ -448,3 +448,6 @@
 
 # CHECK: xori  $9,  $6, 17767
 0x38 0xc9 0x45 0x67
+
+# CHECK: synci -6137($fp)
+0x07 0xdf 0xe8 0x07
diff --git a/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-le.txt b/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-le.txt
new file mode 100644
index 000000000000..142413226805
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-le.txt
@@ -0,0 +1,337 @@
+# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2 | FileCheck %s
+
+0x05 0x73 0x20 0x46    # CHECK: abs.d $f12, $f14
+
+0x85 0x39 0x00 0x46    # CHECK: abs.s $f6, $f7
+
+0x20 0x48 0xc7 0x00    # CHECK: add $9, $6, $7
+
+0x00 0x62 0x2e 0x46    # CHECK: add.d $f8, $f12, $f14
+
+0x40 0x32 0x07 0x46    # CHECK: add.s $f9, $f6, $f7
+
+0x67 0x45 0xc9 0x20    # CHECK: addi $9, $6, 17767
+
+0x67 0xc5 0xc9 0x24    # CHECK: addiu $9, $6, -15001
+
+0x21 0x48 0xc7 0x00    # CHECK: addu $9, $6, $7
+
+0x24 0x48 0xc7 0x00    # CHECK: and $9, $6, $7
+
+0x67 0x45 0xc9 0x30    # CHECK: andi $9, $6, 17767
+
+0x4c 0x01 0x00 0x10    # CHECK: b 1332
+
+0x4c 0x01 0x00 0x45    # CHECK: bc1f 1332
+
+0x4c 0x01 0x1c 0x45    # CHECK: bc1f $fcc7, 1332
+
+0x4c 0x01 0x01 0x45    # CHECK: bc1t 1332
+
+0x4c 0x01 0x1d 0x45    # CHECK: bc1t $fcc7, 1332
+
+0x4c 0x01 0x26 0x11    # CHECK: beq $9, $6, 1332
+
+0x4c 0x01 0xc1 0x04    # CHECK: bgez  $6, 1332
+
+0x4c 0x01 0xd1 0x04    # CHECK: bgezal  $6, 1332
+
+0x4c 0x01 0xc0 0x1c    # CHECK: bgtz  $6, 1332
+
+0x4c 0x01 0xc0 0x18    # CHECK: blez  $6, 1332
+
+0x4c 0x01 0x26 0x15    # CHECK: bne $9, $6, 1332
+
+0x32 0x60 0x2e 0x46    # CHECK: c.eq.d $f12, $f14
+
+0x32 0x30 0x07 0x46    # CHECK: c.eq.s $f6, $f7
+
+0x30 0x60 0x2e 0x46    # CHECK: c.f.d $f12, $f14
+
+0x30 0x30 0x07 0x46    # CHECK: c.f.s $f6, $f7
+
+0x3e 0x60 0x2e 0x46    # CHECK: c.le.d $f12, $f14
+
+0x3e 0x30 0x07 0x46    # CHECK: c.le.s $f6, $f7
+
+0x3c 0x60 0x2e 0x46    # CHECK: c.lt.d $f12, $f14
+
+0x3c 0x30 0x07 0x46    # CHECK: c.lt.s $f6, $f7
+
+0x3d 0x60 0x2e 0x46    # CHECK: c.nge.d $f12, $f14
+
+0x3d 0x30 0x07 0x46    # CHECK: c.nge.s $f6, $f7
+
+0x3b 0x60 0x2e 0x46    # CHECK: c.ngl.d $f12, $f14
+
+0x3b 0x30 0x07 0x46    # CHECK: c.ngl.s $f6, $f7
+
+0x39 0x60 0x2e 0x46    # CHECK: c.ngle.d $f12, $f14
+
+0x39 0x30 0x07 0x46    # CHECK: c.ngle.s $f6, $f7
+
+0x3f 0x60 0x2e 0x46    # CHECK: c.ngt.d $f12, $f14
+
+0x3f 0x30 0x07 0x46    # CHECK: c.ngt.s $f6, $f7
+
+0x36 0x60 0x2e 0x46    # CHECK: c.ole.d $f12, $f14
+
+0x36 0x30 0x07 0x46    # CHECK: c.ole.s $f6, $f7
+
+0x34 0x60 0x2e 0x46    # CHECK: c.olt.d $f12, $f14
+
+0x34 0x30 0x07 0x46    # CHECK: c.olt.s $f6, $f7
+
+0x3a 0x60 0x2e 0x46    # CHECK: c.seq.d $f12, $f14
+
+0x3a 0x30 0x07 0x46    # CHECK: c.seq.s $f6, $f7
+
+0x38 0x60 0x2e 0x46    # CHECK: c.sf.d $f12, $f14
+
+0x38 0x30 0x07 0x46    # CHECK: c.sf.s $f6, $f7
+
+0x33 0x60 0x2e 0x46    # CHECK: c.ueq.d $f12, $f14
+
+0x33 0xe0 0x12 0x46    # CHECK: c.ueq.s $f28, $f18
+
+0x37 0x60 0x2e 0x46    # CHECK: c.ule.d $f12, $f14
+
+0x37 0x30 0x07 0x46    # CHECK: c.ule.s $f6, $f7
+
+0x35 0x60 0x2e 0x46    # CHECK: c.ult.d $f12, $f14
+
+0x35 0x30 0x07 0x46    # CHECK: c.ult.s $f6, $f7
+
+0x31 0x60 0x2e 0x46    # CHECK: c.un.d $f12, $f14
+
+0x31 0x30 0x07 0x46    # CHECK: c.un.s $f6, $f7
+
+0x0e 0x73 0x20 0x46    # CHECK: ceil.w.d $f12, $f14
+
+0x8e 0x39 0x00 0x46    # CHECK: ceil.w.s $f6, $f7
+
+0x00 0x38 0x46 0x44    # CHECK: cfc1  $6, $7
+
+0x21 0x30 0xe6 0x70    # CHECK: clo  $6, $7
+
+0x20 0x30 0xe6 0x70    # CHECK: clz  $6, $7
+
+0x00 0x38 0xc6 0x44    # CHECK: ctc1  $6, $7
+
+0xa1 0x39 0x00 0x46    # CHECK: cvt.d.s $f6, $f7
+
+0x21 0x73 0x80 0x46    # CHECK: cvt.d.w $f12, $f14
+
+0x25 0x73 0x20 0x46    # CHECK: cvt.l.d $f12, $f14
+
+0xa5 0x39 0x00 0x46    # CHECK: cvt.l.s $f6, $f7
+
+0x20 0x73 0x20 0x46    # CHECK: cvt.s.d $f12, $f14
+
+0xa0 0x39 0x80 0x46    # CHECK: cvt.s.w $f6, $f7
+
+0x24 0x73 0x20 0x46    # CHECK: cvt.w.d $f12, $f14
+
+0xa4 0x39 0x00 0x46    # CHECK: cvt.w.s $f6, $f7
+
+0x00 0x60 0x7e 0x41    # CHECK: di  $fp
+
+0x00 0x60 0x60 0x41    # CHECK: di
+
+0x20 0x60 0x6e 0x41    # CHECK: ei  $14
+
+0x20 0x60 0x60 0x41    # CHECK: ei
+
+0x0f 0x73 0x20 0x46    # CHECK: floor.w.d $f12, $f14
+
+0x8f 0x39 0x00 0x46    # CHECK: floor.w.s $f6, $f7
+
+0x84 0x61 0x33 0x7d    # CHECK: ins $19, $9, 6, 7
+
+0x4c 0x01 0x00 0x08    # CHECK: j 1328
+
+0x4c 0x01 0x00 0x0c    # CHECK: jal 1328
+
+0x4c 0x01 0x00 0x74    # CHECK: jalx 1328
+
+0x09 0xf8 0xe0 0x00    # CHECK: jalr  $7
+
+0x09 0xfc 0x80 0x00    # CHECK: jalr.hb  $4
+
+0x09 0x24 0xa0 0x00    # CHECK: jalr.hb  $4, $5
+
+0x08 0x00 0xe0 0x00    # CHECK: jr  $7
+
+0xc6 0x23 0xa4 0x80    # CHECK: lb  $4, 9158($5)
+
+0x06 0x00 0xa4 0x90    # CHECK: lbu $4, 6($5)
+
+0xc6 0x23 0xe9 0xd4    # CHECK: ldc1  $f9, 9158($7)
+
+0x01 0x02 0xf7 0x4d    # CHECK: ldxc1   $f8, $23($15)
+
+0x0c 0x00 0xa4 0x84    # CHECK: lh  $4, 12($5)
+
+0x0c 0x00 0xa4 0x84    # CHECK: lh  $4, 12($5)
+
+0xc6 0x23 0xe9 0xc0    # CHECK: ll  $9, 9158($7)
+
+0x67 0x45 0x06 0x3c    # CHECK: lui  $6, 17767
+
+0x05 0x00 0xa6 0x4c    # CHECK: luxc1 $f0, $6($5)
+
+0x18 0x00 0xa4 0x8c    # CHECK: lw  $4, 24($5)
+
+0xc6 0x23 0xe9 0xc4    # CHECK: lwc1  $f9, 9158($7)
+
+0x03 0x00 0x82 0x88    # CHECK: lwl   $2,  3($4)
+
+0x10 0x00 0xa3 0x98    # CHECK: lwr   $3, 16($5)
+
+0x00 0x05 0xcc 0x4d    # CHECK: lwxc1 $f20, $12($14)
+
+0x00 0x00 0xc7 0x70    # CHECK: madd   $6,  $7
+
+0xa1 0xd4 0x94 0x4e    # CHECK: madd.d  $f18, $f20, $f26, $f20
+
+0x60 0x98 0xf9 0x4f    # CHECK: madd.s  $f1, $f31, $f19, $f25
+
+0x01 0x00 0xc7 0x70    # CHECK: maddu  $6,  $7
+
+0x00 0x38 0x06 0x44    # CHECK: mfc1   $6, $f7
+
+0x10 0x28 0x00 0x00    # CHECK: mfhi  $5
+
+0x00 0xc0 0x7e 0x44    # CHECK: mfhc1   $fp, $f24
+
+0x12 0x28 0x00 0x00    # CHECK: mflo  $5
+
+0x86 0x41 0x20 0x46    # CHECK: mov.d $f6, $f8
+
+0x86 0x39 0x00 0x46    # CHECK: mov.s $f6, $f7
+
+0x04 0x00 0xc7 0x70    # CHECK: msub   $6,  $7
+
+0xa9 0xf2 0x52 0x4c    # CHECK: msub.d  $f10, $f2, $f30, $f18
+
+0x28 0x53 0x70 0x4e    # CHECK: msub.s  $f12, $f19, $f10, $f16
+
+0x05 0x00 0xc7 0x70    # CHECK: msubu  $6,  $7
+
+0x00 0x38 0x86 0x44    # CHECK: mtc1   $6, $f7
+
+0x11 0x00 0xe0 0x00    # CHECK: mthi   $7
+
+0x00 0x80 0xe0 0x44    # CHECK: mthc1   $zero, $f16
+
+0x13 0x00 0xe0 0x00    # CHECK: mtlo   $7
+
+0x02 0x62 0x2e 0x46    # CHECK: mul.d $f8, $f12, $f14
+
+0x42 0x32 0x07 0x46    # CHECK: mul.s $f9, $f6, $f7
+
+0x02 0x48 0xc7 0x70    # CHECK: mul $9,  $6,  $7
+
+0x18 0x00 0x65 0x00    # CHECK: mult  $3, $5
+
+0x19 0x00 0x65 0x00    # CHECK: multu $3, $5
+
+0x07 0x73 0x20 0x46    # CHECK: neg.d $f12, $f14
+
+0x87 0x39 0x00 0x46    # CHECK: neg.s $f6, $f7
+
+0xb1 0x74 0x54 0x4d    # CHECK: nmadd.d $f18, $f10, $f14, $f20
+
+0x30 0xc8 0xac 0x4c    # CHECK: nmadd.s $f0, $f5, $f25, $f12
+
+0x00 0x00 0x00 0x00    # CHECK: nop
+
+0x27 0x48 0xc7 0x00    # CHECK: nor $9,  $6, $7
+
+0xb9 0x87 0x1e 0x4d    # CHECK: nmsub.d $f30, $f8, $f16, $f30
+
+0x78 0x98 0x04 0x4f    # CHECK: nmsub.s $f1, $f24, $f19, $f4
+
+0x25 0x18 0x65 0x00    # CHECK: or  $3, $3, $5
+
+0x67 0x45 0xc9 0x34    # CHECK: ori $9,  $6, 17767
+
+0xc2 0x49 0x26 0x00    # CHECK: rotr $9, $6, 7
+
+0x46 0x48 0xe6 0x00    # CHECK:  rotrv $9, $6, $7
+
+0x0c 0x73 0x20 0x46    # CHECK: round.w.d $f12, $f14
+
+0x8c 0x39 0x00 0x46    # CHECK: round.w.s $f6, $f7
+
+0xc6 0x23 0xa4 0xa0    # CHECK: sb  $4, 9158($5)
+
+0x06 0x00 0xa4 0xa0    # CHECK: sb  $4, 6($5)
+
+0xc6 0x23 0xe9 0xe0    # CHECK: sc  $9, 9158($7)
+
+0xc6 0x23 0xe9 0xf4    # CHECK: sdc1  $f9, 9158($7)
+
+0x09 0x40 0x24 0x4f    # CHECK: sdxc1 $f8, $4($25)
+
+0x20 0x34 0x07 0x7c    # CHECK: seb $6, $7
+
+0x20 0x36 0x07 0x7c    # CHECK: seh $6, $7
+
+0xc6 0x23 0xa4 0xa4    # CHECK: sh  $4, 9158($5)
+
+0xc0 0x21 0x03 0x00    # CHECK: sll $4, $3, 7
+
+0x04 0x10 0xa3 0x00    # CHECK: sllv  $2, $3, $5
+
+0x2a 0x18 0x65 0x00    # CHECK: slt $3, $3, $5
+
+0x67 0x00 0x63 0x28    # CHECK: slti  $3, $3, 103
+
+0x67 0x00 0x63 0x2c    # CHECK: sltiu $3, $3, 103
+
+0x2b 0x18 0x65 0x00    # CHECK: sltu  $3, $3, $5
+
+0x04 0x73 0x20 0x46    # CHECK: sqrt.d  $f12, $f14
+
+0x84 0x39 0x00 0x46    # CHECK: sqrt.s  $f6, $f7
+
+0xc3 0x21 0x03 0x00    # CHECK: sra $4, $3, 7
+
+0x07 0x10 0xa3 0x00    # CHECK: srav  $2, $3, $5
+
+0xc2 0x21 0x03 0x00    # CHECK: srl $4, $3, 7
+
+0x06 0x10 0xa3 0x00    # CHECK: srlv  $2, $3, $5
+
+0x01 0x62 0x2e 0x46    # CHECK: sub.d $f8, $f12, $f14
+
+0x41 0x32 0x07 0x46    # CHECK: sub.s $f9, $f6, $f7
+
+0x22 0x48 0xc7 0x00    # CHECK: sub $9,  $6, $7
+
+0x23 0x20 0x65 0x00    # CHECK: subu  $4, $3, $5
+
+0x0d 0x20 0xb8 0x4c    # CHECK: suxc1 $f4, $24($5)
+
+0x18 0x00 0xa4 0xac    # CHECK: sw  $4, 24($5)
+
+0xc6 0x23 0xe9 0xe4    # CHECK: swc1  $f9, 9158($7)
+
+0x10 0x00 0xa4 0xa8    # CHECK: swl $4,  16($5)
+
+0x10 0x00 0xe6 0xb8    # CHECK: swr $6, 16($7)
+
+0x08 0xd0 0xd2 0x4e    # CHECK: swxc1 $f26, $18($22)
+
+0xcf 0x01 0x00 0x00    # CHECK: sync  7
+
+0x0d 0x73 0x20 0x46    # CHECK: trunc.w.d $f12, $f14
+
+0x8d 0x39 0x00 0x46    # CHECK: trunc.w.s $f6, $f7
+
+0xa0 0x30 0x07 0x7c    # CHECK: wsbh  $6, $7
+
+0x26 0x18 0x65 0x00    # CHECK: xor $3, $3, $5
+
+0x67 0x45 0xc9 0x38    # CHECK: xori  $9,  $6, 17767
diff --git a/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
new file mode 100644
index 000000000000..0110dccb6612
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
@@ -0,0 +1,337 @@
+# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
+
+0x46 0x20 0x73 0x05   # CHECK: abs.d $f12, $f14
+
+0x46 0x00 0x39 0x85   # CHECK: abs.s $f6, $f7
+
+0x00 0xc7 0x48 0x20   # CHECK: add $9, $6, $7
+
+0x46 0x2e 0x62 0x00   # CHECK: add.d $f8, $f12, $f14
+
+0x46 0x07 0x32 0x40   # CHECK: add.s $f9, $f6, $f7
+
+0x20 0xc9 0x45 0x67   # CHECK: addi $9, $6, 17767
+
+0x24 0xc9 0xc5 0x67   # CHECK: addiu $9, $6, -15001
+
+0x00 0xc7 0x48 0x21   # CHECK: addu $9, $6, $7
+
+0x00 0xc7 0x48 0x24   # CHECK: and $9, $6, $7
+
+0x30 0xc9 0x45 0x67   # CHECK: andi $9, $6, 17767
+
+0x10 0x00 0x01 0x4c   # CHECK: b 1332
+
+0x45 0x00 0x01 0x4c   # CHECK: bc1f 1332
+
+0x45 0x1c 0x01 0x4c   # CHECK: bc1f $fcc7, 1332
+
+0x45 0x01 0x01 0x4c   # CHECK: bc1t 1332
+
+0x45 0x1d 0x01 0x4c   # CHECK: bc1t $fcc7, 1332
+
+0x11 0x26 0x01 0x4c   # CHECK: beq $9, $6, 1332
+
+0x04 0xc1 0x01 0x4c   # CHECK: bgez  $6, 1332
+
+0x04 0xd1 0x01 0x4c   # CHECK: bgezal  $6, 1332
+
+0x1c 0xc0 0x01 0x4c   # CHECK: bgtz  $6, 1332
+
+0x18 0xc0 0x01 0x4c   # CHECK: blez  $6, 1332
+
+0x15 0x26 0x01 0x4c   # CHECK: bne $9, $6, 1332
+
+0x46 0x2e 0x60 0x32   # CHECK: c.eq.d $f12, $f14
+
+0x46 0x07 0x30 0x32   # CHECK: c.eq.s $f6, $f7
+
+0x46 0x2e 0x60 0x30   # CHECK: c.f.d $f12, $f14
+
+0x46 0x07 0x30 0x30   # CHECK: c.f.s $f6, $f7
+
+0x46 0x2e 0x60 0x3e   # CHECK: c.le.d $f12, $f14
+
+0x46 0x07 0x30 0x3e   # CHECK: c.le.s $f6, $f7
+
+0x46 0x2e 0x60 0x3c   # CHECK: c.lt.d $f12, $f14
+
+0x46 0x07 0x30 0x3c   # CHECK: c.lt.s $f6, $f7
+
+0x46 0x2e 0x60 0x3d   # CHECK: c.nge.d $f12, $f14
+
+0x46 0x07 0x30 0x3d   # CHECK: c.nge.s $f6, $f7
+
+0x46 0x2e 0x60 0x3b   # CHECK: c.ngl.d $f12, $f14
+
+0x46 0x07 0x30 0x3b   # CHECK: c.ngl.s $f6, $f7
+
+0x46 0x2e 0x60 0x39   # CHECK: c.ngle.d $f12, $f14
+
+0x46 0x07 0x30 0x39   # CHECK: c.ngle.s $f6, $f7
+
+0x46 0x2e 0x60 0x3f   # CHECK: c.ngt.d $f12, $f14
+
+0x46 0x07 0x30 0x3f   # CHECK: c.ngt.s $f6, $f7
+
+0x46 0x2e 0x60 0x36   # CHECK: c.ole.d $f12, $f14
+
+0x46 0x07 0x30 0x36   # CHECK: c.ole.s $f6, $f7
+
+0x46 0x2e 0x60 0x34   # CHECK: c.olt.d $f12, $f14
+
+0x46 0x07 0x30 0x34   # CHECK: c.olt.s $f6, $f7
+
+0x46 0x2e 0x60 0x3a   # CHECK: c.seq.d $f12, $f14
+
+0x46 0x07 0x30 0x3a   # CHECK: c.seq.s $f6, $f7
+
+0x46 0x2e 0x60 0x38   # CHECK: c.sf.d $f12, $f14
+
+0x46 0x07 0x30 0x38   # CHECK: c.sf.s $f6, $f7
+
+0x46 0x2e 0x60 0x33   # CHECK: c.ueq.d $f12, $f14
+
+0x46 0x12 0xe0 0x33   # CHECK: c.ueq.s $f28, $f18
+
+0x46 0x2e 0x60 0x37   # CHECK: c.ule.d $f12, $f14
+
+0x46 0x07 0x30 0x37   # CHECK: c.ule.s $f6, $f7
+
+0x46 0x2e 0x60 0x35   # CHECK: c.ult.d $f12, $f14
+
+0x46 0x07 0x30 0x35   # CHECK: c.ult.s $f6, $f7
+
+0x46 0x2e 0x60 0x31   # CHECK: c.un.d $f12, $f14
+
+0x46 0x07 0x30 0x31   # CHECK: c.un.s $f6, $f7
+
+0x46 0x20 0x73 0x0e   # CHECK: ceil.w.d $f12, $f14
+
+0x46 0x00 0x39 0x8e   # CHECK: ceil.w.s $f6, $f7
+
+0x44 0x46 0x38 0x00   # CHECK: cfc1  $6, $7
+
+0x70 0xe6 0x30 0x21   # CHECK: clo  $6, $7
+
+0x70 0xe6 0x30 0x20   # CHECK: clz  $6, $7
+
+0x44 0xc6 0x38 0x00   # CHECK: ctc1  $6, $7
+
+0x46 0x00 0x39 0xa1   # CHECK: cvt.d.s $f6, $f7
+
+0x46 0x80 0x73 0x21   # CHECK: cvt.d.w $f12, $f14
+
+0x46 0x20 0x73 0x25   # CHECK: cvt.l.d $f12, $f14
+
+0x46 0x00 0x39 0xa5   # CHECK: cvt.l.s $f6, $f7
+
+0x46 0x20 0x73 0x20   # CHECK: cvt.s.d $f12, $f14
+
+0x46 0x80 0x39 0xa0   # CHECK: cvt.s.w $f6, $f7
+
+0x46 0x20 0x73 0x24   # CHECK: cvt.w.d $f12, $f14
+
+0x46 0x00 0x39 0xa4   # CHECK: cvt.w.s $f6, $f7
+
+0x41 0x7e 0x60 0x00   # CHECK: di  $fp
+
+0x41 0x60 0x60 0x00   # CHECK: di
+
+0x41 0x6e 0x60 0x20   # CHECK: ei  $14
+
+0x41 0x60 0x60 0x20   # CHECK: ei
+
+0x46 0x20 0x73 0x0f   # CHECK: floor.w.d $f12, $f14
+
+0x46 0x00 0x39 0x8f   # CHECK: floor.w.s $f6, $f7
+
+0x7d 0x33 0x61 0x84   # CHECK: ins $19, $9, 6, 7
+
+0x08 0x00 0x01 0x4c   # CHECK: j 1328
+
+0x0c 0x00 0x01 0x4c   # CHECK: jal 1328
+
+0x74 0x00 0x01 0x4c   # CHECK: jalx 1328
+
+0x00 0xe0 0xf8 0x09   # CHECK: jalr  $7
+
+0x00 0x80 0xfc 0x09   # CHECK: jalr.hb  $4
+
+0x00 0xa0 0x24 0x09   # CHECK: jalr.hb  $4, $5
+
+0x00 0xe0 0x00 0x08   # CHECK: jr  $7
+
+0x80 0xa4 0x23 0xc6   # CHECK: lb  $4, 9158($5)
+
+0x90 0xa4 0x00 0x06   # CHECK: lbu $4, 6($5)
+
+0xd4 0xe9 0x23 0xc6   # CHECK: ldc1  $f9, 9158($7)
+
+0x4d 0xf7 0x02 0x01   # CHECK: ldxc1   $f8, $23($15)
+
+0x84 0xa4 0x00 0x0c   # CHECK: lh  $4, 12($5)
+
+0x84 0xa4 0x00 0x0c   # CHECK: lh  $4, 12($5)
+
+0xc0 0xe9 0x23 0xc6   # CHECK: ll  $9, 9158($7)
+
+0x3c 0x06 0x45 0x67   # CHECK: lui  $6, 17767
+
+0x4c 0xa6 0x00 0x05   # CHECK: luxc1 $f0, $6($5)
+
+0x8c 0xa4 0x00 0x18   # CHECK: lw  $4, 24($5)
+
+0xc4 0xe9 0x23 0xc6   # CHECK: lwc1  $f9, 9158($7)
+
+0x88 0x82 0x00 0x03   # CHECK: lwl   $2,  3($4)
+
+0x98 0xa3 0x00 0x10   # CHECK: lwr   $3, 16($5)
+
+0x4d 0xcc 0x05 0x00   # CHECK: lwxc1 $f20, $12($14)
+
+0x70 0xc7 0x00 0x00   # CHECK: madd   $6,  $7
+
+0x4e 0x94 0xd4 0xa1   # CHECK: madd.d  $f18, $f20, $f26, $f20
+
+0x4f 0xf9 0x98 0x60   # CHECK: madd.s  $f1, $f31, $f19, $f25
+
+0x70 0xc7 0x00 0x01   # CHECK: maddu  $6,  $7
+
+0x44 0x06 0x38 0x00   # CHECK: mfc1   $6, $f7
+
+0x00 0x00 0x28 0x10   # CHECK: mfhi  $5
+
+0x44 0x7e 0xc0 0x00   # CHECK: mfhc1   $fp, $f24
+
+0x00 0x00 0x28 0x12   # CHECK: mflo  $5
+
+0x46 0x20 0x41 0x86   # CHECK: mov.d $f6, $f8
+
+0x46 0x00 0x39 0x86   # CHECK: mov.s $f6, $f7
+
+0x70 0xc7 0x00 0x04   # CHECK: msub   $6,  $7
+
+0x4c 0x52 0xf2 0xa9   # CHECK: msub.d  $f10, $f2, $f30, $f18
+
+0x4e 0x70 0x53 0x28   # CHECK: msub.s  $f12, $f19, $f10, $f16
+
+0x70 0xc7 0x00 0x05   # CHECK: msubu  $6,  $7
+
+0x44 0x86 0x38 0x00   # CHECK: mtc1   $6, $f7
+
+0x00 0xe0 0x00 0x11   # CHECK: mthi   $7
+
+0x44 0xe0 0x80 0x00   # CHECK: mthc1   $zero, $f16
+
+0x00 0xe0 0x00 0x13   # CHECK: mtlo   $7
+
+0x46 0x2e 0x62 0x02   # CHECK: mul.d $f8, $f12, $f14
+
+0x46 0x07 0x32 0x42   # CHECK: mul.s $f9, $f6, $f7
+
+0x70 0xc7 0x48 0x02   # CHECK: mul $9,  $6,  $7
+
+0x00 0x65 0x00 0x18   # CHECK: mult  $3, $5
+
+0x00 0x65 0x00 0x19   # CHECK: multu $3, $5
+
+0x46 0x20 0x73 0x07   # CHECK: neg.d $f12, $f14
+
+0x46 0x00 0x39 0x87   # CHECK: neg.s $f6, $f7
+
+0x4d 0x54 0x74 0xb1   # CHECK: nmadd.d $f18, $f10, $f14, $f20
+
+0x4c 0xac 0xc8 0x30   # CHECK: nmadd.s $f0, $f5, $f25, $f12
+
+0x00 0x00 0x00 0x00   # CHECK: nop
+
+0x00 0xc7 0x48 0x27   # CHECK: nor $9,  $6, $7
+
+0x4d 0x1e 0x87 0xb9   # CHECK: nmsub.d $f30, $f8, $f16, $f30
+
+0x4f 0x04 0x98 0x78   # CHECK: nmsub.s $f1, $f24, $f19, $f4
+
+0x00 0x65 0x18 0x25   # CHECK: or  $3, $3, $5
+
+0x34 0xc9 0x45 0x67   # CHECK: ori $9,  $6, 17767
+
+0x00 0x26 0x49 0xc2   # CHECK: rotr $9, $6, 7
+
+0x00 0xe6 0x48 0x46   # CHECK:  rotrv $9, $6, $7
+
+0x46 0x20 0x73 0x0c   # CHECK: round.w.d $f12, $f14
+
+0x46 0x00 0x39 0x8c   # CHECK: round.w.s $f6, $f7
+
+0xa0 0xa4 0x23 0xc6   # CHECK: sb  $4, 9158($5)
+
+0xa0 0xa4 0x00 0x06   # CHECK: sb  $4, 6($5)
+
+0xe0 0xe9 0x23 0xc6   # CHECK: sc  $9, 9158($7)
+
+0xf4 0xe9 0x23 0xc6   # CHECK: sdc1  $f9, 9158($7)
+
+0x4f 0x24 0x40 0x09   # CHECK: sdxc1 $f8, $4($25)
+
+0x7c 0x07 0x34 0x20   # CHECK: seb $6, $7
+
+0x7c 0x07 0x36 0x20   # CHECK: seh $6, $7
+
+0xa4 0xa4 0x23 0xc6   # CHECK: sh  $4, 9158($5)
+
+0x00 0x03 0x21 0xc0   # CHECK: sll $4, $3, 7
+
+0x00 0xa3 0x10 0x04   # CHECK: sllv  $2, $3, $5
+
+0x00 0x65 0x18 0x2a   # CHECK: slt $3, $3, $5
+
+0x28 0x63 0x00 0x67   # CHECK: slti  $3, $3, 103
+
+0x2c 0x63 0x00 0x67   # CHECK: sltiu $3, $3, 103
+
+0x00 0x65 0x18 0x2b   # CHECK: sltu  $3, $3, $5
+
+0x46 0x20 0x73 0x04   # CHECK: sqrt.d  $f12, $f14
+
+0x46 0x00 0x39 0x84   # CHECK: sqrt.s  $f6, $f7
+
+0x00 0x03 0x21 0xc3   # CHECK: sra $4, $3, 7
+
+0x00 0xa3 0x10 0x07   # CHECK: srav  $2, $3, $5
+
+0x00 0x03 0x21 0xc2   # CHECK: srl $4, $3, 7
+
+0x00 0xa3 0x10 0x06   # CHECK: srlv  $2, $3, $5
+
+0x46 0x2e 0x62 0x01   # CHECK: sub.d $f8, $f12, $f14
+
+0x46 0x07 0x32 0x41   # CHECK: sub.s $f9, $f6, $f7
+
+0x00 0xc7 0x48 0x22   # CHECK: sub $9,  $6, $7
+
+0x00 0x65 0x20 0x23   # CHECK: subu  $4, $3, $5
+
+0x4c 0xb8 0x20 0x0d   # CHECK: suxc1 $f4, $24($5)
+
+0xac 0xa4 0x00 0x18   # CHECK: sw  $4, 24($5)
+
+0xe4 0xe9 0x23 0xc6   # CHECK: swc1  $f9, 9158($7)
+
+0xa8 0xa4 0x00 0x10   # CHECK: swl $4,  16($5)
+
+0xb8 0xe6 0x00 0x10   # CHECK: swr $6, 16($7)
+
+0x4e 0xd2 0xd0 0x08   # CHECK: swxc1 $f26, $18($22)
+
+0x00 0x00 0x01 0xcf   # CHECK: sync  7
+
+0x46 0x20 0x73 0x0d   # CHECK: trunc.w.d $f12, $f14
+
+0x46 0x00 0x39 0x8d   # CHECK: trunc.w.s $f6, $f7
+
+0x7c 0x07 0x30 0xa0   # CHECK: wsbh  $6, $7
+
+0x00 0x65 0x18 0x26   # CHECK: xor $3, $3, $5
+
+0x38 0xc9 0x45 0x67   # CHECK: xori  $9,  $6, 17767
diff --git a/test/MC/Disassembler/Mips/mips32r2/valid-xfail-mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2/valid-xfail-mips32r2.txt
new file mode 100644
index 000000000000..b70d1889a238
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips32r2/valid-xfail-mips32r2.txt
@@ -0,0 +1,83 @@
+# RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips32r2 | FileCheck %s
+# XFAIL: *
+0x46 0x2f 0x79 0x32  # CHECK :      c.eq.d    $fcc1,$f15,$f15
+0x46 0x11 0xc5 0x32  # CHECK :      c.eq.s    $fcc5,$f24,$f17
+0x46 0x35 0x5c 0x30  # CHECK :      c.f.d     $fcc4,$f11,$f21
+0x46 0x07 0xf4 0x30  # CHECK :      c.f.s     $fcc4,$f30,$f7
+0x46 0x21 0x94 0x3e  # CHECK :      c.le.d    $fcc4,$f18,$f1
+0x46 0x04 0xc6 0x3e  # CHECK :      c.le.s    $fcc6,$f24,$f4
+0x46 0x23 0x4b 0x3c  # CHECK :      c.lt.d    $fcc3,$f9,$f3
+0x46 0x0e 0x8a 0x3c  # CHECK :      c.lt.s    $fcc2,$f17,$f14
+0x46 0x30 0xad 0x3d  # CHECK :      c.nge.d   $fcc5,$f21,$f16
+0x46 0x08 0x5b 0x3d  # CHECK :      c.nge.s   $fcc3,$f11,$f8
+0x46 0x17 0xfa 0x3b  # CHECK :      c.ngl.s   $fcc2,$f31,$f23
+0x46 0x17 0x92 0x39  # CHECK :      c.ngle.s  $fcc2,$f18,$f23
+0x46 0x27 0xc4 0x3f  # CHECK :      c.ngt.d   $fcc4,$f24,$f7
+0x46 0x0d 0x45 0x3f  # CHECK :      c.ngt.s   $fcc5,$f8,$f13
+0x46 0x3f 0x82 0x36  # CHECK :      c.ole.d   $fcc2,$f16,$f31
+0x46 0x14 0x3b 0x36  # CHECK :      c.ole.s   $fcc3,$f7,$f20
+0x46 0x3c 0x9c 0x34  # CHECK :      c.olt.d   $fcc4,$f19,$f28
+0x46 0x07 0xa6 0x34  # CHECK :      c.olt.s   $fcc6,$f20,$f7
+0x46 0x27 0xfc 0x3a  # CHECK :      c.seq.d   $fcc4,$f31,$f7
+0x46 0x19 0x0f 0x3a  # CHECK :      c.seq.s   $fcc7,$f1,$f25
+0x46 0x39 0x6c 0x33  # CHECK :      c.ueq.d   $fcc4,$f13,$f25
+0x46 0x1e 0x1e 0x33  # CHECK :      c.ueq.s   $fcc6,$f3,$f30
+0x46 0x32 0xcf 0x37  # CHECK :      c.ule.d   $fcc7,$f25,$f18
+0x46 0x1e 0xaf 0x37  # CHECK :      c.ule.s   $fcc7,$f21,$f30
+0x46 0x31 0x36 0x35  # CHECK :      c.ult.d   $fcc6,$f6,$f17
+0x46 0x0a 0xc7 0x35  # CHECK :      c.ult.s   $fcc7,$f24,$f10
+0x46 0x38 0xbe 0x31  # CHECK :      c.un.d    $fcc6,$f23,$f24
+0x46 0x04 0xf1 0x31  # CHECK :      c.un.s    $fcc1,$f30,$f4
+0x46 0xc0 0x45 0x85  # CHECK :      abs.ps  $f22,$f8
+0x46 0xcc 0xc6 0x00  # CHECK :      add.ps  $f24,$f24,$f12
+0x46 0xca 0x04 0x32  # CHECK :      c.eq.ps $fcc4,$f0,$f10
+0x46 0xcc 0x66 0x30  # CHECK :      c.f.ps  $fcc6,$f12,$f12
+0x46 0xd4 0x42 0x3e  # CHECK :      c.le.ps $fcc2,$f8,$f20
+0x46 0xc4 0x90 0x3c  # CHECK :      c.lt.ps $f18,$f4
+0x46 0xda 0x10 0x3d  # CHECK :      c.nge.ps   $f2,$f26
+0x46 0xde 0xb0 0x3b  # CHECK :      c.ngl.ps   $f22,$f30
+0x46 0xd4 0x66 0x39  # CHECK :      c.ngle.ps  $fcc6,$f12,$f20
+0x46 0xc6 0xf6 0x3f  # CHECK :      c.ngt.ps   $fcc6,$f30,$f6
+0x46 0xc8 0xa6 0x36  # CHECK :      c.ole.ps   $fcc6,$f20,$f8
+0x46 0xd0 0x32 0x34  # CHECK :      c.olt.ps   $fcc2,$f6,$f16
+0x46 0xce 0xf6 0x3a  # CHECK :      c.seq.ps   $fcc6,$f30,$f14
+0x46 0xc6 0x26 0x38  # CHECK :      c.sf.ps $fcc6,$f4,$f6
+0x46 0xdc 0x20 0x33  # CHECK :      c.ueq.ps   $f4,$f28
+0x46 0xc2 0x86 0x37  # CHECK :      c.ule.ps   $fcc6,$f16,$f2
+0x46 0xc0 0x76 0x35  # CHECK :      c.ult.ps   $fcc6,$f14,$f0
+0x46 0xda 0x14 0x31  # CHECK :      c.un.ps $fcc4,$f2,$f26
+0x46 0x20 0x20 0x8a  # CHECK :      ceil.l.d   $f2,$f4
+0x46 0x00 0x6c 0x8a  # CHECK :      ceil.l.s   $f18,$f13
+0x46 0xa0 0x81 0x21  # CHECK :      cvt.d.l $f4,$f16
+0x46 0x14 0x90 0xa6  # CHECK :      cvt.ps.s   $f2,$f18,$f20
+0x46 0xa0 0xf3 0xe0  # CHECK :      cvt.s.l $f15,$f30
+0x46 0xc0 0x17 0xa8  # CHECK :      cvt.s.pl   $f30,$f2
+0x46 0xc0 0xd3 0xa0  # CHECK :      cvt.s.pu   $f14,$f26
+0x46 0x20 0x36 0x8b  # CHECK :      floor.l.d  $f26,$f6
+0x46 0x00 0x23 0x0b  # CHECK :      floor.l.s  $f12,$f4
+0x4c 0x42 0x75 0xa6  # CHECK :      madd.ps $f22,$f2,$f14,$f2
+0x46 0xc0 0x85 0x86  # CHECK :      mov.ps  $f22,$f16
+0x46 0xd8 0xe2 0x91  # CHECK :      movf.ps $f10,$f28,$fcc6
+0x46 0xd3 0xf7 0x93  # CHECK :      movn.ps $f30,$f30,s3
+0x46 0xc9 0xc5 0x11  # CHECK :      movt.ps $f20,$f24,$fcc2
+0x46 0xdf 0x84 0x92  # CHECK :      movz.ps $f18,$f16,ra
+0x4d 0xd0 0xe3 0x2e  # CHECK :      msub.ps $f12,$f14,$f28,$f16
+0x46 0xc0 0x64 0x87  # CHECK :      neg.ps  $f18,$f12
+0x4c 0x98 0x46 0xb6  # CHECK :      nmadd.ps   $f26,$f4,$f8,$f24
+0x4d 0x90 0x71 0xbe  # CHECK :      nmsub.ps   $f6,$f12,$f14,$f16
+0x46 0xde 0x46 0x2c  # CHECK :      pll.ps  $f24,$f8,$f30
+0x46 0xdc 0xd0 0x2d  # CHECK :      plu.ps  $f0,$f26,$f28
+0x46 0xda 0xf2 0x2e  # CHECK :      pul.ps  $f8,$f30,$f26
+0x46 0xc2 0x46 0x2f  # CHECK :      puu.ps  $f24,$f8,$f2
+0x41 0x49 0x98 0x00  # CHECK :      rdpgpr  s3,t1
+0x46 0x20 0x34 0x95  # CHECK :      recip.d $f18,$f6
+0x46 0x00 0xf0 0xd5  # CHECK :      recip.s $f3,$f30
+0x02 0xa7 0x68 0x46  # CHECK :      rorv    t5,a3,s5
+0x46 0x20 0x03 0x08  # CHECK :      round.l.d  $f12,$f0
+0x46 0x00 0x2e 0x08  # CHECK :      round.l.s  $f24,$f5
+0x46 0x20 0xe0 0x96  # CHECK :      rsqrt.d $f2,$f28
+0x46 0x00 0x41 0x16  # CHECK :      rsqrt.s $f4,$f8
+0x46 0xda 0x71 0x01  # CHECK :      sub.ps  $f4,$f14,$f26
+0x46 0x20 0xb5 0x89  # CHECK :      trunc.l.d  $f22,$f22
+0x46 0x00 0xff 0x09  # CHECK :      trunc.l.s  $f28,$f31
+0x41 0xcd 0x00 0x00  # CHECK :      wrpgpr  zero,t5
diff --git a/test/MC/Disassembler/Mips/mips32r2_le.txt b/test/MC/Disassembler/Mips/mips32r2_le.txt
index 0362ca6d8d67..81a05b330fde 100644
--- a/test/MC/Disassembler/Mips/mips32r2_le.txt
+++ b/test/MC/Disassembler/Mips/mips32r2_le.txt
@@ -448,3 +448,6 @@
 
 # CHECK: xori  $9,  $6, 17767
 0x67 0x45 0xc9 0x38
+
+# CHECK: synci 7500($19)
+0x4c 0x1d 0x7f 0x06
diff --git a/test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt b/test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt
new file mode 100644
index 000000000000..bd7558b7446e
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt
@@ -0,0 +1,229 @@
+# RUN: llvm-mc %s -triple=mips64el-unknown-linux -disassemble -mcpu=mips4 | FileCheck %s
+# CHECK: .text
+0x85 0xc1 0x20 0x46  # CHECK: abs.d	$f6, $f24
+0x45 0x82 0x00 0x46  # CHECK: abs.s	$f9, $f16
+0x20 0xb8 0x45 0x02  # CHECK: add	$23, $18, $5
+0x48 0x3b 0xc9 0x21  # CHECK: addi	$9, $14, 15176
+0xe7 0xe3 0x18 0x23  # CHECK: addi	$24, $24, -7193
+0x00 0x30 0x3c 0x46  # CHECK: add.d	$f0, $f6, $f28
+0x00 0xaa 0x18 0x46  # CHECK: add.s	$f8, $f21, $f24
+0xd2 0x66 0x2d 0x21  # CHECK: addi	$13, $9, 26322
+0xfe 0xff 0x08 0x21  # CHECK: addi	$8, $8, -2
+0x21 0x48 0x86 0x00  # CHECK: addu	$9, $4, $6
+0x0a 0x00 0x29 0x25  # CHECK: addiu	$9, $9, 10
+0x24 0xb8 0x4c 0x00  # CHECK: and	$23, $2, $12
+0x04 0x00 0x42 0x30  # CHECK: andi	$2, $2, 4
+0x01 0x00 0x00 0x45  # CHECK: bc1f	 8
+0x00 0x00 0x04 0x45  # CHECK: bc1f   $fcc1, 4
+0x06 0x00 0x1e 0x45  # CHECK: bc1fl  $fcc7, 28
+0x0c 0x00 0x02 0x45  # CHECK: bc1fl	 52
+0x01 0x00 0x01 0x45  # CHECK: bc1t	 8
+0x00 0x00 0x05 0x45  # CHECK: bc1t   $fcc1, 4
+0xf4 0xf7 0x03 0x45  # CHECK: bc1tl	 -8236
+0x06 0x00 0x1f 0x45  # CHECK: bc1tl  $fcc7, 28
+0x9b 0x14 0x11 0x04  # CHECK: bal	21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x9b 0x14 0xd0 0x04  # CHECK: bltzal	$6, 21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x40 0x0c 0xd3 0x51  # CHECK: beql	$14, $19, 12548
+0x1f 0x07 0x93 0x05  # CHECK: bgezall	$12, 7296
+0x4d 0xf9 0x83 0x04  # CHECK: bgezl	$4, -6856
+0x59 0xfc 0x40 0x5d  # CHECK: bgtzl	$10, -3736
+0xe7 0x02 0xc0 0x58  # CHECK: blezl	$6, 2976
+0x7a 0x00 0xd2 0x04  # CHECK: bltzall	$6, 492
+0x45 0xf6 0x22 0x06  # CHECK: bltzl	$17, -9960
+0xfc 0x04 0x94 0x57  # CHECK: bnel	$gp, $20, 5108
+0x08 0x00 0xa1 0xbc  # CHECK: cache   1, 8($5)
+0x3b 0xe0 0x3c 0x46  # CHECK: c.ngl.d	$f28, $f28
+0x39 0x00 0x30 0x46  # CHECK: c.ngle.d	$f0, $f16
+0x38 0xf0 0x20 0x46  # CHECK: c.sf.d	$f30, $f0
+0x38 0x70 0x16 0x46  # CHECK: c.sf.s	$f14, $f22
+0x4a 0x18 0x20 0x46  # CHECK: ceil.l.d  $f1, $f3
+0x8a 0x6c 0x00 0x46  # CHECK: ceil.l.s  $f18, $f13
+0xce 0xc2 0x20 0x46  # CHECK: ceil.w.d	$f11, $f24
+0x8e 0xa1 0x00 0x46  # CHECK: ceil.w.s	$f6, $f20
+0x00 0xa8 0x51 0x44  # CHECK: cfc1	$17, $21
+0x00 0xd0 0xc6 0x44  # CHECK: ctc1	$6, $26
+0xa1 0xe5 0x00 0x46  # CHECK: cvt.d.s	$f22, $f28
+0xa1 0x5e 0x80 0x46  # CHECK: cvt.d.w	$f26, $f11
+0x21 0x81 0xa0 0x46  # CHECK: cvt.d.l $f4, $f16
+0x25 0x7e 0x20 0x46  # CHECK: cvt.l.d $f24, $f15
+0xe5 0xea 0x00 0x46  # CHECK: cvt.l.s $f11, $f29
+0xe0 0xf3 0xa0 0x46  # CHECK: cvt.s.l $f15, $f30
+0xa0 0x46 0x20 0x46  # CHECK: cvt.s.d	$f26, $f8
+0xa0 0x7d 0x80 0x46  # CHECK: cvt.s.w	$f22, $f15
+0x24 0x75 0x20 0x46  # CHECK: cvt.w.d	$f20, $f14
+0x24 0xc5 0x00 0x46  # CHECK: cvt.w.s	$f20, $f24
+0x2c 0x98 0x3f 0x00  # CHECK: dadd    $19, $1, $ra
+0xc7 0x93 0x9d 0x62  # CHECK: daddi   $sp, $20, -27705
+0xc7 0x93 0xbd 0x63  # CHECK: daddi   $sp, $sp, -27705
+0xc7 0x93 0x9d 0x62  # CHECK: daddi   $sp, $20, -27705
+0xc7 0x93 0x9d 0x62  # CHECK: daddi   $sp, $20, -27705
+0xc7 0x93 0xbd 0x63  # CHECK: daddi   $sp, $sp, -27705
+0x16 0xee 0xda 0x66  # CHECK: daddiu  $26, $22, -4586
+0x2d 0x98 0x3f 0x00  # CHECK: daddu   $19, $1, $ra
+0x9f 0x46 0x58 0x64  # CHECK: daddiu  $24, $2, 18079
+0x3f 0x69 0x73 0x66  # CHECK: daddiu  $19, $19, 26943
+0x1e 0x00 0x53 0x03  # CHECK: ddiv    $zero, $26, $19
+0x1f 0x00 0x11 0x02  # CHECK: ddivu   $zero, $16, $17
+0x1a 0x00 0x2b 0x03  # CHECK: div	$zero, $25, $11
+0x03 0xa7 0x3a 0x46  # CHECK: div.d	$f28, $f20, $f26
+0x03 0x29 0x0f 0x46  # CHECK: div.s	$f4, $f5, $f15
+0x1b 0x00 0x2f 0x03  # CHECK: divu	$zero, $25, $15
+0x00 0x68 0x2c 0x44  # CHECK: dmfc1   $12, $f13
+0x00 0x70 0xb0 0x44  # CHECK: dmtc1   $16, $f14
+0x1c 0x00 0xe9 0x02  # CHECK: dmult   $23, $9
+0x1d 0x00 0xa6 0x00  # CHECK: dmultu  $5, $6
+0xb8 0x04 0x00 0x00  # CHECK: dsll    $zero, $zero, 18
+0xb8 0x04 0x14 0x00  # CHECK: dsll    $zero, $20, 18
+0x14 0x00 0x94 0x01  # CHECK: dsllv   $zero, $20, $12
+0xbc 0x04 0x00 0x00  # CHECK: dsll32  $zero, $zero, 18
+0xbc 0x04 0x00 0x00  # CHECK: dsll32  $zero, $zero, 18
+0x14 0x00 0x94 0x01  # CHECK: dsllv   $zero, $20, $12
+0xbb 0xe2 0x1c 0x00  # CHECK: dsra    $gp, $gp, 10
+0xbb 0xe2 0x12 0x00  # CHECK: dsra    $gp, $18, 10
+0x17 0xe0 0x72 0x02  # CHECK: dsrav   $gp, $18, $19
+0xbf 0xe2 0x1c 0x00  # CHECK: dsra32  $gp, $gp, 10
+0xbf 0xe2 0x12 0x00  # CHECK: dsra32  $gp, $18, 10
+0x17 0xe0 0x72 0x02  # CHECK: dsrav   $gp, $18, $19
+0xfa 0x9d 0x13 0x00  # CHECK: dsrl    $19, $19, 23
+0xfa 0x9d 0x06 0x00  # CHECK: dsrl    $19, $6, 23
+0x16 0x98 0x86 0x02  # CHECK: dsrlv   $19, $6, $20
+0xfe 0x9d 0x13 0x00  # CHECK: dsrl32  $19, $19, 23
+0xfe 0x9d 0x06 0x00  # CHECK: dsrl32  $19, $6, 23
+0x16 0x98 0x86 0x02  # CHECK: dsrlv   $19, $6, $20
+0x2e 0x38 0xc8 0x02  # CHECK: dsub    $7, $22, $8
+0x2f 0x28 0xba 0x00  # CHECK: dsubu   $5, $5, $26
+0xc0 0x00 0x00 0x00  # CHECK: ehb
+0x18 0x00 0x00 0x42  # CHECK: eret
+0x8f 0x53 0x20 0x46  # CHECK: floor.w.d	$f14, $f10
+0x0f 0x4a 0x00 0x46  # CHECK: floor.w.s	$f8, $f9
+0x8b 0x3e 0x20 0x46  # CHECK: floor.l.d $f26, $f7
+0x0b 0x2b 0x00 0x46  # CHECK: floor.l.s $f12, $f5
+0x4d 0xc7 0x58 0x81  # CHECK: lb	$24, -14515($10)
+0xf3 0x75 0x68 0x90  # CHECK: lbu	$8, 30195($3)
+0x07 0x40 0x0a 0xd6  # CHECK: ldc1	$f10, 16391($16)
+0x43 0xad 0x28 0xd8  # CHECK: ldc2	$8, -21181($1)
+0x94 0xde 0xab 0x86  # CHECK: lh	$11, -8556($21)
+0xbd 0xa6 0x53 0x94  # CHECK: lhu	$19, -22851($2)
+0xb3 0x8b 0x01 0x24  # CHECK: addiu	$1, $zero, -29773
+0x3f 0x8b 0x00 0x24  # CHECK: addiu	$zero, $zero, -29889
+0x67 0xe3 0x42 0xc2  # CHECK: ll	$2, -7321($18)
+0x2a 0x16 0xa8 0x8c  # CHECK: lw	$8, 5674($5)
+0xf1 0x27 0x50 0xc7  # CHECK: lwc1	$f16, 10225($26)
+0xb7 0xfc 0xd2 0xc8  # CHECK: lwc2	$18, -841($6)
+0x79 0xef 0xf4 0x89  # CHECK: lwl	$20, -4231($15)
+0x35 0xb5 0x80 0x9b  # CHECK: lwr	$zero, -19147($gp)
+0x00 0x03 0xd1 0x4f  # CHECK: lwxc1   $f12, $17($fp)
+0x00 0xd8 0x07 0x44  # CHECK: mfc1	$7, $f27
+0x10 0x98 0x00 0x00  # CHECK: mfhi	$19
+0x10 0xe8 0x00 0x00  # CHECK: mfhi	$sp
+0x12 0x88 0x00 0x00  # CHECK: mflo	$17
+0x06 0x75 0x20 0x46  # CHECK: mov.d	$f20, $f14
+0x86 0xd8 0x00 0x46  # CHECK: mov.s	$f2, $f27
+0x01 0xe0 0x1c 0x01  # CHECK: movf    $gp, $8, $fcc7
+0x91 0x59 0x34 0x46  # CHECK: movf.d  $f6, $f11, $fcc5
+0xd1 0x2d 0x18 0x46  # CHECK: movf.s  $f23, $f5, $fcc6
+0x21 0xf0 0x80 0x00  # CHECK: move	 $fp, $4
+0x21 0xc8 0xc0 0x00  # CHECK: move	 $25, $6
+0x0b 0x18 0x30 0x02  # CHECK: movn   $3, $17, $16
+0xd3 0xae 0x3a 0x46  # CHECK: movn.d $f27, $f21, $26
+0x13 0x03 0x17 0x46  # CHECK: movn.s $f12, $f0, $23
+0x01 0x00 0x95 0x02  # CHECK: movt   $zero, $20, $fcc5
+0x11 0x10 0x21 0x46  # CHECK: movt.d $f0, $f2, $fcc0
+0x91 0x17 0x05 0x46  # CHECK: movt.s $f30, $f2, $fcc1
+0x0a 0x28 0xc9 0x02  # CHECK: movz   $5, $22, $9
+0x12 0xeb 0x29 0x46  # CHECK: movz.d $f12, $f29, $9
+0x52 0x3e 0x03 0x46  # CHECK: movz.s $f25, $f7, $3
+0x00 0x48 0x9e 0x44  # CHECK: mtc1	$fp, $f9
+0x11 0x00 0x20 0x02  # CHECK: mthi	$17
+0x13 0x00 0xa0 0x03  # CHECK: mtlo	$sp
+0x13 0x00 0x20 0x03  # CHECK: mtlo	$25
+0x02 0xa5 0x30 0x46  # CHECK: mul.d	$f20, $f20, $f16
+0x82 0x57 0x02 0x46  # CHECK: mul.s	$f30, $f10, $f2
+0x18 0x00 0xb4 0x03  # CHECK: mult	$sp, $20
+0x18 0x00 0xa2 0x03  # CHECK: mult	$sp, $2
+0x19 0x00 0x9a 0x03  # CHECK: multu	$gp, $26
+0x19 0x00 0x32 0x01  # CHECK: multu	$9, $18
+0x23 0x10 0x02 0x00  # CHECK: negu	 $2, $2
+0x23 0x10 0x03 0x00  # CHECK: negu	 $2, $3
+0x87 0x96 0x20 0x46  # CHECK: neg.d	$f26, $f18
+0x47 0x78 0x00 0x46  # CHECK: neg.s	$f1, $f15
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x27 0x38 0x07 0x00  # CHECK: nor	$7, $zero, $7
+0x25 0x60 0x1d 0x02  # CHECK: or	$12, $16, $sp
+0x04 0x00 0x42 0x34  # CHECK: ori	$2, $2, 4
+0x08 0x00 0xa1 0xcc  # CHECK: pref    1, 8($5)  
+0x08 0x0b 0x20 0x46  # CHECK: round.l.d $f12, $f1
+0x48 0x2e 0x00 0x46  # CHECK: round.l.s $f25, $f5
+0x8c 0x21 0x20 0x46  # CHECK: round.w.d	$f6, $f4
+0xcc 0xe6 0x00 0x46  # CHECK: round.w.s	$f27, $f28
+0x6f 0xb2 0xd6 0xa1  # CHECK: sb	$22, -19857($14)
+0xd8 0x49 0x6f 0xe2  # CHECK: sc	$15, 18904($19)
+0xcd 0xdf 0xaf 0xf3  # CHECK: scd   $15, -8243($sp)
+0xcb 0x16 0x4c 0xfd  # CHECK: sd    $12, 5835($10)
+0x1f 0xae 0xc7 0xb3  # CHECK: sdl   $7, -20961($fp)
+0x39 0xb0 0x8b 0xb5  # CHECK: sdr   $11, -20423($12)
+0x6e 0x77 0xbe 0xf5  # CHECK: sdc1	$f30, 30574($13)
+0x75 0x5a 0x54 0xfa  # CHECK: sdc2	$20, 23157($18)
+0x09 0x58 0xca 0x4d  # CHECK: sdxc1   $f11, $10($14)
+0xd0 0xe5 0xee 0xa5  # CHECK: sh	$14, -6704($15)
+0x80 0x3c 0x07 0x00  # CHECK: sll	$7, $7, 18
+0x80 0x3c 0x00 0x00  # CHECK: sll	$7, $zero, 18
+0x04 0x38 0x20 0x01  # CHECK: sllv	$7, $zero, $9
+0x04 0x38 0x20 0x01  # CHECK: sllv	$7, $zero, $9
+0x2a 0xb8 0x7b 0x01  # CHECK: slt	$23, $11, $27
+0x11 0x25 0x51 0x29  # CHECK: slti	$17, $10, 9489
+0x55 0xc3 0x39 0x2f  # CHECK: sltiu	$25, $25, -15531
+0x2b 0xa0 0xab 0x02  # CHECK: sltu	$20, $21, $11
+0x55 0xc3 0x38 0x2f  # CHECK: sltiu	$24, $25, -15531
+0x04 0xb4 0x20 0x46  # CHECK: sqrt.d	$f16, $f22
+0x04 0x08 0x00 0x46  # CHECK: sqrt.s	$f0, $f1
+0xc3 0x8b 0x11 0x00  # CHECK: sra	$17, $17, 15
+0xc3 0x8b 0x17 0x00  # CHECK: sra	$17, $23, 15
+0x07 0x88 0xb7 0x03  # CHECK: srav	$17, $23, $sp
+0x07 0x88 0xb7 0x03  # CHECK: srav	$17, $23, $sp
+0xc2 0x11 0x02 0x00  # CHECK: srl	$2, $2, 7
+0xc2 0x11 0x02 0x00  # CHECK: srl	$2, $2, 7
+0x06 0xc8 0x94 0x00  # CHECK: srlv	$25, $20, $4
+0x06 0xc8 0x94 0x00  # CHECK: srlv	$25, $20, $4
+0x40 0x00 0x00 0x00  # CHECK: ssnop
+0x22 0xb0 0x6c 0x02  # CHECK: sub	$22, $19, $12
+0x36 0x0c 0x36 0x22  # CHECK: addi	$22, $17, 3126
+0x90 0xe6 0xad 0x21  # CHECK: addi	$13, $13, -6512
+0x81 0x14 0x30 0x46  # CHECK: sub.d	$f18, $f2, $f16
+0xc1 0xb5 0x16 0x46  # CHECK: sub.s	$f23, $f22, $f22
+0x23 0xe8 0xd6 0x02  # CHECK: subu	$sp, $22, $22
+0x50 0xd8 0xbf 0xaf  # CHECK: sw	$ra, -10160($sp)
+0xef 0xde 0x06 0xe7  # CHECK: swc1	$f6, -8465($24)
+0x30 0x61 0x19 0xea  # CHECK: swc2	$25, 24880($16)
+0x7e 0x35 0x6f 0xaa  # CHECK: swl	$15, 13694($19)
+0x22 0x98 0xd1 0xb9  # CHECK: swr	$17, -26590($14)
+0x08 0x98 0x4c 0x4f  # CHECK: swxc1   $f19, $12($26)
+0x34 0x00 0x03 0x00  # CHECK: teq	 $zero, $3
+0x34 0x9b 0xa7 0x00  # CHECK: teq	$5, $7, 620
+0xa0 0xbb 0xac 0x06  # CHECK: teqi	$21, 48032
+0x30 0x00 0xea 0x00  # CHECK: tge	 $7, $10
+0x30 0x55 0xb3 0x00  # CHECK: tge	$5, $19, 340
+0xa1 0x13 0x28 0x06  # CHECK: tgei	$17, 5025
+0x33 0x90 0xa9 0x07  # CHECK: tgeiu	$sp, 36915
+0x31 0x00 0xdc 0x02  # CHECK: tgeu	 $22, $gp
+0xf1 0x5e 0x8e 0x02  # CHECK: tgeu	$20, $14, 379
+0x08 0x00 0x00 0x42  # CHECK: tlbp
+0x01 0x00 0x00 0x42  # CHECK: tlbr
+0x02 0x00 0x00 0x42  # CHECK: tlbwi
+0x06 0x00 0x00 0x42  # CHECK: tlbwr
+0x32 0x00 0xed 0x01  # CHECK: tlt	 $15, $13
+0x72 0x21 0x53 0x00  # CHECK: tlt	$2, $19, 133
+0xbd 0xad 0xca 0x05  # CHECK: tlti	$14, 44477
+0x2c 0xec 0xeb 0x07  # CHECK: tltiu	$ra, 60460
+0x33 0x00 0x70 0x01  # CHECK: tltu	 $11, $16
+0x33 0xfe 0x1d 0x02  # CHECK: tltu	$16, $sp, 1016
+0x36 0x00 0xd1 0x00  # CHECK: tne	 $6, $17
+0x76 0xdd 0xe8 0x00  # CHECK: tne	$7, $8, 885
+0x31 0x8c 0x8e 0x05  # CHECK: tnei	$12, 35889
+0xc9 0xbd 0x20 0x46  # CHECK: trunc.l.d $f23, $f23
+0x09 0xff 0x00 0x46  # CHECK: trunc.l.s $f28, $f31
+0x8d 0x75 0x20 0x46  # CHECK: trunc.w.d	$f22, $f14
+0x0d 0xf7 0x00 0x46  # CHECK: trunc.w.s	$f28, $f30
+0x26 0x90 0x9e 0x00  # CHECK: xor	$18, $4, $fp
diff --git a/test/MC/Disassembler/Mips/mips4/valid-mips4.txt b/test/MC/Disassembler/Mips/mips4/valid-mips4.txt
new file mode 100644
index 000000000000..abccbbfe7a98
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips4/valid-mips4.txt
@@ -0,0 +1,229 @@
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips4 | FileCheck %s
+# CHECK: .text
+0x46 0x20 0xc1 0x85  # CHECK: abs.d	$f6, $f24
+0x46 0x00 0x82 0x45  # CHECK: abs.s	$f9, $f16
+0x02 0x45 0xb8 0x20  # CHECK: add	$23, $18, $5
+0x21 0xc9 0x3b 0x48  # CHECK: addi	$9, $14, 15176
+0x23 0x18 0xe3 0xe7  # CHECK: addi	$24, $24, -7193
+0x46 0x3c 0x30 0x00  # CHECK: add.d	$f0, $f6, $f28
+0x46 0x18 0xaa 0x00  # CHECK: add.s	$f8, $f21, $f24
+0x21 0x2d 0x66 0xd2  # CHECK: addi	$13, $9, 26322
+0x21 0x08 0xff 0xfe  # CHECK: addi	$8, $8, -2
+0x00 0x86 0x48 0x21  # CHECK: addu	$9, $4, $6
+0x25 0x29 0x00 0x0a  # CHECK: addiu	$9, $9, 10
+0x00 0x4c 0xb8 0x24  # CHECK: and	$23, $2, $12
+0x30 0x42 0x00 0x04  # CHECK: andi	$2, $2, 4
+0x45 0x00 0x00 0x01  # CHECK: bc1f	 8
+0x45 0x04 0x00 0x00  # CHECK: bc1f   $fcc1, 4
+0x45 0x1e 0x00 0x06  # CHECK: bc1fl  $fcc7, 28
+0x45 0x02 0x00 0x0c  # CHECK: bc1fl	 52
+0x45 0x01 0x00 0x01  # CHECK: bc1t	 8
+0x45 0x05 0x00 0x00  # CHECK: bc1t   $fcc1, 4
+0x45 0x03 0xf7 0xf4  # CHECK: bc1tl	 -8236
+0x45 0x1f 0x00 0x06  # CHECK: bc1tl  $fcc7, 28
+0x04 0x11 0x14 0x9b  # CHECK: bal	21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x04 0xd0 0x14 0x9b  # CHECK: bltzal	$6, 21104
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x51 0xd3 0x0c 0x40  # CHECK: beql	$14, $19, 12548
+0x05 0x93 0x07 0x1f  # CHECK: bgezall	$12, 7296
+0x04 0x83 0xf9 0x4d  # CHECK: bgezl	$4, -6856
+0x5d 0x40 0xfc 0x59  # CHECK: bgtzl	$10, -3736
+0x58 0xc0 0x02 0xe7  # CHECK: blezl	$6, 2976
+0x04 0xd2 0x00 0x7a  # CHECK: bltzall	$6, 492
+0x06 0x22 0xf6 0x45  # CHECK: bltzl	$17, -9960
+0x57 0x94 0x04 0xfc  # CHECK: bnel	$gp, $20, 5108
+0xbc 0xa1 0x00 0x08  # CHECK: cache   1, 8($5)
+0x46 0x3c 0xe0 0x3b  # CHECK: c.ngl.d	$f28, $f28
+0x46 0x30 0x00 0x39  # CHECK: c.ngle.d	$f0, $f16
+0x46 0x20 0xf0 0x38  # CHECK: c.sf.d	$f30, $f0
+0x46 0x16 0x70 0x38  # CHECK: c.sf.s	$f14, $f22
+0x46 0x20 0x18 0x4a  # CHECK: ceil.l.d  $f1, $f3
+0x46 0x00 0x6c 0x8a  # CHECK: ceil.l.s  $f18, $f13
+0x46 0x20 0xc2 0xce  # CHECK: ceil.w.d	$f11, $f24
+0x46 0x00 0xa1 0x8e  # CHECK: ceil.w.s	$f6, $f20
+0x44 0x51 0xa8 0x00  # CHECK: cfc1	$17, $21
+0x44 0xc6 0xd0 0x00  # CHECK: ctc1	$6, $26
+0x46 0x00 0xe5 0xa1  # CHECK: cvt.d.s	$f22, $f28
+0x46 0x80 0x5e 0xa1  # CHECK: cvt.d.w	$f26, $f11
+0x46 0xa0 0x81 0x21  # CHECK: cvt.d.l $f4, $f16
+0x46 0x20 0x7e 0x25  # CHECK: cvt.l.d $f24, $f15
+0x46 0x00 0xea 0xe5  # CHECK: cvt.l.s $f11, $f29
+0x46 0xa0 0xf3 0xe0  # CHECK: cvt.s.l $f15, $f30
+0x46 0x20 0x46 0xa0  # CHECK: cvt.s.d	$f26, $f8
+0x46 0x80 0x7d 0xa0  # CHECK: cvt.s.w	$f22, $f15
+0x46 0x20 0x75 0x24  # CHECK: cvt.w.d	$f20, $f14
+0x46 0x00 0xc5 0x24  # CHECK: cvt.w.s	$f20, $f24
+0x00 0x3f 0x98 0x2c  # CHECK: dadd    $19, $1, $ra
+0x62 0x9d 0x93 0xc7  # CHECK: daddi   $sp, $20, -27705
+0x63 0xbd 0x93 0xc7  # CHECK: daddi   $sp, $sp, -27705
+0x62 0x9d 0x93 0xc7  # CHECK: daddi   $sp, $20, -27705
+0x62 0x9d 0x93 0xc7  # CHECK: daddi   $sp, $20, -27705
+0x63 0xbd 0x93 0xc7  # CHECK: daddi   $sp, $sp, -27705
+0x66 0xda 0xee 0x16  # CHECK: daddiu  $26, $22, -4586
+0x00 0x3f 0x98 0x2d  # CHECK: daddu   $19, $1, $ra
+0x64 0x58 0x46 0x9f  # CHECK: daddiu  $24, $2, 18079
+0x66 0x73 0x69 0x3f  # CHECK: daddiu  $19, $19, 26943
+0x03 0x53 0x00 0x1e  # CHECK: ddiv    $zero, $26, $19
+0x02 0x11 0x00 0x1f  # CHECK: ddivu   $zero, $16, $17
+0x03 0x2b 0x00 0x1a  # CHECK: div	$zero, $25, $11
+0x46 0x3a 0xa7 0x03  # CHECK: div.d	$f28, $f20, $f26
+0x46 0x0f 0x29 0x03  # CHECK: div.s	$f4, $f5, $f15
+0x03 0x2f 0x00 0x1b  # CHECK: divu	$zero, $25, $15
+0x44 0x2c 0x68 0x00  # CHECK: dmfc1   $12, $f13
+0x44 0xb0 0x70 0x00  # CHECK: dmtc1   $16, $f14
+0x02 0xe9 0x00 0x1c  # CHECK: dmult   $23, $9
+0x00 0xa6 0x00 0x1d  # CHECK: dmultu  $5, $6
+0x00 0x00 0x04 0xb8  # CHECK: dsll    $zero, $zero, 18
+0x00 0x14 0x04 0xb8  # CHECK: dsll    $zero, $20, 18
+0x01 0x94 0x00 0x14  # CHECK: dsllv   $zero, $20, $12
+0x00 0x00 0x04 0xbc  # CHECK: dsll32  $zero, $zero, 18
+0x00 0x00 0x04 0xbc  # CHECK: dsll32  $zero, $zero, 18
+0x01 0x94 0x00 0x14  # CHECK: dsllv   $zero, $20, $12
+0x00 0x1c 0xe2 0xbb  # CHECK: dsra    $gp, $gp, 10
+0x00 0x12 0xe2 0xbb  # CHECK: dsra    $gp, $18, 10
+0x02 0x72 0xe0 0x17  # CHECK: dsrav   $gp, $18, $19
+0x00 0x1c 0xe2 0xbf  # CHECK: dsra32  $gp, $gp, 10
+0x00 0x12 0xe2 0xbf  # CHECK: dsra32  $gp, $18, 10
+0x02 0x72 0xe0 0x17  # CHECK: dsrav   $gp, $18, $19
+0x00 0x13 0x9d 0xfa  # CHECK: dsrl    $19, $19, 23
+0x00 0x06 0x9d 0xfa  # CHECK: dsrl    $19, $6, 23
+0x02 0x86 0x98 0x16  # CHECK: dsrlv   $19, $6, $20
+0x00 0x13 0x9d 0xfe  # CHECK: dsrl32  $19, $19, 23
+0x00 0x06 0x9d 0xfe  # CHECK: dsrl32  $19, $6, 23
+0x02 0x86 0x98 0x16  # CHECK: dsrlv   $19, $6, $20
+0x02 0xc8 0x38 0x2e  # CHECK: dsub    $7, $22, $8
+0x00 0xba 0x28 0x2f  # CHECK: dsubu   $5, $5, $26
+0x00 0x00 0x00 0xc0  # CHECK: ehb
+0x42 0x00 0x00 0x18  # CHECK: eret
+0x46 0x20 0x53 0x8f  # CHECK: floor.w.d	$f14, $f10
+0x46 0x00 0x4a 0x0f  # CHECK: floor.w.s	$f8, $f9
+0x46 0x20 0x3e 0x8b  # CHECK: floor.l.d $f26, $f7
+0x46 0x00 0x2b 0x0b  # CHECK: floor.l.s $f12, $f5
+0x81 0x58 0xc7 0x4d  # CHECK: lb	$24, -14515($10)
+0x90 0x68 0x75 0xf3  # CHECK: lbu	$8, 30195($3)
+0xd6 0x0a 0x40 0x07  # CHECK: ldc1	$f10, 16391($16)
+0xd8 0x28 0xad 0x43  # CHECK: ldc2	$8, -21181($1)
+0x86 0xab 0xde 0x94  # CHECK: lh	$11, -8556($21)
+0x94 0x53 0xa6 0xbd  # CHECK: lhu	$19, -22851($2)
+0x24 0x01 0x8b 0xb3  # CHECK: addiu	$1, $zero, -29773
+0x24 0x00 0x8b 0x3f  # CHECK: addiu	$zero, $zero, -29889
+0xc2 0x42 0xe3 0x67  # CHECK: ll	$2, -7321($18)
+0x8c 0xa8 0x16 0x2a  # CHECK: lw	$8, 5674($5)
+0xc7 0x50 0x27 0xf1  # CHECK: lwc1	$f16, 10225($26)
+0xc8 0xd2 0xfc 0xb7  # CHECK: lwc2	$18, -841($6)
+0x89 0xf4 0xef 0x79  # CHECK: lwl	$20, -4231($15)
+0x9b 0x80 0xb5 0x35  # CHECK: lwr	$zero, -19147($gp)
+0x4f 0xd1 0x03 0x00  # CHECK: lwxc1   $f12, $17($fp)
+0x44 0x07 0xd8 0x00  # CHECK: mfc1	$7, $f27
+0x00 0x00 0x98 0x10  # CHECK: mfhi	$19
+0x00 0x00 0xe8 0x10  # CHECK: mfhi	$sp
+0x00 0x00 0x88 0x12  # CHECK: mflo	$17
+0x46 0x20 0x75 0x06  # CHECK: mov.d	$f20, $f14
+0x46 0x00 0xd8 0x86  # CHECK: mov.s	$f2, $f27
+0x01 0x1c 0xe0 0x01  # CHECK: movf    $gp, $8, $fcc7
+0x46 0x34 0x59 0x91  # CHECK: movf.d  $f6, $f11, $fcc5
+0x46 0x18 0x2d 0xd1  # CHECK: movf.s  $f23, $f5, $fcc6
+0x00 0x80 0xf0 0x21  # CHECK: move	 $fp, $4
+0x00 0xc0 0xc8 0x21  # CHECK: move	 $25, $6
+0x02 0x30 0x18 0x0b  # CHECK: movn   $3, $17, $16
+0x46 0x3a 0xae 0xd3  # CHECK: movn.d $f27, $f21, $26
+0x46 0x17 0x03 0x13  # CHECK: movn.s $f12, $f0, $23
+0x02 0x95 0x00 0x01  # CHECK: movt   $zero, $20, $fcc5
+0x46 0x21 0x10 0x11  # CHECK: movt.d $f0, $f2, $fcc0
+0x46 0x05 0x17 0x91  # CHECK: movt.s $f30, $f2, $fcc1
+0x02 0xc9 0x28 0x0a  # CHECK: movz   $5, $22, $9
+0x46 0x29 0xeb 0x12  # CHECK: movz.d $f12, $f29, $9
+0x46 0x03 0x3e 0x52  # CHECK: movz.s $f25, $f7, $3
+0x44 0x9e 0x48 0x00  # CHECK: mtc1	$fp, $f9
+0x02 0x20 0x00 0x11  # CHECK: mthi	$17
+0x03 0xa0 0x00 0x13  # CHECK: mtlo	$sp
+0x03 0x20 0x00 0x13  # CHECK: mtlo	$25
+0x46 0x30 0xa5 0x02  # CHECK: mul.d	$f20, $f20, $f16
+0x46 0x02 0x57 0x82  # CHECK: mul.s	$f30, $f10, $f2
+0x03 0xb4 0x00 0x18  # CHECK: mult	$sp, $20
+0x03 0xa2 0x00 0x18  # CHECK: mult	$sp, $2
+0x03 0x9a 0x00 0x19  # CHECK: multu	$gp, $26
+0x01 0x32 0x00 0x19  # CHECK: multu	$9, $18
+0x00 0x02 0x10 0x23  # CHECK: negu	 $2, $2
+0x00 0x03 0x10 0x23  # CHECK: negu	 $2, $3
+0x46 0x20 0x96 0x87  # CHECK: neg.d	$f26, $f18
+0x46 0x00 0x78 0x47  # CHECK: neg.s	$f1, $f15
+0x00 0x00 0x00 0x00  # CHECK: nop
+0x00 0x07 0x38 0x27  # CHECK: nor	$7, $zero, $7
+0x02 0x1d 0x60 0x25  # CHECK: or	$12, $16, $sp
+0x34 0x42 0x00 0x04  # CHECK: ori	$2, $2, 4
+0xcc 0xa1 0x00 0x08  # CHECK: pref    1, 8($5)  
+0x46 0x20 0x0b 0x08  # CHECK: round.l.d $f12, $f1
+0x46 0x00 0x2e 0x48  # CHECK: round.l.s $f25, $f5
+0x46 0x20 0x21 0x8c  # CHECK: round.w.d	$f6, $f4
+0x46 0x00 0xe6 0xcc  # CHECK: round.w.s	$f27, $f28
+0xa1 0xd6 0xb2 0x6f  # CHECK: sb	$22, -19857($14)
+0xe2 0x6f 0x49 0xd8  # CHECK: sc	$15, 18904($19)
+0xf3 0xaf 0xdf 0xcd  # CHECK: scd   $15, -8243($sp)
+0xfd 0x4c 0x16 0xcb  # CHECK: sd    $12, 5835($10)
+0xb3 0xc7 0xae 0x1f  # CHECK: sdl   $7, -20961($fp)
+0xb5 0x8b 0xb0 0x39  # CHECK: sdr   $11, -20423($12)
+0xf5 0xbe 0x77 0x6e  # CHECK: sdc1	$f30, 30574($13)
+0xfa 0x54 0x5a 0x75  # CHECK: sdc2	$20, 23157($18)
+0x4d 0xca 0x58 0x09  # CHECK: sdxc1   $f11, $10($14)
+0xa5 0xee 0xe5 0xd0  # CHECK: sh	$14, -6704($15)
+0x00 0x07 0x3c 0x80  # CHECK: sll	$7, $7, 18
+0x00 0x00 0x3c 0x80  # CHECK: sll	$7, $zero, 18
+0x01 0x20 0x38 0x04  # CHECK: sllv	$7, $zero, $9
+0x01 0x20 0x38 0x04  # CHECK: sllv	$7, $zero, $9
+0x01 0x7b 0xb8 0x2a  # CHECK: slt	$23, $11, $27
+0x29 0x51 0x25 0x11  # CHECK: slti	$17, $10, 9489
+0x2f 0x39 0xc3 0x55  # CHECK: sltiu	$25, $25, -15531
+0x02 0xab 0xa0 0x2b  # CHECK: sltu	$20, $21, $11
+0x2f 0x38 0xc3 0x55  # CHECK: sltiu	$24, $25, -15531
+0x46 0x20 0xb4 0x04  # CHECK: sqrt.d	$f16, $f22
+0x46 0x00 0x08 0x04  # CHECK: sqrt.s	$f0, $f1
+0x00 0x11 0x8b 0xc3  # CHECK: sra	$17, $17, 15
+0x00 0x17 0x8b 0xc3  # CHECK: sra	$17, $23, 15
+0x03 0xb7 0x88 0x07  # CHECK: srav	$17, $23, $sp
+0x03 0xb7 0x88 0x07  # CHECK: srav	$17, $23, $sp
+0x00 0x02 0x11 0xc2  # CHECK: srl	$2, $2, 7
+0x00 0x02 0x11 0xc2  # CHECK: srl	$2, $2, 7
+0x00 0x94 0xc8 0x06  # CHECK: srlv	$25, $20, $4
+0x00 0x94 0xc8 0x06  # CHECK: srlv	$25, $20, $4
+0x00 0x00 0x00 0x40  # CHECK: ssnop
+0x02 0x6c 0xb0 0x22  # CHECK: sub	$22, $19, $12
+0x22 0x36 0x0c 0x36  # CHECK: addi	$22, $17, 3126
+0x21 0xad 0xe6 0x90  # CHECK: addi	$13, $13, -6512
+0x46 0x30 0x14 0x81  # CHECK: sub.d	$f18, $f2, $f16
+0x46 0x16 0xb5 0xc1  # CHECK: sub.s	$f23, $f22, $f22
+0x02 0xd6 0xe8 0x23  # CHECK: subu	$sp, $22, $22
+0xaf 0xbf 0xd8 0x50  # CHECK: sw	$ra, -10160($sp)
+0xe7 0x06 0xde 0xef  # CHECK: swc1	$f6, -8465($24)
+0xea 0x19 0x61 0x30  # CHECK: swc2	$25, 24880($16)
+0xaa 0x6f 0x35 0x7e  # CHECK: swl	$15, 13694($19)
+0xb9 0xd1 0x98 0x22  # CHECK: swr	$17, -26590($14)
+0x4f 0x4c 0x98 0x08  # CHECK: swxc1   $f19, $12($26)
+0x00 0x03 0x00 0x34  # CHECK: teq	 $zero, $3
+0x00 0xa7 0x9b 0x34  # CHECK: teq	$5, $7, 620
+0x06 0xac 0xbb 0xa0  # CHECK: teqi	$21, 48032
+0x00 0xea 0x00 0x30  # CHECK: tge	 $7, $10
+0x00 0xb3 0x55 0x30  # CHECK: tge	$5, $19, 340
+0x06 0x28 0x13 0xa1  # CHECK: tgei	$17, 5025
+0x07 0xa9 0x90 0x33  # CHECK: tgeiu	$sp, 36915
+0x02 0xdc 0x00 0x31  # CHECK: tgeu	 $22, $gp
+0x02 0x8e 0x5e 0xf1  # CHECK: tgeu	$20, $14, 379
+0x42 0x00 0x00 0x08  # CHECK: tlbp
+0x42 0x00 0x00 0x01  # CHECK: tlbr
+0x42 0x00 0x00 0x02  # CHECK: tlbwi
+0x42 0x00 0x00 0x06  # CHECK: tlbwr
+0x01 0xed 0x00 0x32  # CHECK: tlt	 $15, $13
+0x00 0x53 0x21 0x72  # CHECK: tlt	$2, $19, 133
+0x05 0xca 0xad 0xbd  # CHECK: tlti	$14, 44477
+0x07 0xeb 0xec 0x2c  # CHECK: tltiu	$ra, 60460
+0x01 0x70 0x00 0x33  # CHECK: tltu	 $11, $16
+0x02 0x1d 0xfe 0x33  # CHECK: tltu	$16, $sp, 1016
+0x00 0xd1 0x00 0x36  # CHECK: tne	 $6, $17
+0x00 0xe8 0xdd 0x76  # CHECK: tne	$7, $8, 885
+0x05 0x8e 0x8c 0x31  # CHECK: tnei	$12, 35889
+0x46 0x20 0xbd 0xc9  # CHECK: trunc.l.d $f23, $f23
+0x46 0x00 0xff 0x09  # CHECK: trunc.l.s $f28, $f31
+0x46 0x20 0x75 0x8d  # CHECK: trunc.w.d	$f22, $f14
+0x46 0x00 0xf7 0x0d  # CHECK: trunc.w.s	$f28, $f30
+0x00 0x9e 0x90 0x26  # CHECK: xor	$18, $4, $fp
diff --git a/test/MC/Disassembler/Mips/mips4/valid-xfail-mips4.txt b/test/MC/Disassembler/Mips/mips4/valid-xfail-mips4.txt
new file mode 100644
index 000000000000..aa35e46ab4b8
--- /dev/null
+++ b/test/MC/Disassembler/Mips/mips4/valid-xfail-mips4.txt
@@ -0,0 +1,42 @@
+# RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips4 | FileCheck %s
+# XFAIL: *
+0x46 0x2f 0x79 0x32  # CHECK :      c.eq.d    $fcc1,$f15,$f15
+0x46 0x11 0xc5 0x32  # CHECK :      c.eq.s    $fcc5,$f24,$f17
+0x46 0x35 0x5c 0x30  # CHECK :      c.f.d     $fcc4,$f11,$f21
+0x46 0x07 0xf4 0x30  # CHECK :      c.f.s     $fcc4,$f30,$f7
+0x46 0x21 0x94 0x3e  # CHECK :      c.le.d    $fcc4,$f18,$f1
+0x46 0x04 0xc6 0x3e  # CHECK :      c.le.s    $fcc6,$f24,$f4
+0x46 0x23 0x4b 0x3c  # CHECK :      c.lt.d    $fcc3,$f9,$f3
+0x46 0x0e 0x8a 0x3c  # CHECK :      c.lt.s    $fcc2,$f17,$f14
+0x46 0x30 0xad 0x3d  # CHECK :      c.nge.d   $fcc5,$f21,$f16
+0x46 0x08 0x5b 0x3d  # CHECK :      c.nge.s   $fcc3,$f11,$f8
+0x46 0x17 0xfa 0x3b  # CHECK :      c.ngl.s   $fcc2,$f31,$f23
+0x46 0x17 0x92 0x39  # CHECK :      c.ngle.s  $fcc2,$f18,$f23
+0x46 0x27 0xc4 0x3f  # CHECK :      c.ngt.d   $fcc4,$f24,$f7
+0x46 0x0d 0x45 0x3f  # CHECK :      c.ngt.s   $fcc5,$f8,$f13
+0x46 0x3f 0x82 0x36  # CHECK :      c.ole.d   $fcc2,$f16,$f31
+0x46 0x14 0x3b 0x36  # CHECK :      c.ole.s   $fcc3,$f7,$f20
+0x46 0x3c 0x9c 0x34  # CHECK :      c.olt.d   $fcc4,$f19,$f28
+0x46 0x07 0xa6 0x34  # CHECK :      c.olt.s   $fcc6,$f20,$f7
+0x46 0x27 0xfc 0x3a  # CHECK :      c.seq.d   $fcc4,$f31,$f7
+0x46 0x19 0x0f 0x3a  # CHECK :      c.seq.s   $fcc7,$f1,$f25
+0x46 0x39 0x6c 0x33  # CHECK :      c.ueq.d   $fcc4,$f13,$f25
+0x46 0x1e 0x1e 0x33  # CHECK :      c.ueq.s   $fcc6,$f3,$f30
+0x46 0x32 0xcf 0x37  # CHECK :      c.ule.d   $fcc7,$f25,$f18
+0x46 0x1e 0xaf 0x37  # CHECK :      c.ule.s   $fcc7,$f21,$f30
+0x46 0x31 0x36 0x35  # CHECK :      c.ult.d   $fcc6,$f6,$f17
+0x46 0x0a 0xc7 0x35  # CHECK :      c.ult.s   $fcc7,$f24,$f10
+0x46 0x38 0xbe 0x31  # CHECK :      c.un.d    $fcc6,$f23,$f24
+0x46 0x04 0xf1 0x31  # CHECK :      c.un.s    $fcc1,$f30,$f4
+0x4e 0x74 0xd4 0xa1  # CHECK :      madd.d    $f18,$f19,$f26,$f20
+0x4f 0xf9 0x98 0x60  # CHECK :      madd.s    $f1,$f31,$f19,$f25
+0x4c 0x32 0xfa 0xa9  # CHECK :      msub.d    $f10,$f1,$f31,$f18
+0x4e 0x70 0x53 0x28  # CHECK :      msub.s    $f12,$f19,$f10,$f16
+0x4d 0x33 0x74 0xb1  # CHECK :      nmadd.d   $f18,$f9,$f14,$f19
+0x4c 0xac 0xc8 0x30  # CHECK :      nmadd.s   $f0,$f5,$f25,$f12
+0x4d 0x1e 0x87 0xb9  # CHECK :      nmsub.d   $f30,$f8,$f16,$f30
+0x4f 0x04 0x98 0x78  # CHECK :      nmsub.s   $f1,$f24,$f19,$f4
+0x46 0x20 0x34 0xd5  # CHECK :      recip.d   $f19,$f6
+0x46 0x00 0xf0 0xd5  # CHECK :      recip.s   $f3,$f30
+0x46 0x20 0xe0 0xd6  # CHECK :      rsqrt.d   $f3,$f28
+0x46 0x00 0x41 0x16  # CHECK :      rsqrt.s   $f4,$f8
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
new file mode 100644
index 000000000000..92e88f8e7a58
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
@@ -0,0 +1,26 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# CHECK: mfdcr 3, 178
+0x7c 0x72 0x2a 0x86
+# CHECK: mtdcr 178, 3
+0x7c 0x72 0x2b 0x86
+
+# CHECK: tlbre 2, 3, 0
+0x7c 0x43 0x07 0x64
+# CHECK: tlbre 2, 3, 1
+0x7c 0x43 0x0f 0x64
+
+# CHECK: tlbwe 2, 3, 0
+0x7c 0x43 0x07 0xa4
+# CHECK: tlbwe 2, 3, 1
+0x7c 0x43 0x0f 0xa4
+
+# CHECK: tlbsx 2, 3, 1
+0x7c 0x43 0x0f 0x24
+# CHECK: tlbsx. 2, 3, 1
+0x7c 0x43 0x0f 0x25
+
+# CHECK: dccci 5, 6
+0x7c 0x05 0x33 0x8c
+# CHECK: iccci 5, 6
+0x7c 0x05 0x37 0x8c
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-6xx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-6xx.txt
new file mode 100644
index 000000000000..7276847adc51
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-6xx.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# CHECK: tlbld 4
+0x7c 0x00 0x27 0xa4
+# CHECK: tlbli 4
+0x7c 0x00 0x27 0xe4
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
index 5e6033d4299a..7a30b5cb2b69 100644
--- a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
@@ -3,6 +3,9 @@
 # CHECK: icbi 2, 3                       
 0x7c 0x02 0x1f 0xac
 
+# CHECK: icbt 0, 5, 31
+0x7c 0x05 0xf8 0x2c
+
 # CHECK: dcbt 2, 3                       
 0x7c 0x02 0x1a 0x2c
 
@@ -33,6 +36,9 @@
 # CHECK: wait 2                          
 0x7c 0x40 0x00 0x7c
 
+# CHECK: mbar 1
+0x7c 0x20 0x06 0xac
+
 # CHECK: dcbf 2, 3                       
 0x7c 0x02 0x18 0xac
 
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
index c5d615568cc3..7996ed178a12 100644
--- a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt
@@ -105,3 +105,23 @@
 # CHECK: tlbie 4,0                       
 0x7c 0x00 0x22 0x64
 
+# CHECK: rfi
+0x4c 0x00 0x00 0x64
+# CHECK: rfci
+0x4c 0x00 0x00 0x66
+
+# CHECK: wrtee 12
+0x7d 0x80 0x01 0x06
+# CHECK: wrteei 0
+0x7c 0x00 0x01 0x46
+# CHECK: wrteei 1
+0x7c 0x00 0x81 0x46
+
+# CHECK: tlbre
+0x7c 0x00 0x07 0x64
+# CHECK: tlbwe
+0x7c 0x00 0x07 0xa4
+# CHECK: tlbivax 11, 12
+0x7c 0x0b 0x66 0x24
+# CHECK: tlbsx 11, 12
+0x7c 0x0b 0x67 0x24
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt
new file mode 100644
index 000000000000..ef013d7e8c9a
--- /dev/null
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt
@@ -0,0 +1,7 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
+
+# CHECK: rfdi
+0x4c 0x00 0x00 0x4e
+# CHECK: rfmci
+0x4c 0x00 0x00 0x4c
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
index 108df30aa8c8..4f10c742db97 100644
--- a/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
@@ -2251,3 +2251,47 @@
 # CHECK: mtcrf 255, 2
 0x7c 0x4f 0xf1 0x20
 
+# CHECK: dss 3
+0x7c 0x60 0x06 0x6c
+# CHECK: dssall
+0x7e 0x00 0x06 0x6c
+# CHECK: dst 12, 11, 3
+0x7c 0x6c 0x5a 0xac
+# CHECK: dstt 12, 11, 3
+0x7e 0x6c 0x5a 0xac
+# CHECK: dstst 12, 11, 3
+0x7c 0x6c 0x5a 0xec
+# CHECK: dststt 12, 11, 3
+0x7e 0x6c 0x5a 0xec
+
+# CHECK: tlbia
+0x7c 0x00 0x02 0xe4
+
+# CHECK: lswi 8, 6, 7
+0x7d 0x06 0x3c 0xaa
+# CHECK: stswi 8, 6, 7
+0x7d 0x06 0x3d 0xaa
+
+# CHECK: rfid
+0x4c 0x00 0x00 0x24
+
+# CHECK: lbzcix 21, 5, 7
+0x7e 0xa5 0x3e 0xaa
+# CHECK: lhzcix 21, 5, 7
+0x7e 0xa5 0x3e 0x6a
+# CHECK: lwzcix 21, 5, 7
+0x7e 0xa5 0x3e 0x2a
+# CHECK: ldcix  21, 5, 7
+0x7e 0xa5 0x3e 0xea
+# CHECK: stbcix 21, 5, 7
+0x7e 0xa5 0x3f 0xaa
+# CHECK: sthcix 21, 5, 7
+0x7e 0xa5 0x3f 0x6a
+# CHECK: stwcix 21, 5, 7
+0x7e 0xa5 0x3f 0x2a
+# CHECK: stdcix 21, 5, 7
+0x7e 0xa5 0x3f 0xea
+
+# CHECK: attn
+0x00 0x00 0x02 0x00
+
diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
index 33a8c0ed5ded..e99d49bbf45c 100644
--- a/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
+++ b/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
@@ -499,6 +499,9 @@
 # CHECK: popcntd 2, 3                    
 0x7c 0x62 0x03 0xf4
 
+# CHECK: cmpb 7, 21, 4
+0x7e 0xa7 0x23 0xf8
+
 # CHECK: rlwinm 2, 3, 4, 5, 6            
 0x54 0x62 0x21 0x4c
 
@@ -619,3 +622,7 @@
 # CHECK: mfocrf 16, 8                    
 0x7e 0x10 0x80 0x26
 
+# CHECK: mtsrin 10, 12
+0x7d 0x40 0x61 0xe4
+# CHECK: mfsrin 10, 12
+0x7d 0x40 0x65 0x26
diff --git a/test/MC/Disassembler/X86/avx-512.txt b/test/MC/Disassembler/X86/avx-512.txt
index f78db552935e..62fc35bd1cff 100644
--- a/test/MC/Disassembler/X86/avx-512.txt
+++ b/test/MC/Disassembler/X86/avx-512.txt
@@ -1,4 +1,5 @@
 # RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 -mcpu=knl | FileCheck %s
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 -mcpu=skx | FileCheck --check-prefix=CHECK-SKX %s
 
 # CHECK: vpbroadcastd    %xmm18, %zmm28 {%k7} {z}
 0x62 0x22 0x7d 0xcf 0x58 0xe2
@@ -13,7 +14,13 @@
 0x62 0x32 0xed 0x48 0x16 0x04 0x96
 
 # CHECK: vpbroadcastmw2d %k2, %zmm8
-0x62 0xd2 0x7e 0x48 0x3a 0xd0
+0x62 0x72 0x7e 0x48 0x3a 0xc2
+
+# CHECK-SKX: vpbroadcastmw2d %k2, %xmm8
+0x62 0x72 0x7e 0x08 0x3a 0xc2
+
+# CHECK-SKX: vpbroadcastmw2d %k2, %ymm8
+0x62 0x72 0x7e 0x28 0x3a 0xc2
 
 # CHECK: vpbroadcastq    (%r9,%rax), %zmm28
 0x62 0x42 0xfd 0x48 0x59 0x24 0x01
diff --git a/test/MC/Disassembler/X86/intel-syntax-32.txt b/test/MC/Disassembler/X86/intel-syntax-32.txt
index 2298823604aa..66c87b8bc07b 100644
--- a/test/MC/Disassembler/X86/intel-syntax-32.txt
+++ b/test/MC/Disassembler/X86/intel-syntax-32.txt
@@ -29,3 +29,15 @@
 
 # CHECK: mov dword ptr [878082192], eax
 0xa3 0x90 0x78 0x56 0x34
+
+# CHECK: lea	cx, [si + 4]
+0x67 0x66 0x8d 0x4c 0x04
+
+# CHECK: lea	ecx, [si + 4]
+0x67 0x8d 0x4c 0x04 
+
+# CHECK: lea	cx, [esp + 4]
+0x66 0x8d 0x4c 0x24 0x04 
+
+# CHECK: lea	ecx, [esp + 4]
+0x8d 0x4c 0x24 0x04 
diff --git a/test/MC/Disassembler/X86/intel-syntax.txt b/test/MC/Disassembler/X86/intel-syntax.txt
index 3689525d92fa..0a628af02c15 100644
--- a/test/MC/Disassembler/X86/intel-syntax.txt
+++ b/test/MC/Disassembler/X86/intel-syntax.txt
@@ -152,3 +152,23 @@
 
 # CHECK: movabs qword ptr [-6066930261531658096], rax
 0x48 0xa3 0x90 0x78 0x56 0x34 0x12 0xef 0xcd 0xab
+
+# CHECK: lea	cx, [esp + 4]
+0x67 0x66 0x8d 0x4c 0x24 0x04 
+
+# CHECK: lea	ecx, [esp + 4]
+0x67 0x8d 0x4c 0x24 0x04 
+
+# CHECK: lea	rcx, [esp + 4]
+0x67 0x48 0x8d 0x4c 0x24 0x04 
+
+# CHECK: lea	cx, [rsp + 4]
+0x66 0x8d 0x4c 0x24 0x04 
+
+# CHECK: lea	ecx, [rsp + 4]
+0x8d 0x4c 0x24 0x04 
+
+# CHECK: lea	rcx, [rsp + 4]
+0x48 0x8d 0x4c 0x24 0x04 
+
+
diff --git a/test/MC/Disassembler/X86/invalid-cmp-imm.txt b/test/MC/Disassembler/X86/invalid-cmp-imm.txt
deleted file mode 100644
index 7b2ea2aa06c7..000000000000
--- a/test/MC/Disassembler/X86/invalid-cmp-imm.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 2>&1 | grep "invalid instruction encoding"
-
-# This instruction would decode as cmpordps if the immediate byte was less than 8.
-0x0f 0xc2 0xc7 0x08
-# This instruction would decode as cmpordpd if the immediate byte was less than 8.
-0x66 0x0f 0xc2 0xc7 0x08
-# This instruction would decode as cmpordss if the immediate byte was less than 8.
-0xf3 0x0f 0xc2 0xc7 0x08
-# This instruction would decode as cmpordsd if the immediate byte was less than 8.
-0xf2 0x0f 0xc2 0xc7 0x08
diff --git a/test/MC/Disassembler/X86/moffs.txt b/test/MC/Disassembler/X86/moffs.txt
index dd2664cb7737..ac1885954944 100644
--- a/test/MC/Disassembler/X86/moffs.txt
+++ b/test/MC/Disassembler/X86/moffs.txt
@@ -1,86 +1,86 @@
-# RUN: llvm-mc --disassemble --print-imm-hex %s -triple=i686-linux-gnu-code16 | FileCheck --check-prefix=16 %s
-# RUN: llvm-mc --disassemble --print-imm-hex %s -triple=i686-linux-gnu | FileCheck --check-prefix=32 %s
-# RUN: llvm-mc --disassemble --print-imm-hex %s -triple=x86_64-linux-gnu | FileCheck --check-prefix=64 %s
+# RUN: llvm-mc --disassemble --show-encoding --print-imm-hex %s -triple=i686-linux-gnu-code16 | FileCheck --check-prefix=16 %s
+# RUN: llvm-mc --disassemble --show-encoding --print-imm-hex %s -triple=i686-linux-gnu | FileCheck --check-prefix=32 %s
+# RUN: llvm-mc --disassemble --show-encoding --print-imm-hex %s -triple=x86_64-linux-gnu | FileCheck --check-prefix=64 %s
 
-# 16: movb 0x5a5a, %al
-# 32: movb 0x5a5a5a5a, %al
-# 64: movabsb 0x5a5a5a5a5a5a5a5a, %al
+# 16: movb 0x5a5a, %al # encoding: [0xa0,0x5a,0x5a]
+# 32: movb 0x5a5a5a5a, %al # encoding: [0xa0,0x5a,0x5a,0x5a,0x5a]
+# 64: movabsb 0x5a5a5a5a5a5a5a5a, %al # encoding: [0xa0,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a]
 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movb 0x5a5a5a5a, %al
-# 32: movb 0x5a5a, %al
-# 64: movabsb 0x5a5a5a5a, %al
+# 16: movb 0x5a5a5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a,0x5a,0x5a]
+# 32: movb 0x5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a]
+# 64: movb 0x5a5a5a5a, %al # encoding: [0x67,0xa0,0x5a,0x5a,0x5a,0x5a]
 0x67 0xa0 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movw 0x5a5a, %ax
-# 32: movl 0x5a5a5a5a, %eax
-# 64: movabsl 0x5a5a5a5a5a5a5a5a, %eax
+# 16: movw 0x5a5a, %ax # encoding: [0xa1,0x5a,0x5a]
+# 32: movl 0x5a5a5a5a, %eax # encoding: [0xa1,0x5a,0x5a,0x5a,0x5a]
+# 64: movabsl 0x5a5a5a5a5a5a5a5a, %eax # encoding: [0xa1,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a]
 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movw 0x5a5a5a5a, %ax
-# 32: movl 0x5a5a, %eax
-# 64: movabsl 0x5a5a5a5a, %eax
+# 16: movw 0x5a5a5a5a, %ax # encoding: [0x67,0xa1,0x5a,0x5a,0x5a,0x5a]
+# 32: movl 0x5a5a, %eax # encoding: [0x67,0xa1,0x5a,0x5a]
+# 64: movl 0x5a5a5a5a, %eax # encoding: [0x67,0xa1,0x5a,0x5a,0x5a,0x5a]
 0x67 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movl 0x5a5a, %eax
-# 32: movw 0x5a5a5a5a, %ax
-# 64: movabsw 0x5a5a5a5a5a5a5a5a, %ax
+# 16: movl 0x5a5a, %eax # encoding: [0x66,0xa1,0x5a,0x5a]
+# 32: movw 0x5a5a5a5a, %ax # encoding: [0x66,0xa1,0x5a,0x5a,0x5a,0x5a]
+# 64: movabsw 0x5a5a5a5a5a5a5a5a, %ax # encoding: [0x66,0xa1,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a]
 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movl 0x5a5a5a5a, %eax
-# 32: movw 0x5a5a, %ax
-# 64: movabsw 0x5a5a5a5a, %ax
+# 16: movl 0x5a5a5a5a, %eax # encoding: [0x67,0x66,0xa1,0x5a,0x5a,0x5a,0x5a]
+# 32: movw 0x5a5a, %ax # encoding: [0x67,0x66,0xa1,0x5a,0x5a]
+# 64: movw 0x5a5a5a5a, %ax # encoding: [0x67,0x66,0xa1,0x5a,0x5a,0x5a,0x5a]
 0x66 0x67 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movl 0x5a5a5a5a, %eax
-# 32: movw 0x5a5a, %ax
-# 64: movabsw 0x5a5a5a5a, %ax
+# 16: movl 0x5a5a5a5a, %eax # encoding: [0x67,0x66,0xa1,0x5a,0x5a,0x5a,0x5a]
+# 32: movw 0x5a5a, %ax # encoding: [0x67,0x66,0xa1,0x5a,0x5a]
+# 64: movw 0x5a5a5a5a, %ax # encoding: [0x67,0x66,0xa1,0x5a,0x5a,0x5a,0x5a]
 0x67 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movl %es:0x5a5a5a5a, %eax
-# 32: movw %es:0x5a5a, %ax
-# 64: movabsw %es:0x5a5a5a5a, %ax
-0x67 0x26 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+# 16: movl %es:0x5a5a5a5a, %eax # encoding: [0x67,0x66,0x26,0xa1,0x5a,0x5a,0x5a,0x5a]
+# 32: movw %es:0x5a5a, %ax # encoding: [0x67,0x66,0x26,0xa1,0x5a,0x5a]
+# 64: movw %es:0x5a5a5a5a, %ax # encoding: [0x67,0x66,0x26,0xa1,0x5a,0x5a,0x5a,0x5a]
+0x67 0x26 0x66 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a # encoding: [0xa0,0x5a,0x5a]
 
 
 
-# 16: movb %al, 0x5a5a
-# 32: movb %al, 0x5a5a5a5a
-# 64: movabsb %al, 0x5a5a5a5a5a5a5a5a
-0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+# 16: movb %al, 0x5a5a # encoding: [0xa2,0x5a,0x5a]
+# 32: movb %al, 0x5a5a5a5a # encoding: [0xa2,0x5a,0x5a,0x5a,0x5a]
+# 64: movabsb %al, 0x5a5a5a5a5a5a5a5a # encoding: [0xa2,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a]
+0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a # encoding: [0xa0,0x5a,0x5a]
 
-# 16: movb %al, 0x5a5a5a5a
-# 32: movb %al, 0x5a5a
-# 64: movabsb %al, 0x5a5a5a5a
+# 16: movb %al, 0x5a5a5a5a # encoding: [0x67,0xa2,0x5a,0x5a,0x5a,0x5a]
+# 32: movb %al, 0x5a5a # encoding: [0x67,0xa2,0x5a,0x5a]
+# 64: movb %al, 0x5a5a5a5a # encoding: [0x67,0xa2,0x5a,0x5a,0x5a,0x5a]
 0x67 0xa2 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movw %ax, 0x5a5a
-# 32: movl %eax, 0x5a5a5a5a
-# 64: movabsl %eax, 0x5a5a5a5a5a5a5a5a
+# 16: movw %ax, 0x5a5a # encoding: [0xa3,0x5a,0x5a]
+# 32: movl %eax, 0x5a5a5a5a # encoding: [0xa3,0x5a,0x5a,0x5a,0x5a]
+# 64: movabsl %eax, 0x5a5a5a5a5a5a5a5a # encoding: [0xa3,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a]
 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movw %ax, %gs:0x5a5a5a5a
-# 32: movl %eax, %gs:0x5a5a
-# 64: movabsl %eax, %gs:0x5a5a5a5a
+# 16: movw %ax, %gs:0x5a5a5a5a # encoding: [0x67,0x65,0xa3,0x5a,0x5a,0x5a,0x5a]
+# 32: movl %eax, %gs:0x5a5a # encoding: [0x67,0x65,0xa3,0x5a,0x5a]
+# 64: movl %eax, %gs:0x5a5a5a5a # encoding: [0x67,0x65,0xa3,0x5a,0x5a,0x5a,0x5a]
 0x65 0x67 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movl %eax, 0x5a5a
-# 32: movw %ax, 0x5a5a5a5a
-# 64: movabsw %ax, 0x5a5a5a5a5a5a5a5a
+# 16: movl %eax, 0x5a5a # encoding: [0x66,0xa3,0x5a,0x5a]
+# 32: movw %ax, 0x5a5a5a5a # encoding: [0x66,0xa3,0x5a,0x5a,0x5a,0x5a]
+# 64: movabsw %ax, 0x5a5a5a5a5a5a5a5a # encoding: [0x66,0xa3,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a]
 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movl %eax, 0x5a5a5a5a
-# 32: movw %ax, 0x5a5a
-# 64: movabsw %ax, 0x5a5a5a5a
+# 16: movl %eax, 0x5a5a5a5a # encoding: [0x67,0x66,0xa3,0x5a,0x5a,0x5a,0x5a]
+# 32: movw %ax, 0x5a5a # encoding: [0x67,0x66,0xa3,0x5a,0x5a]
+# 64: movw %ax, 0x5a5a5a5a # encoding: [0x67,0x66,0xa3,0x5a,0x5a,0x5a,0x5a]
 0x66 0x67 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movl %eax, 0x5a5a5a5a
-# 32: movw %ax, 0x5a5a
-# 64: movabsw %ax, 0x5a5a5a5a
+# 16: movl %eax, 0x5a5a5a5a # encoding: [0x67,0x66,0xa3,0x5a,0x5a,0x5a,0x5a]
+# 32: movw %ax, 0x5a5a # encoding: [0x67,0x66,0xa3,0x5a,0x5a]
+# 64: movw %ax, 0x5a5a5a5a # encoding: [0x67,0x66,0xa3,0x5a,0x5a,0x5a,0x5a]
 0x67 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
-# 16: movl %eax, %es:0x5a5a5a5a
-# 32: movw %ax, %es:0x5a5a
-# 64: movabsw %ax, %es:0x5a5a5a5a
+# 16: movl %eax, %es:0x5a5a5a5a # encoding: [0x67,0x66,0x26,0xa3,0x5a,0x5a,0x5a,0x5a]
+# 32: movw %ax, %es:0x5a5a # encoding: [0x67,0x66,0x26,0xa3,0x5a,0x5a]
+# 64: movw %ax, %es:0x5a5a5a5a # encoding: [0x67,0x66,0x26,0xa3,0x5a,0x5a,0x5a,0x5a]
 0x67 0x26 0x66 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
 
diff --git a/test/MC/Disassembler/X86/prefixes.txt b/test/MC/Disassembler/X86/prefixes.txt
index b8830dc3f3b9..9e002fab4656 100644
--- a/test/MC/Disassembler/X86/prefixes.txt
+++ b/test/MC/Disassembler/X86/prefixes.txt
@@ -8,11 +8,11 @@
 0x64 0x48 0x8b 0x3c 0x25 0x00 0x03 0x00 0x00
 
 # CHECK: rep
-# CHECK-NEXT:		stosq
+# CHECK-NEXT:		stosq %rax, %es:(%rdi)
 0xf3 0x48 0xab
 
 # CHECK: rep
-# CHECK-NEXT:		stosl
+# CHECK-NEXT:		stosq %rax, %es:(%edi)
 0xf3 0x67 0x48 0xab
 
 # CHECK: movl 32(%rbp), %eax
@@ -54,6 +54,17 @@
 # CHECK-NEXT: stosq
 0xf3 0xf3 0x48 0xab
 
+
+# Test that we can disassembler control registers above CR8
+# CHECK: movq %cr15, %rax
+0x44 0x0f 0x20 0xf8
+# CHECK: movq %dr15, %rax
+0x44 0x0f 0x21 0xf8
+
+# Test that MMX ignore REX.R and REX.B.
+# CHECK: movq %mm0, %mm1
+0x46 0x0f 0x7f 0xc1
+
 # Test that a prefix on it's own works. It's debatable as to if this is 
 # something that is considered valid, but however as LLVM's own disassembler
 # has decided to disassemble prefixes as being separate opcodes, it therefore 
diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt
index e6e9c7bc9cc5..8fab6c9febcb 100644
--- a/test/MC/Disassembler/X86/simple-tests.txt
+++ b/test/MC/Disassembler/X86/simple-tests.txt
@@ -90,9 +90,24 @@
 # CHECK: movq	%cr0, %rcx
 0x0f 0x20 0xc1
 
+# CHECK: leaw	4(%esp), %cx
+0x67 0x66 0x8d 0x4c 0x24 0x04 
+
+# CHECK: leal	4(%esp), %ecx
+0x67 0x8d 0x4c 0x24 0x04 
+
+# CHECK: leaq	4(%esp), %rcx
+0x67 0x48 0x8d 0x4c 0x24 0x04 
+
+# CHECK: leaw	4(%rsp), %cx
+0x66 0x8d 0x4c 0x24 0x04 
+
 # CHECK: leal	4(%rsp), %ecx
 0x8d 0x4c 0x24 0x04 
 
+# CHECK: leaq	4(%rsp), %rcx
+0x48 0x8d 0x4c 0x24 0x04 
+
 # CHECK: enter	$1, $2
 0xc8 0x01 0x00 0x02
 
diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt
index c9c508680c5a..35c8cce9cbd7 100644
--- a/test/MC/Disassembler/X86/x86-32.txt
+++ b/test/MC/Disassembler/X86/x86-32.txt
@@ -711,3 +711,32 @@
 
 # CHECK: movq %mm0, %mm1
 0x0f 0x7f 0xc1
+
+# CHECK: vpermq $-18, %ymm2, %ymm2
+0xc4 0xe3 0xfd 0x00 0xd2 0xee
+
+# CHECK: cmpps $8, %xmm7, %xmm0
+0x0f 0xc2 0xc7 0x08
+# CHECK: cmppd $8, %xmm7, %xmm0
+0x66 0x0f 0xc2 0xc7 0x08
+# CHECK: cmpss $8, %xmm7, %xmm0
+0xf3 0x0f 0xc2 0xc7 0x08
+# CHECK: cmpsd $8, %xmm7, %xmm0
+0xf2 0x0f 0xc2 0xc7 0x08
+
+# CHECK: addb $38, 5277496
+0x82 0x05 0x38 0x87 0x50 0x00 0x26
+# CHECK: orb $38, 5277496
+0x82 0x0d 0x38 0x87 0x50 0x00 0x26
+# CHECK: adcb $38, 5277496
+0x82 0x15 0x38 0x87 0x50 0x00 0x26
+# CHECK: sbbb $38, 5277496
+0x82 0x1d 0x38 0x87 0x50 0x00 0x26
+# CHECK: andb $38, 5277496
+0x82 0x25 0x38 0x87 0x50 0x00 0x26
+# CHECK: subb $38, 5277496
+0x82 0x2D 0x38 0x87 0x50 0x00 0x26
+# CHECK: xorb $38, 5277496
+0x82 0x35 0x38 0x87 0x50 0x00 0x26
+# CHECK: cmpb $38, 5277496
+0x82 0x3d 0x38 0x87 0x50 0x00 0x26
diff --git a/test/MC/Disassembler/X86/x86-64.txt b/test/MC/Disassembler/X86/x86-64.txt
index 6f072df7e4b7..e67a4f9383e0 100644
--- a/test/MC/Disassembler/X86/x86-64.txt
+++ b/test/MC/Disassembler/X86/x86-64.txt
@@ -107,6 +107,9 @@
 # CHECK: xbegin	53
 0xc7 0xf8 0x35 0x00 0x00 0x00
 
+# CHECK: xbegin	53
+0x66 0xc7 0xf8 0x35 0x00
+
 # CHECK: xend
 0x0f 0x01 0xd5
 
@@ -265,3 +268,15 @@
 
 # CHECK: $0, 305419896(%rbp)
 0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: movabsq 6510615555426900570, %rax
+0x48 0xa1 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# CHECK: movq 1515870810, %rax
+0x67, 0x48 0xa1 0x5a 0x5a 0x5a 0x5a
+
+# CHECK: movabsq %rax, 6510615555426900570
+0x48 0xa3 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a 0x5a
+
+# CHECK: movq %rax, 1515870810
+0x67, 0x48 0xa3 0x5a 0x5a 0x5a 0x5a