diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2011-02-20 12:57:14 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2011-02-20 12:57:14 +0000 |
| commit | cf099d11218cb6f6c5cce947d6738e347f07fb12 (patch) | |
| tree | d2b61ce94e654cb01a254d2195259db5f9cc3f3c /test | |
| parent | 49011b52fcba02a6051957b84705159f52fae4e4 (diff) | |
| download | src-cf099d11218cb6f6c5cce947d6738e347f07fb12.tar.gz src-cf099d11218cb6f6c5cce947d6738e347f07fb12.zip | |
Vendor import of llvm trunk r126079:vendor/llvm/llvm-r126079
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=218885
svn path=/vendor/llvm/llvm-r126079/; revision=218886; tag=vendor/llvm/llvm-r126079
Diffstat (limited to 'test')
1424 files changed, 49702 insertions, 20208 deletions
diff --git a/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll b/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll index 6b50a168cd0a..1c2d910c1091 100644 --- a/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll +++ b/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll @@ -2,7 +2,7 @@ ; is performed. It is not legal to delete the second load instruction because ; the value computed by the first load instruction is changed by the store. -; RUN: opt < %s -gvn -instcombine -S | grep DONOTREMOVE +; RUN: opt < %s -basicaa -gvn -instcombine -S | grep DONOTREMOVE define i32 @test() { %A = alloca i32 diff --git a/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll b/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll index f7e82951da76..5d200774da5f 100644 --- a/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll +++ b/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -instcombine -S | grep sub +; RUN: opt < %s -basicaa -gvn -instcombine -S | grep sub ; BasicAA was incorrectly concluding that P1 and P2 didn't conflict! diff --git a/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll b/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll index d439dfc530ba..8ca346985593 100644 --- a/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll +++ b/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -licm -disable-output +; RUN: opt < %s -basicaa -licm -disable-output %struct..apr_array_header_t = type { i32*, i32, i32, i32, i8* } %struct..apr_table_t = type { %struct..apr_array_header_t, i32, [32 x i32], [32 x i32] } diff --git a/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll b/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll index 637d8f0db486..56e333937013 100644 --- a/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll +++ b/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll @@ -1,6 +1,6 @@ ; In this test, a local alloca cannot alias an incoming argument. -; RUN: opt < %s -gvn -instcombine -S | not grep sub +; RUN: opt < %s -basicaa -gvn -instcombine -S | not grep sub define i32 @test(i32* %P) { %X = alloca i32 diff --git a/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll b/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll index 911f78cc827e..010a45881039 100644 --- a/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll +++ b/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll @@ -1,7 +1,7 @@ ; This testcase consists of alias relations which should be completely ; resolvable by basicaa. -; RUN: opt < %s -aa-eval -print-may-aliases -disable-output \ +; RUN: opt < %s -basicaa -aa-eval -print-may-aliases -disable-output \ ; RUN: |& not grep May: %T = type { i32, [10 x i8] } diff --git a/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll b/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll index 8166b979ddab..ce01db647ffa 100644 --- a/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll +++ b/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll @@ -1,7 +1,7 @@ ; This testcase consists of alias relations which should be completely ; resolvable by basicaa, but require analysis of getelementptr constant exprs. -; RUN: opt < %s -aa-eval -print-may-aliases -disable-output \ +; RUN: opt < %s -basicaa -aa-eval -print-may-aliases -disable-output \ ; RUN: |& not grep May: %T = type { i32, [10 x i8] } diff --git a/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll b/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll index e1cfd0348f35..56e4ed05cefe 100644 --- a/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll +++ b/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -dse -S | grep {store i32 0} +; RUN: opt < %s -basicaa -dse -S | grep {store i32 0} define void @test({i32,i32 }* %P) { %Q = getelementptr {i32,i32}* %P, i32 1 diff --git a/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll b/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll index 81248db32881..50fb222a5d6f 100644 --- a/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll +++ b/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -licm +; RUN: opt < %s -basicaa -licm %"java/lang/Object" = type { %struct.llvm_java_object_base } %"java/lang/StringBuffer" = type { "java/lang/Object", i32, { "java/lang/Object", i32, [0 x i8] }*, i1 } diff --git a/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll b/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll index 0e03db330c04..cc8431496ed7 100644 --- a/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll +++ b/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -dse +; RUN: opt < %s -basicaa -dse %"java/lang/Object" = type { %struct.llvm_java_object_base } %"java/lang/StringBuffer" = type { "java/lang/Object", i32, { "java/lang/Object", i32, [0 x i8] }*, i1 } diff --git a/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll b/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll index 49327acdae0e..832059447272 100644 --- a/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll +++ b/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -aa-eval -disable-output |& grep {2 no alias respon} +; RUN: opt < %s -basicaa -aa-eval -disable-output |& grep {2 no alias respon} ; TEST that A[1][0] may alias A[0][i]. target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" diff --git a/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll b/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll index 85f53a6cda48..0db58156547a 100644 --- a/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll +++ b/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -licm -disable-output +; RUN: opt < %s -basicaa -licm -disable-output target datalayout = "E-p:32:32" target triple = "powerpc-apple-darwin8.7.0" diff --git a/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll b/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll index f699ba2911c5..563d3326367b 100644 --- a/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll +++ b/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -disable-output +; RUN: opt < %s -basicaa -gvn -disable-output ; PR1774 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll b/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll index 8028afb0d003..52d0af1b81ce 100644 --- a/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll +++ b/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -disable-output +; RUN: opt < %s -basicaa -gvn -disable-output ; PR1782 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll b/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll index ba29f3abcffe..170914447644 100644 --- a/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll +++ b/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -disable-output +; RUN: opt < %s -basicaa -gvn -disable-output ; PR2395 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll b/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll index 06018ccd5b57..c9e553d69476 100644 --- a/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll +++ b/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -aa-eval |& grep {1 no alias response} +; RUN: opt < %s -basicaa -aa-eval |& grep {1 no alias response} declare noalias i32* @_Znwj(i32 %x) nounwind diff --git a/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll b/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll index 64754712d43a..5078dd53a79f 100644 --- a/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll +++ b/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll @@ -1,4 +1,4 @@ -; RUN: opt -gvn -instcombine -S < %s | FileCheck %s +; RUN: opt -basicaa -gvn -instcombine -S < %s | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8) diff --git a/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll b/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll index 771636f42cfa..17db2fd739ad 100644 --- a/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll +++ b/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll @@ -1,11 +1,11 @@ -; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output |& grep {NoAlias:.*%P,.*@Z} +; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {NoAlias:.*%P,.*@Z} ; If GEP base doesn't alias Z, then GEP doesn't alias Z. ; rdar://7282591 @Y = common global i32 0 @Z = common global i32 0 -define void @foo(i32 %cond) nounwind ssp { +define void @foo(i32 %cond) nounwind { entry: %a = alloca i32 %tmp = icmp ne i32 %cond, 0 diff --git a/test/Analysis/BasicAA/2010-09-15-GEP-SignedArithmetic.ll b/test/Analysis/BasicAA/2010-09-15-GEP-SignedArithmetic.ll new file mode 100644 index 000000000000..2b0cd78fece3 --- /dev/null +++ b/test/Analysis/BasicAA/2010-09-15-GEP-SignedArithmetic.ll @@ -0,0 +1,15 @@ +; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {1 may alias} +; PR7959 + +target datalayout = "e-p:32:32:32" + +define i32 @test(i32* %tab, i32 %indvar) nounwind { + %tmp31 = mul i32 %indvar, -2 + %tmp32 = add i32 %tmp31, 30 + %t.5 = getelementptr i32* %tab, i32 %tmp32 + %loada = load i32* %tab + store i32 0, i32* %t.5 + %loadb = load i32* %tab + %rval = add i32 %loada, %loadb + ret i32 %rval +} diff --git a/test/Analysis/BasicAA/args-rets-allocas-loads.ll b/test/Analysis/BasicAA/args-rets-allocas-loads.ll index 7555a4c2a9b0..c3c4afcc2396 100644 --- a/test/Analysis/BasicAA/args-rets-allocas-loads.ll +++ b/test/Analysis/BasicAA/args-rets-allocas-loads.ll @@ -1,4 +1,4 @@ -; RUN: opt -aa-eval -print-all-alias-modref-info -disable-output < %s |& FileCheck %s +; RUN: opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output < %s |& FileCheck %s declare void @callee(double* %callee_arg) declare void @nocap_callee(double* nocapture %nocap_callee_arg) diff --git a/test/Analysis/BasicAA/byval.ll b/test/Analysis/BasicAA/byval.ll index cdcafdf474f3..2aba7538ed5e 100644 --- a/test/Analysis/BasicAA/byval.ll +++ b/test/Analysis/BasicAA/byval.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | grep {ret i32 1} +; RUN: opt < %s -basicaa -gvn -S | grep {ret i32 1} target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" %struct.x = type { i32, i32, i32, i32 } diff --git a/test/Analysis/BasicAA/constant-over-index.ll b/test/Analysis/BasicAA/constant-over-index.ll index 0e0c45c8ad5c..8a8ac4f72103 100644 --- a/test/Analysis/BasicAA/constant-over-index.ll +++ b/test/Analysis/BasicAA/constant-over-index.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -aa-eval -print-all-alias-modref-info |& FileCheck %s +; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info |& FileCheck %s ; PR4267 ; CHECK: MayAlias: double* %p.0.i.0, double* %p3 diff --git a/test/Analysis/BasicAA/empty.ll b/test/Analysis/BasicAA/empty.ll index 689efec26adb..7b06780e6b18 100644 --- a/test/Analysis/BasicAA/empty.ll +++ b/test/Analysis/BasicAA/empty.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output \ +; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output \ ; RUN: |& grep {NoAlias: \{\}\\* \[%\]p, \{\}\\* \[%\]q} target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" diff --git a/test/Analysis/BasicAA/full-store-partial-alias.ll b/test/Analysis/BasicAA/full-store-partial-alias.ll new file mode 100644 index 000000000000..4fa6375c1439 --- /dev/null +++ b/test/Analysis/BasicAA/full-store-partial-alias.ll @@ -0,0 +1,33 @@ +; RUN: opt -S -tbaa -basicaa -gvn < %s | grep {ret i32 %} +; RUN: opt -S -tbaa -gvn < %s | grep {ret i32 0} +; rdar://8875631, rdar://8875069 + +; BasicAA should notice that the store stores to the entire %u object, +; so the %tmp5 load is PartialAlias with the store and suppress TBAA. +; Without BasicAA, TBAA should say that %tmp5 is NoAlias with the store. + +target datalayout = "e-p:64:64:64" + +%union.anon = type { double } + +@u = global %union.anon { double -2.500000e-01 }, align 8 +@endianness_test = global i64 1, align 8 + +define i32 @signbit(double %x) nounwind { +entry: + %u = alloca %union.anon, align 8 + %tmp9 = getelementptr inbounds %union.anon* %u, i64 0, i32 0 + store double %x, double* %tmp9, align 8, !tbaa !0 + %tmp2 = load i32* bitcast (i64* @endianness_test to i32*), align 8, !tbaa !3 + %idxprom = sext i32 %tmp2 to i64 + %tmp4 = bitcast %union.anon* %u to [2 x i32]* + %arrayidx = getelementptr inbounds [2 x i32]* %tmp4, i64 0, i64 %idxprom + %tmp5 = load i32* %arrayidx, align 4, !tbaa !3 + %tmp5.lobit = lshr i32 %tmp5, 31 + ret i32 %tmp5.lobit +} + +!0 = metadata !{metadata !"double", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} +!3 = metadata !{metadata !"int", metadata !1} diff --git a/test/Analysis/BasicAA/gep-alias.ll b/test/Analysis/BasicAA/gep-alias.ll index eba9599ba07b..69f7fafaca07 100644 --- a/test/Analysis/BasicAA/gep-alias.ll +++ b/test/Analysis/BasicAA/gep-alias.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -instcombine -S |& FileCheck %s +; RUN: opt < %s -basicaa -gvn -instcombine -S |& FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll b/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll index 12b088b1f651..062ea59f128b 100644 --- a/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll +++ b/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output |& FileCheck %s +; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& FileCheck %s ; CHECK: Just Ref: call void @ro() <-> call void @f0() diff --git a/test/Analysis/BasicAA/global-size.ll b/test/Analysis/BasicAA/global-size.ll index b9cbbcc59ef6..a7e5aab6c1f2 100644 --- a/test/Analysis/BasicAA/global-size.ll +++ b/test/Analysis/BasicAA/global-size.ll @@ -1,16 +1,40 @@ ; A store or load cannot alias a global if the accessed amount is larger then ; the global. -; RUN: opt < %s -basicaa -gvn -instcombine -S | not grep load +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" -@B = global i16 8 ; <i16*> [#uses=2] +@B = global i16 8 -define i16 @test(i32* %P) { - %X = load i16* @B ; <i16> [#uses=1] +; CHECK: @test1 +define i16 @test1(i32* %P) { + %X = load i16* @B store i32 7, i32* %P - %Y = load i16* @B ; <i16> [#uses=1] - %Z = sub i16 %Y, %X ; <i16> [#uses=1] + %Y = load i16* @B + %Z = sub i16 %Y, %X ret i16 %Z +; CHECK: ret i16 0 +} + +; Cannot know anything about the size of this global. +; rdar://8813415 +@window = external global [0 x i8] + +; CHECK: @test2 +define i8 @test2(i32 %tmp79, i32 %w.2, i32 %indvar89) nounwind { + %tmp92 = add i32 %tmp79, %indvar89 + %arrayidx412 = getelementptr [0 x i8]* @window, i32 0, i32 %tmp92 + %tmp93 = add i32 %w.2, %indvar89 + %arrayidx416 = getelementptr [0 x i8]* @window, i32 0, i32 %tmp93 + + %A = load i8* %arrayidx412, align 1 + store i8 4, i8* %arrayidx416, align 1 + + %B = load i8* %arrayidx412, align 1 + %C = sub i8 %A, %B + ret i8 %C + +; CHECK: %B = load i8 +; CHECK: ret i8 %C } diff --git a/test/Analysis/BasicAA/modref.ll b/test/Analysis/BasicAA/modref.ll index b9a3c5e58f68..ec0c8a734447 100644 --- a/test/Analysis/BasicAA/modref.ll +++ b/test/Analysis/BasicAA/modref.ll @@ -85,11 +85,11 @@ define void @test3a(i8* %P, i8 %X) { %Y = add i8 %X, 1 ;; Dead, because the only use (the store) is dead. %P2 = getelementptr i8* %P, i32 2 - store i8 %Y, i8* %P2 ;; FIXME: Killed by llvm.lifetime.end, should be zapped. -; CHECK: store i8 %Y, i8* %P2 + store i8 %Y, i8* %P2 +; CHECK-NEXT: call void @llvm.lifetime.end call void @llvm.lifetime.end(i64 10, i8* %P) ret void -; CHECK: ret void +; CHECK-NEXT: ret void } @G1 = external global i32 @@ -105,7 +105,7 @@ define i32 @test4(i8* %P) { ; CHECK: load i32* @G ; CHECK: memset.p0i8.i32 ; CHECK-NOT: load -; CHECK: sub i32 %tmp, %tmp +; CHECK: ret i32 0 } ; Verify that basicaa is handling variable length memcpy, knowing it doesn't @@ -120,7 +120,7 @@ define i32 @test5(i8* %P, i32 %Len) { ; CHECK: load i32* @G ; CHECK: memcpy.p0i8.p0i8.i32 ; CHECK-NOT: load -; CHECK: sub i32 %tmp, %tmp +; CHECK: ret i32 0 } define i8 @test6(i8* %p, i8* noalias %a) { diff --git a/test/Analysis/BasicAA/phi-aa.ll b/test/Analysis/BasicAA/phi-aa.ll index 02889600fb8f..50fd5cd22ba6 100644 --- a/test/Analysis/BasicAA/phi-aa.ll +++ b/test/Analysis/BasicAA/phi-aa.ll @@ -5,7 +5,7 @@ @Y = common global i32 0 @Z = common global i32 0 -define void @foo(i32 %cond) nounwind ssp { +define void @foo(i32 %cond) nounwind { entry: %"alloca point" = bitcast i32 0 to i32 %tmp = icmp ne i32 %cond, 0 diff --git a/test/Analysis/BasicAA/phi-and-select.ll b/test/Analysis/BasicAA/phi-and-select.ll index c69e824035a8..9bc47ae44a97 100644 --- a/test/Analysis/BasicAA/phi-and-select.ll +++ b/test/Analysis/BasicAA/phi-and-select.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output \ +; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output \ ; RUN: |& grep {NoAlias: double\\* \[%\]a, double\\* \[%\]b\$} | count 4 ; BasicAA should detect NoAliases in PHIs and Selects. diff --git a/test/Analysis/BasicAA/unreachable-block.ll b/test/Analysis/BasicAA/unreachable-block.ll index 3382188f4bbe..1ca1e66f8947 100644 --- a/test/Analysis/BasicAA/unreachable-block.ll +++ b/test/Analysis/BasicAA/unreachable-block.ll @@ -1,4 +1,4 @@ -; RUN: opt -aa-eval -disable-output < %s >& /dev/null +; RUN: opt -basicaa -aa-eval -disable-output < %s >& /dev/null ; BasicAA shouldn't infinitely recurse on the use-def cycles in ; unreachable code. diff --git a/test/Analysis/GlobalsModRef/aliastest.ll b/test/Analysis/GlobalsModRef/aliastest.ll index 3e5d11907aa6..75af4dc5b934 100644 --- a/test/Analysis/GlobalsModRef/aliastest.ll +++ b/test/Analysis/GlobalsModRef/aliastest.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load +; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -S | not grep load @X = internal global i32 4 ; <i32*> [#uses=1] define i32 @test(i32* %P) { diff --git a/test/Analysis/GlobalsModRef/chaining-analysis.ll b/test/Analysis/GlobalsModRef/chaining-analysis.ll index b1d4593ac992..431b2a68cf4c 100644 --- a/test/Analysis/GlobalsModRef/chaining-analysis.ll +++ b/test/Analysis/GlobalsModRef/chaining-analysis.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load +; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -S | not grep load ; This test requires the use of previous analyses to determine that ; doesnotmodX does not modify X (because 'sin' doesn't). diff --git a/test/Analysis/GlobalsModRef/indirect-global.ll b/test/Analysis/GlobalsModRef/indirect-global.ll index 4074909ce785..1eab0bc20811 100644 --- a/test/Analysis/GlobalsModRef/indirect-global.ll +++ b/test/Analysis/GlobalsModRef/indirect-global.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -globalsmodref-aa -gvn -instcombine -S | \ +; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -instcombine -S | \ ; RUN: grep {ret i32 0} @G = internal global i32* null ; <i32**> [#uses=3] diff --git a/test/Analysis/GlobalsModRef/modreftest.ll b/test/Analysis/GlobalsModRef/modreftest.ll index 257c0ee7deb2..3a02a94a99b5 100644 --- a/test/Analysis/GlobalsModRef/modreftest.ll +++ b/test/Analysis/GlobalsModRef/modreftest.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load +; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -S | not grep load @X = internal global i32 4 ; <i32*> [#uses=2] define i32 @test(i32* %P) { diff --git a/test/Analysis/LoopDependenceAnalysis/alias.ll b/test/Analysis/LoopDependenceAnalysis/alias.ll index 97be3fd03590..78d0bf4fee1a 100644 --- a/test/Analysis/LoopDependenceAnalysis/alias.ll +++ b/test/Analysis/LoopDependenceAnalysis/alias.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -analyze -lda | FileCheck %s +; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s ;; x[5] = x[6] // with x being a pointer passed as argument diff --git a/test/Analysis/LoopDependenceAnalysis/siv-strong.ll b/test/Analysis/LoopDependenceAnalysis/siv-strong.ll index 36ac15336d6a..401e466d6669 100644 --- a/test/Analysis/LoopDependenceAnalysis/siv-strong.ll +++ b/test/Analysis/LoopDependenceAnalysis/siv-strong.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -analyze -lda | FileCheck %s +; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s @x = common global [256 x i32] zeroinitializer, align 4 @y = common global [256 x i32] zeroinitializer, align 4 diff --git a/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll b/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll index a7f9bdaa59e2..9d0128c5fec4 100644 --- a/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll +++ b/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -analyze -lda | FileCheck %s +; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s @x = common global [256 x i32] zeroinitializer, align 4 @y = common global [256 x i32] zeroinitializer, align 4 diff --git a/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll b/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll index e75aefd64d3d..1c5ae4c490e3 100644 --- a/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll +++ b/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -analyze -lda | FileCheck %s +; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s @x = common global [256 x i32] zeroinitializer, align 4 @y = common global [256 x i32] zeroinitializer, align 4 diff --git a/test/Analysis/LoopDependenceAnalysis/ziv.ll b/test/Analysis/LoopDependenceAnalysis/ziv.ll index ba4594877434..645ae7f152e2 100644 --- a/test/Analysis/LoopDependenceAnalysis/ziv.ll +++ b/test/Analysis/LoopDependenceAnalysis/ziv.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -analyze -lda | FileCheck %s +; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s @x = common global [256 x i32] zeroinitializer, align 4 diff --git a/test/Analysis/PointerTracking/sizes.ll b/test/Analysis/PointerTracking/sizes.ll deleted file mode 100644 index c8ca648e877b..000000000000 --- a/test/Analysis/PointerTracking/sizes.ll +++ /dev/null @@ -1,86 +0,0 @@ -; RUN: opt < %s -pointertracking -analyze | FileCheck %s -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-unknown-linux-gnu" -@.str = internal constant [5 x i8] c"1234\00" ; <[5 x i8]*> [#uses=1] -@test1p = global i8* getelementptr ([5 x i8]* @.str, i32 0, i32 0), align 8 ; <i8**> [#uses=1] -@test1a = global [5 x i8] c"1234\00", align 1 ; <[5 x i8]*> [#uses=1] -@test2a = global [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5], align 4 ; <[5 x i32]*> [#uses=2] -@test2p = global i32* getelementptr ([5 x i32]* @test2a, i32 0, i32 0), align 8 ; <i32**> [#uses=1] -@test0p = common global i32* null, align 8 ; <i32**> [#uses=1] -@test0i = common global i32 0, align 4 ; <i32*> [#uses=1] - -define i32 @foo0() nounwind { -entry: - %tmp = load i32** @test0p ; <i32*> [#uses=1] - %conv = bitcast i32* %tmp to i8* ; <i8*> [#uses=1] - %call = tail call i32 @bar(i8* %conv) nounwind ; <i32> [#uses=1] - %tmp1 = load i8** @test1p ; <i8*> [#uses=1] - %call2 = tail call i32 @bar(i8* %tmp1) nounwind ; <i32> [#uses=1] - %call3 = tail call i32 @bar(i8* getelementptr ([5 x i8]* @test1a, i32 0, i32 0)) nounwind ; <i32> [#uses=1] - %call5 = tail call i32 @bar(i8* bitcast ([5 x i32]* @test2a to i8*)) nounwind ; <i32> [#uses=1] - %tmp7 = load i32** @test2p ; <i32*> [#uses=1] - %conv8 = bitcast i32* %tmp7 to i8* ; <i8*> [#uses=1] - %call9 = tail call i32 @bar(i8* %conv8) nounwind ; <i32> [#uses=1] - %call11 = tail call i32 @bar(i8* bitcast (i32* @test0i to i8*)) nounwind ; <i32> [#uses=1] - %add = add i32 %call2, %call ; <i32> [#uses=1] - %add4 = add i32 %add, %call3 ; <i32> [#uses=1] - %add6 = add i32 %add4, %call5 ; <i32> [#uses=1] - %add10 = add i32 %add6, %call9 ; <i32> [#uses=1] - %add12 = add i32 %add10, %call11 ; <i32> [#uses=1] - ret i32 %add12 -} - -declare i32 @bar(i8*) - -define i32 @foo1(i32 %n) nounwind { -entry: -; CHECK: 'foo1': - %test4a = alloca [10 x i8], align 1 ; <[10 x i8]*> [#uses=1] -; CHECK: %test4a = -; CHECK: ==> 1 elements, 10 bytes allocated - %test6a = alloca [10 x i32], align 4 ; <[10 x i32]*> [#uses=1] -; CHECK: %test6a = -; CHECK: ==> 1 elements, 40 bytes allocated - %vla = alloca i8, i32 %n, align 1 ; <i8*> [#uses=1] -; CHECK: %vla = -; CHECK: ==> %n elements, %n bytes allocated - %0 = shl i32 %n, 2 ; <i32> [#uses=1] - %vla7 = alloca i8, i32 %0, align 1 ; <i8*> [#uses=1] -; CHECK: %vla7 = -; CHECK: ==> (4 * %n) elements, (4 * %n) bytes allocated - %call = call i32 @bar(i8* %vla) nounwind ; <i32> [#uses=1] - %arraydecay = getelementptr [10 x i8]* %test4a, i64 0, i64 0 ; <i8*> [#uses=1] - %call10 = call i32 @bar(i8* %arraydecay) nounwind ; <i32> [#uses=1] - %call11 = call i32 @bar(i8* %vla7) nounwind ; <i32> [#uses=1] - %ptrconv14 = bitcast [10 x i32]* %test6a to i8* ; <i8*> [#uses=1] - %call15 = call i32 @bar(i8* %ptrconv14) nounwind ; <i32> [#uses=1] - %add = add i32 %call10, %call ; <i32> [#uses=1] - %add12 = add i32 %add, %call11 ; <i32> [#uses=1] - %add16 = add i32 %add12, %call15 ; <i32> [#uses=1] - ret i32 %add16 -} - -define i32 @foo2(i64 %n) nounwind { -entry: - %call = tail call i8* @malloc(i64 %n) ; <i8*> [#uses=1] -; CHECK: %call = -; CHECK: ==> %n elements, %n bytes allocated - %call2 = tail call i8* @calloc(i64 2, i64 4) nounwind ; <i8*> [#uses=1] -; CHECK: %call2 = -; CHECK: ==> 8 elements, 8 bytes allocated - %call4 = tail call i8* @realloc(i8* null, i64 16) nounwind ; <i8*> [#uses=1] -; CHECK: %call4 = -; CHECK: ==> 16 elements, 16 bytes allocated - %call6 = tail call i32 @bar(i8* %call) nounwind ; <i32> [#uses=1] - %call8 = tail call i32 @bar(i8* %call2) nounwind ; <i32> [#uses=1] - %call10 = tail call i32 @bar(i8* %call4) nounwind ; <i32> [#uses=1] - %add = add i32 %call8, %call6 ; <i32> [#uses=1] - %add11 = add i32 %add, %call10 ; <i32> [#uses=1] - ret i32 %add11 -} - -declare noalias i8* @malloc(i64) nounwind - -declare noalias i8* @calloc(i64, i64) nounwind - -declare noalias i8* @realloc(i8* nocapture, i64) nounwind diff --git a/test/Analysis/Profiling/profiling-tool-chain.ll b/test/Analysis/Profiling/profiling-tool-chain.ll index 5ac31b59bdcb..9135a85dc3ad 100644 --- a/test/Analysis/Profiling/profiling-tool-chain.ll +++ b/test/Analysis/Profiling/profiling-tool-chain.ll @@ -9,8 +9,8 @@ ; Test the creation, reading and displaying of profile ; RUX: rm -f llvmprof.out -; RUX: lli -load %llvmlibsdir/profile_rt%shlibext %t2 -; RUX: lli -load %llvmlibsdir/profile_rt%shlibext %t2 1 2 +; RUX: lli -load %llvmshlibdir/profile_rt%shlibext %t2 +; RUX: lli -load %llvmshlibdir/profile_rt%shlibext %t2 1 2 ; RUX: llvm-prof -print-all-code %t1 | FileCheck --check-prefix=PROF %s ; Test the loaded profile also with verifier. diff --git a/test/Analysis/ScalarEvolution/2010-09-03-RequiredTransitive.ll b/test/Analysis/ScalarEvolution/2010-09-03-RequiredTransitive.ll new file mode 100644 index 000000000000..aba0ce74678f --- /dev/null +++ b/test/Analysis/ScalarEvolution/2010-09-03-RequiredTransitive.ll @@ -0,0 +1,24 @@ +; RUN: opt -indvars -scalar-evolution -analyze %s +; This test checks if the SCEV analysis is printed out at all. +; It failed once as the RequiredTransitive option was not implemented +; correctly. + +define i32 @main() nounwind { +entry: + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %indvar1 = phi i64 [ %indvar.next2, %for.inc ], [ 0, %entry ] ; <i64> [#uses=3] + %exitcond = icmp ne i64 %indvar1, 1024 ; <i1> [#uses=1] + br i1 %exitcond, label %for.body, label %for.end + +for.body: ; preds = %for.cond + br label %for.inc + +for.inc: ; preds = %for.body + %indvar.next2 = add i64 %indvar1, 1 ; <i64> [#uses=1] + br label %for.cond + +for.end: ; preds = %for.cond + ret i32 0 +} diff --git a/test/Analysis/ScalarEvolution/fold.ll b/test/Analysis/ScalarEvolution/fold.ll new file mode 100644 index 000000000000..4e2adf187e8b --- /dev/null +++ b/test/Analysis/ScalarEvolution/fold.ll @@ -0,0 +1,62 @@ +; RUN: opt -analyze -scalar-evolution %s -S | FileCheck %s + +define i16 @test1(i8 %x) { + %A = zext i8 %x to i12 + %B = sext i12 %A to i16 +; CHECK: zext i8 %x to i16 + ret i16 %B +} + +define i8 @test2(i8 %x) { + %A = zext i8 %x to i16 + %B = add i16 %A, 1025 + %C = trunc i16 %B to i8 +; CHECK: (1 + %x) + ret i8 %C +} + +define i8 @test3(i8 %x) { + %A = zext i8 %x to i16 + %B = mul i16 %A, 1027 + %C = trunc i16 %B to i8 +; CHECK: (3 * %x) + ret i8 %C +} + +define void @test4(i32 %x, i32 %y) { +entry: + %Y = and i32 %y, 3 + br label %loop +loop: + %A = phi i32 [0, %entry], [%I, %loop] + %rand1 = icmp sgt i32 %A, %Y + %Z1 = select i1 %rand1, i32 %A, i32 %Y + %rand2 = icmp ugt i32 %A, %Z1 + %Z2 = select i1 %rand2, i32 %A, i32 %Z1 +; CHECK: %Z2 = +; CHECK-NEXT: --> ([[EXPR:.*]]){{ +}}Exits: 20 + %B = trunc i32 %Z2 to i16 + %C = sext i16 %B to i30 +; CHECK: %C = +; CHECK-NEXT: (trunc i32 ([[EXPR]]) to i30) + %D = sext i16 %B to i32 +; CHECK: %D = +; CHECK-NEXT: ([[EXPR]]) + %E = sext i16 %B to i34 +; CHECK: %E = +; CHECK-NEXT: (zext i32 ([[EXPR]]) to i34) + %F = zext i16 %B to i30 +; CHECK: %F = +; CHECK-NEXT: (trunc i32 ([[EXPR]]) to i30 + %G = zext i16 %B to i32 +; CHECK: %G = +; CHECK-NEXT: ([[EXPR]]) + %H = zext i16 %B to i34 +; CHECK: %H = +; CHECK-NEXT: (zext i32 ([[EXPR]]) to i34) + %I = add i32 %A, 1 + %0 = icmp ne i32 %A, 20 + br i1 %0, label %loop, label %exit +exit: + ret void +} diff --git a/test/Analysis/ScalarEvolution/nsw.ll b/test/Analysis/ScalarEvolution/nsw.ll index 456f3f059fe3..9d8e2b62a9d2 100644 --- a/test/Analysis/ScalarEvolution/nsw.ll +++ b/test/Analysis/ScalarEvolution/nsw.ll @@ -1,10 +1,11 @@ -; RUN: opt < %s -analyze -scalar-evolution | grep { --> {.*,+,.*}<%bb>} | count 8 +; RUN: opt < %s -analyze -scalar-evolution | FileCheck %s ; The addrecs in this loop are analyzable only by using nsw information. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64" -define void @foo(double* %p) nounwind { +; CHECK: Classifying expressions for: @test1 +define void @test1(double* %p) nounwind { entry: %tmp = load double* %p, align 8 ; <double> [#uses=1] %tmp1 = fcmp ogt double %tmp, 2.000000e+00 ; <i1> [#uses=1] @@ -15,19 +16,29 @@ bb.nph: ; preds = %entry bb: ; preds = %bb1, %bb.nph %i.01 = phi i32 [ %tmp8, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=3] +; CHECK: %i.01 +; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%bb> %tmp2 = sext i32 %i.01 to i64 ; <i64> [#uses=1] %tmp3 = getelementptr double* %p, i64 %tmp2 ; <double*> [#uses=1] %tmp4 = load double* %tmp3, align 8 ; <double> [#uses=1] %tmp5 = fmul double %tmp4, 9.200000e+00 ; <double> [#uses=1] %tmp6 = sext i32 %i.01 to i64 ; <i64> [#uses=1] %tmp7 = getelementptr double* %p, i64 %tmp6 ; <double*> [#uses=1] +; CHECK: %tmp7 +; CHECK-NEXT: --> {%p,+,8}<%bb> store double %tmp5, double* %tmp7, align 8 %tmp8 = add nsw i32 %i.01, 1 ; <i32> [#uses=2] +; CHECK: %tmp8 +; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%bb> br label %bb1 bb1: ; preds = %bb %phitmp = sext i32 %tmp8 to i64 ; <i64> [#uses=1] +; CHECK: %phitmp +; CHECK-NEXT: --> {1,+,1}<%bb> %tmp9 = getelementptr double* %p, i64 %phitmp ; <double*> [#uses=1] +; CHECK: %tmp9 +; CHECK-NEXT: --> {(8 + %p),+,8}<%bb> %tmp10 = load double* %tmp9, align 8 ; <double> [#uses=1] %tmp11 = fcmp ogt double %tmp10, 2.000000e+00 ; <i1> [#uses=1] br i1 %tmp11, label %bb, label %bb1.return_crit_edge @@ -38,3 +49,58 @@ bb1.return_crit_edge: ; preds = %bb1 return: ; preds = %bb1.return_crit_edge, %entry ret void } + +; CHECK: Classifying expressions for: @test2 +define void @test2(i32* %begin, i32* %end) ssp { +entry: + %cmp1.i.i = icmp eq i32* %begin, %end + br i1 %cmp1.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.lr.ph.i.i + +for.body.lr.ph.i.i: ; preds = %entry + br label %for.body.i.i + +for.body.i.i: ; preds = %for.body.i.i, %for.body.lr.ph.i.i + %__first.addr.02.i.i = phi i32* [ %begin, %for.body.lr.ph.i.i ], [ %ptrincdec.i.i, %for.body.i.i ] +; CHECK: %__first.addr.02.i.i +; CHECK-NEXT: --> {%begin,+,4}<nsw><%for.body.i.i> + store i32 0, i32* %__first.addr.02.i.i, align 4 + %ptrincdec.i.i = getelementptr inbounds i32* %__first.addr.02.i.i, i64 1 +; CHECK: %ptrincdec.i.i +; CHECK-NEXT: --> {(4 + %begin),+,4}<nsw><%for.body.i.i> + %cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end + br i1 %cmp.i.i, label %for.cond.for.end_crit_edge.i.i, label %for.body.i.i + +for.cond.for.end_crit_edge.i.i: ; preds = %for.body.i.i + br label %_ZSt4fillIPiiEvT_S1_RKT0_.exit + +_ZSt4fillIPiiEvT_S1_RKT0_.exit: ; preds = %entry, %for.cond.for.end_crit_edge.i.i + ret void +} + +; Various checks for inbounds geps. +define void @test3(i32* %begin, i32* %end) nounwind ssp { +entry: + %cmp7.i.i = icmp eq i32* %begin, %end + br i1 %cmp7.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.i.i + +for.body.i.i: ; preds = %entry, %for.body.i.i + %indvar.i.i = phi i64 [ %tmp, %for.body.i.i ], [ 0, %entry ] +; CHECK: %indvar.i.i +; CHECK: {0,+,1}<nuw><nsw><%for.body.i.i> + %tmp = add nsw i64 %indvar.i.i, 1 +; CHECK: %tmp = +; CHECK: {1,+,1}<nuw><nsw><%for.body.i.i> + %ptrincdec.i.i = getelementptr inbounds i32* %begin, i64 %tmp +; CHECK: %ptrincdec.i.i = +; CHECK: {(4 + %begin),+,4}<nsw><%for.body.i.i> + %__first.addr.08.i.i = getelementptr inbounds i32* %begin, i64 %indvar.i.i +; CHECK: %__first.addr.08.i.i +; CHECK: {%begin,+,4}<nsw><%for.body.i.i> + store i32 0, i32* %__first.addr.08.i.i, align 4 + %cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end + br i1 %cmp.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.i.i +; CHECK: Loop %for.body.i.i: Unpredictable backedge-taken count. +; CHECK: Loop %for.body.i.i: Unpredictable max backedge-taken count. +_ZSt4fillIPiiEvT_S1_RKT0_.exit: ; preds = %for.body.i.i, %entry + ret void +}
\ No newline at end of file diff --git a/test/Analysis/ScalarEvolution/scev-aa.ll b/test/Analysis/ScalarEvolution/scev-aa.ll index 866664a3d66b..dd5a66ccb44c 100644 --- a/test/Analysis/ScalarEvolution/scev-aa.ll +++ b/test/Analysis/ScalarEvolution/scev-aa.ll @@ -190,9 +190,8 @@ define void @bar() { ret void } -; TODO: This is theoretically provable to be NoAlias. ; CHECK: Function: nonnegative: 2 pointers, 0 call sites -; CHECK: MayAlias: i64* %arrayidx, i64* %p +; CHECK: NoAlias: i64* %arrayidx, i64* %p define void @nonnegative(i64* %p) nounwind { entry: @@ -211,6 +210,6 @@ for.end: ; preds = %for.body, %entry ret void } -; CHECK: 13 no alias responses -; CHECK: 27 may alias responses +; CHECK: 14 no alias responses +; CHECK: 26 may alias responses ; CHECK: 18 must alias responses diff --git a/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll b/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll new file mode 100644 index 000000000000..d59e3924acd3 --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll @@ -0,0 +1,62 @@ +; RUN: opt < %s -tbaa -basicaa -gvn -S | FileCheck %s + +; Test that basic alias queries work. + +; CHECK: @test0_yes +; CHECK: add i8 %x, %x +define i8 @test0_yes(i8* %a, i8* %b) nounwind { + %x = load i8* %a, !tbaa !1 + store i8 0, i8* %b, !tbaa !2 + %y = load i8* %a, !tbaa !1 + %z = add i8 %x, %y + ret i8 %z +} + +; CHECK: @test0_no +; CHECK: add i8 %x, %y +define i8 @test0_no(i8* %a, i8* %b) nounwind { + %x = load i8* %a, !tbaa !3 + store i8 0, i8* %b, !tbaa !4 + %y = load i8* %a, !tbaa !3 + %z = add i8 %x, %y + ret i8 %z +} + +; Test that basic invariant-memory queries work. + +; CHECK: @test1_yes +; CHECK: add i8 %x, %x +define i8 @test1_yes(i8* %a, i8* %b) nounwind { + %x = load i8* %a, !tbaa !5 + store i8 0, i8* %b + %y = load i8* %a, !tbaa !5 + %z = add i8 %x, %y + ret i8 %z +} + +; CHECK: @test1_no +; CHECK: add i8 %x, %y +define i8 @test1_no(i8* %a, i8* %b) nounwind { + %x = load i8* %a, !tbaa !6 + store i8 0, i8* %b + %y = load i8* %a, !tbaa !6 + %z = add i8 %x, %y + ret i8 %z +} + +; Root note. +!0 = metadata !{ } +; Some type. +!1 = metadata !{ metadata !"foo", metadata !0 } +; Some other non-aliasing type. +!2 = metadata !{ metadata !"bar", metadata !0 } + +; Some type. +!3 = metadata !{ metadata !"foo", metadata !0 } +; Some type in a different type system. +!4 = metadata !{ metadata !"bar", metadata !"different" } + +; Invariant memory. +!5 = metadata !{ metadata !"qux", metadata !0, i1 1 } +; Not invariant memory. +!6 = metadata !{ metadata !"qux", metadata !0, i1 0 } diff --git a/test/Analysis/TypeBasedAliasAnalysis/argument-promotion.ll b/test/Analysis/TypeBasedAliasAnalysis/argument-promotion.ll new file mode 100644 index 000000000000..3b5211e5999d --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/argument-promotion.ll @@ -0,0 +1,31 @@ +; RUN: opt < %s -tbaa -basicaa -argpromotion -mem2reg -S | not grep alloca + +target datalayout = "E-p:64:64:64" + +define internal i32 @test(i32* %X, i32* %Y, i32* %Q) { + store i32 77, i32* %Q, !tbaa !2 + %A = load i32* %X, !tbaa !1 + %B = load i32* %Y, !tbaa !1 + %C = add i32 %A, %B + ret i32 %C +} + +define internal i32 @caller(i32* %B, i32* %Q) { + %A = alloca i32 + store i32 78, i32* %Q, !tbaa !2 + store i32 1, i32* %A, !tbaa !1 + %C = call i32 @test(i32* %A, i32* %B, i32* %Q) + ret i32 %C +} + +define i32 @callercaller(i32* %Q) { + %B = alloca i32 + store i32 2, i32* %B, !tbaa !1 + store i32 79, i32* %Q, !tbaa !2 + %X = call i32 @caller(i32* %B, i32* %Q) + ret i32 %X +} + +!0 = metadata !{metadata !"test"} +!1 = metadata !{metadata !"green", metadata !0} +!2 = metadata !{metadata !"blue", metadata !0} diff --git a/test/Analysis/PointerTracking/dg.exp b/test/Analysis/TypeBasedAliasAnalysis/dg.exp index f2005891a59a..f2005891a59a 100644 --- a/test/Analysis/PointerTracking/dg.exp +++ b/test/Analysis/TypeBasedAliasAnalysis/dg.exp diff --git a/test/Analysis/TypeBasedAliasAnalysis/dse.ll b/test/Analysis/TypeBasedAliasAnalysis/dse.ll new file mode 100644 index 000000000000..6b44eb638423 --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/dse.ll @@ -0,0 +1,66 @@ +; RUN: opt < %s -tbaa -basicaa -dse -S | FileCheck %s + +; DSE should make use of TBAA. + +; CHECK: @test0_yes +; CHECK-NEXT: load i8* %b +; CHECK-NEXT: store i8 1, i8* %a +; CHECK-NEXT: ret i8 %y +define i8 @test0_yes(i8* %a, i8* %b) nounwind { + store i8 0, i8* %a, !tbaa !1 + %y = load i8* %b, !tbaa !2 + store i8 1, i8* %a, !tbaa !1 + ret i8 %y +} + +; CHECK: @test0_no +; CHECK-NEXT: store i8 0, i8* %a +; CHECK-NEXT: load i8* %b +; CHECK-NEXT: store i8 1, i8* %a +; CHECK-NEXT: ret i8 %y +define i8 @test0_no(i8* %a, i8* %b) nounwind { + store i8 0, i8* %a, !tbaa !3 + %y = load i8* %b, !tbaa !4 + store i8 1, i8* %a, !tbaa !3 + ret i8 %y +} + +; CHECK: @test1_yes +; CHECK-NEXT: load i8* %b +; CHECK-NEXT: store i8 1, i8* %a +; CHECK-NEXT: ret i8 %y +define i8 @test1_yes(i8* %a, i8* %b) nounwind { + store i8 0, i8* %a + %y = load i8* %b, !tbaa !5 + store i8 1, i8* %a + ret i8 %y +} + +; CHECK: @test1_no +; CHECK-NEXT: store i8 0, i8* %a +; CHECK-NEXT: load i8* %b +; CHECK-NEXT: store i8 1, i8* %a +; CHECK-NEXT: ret i8 %y +define i8 @test1_no(i8* %a, i8* %b) nounwind { + store i8 0, i8* %a + %y = load i8* %b, !tbaa !6 + store i8 1, i8* %a + ret i8 %y +} + +; Root note. +!0 = metadata !{ } +; Some type. +!1 = metadata !{ metadata !"foo", metadata !0 } +; Some other non-aliasing type. +!2 = metadata !{ metadata !"bar", metadata !0 } + +; Some type. +!3 = metadata !{ metadata !"foo", metadata !0 } +; Some type in a different type system. +!4 = metadata !{ metadata !"bar", metadata !"different" } + +; Invariant memory. +!5 = metadata !{ metadata !"qux", metadata !0, i1 1 } +; Not invariant memory. +!6 = metadata !{ metadata !"qux", metadata !0, i1 0 } diff --git a/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll b/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll new file mode 100644 index 000000000000..8fb5ffffbaea --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll @@ -0,0 +1,81 @@ +; RUN: opt < %s -tbaa -basicaa -functionattrs -S | FileCheck %s + +; FunctionAttrs should make use of TBAA. + +; Add the readnone attribute, since the only access is a store which TBAA +; says is to constant memory. +; +; It's unusual to see a store to constant memory, but it isn't necessarily +; invalid, as it's possible that this only happens after optimization on a +; code path which isn't ever executed. + +; CHECK: define void @test0_yes(i32* nocapture %p) nounwind readnone { +define void @test0_yes(i32* %p) nounwind { + store i32 0, i32* %p, !tbaa !1 + ret void +} + +; CHECK: define void @test0_no(i32* nocapture %p) nounwind { +define void @test0_no(i32* %p) nounwind { + store i32 0, i32* %p, !tbaa !2 + ret void +} + +; Add the readonly attribute, since there's just a call to a function which +; TBAA says doesn't modify any memory. + +; CHECK: define void @test1_yes(i32* %p) nounwind readonly { +define void @test1_yes(i32* %p) nounwind { + call void @callee(i32* %p), !tbaa !1 + ret void +} + +; CHECK: define void @test1_no(i32* %p) nounwind { +define void @test1_no(i32* %p) nounwind { + call void @callee(i32* %p), !tbaa !2 + ret void +} + +; Add the readonly attribute, as above, but this time BasicAA will say +; that the function accesses memory through its arguments, which TBAA +; still says that the function doesn't write to memory. +; +; This is unusual, since the function is memcpy, but as above, this +; isn't necessarily invalid. + +; CHECK: define void @test2_yes(i8* nocapture %p, i8* nocapture %q, i64 %n) nounwind readnone { +define void @test2_yes(i8* %p, i8* %q, i64 %n) nounwind { + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 %n, i32 1, i1 false), !tbaa !1 + ret void +} + +; CHECK: define void @test2_no(i8* nocapture %p, i8* nocapture %q, i64 %n) nounwind { +define void @test2_no(i8* %p, i8* %q, i64 %n) nounwind { + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 %n, i32 1, i1 false), !tbaa !2 + ret void +} + +; Similar to the others, va_arg only accesses memory through its operand. + +; CHECK: define i32 @test3_yes(i8* nocapture %p) nounwind readnone { +define i32 @test3_yes(i8* %p) nounwind { + %t = va_arg i8* %p, i32, !tbaa !1 + ret i32 %t +} + +; CHECK: define i32 @test3_no(i8* nocapture %p) nounwind { +define i32 @test3_no(i8* %p) nounwind { + %t = va_arg i8* %p, i32, !tbaa !2 + ret i32 %t +} + +declare void @callee(i32* %p) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1) nounwind + +; Root note. +!0 = metadata !{ } + +; Invariant memory. +!1 = metadata !{ metadata !"foo", metadata !0, i1 1 } +; Not invariant memory. +!2 = metadata !{ metadata !"foo", metadata !0, i1 0 } diff --git a/test/Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll b/test/Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll new file mode 100644 index 000000000000..eceaa2cf02d3 --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/gvn-nonlocal-type-mismatch.ll @@ -0,0 +1,91 @@ +; RUN: opt -tbaa -basicaa -gvn -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; GVN should ignore the store to p1 to see that the load from p is +; fully redundant. + +; CHECK: @yes +; CHECK: if.then: +; CHECK-NEXT: store i32 0, i32* %q +; CHECK-NEXT: ret void + +define void @yes(i1 %c, i32* %p, i32* %p1, i32* %q) nounwind { +entry: + store i32 0, i32* %p, !tbaa !1 + store i32 1, i32* %p1, !tbaa !2 + br i1 %c, label %if.else, label %if.then + +if.then: + %t = load i32* %p, !tbaa !1 + store i32 %t, i32* %q + ret void + +if.else: + ret void +} + +; GVN should ignore the store to p1 to see that the first load from p is +; fully redundant. However, the second load uses a different type. Theoretically +; the other type could be unified with the first type, however for now, GVN +; should just be conservative. + +; CHECK: @watch_out_for_type_change +; CHECK: if.then: +; CHECK: %t = load i32* %p +; CHECK: store i32 %t, i32* %q +; CHECK: ret void +; CHECK: if.else: +; CHECK: %u = load i32* %p +; CHECK: store i32 %u, i32* %q + +define void @watch_out_for_type_change(i1 %c, i32* %p, i32* %p1, i32* %q) nounwind { +entry: + store i32 0, i32* %p, !tbaa !1 + store i32 1, i32* %p1, !tbaa !2 + br i1 %c, label %if.else, label %if.then + +if.then: + %t = load i32* %p, !tbaa !4 + store i32 %t, i32* %q + ret void + +if.else: + %u = load i32* %p, !tbaa !3 + store i32 %u, i32* %q + ret void +} + +; As before, but the types are swapped. This time GVN does managed to +; eliminate one of the loads before noticing the type mismatch. + +; CHECK: @watch_out_for_another_type_change +; CHECK: if.then: +; CHECK: %t = load i32* %p +; CHECK: store i32 %t, i32* %q +; CHECK: ret void +; CHECK: if.else: +; CHECK: store i32 0, i32* %q + +define void @watch_out_for_another_type_change(i1 %c, i32* %p, i32* %p1, i32* %q) nounwind { +entry: + store i32 0, i32* %p, !tbaa !1 + store i32 1, i32* %p1, !tbaa !2 + br i1 %c, label %if.else, label %if.then + +if.then: + %t = load i32* %p, !tbaa !3 + store i32 %t, i32* %q + ret void + +if.else: + %u = load i32* %p, !tbaa !4 + store i32 %u, i32* %q + ret void +} + +!0 = metadata !{} +!1 = metadata !{metadata !"red", metadata !0} +!2 = metadata !{metadata !"blu", metadata !0} +!3 = metadata !{metadata !"outer space"} +!4 = metadata !{metadata !"brick red", metadata !1} diff --git a/test/Analysis/TypeBasedAliasAnalysis/licm.ll b/test/Analysis/TypeBasedAliasAnalysis/licm.ll new file mode 100644 index 000000000000..12a9c1dc5649 --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/licm.ll @@ -0,0 +1,61 @@ +; RUN: opt -tbaa -licm -S < %s | FileCheck %s + +; LICM should be able to hoist the address load out of the loop +; by using TBAA information. + +; CHECK: @foo +; CHECK: entry: +; CHECK-NEXT: %tmp3 = load double** @P, !tbaa !0 +; CHECK-NEXT: br label %for.body + +@P = common global double* null + +define void @foo(i64 %n) nounwind { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %i.07 = phi i64 [ %inc, %for.body ], [ 0, %entry ] + %tmp3 = load double** @P, !tbaa !1 + %scevgep = getelementptr double* %tmp3, i64 %i.07 + %tmp4 = load double* %scevgep, !tbaa !2 + %mul = fmul double %tmp4, 2.300000e+00 + store double %mul, double* %scevgep, !tbaa !2 + %inc = add i64 %i.07, 1 + %exitcond = icmp eq i64 %inc, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +} + +!0 = metadata !{metadata !"root", null} +!1 = metadata !{metadata !"pointer", metadata !0} +!2 = metadata !{metadata !"double", metadata !0} + +; LICM shouldn't hoist anything here. + +; CHECK: @bar +; CHECK: loop: +; CHECK: load +; CHECK: store +; CHECK: load +; CHECK: store +; CHECK: br label %loop + +define void @bar(i8** %p) nounwind { +entry: + %q = bitcast i8** %p to i8* + br label %loop + +loop: + %tmp51 = load i8** %p, !tbaa !4 + store i8* %tmp51, i8** %p + %tmp40 = load i8* %q, !tbaa !5 + store i8 %tmp40, i8* %q + br label %loop +} + +!3 = metadata !{metadata !"pointer", metadata !4} +!4 = metadata !{metadata !"char", metadata !5} +!5 = metadata !{metadata !"root", null} diff --git a/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll b/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll new file mode 100644 index 000000000000..c2407dfd4c89 --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll @@ -0,0 +1,23 @@ +; RUN: opt -S -tbaa -basicaa -memcpyopt -instcombine < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; The second memcpy is redundant and can be deleted. There's an intervening store, but +; it has a TBAA tag which declares that it is unrelated. + +; CHECK: @foo +; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !0 +; CHECK-NEXT: store i8 2, i8* %s, align 1, !tbaa !2 +; CHECK-NEXT: ret void +define void @foo(i8* nocapture %p, i8* nocapture %q, i8* nocapture %s) nounwind { + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !2 + store i8 2, i8* %s, align 1, !tbaa !1 + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %q, i8* %p, i64 16, i32 1, i1 false), !tbaa !2 + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +!0 = metadata !{metadata !"tbaa root", null} +!1 = metadata !{metadata !"A", metadata !0} +!2 = metadata !{metadata !"B", metadata !0} diff --git a/test/Analysis/TypeBasedAliasAnalysis/precedence.ll b/test/Analysis/TypeBasedAliasAnalysis/precedence.ll new file mode 100644 index 000000000000..47cb5f2256d3 --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/precedence.ll @@ -0,0 +1,46 @@ +; RUN: opt -basicaa -tbaa -gvn -instcombine -S < %s | FileCheck %s --check-prefix=TBAA +; RUN: opt -tbaa -basicaa -gvn -instcombine -S < %s | FileCheck %s --check-prefix=BASICAA + +; According to the TBAA metadata the load and store don't alias. However, +; according to the actual code, they do. The order of the alias analysis +; passes should determine which of these takes precedence. + +target datalayout = "e-p:64:64:64" + +; Test for simple MustAlias aliasing. + +; TBAA: @trouble +; TBAA: ret i32 0 +; BASICAA: @trouble +; BASICAA: ret i32 1075000115 +define i32 @trouble(i32* %x) nounwind { +entry: + store i32 0, i32* %x, !tbaa !0 + %0 = bitcast i32* %x to float* + store float 0x4002666660000000, float* %0, !tbaa !3 + %tmp3 = load i32* %x, !tbaa !0 + ret i32 %tmp3 +} + +; Test for PartialAlias aliasing. GVN doesn't yet eliminate the load +; in the BasicAA case. + +; TBAA: @offset +; TBAA: ret i64 0 +; BASICAA: @offset +; BASICAA: ret i64 %tmp3 +define i64 @offset(i64* %x) nounwind { +entry: + store i64 0, i64* %x, !tbaa !4 + %0 = bitcast i64* %x to i8* + %1 = getelementptr i8* %0, i64 1 + store i8 1, i8* %1, !tbaa !5 + %tmp3 = load i64* %x, !tbaa !4 + ret i64 %tmp3 +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"simple"} +!3 = metadata !{metadata !"float", metadata !1} +!4 = metadata !{metadata !"long", metadata !1} +!5 = metadata !{metadata !"small", metadata !1} diff --git a/test/Analysis/TypeBasedAliasAnalysis/sink.ll b/test/Analysis/TypeBasedAliasAnalysis/sink.ll new file mode 100644 index 000000000000..fd32d6a7a58e --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/sink.ll @@ -0,0 +1,20 @@ +; RUN: opt -tbaa -sink -S < %s | FileCheck %s + +; CHECK: a: +; CHECK: %f = load float* %p, !tbaa !2 +; CHECK: store float %f, float* %q + +define void @foo(float* %p, i1 %c, float* %q, float* %r) { + %f = load float* %p, !tbaa !0 + store float 0.0, float* %r, !tbaa !1 + br i1 %c, label %a, label %b +a: + store float %f, float* %q + br label %b +b: + ret void +} + +!0 = metadata !{metadata !"A", metadata !2} +!1 = metadata !{metadata !"B", metadata !2} +!2 = metadata !{metadata !"test"} diff --git a/test/Archive/GNU.toc b/test/Archive/GNU.toc deleted file mode 100644 index d9934139136c..000000000000 --- a/test/Archive/GNU.toc +++ /dev/null @@ -1,4 +0,0 @@ -evenlen -oddlen -very_long_bytecode_file_name.bc -IsNAN.o diff --git a/test/Archive/MacOSX.toc b/test/Archive/MacOSX.toc deleted file mode 100644 index f971df73325c..000000000000 --- a/test/Archive/MacOSX.toc +++ /dev/null @@ -1,5 +0,0 @@ -__.SYMDEF SORTED -evenlen -oddlen -very_long_bytecode_file_name.bc -IsNAN.o diff --git a/test/Archive/SVR4.toc b/test/Archive/SVR4.toc deleted file mode 100644 index d9934139136c..000000000000 --- a/test/Archive/SVR4.toc +++ /dev/null @@ -1,4 +0,0 @@ -evenlen -oddlen -very_long_bytecode_file_name.bc -IsNAN.o diff --git a/test/Archive/extract.ll b/test/Archive/extract.ll index 3649714259b8..714c5f1ed983 100644 --- a/test/Archive/extract.ll +++ b/test/Archive/extract.ll @@ -4,13 +4,13 @@ ; from various style archives. ; RUN: llvm-ar x %p/GNU.a very_long_bytecode_file_name.bc -; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null +; RUN: cmp -s %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc ; RUN: llvm-ar x %p/MacOSX.a very_long_bytecode_file_name.bc -; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc > /dev/null 2>/dev/null +; RUN: cmp -s %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc ; RUN: llvm-ar x %p/SVR4.a very_long_bytecode_file_name.bc -; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null +; RUN: cmp -s %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc ; RUN: llvm-ar x %p/xpg4.a very_long_bytecode_file_name.bc -; RUN: diff %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc >/dev/null 2>/dev/null +; RUN: cmp -s %p/very_long_bytecode_file_name.bc very_long_bytecode_file_name.bc diff --git a/test/Archive/toc_GNU.ll b/test/Archive/toc_GNU.ll index 136f603a831e..9ed7d8eb8cbd 100644 --- a/test/Archive/toc_GNU.ll +++ b/test/Archive/toc_GNU.ll @@ -1,5 +1,8 @@ ;This isn't really an assembly file, its just here to run the test. ;This test just makes sure that llvm-ar can generate a table of contents for ;GNU style archives -;RUN: llvm-ar t %p/GNU.a > %t1 -;RUN: diff %t1 %p/GNU.toc +;RUN: llvm-ar t %p/GNU.a | FileCheck %s +;CHECK: evenlen +;CHECK-NEXT: oddlen +;CHECK-NEXT: very_long_bytecode_file_name.bc +;CHECK-NEXT: IsNAN.o diff --git a/test/Archive/toc_MacOSX.ll b/test/Archive/toc_MacOSX.ll index fb0322324081..6dbc9d2ea4a6 100644 --- a/test/Archive/toc_MacOSX.ll +++ b/test/Archive/toc_MacOSX.ll @@ -1,5 +1,9 @@ ;This isn't really an assembly file, its just here to run the test. ;This test just makes sure that llvm-ar can generate a table of contents for ;MacOSX style archives -;RUN: llvm-ar t %p/MacOSX.a > %t1 -;RUN: diff %t1 %p/MacOSX.toc +;RUN: llvm-ar t %p/MacOSX.a | FileCheck %s +;CHECK: __.SYMDEF SORTED +;CHECK-NEXT: evenlen +;CHECK-NEXT: oddlen +;CHECK-NEXT: very_long_bytecode_file_name.bc +;CHECK-NEXT: IsNAN.o diff --git a/test/Archive/toc_SVR4.ll b/test/Archive/toc_SVR4.ll index 930a26fd353e..d447b9219990 100644 --- a/test/Archive/toc_SVR4.ll +++ b/test/Archive/toc_SVR4.ll @@ -1,5 +1,8 @@ ;This isn't really an assembly file, its just here to run the test. ;This test just makes sure that llvm-ar can generate a table of contents for ;SVR4 style archives -;RUN: llvm-ar t %p/SVR4.a > %t1 -;RUN: diff %t1 %p/SVR4.toc +;RUN: llvm-ar t %p/SVR4.a | FileCheck %s +;CHECK: evenlen +;CHECK-NEXT: oddlen +;CHECK-NEXT: very_long_bytecode_file_name.bc +;CHECK-NEXT: IsNAN.o diff --git a/test/Archive/toc_xpg4.ll b/test/Archive/toc_xpg4.ll index 441af036f3cf..fd875eebdaab 100644 --- a/test/Archive/toc_xpg4.ll +++ b/test/Archive/toc_xpg4.ll @@ -1,5 +1,8 @@ ;This isn't really an assembly file, its just here to run the test. ;This test just makes sure that llvm-ar can generate a table of contents for ;xpg4 style archives -;RUN: llvm-ar t %p/xpg4.a > %t1 -;RUN: diff %t1 %p/xpg4.toc +;RUN: llvm-ar t %p/xpg4.a | FileCheck %s +CHECK: evenlen +CHECK-NEXT: oddlen +CHECK-NEXT: very_long_bytecode_file_name.bc +CHECK-NEXT: IsNAN.o diff --git a/test/Archive/xpg4.toc b/test/Archive/xpg4.toc deleted file mode 100644 index d9934139136c..000000000000 --- a/test/Archive/xpg4.toc +++ /dev/null @@ -1,4 +0,0 @@ -evenlen -oddlen -very_long_bytecode_file_name.bc -IsNAN.o diff --git a/test/Assembler/2003-05-21-MalformedShiftCrash.ll b/test/Assembler/2003-05-21-MalformedShiftCrash.ll index c661f7c0771e..a845d89bb6c9 100644 --- a/test/Assembler/2003-05-21-MalformedShiftCrash.ll +++ b/test/Assembler/2003-05-21-MalformedShiftCrash.ll @@ -1,4 +1,4 @@ ; Found by inspection of the code -; RUN: not llvm-as < %s > /dev/null |& grep {constexpr requires integer or integer vector operands} +; RUN: not llvm-as < %s > /dev/null |& grep {constexpr requires integer operands} global i32 ashr (float 1.0, float 2.0) diff --git a/test/Assembler/AutoUpgradeIntrinsics.ll b/test/Assembler/AutoUpgradeIntrinsics.ll index af4ec92e0991..6752bd8281bd 100644 --- a/test/Assembler/AutoUpgradeIntrinsics.ll +++ b/test/Assembler/AutoUpgradeIntrinsics.ll @@ -7,7 +7,7 @@ ; RUN: llvm-as < %s | llvm-dis | \ ; RUN: not grep {llvm\\.bswap\\.i\[0-9\]*\\.i\[0-9\]*} ; RUN: llvm-as < %s | llvm-dis | \ -; RUN: grep {llvm\\.x86\\.mmx\\.ps} | grep {\\\<2 x i32\\\>} | count 6 +; RUN: grep {llvm\\.x86\\.mmx\\.ps} | grep {x86_mmx} | count 16 declare i32 @llvm.ctpop.i28(i28 %val) declare i32 @llvm.cttz.i29(i29 %val) diff --git a/test/Assembler/AutoUpgradeMMXIntrinsics.ll b/test/Assembler/AutoUpgradeMMXIntrinsics.ll new file mode 100644 index 000000000000..54120ff9dce6 --- /dev/null +++ b/test/Assembler/AutoUpgradeMMXIntrinsics.ll @@ -0,0 +1,223 @@ +; Tests to make sure MMX intrinsics are automatically upgraded. +; RUN: llvm-as < %s | llvm-dis -o %t +; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<1 x i64\\\>} +; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<2 x i32\\\>} +; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<4 x i16\\\>} +; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<8 x i8\\\>} +; RUN: grep {llvm\\.x86\\.sse\\.pshuf\\.w} %t | not grep i32 + +; Addition +declare <8 x i8> @llvm.x86.mmx.padd.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.padd.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.padd.d(<2 x i32>, <2 x i32>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.padd.q(<1 x i64>, <1 x i64>) nounwind readnone +declare <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) nounwind readnone +define void @add(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D, + <2 x i32> %E, <2 x i32> %F, <1 x i64> %G, <1 x i64> %H) { + %r1 = call <8 x i8> @llvm.x86.mmx.padd.b(<8 x i8> %A, <8 x i8> %B) + %r2 = call <4 x i16> @llvm.x86.mmx.padd.w(<4 x i16> %C, <4 x i16> %D) + %r3 = call <2 x i32> @llvm.x86.mmx.padd.d(<2 x i32> %E, <2 x i32> %F) + %r4 = call <1 x i64> @llvm.x86.mmx.padd.q(<1 x i64> %G, <1 x i64> %H) + %r5 = call <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8> %A, <8 x i8> %B) + %r6 = call <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16> %C, <4 x i16> %D) + %r7 = call <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8> %A, <8 x i8> %B) + %r8 = call <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16> %C, <4 x i16> %D) + ret void +} + +; Subtraction +declare <8 x i8> @llvm.x86.mmx.psub.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.psub.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.psub.d(<2 x i32>, <2 x i32>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.psub.q(<1 x i64>, <1 x i64>) nounwind readnone +declare <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16>, <4 x i16>) nounwind readnone +define void @sub(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D, + <2 x i32> %E, <2 x i32> %F, <1 x i64> %G, <1 x i64> %H) { + %r1 = call <8 x i8> @llvm.x86.mmx.psub.b(<8 x i8> %A, <8 x i8> %B) + %r2 = call <4 x i16> @llvm.x86.mmx.psub.w(<4 x i16> %C, <4 x i16> %D) + %r3 = call <2 x i32> @llvm.x86.mmx.psub.d(<2 x i32> %E, <2 x i32> %F) + %r4 = call <1 x i64> @llvm.x86.mmx.psub.q(<1 x i64> %G, <1 x i64> %H) + %r5 = call <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8> %A, <8 x i8> %B) + %r6 = call <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16> %C, <4 x i16> %D) + %r7 = call <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8> %A, <8 x i8> %B) + %r8 = call <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16> %C, <4 x i16> %D) + ret void +} + +; Multiplication +declare <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pmull.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pmulhu.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pmulu.dq(<4 x i16>, <4 x i16>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16>, <4 x i16>) nounwind readnone +define void @mul(<4 x i16> %A, <4 x i16> %B) { + %r1 = call <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16> %A, <4 x i16> %B) + %r2 = call <4 x i16> @llvm.x86.mmx.pmull.w(<4 x i16> %A, <4 x i16> %B) + %r3 = call <4 x i16> @llvm.x86.mmx.pmulhu.w(<4 x i16> %A, <4 x i16> %B) + %r4 = call <4 x i16> @llvm.x86.mmx.pmulu.dq(<4 x i16> %A, <4 x i16> %B) + %r5 = call <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16> %A, <4 x i16> %B) + ret void +} + +; Bitwise operations +declare <1 x i64> @llvm.x86.mmx.pand(<1 x i64>, <1 x i64>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.pandn(<1 x i64>, <1 x i64>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.por(<1 x i64>, <1 x i64>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.pxor(<1 x i64>, <1 x i64>) nounwind readnone +define void @bit(<1 x i64> %A, <1 x i64> %B) { + %r1 = call <1 x i64> @llvm.x86.mmx.pand(<1 x i64> %A, <1 x i64> %B) + %r2 = call <1 x i64> @llvm.x86.mmx.pandn(<1 x i64> %A, <1 x i64> %B) + %r3 = call <1 x i64> @llvm.x86.mmx.por(<1 x i64> %A, <1 x i64> %B) + %r4 = call <1 x i64> @llvm.x86.mmx.pxor(<1 x i64> %A, <1 x i64> %B) + ret void +} + +; Averages +declare <8 x i8> @llvm.x86.mmx.pavg.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pavg.w(<4 x i16>, <4 x i16>) nounwind readnone +define void @avg(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D) { + %r1 = call <8 x i8> @llvm.x86.mmx.pavg.b(<8 x i8> %A, <8 x i8> %B) + %r2 = call <4 x i16> @llvm.x86.mmx.pavg.w(<4 x i16> %C, <4 x i16> %D) + ret void +} + +; Maximum +declare <8 x i8> @llvm.x86.mmx.pmaxu.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pmaxs.w(<4 x i16>, <4 x i16>) nounwind readnone +define void @max(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D) { + %r1 = call <8 x i8> @llvm.x86.mmx.pmaxu.b(<8 x i8> %A, <8 x i8> %B) + %r2 = call <4 x i16> @llvm.x86.mmx.pmaxs.w(<4 x i16> %C, <4 x i16> %D) + ret void +} + +; Minimum +declare <8 x i8> @llvm.x86.mmx.pminu.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pmins.w(<4 x i16>, <4 x i16>) nounwind readnone +define void @min(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D) { + %r1 = call <8 x i8> @llvm.x86.mmx.pminu.b(<8 x i8> %A, <8 x i8> %B) + %r2 = call <4 x i16> @llvm.x86.mmx.pmins.w(<4 x i16> %C, <4 x i16> %D) + ret void +} + +; Packed sum of absolute differences +declare <4 x i16> @llvm.x86.mmx.psad.bw(<8 x i8>, <8 x i8>) nounwind readnone +define void @psad(<8 x i8> %A, <8 x i8> %B) { + %r1 = call <4 x i16> @llvm.x86.mmx.psad.bw(<8 x i8> %A, <8 x i8> %B) + ret void +} + +; Shift left +declare <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16>, <1 x i64>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32>, <1 x i64>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64>, <1 x i64>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pslli.w(<4 x i16>, i32) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.pslli.d(<2 x i32>, i32) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32) nounwind readnone +define void @shl(<4 x i16> %A, <2 x i32> %B, <1 x i64> %C, i32 %D) { + %r1 = call <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16> %A, <1 x i64> %C) + %r2 = call <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32> %B, <1 x i64> %C) + %r3 = call <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64> %C, <1 x i64> %C) + %r4 = call <4 x i16> @llvm.x86.mmx.pslli.w(<4 x i16> %A, i32 %D) + %r5 = call <2 x i32> @llvm.x86.mmx.pslli.d(<2 x i32> %B, i32 %D) + %r6 = call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %C, i32 %D) + ret void +} + +; Shift right logical +declare <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16>, <1 x i64>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32>, <1 x i64>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64>, <1 x i64>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.psrli.w(<4 x i16>, i32) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.psrli.d(<2 x i32>, i32) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64>, i32) nounwind readnone +define void @shr(<4 x i16> %A, <2 x i32> %B, <1 x i64> %C, i32 %D) { + %r1 = call <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16> %A, <1 x i64> %C) + %r2 = call <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32> %B, <1 x i64> %C) + %r3 = call <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64> %C, <1 x i64> %C) + %r4 = call <4 x i16> @llvm.x86.mmx.psrli.w(<4 x i16> %A, i32 %D) + %r5 = call <2 x i32> @llvm.x86.mmx.psrli.d(<2 x i32> %B, i32 %D) + %r6 = call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %C, i32 %D) + ret void +} + +; Shift right arithmetic +declare <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16>, <1 x i64>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <1 x i64>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.psrai.w(<4 x i16>, i32) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.psrai.d(<2 x i32>, i32) nounwind readnone +define void @sra(<4 x i16> %A, <2 x i32> %B, <1 x i64> %C, i32 %D) { + %r1 = call <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16> %A, <1 x i64> %C) + %r2 = call <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32> %B, <1 x i64> %C) + %r3 = call <4 x i16> @llvm.x86.mmx.psrai.w(<4 x i16> %A, i32 %D) + %r4 = call <2 x i32> @llvm.x86.mmx.psrai.d(<2 x i32> %B, i32 %D) + ret void +} + +; Pack/Unpack ops +declare <8 x i8> @llvm.x86.mmx.packsswb(<4 x i16>, <4 x i16>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.packssdw(<2 x i32>, <2 x i32>) nounwind readnone +declare <8 x i8> @llvm.x86.mmx.packuswb(<4 x i16>, <4 x i16>) nounwind readnone +declare <8 x i8> @llvm.x86.mmx.punpckhbw(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.punpckhwd(<4 x i16>, <4 x i16>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.punpckhdq(<2 x i32>, <2 x i32>) nounwind readnone +declare <8 x i8> @llvm.x86.mmx.punpcklbw(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.punpcklwd(<4 x i16>, <4 x i16>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.punpckldq(<2 x i32>, <2 x i32>) nounwind readnone +define void @pack_unpack(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D, + <2 x i32> %E, <2 x i32> %F) { + %r1 = call <8 x i8> @llvm.x86.mmx.packsswb(<4 x i16> %C, <4 x i16> %D) + %r2 = call <4 x i16> @llvm.x86.mmx.packssdw(<2 x i32> %E, <2 x i32> %F) + %r3 = call <8 x i8> @llvm.x86.mmx.packuswb(<4 x i16> %C, <4 x i16> %D) + %r4 = call <8 x i8> @llvm.x86.mmx.punpckhbw(<8 x i8> %A, <8 x i8> %B) + %r5 = call <4 x i16> @llvm.x86.mmx.punpckhwd(<4 x i16> %C, <4 x i16> %D) + %r6 = call <2 x i32> @llvm.x86.mmx.punpckhdq(<2 x i32> %E, <2 x i32> %F) + %r7 = call <8 x i8> @llvm.x86.mmx.punpcklbw(<8 x i8> %A, <8 x i8> %B) + %r8 = call <4 x i16> @llvm.x86.mmx.punpcklwd(<4 x i16> %C, <4 x i16> %D) + %r9 = call <2 x i32> @llvm.x86.mmx.punpckldq(<2 x i32> %E, <2 x i32> %F) + ret void +} + +; Integer comparison ops +declare <8 x i8> @llvm.x86.mmx.pcmpeq.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pcmpeq.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.pcmpeq.d(<2 x i32>, <2 x i32>) nounwind readnone +declare <8 x i8> @llvm.x86.mmx.pcmpgt.b(<8 x i8>, <8 x i8>) nounwind readnone +declare <4 x i16> @llvm.x86.mmx.pcmpgt.w(<4 x i16>, <4 x i16>) nounwind readnone +declare <2 x i32> @llvm.x86.mmx.pcmpgt.d(<2 x i32>, <2 x i32>) nounwind readnone +define void @cmp(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D, + <2 x i32> %E, <2 x i32> %F) { + %r1 = call <8 x i8> @llvm.x86.mmx.pcmpeq.b(<8 x i8> %A, <8 x i8> %B) + %r2 = call <4 x i16> @llvm.x86.mmx.pcmpeq.w(<4 x i16> %C, <4 x i16> %D) + %r3 = call <2 x i32> @llvm.x86.mmx.pcmpeq.d(<2 x i32> %E, <2 x i32> %F) + %r4 = call <8 x i8> @llvm.x86.mmx.pcmpgt.b(<8 x i8> %A, <8 x i8> %B) + %r5 = call <4 x i16> @llvm.x86.mmx.pcmpgt.w(<4 x i16> %C, <4 x i16> %D) + %r6 = call <2 x i32> @llvm.x86.mmx.pcmpgt.d(<2 x i32> %E, <2 x i32> %F) + ret void +} + +; Miscellaneous +declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i32*) nounwind readnone +declare i32 @llvm.x86.mmx.pmovmskb(<8 x i8>) nounwind readnone +declare void @llvm.x86.mmx.movnt.dq(i32*, <1 x i64>) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.palignr.b(<1 x i64>, <1 x i64>, i8) nounwind readnone +declare i32 @llvm.x86.mmx.pextr.w(<1 x i64>, i32) nounwind readnone +declare <1 x i64> @llvm.x86.mmx.pinsr.w(<1 x i64>, i32, i32) nounwind readnone +declare <4 x i16> @llvm.x86.ssse3.pshuf.w(<4 x i16>, i32) nounwind readnone +define void @misc(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D, + <2 x i32> %E, <2 x i32> %F, <1 x i64> %G, <1 x i64> %H, + i32* %I, i8 %J, i16 %K, i32 %L) { + call void @llvm.x86.mmx.maskmovq(<8 x i8> %A, <8 x i8> %B, i32* %I) + %r1 = call i32 @llvm.x86.mmx.pmovmskb(<8 x i8> %A) + call void @llvm.x86.mmx.movnt.dq(i32* %I, <1 x i64> %G) + %r2 = call <1 x i64> @llvm.x86.mmx.palignr.b(<1 x i64> %G, <1 x i64> %H, i8 %J) + %r3 = call i32 @llvm.x86.mmx.pextr.w(<1 x i64> %G, i32 37) + %r4 = call <1 x i64> @llvm.x86.mmx.pinsr.w(<1 x i64> %G, i32 37, i32 927) + %r5 = call <4 x i16> @llvm.x86.ssse3.pshuf.w(<4 x i16> %C, i32 37) + ret void +} diff --git a/test/Assembler/extractvalue-invalid-idx.ll b/test/Assembler/extractvalue-invalid-idx.ll new file mode 100644 index 000000000000..f9644eadbd59 --- /dev/null +++ b/test/Assembler/extractvalue-invalid-idx.ll @@ -0,0 +1,8 @@ +; RUN: not llvm-as < %s |& grep {invalid indices for extractvalue} +; PR4170 + +define void @test() { +entry: + extractvalue [0 x i32] undef, 0 + ret void +} diff --git a/test/Assembler/flags.ll b/test/Assembler/flags.ll index 324190905975..310b807c5d56 100644 --- a/test/Assembler/flags.ll +++ b/test/Assembler/flags.ll @@ -92,6 +92,12 @@ define i64 @mul_both_reversed(i64 %x, i64 %y) { ret i64 %z } +define i64 @shl_both(i64 %x, i64 %y) { +; CHECK: %z = shl nuw nsw i64 %x, %y + %z = shl nuw nsw i64 %x, %y + ret i64 %z +} + define i64 @sdiv_exact(i64 %x, i64 %y) { ; CHECK: %z = sdiv exact i64 %x, %y %z = sdiv exact i64 %x, %y @@ -104,6 +110,42 @@ define i64 @sdiv_plain(i64 %x, i64 %y) { ret i64 %z } +define i64 @udiv_exact(i64 %x, i64 %y) { +; CHECK: %z = udiv exact i64 %x, %y + %z = udiv exact i64 %x, %y + ret i64 %z +} + +define i64 @udiv_plain(i64 %x, i64 %y) { +; CHECK: %z = udiv i64 %x, %y + %z = udiv i64 %x, %y + ret i64 %z +} + +define i64 @ashr_plain(i64 %x, i64 %y) { +; CHECK: %z = ashr i64 %x, %y + %z = ashr i64 %x, %y + ret i64 %z +} + +define i64 @ashr_exact(i64 %x, i64 %y) { +; CHECK: %z = ashr exact i64 %x, %y + %z = ashr exact i64 %x, %y + ret i64 %z +} + +define i64 @lshr_plain(i64 %x, i64 %y) { +; CHECK: %z = lshr i64 %x, %y + %z = lshr i64 %x, %y + ret i64 %z +} + +define i64 @lshr_exact(i64 %x, i64 %y) { +; CHECK: %z = lshr exact i64 %x, %y + %z = lshr exact i64 %x, %y + ret i64 %z +} + define i64* @gep_nw(i64* %p, i64 %x) { ; CHECK: %z = getelementptr inbounds i64* %p, i64 %x %z = getelementptr inbounds i64* %p, i64 %x @@ -136,6 +178,21 @@ define i64 @sdiv_exact_ce() { ret i64 sdiv exact (i64 ptrtoint (i64* @addr to i64), i64 91) } +define i64 @udiv_exact_ce() { +; CHECK: ret i64 udiv exact (i64 ptrtoint (i64* @addr to i64), i64 91) + ret i64 udiv exact (i64 ptrtoint (i64* @addr to i64), i64 91) +} + +define i64 @ashr_exact_ce() { +; CHECK: ret i64 ashr exact (i64 ptrtoint (i64* @addr to i64), i64 9) + ret i64 ashr exact (i64 ptrtoint (i64* @addr to i64), i64 9) +} + +define i64 @lshr_exact_ce() { +; CHECK: ret i64 lshr exact (i64 ptrtoint (i64* @addr to i64), i64 9) + ret i64 lshr exact (i64 ptrtoint (i64* @addr to i64), i64 9) +} + define i64* @gep_nw_ce() { ; CHECK: ret i64* getelementptr inbounds (i64* @addr, i64 171) ret i64* getelementptr inbounds (i64* @addr, i64 171) @@ -196,6 +253,12 @@ define i64 @mul_signed_ce() { ret i64 mul nsw (i64 ptrtoint (i64* @addr to i64), i64 91) } +define i64 @shl_signed_ce() { +; CHECK: ret i64 shl nsw (i64 ptrtoint (i64* @addr to i64), i64 17) + ret i64 shl nsw (i64 ptrtoint (i64* @addr to i64), i64 17) +} + + define i64 @add_unsigned_ce() { ; CHECK: ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91) ret i64 add nuw (i64 ptrtoint (i64* @addr to i64), i64 91) @@ -210,3 +273,4 @@ define i64 @mul_unsigned_ce() { ; CHECK: ret i64 mul nuw (i64 ptrtoint (i64* @addr to i64), i64 91) ret i64 mul nuw (i64 ptrtoint (i64* @addr to i64), i64 91) } + diff --git a/test/Assembler/insertvalue-invalid-idx.ll b/test/Assembler/insertvalue-invalid-idx.ll new file mode 100644 index 000000000000..86e7258cc593 --- /dev/null +++ b/test/Assembler/insertvalue-invalid-idx.ll @@ -0,0 +1,7 @@ +; RUN: not llvm-as < %s |& grep {invalid indices for insertvalue} + +define void @test() { +entry: + insertvalue [0 x i32] undef, i32 0, 0 + ret void +} diff --git a/test/Assembler/unnamed-addr.ll b/test/Assembler/unnamed-addr.ll new file mode 100644 index 000000000000..3c94ca213081 --- /dev/null +++ b/test/Assembler/unnamed-addr.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llvm-dis | FileCheck %s + +%struct.foobar = type { i32 } + +@bar.d = internal unnamed_addr constant %struct.foobar zeroinitializer, align 4 +@foo.d = internal constant %struct.foobar zeroinitializer, align 4 + +define i32 @main() unnamed_addr nounwind ssp { +entry: + %call2 = tail call i32 @zed(%struct.foobar* @foo.d, %struct.foobar* @bar.d) nounwind + ret i32 0 +} + +declare i32 @zed(%struct.foobar*, %struct.foobar*) + +; CHECK: @bar.d = internal unnamed_addr constant %struct.foobar zeroinitializer, align 4 +; CHECK: @foo.d = internal constant %struct.foobar zeroinitializer, align 4 +; CHECK: define i32 @main() unnamed_addr nounwind ssp { diff --git a/test/Assembler/x86mmx.ll b/test/Assembler/x86mmx.ll new file mode 100644 index 000000000000..732d3be8619d --- /dev/null +++ b/test/Assembler/x86mmx.ll @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | llvm-dis | FileCheck %s +; Basic smoke test for x86_mmx type. + +; CHECK: define x86_mmx @sh16 +define x86_mmx @sh16(x86_mmx %A) { +; CHECK: ret x86_mmx %A + ret x86_mmx %A +} diff --git a/test/Bindings/Ocaml/analysis.ml b/test/Bindings/Ocaml/analysis.ml index bf2178254409..7df8e21203a9 100644 --- a/test/Bindings/Ocaml/analysis.ml +++ b/test/Bindings/Ocaml/analysis.ml @@ -1,5 +1,6 @@ (* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_analysis.cmxa %s -o %t * RUN: %t + * XFAIL: vg_leak *) open Llvm diff --git a/test/Bindings/Ocaml/bitreader.ml b/test/Bindings/Ocaml/bitreader.ml index 30b07d2199f3..a3bd91a0af2a 100644 --- a/test/Bindings/Ocaml/bitreader.ml +++ b/test/Bindings/Ocaml/bitreader.ml @@ -1,6 +1,7 @@ (* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_bitreader.cmxa llvm_bitwriter.cmxa %s -o %t * RUN: %t %t.bc * RUN: llvm-dis < %t.bc | grep caml_int_ty + * XFAIL: vg_leak *) (* Note that this takes a moment to link, so it's best to keep the number of diff --git a/test/Bindings/Ocaml/bitwriter.ml b/test/Bindings/Ocaml/bitwriter.ml index 8eb923ea32c7..3f55fb9fa1d4 100644 --- a/test/Bindings/Ocaml/bitwriter.ml +++ b/test/Bindings/Ocaml/bitwriter.ml @@ -1,6 +1,7 @@ (* RUN: %ocamlopt -warn-error A unix.cmxa llvm.cmxa llvm_bitwriter.cmxa %s -o %t * RUN: %t %t.bc * RUN: llvm-dis < %t.bc | grep caml_int_ty + * XFAIL: vg_leak *) (* Note that this takes a moment to link, so it's best to keep the number of diff --git a/test/Bindings/Ocaml/executionengine.ml b/test/Bindings/Ocaml/executionengine.ml index 63040e4a33fc..f7a49bb284c0 100644 --- a/test/Bindings/Ocaml/executionengine.ml +++ b/test/Bindings/Ocaml/executionengine.ml @@ -1,5 +1,6 @@ (* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_target.cmxa llvm_executionengine.cmxa %s -o %t * RUN: %t + * XFAIL: vg_leak *) open Llvm diff --git a/test/Bindings/Ocaml/ext_exc.ml b/test/Bindings/Ocaml/ext_exc.ml new file mode 100644 index 000000000000..b4d2e6dc6414 --- /dev/null +++ b/test/Bindings/Ocaml/ext_exc.ml @@ -0,0 +1,17 @@ +(* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_bitreader.cmxa llvm_executionengine.cmxa %s -o %t + * RUN: %t </dev/null + * XFAIL: vg_leak + *) +let context = Llvm.global_context () +(* this used to crash, we must not use 'external' in .mli files, but 'val' if we + * want the let _ bindings executed, see http://caml.inria.fr/mantis/view.php?id=4166 *) +let _ = + try + ignore (Llvm_bitreader.get_module context (Llvm.MemoryBuffer.of_stdin ())) + with + Llvm_bitreader.Error _ -> ();; +let _ = + try + ignore (Llvm.MemoryBuffer.of_file "/path/to/nonexistent/file") + with + Llvm.IoError _ -> ();; diff --git a/test/Bindings/Ocaml/scalar_opts.ml b/test/Bindings/Ocaml/scalar_opts.ml index 8a6af012ac24..1ea97858edf6 100644 --- a/test/Bindings/Ocaml/scalar_opts.ml +++ b/test/Bindings/Ocaml/scalar_opts.ml @@ -1,5 +1,6 @@ (* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_scalar_opts.cmxa llvm_target.cmxa %s -o %t * RUN: %t %t.bc + * XFAIL: vg_leak *) (* Note: It takes several seconds for ocamlopt to link an executable with @@ -42,7 +43,7 @@ let test_transforms () = ignore (PassManager.create_function m ++ TargetData.add td ++ add_constant_propagation - ++ add_sccp + ++ add_sccp ++ add_dead_store_elimination ++ add_aggressive_dce ++ add_scalar_repl_aggregation @@ -52,7 +53,6 @@ let test_transforms () = ++ add_loop_unswitch ++ add_loop_unroll ++ add_loop_rotation - ++ add_loop_index_split ++ add_memory_to_register_promotion ++ add_memory_to_register_demotion ++ add_reassociation diff --git a/test/Bindings/Ocaml/target.ml b/test/Bindings/Ocaml/target.ml index bfaf37ca879d..5e3ab4bf9354 100644 --- a/test/Bindings/Ocaml/target.ml +++ b/test/Bindings/Ocaml/target.ml @@ -1,5 +1,6 @@ (* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_target.cmxa %s -o %t * RUN: %t %t.bc + * XFAIL: vg_leak *) (* Note: It takes several seconds for ocamlopt to link an executable with diff --git a/test/Bindings/Ocaml/vmcore.ml b/test/Bindings/Ocaml/vmcore.ml index e55ab9643e43..ceb650e1ca4a 100644 --- a/test/Bindings/Ocaml/vmcore.ml +++ b/test/Bindings/Ocaml/vmcore.ml @@ -1,6 +1,7 @@ (* RUN: %ocamlopt -warn-error A llvm.cmxa llvm_analysis.cmxa llvm_bitwriter.cmxa %s -o %t * RUN: %t %t.bc * RUN: llvm-dis < %t.bc > %t.ll + * XFAIL: vg_leak *) (* Note: It takes several seconds for ocamlopt to link an executable with diff --git a/test/Bitcode/null-type.ll b/test/Bitcode/null-type.ll new file mode 100644 index 000000000000..5d3dfab5753a --- /dev/null +++ b/test/Bitcode/null-type.ll @@ -0,0 +1,2 @@ +; RUN: not llvm-dis < %s.bc > /dev/null |& grep "Invalid MODULE_CODE_FUNCTION record" +; PR8494 diff --git a/test/Bitcode/null-type.ll.bc b/test/Bitcode/null-type.ll.bc Binary files differnew file mode 100644 index 000000000000..f0a97d94ce90 --- /dev/null +++ b/test/Bitcode/null-type.ll.bc diff --git a/test/Bitcode/ssse3_palignr.ll.bc b/test/Bitcode/ssse3_palignr.ll.bc Binary files differindex 642f4dedc417..3fc9cdf15a35 100644 --- a/test/Bitcode/ssse3_palignr.ll.bc +++ b/test/Bitcode/ssse3_palignr.ll.bc diff --git a/test/BugPoint/crash-narrowfunctiontest.ll b/test/BugPoint/crash-narrowfunctiontest.ll index 18a31eb45d36..d080d9dd4b0c 100644 --- a/test/BugPoint/crash-narrowfunctiontest.ll +++ b/test/BugPoint/crash-narrowfunctiontest.ll @@ -1,8 +1,7 @@ ; Test that bugpoint can narrow down the testcase to the important function -; FIXME: This likely fails on windows ; -; RUN: bugpoint -load %llvmlibsdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null -; XFAIL: mingw +; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null +; REQUIRES: loadable_module define i32 @foo() { ret i32 1 } diff --git a/test/BugPoint/metadata.ll b/test/BugPoint/metadata.ll index f2541ee3f9ac..0eda5667ba4a 100644 --- a/test/BugPoint/metadata.ll +++ b/test/BugPoint/metadata.ll @@ -1,6 +1,6 @@ -; RUN: bugpoint -load %llvmlibsdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null +; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null ; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck %s -; XFAIL: mingw +; REQUIRES: loadable_module ; Bugpoint should keep the call's metadata attached to the call. diff --git a/test/BugPoint/remove_arguments_test.ll b/test/BugPoint/remove_arguments_test.ll index 791ec69a23d2..29a03b831077 100644 --- a/test/BugPoint/remove_arguments_test.ll +++ b/test/BugPoint/remove_arguments_test.ll @@ -1,7 +1,6 @@ -; FIXME: This likely fails on windows -; RUN: bugpoint -load %llvmlibsdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes +; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes ; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck %s -; XFAIL: mingw +; REQUIRES: loadable_module ; Test to make sure that arguments are removed from the function if they are ; unnecessary. And clean up any types that that frees up too. diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index ad9a2432dbfa..302e141a3ed1 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -7,6 +7,8 @@ set(TARGETS_TO_BUILD ${TARGETS_BUILT}) set(LLVM_LIBS_DIR "${LLVM_BINARY_DIR}/lib/${CMAKE_CFG_INTDIR}") set(SHLIBEXT "${LTDL_SHLIB_EXT}") +set(SHLIBDIR "${LLVM_BINARY_DIR}/lib/${CMAKE_CFG_INTDIR}") + if(BUILD_SHARED_LIBS) set(LLVM_SHARED_LIBS_ENABLED "1") else() @@ -18,12 +20,15 @@ if(${CMAKE_SYSTEM_NAME} MATCHES "Darwin") else() # Default for all other unix like systems. # CMake hardcodes the library locaction using rpath. # Therefore LD_LIBRARY_PATH is not required to run binaries in the - # build dir. We pass it anyways. + # build dir. We pass it anyways. set(SHLIBPATH_VAR "LD_LIBRARY_PATH") endif() include(FindPythonInterp) if(PYTHONINTERP_FOUND) + set(LIT_ARGS "${LLVM_LIT_ARGS}") + separate_arguments(LIT_ARGS) + get_directory_property(DEFINITIONS COMPILE_DEFINITIONS) foreach(DEF ${DEFINITIONS}) set(DEFS "${DEFS} -D${DEF}") @@ -47,30 +52,44 @@ if(PYTHONINTERP_FOUND) MAKE_DIRECTORY(${CMAKE_CURRENT_BINARY_DIR}/Unit) + # Configuration-time: See Unit/lit.site.cfg.in + set(LLVM_BUILD_MODE "%(build_mode)s") + + set(LLVM_SOURCE_DIR ${LLVM_MAIN_SRC_DIR}) + set(LLVM_BINARY_DIR ${LLVM_BINARY_DIR}) + set(LLVM_TOOLS_DIR "${LLVM_TOOLS_BINARY_DIR}/%(build_config)s") + set(LLVMGCCDIR "") + set(PYTHON_EXECUTABLE ${PYTHON_EXECUTABLE}) + set(ENABLE_SHARED ${LLVM_SHARED_LIBS_ENABLED}) + set(SHLIBPATH_VAR ${SHLIBPATH_VAR}) + + configure_file( + ${CMAKE_CURRENT_SOURCE_DIR}/lit.site.cfg.in + ${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg + @ONLY) + configure_file( + ${CMAKE_CURRENT_SOURCE_DIR}/Unit/lit.site.cfg.in + ${CMAKE_CURRENT_BINARY_DIR}/Unit/lit.site.cfg + @ONLY) + add_custom_target(check - COMMAND sed -e "s#\@LLVM_SOURCE_DIR\@#${LLVM_MAIN_SRC_DIR}#" - -e "s#\@LLVM_BINARY_DIR\@#${LLVM_BINARY_DIR}#" - -e "s#\@LLVM_TOOLS_DIR\@#${LLVM_TOOLS_BINARY_DIR}/${CMAKE_CFG_INTDIR}#" - -e "s#\@LLVMGCCDIR\@##" - -e "s#\@PYTHON_EXECUTABLE\@#${PYTHON_EXECUTABLE}#" - ${CMAKE_CURRENT_SOURCE_DIR}/lit.site.cfg.in > - ${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg - COMMAND sed -e "s#\@LLVM_SOURCE_DIR\@#${LLVM_MAIN_SRC_DIR}#" - -e "s#\@LLVM_BINARY_DIR\@#${LLVM_BINARY_DIR}#" - -e "s#\@LLVM_TOOLS_DIR\@#${LLVM_TOOLS_BINARY_DIR}/${CMAKE_CFG_INTDIR}#" - -e "s#\@LLVMGCCDIR\@##" - -e "s#\@LLVM_BUILD_MODE\@#${CMAKE_CFG_INTDIR}#" - -e "s#\@ENABLE_SHARED\@#${LLVM_SHARED_LIBS_ENABLED}#" - -e "s#\@SHLIBPATH_VAR\@#${SHLIBPATH_VAR}#" - ${CMAKE_CURRENT_SOURCE_DIR}/Unit/lit.site.cfg.in > - ${CMAKE_CURRENT_BINARY_DIR}/Unit/lit.site.cfg COMMAND ${PYTHON_EXECUTABLE} ${LLVM_SOURCE_DIR}/utils/lit/lit.py --param llvm_site_config=${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg --param llvm_unit_site_config=${CMAKE_CURRENT_BINARY_DIR}/Unit/lit.site.cfg - -sv + --param build_config=${CMAKE_CFG_INTDIR} + --param build_mode=${RUNTIME_BUILD_MODE} + ${LIT_ARGS} ${CMAKE_CURRENT_BINARY_DIR} - DEPENDS COMMENT "Running LLVM regression tests") + add_custom_target(check.deps) + add_dependencies(check check.deps) + add_dependencies(check.deps + UnitTests + BugpointPasses LLVMHello + llc lli llvm-ar llvm-as llvm-dis llvm-extract + llvm-ld llvm-link llvm-mc llvm-nm macho-dump opt + FileCheck count not) + endif() diff --git a/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll index ee63656b26d3..3694aaad5549 100644 --- a/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll +++ b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 | FileCheck %s @quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1] @dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1] @@ -8,8 +8,9 @@ define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) { entry: ; Make sure to use base-updating stores for saving callee-saved registers. +; CHECK: push ; CHECK-NOT: sub sp -; CHECK: vstmdb sp! +; CHECK: push %predicted_block = alloca [4 x [4 x i32]], align 4 ; <[4 x [4 x i32]]*> [#uses=1] br label %cond_next489 diff --git a/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll b/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll index 4aa879dc4092..0fe3b39a622d 100644 --- a/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll +++ b/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll @@ -5,7 +5,7 @@ define void @foo(%0* noalias nocapture sret %agg.result, double %x.0, double %y.0) nounwind { ; CHECK: foo: -; CHECK: bl __adddf3 +; CHECK: bl __aeabi_dadd ; CHECK-NOT: strd ; CHECK: mov %x76 = fmul double %y.0, 0.000000e+00 ; <double> [#uses=1] diff --git a/test/CodeGen/ARM/2009-11-02-NegativeLane.ll b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll index 89c9037bd9f6..ca5ae8b62e8b 100644 --- a/test/CodeGen/ARM/2009-11-02-NegativeLane.ll +++ b/test/CodeGen/ARM/2009-11-02-NegativeLane.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=cortex-a8 < %s | grep vdup.16 +; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "armv7-eabi" @@ -7,6 +7,7 @@ entry: br i1 undef, label %return, label %bb bb: ; preds = %bb, %entry +; CHECK: vld1.16 {d16[], d17[]} %0 = load i16* undef, align 2 %1 = insertelement <8 x i16> undef, i16 %0, i32 2 %2 = insertelement <8 x i16> %1, i16 undef, i32 3 diff --git a/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll b/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll index 31525eff4461..d9e1a1486a3c 100644 --- a/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll +++ b/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s +; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=V4 ; RUN: llc < %s -mtriple=armv5-unknown-eabi | FileCheck %s ; RUN: llc < %s -mtriple=armv6-unknown-eabi | FileCheck %s @@ -7,6 +7,8 @@ entry: %0 = tail call i32 @foo(i32 %a) nounwind ; <i32> [#uses=1] %1 = add nsw i32 %0, 3 ; <i32> [#uses=1] ; CHECK: ldmia sp!, {r11, pc} +; V4: pop +; V4-NEXT: mov pc, lr ret i32 %1 } diff --git a/test/CodeGen/ARM/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/ARM/2010-04-07-DbgValueOtherTargets.ll index 8a24cfa39785..642268992062 100644 --- a/test/CodeGen/ARM/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/ARM/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=arm -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/ARM/2010-05-17-DAGCombineAssert.ll b/test/CodeGen/ARM/2010-05-17-DAGCombineAssert.ll deleted file mode 100644 index 2a4bbd1d8cc6..000000000000 --- a/test/CodeGen/ARM/2010-05-17-DAGCombineAssert.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 -; PR7158 - -define arm_aapcs_vfpcc i32 @main() nounwind { -bb.nph55.bb.nph55.split_crit_edge: - br label %bb3 - -bb3: ; preds = %bb3, %bb.nph55.bb.nph55.split_crit_edge - br i1 undef, label %bb.i19, label %bb3 - -bb.i19: ; preds = %bb.i19, %bb3 - %0 = insertelement <4 x float> undef, float undef, i32 3 ; <<4 x float>> [#uses=3] - %1 = fmul <4 x float> %0, %0 ; <<4 x float>> [#uses=1] - %2 = bitcast <4 x float> %1 to <2 x double> ; <<2 x double>> [#uses=0] - %3 = fmul <4 x float> %0, undef ; <<4 x float>> [#uses=0] - br label %bb.i19 -} diff --git a/test/CodeGen/ARM/2010-06-28-DAGCombineUndef.ll b/test/CodeGen/ARM/2010-06-28-DAGCombineUndef.ll deleted file mode 100644 index ad2810b5bb9a..000000000000 --- a/test/CodeGen/ARM/2010-06-28-DAGCombineUndef.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc < %s -march=arm -mattr=+neon - -define void @main() nounwind { -entry: - store <2 x i64> undef, <2 x i64>* undef, align 16 - %0 = load <16 x i8>* undef, align 16 ; <<16 x i8>> [#uses=1] - %1 = or <16 x i8> zeroinitializer, %0 ; <<16 x i8>> [#uses=1] - store <16 x i8> %1, <16 x i8>* undef, align 16 - ret void -} diff --git a/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll b/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll index ffc47ebdf196..b9d5600d2ad8 100644 --- a/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll +++ b/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll @@ -10,9 +10,9 @@ target triple = "thumbv7-apple-darwin10" ; %reg1028 gets allocated %Q0, and if %reg1030 is reloaded for the partial ; redef, it cannot also get %Q0. -; CHECK: vld1.64 {d0, d1}, [r{{.}}] -; CHECK-NOT: vld1.64 {d0, d1} -; CHECK: vmov.f64 d3, d0 +; CHECK: vld1.64 {d16, d17}, [r{{.}}] +; CHECK-NOT: vld1.64 {d16, d17} +; CHECK: vmov.f64 d19, d16 define i32 @test(i8* %arg) nounwind { entry: diff --git a/test/CodeGen/ARM/2010-09-21-OptCmpBug.ll b/test/CodeGen/ARM/2010-09-21-OptCmpBug.ll new file mode 100644 index 000000000000..d2820918626a --- /dev/null +++ b/test/CodeGen/ARM/2010-09-21-OptCmpBug.ll @@ -0,0 +1,84 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 + +declare noalias i8* @malloc(i32) nounwind + +define internal void @gl_DrawPixels(i32 %width, i32 %height, i32 %format, i32 %type, i8* %pixels) nounwind { +entry: + br i1 undef, label %bb3.i, label %bb3 + +bb3.i: ; preds = %entry + unreachable + +gl_error.exit: ; preds = %bb22 + ret void + +bb3: ; preds = %entry + br i1 false, label %bb5, label %bb4 + +bb4: ; preds = %bb3 + br label %bb5 + +bb5: ; preds = %bb4, %bb3 + br i1 undef, label %bb19, label %bb22 + +bb19: ; preds = %bb5 + switch i32 %type, label %bb3.i6.i [ + i32 5120, label %bb1.i13 + i32 5121, label %bb1.i13 + i32 6656, label %bb9.i.i6 + ] + +bb9.i.i6: ; preds = %bb19 + br label %bb1.i13 + +bb3.i6.i: ; preds = %bb19 + unreachable + +bb1.i13: ; preds = %bb9.i.i6, %bb19, %bb19 + br i1 undef, label %bb3.i17, label %bb2.i16 + +bb2.i16: ; preds = %bb1.i13 + unreachable + +bb3.i17: ; preds = %bb1.i13 + br i1 undef, label %bb4.i18, label %bb23.i + +bb4.i18: ; preds = %bb3.i17 + %0 = mul nsw i32 %height, %width + %1 = and i32 %0, 7 + %not..i = icmp ne i32 %1, 0 + %2 = zext i1 %not..i to i32 + %storemerge2.i = add i32 0, %2 + %3 = call noalias i8* @malloc(i32 %storemerge2.i) nounwind + br i1 undef, label %bb3.i9, label %bb9.i + +bb9.i: ; preds = %bb4.i18 + br i1 undef, label %bb13.i19, label %bb.i24.i + +bb13.i19: ; preds = %bb9.i + br i1 undef, label %bb14.i20, label %bb15.i + +bb14.i20: ; preds = %bb13.i19 + unreachable + +bb15.i: ; preds = %bb13.i19 + unreachable + +bb.i24.i: ; preds = %bb.i24.i, %bb9.i + %storemerge1.i21.i = phi i32 [ %4, %bb.i24.i ], [ 0, %bb9.i ] + %4 = add i32 %storemerge1.i21.i, 1 + %exitcond47.i = icmp eq i32 %4, %storemerge2.i + br i1 %exitcond47.i, label %bb22, label %bb.i24.i + +bb23.i: ; preds = %bb3.i17 + unreachable + +bb3.i9: ; preds = %bb4.i18 + unreachable + +bb22: ; preds = %bb.i24.i, %bb5 + br i1 undef, label %gl_error.exit, label %bb23 + +bb23: ; preds = %bb22 + ret void +} diff --git a/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll b/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll new file mode 100644 index 000000000000..bda14bcb1520 --- /dev/null +++ b/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s +; This tests that MC/asm header conversion is smooth +; +; CHECK: .syntax unified +; CHECK: .eabi_attribute 20, 1 +; CHECK: .eabi_attribute 21, 1 +; CHECK: .eabi_attribute 23, 3 +; CHECK: .eabi_attribute 24, 1 +; CHECK: .eabi_attribute 25, 1 + +define i32 @f(i64 %z) { + ret i32 0 +} diff --git a/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll b/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll new file mode 100644 index 000000000000..ee443febcc1e --- /dev/null +++ b/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll @@ -0,0 +1,37 @@ +; RUN: llc %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=BASIC %s +; RUN: llc %s -mtriple=armv7-linux-gnueabi -march=arm -mcpu=cortex-a8 \ +; RUN: -mattr=-neon -mattr=+vfp2 \ +; RUN: -arm-reserve-r9 -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=CORTEXA8 %s + + +; This tests that the extpected ARM attributes are emitted. +; +; BASIC: .ARM.attributes +; BASIC-NEXT: 0x70000003 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: 0x0000003c +; BASIC-NEXT: 0x00000020 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: 0x00000001 +; BASIC-NEXT: 0x00000000 +; BASIC-NEXT: '411f0000 00616561 62690001 15000000 06020801 09011401 15011703 18011901' + +; CORTEXA8: .ARM.attributes +; CORTEXA8-NEXT: 0x70000003 +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: 0x0000003c +; CORTEXA8-NEXT: 0x0000002f +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: 0x00000001 +; CORTEXA8-NEXT: 0x00000000 +; CORTEXA8-NEXT: '412e0000 00616561 62690001 24000000 05434f52 5445582d 41380006 0a074108 0109020a 02140115 01170318 011901' + +define i32 @f(i64 %z) { + ret i32 0 +} diff --git a/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll b/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll new file mode 100644 index 000000000000..163c9b030ec8 --- /dev/null +++ b/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll @@ -0,0 +1,31 @@ +; RUN: llc < %s -mtriple=armv6-apple-darwin -mcpu=arm1136jf-s | FileCheck %s +; Radar 8589805: Counting the number of microcoded operations, such as for an +; LDM instruction, was causing an assertion failure because the microop count +; was being treated as an instruction count. + +; CHECK: push +; CHECK: ldmia +; CHECK: ldmia +; CHECK: ldmia + +define i32 @test(i32 %x) { +entry: + %0 = tail call signext i16 undef(i32* undef) + switch i32 undef, label %bb3 [ + i32 0, label %bb4 + i32 1, label %bb1 + i32 2, label %bb2 + ] + +bb1: + ret i32 1 + +bb2: + ret i32 2 + +bb3: + ret i32 1 + +bb4: + ret i32 3 +} diff --git a/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll b/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll new file mode 100644 index 000000000000..04220949027f --- /dev/null +++ b/test/CodeGen/ARM/2010-11-15-SpillEarlyClobber.ll @@ -0,0 +1,85 @@ +; RUN: llc < %s -verify-machineinstrs -spiller=standard +; RUN: llc < %s -verify-machineinstrs -spiller=inline +; PR8612 +; +; This test has an inline asm with early-clobber arguments. +; It is big enough that one of the early clobber registers is spilled. +; +; All the spillers would get the live ranges wrong when spilling an early +; clobber, allowing the undef register to be allocated to the same register as +; the early clobber. +; +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32" +target triple = "armv7-eabi" + +%0 = type { i32, i32 } + +define void @foo(i32* %in) nounwind { +entry: + br label %bb.i + +bb.i: ; preds = %bb.i, %entry + br i1 undef, label %bb10.preheader.i, label %bb.i + +bb10.preheader.i: ; preds = %bb.i + br label %bb10.i + +bb10.i: ; preds = %bb10.i, %bb10.preheader.i + br i1 undef, label %bb27.i, label %bb10.i + +bb27.i: ; preds = %bb10.i + br label %bb28.i + +bb28.i: ; preds = %bb28.i, %bb27.i + br i1 undef, label %presymmetry.exit, label %bb28.i + +presymmetry.exit: ; preds = %bb28.i + %tmp175387 = or i32 undef, 12 + %scevgep101.i = getelementptr i32* %in, i32 undef + %tmp189401 = or i32 undef, 7 + %scevgep97.i = getelementptr i32* %in, i32 undef + %tmp198410 = or i32 undef, 1 + %scevgep.i48 = getelementptr i32* %in, i32 undef + %0 = load i32* %scevgep.i48, align 4 + %1 = add nsw i32 %0, 0 + store i32 %1, i32* undef, align 4 + %asmtmp.i.i33.i.i.i = tail call %0 asm "smull\09$0, $1, $2, $3", "=&r,=&r,%r,r,~{cc}"(i32 undef, i32 1518500250) nounwind + %asmresult1.i.i34.i.i.i = extractvalue %0 %asmtmp.i.i33.i.i.i, 1 + %2 = shl i32 %asmresult1.i.i34.i.i.i, 1 + %3 = load i32* null, align 4 + %4 = load i32* undef, align 4 + %5 = sub nsw i32 %3, %4 + %6 = load i32* undef, align 4 + %7 = load i32* null, align 4 + %8 = sub nsw i32 %6, %7 + %9 = load i32* %scevgep97.i, align 4 + %10 = load i32* undef, align 4 + %11 = sub nsw i32 %9, %10 + %12 = load i32* null, align 4 + %13 = load i32* %scevgep101.i, align 4 + %14 = sub nsw i32 %12, %13 + %15 = load i32* %scevgep.i48, align 4 + %16 = load i32* null, align 4 + %17 = add nsw i32 %16, %15 + %18 = sub nsw i32 %15, %16 + %19 = load i32* undef, align 4 + %20 = add nsw i32 %19, %2 + %21 = sub nsw i32 %19, %2 + %22 = add nsw i32 %14, %5 + %23 = sub nsw i32 %5, %14 + %24 = add nsw i32 %11, %8 + %25 = sub nsw i32 %8, %11 + %26 = add nsw i32 %21, %23 + store i32 %26, i32* %scevgep.i48, align 4 + %27 = sub nsw i32 %25, %18 + store i32 %27, i32* null, align 4 + %28 = sub nsw i32 %23, %21 + store i32 %28, i32* undef, align 4 + %29 = add nsw i32 %18, %25 + store i32 %29, i32* undef, align 4 + %30 = add nsw i32 %17, %22 + store i32 %30, i32* %scevgep101.i, align 4 + %31 = add nsw i32 %20, %24 + store i32 %31, i32* null, align 4 + unreachable +} diff --git a/test/CodeGen/ARM/2010-11-29-PrologueBug.ll b/test/CodeGen/ARM/2010-11-29-PrologueBug.ll new file mode 100644 index 000000000000..8d7541feae94 --- /dev/null +++ b/test/CodeGen/ARM/2010-11-29-PrologueBug.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB2 +; rdar://8690640 + +define i32* @t(i32* %x) nounwind { +entry: +; ARM: t: +; ARM: push +; ARM: mov r7, sp +; ARM: bl _foo +; ARM: bl _foo +; ARM: bl _foo +; ARM: ldmia sp!, {r7, pc} + +; THUMB2: t: +; THUMB2: push +; THUMB2: mov r7, sp +; THUMB2: blx _foo +; THUMB2: blx _foo +; THUMB2: blx _foo +; THUMB2: pop + %0 = tail call i32* @foo(i32* %x) nounwind + %1 = tail call i32* @foo(i32* %0) nounwind + %2 = tail call i32* @foo(i32* %1) nounwind + ret i32* %2 +} + +declare i32* @foo(i32*) diff --git a/test/CodeGen/ARM/2010-11-30-reloc-movt.ll b/test/CodeGen/ARM/2010-11-30-reloc-movt.ll new file mode 100644 index 000000000000..930cd8d41563 --- /dev/null +++ b/test/CodeGen/ARM/2010-11-30-reloc-movt.ll @@ -0,0 +1,42 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +target triple = "armv7-none-linux-gnueabi" + +@a = external global i8 + +define arm_aapcs_vfpcc i32 @barf() nounwind { +entry: + %0 = tail call arm_aapcs_vfpcc i32 @foo(i8* @a) nounwind + ret i32 %0 +; OBJ: '.text' +; OBJ-NEXT: 'sh_type' +; OBJ-NEXT: 'sh_flags' +; OBJ-NEXT: 'sh_addr' +; OBJ-NEXT: 'sh_offset' +; OBJ-NEXT: 'sh_size' +; OBJ-NEXT: 'sh_link' +; OBJ-NEXT: 'sh_info' +; OBJ-NEXT: 'sh_addralign' +; OBJ-NEXT: 'sh_entsize' +; OBJ-NEXT: '_section_data', '00482de9 000000e3 000040e3 feffffeb 0088bde8' + +; OBJ: Relocation 0x00000000 +; OBJ-NEXT: 'r_offset', 0x00000004 +; OBJ-NEXT: 'r_sym', 0x00000007 +; OBJ-NEXT: 'r_type', 0x0000002b + +; OBJ: Relocation 0x00000001 +; OBJ-NEXT: 'r_offset', 0x00000008 +; OBJ-NEXT: 'r_sym' +; OBJ-NEXT: 'r_type', 0x0000002c + +; OBJ: # Relocation 0x00000002 +; OBJ-NEXT: 'r_offset', 0x0000000c +; OBJ-NEXT: 'r_sym', 0x00000008 +; OBJ-NEXT: 'r_type', 0x0000001c + +} + +declare arm_aapcs_vfpcc i32 @foo(i8*) + diff --git a/test/CodeGen/ARM/2010-12-07-PEIBug.ll b/test/CodeGen/ARM/2010-12-07-PEIBug.ll new file mode 100644 index 000000000000..c65952be3c64 --- /dev/null +++ b/test/CodeGen/ARM/2010-12-07-PEIBug.ll @@ -0,0 +1,40 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 | FileCheck %s +; rdar://8728956 + +define hidden void @foo() nounwind ssp { +entry: +; CHECK: foo: +; CHECK: push {r7, lr} +; CHECK-NEXT: mov r7, sp +; CHECK-NEXT: vpush {d8} +; CHECK-NEXT: vpush {d10, d11} + %tmp40 = load <4 x i8>* undef + %tmp41 = extractelement <4 x i8> %tmp40, i32 2 + %conv42 = zext i8 %tmp41 to i32 + %conv43 = sitofp i32 %conv42 to float + %div44 = fdiv float %conv43, 2.560000e+02 + %vecinit45 = insertelement <4 x float> undef, float %div44, i32 2 + %vecinit46 = insertelement <4 x float> %vecinit45, float 1.000000e+00, i32 3 + store <4 x float> %vecinit46, <4 x float>* undef + br i1 undef, label %if.then105, label %if.else109 + +if.then105: ; preds = %entry + br label %if.end114 + +if.else109: ; preds = %entry + br label %if.end114 + +if.end114: ; preds = %if.else109, %if.then105 + %call185 = call float @bar() + %vecinit186 = insertelement <4 x float> undef, float %call185, i32 1 + %call189 = call float @bar() + %vecinit190 = insertelement <4 x float> %vecinit186, float %call189, i32 2 + %vecinit191 = insertelement <4 x float> %vecinit190, float 1.000000e+00, i32 3 + store <4 x float> %vecinit191, <4 x float>* undef +; CHECK: vpop {d10, d11} +; CHECK-NEXT: vpop {d8} +; CHECK-NEXT: pop {r7, pc} + ret void +} + +declare hidden float @bar() nounwind readnone ssp diff --git a/test/CodeGen/ARM/2010-12-08-tpsoft.ll b/test/CodeGen/ARM/2010-12-08-tpsoft.ll new file mode 100644 index 000000000000..b8ed8199d398 --- /dev/null +++ b/test/CodeGen/ARM/2010-12-08-tpsoft.ll @@ -0,0 +1,52 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -o - | \ +; RUN: FileCheck -check-prefix=ELFASM %s +; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=ELFOBJ %s + +;; Make sure that bl __aeabi_read_tp is materiazlied and fixed up correctly +;; in the obj case. + +@i = external thread_local global i32 +@a = external global i8 +@b = external global [10 x i8] + +define arm_aapcs_vfpcc i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + switch i32 %0, label %bb2 [ + i32 12, label %bb + i32 13, label %bb1 + ] + +bb: ; preds = %entry + %1 = tail call arm_aapcs_vfpcc i32 @foo(i8* @a) nounwind + ret i32 %1 +; ELFASM: bl __aeabi_read_tp + + +; ELFOBJ: '.text' +; ELFOBJ-NEXT: 'sh_type' +; ELFOBJ-NEXT: 'sh_flags' +; ELFOBJ-NEXT: 'sh_addr' +; ELFOBJ-NEXT: 'sh_offset' +; ELFOBJ-NEXT: 'sh_size' +; ELFOBJ-NEXT: 'sh_link' +; ELFOBJ-NEXT: 'sh_info' +; ELFOBJ-NEXT: 'sh_addralign' +; ELFOBJ-NEXT: 'sh_entsize' +;;; BL __aeabi_read_tp is ---+ +;;; V +; ELFOBJ-NEXT: 00482de9 3c009fe5 00109fe7 feffffeb + + +bb1: ; preds = %entry + %2 = tail call arm_aapcs_vfpcc i32 @bar(i32* bitcast ([10 x i8]* @b to i32*)) nounwind + ret i32 %2 + +bb2: ; preds = %entry + ret i32 -1 +} + +declare arm_aapcs_vfpcc i32 @foo(i8*) + +declare arm_aapcs_vfpcc i32 @bar(i32*) diff --git a/test/CodeGen/ARM/2010-12-13-reloc-pic.ll b/test/CodeGen/ARM/2010-12-13-reloc-pic.ll new file mode 100644 index 000000000000..d5aefbee197c --- /dev/null +++ b/test/CodeGen/ARM/2010-12-13-reloc-pic.ll @@ -0,0 +1,100 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -relocation-model=pic -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=PIC01 %s + +;; FIXME: Reduce this test further, or even better, +;; redo as .s -> .o test once ARM AsmParser is working better + +; ModuleID = 'large2.pnacl.bc' +target triple = "armv7-none-linux-gnueabi" + +%struct._Bigint = type { %struct._Bigint*, i32, i32, i32, i32, [1 x i32] } +%struct.__FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, %struct._reent*, i8*, i32 (%struct._reent*, i8*, i8*, i32)*, i32 (%struct._reent*, i8*, i8*, i32)*, i32 (%struct._reent*, i8*, i32, i32)*, i32 (%struct._reent*, i8*)*, %struct.__sbuf, i8*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i32, %struct._flock_t, %struct._mbstate_t, i32 } +%struct.__sbuf = type { i8*, i32 } +%struct.__tm = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 } +%struct._atexit = type { %struct._atexit*, i32, [32 x void ()*], %struct._on_exit_args* } +%struct._flock_t = type { i32, i32, i32, i32, i32 } +%struct._glue = type { %struct._glue*, i32, %struct.__FILE* } +%struct._mbstate_t = type { i32, %union.anon } +%struct._misc_reent = type { i8*, %struct._mbstate_t, %struct._mbstate_t, %struct._mbstate_t, [8 x i8], i32, %struct._mbstate_t, %struct._mbstate_t, %struct._mbstate_t, %struct._mbstate_t, %struct._mbstate_t } +%struct._mprec = type { %struct._Bigint*, i32, %struct._Bigint*, %struct._Bigint** } +%struct._on_exit_args = type { [32 x i8*], [32 x i8*], i32, i32 } +%struct._rand48 = type { [3 x i16], [3 x i16], i16, i64 } +%struct._reent = type { %struct.__FILE*, %struct.__FILE*, %struct.__FILE*, i32, i32, i8*, i32, i32, i8*, %struct._mprec*, void (%struct._reent*)*, i32, i32, i8*, %struct._rand48*, %struct.__tm*, i8*, void (i32)**, %struct._atexit*, %struct._atexit, %struct._glue, %struct.__FILE*, %struct._misc_reent*, i8* } +%union.anon = type { i32 } + +@buf = constant [2 x i8] c"x\00", align 4 +@_impure_ptr = external thread_local global %struct._reent* +@.str = private constant [22 x i8] c"This should fault...\0A\00", align 4 +@.str1 = private constant [40 x i8] c"We're still running. This is not good.\0A\00", align 4 + +define i32 @main() nounwind { +entry: + %0 = load %struct._reent** @_impure_ptr, align 4 + %1 = getelementptr inbounds %struct._reent* %0, i32 0, i32 1 + %2 = load %struct.__FILE** %1, align 4 + %3 = bitcast %struct.__FILE* %2 to i8* + %4 = tail call i32 @fwrite(i8* getelementptr inbounds ([22 x i8]* @.str, i32 0, i32 0), i32 1, i32 21, i8* %3) nounwind + %5 = load %struct._reent** @_impure_ptr, align 4 + %6 = getelementptr inbounds %struct._reent* %5, i32 0, i32 1 + %7 = load %struct.__FILE** %6, align 4 + %8 = tail call i32 @fflush(%struct.__FILE* %7) nounwind + store i8 121, i8* getelementptr inbounds ([2 x i8]* @buf, i32 0, i32 0), align 4 + %9 = load %struct._reent** @_impure_ptr, align 4 + %10 = getelementptr inbounds %struct._reent* %9, i32 0, i32 1 + %11 = load %struct.__FILE** %10, align 4 + %12 = bitcast %struct.__FILE* %11 to i8* + %13 = tail call i32 @fwrite(i8* getelementptr inbounds ([40 x i8]* @.str1, i32 0, i32 0), i32 1, i32 39, i8* %12) nounwind + ret i32 1 +} + + +; PIC01: Relocation 0x00000000 +; PIC01-NEXT: 'r_offset', 0x0000001c +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001b + + +; PIC01: Relocation 0x00000001 +; PIC01-NEXT: 'r_offset', 0x00000038 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001b + +; PIC01: Relocation 0x00000002 +; PIC01-NEXT: 'r_offset', 0x00000044 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001b + +; PIC01: Relocation 0x00000003 +; PIC01-NEXT: 'r_offset', 0x00000070 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001b + +; PIC01: Relocation 0x00000004 +; PIC01-NEXT: 'r_offset', 0x0000007c +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x00000019 + + +; PIC01: Relocation 0x00000005 +; PIC01-NEXT: 'r_offset', 0x00000080 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x00000018 + +; PIC01: Relocation 0x00000006 +; PIC01-NEXT: 'r_offset', 0x00000084 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x00000068 + +; PIC01: Relocation 0x00000007 +; PIC01-NEXT: 'r_offset', 0x00000088 +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x0000001a + +; PIC01: Relocation 0x00000008 +; PIC01-NEXT: 'r_offset', 0x0000008c +; PIC01-NEXT: 'r_sym' +; PIC01-NEXT: 'r_type', 0x00000018 + +declare i32 @fwrite(i8* nocapture, i32, i32, i8* nocapture) nounwind + +declare i32 @fflush(%struct.__FILE* nocapture) nounwind diff --git a/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll b/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll new file mode 100644 index 000000000000..eaa34e7960fb --- /dev/null +++ b/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll @@ -0,0 +1,35 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +; RUN: llc %s -mtriple=armv7-linux-gnueabi -o - | \ +; RUN: FileCheck -check-prefix=ASM %s + + +@dummy = internal global i32 666 +@array00 = internal global [20 x i32] zeroinitializer +@sum = internal global i32 55 +@STRIDE = internal global i32 8 + +; ASM: .type array00,%object @ @array00 +; ASM-NEXT: .lcomm array00,80 @ @array00 +; ASM-NEXT: .type _MergedGlobals,%object @ @_MergedGlobals + + + +; OBJ: Section 0x00000003 +; OBJ-NEXT: '.bss' + +; OBJ: 'array00' +; OBJ-NEXT: 'st_value', 0x00000000 +; OBJ-NEXT: 'st_size', 0x00000050 +; OBJ-NEXT: 'st_bind', 0x00000000 +; OBJ-NEXT: 'st_type', 0x00000001 +; OBJ-NEXT: 'st_other', 0x00000000 +; OBJ-NEXT: 'st_shndx', 0x00000003 + +define i32 @main(i32 %argc) nounwind { + %1 = load i32* @sum, align 4 + %2 = getelementptr [20 x i32]* @array00, i32 0, i32 %argc + %3 = load i32* %2, align 4 + %4 = add i32 %1, %3 + ret i32 %4; +} diff --git a/test/CodeGen/ARM/2010-12-17-LocalStackSlotCrash.ll b/test/CodeGen/ARM/2010-12-17-LocalStackSlotCrash.ll new file mode 100644 index 000000000000..a2f50b587b22 --- /dev/null +++ b/test/CodeGen/ARM/2010-12-17-LocalStackSlotCrash.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -mtriple=armv6-apple-darwin10 +; <rdar://problem/8782198> +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:64-n32" +target triple = "armv6-apple-darwin10" + +define void @func() nounwind optsize { +entry: + %buf = alloca [8096 x i8], align 1 + br label %bb + +bb: + %p.2 = getelementptr [8096 x i8]* %buf, i32 0, i32 0 + store i8 undef, i8* %p.2, align 1 + ret void +} diff --git a/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll new file mode 100644 index 000000000000..99baad2d38d1 --- /dev/null +++ b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll @@ -0,0 +1,127 @@ +; RUN: llc < %s | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32" +target triple = "thumbv7-apple-darwin10" + +@x1 = internal global i8 1 +@x2 = internal global i8 1 +@x3 = internal global i8 1 +@x4 = internal global i8 1 +@x5 = global i8 1 + +; Check debug info output for merged global. +; DW_AT_location +; DW_OP_addr +; DW_OP_plus +; .long __MergedGlobals +; DW_OP_constu +; offset + +;CHECK: .byte 7 @ Abbrev [7] 0x1a5:0x13 DW_TAG_variable +;CHECK-NEXT: .ascii "x2" @ DW_AT_name +;CHECK-NEXT: .byte 0 +;CHECK-NEXT: .long 93 @ DW_AT_type +;CHECK-NEXT: .byte 1 @ DW_AT_decl_file +;CHECK-NEXT: .byte 6 @ DW_AT_decl_line +;CHECK-NEXT: .byte 8 @ DW_AT_location +;CHECK-NEXT: .byte 3 +;CHECK-NEXT: .long __MergedGlobals +;CHECK-NEXT: .byte 16 +;CHECK-NEXT: .byte 1 +;CHECK-NEXT: .byte 34 + +define zeroext i8 @get1(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10), !dbg !30 + %0 = load i8* @x1, align 4, !dbg !30 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11), !dbg !30 + store i8 %a, i8* @x1, align 4, !dbg !30 + ret i8 %0, !dbg !31 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +define zeroext i8 @get2(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18), !dbg !32 + %0 = load i8* @x2, align 4, !dbg !32 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19), !dbg !32 + store i8 %a, i8* @x2, align 4, !dbg !32 + ret i8 %0, !dbg !33 +} + +define zeroext i8 @get3(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21), !dbg !34 + %0 = load i8* @x3, align 4, !dbg !34 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22), !dbg !34 + store i8 %a, i8* @x3, align 4, !dbg !34 + ret i8 %0, !dbg !35 +} + +define zeroext i8 @get4(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24), !dbg !36 + %0 = load i8* @x4, align 4, !dbg !36 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25), !dbg !36 + store i8 %a, i8* @x4, align 4, !dbg !36 + ret i8 %0, !dbg !37 +} + +define zeroext i8 @get5(i8 zeroext %a) nounwind optsize { +entry: + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !27), !dbg !38 + %0 = load i8* @x5, align 4, !dbg !38 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !28), !dbg !38 + store i8 %a, i8* @x5, align 4, !dbg !38 + ret i8 %0, !dbg !39 +} + +!llvm.dbg.sp = !{!0, !6, !7, !8, !9} +!llvm.dbg.lv.get1 = !{!10, !11} +!llvm.dbg.gv = !{!13, !14, !15, !16, !17} +!llvm.dbg.lv.get2 = !{!18, !19} +!llvm.dbg.lv.get3 = !{!21, !22} +!llvm.dbg.lv.get4 = !{!24, !25} +!llvm.dbg.lv.get5 = !{!27, !28} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get1", metadata !"get1", metadata !"get1", metadata !1, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get1} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"foo.c", metadata !"/tmp/", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 1, metadata !"foo.c", metadata !"/tmp/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build 2369.8)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5, metadata !5} +!5 = metadata !{i32 589860, metadata !1, metadata !"_Bool", metadata !1, i32 0, i64 8, i64 8, i64 0, i32 0, i32 2} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get2", metadata !"get2", metadata !"get2", metadata !1, i32 7, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get2} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get3", metadata !"get3", metadata !"get3", metadata !1, i32 10, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get3} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get4", metadata !"get4", metadata !"get4", metadata !1, i32 13, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get4} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 589870, i32 0, metadata !1, metadata !"get5", metadata !"get5", metadata !"get5", metadata !1, i32 16, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get5} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 590081, metadata !0, metadata !"a", metadata !1, i32 4, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!11 = metadata !{i32 590080, metadata !12, metadata !"b", metadata !1, i32 4, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!12 = metadata !{i32 589835, metadata !0, i32 4, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!13 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x1", metadata !"x1", metadata !"", metadata !1, i32 3, metadata !5, i1 true, i1 true, i8* @x1} ; [ DW_TAG_variable ] +!14 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x2", metadata !"x2", metadata !"", metadata !1, i32 6, metadata !5, i1 true, i1 true, i8* @x2} ; [ DW_TAG_variable ] +!15 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x3", metadata !"x3", metadata !"", metadata !1, i32 9, metadata !5, i1 true, i1 true, i8* @x3} ; [ DW_TAG_variable ] +!16 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x4", metadata !"x4", metadata !"", metadata !1, i32 12, metadata !5, i1 true, i1 true, i8* @x4} ; [ DW_TAG_variable ] +!17 = metadata !{i32 589876, i32 0, metadata !1, metadata !"x5", metadata !"x5", metadata !"", metadata !1, i32 15, metadata !5, i1 false, i1 true, i8* @x5} ; [ DW_TAG_variable ] +!18 = metadata !{i32 590081, metadata !6, metadata !"a", metadata !1, i32 7, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!19 = metadata !{i32 590080, metadata !20, metadata !"b", metadata !1, i32 7, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!20 = metadata !{i32 589835, metadata !6, i32 7, i32 0, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!21 = metadata !{i32 590081, metadata !7, metadata !"a", metadata !1, i32 10, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!22 = metadata !{i32 590080, metadata !23, metadata !"b", metadata !1, i32 10, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!23 = metadata !{i32 589835, metadata !7, i32 10, i32 0, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] +!24 = metadata !{i32 590081, metadata !8, metadata !"a", metadata !1, i32 13, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!25 = metadata !{i32 590080, metadata !26, metadata !"b", metadata !1, i32 13, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!26 = metadata !{i32 589835, metadata !8, i32 13, i32 0, metadata !1, i32 3} ; [ DW_TAG_lexical_block ] +!27 = metadata !{i32 590081, metadata !9, metadata !"a", metadata !1, i32 16, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!28 = metadata !{i32 590080, metadata !29, metadata !"b", metadata !1, i32 16, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!29 = metadata !{i32 589835, metadata !9, i32 16, i32 0, metadata !1, i32 4} ; [ DW_TAG_lexical_block ] +!30 = metadata !{i32 4, i32 0, metadata !0, null} +!31 = metadata !{i32 4, i32 0, metadata !12, null} +!32 = metadata !{i32 7, i32 0, metadata !6, null} +!33 = metadata !{i32 7, i32 0, metadata !20, null} +!34 = metadata !{i32 10, i32 0, metadata !7, null} +!35 = metadata !{i32 10, i32 0, metadata !23, null} +!36 = metadata !{i32 13, i32 0, metadata !8, null} +!37 = metadata !{i32 13, i32 0, metadata !26, null} +!38 = metadata !{i32 16, i32 0, metadata !9, null} +!39 = metadata !{i32 16, i32 0, metadata !29, null} diff --git a/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll b/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll new file mode 100644 index 000000000000..85a113755bf4 --- /dev/null +++ b/test/CodeGen/ARM/2011-02-04-AntidepMultidef.ll @@ -0,0 +1,128 @@ +; RUN: llc < %s -asm-verbose=false -O3 -mtriple=armv6-apple-darwin -relocation-model=pic -mcpu=arm1136jf-s | FileCheck %s +; rdar://8959122 illegal register operands for UMULL instruction +; in cfrac nightly test. +; Armv6 generates a umull that must write to two distinct destination regs. + +; ModuleID = 'bugpoint-reduced-simplified.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:64-n32" +target triple = "armv6-apple-darwin10" + +define void @ptoa() nounwind { +entry: + br i1 false, label %bb3, label %bb + +bb: ; preds = %entry + br label %bb3 + +bb3: ; preds = %bb, %entry + %0 = call noalias i8* @malloc() nounwind + br i1 undef, label %bb46, label %bb8 + +bb8: ; preds = %bb3 + %1 = getelementptr inbounds i8* %0, i32 0 + store i8 0, i8* %1, align 1 + %2 = call i32 @ptou() nounwind + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %3 = udiv i32 %2, 10 + %4 = urem i32 %3, 10 + %5 = icmp ult i32 %4, 10 + %6 = trunc i32 %4 to i8 + %7 = or i8 %6, 48 + %8 = add i8 %6, 87 + %iftmp.5.0.1 = select i1 %5, i8 %7, i8 %8 + store i8 %iftmp.5.0.1, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %9 = udiv i32 %2, 100 + %10 = urem i32 %9, 10 + %11 = icmp ult i32 %10, 10 + %12 = trunc i32 %10 to i8 + %13 = or i8 %12, 48 + %14 = add i8 %12, 87 + %iftmp.5.0.2 = select i1 %11, i8 %13, i8 %14 + store i8 %iftmp.5.0.2, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %15 = udiv i32 %2, 10000 + %16 = urem i32 %15, 10 + %17 = icmp ult i32 %16, 10 + %18 = trunc i32 %16 to i8 + %19 = or i8 %18, 48 + %20 = add i8 %18, 87 + %iftmp.5.0.4 = select i1 %17, i8 %19, i8 %20 + store i8 %iftmp.5.0.4, i8* null, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %21 = udiv i32 %2, 100000 + %22 = urem i32 %21, 10 + %23 = icmp ult i32 %22, 10 + %iftmp.5.0.5 = select i1 %23, i8 0, i8 undef + store i8 %iftmp.5.0.5, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %24 = udiv i32 %2, 1000000 + %25 = urem i32 %24, 10 + %26 = icmp ult i32 %25, 10 + %27 = trunc i32 %25 to i8 + %28 = or i8 %27, 48 + %29 = add i8 %27, 87 + %iftmp.5.0.6 = select i1 %26, i8 %28, i8 %29 + store i8 %iftmp.5.0.6, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %30 = udiv i32 %2, 10000000 + %31 = urem i32 %30, 10 + %32 = icmp ult i32 %31, 10 + %33 = trunc i32 %31 to i8 + %34 = or i8 %33, 48 + %35 = add i8 %33, 87 + %iftmp.5.0.7 = select i1 %32, i8 %34, i8 %35 + store i8 %iftmp.5.0.7, i8* undef, align 1 + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + ; CHECK: umull [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}} + %36 = udiv i32 %2, 100000000 + %37 = urem i32 %36, 10 + %38 = icmp ult i32 %37, 10 + %39 = trunc i32 %37 to i8 + %40 = or i8 %39, 48 + %41 = add i8 %39, 87 + %iftmp.5.0.8 = select i1 %38, i8 %40, i8 %41 + store i8 %iftmp.5.0.8, i8* null, align 1 + unreachable + +bb46: ; preds = %bb3 + ret void +} + +declare noalias i8* @malloc() nounwind + +declare i32 @ptou() diff --git a/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll b/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll new file mode 100644 index 000000000000..f3d788818afc --- /dev/null +++ b/test/CodeGen/ARM/2011-02-07-AntidepClobber.ll @@ -0,0 +1,89 @@ +; RUN: llc < %s -asm-verbose=false -O3 -mtriple=armv5e-none-linux-gnueabi | FileCheck %s +; PR8986: PostRA antidependence breaker must respect "earlyclobber". +; armv5e generates mulv5 that cannot used the same reg for src/dest. + +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32" +target triple = "armv5e-none-linux-gnueabi" + +define hidden fastcc void @storeAtts() nounwind { +entry: + %.SV116 = alloca i8** + br i1 undef, label %meshBB520, label %meshBB464 + +bb15: ; preds = %meshBB424 + br i1 undef, label %bb216, label %meshBB396 + +bb22: ; preds = %meshBB396 + br label %cBB564 + +cBB564: ; preds = %cBB564, %bb22 + br label %cBB564 + +poolStoreString.exit.thread: ; preds = %meshBB424 + ret void + +bb78: ; preds = %meshBB412 + unreachable + +bb129: ; preds = %meshBB540 + br i1 undef, label %bb131.loopexit, label %meshBB540 + +bb131.loopexit: ; preds = %bb129 + br label %bb131 + +bb131: ; preds = %bb135, %bb131.loopexit + br i1 undef, label %bb134, label %meshBB396 + +bb134: ; preds = %bb131 + unreachable + +bb135: ; preds = %meshBB396 + %uriHash.1.phi.load = load i32* undef + %.load120 = load i8*** %.SV116 + %.phi24 = load i8* null + %.phi26 = load i8** null + store i8 %.phi24, i8* %.phi26, align 1 + %0 = getelementptr inbounds i8* %.phi26, i32 1 + store i8* %0, i8** %.load120, align 4 + ; CHECK: mul [[REGISTER:lr|r[0-9]+]], + ; CHECK-NOT: [[REGISTER]], + ; CHECK: {{(lr|r[0-9]+)$}} + %1 = mul i32 %uriHash.1.phi.load, 1000003 + %2 = xor i32 0, %1 + store i32 %2, i32* null + %3 = load i8* null, align 1 + %4 = icmp eq i8 %3, 0 + store i8* %0, i8** undef + br i1 %4, label %meshBB472, label %bb131 + +bb212: ; preds = %meshBB540 + unreachable + +bb216: ; preds = %bb15 + ret void + +meshBB396: ; preds = %bb131, %bb15 + br i1 undef, label %bb135, label %bb22 + +meshBB412: ; preds = %meshBB464 + br i1 undef, label %meshBB504, label %bb78 + +meshBB424: ; preds = %meshBB464 + br i1 undef, label %poolStoreString.exit.thread, label %bb15 + +meshBB464: ; preds = %entry + br i1 undef, label %meshBB424, label %meshBB412 + +meshBB472: ; preds = %meshBB504, %bb135 + unreachable + +meshBB504: ; preds = %meshBB412 + br label %meshBB472 + +meshBB520: ; preds = %entry + br label %meshBB540 + +meshBB540: ; preds = %meshBB520, %bb129 + br i1 undef, label %bb212, label %bb129 +} diff --git a/test/CodeGen/ARM/align.ll b/test/CodeGen/ARM/align.ll index d4d01288f29b..d57c159b85cb 100644 --- a/test/CodeGen/ARM/align.ll +++ b/test/CodeGen/ARM/align.ll @@ -22,7 +22,7 @@ @e = global i64 4 ;ELF: .align 3 ;ELF: e -;DARWIN: .align 2 +;DARWIN: .align 3 ;DARWIN: _e: @f = global float 5.0 @@ -34,7 +34,7 @@ @g = global double 6.0 ;ELF: .align 3 ;ELF: g: -;DARWIN: .align 2 +;DARWIN: .align 3 ;DARWIN: _g: @bar = common global [75 x i8] zeroinitializer, align 128 diff --git a/test/CodeGen/ARM/arguments.ll b/test/CodeGen/ARM/arguments.ll index bb7853e66ef4..c7fcb9755d9e 100644 --- a/test/CodeGen/ARM/arguments.ll +++ b/test/CodeGen/ARM/arguments.ll @@ -13,8 +13,8 @@ define i32 @f1(i32 %a, i64 %b) { ; test that allocating the double to r2/r3 makes r1 unavailable on gnueabi. define i32 @f2() nounwind optsize { ; ELF: f2: -; ELF: mov r0, #128 -; ELF: str r0, [sp] +; ELF: mov [[REGISTER:(r[0-9]+)]], #128 +; ELF: str [[REGISTER]], [sp] ; DARWIN: f2: ; DARWIN: mov r3, #128 entry: diff --git a/test/CodeGen/ARM/arm-and-tst-peephole.ll b/test/CodeGen/ARM/arm-and-tst-peephole.ll new file mode 100644 index 000000000000..50c638b73931 --- /dev/null +++ b/test/CodeGen/ARM/arm-and-tst-peephole.ll @@ -0,0 +1,112 @@ +; RUN: llc < %s -march=arm | FileCheck -check-prefix=ARM %s +; RUN: llc < %s -march=thumb | FileCheck -check-prefix=THUMB %s +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck -check-prefix=T2 %s + +; FIXME: The -march=thumb test doesn't change if -disable-peephole is specified. + +%struct.Foo = type { i8* } + +; ARM: foo +; THUMB: foo +; T2: foo +define %struct.Foo* @foo(%struct.Foo* %this, i32 %acc) nounwind readonly align 2 { +entry: + %scevgep = getelementptr %struct.Foo* %this, i32 1 + br label %tailrecurse + +tailrecurse: ; preds = %sw.bb, %entry + %lsr.iv2 = phi %struct.Foo* [ %scevgep3, %sw.bb ], [ %scevgep, %entry ] + %lsr.iv = phi i32 [ %lsr.iv.next, %sw.bb ], [ 1, %entry ] + %acc.tr = phi i32 [ %or, %sw.bb ], [ %acc, %entry ] + %lsr.iv24 = bitcast %struct.Foo* %lsr.iv2 to i8** + %scevgep5 = getelementptr i8** %lsr.iv24, i32 -1 + %tmp2 = load i8** %scevgep5 + %0 = ptrtoint i8* %tmp2 to i32 + +; ARM: ands r12, r12, #3 +; ARM-NEXT: beq + +; THUMB: movs r5, #3 +; THUMB-NEXT: ands r5, r4 +; THUMB-NEXT: cmp r5, #0 +; THUMB-NEXT: beq + +; T2: ands r12, r12, #3 +; T2-NEXT: beq + + %and = and i32 %0, 3 + %tst = icmp eq i32 %and, 0 + br i1 %tst, label %sw.bb, label %tailrecurse.switch + +tailrecurse.switch: ; preds = %tailrecurse + switch i32 %and, label %sw.epilog [ + i32 1, label %sw.bb + i32 3, label %sw.bb6 + i32 2, label %sw.bb8 + ] + +sw.bb: ; preds = %tailrecurse.switch, %tailrecurse + %shl = shl i32 %acc.tr, 1 + %or = or i32 %and, %shl + %lsr.iv.next = add i32 %lsr.iv, 1 + %scevgep3 = getelementptr %struct.Foo* %lsr.iv2, i32 1 + br label %tailrecurse + +sw.bb6: ; preds = %tailrecurse.switch + ret %struct.Foo* %lsr.iv2 + +sw.bb8: ; preds = %tailrecurse.switch + %tmp1 = add i32 %acc.tr, %lsr.iv + %add.ptr11 = getelementptr inbounds %struct.Foo* %this, i32 %tmp1 + ret %struct.Foo* %add.ptr11 + +sw.epilog: ; preds = %tailrecurse.switch + ret %struct.Foo* undef +} + +; Another test that exercises the AND/TST peephole optimization and also +; generates a predicated ANDS instruction. Check that the predicate is printed +; after the "S" modifier on the instruction. + +%struct.S = type { i8* (i8*)*, [1 x i8] } + +; ARM: bar +; THUMB: bar +; T2: bar +define internal zeroext i8 @bar(%struct.S* %x, %struct.S* nocapture %y) nounwind readonly { +entry: + %0 = getelementptr inbounds %struct.S* %x, i32 0, i32 1, i32 0 + %1 = load i8* %0, align 1 + %2 = zext i8 %1 to i32 +; ARM: ands +; THUMB: ands +; T2: ands + %3 = and i32 %2, 112 + %4 = icmp eq i32 %3, 0 + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + %5 = getelementptr inbounds %struct.S* %y, i32 0, i32 1, i32 0 + %6 = load i8* %5, align 1 + %7 = zext i8 %6 to i32 +; ARM: andsne +; THUMB: ands +; T2: andsne + %8 = and i32 %7, 112 + %9 = icmp eq i32 %8, 0 + br i1 %9, label %return, label %bb2 + +bb2: ; preds = %bb + %10 = icmp eq i32 %3, 16 + %11 = icmp eq i32 %8, 16 + %or.cond = or i1 %10, %11 + br i1 %or.cond, label %bb4, label %return + +bb4: ; preds = %bb2 + %12 = ptrtoint %struct.S* %x to i32 + %phitmp = trunc i32 %12 to i8 + ret i8 %phitmp + +return: ; preds = %bb2, %bb, %entry + ret i8 1 +} diff --git a/test/CodeGen/ARM/atomic-cmp.ll b/test/CodeGen/ARM/atomic-cmp.ll new file mode 100644 index 000000000000..f31aa7bc58e3 --- /dev/null +++ b/test/CodeGen/ARM/atomic-cmp.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=T2 +; rdar://8964854 + +define i8 @t(i8* %a, i8 %b, i8 %c) nounwind { +; ARM: t: +; ARM: ldrexb +; ARM: strexb + +; T2: t: +; T2: ldrexb +; T2: strexb + %tmp0 = tail call i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* %a, i8 %b, i8 %c) + ret i8 %tmp0 +} + +declare i8 @llvm.atomic.cmp.swap.i8.p0i8(i8* nocapture, i8, i8) nounwind diff --git a/test/CodeGen/ARM/bfi.ll b/test/CodeGen/ARM/bfi.ll index 59e2b43a9172..946db1909fe5 100644 --- a/test/CodeGen/ARM/bfi.ll +++ b/test/CodeGen/ARM/bfi.ll @@ -16,10 +16,10 @@ entry: ret void } -define i32 @f2(i32 %A, i32 %B) nounwind readnone optsize { +define i32 @f2(i32 %A, i32 %B) nounwind { entry: ; CHECK: f2 -; CHECK: mov r1, r1, lsr #7 +; CHECK: lsr{{.*}}#7 ; CHECK: bfi r0, r1, #7, #16 %and = and i32 %A, -8388481 ; <i32> [#uses=1] %and2 = and i32 %B, 8388480 ; <i32> [#uses=1] @@ -27,10 +27,10 @@ entry: ret i32 %or } -define i32 @f3(i32 %A, i32 %B) nounwind readnone optsize { +define i32 @f3(i32 %A, i32 %B) nounwind { entry: ; CHECK: f3 -; CHECK: mov r2, r0, lsr #7 +; CHECK: lsr{{.*}} #7 ; CHECK: mov r0, r1 ; CHECK: bfi r0, r2, #7, #16 %and = and i32 %A, 8388480 ; <i32> [#uses=1] @@ -38,3 +38,27 @@ entry: %or = or i32 %and2, %and ; <i32> [#uses=1] ret i32 %or } + +; rdar://8752056 +define i32 @f4(i32 %a) nounwind { +; CHECK: f4 +; CHECK: movw r1, #3137 +; CHECK: bfi r1, r0, #15, #5 + %1 = shl i32 %a, 15 + %ins7 = and i32 %1, 1015808 + %ins12 = or i32 %ins7, 3137 + ret i32 %ins12 +} + +; rdar://8458663 +define i32 @f5(i32 %a, i32 %b) nounwind { +entry: +; CHECK: f5: +; CHECK-NOT: bfc +; CHECK: bfi r0, r1, #20, #4 + %0 = and i32 %a, -15728641 + %1 = shl i32 %b, 20 + %2 = and i32 %1, 15728640 + %3 = or i32 %2, %0 + ret i32 %3 +} diff --git a/test/CodeGen/ARM/bits.ll b/test/CodeGen/ARM/bits.ll index 9e94efe3f9db..ce1b2ad5fad3 100644 --- a/test/CodeGen/ARM/bits.ll +++ b/test/CodeGen/ARM/bits.ll @@ -1,36 +1,41 @@ -; RUN: llc < %s -march=arm > %t -; RUN: grep and %t | count 1 -; RUN: grep orr %t | count 1 -; RUN: grep eor %t | count 1 -; RUN: grep mov.*lsl %t | count 1 -; RUN: grep mov.*asr %t | count 1 +; RUN: llc < %s -march=arm | FileCheck %s define i32 @f1(i32 %a, i32 %b) { entry: +; CHECK: f1 +; CHECK: and r0, r1, r0 %tmp2 = and i32 %b, %a ; <i32> [#uses=1] ret i32 %tmp2 } define i32 @f2(i32 %a, i32 %b) { entry: +; CHECK: f2 +; CHECK: orr r0, r1, r0 %tmp2 = or i32 %b, %a ; <i32> [#uses=1] ret i32 %tmp2 } define i32 @f3(i32 %a, i32 %b) { entry: +; CHECK: f3 +; CHECK: eor r0, r1, r0 %tmp2 = xor i32 %b, %a ; <i32> [#uses=1] ret i32 %tmp2 } define i32 @f4(i32 %a, i32 %b) { entry: +; CHECK: f4 +; CHECK: lsl %tmp3 = shl i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp3 } define i32 @f5(i32 %a, i32 %b) { entry: +; CHECK: f5 +; CHECK: asr %tmp3 = ashr i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp3 } diff --git a/test/CodeGen/ARM/bswap-inline-asm.ll b/test/CodeGen/ARM/bswap-inline-asm.ll new file mode 100644 index 000000000000..472213d5f85f --- /dev/null +++ b/test/CodeGen/ARM/bswap-inline-asm.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 | FileCheck %s + +define i32 @t1(i32 %x) nounwind { +; CHECK: t1: +; CHECK-NOT: InlineAsm +; CHECK: rev + %asmtmp = tail call i32 asm "rev $0, $1\0A", "=l,l"(i32 %x) nounwind + ret i32 %asmtmp +} diff --git a/test/CodeGen/ARM/bx_fold.ll b/test/CodeGen/ARM/bx_fold.ll index 0e3e070a818f..09f1aae0a9f0 100644 --- a/test/CodeGen/ARM/bx_fold.ll +++ b/test/CodeGen/ARM/bx_fold.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -march=arm -; RUN: llc < %s -march=arm | not grep bx +; RUN: llc < %s -mtriple=armv5t-apple-darwin | FileCheck %s define void @test(i32 %Ptr, i8* %L) { entry: @@ -24,6 +23,8 @@ bb1: ; preds = %bb, %entry br i1 %bothcond, label %bb, label %bb18 bb18: ; preds = %bb1 +; CHECK-NOT: bx +; CHECK: ldmia sp! ret void } diff --git a/test/CodeGen/ARM/call-tc.ll b/test/CodeGen/ARM/call-tc.ll index db5afe3f56cb..a77aba037be5 100644 --- a/test/CodeGen/ARM/call-tc.ll +++ b/test/CodeGen/ARM/call-tc.ll @@ -1,8 +1,6 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin -march=arm | FileCheck %s -check-prefix=CHECKV4 -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5 -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\ -; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF -; XFAIL: * +; RUN: llc < %s -mtriple=armv6-apple-darwin -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKV6 +; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2 @t = weak global i32 ()* null ; <i32 ()**> [#uses=1] @@ -10,40 +8,80 @@ declare void @g(i32, i32, i32, i32) define void @t1() { ; CHECKELF: t1: -; CHECKELF: PLT +; CHECKELF: bl g(PLT) call void @g( i32 1, i32 2, i32 3, i32 4 ) ret void } define void @t2() { -; CHECKV4: t2: -; CHECKV4: bx r0 @ TAILCALL -; CHECKV5: t2: -; CHECKV5: bx r0 @ TAILCALL +; CHECKV6: t2: +; CHECKV6: bx r0 @ TAILCALL %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1] %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0] ret void } -define i32* @t3(i32, i32, i32*, i32*, i32*) nounwind { -; CHECKV4: t3: -; CHECKV4: bx r{{.*}} -BB0: - %5 = inttoptr i32 %0 to i32* ; <i32*> [#uses=1] - %t35 = volatile load i32* %5 ; <i32> [#uses=1] - %6 = inttoptr i32 %t35 to i32** ; <i32**> [#uses=1] - %7 = getelementptr i32** %6, i32 86 ; <i32**> [#uses=1] - %8 = load i32** %7 ; <i32*> [#uses=1] - %9 = bitcast i32* %8 to i32* (i32, i32*, i32, i32*, i32*, i32*)* ; <i32* (i32, i32*, i32, i32*, i32*, i32*)*> [#uses=1] - %10 = call i32* %9(i32 %0, i32* null, i32 %1, i32* %2, i32* %3, i32* %4) ; <i32*> [#uses=1] - ret i32* %10 -} - -define void @t4() { -; CHECKV4: t4: -; CHECKV4: b _t2 @ TAILCALL -; CHECKV5: t4: -; CHECKV5: b _t2 @ TAILCALL +define void @t3() { +; CHECKV6: t3: +; CHECKV6: b _t2 @ TAILCALL +; CHECKELF: t3: +; CHECKELF: b t2(PLT) @ TAILCALL tail call void @t2( ) ; <i32> [#uses=0] ret void } + +; Sibcall optimization of expanded libcalls. rdar://8707777 +define double @t4(double %a) nounwind readonly ssp { +entry: +; CHECKV6: t4: +; CHECKV6: b _sin @ TAILCALL +; CHECKELF: t4: +; CHECKELF: b sin(PLT) @ TAILCALL + %0 = tail call double @sin(double %a) nounwind readonly ; <double> [#uses=1] + ret double %0 +} + +define float @t5(float %a) nounwind readonly ssp { +entry: +; CHECKV6: t5: +; CHECKV6: b _sinf @ TAILCALL +; CHECKELF: t5: +; CHECKELF: b sinf(PLT) @ TAILCALL + %0 = tail call float @sinf(float %a) nounwind readonly ; <float> [#uses=1] + ret float %0 +} + +declare float @sinf(float) nounwind readonly + +declare double @sin(double) nounwind readonly + +define i32 @t6(i32 %a, i32 %b) nounwind readnone { +entry: +; CHECKV6: t6: +; CHECKV6: b ___divsi3 @ TAILCALL +; CHECKELF: t6: +; CHECKELF: b __aeabi_idiv(PLT) @ TAILCALL + %0 = sdiv i32 %a, %b + ret i32 %0 +} + +; Make sure the tail call instruction isn't deleted +; rdar://8309338 +declare void @foo() nounwind + +define void @t7() nounwind { +entry: +; CHECKT2: t7: +; CHECKT2: blxeq _foo +; CHECKT2-NEXT: pop.w +; CHECKT2-NEXT: b.w _foo + br i1 undef, label %bb, label %bb1.lr.ph + +bb1.lr.ph: + tail call void @foo() nounwind + unreachable + +bb: + tail call void @foo() nounwind + ret void +} diff --git a/test/CodeGen/ARM/clz.ll b/test/CodeGen/ARM/clz.ll index d2235c9221ce..e381e0029819 100644 --- a/test/CodeGen/ARM/clz.ll +++ b/test/CodeGen/ARM/clz.ll @@ -1,8 +1,10 @@ -; RUN: llc < %s -march=arm -mattr=+v5t | grep clz +; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s declare i32 @llvm.ctlz.i32(i32) define i32 @test(i32 %x) { - %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x ) ; <i32> [#uses=1] +; CHECK: test +; CHECK: clz r0, r0 + %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x ) ret i32 %tmp.1 } diff --git a/test/CodeGen/ARM/code-placement.ll b/test/CodeGen/ARM/code-placement.ll index 25c556889fc4..845be8c20ea5 100644 --- a/test/CodeGen/ARM/code-placement.ll +++ b/test/CodeGen/ARM/code-placement.ll @@ -1,12 +1,13 @@ -; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=armv7-apple-darwin -cgp-critical-edge-splitting=0 | FileCheck %s ; PHI elimination shouldn't break backedge. ; rdar://8263994 %struct.list_data_s = type { i16, i16 } %struct.list_head = type { %struct.list_head*, %struct.list_data_s* } -define arm_apcscc %struct.list_head* @t(%struct.list_head* %list) nounwind { +define arm_apcscc %struct.list_head* @t1(%struct.list_head* %list) nounwind { entry: +; CHECK: t1: %0 = icmp eq %struct.list_head* %list, null br i1 %0, label %bb2, label %bb @@ -27,3 +28,52 @@ bb2: %next.0.lcssa = phi %struct.list_head* [ null, %entry ], [ %list_addr.05, %bb ] ret %struct.list_head* %next.0.lcssa } + +; Optimize loop entry, eliminate intra loop branches +; rdar://8117827 +define i32 @t2(i32 %passes, i32* nocapture %src, i32 %size) nounwind readonly { +entry: +; CHECK: t2: +; CHECK: beq LBB1_[[RET:.]] + %0 = icmp eq i32 %passes, 0 ; <i1> [#uses=1] + br i1 %0, label %bb5, label %bb.nph15 + +; CHECK: LBB1_[[PREHDR:.]]: @ %bb2.preheader +bb1: ; preds = %bb2.preheader, %bb1 +; CHECK: LBB1_[[BB1:.]]: @ %bb1 +; CHECK: bne LBB1_[[BB1]] + %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %bb2.preheader ] ; <i32> [#uses=2] + %sum.08 = phi i32 [ %2, %bb1 ], [ %sum.110, %bb2.preheader ] ; <i32> [#uses=1] + %tmp17 = sub i32 %i.07, %indvar ; <i32> [#uses=1] + %scevgep = getelementptr i32* %src, i32 %tmp17 ; <i32*> [#uses=1] + %1 = load i32* %scevgep, align 4 ; <i32> [#uses=1] + %2 = add nsw i32 %1, %sum.08 ; <i32> [#uses=2] + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %indvar.next, %size ; <i1> [#uses=1] + br i1 %exitcond, label %bb3, label %bb1 + +bb3: ; preds = %bb1, %bb2.preheader +; CHECK: LBB1_[[BB3:.]]: @ %bb3 +; CHECK: bne LBB1_[[PREHDR]] +; CHECK-NOT: b LBB1_ + %sum.0.lcssa = phi i32 [ %sum.110, %bb2.preheader ], [ %2, %bb1 ] ; <i32> [#uses=2] + %3 = add i32 %pass.011, 1 ; <i32> [#uses=2] + %exitcond18 = icmp eq i32 %3, %passes ; <i1> [#uses=1] + br i1 %exitcond18, label %bb5, label %bb2.preheader + +bb.nph15: ; preds = %entry + %i.07 = add i32 %size, -1 ; <i32> [#uses=2] + %4 = icmp sgt i32 %i.07, -1 ; <i1> [#uses=1] + br label %bb2.preheader + +bb2.preheader: ; preds = %bb3, %bb.nph15 + %pass.011 = phi i32 [ 0, %bb.nph15 ], [ %3, %bb3 ] ; <i32> [#uses=1] + %sum.110 = phi i32 [ 0, %bb.nph15 ], [ %sum.0.lcssa, %bb3 ] ; <i32> [#uses=2] + br i1 %4, label %bb1, label %bb3 + +; CHECK: LBB1_[[RET]]: @ %bb5 +; CHECK: ldmia sp! +bb5: ; preds = %bb3, %entry + %sum.1.lcssa = phi i32 [ 0, %entry ], [ %sum.0.lcssa, %bb3 ] ; <i32> [#uses=1] + ret i32 %sum.1.lcssa +} diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll index ce919361619a..542cf02f2a90 100644 --- a/test/CodeGen/ARM/constants.ll +++ b/test/CodeGen/ARM/constants.ll @@ -14,34 +14,33 @@ define i32 @f2() { define i32 @f3() { ; CHECK: f3 -; CHECK: mov r0{{.*}}256 +; CHECK: mov r0, #1, 24 ret i32 256 } define i32 @f4() { ; CHECK: f4 -; CHECK: orr{{.*}}256 +; CHECK: orr{{.*}}#1, 24 ret i32 257 } define i32 @f5() { ; CHECK: f5 -; CHECK: mov r0, {{.*}}-1073741761 +; CHECK: mov r0, #255, 2 ret i32 -1073741761 } define i32 @f6() { ; CHECK: f6 -; CHECK: mov r0, {{.*}}1008 +; CHECK: mov r0, #63, 28 ret i32 1008 } define void @f7(i32 %a) { ; CHECK: f7 ; CHECK: cmp r0, #1, 16 - %b = icmp ugt i32 %a, 65536 ; <i1> [#uses=1] + %b = icmp ugt i32 %a, 65536 br i1 %b, label %r, label %r - -r: ; preds = %0, %0 +r: ret void } diff --git a/test/CodeGen/ARM/crash.ll b/test/CodeGen/ARM/crash.ll new file mode 100644 index 000000000000..4b6876df4a03 --- /dev/null +++ b/test/CodeGen/ARM/crash.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 + +; <rdar://problem/8529919> +%struct.foo = type { i32, i32 } + +define void @func() nounwind { +entry: + %tmp = load i32* undef, align 4 + br label %bb1 + +bb1: + %tmp1 = and i32 %tmp, 16 + %tmp2 = icmp eq i32 %tmp1, 0 + %invok.1.i = select i1 %tmp2, i32 undef, i32 0 + %tmp119 = add i32 %invok.1.i, 0 + br i1 undef, label %bb2, label %exit + +bb2: + %tmp120 = add i32 %tmp119, 0 + %scevgep810.i = getelementptr %struct.foo* null, i32 %tmp120, i32 1 + store i32 undef, i32* %scevgep810.i, align 4 + br i1 undef, label %bb2, label %bb3 + +bb3: + br i1 %tmp2, label %bb2, label %bb2 + +exit: + ret void +} diff --git a/test/CodeGen/ARM/div.ll b/test/CodeGen/ARM/div.ll index 448b437ddf46..3d29e05a0ccf 100644 --- a/test/CodeGen/ARM/div.ll +++ b/test/CodeGen/ARM/div.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECK-ARM +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=CHECK-ARM define i32 @f1(i32 %a, i32 %b) { entry: diff --git a/test/CodeGen/ARM/fabss.ll b/test/CodeGen/ARM/fabss.ll index dfc1e0a957c3..f03282bdab7f 100644 --- a/test/CodeGen/ARM/fabss.ll +++ b/test/CodeGen/ARM/fabss.ll @@ -24,4 +24,4 @@ declare float @fabsf(float) ; CORTEXA8: test: ; CORTEXA8: vabs.f32 d1, d1 ; CORTEXA9: test: -; CORTEXA9: vabs.f32 s0, s0 +; CORTEXA9: vabs.f32 s1, s1 diff --git a/test/CodeGen/ARM/fadds.ll b/test/CodeGen/ARM/fadds.ll index 113f0e29bd15..749690e98d0f 100644 --- a/test/CodeGen/ARM/fadds.ll +++ b/test/CodeGen/ARM/fadds.ll @@ -20,4 +20,4 @@ entry: ; CORTEXA8: test: ; CORTEXA8: vadd.f32 d0, d1, d0 ; CORTEXA9: test: -; CORTEXA9: vadd.f32 s0, s0, s1 +; CORTEXA9: vadd.f32 s0, s1, s0 diff --git a/test/CodeGen/ARM/fast-isel-crash.ll b/test/CodeGen/ARM/fast-isel-crash.ll new file mode 100644 index 000000000000..370c70f174fd --- /dev/null +++ b/test/CodeGen/ARM/fast-isel-crash.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -O0 -mtriple=thumbv7-apple-darwin + +%union.anon = type { <16 x i32> } + +@__md0 = external global [137 x i8] + +define internal void @stretch(<4 x i8> addrspace(1)* %src, <4 x i8> addrspace(1)* %dst, i32 %width, i32 %height, i32 %iLS, i32 %oLS, <2 x float> %c, <4 x float> %param) nounwind { +entry: + ret void +} + +define internal i32 @_Z13get_global_idj(i32 %dim) nounwind ssp { +entry: + ret i32 undef +} + +define void @wrap(i8 addrspace(1)* addrspace(1)* %arglist, i32 addrspace(1)* %gtid) nounwind ssp { +entry: + call void @stretch(<4 x i8> addrspace(1)* undef, <4 x i8> addrspace(1)* undef, i32 undef, i32 undef, i32 undef, i32 undef, <2 x float> undef, <4 x float> undef) + ret void +} diff --git a/test/CodeGen/ARM/fast-isel-static.ll b/test/CodeGen/ARM/fast-isel-static.ll new file mode 100644 index 000000000000..8f58480be164 --- /dev/null +++ b/test/CodeGen/ARM/fast-isel-static.ll @@ -0,0 +1,30 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O0 -relocation-model=static -arm-long-calls | FileCheck -check-prefix=LONG %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O0 -relocation-model=static | FileCheck -check-prefix=NORM %s + +define void @myadd(float* %sum, float* %addend) nounwind { +entry: + %sum.addr = alloca float*, align 4 + %addend.addr = alloca float*, align 4 + store float* %sum, float** %sum.addr, align 4 + store float* %addend, float** %addend.addr, align 4 + %tmp = load float** %sum.addr, align 4 + %tmp1 = load float* %tmp + %tmp2 = load float** %addend.addr, align 4 + %tmp3 = load float* %tmp2 + %add = fadd float %tmp1, %tmp3 + %tmp4 = load float** %sum.addr, align 4 + store float %add, float* %tmp4 + ret void +} + +define i32 @main(i32 %argc, i8** %argv) nounwind { +entry: + %ztot = alloca float, align 4 + %z = alloca float, align 4 + store float 0.000000e+00, float* %ztot, align 4 + store float 1.000000e+00, float* %z, align 4 +; CHECK-LONG: blx r2 +; CHECK-NORM: blx _myadd + call void @myadd(float* %ztot, float* %z) + ret i32 0 +} diff --git a/test/CodeGen/ARM/fast-isel.ll b/test/CodeGen/ARM/fast-isel.ll index 3bee84d84de4..dd806ec6f1ae 100644 --- a/test/CodeGen/ARM/fast-isel.ll +++ b/test/CodeGen/ARM/fast-isel.ll @@ -1,9 +1,9 @@ -; RUN: llc < %s -O0 -arm-fast-isel -fast-isel-abort -mtriple=armv7-apple-darwin -; RUN: llc < %s -O0 -arm-fast-isel -fast-isel-abort -mtriple=thumbv7-apple-darwin +; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv7-apple-darwin +; RUN: llc < %s -O0 -fast-isel-abort -mtriple=thumbv7-apple-darwin ; Very basic fast-isel functionality. -define i32 @add(i32 %a, i32 %b) nounwind ssp { +define i32 @add(i32 %a, i32 %b) nounwind { entry: %a.addr = alloca i32, align 4 %b.addr = alloca i32, align 4 @@ -13,27 +13,4 @@ entry: %tmp1 = load i32* %b.addr %add = add nsw i32 %tmp, %tmp1 ret i32 %add -} - -define i32* @foo(i32* %p, i32* %q, i32** %z) nounwind { -entry: - %r = load i32* %p - %s = load i32* %q - %y = load i32** %z - br label %fast - -fast: - %t0 = add i32 %r, %s - %t1 = mul i32 %t0, %s - %t2 = sub i32 %t1, %s - %t3 = and i32 %t2, %s - %t4 = xor i32 %t3, 3 - %t5 = xor i32 %t4, %s - %t6 = add i32 %t5, 2 - %t7 = getelementptr i32* %y, i32 1 - %t8 = getelementptr i32* %t7, i32 %t6 - br label %exit - -exit: - ret i32* %t8 -} +}
\ No newline at end of file diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll index a6d741087a89..1050cd265998 100644 --- a/test/CodeGen/ARM/fcopysign.ll +++ b/test/CodeGen/ARM/fcopysign.ll @@ -1,18 +1,45 @@ -; RUN: llc < %s -march=arm | grep bic | count 2 -; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \ -; RUN: grep vneg | count 2 +; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=SOFT +; RUN: llc < %s -mtriple=armv7-gnueabi -float-abi=hard -mcpu=cortex-a8 | FileCheck %s -check-prefix=HARD -define float @test1(float %x, double %y) { - %tmp = fpext float %x to double - %tmp2 = tail call double @copysign( double %tmp, double %y ) - %tmp3 = fptrunc double %tmp2 to float - ret float %tmp3 +; rdar://8984306 +define float @test1(float %x, float %y) nounwind { +entry: +; SOFT: test1: +; SOFT: lsr r1, r1, #31 +; SOFT: bfi r0, r1, #31, #1 + +; HARD: test1: +; HARD: vabs.f32 d0, d0 +; HARD: cmp r0, #0 +; HARD: vneglt.f32 s0, s0 + %0 = tail call float @copysignf(float %x, float %y) nounwind + ret float %0 +} + +define double @test2(double %x, double %y) nounwind { +entry: +; SOFT: test2: +; SOFT: lsr r2, r3, #31 +; SOFT: bfi r1, r2, #31, #1 + +; HARD: test2: +; HARD: vabs.f64 d0, d0 +; HARD: cmp r1, #0 +; HARD: vneglt.f64 d0, d0 + %0 = tail call double @copysign(double %x, double %y) nounwind + ret double %0 } -define double @test2(double %x, float %y) { - %tmp = fpext float %y to double - %tmp2 = tail call double @copysign( double %x, double %tmp ) - ret double %tmp2 +define double @test3(double %x, double %y, double %z) nounwind { +entry: +; SOFT: test3: +; SOFT: vabs.f64 +; SOFT: cmp {{.*}}, #0 +; SOFT: vneglt.f64 + %0 = fmul double %x, %y + %1 = tail call double @copysign(double %0, double %z) nounwind + ret double %1 } -declare double @copysign(double, double) +declare double @copysign(double, double) nounwind +declare float @copysignf(float, float) nounwind diff --git a/test/CodeGen/ARM/fdivs.ll b/test/CodeGen/ARM/fdivs.ll index 9af1217de1d0..0c3149579297 100644 --- a/test/CodeGen/ARM/fdivs.ll +++ b/test/CodeGen/ARM/fdivs.ll @@ -20,4 +20,4 @@ entry: ; CORTEXA8: test: ; CORTEXA8: vdiv.f32 s0, s1, s0 ; CORTEXA9: test: -; CORTEXA9: vdiv.f32 s0, s0, s1 +; CORTEXA9: vdiv.f32 s0, s1, s0 diff --git a/test/CodeGen/ARM/fmacs.ll b/test/CodeGen/ARM/fmacs.ll index c4ceca9828b0..fb83ef626af6 100644 --- a/test/CodeGen/ARM/fmacs.ll +++ b/test/CodeGen/ARM/fmacs.ll @@ -1,24 +1,51 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9 +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8 -define float @test(float %acc, float %a, float %b) { +define float @t1(float %acc, float %a, float %b) { entry: +; VFP2: t1: +; VFP2: vmla.f32 + +; NEON: t1: +; NEON: vmla.f32 + +; A8: t1: +; A8: vmul.f32 +; A8: vadd.f32 %0 = fmul float %a, %b %1 = fadd float %acc, %0 ret float %1 } -; VFP2: test: -; VFP2: vmla.f32 s2, s1, s0 +define double @t2(double %acc, double %a, double %b) { +entry: +; VFP2: t2: +; VFP2: vmla.f64 + +; NEON: t2: +; NEON: vmla.f64 -; NFP1: test: -; NFP1: vmul.f32 d0, d1, d0 -; NFP0: test: -; NFP0: vmla.f32 s2, s1, s0 +; A8: t2: +; A8: vmul.f64 +; A8: vadd.f64 + %0 = fmul double %a, %b + %1 = fadd double %acc, %0 + ret double %1 +} -; CORTEXA8: test: -; CORTEXA8: vmul.f32 d0, d1, d0 -; CORTEXA9: test: -; CORTEXA9: vmla.f32 s0, s1, s2 +define float @t3(float %acc, float %a, float %b) { +entry: +; VFP2: t3: +; VFP2: vmla.f32 + +; NEON: t3: +; NEON: vmla.f32 + +; A8: t3: +; A8: vmul.f32 +; A8: vadd.f32 + %0 = fmul float %a, %b + %1 = fadd float %0, %acc + ret float %1 +} diff --git a/test/CodeGen/ARM/fmscs.ll b/test/CodeGen/ARM/fmscs.ll index 103ce334519b..a182833a7a2c 100644 --- a/test/CodeGen/ARM/fmscs.ll +++ b/test/CodeGen/ARM/fmscs.ll @@ -1,24 +1,35 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9 +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8 -define float @test(float %acc, float %a, float %b) { +define float @t1(float %acc, float %a, float %b) { entry: +; VFP2: t1: +; VFP2: vnmls.f32 + +; NEON: t1: +; NEON: vnmls.f32 + +; A8: t1: +; A8: vmul.f32 +; A8: vsub.f32 %0 = fmul float %a, %b %1 = fsub float %0, %acc ret float %1 } -; VFP2: test: -; VFP2: vnmls.f32 s2, s1, s0 +define double @t2(double %acc, double %a, double %b) { +entry: +; VFP2: t2: +; VFP2: vnmls.f64 -; NFP1: test: -; NFP1: vnmls.f32 s2, s1, s0 -; NFP0: test: -; NFP0: vnmls.f32 s2, s1, s0 +; NEON: t2: +; NEON: vnmls.f64 -; CORTEXA8: test: -; CORTEXA8: vnmls.f32 s2, s1, s0 -; CORTEXA9: test: -; CORTEXA9: vnmls.f32 s0, s1, s2 +; A8: t2: +; A8: vmul.f64 +; A8: vsub.f64 + %0 = fmul double %a, %b + %1 = fsub double %0, %acc + ret double %1 +} diff --git a/test/CodeGen/ARM/fmuls.ll b/test/CodeGen/ARM/fmuls.ll index bfafd20c8602..ef4e3e52818e 100644 --- a/test/CodeGen/ARM/fmuls.ll +++ b/test/CodeGen/ARM/fmuls.ll @@ -20,4 +20,4 @@ entry: ; CORTEXA8: test: ; CORTEXA8: vmul.f32 d0, d1, d0 ; CORTEXA9: test: -; CORTEXA9: vmul.f32 s0, s0, s1 +; CORTEXA9: vmul.f32 s0, s1, s0 diff --git a/test/CodeGen/ARM/fnegs.ll b/test/CodeGen/ARM/fnegs.ll index c15005e6e8ab..418b59803d30 100644 --- a/test/CodeGen/ARM/fnegs.ll +++ b/test/CodeGen/ARM/fnegs.ll @@ -13,19 +13,19 @@ entry: ret float %retval } ; VFP2: test1: -; VFP2: vneg.f32 s1, s0 +; VFP2: vneg.f32 s{{.*}}, s{{.*}} ; NFP1: test1: -; NFP1: vneg.f32 d1, d0 +; NFP1: vneg.f32 d{{.*}}, d{{.*}} ; NFP0: test1: -; NFP0: vneg.f32 s1, s0 +; NFP0: vneg.f32 s{{.*}}, s{{.*}} ; CORTEXA8: test1: -; CORTEXA8: vneg.f32 d1, d0 +; CORTEXA8: vneg.f32 d{{.*}}, d{{.*}} ; CORTEXA9: test1: -; CORTEXA9: vneg.f32 s1, s0 +; CORTEXA9: vneg.f32 s{{.*}}, s{{.*}} define float @test2(float* %a) { entry: @@ -37,17 +37,17 @@ entry: ret float %retval } ; VFP2: test2: -; VFP2: vneg.f32 s1, s0 +; VFP2: vneg.f32 s{{.*}}, s{{.*}} ; NFP1: test2: -; NFP1: vneg.f32 d1, d0 +; NFP1: vneg.f32 d{{.*}}, d{{.*}} ; NFP0: test2: -; NFP0: vneg.f32 s1, s0 +; NFP0: vneg.f32 s{{.*}}, s{{.*}} ; CORTEXA8: test2: -; CORTEXA8: vneg.f32 d1, d0 +; CORTEXA8: vneg.f32 d{{.*}}, d{{.*}} ; CORTEXA9: test2: -; CORTEXA9: vneg.f32 s1, s0 +; CORTEXA9: vneg.f32 s{{.*}}, s{{.*}} diff --git a/test/CodeGen/ARM/fnmacs.ll b/test/CodeGen/ARM/fnmacs.ll index 1d1d06a70ea6..1763d46e06c4 100644 --- a/test/CodeGen/ARM/fnmacs.ll +++ b/test/CodeGen/ARM/fnmacs.ll @@ -1,20 +1,35 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEONFP +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8 -define float @test(float %acc, float %a, float %b) { +define float @t1(float %acc, float %a, float %b) { entry: +; VFP2: t1: ; VFP2: vmls.f32 -; NEON: vmls.f32 -; NEONFP-NOT: vmls -; NEONFP-NOT: vmov.f32 -; NEONFP: vmul.f32 -; NEONFP: vsub.f32 -; NEONFP: vmov +; NEON: t1: +; NEON: vmls.f32 +; A8: t1: +; A8: vmul.f32 +; A8: vsub.f32 %0 = fmul float %a, %b %1 = fsub float %acc, %0 ret float %1 } +define double @t2(double %acc, double %a, double %b) { +entry: +; VFP2: t2: +; VFP2: vmls.f64 + +; NEON: t2: +; NEON: vmls.f64 + +; A8: t2: +; A8: vmul.f64 +; A8: vsub.f64 + %0 = fmul double %a, %b + %1 = fsub double %acc, %0 + ret double %1 +} diff --git a/test/CodeGen/ARM/fnmscs.ll b/test/CodeGen/ARM/fnmscs.ll index 0b47edd5f1f1..76c806761f75 100644 --- a/test/CodeGen/ARM/fnmscs.ll +++ b/test/CodeGen/ARM/fnmscs.ll @@ -1,23 +1,71 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8 -define float @test1(float %acc, float %a, float %b) nounwind { -; CHECK: vnmla.f32 s{{.*}}, s{{.*}}, s{{.*}} +define float @t1(float %acc, float %a, float %b) nounwind { entry: +; VFP2: t1: +; VFP2: vnmla.f32 + +; NEON: t1: +; NEON: vnmla.f32 + +; A8: t1: +; A8: vnmul.f32 s0, s{{[01]}}, s{{[01]}} +; A8: vsub.f32 d0, d0, d1 %0 = fmul float %a, %b %1 = fsub float -0.0, %0 %2 = fsub float %1, %acc ret float %2 } -define float @test2(float %acc, float %a, float %b) nounwind { -; CHECK: vnmla.f32 s{{.*}}, s{{.*}}, s{{.*}} +define float @t2(float %acc, float %a, float %b) nounwind { entry: +; VFP2: t2: +; VFP2: vnmla.f32 + +; NEON: t2: +; NEON: vnmla.f32 + +; A8: t2: +; A8: vnmul.f32 s0, s{{[01]}}, s{{[01]}} +; A8: vsub.f32 d0, d0, d1 %0 = fmul float %a, %b %1 = fmul float -1.0, %0 %2 = fsub float %1, %acc ret float %2 } +define double @t3(double %acc, double %a, double %b) nounwind { +entry: +; VFP2: t3: +; VFP2: vnmla.f64 + +; NEON: t3: +; NEON: vnmla.f64 + +; A8: t3: +; A8: vnmul.f64 d16, d1{{[67]}}, d1{{[67]}} +; A8: vsub.f64 d16, d16, d17 + %0 = fmul double %a, %b + %1 = fsub double -0.0, %0 + %2 = fsub double %1, %acc + ret double %2 +} + +define double @t4(double %acc, double %a, double %b) nounwind { +entry: +; VFP2: t4: +; VFP2: vnmla.f64 + +; NEON: t4: +; NEON: vnmla.f64 + +; A8: t4: +; A8: vnmul.f64 d16, d1{{[67]}}, d1{{[67]}} +; A8: vsub.f64 d16, d16, d17 + %0 = fmul double %a, %b + %1 = fmul double -1.0, %0 + %2 = fsub double %1, %acc + ret double %2 +} diff --git a/test/CodeGen/ARM/fp.ll b/test/CodeGen/ARM/fp.ll index 8fbd45b97579..b6e9c3c22e75 100644 --- a/test/CodeGen/ARM/fp.ll +++ b/test/CodeGen/ARM/fp.ll @@ -51,7 +51,7 @@ entry: define float @h2() { ;CHECK: h2: -;CHECK: 1065353216 +;CHECK: mov r0, #254, 10 entry: ret float 1.000000e+00 } diff --git a/test/CodeGen/ARM/fpcmp-opt.ll b/test/CodeGen/ARM/fpcmp-opt.ll index 64350591b87f..65b921bdf655 100644 --- a/test/CodeGen/ARM/fpcmp-opt.ll +++ b/test/CodeGen/ARM/fpcmp-opt.ll @@ -38,6 +38,7 @@ entry: ; FINITE: t2: ; FINITE-NOT: vldr ; FINITE: ldrd r0, [r0] +; FINITE-NOT: b LBB ; FINITE: cmp r0, #0 ; FINITE: cmpeq r1, #0 ; FINITE-NOT: vcmpe.f32 diff --git a/test/CodeGen/ARM/fpcmp_ueq.ll b/test/CodeGen/ARM/fpcmp_ueq.ll index 67f70e9eb5ed..2e6b3e3167ae 100644 --- a/test/CodeGen/ARM/fpcmp_ueq.ll +++ b/test/CodeGen/ARM/fpcmp_ueq.ll @@ -1,8 +1,14 @@ -; RUN: llc < %s -march=arm | grep moveq -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep movvs +; RUN: llc < %s -mtriple=arm-apple-darwin | grep moveq +; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s define i32 @f7(float %a, float %b) { entry: +; CHECK: f7: +; CHECK: vcmpe.f32 +; CHECK: vmrs apsr_nzcv, fpscr +; CHECK: movweq +; CHECK-NOT: vmrs +; CHECK: movwvs %tmp = fcmp ueq float %a,%b %retval = select i1 %tmp, i32 666, i32 42 ret i32 %retval diff --git a/test/CodeGen/ARM/fpconsts.ll b/test/CodeGen/ARM/fpconsts.ll index f1d6a16f3edb..638dde9d8a0f 100644 --- a/test/CodeGen/ARM/fpconsts.ll +++ b/test/CodeGen/ARM/fpconsts.ll @@ -3,7 +3,7 @@ define float @t1(float %x) nounwind readnone optsize { entry: ; CHECK: t1: -; CHECK: vmov.f32 s1, #4.000000e+00 +; CHECK: vmov.f32 s{{.*}}, #4.000000e+00 %0 = fadd float %x, 4.000000e+00 ret float %0 } @@ -11,7 +11,7 @@ entry: define double @t2(double %x) nounwind readnone optsize { entry: ; CHECK: t2: -; CHECK: vmov.f64 d1, #3.000000e+00 +; CHECK: vmov.f64 d{{.*}}, #3.000000e+00 %0 = fadd double %x, 3.000000e+00 ret double %0 } @@ -19,7 +19,7 @@ entry: define double @t3(double %x) nounwind readnone optsize { entry: ; CHECK: t3: -; CHECK: vmov.f64 d1, #-1.300000e+01 +; CHECK: vmov.f64 d{{.*}}, #-1.300000e+01 %0 = fmul double %x, -1.300000e+01 ret double %0 } @@ -27,7 +27,7 @@ entry: define float @t4(float %x) nounwind readnone optsize { entry: ; CHECK: t4: -; CHECK: vmov.f32 s1, #-2.400000e+01 +; CHECK: vmov.f32 s{{.*}}, #-2.400000e+01 %0 = fmul float %x, -2.400000e+01 ret float %0 } diff --git a/test/CodeGen/ARM/fpconv.ll b/test/CodeGen/ARM/fpconv.ll index bf197a46cb77..1b4c008bb775 100644 --- a/test/CodeGen/ARM/fpconv.ll +++ b/test/CodeGen/ARM/fpconv.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP -; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s define float @f1(double %x) { ;CHECK-VFP: f1: diff --git a/test/CodeGen/ARM/global-merge.ll b/test/CodeGen/ARM/global-merge.ll new file mode 100644 index 000000000000..28bf2214740a --- /dev/null +++ b/test/CodeGen/ARM/global-merge.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s +; Test the ARMGlobalMerge pass. Use -march=thumb because it has a small +; value for the maximum offset (127). + +; A local array that exceeds the maximum offset should not be merged. +; CHECK: g0: +@g0 = internal global [32 x i32] [ i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2 ] + +; CHECK: _MergedGlobals: +@g1 = internal global i32 1 +@g2 = internal global i32 2 + +; Make sure that the complete variable fits within the range of the maximum +; offset. Having the starting offset in range is not sufficient. +; When this works properly, @g3 is placed in a separate chunk of merged globals. +; CHECK: _MergedGlobals1: +@g3 = internal global [30 x i32] [ i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ] + +; Global variables that can be placed in BSS should be kept together in a +; separate pool of merged globals. +; CHECK: _MergedGlobals2 +@g4 = internal global i32 0 +@g5 = internal global i32 0 diff --git a/test/CodeGen/ARM/hello.ll b/test/CodeGen/ARM/hello.ll index ccdc7bf4c140..bfed7a6630b4 100644 --- a/test/CodeGen/ARM/hello.ll +++ b/test/CodeGen/ARM/hello.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm ; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | count 1 ; RUN: llc < %s -mtriple=arm-linux-gnu --disable-fp-elim | \ -; RUN: grep mov | count 3 +; RUN: grep mov | count 2 ; RUN: llc < %s -mtriple=arm-apple-darwin | grep mov | count 2 @str = internal constant [12 x i8] c"Hello World\00" diff --git a/test/CodeGen/ARM/ifcvt10.ll b/test/CodeGen/ARM/ifcvt10.ll new file mode 100644 index 000000000000..75428ac21655 --- /dev/null +++ b/test/CodeGen/ARM/ifcvt10.ll @@ -0,0 +1,43 @@ +; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a9 | FileCheck %s +; rdar://8402126 +; Make sure if-converter is not predicating vldmia and ldmia. These are +; micro-coded and would have long issue latency even if predicated on +; false predicate. + +define void @t(double %a, double %b, double %c, double %d, i32* nocapture %solutions, double* nocapture %x) nounwind { +entry: +; CHECK: t: +; CHECK: vpop {d8} +; CHECK-NOT: vpopne +; CHECK: ldmia sp!, {r7, pc} +; CHECK: vpop {d8} +; CHECK: ldmia sp!, {r7, pc} + br i1 undef, label %if.else, label %if.then + +if.then: ; preds = %entry + %mul73 = fmul double undef, 0.000000e+00 + %sub76 = fsub double %mul73, undef + store double %sub76, double* undef, align 4 + %call88 = tail call double @cos(double 0.000000e+00) nounwind + %mul89 = fmul double undef, %call88 + %sub92 = fsub double %mul89, undef + store double %sub92, double* undef, align 4 + ret void + +if.else: ; preds = %entry + %tmp101 = tail call double @llvm.pow.f64(double undef, double 0x3FD5555555555555) + %add112 = fadd double %tmp101, undef + %mul118 = fmul double %add112, undef + store double 0.000000e+00, double* %x, align 4 + ret void +} + +declare double @acos(double) + +declare double @sqrt(double) readnone + +declare double @cos(double) readnone + +declare double @fabs(double) + +declare double @llvm.pow.f64(double, double) nounwind readonly diff --git a/test/CodeGen/ARM/ifcvt11.ll b/test/CodeGen/ARM/ifcvt11.ll new file mode 100644 index 000000000000..63f8557d555b --- /dev/null +++ b/test/CodeGen/ARM/ifcvt11.ll @@ -0,0 +1,59 @@ +; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 | FileCheck %s +; rdar://8598427 +; Adjust if-converter heuristics to avoid predicating vmrs which can cause +; significant regression. + +%struct.xyz_t = type { double, double, double } + +define i32 @effie(i32 %tsets, %struct.xyz_t* nocapture %p, i32 %a, i32 %b, i32 %c) nounwind readonly noinline { +; CHECK: effie: +entry: + %0 = icmp sgt i32 %tsets, 0 + br i1 %0, label %bb.nph, label %bb6 + +bb.nph: ; preds = %entry + %1 = add nsw i32 %b, %a + %2 = add nsw i32 %1, %c + br label %bb + +bb: ; preds = %bb4, %bb.nph +; CHECK: vcmpe.f64 +; CHECK: vmrs apsr_nzcv, fpscr + %r.19 = phi i32 [ 0, %bb.nph ], [ %r.0, %bb4 ] + %n.08 = phi i32 [ 0, %bb.nph ], [ %10, %bb4 ] + %scevgep10 = getelementptr inbounds %struct.xyz_t* %p, i32 %n.08, i32 0 + %scevgep11 = getelementptr %struct.xyz_t* %p, i32 %n.08, i32 1 + %3 = load double* %scevgep10, align 4 + %4 = load double* %scevgep11, align 4 + %5 = fcmp uge double %3, %4 + br i1 %5, label %bb3, label %bb1 + +bb1: ; preds = %bb +; CHECK-NOT: it +; CHECK-NOT: vcmpemi +; CHECK-NOT: vmrsmi +; CHECK: vcmpe.f64 +; CHECK: vmrs apsr_nzcv, fpscr + %scevgep12 = getelementptr %struct.xyz_t* %p, i32 %n.08, i32 2 + %6 = load double* %scevgep12, align 4 + %7 = fcmp uge double %3, %6 + br i1 %7, label %bb3, label %bb2 + +bb2: ; preds = %bb1 + %8 = add nsw i32 %2, %r.19 + br label %bb4 + +bb3: ; preds = %bb1, %bb + %9 = add nsw i32 %r.19, 1 + br label %bb4 + +bb4: ; preds = %bb3, %bb2 + %r.0 = phi i32 [ %9, %bb3 ], [ %8, %bb2 ] + %10 = add nsw i32 %n.08, 1 + %exitcond = icmp eq i32 %10, %tsets + br i1 %exitcond, label %bb6, label %bb + +bb6: ; preds = %bb4, %entry + %r.1.lcssa = phi i32 [ 0, %entry ], [ %r.0, %bb4 ] + ret i32 %r.1.lcssa +} diff --git a/test/CodeGen/ARM/ifcvt6.ll b/test/CodeGen/ARM/ifcvt6.ll index e2c0ba398c68..5edf32fd1af6 100644 --- a/test/CodeGen/ARM/ifcvt6.ll +++ b/test/CodeGen/ARM/ifcvt6.ll @@ -1,10 +1,9 @@ -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep cmpne | count 1 -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep ldmiahi | count 1 +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s define void @foo(i32 %X, i32 %Y) { entry: +; CHECK: cmpne +; CHECK: ldmiahi sp! %tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1] %tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1] %tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1] diff --git a/test/CodeGen/ARM/ifcvt7.ll b/test/CodeGen/ARM/ifcvt7.ll index eb97085ac004..62e13557cfdc 100644 --- a/test/CodeGen/ARM/ifcvt7.ll +++ b/test/CodeGen/ARM/ifcvt7.ll @@ -1,14 +1,12 @@ -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep cmpeq | count 1 -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep moveq | count 1 -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep ldmiaeq | count 1 +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s ; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1. %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } define fastcc i32 @CountTree(%struct.quad_struct* %tree) { +; CHECK: cmpeq +; CHECK: moveq +; CHECK: ldmiaeq sp! entry: br label %tailrecurse diff --git a/test/CodeGen/ARM/ifcvt8.ll b/test/CodeGen/ARM/ifcvt8.ll index 1e39060e69f2..5fdfc4ea6805 100644 --- a/test/CodeGen/ARM/ifcvt8.ll +++ b/test/CodeGen/ARM/ifcvt8.ll @@ -1,11 +1,11 @@ -; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ -; RUN: grep ldmiane | count 1 +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s %struct.SString = type { i8*, i32, i32 } declare void @abort() define fastcc void @t(%struct.SString* %word, i8 signext %c) { +; CHECK: ldmiane sp! entry: %tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1] br i1 %tmp1, label %cond_true, label %cond_false diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll index 687e138c1b4e..9f77ad1f794c 100644 --- a/test/CodeGen/ARM/inlineasm3.ll +++ b/test/CodeGen/ARM/inlineasm3.ll @@ -7,7 +7,7 @@ define void @t() nounwind { entry: ; CHECK: vmov.I64 q15, #0 ; CHECK: vmov.32 d30[0], r0 -; CHECK: vmov q0, q15 +; CHECK: vmov q8, q15 %tmp = alloca %struct.int32x4_t, align 16 call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(%struct.int32x4_t* %tmp, i32 8192) nounwind ret void @@ -18,7 +18,7 @@ entry: define void @t2() nounwind { entry: -; CHECK: vmov d30, d0 +; CHECK: vmov d30, d16 ; CHECK: vmov.32 r0, d30[0] %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind ret void diff --git a/test/CodeGen/ARM/ispositive.ll b/test/CodeGen/ARM/ispositive.ll index 245ed516f70b..2f1a2cfd7786 100644 --- a/test/CodeGen/ARM/ispositive.ll +++ b/test/CodeGen/ARM/ispositive.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm | FileCheck %s define i32 @test1(i32 %X) { -; CHECK: mov r0, r0, lsr #31 +; CHECK: lsr{{.*}}#31 entry: icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] zext i1 %0 to i32 ; <i32>:1 [#uses=1] diff --git a/test/CodeGen/ARM/ldm.ll b/test/CodeGen/ARM/ldm.ll index 78201a6b341a..2f1b85ebbb04 100644 --- a/test/CodeGen/ARM/ldm.ll +++ b/test/CodeGen/ARM/ldm.ll @@ -1,10 +1,13 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=armv4t-apple-darwin | FileCheck %s -check-prefix=V4T @X = external global [0 x i32] ; <[0 x i32]*> [#uses=5] define i32 @t1() { ; CHECK: t1: ; CHECK: ldmia +; V4T: t1: +; V4T: ldmia %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1] @@ -14,6 +17,8 @@ define i32 @t1() { define i32 @t2() { ; CHECK: t2: ; CHECK: ldmia +; V4T: t2: +; V4T: ldmia %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1] %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1] @@ -25,6 +30,10 @@ define i32 @t3() { ; CHECK: t3: ; CHECK: ldmib ; CHECK: ldmia sp! +; V4T: t3: +; V4T: ldmib +; V4T: pop +; V4T-NEXT: bx lr %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1] %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1] diff --git a/test/CodeGen/ARM/ldst-f32-2-i32.ll b/test/CodeGen/ARM/ldst-f32-2-i32.ll new file mode 100644 index 000000000000..2d016f6cd423 --- /dev/null +++ b/test/CodeGen/ARM/ldst-f32-2-i32.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s +; Check if the f32 load / store pair are optimized to i32 load / store. +; rdar://8944252 + +define void @t(i32 %width, float* nocapture %src, float* nocapture %dst, i32 %index) nounwind { +; CHECK: t: +entry: + %src6 = bitcast float* %src to i8* + %0 = icmp eq i32 %width, 0 + br i1 %0, label %return, label %bb + +bb: +; CHECK: ldr [[REGISTER:(r[0-9]+)]], [r1], r3 +; CHECK: str [[REGISTER]], [r2], #4 + %j.05 = phi i32 [ %2, %bb ], [ 0, %entry ] + %tmp = mul i32 %j.05, %index + %uglygep = getelementptr i8* %src6, i32 %tmp + %src_addr.04 = bitcast i8* %uglygep to float* + %dst_addr.03 = getelementptr float* %dst, i32 %j.05 + %1 = load float* %src_addr.04, align 4 + store float %1, float* %dst_addr.03, align 4 + %2 = add i32 %j.05, 1 + %exitcond = icmp eq i32 %2, %width + br i1 %exitcond, label %return, label %bb + +return: + ret void +} diff --git a/test/CodeGen/ARM/load-global.ll b/test/CodeGen/ARM/load-global.ll new file mode 100644 index 000000000000..15a415df731d --- /dev/null +++ b/test/CodeGen/ARM/load-global.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC +; RUN: llc < %s -mtriple=thumbv6-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC_T +; RUN: llc < %s -mtriple=armv7-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC_V7 +; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LINUX + +@G = external global i32 + +define i32 @test1() { +; STATIC: _test1: +; STATIC: ldr r0, LCPI0_0 +; STATIC: ldr r0, [r0] +; STATIC: .long _G + +; DYNAMIC: _test1: +; DYNAMIC: ldr r0, LCPI0_0 +; DYNAMIC: ldr r0, [r0] +; DYNAMIC: ldr r0, [r0] +; DYNAMIC: .long L_G$non_lazy_ptr + +; PIC: _test1 +; PIC: ldr r0, LCPI0_0 +; PIC: ldr r0, [pc, r0] +; PIC: ldr r0, [r0] +; PIC: .long L_G$non_lazy_ptr-(LPC0_0+8) + +; PIC_T: _test1 +; PIC_T: ldr.n r0, LCPI0_0 +; PIC_T: add r0, pc +; PIC_T: ldr r0, [r0] +; PIC_T: ldr r0, [r0] +; PIC_T: .long L_G$non_lazy_ptr-(LPC0_0+4) + +; PIC_V7: _test1 +; PIC_V7: movw r0, :lower16:(L_G$non_lazy_ptr-(LPC0_0+8)) +; PIC_V7: movt r0, :upper16:(L_G$non_lazy_ptr-(LPC0_0+8)) +; PIC_V7: ldr r0, [pc, r0] +; PIC_V7: ldr r0, [r0] + +; LINUX: test1 +; LINUX: ldr r0, .LCPI0_0 +; LINUX: ldr r1, .LCPI0_1 +; LINUX: add r0, pc, r0 +; LINUX: ldr r0, [r1, r0] +; LINUX: ldr r0, [r0] +; LINUX: .long G(GOT) + %tmp = load i32* @G + ret i32 %tmp +} diff --git a/test/CodeGen/ARM/long.ll b/test/CodeGen/ARM/long.ll index 16ef7cc2cb6c..74f8d783377d 100644 --- a/test/CodeGen/ARM/long.ll +++ b/test/CodeGen/ARM/long.ll @@ -14,22 +14,22 @@ entry: define i64 @f3() { ; CHECK: f3: -; CHECK: mvn{{.*}}-2147483648 +; CHECK: mvn r0, #2, 2 entry: ret i64 2147483647 } define i64 @f4() { ; CHECK: f4: -; CHECK: -2147483648 +; CHECK: mov r0, #2, 2 entry: ret i64 2147483648 } define i64 @f5() { ; CHECK: f5: -; CHECK: mvn -; CHECK: mvn{{.*}}-2147483648 +; CHECK: mvn r0, #0 +; CHECK: mvn r1, #2, 2 entry: ret i64 9223372036854775807 } diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll index 1ec4d15f6672..5e4f5730f8d2 100644 --- a/test/CodeGen/ARM/long_shift.ll +++ b/test/CodeGen/ARM/long_shift.ll @@ -2,8 +2,8 @@ define i64 @f0(i64 %A, i64 %B) { ; CHECK: f0 -; CHECK: movs r3, r3, lsr #1 -; CHECK-NEXT: mov r2, r2, rrx +; CHECK: lsrs r3, r3, #1 +; CHECK-NEXT: rrx r2, r2 ; CHECK-NEXT: subs r0, r0, r2 ; CHECK-NEXT: sbc r1, r1, r3 %tmp = bitcast i64 %A to i64 @@ -14,7 +14,7 @@ define i64 @f0(i64 %A, i64 %B) { define i32 @f1(i64 %x, i64 %y) { ; CHECK: f1 -; CHECK: mov r0, r0, lsl r2 +; CHECK: lsl{{.*}}r2 %a = shl i64 %x, %y %b = trunc i64 %a to i32 ret i32 %b @@ -22,7 +22,7 @@ define i32 @f1(i64 %x, i64 %y) { define i32 @f2(i64 %x, i64 %y) { ; CHECK: f2 -; CHECK: mov r0, r0, lsr r2 +; CHECK: lsr{{.*}}r2 ; CHECK-NEXT: rsb r3, r2, #32 ; CHECK-NEXT: subs r2, r2, #32 ; CHECK-NEXT: orr r0, r0, r1, lsl r3 @@ -34,7 +34,7 @@ define i32 @f2(i64 %x, i64 %y) { define i32 @f3(i64 %x, i64 %y) { ; CHECK: f3 -; CHECK: mov r0, r0, lsr r2 +; CHECK: lsr{{.*}}r2 ; CHECK-NEXT: rsb r3, r2, #32 ; CHECK-NEXT: subs r2, r2, #32 ; CHECK-NEXT: orr r0, r0, r1, lsl r3 diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll index b8c543b1bd18..1bbb96deeefe 100644 --- a/test/CodeGen/ARM/lsr-code-insertion.ll +++ b/test/CodeGen/ARM/lsr-code-insertion.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -stats |& grep {38.*Number of machine instrs printed} +; RUN: llc < %s -stats |& grep {39.*Number of machine instrs printed} ; RUN: llc < %s -stats |& not grep {.*Number of re-materialization} ; This test really wants to check that the resultant "cond_true" block only ; has a single store in it, and that cond_true55 only has code to materialize diff --git a/test/CodeGen/ARM/lsr-on-unrolled-loops.ll b/test/CodeGen/ARM/lsr-on-unrolled-loops.ll index 866be423c2cb..9882690da268 100644 --- a/test/CodeGen/ARM/lsr-on-unrolled-loops.ll +++ b/test/CodeGen/ARM/lsr-on-unrolled-loops.ll @@ -4,14 +4,14 @@ ; constant offset addressing, so that each of the following stores ; uses the same register. -; CHECK: vstr.32 s{{.*}}, [r{{.*}}, #-128] -; CHECK: vstr.32 s{{.*}}, [r{{.*}}, #-96] -; CHECK: vstr.32 s{{.*}}, [r{{.*}}, #-64] -; CHECK: vstr.32 s{{.*}}, [r{{.*}}, #-32] -; CHECK: vstr.32 s{{.*}}, [r{{.*}}] -; CHECK: vstr.32 s{{.*}}, [r{{.*}}, #32] -; CHECK: vstr.32 s{{.*}}, [r{{.*}}, #64] -; CHECK: vstr.32 s{{.*}}, [r{{.*}}, #96] +; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #-128] +; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #-96] +; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #-64] +; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #-32] +; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}] +; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #32] +; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #64] +; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #96] target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" @@ -624,12 +624,11 @@ bb23: ; preds = %bb22, %bb20, %bb9, bb24: ; preds = %bb23 ; LSR should use count-down iteration to avoid requiring the trip count -; in a register, and it shouldn't require any reloads here. +; in a register. ; CHECK: @ %bb24 -; CHECK-NEXT: @ in Loop: Header=BB1_1 Depth=1 -; CHECK-NEXT: sub{{.*}} [[REGISTER:(r[0-9]+)|(lr)]], #1 -; CHECK-NEXT: bne.w +; CHECK: subs{{.*}} {{(r[0-9]+)|(lr)}}, #1 +; CHECK: bne.w %92 = icmp eq i32 %tmp81, %indvar78 ; <i1> [#uses=1] %indvar.next79 = add i32 %indvar78, 1 ; <i32> [#uses=1] diff --git a/test/CodeGen/Thumb/machine-licm.ll b/test/CodeGen/ARM/machine-licm.ll index a87e82c21dd7..8656c5bbd72c 100644 --- a/test/CodeGen/Thumb/machine-licm.ll +++ b/test/CodeGen/ARM/machine-licm.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s +; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -check-prefix=THUMB +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -disable-fp-elim -mattr=+v6t2 | FileCheck %s -check-prefix=MOVT ; rdar://7353541 ; rdar://7354376 +; rdar://8887598 ; The generated code is no where near ideal. It's not recognizing the two ; constantpool entries being loaded can be merged into one. @@ -9,19 +12,41 @@ define void @t(i32* nocapture %vals, i32 %c) nounwind { entry: -; CHECK: t: +; ARM: t: +; ARM: ldr [[REGISTER_1:r[0-9]+]], LCPI0_0 +; Unfortunately currently ARM codegen doesn't cse the ldr from constantpool. +; The issue is it can be read by an "add pc" or a "ldr [pc]" so it's messy +; to add the pseudo instructions to make sure they are CSE'ed at the same +; time as the "ldr cp". +; ARM: ldr r{{[0-9]+}}, LCPI0_1 +; ARM: LPC0_0: +; ARM: ldr r{{[0-9]+}}, [pc, [[REGISTER_1]]] +; ARM: ldr r{{[0-9]+}}, [r{{[0-9]+}}] + +; MOVT: t: +; MOVT: movw [[REGISTER_2:r[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+8)) +; MOVT: movt [[REGISTER_2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+8)) +; MOVT: LPC0_0: +; MOVT: ldr r{{[0-9]+}}, [pc, [[REGISTER_2]]] +; MOVT: ldr r{{[0-9]+}}, [r{{[0-9]+}}] + +; THUMB: t: %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1] br i1 %0, label %return, label %bb.nph bb.nph: ; preds = %entry -; CHECK: BB#1 -; CHECK: ldr.n r2, LCPI0_0 -; CHECK: add r2, pc -; CHECK: ldr r{{[0-9]+}}, [r2] -; CHECK: LBB0_2 -; CHECK: LCPI0_0: -; CHECK-NOT: LCPI0_1: -; CHECK: .section +; ARM: LCPI0_0: +; ARM: LCPI0_1: +; ARM: .section + +; THUMB: BB#1 +; THUMB: ldr.n r2, LCPI0_0 +; THUMB: add r2, pc +; THUMB: ldr r{{[0-9]+}}, [r2] +; THUMB: LBB0_2 +; THUMB: LCPI0_0: +; THUMB-NOT: LCPI0_1: +; THUMB: .section %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] br label %bb diff --git a/test/CodeGen/ARM/mul_const.ll b/test/CodeGen/ARM/mul_const.ll index 8c102464612c..3cb8a8e816f6 100644 --- a/test/CodeGen/ARM/mul_const.ll +++ b/test/CodeGen/ARM/mul_const.ll @@ -36,7 +36,7 @@ define i32 @t12288(i32 %v) nounwind readnone { entry: ; CHECK: t12288: ; CHECK: add r0, r0, r0, lsl #1 -; CHECK: mov r0, r0, lsl #12 +; CHECK: lsl{{.*}}#12 %0 = mul i32 %v, 12288 ret i32 %0 } diff --git a/test/CodeGen/ARM/mult-alt-generic-arm.ll b/test/CodeGen/ARM/mult-alt-generic-arm.ll new file mode 100644 index 000000000000..a8104db337f5 --- /dev/null +++ b/test/CodeGen/ARM/mult-alt-generic-arm.ll @@ -0,0 +1,323 @@ +; RUN: llc < %s -march=arm +; ModuleID = 'mult-alt-generic.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32" +target triple = "arm" + +@mout0 = common global i32 0, align 4 +@min1 = common global i32 0, align 4 +@marray = common global [2 x i32] zeroinitializer, align 4 + +define arm_aapcscc void @single_m() nounwind { +entry: + call void asm "foo $1,$0", "=*m,*m"(i32* @mout0, i32* @min1) nounwind + ret void +} + +define arm_aapcscc void @single_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define arm_aapcscc void @single_V() nounwind { +entry: + ret void +} + +define arm_aapcscc void @single_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,<r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r<"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @single_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,>r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r>"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @single_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @single_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,i"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @single_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,n"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @single_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define arm_aapcscc void @single_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define arm_aapcscc void @single_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @single_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,imr"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @single_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,X"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r,X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 +; No lowering support. +; %4 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+001) nounwind +; store i32 %4, i32* %out0, align 4 +; %5 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+000) nounwind +; store i32 %5, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @single_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_m() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*m|r,m|r"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define arm_aapcscc void @multi_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define arm_aapcscc void @multi_V() nounwind { +entry: + ret void +} + +define arm_aapcscc void @multi_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|<r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r<"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|>r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r>"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|m"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|i"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|n"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define arm_aapcscc void @multi_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define arm_aapcscc void @multi_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 +; No lowering support. +; %4 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+001) nounwind +; store i32 %4, i32* %out0, align 4 +; %5 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+000) nounwind +; store i32 %5, i32* %out0, align 4 + ret void +} + +define arm_aapcscc void @multi_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} diff --git a/test/CodeGen/ARM/neon_div.ll b/test/CodeGen/ARM/neon_div.ll new file mode 100644 index 000000000000..e33797079093 --- /dev/null +++ b/test/CodeGen/ARM/neon_div.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +define <8 x i8> @sdivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecpe.f32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i16 + %tmp1 = load <8 x i8>* %A + %tmp2 = load <8 x i8>* %B + %tmp3 = sdiv <8 x i8> %tmp1, %tmp2 + ret <8 x i8> %tmp3 +} + +define <8 x i8> @udivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 +;CHECK: vmovn.i32 +;CHECK: vqmovun.s16 + %tmp1 = load <8 x i8>* %A + %tmp2 = load <8 x i8>* %B + %tmp3 = udiv <8 x i8> %tmp1, %tmp2 + ret <8 x i8> %tmp3 +} + +define <4 x i16> @sdivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 + %tmp1 = load <4 x i16>* %A + %tmp2 = load <4 x i16>* %B + %tmp3 = sdiv <4 x i16> %tmp1, %tmp2 + ret <4 x i16> %tmp3 +} + +define <4 x i16> @udivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vrecpe.f32 +;CHECK: vrecps.f32 +;CHECK: vrecps.f32 +;CHECK: vmovn.i32 + %tmp1 = load <4 x i16>* %A + %tmp2 = load <4 x i16>* %B + %tmp3 = udiv <4 x i16> %tmp1, %tmp2 + ret <4 x i16> %tmp3 +} diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll index 4905dc28cf48..90151767b919 100644 --- a/test/CodeGen/ARM/pack.ll +++ b/test/CodeGen/ARM/pack.ll @@ -3,87 +3,78 @@ ; CHECK: test1 ; CHECK: pkhbt r0, r0, r1, lsl #16 define i32 @test1(i32 %X, i32 %Y) { - %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1] - %tmp4 = shl i32 %Y, 16 ; <i32> [#uses=1] - %tmp5 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1] - ret i32 %tmp5 -} - -; CHECK: test1a -; CHECK: pkhbt r0, r0, r1, lsl #16 -define i32 @test1a(i32 %X, i32 %Y) { - %tmp19 = and i32 %X, 65535 ; <i32> [#uses=1] - %tmp37 = shl i32 %Y, 16 ; <i32> [#uses=1] - %tmp5 = or i32 %tmp37, %tmp19 ; <i32> [#uses=1] + %tmp1 = and i32 %X, 65535 + %tmp4 = shl i32 %Y, 16 + %tmp5 = or i32 %tmp4, %tmp1 ret i32 %tmp5 } ; CHECK: test2 ; CHECK: pkhbt r0, r0, r1, lsl #12 define i32 @test2(i32 %X, i32 %Y) { - %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1] - %tmp3 = shl i32 %Y, 12 ; <i32> [#uses=1] - %tmp4 = and i32 %tmp3, -65536 ; <i32> [#uses=1] - %tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1] + %tmp1 = and i32 %X, 65535 + %tmp3 = shl i32 %Y, 12 + %tmp4 = and i32 %tmp3, -65536 + %tmp57 = or i32 %tmp4, %tmp1 ret i32 %tmp57 } ; CHECK: test3 ; CHECK: pkhbt r0, r0, r1, lsl #18 define i32 @test3(i32 %X, i32 %Y) { - %tmp19 = and i32 %X, 65535 ; <i32> [#uses=1] - %tmp37 = shl i32 %Y, 18 ; <i32> [#uses=1] - %tmp5 = or i32 %tmp37, %tmp19 ; <i32> [#uses=1] + %tmp19 = and i32 %X, 65535 + %tmp37 = shl i32 %Y, 18 + %tmp5 = or i32 %tmp37, %tmp19 ret i32 %tmp5 } ; CHECK: test4 ; CHECK: pkhbt r0, r0, r1 define i32 @test4(i32 %X, i32 %Y) { - %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1] - %tmp3 = and i32 %Y, -65536 ; <i32> [#uses=1] - %tmp46 = or i32 %tmp3, %tmp1 ; <i32> [#uses=1] + %tmp1 = and i32 %X, 65535 + %tmp3 = and i32 %Y, -65536 + %tmp46 = or i32 %tmp3, %tmp1 ret i32 %tmp46 } ; CHECK: test5 ; CHECK: pkhtb r0, r0, r1, asr #16 define i32 @test5(i32 %X, i32 %Y) { - %tmp17 = and i32 %X, -65536 ; <i32> [#uses=1] - %tmp2 = bitcast i32 %Y to i32 ; <i32> [#uses=1] - %tmp4 = lshr i32 %tmp2, 16 ; <i32> [#uses=2] - %tmp5 = or i32 %tmp4, %tmp17 ; <i32> [#uses=1] + %tmp17 = and i32 %X, -65536 + %tmp2 = bitcast i32 %Y to i32 + %tmp4 = lshr i32 %tmp2, 16 + %tmp5 = or i32 %tmp4, %tmp17 ret i32 %tmp5 } ; CHECK: test5a ; CHECK: pkhtb r0, r0, r1, asr #16 define i32 @test5a(i32 %X, i32 %Y) { - %tmp110 = and i32 %X, -65536 ; <i32> [#uses=1] - %tmp37 = lshr i32 %Y, 16 ; <i32> [#uses=1] - %tmp39 = bitcast i32 %tmp37 to i32 ; <i32> [#uses=1] - %tmp5 = or i32 %tmp39, %tmp110 ; <i32> [#uses=1] + %tmp110 = and i32 %X, -65536 + %tmp37 = lshr i32 %Y, 16 + %tmp39 = bitcast i32 %tmp37 to i32 + %tmp5 = or i32 %tmp39, %tmp110 ret i32 %tmp5 } ; CHECK: test6 ; CHECK: pkhtb r0, r0, r1, asr #12 define i32 @test6(i32 %X, i32 %Y) { - %tmp1 = and i32 %X, -65536 ; <i32> [#uses=1] - %tmp37 = lshr i32 %Y, 12 ; <i32> [#uses=1] - %tmp38 = bitcast i32 %tmp37 to i32 ; <i32> [#uses=1] - %tmp4 = and i32 %tmp38, 65535 ; <i32> [#uses=1] - %tmp59 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1] + %tmp1 = and i32 %X, -65536 + %tmp37 = lshr i32 %Y, 12 + %tmp38 = bitcast i32 %tmp37 to i32 + %tmp4 = and i32 %tmp38, 65535 + %tmp59 = or i32 %tmp4, %tmp1 ret i32 %tmp59 } ; CHECK: test7 ; CHECK: pkhtb r0, r0, r1, asr #18 define i32 @test7(i32 %X, i32 %Y) { - %tmp1 = and i32 %X, -65536 ; <i32> [#uses=1] - %tmp3 = ashr i32 %Y, 18 ; <i32> [#uses=1] - %tmp4 = and i32 %tmp3, 65535 ; <i32> [#uses=1] - %tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1] + %tmp1 = and i32 %X, -65536 + %tmp3 = ashr i32 %Y, 18 + %tmp4 = and i32 %tmp3, 65535 + %tmp57 = or i32 %tmp4, %tmp1 ret i32 %tmp57 } diff --git a/test/CodeGen/ARM/phi.ll b/test/CodeGen/ARM/phi.ll new file mode 100644 index 000000000000..29e17c095a74 --- /dev/null +++ b/test/CodeGen/ARM/phi.ll @@ -0,0 +1,23 @@ +; RUN: llc -march=arm < %s | FileCheck %s +; <rdar://problem/8686347> + +define i32 @test1(i1 %a, i32* %b) { +; CHECK: test1 +entry: + br i1 %a, label %lblock, label %rblock + +lblock: + %lbranch = getelementptr i32* %b, i32 1 + br label %end + +rblock: + %rbranch = getelementptr i32* %b, i32 1 + br label %end + +end: +; CHECK: ldr r0, [r1, #4] + %gep = phi i32* [%lbranch, %lblock], [%rbranch, %rblock] + %r = load i32* %gep +; CHECK-NEXT: bx lr + ret i32 %r +}
\ No newline at end of file diff --git a/test/CodeGen/ARM/prefetch.ll b/test/CodeGen/ARM/prefetch.ll new file mode 100644 index 000000000000..895b27b749db --- /dev/null +++ b/test/CodeGen/ARM/prefetch.ll @@ -0,0 +1,61 @@ +; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld +; RUN: llc < %s -march=thumb -mattr=+v7a | FileCheck %s -check-prefix=THUMB2 +; RUN: llc < %s -march=arm -mattr=+v7a,+mp | FileCheck %s -check-prefix=ARM-MP +; rdar://8601536 + +define void @t1(i8* %ptr) nounwind { +entry: +; ARM-MP: t1: +; ARM-MP: pldw [r0] +; ARM-MP: pld [r0] + +; THUMB2: t1: +; THUMB2-NOT: pldw [r0] +; THUMB2: pld [r0] + tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) + ret void +} + +define void @t2(i8* %ptr) nounwind { +entry: +; ARM-MP: t2: +; ARM-MP: pld [r0, #1023] + +; THUMB2: t2: +; THUMB2: pld [r0, #1023] + %tmp = getelementptr i8* %ptr, i32 1023 + tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 ) + ret void +} + +define void @t3(i32 %base, i32 %offset) nounwind { +entry: +; ARM-MP: t3: +; ARM-MP: pld [r0, r1, lsr #2] + +; THUMB2: t3: +; THUMB2: lsrs r1, r1, #2 +; THUMB2: pld [r0, r1] + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +define void @t4(i32 %base, i32 %offset) nounwind { +entry: +; ARM-MP: t4: +; ARM-MP: pld [r0, r1, lsl #2] + +; THUMB2: t4: +; THUMB2: pld [r0, r1, lsl #2] + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +declare void @llvm.prefetch(i8*, i32, i32) nounwind diff --git a/test/CodeGen/ARM/reg_sequence.ll b/test/CodeGen/ARM/reg_sequence.ll index 2e4f10d8a63d..53214fd4c302 100644 --- a/test/CodeGen/ARM/reg_sequence.ll +++ b/test/CodeGen/ARM/reg_sequence.ll @@ -46,8 +46,8 @@ entry: ; CHECK: t2: ; CHECK: vld1.16 ; CHECK-NOT: vmov -; CHECK: vld1.16 ; CHECK: vmul.i16 +; CHECK: vld1.16 ; CHECK: vmul.i16 ; CHECK-NOT: vmov ; CHECK: vst1.16 @@ -75,7 +75,8 @@ define <8 x i8> @t3(i8* %A, i8* %B) nounwind { ; CHECK: t3: ; CHECK: vld3.8 ; CHECK: vmul.i8 -; CHECK-NOT: vmov +; CHECK: vmov r +; CHECK-NOT: vmov d ; CHECK: vst3.8 %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2] %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 ; <<8 x i8>> [#uses=1] @@ -122,9 +123,9 @@ return1: return2: ; CHECK: %return2 ; CHECK: vadd.i32 -; CHECK: vmov q1, q3 +; CHECK: vmov q9, q11 ; CHECK-NOT: vmov -; CHECK: vst2.32 {d0, d1, d2, d3} +; CHECK: vst2.32 {d16, d17, d18, d19} %tmp100 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0 ; <<4 x i32>> [#uses=1] %tmp101 = extractvalue %struct.__neon_int32x4x2_t %tmp5, 1 ; <<4 x i32>> [#uses=1] %tmp102 = add <4 x i32> %tmp100, %tmp101 ; <<4 x i32>> [#uses=1] @@ -136,9 +137,9 @@ return2: define <8 x i16> @t5(i16* %A, <8 x i16>* %B) nounwind { ; CHECK: t5: ; CHECK: vldmia -; CHECK: vmov q1, q0 +; CHECK: vmov q9, q8 ; CHECK-NOT: vmov -; CHECK: vld2.16 {d0[1], d2[1]}, [r0] +; CHECK: vld2.16 {d16[1], d18[1]}, [r0] ; CHECK-NOT: vmov ; CHECK: vadd.i16 %tmp0 = bitcast i16* %A to i8* ; <i8*> [#uses=1] @@ -153,8 +154,8 @@ define <8 x i16> @t5(i16* %A, <8 x i16>* %B) nounwind { define <8 x i8> @t6(i8* %A, <8 x i8>* %B) nounwind { ; CHECK: t6: ; CHECK: vldr.64 -; CHECK: vmov d1, d0 -; CHECK-NEXT: vld2.8 {d0[1], d1[1]} +; CHECK: vmov d17, d16 +; CHECK-NEXT: vld2.8 {d16[1], d17[1]} %tmp1 = load <8 x i8>* %B ; <<8 x i8>> [#uses=2] %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) ; <%struct.__neon_int8x8x2_t> [#uses=2] %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0 ; <<8 x i8>> [#uses=1] @@ -168,10 +169,10 @@ entry: ; CHECK: t7: ; CHECK: vld2.32 ; CHECK: vst2.32 -; CHECK: vld1.32 {d0, d1}, -; CHECK: vmov q1, q0 +; CHECK: vld1.32 {d16, d17}, +; CHECK: vmov q9, q8 ; CHECK-NOT: vmov -; CHECK: vuzp.32 q0, q1 +; CHECK: vuzp.32 q8, q9 ; CHECK: vst1.32 %0 = bitcast i32* %iptr to i8* ; <i8*> [#uses=2] %1 = tail call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %0, i32 1) ; <%struct.__neon_int32x4x2_t> [#uses=2] @@ -188,7 +189,7 @@ entry: ; PR7156 define arm_aapcs_vfpcc i32 @t8() nounwind { ; CHECK: t8: -; CHECK: vrsqrte.f32 q0, q0 +; CHECK: vrsqrte.f32 q8, q8 bb.nph55.bb.nph55.split_crit_edge: br label %bb3 @@ -238,10 +239,10 @@ bb14: ; preds = %bb6 define arm_aapcs_vfpcc float @t9(%0* nocapture, %3* nocapture) nounwind { ; CHECK: t9: ; CHECK: vldr.64 -; CHECK-NOT: vmov d{{.*}}, d0 -; CHECK: vmov.i32 d1 -; CHECK-NEXT: vstmia r0, {d0, d1} -; CHECK-NEXT: vstmia r0, {d0, d1} +; CHECK-NOT: vmov d{{.*}}, d16 +; CHECK: vmov.i32 d17 +; CHECK-NEXT: vstmia r0, {d16, d17} +; CHECK-NEXT: vstmia r0, {d16, d17} %3 = bitcast double 0.000000e+00 to <2 x float> ; <<2 x float>> [#uses=2] %4 = shufflevector <2 x float> %3, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1] store <4 x float> %4, <4 x float>* undef, align 16 @@ -269,9 +270,9 @@ define arm_aapcs_vfpcc float @t9(%0* nocapture, %3* nocapture) nounwind { define arm_aapcs_vfpcc i32 @t10() nounwind { entry: ; CHECK: t10: -; CHECK: vmov.i32 q1, #0x3F000000 -; CHECK: vmov d0, d1 -; CHECK: vmla.f32 q0, q0, d0[0] +; CHECK: vmul.f32 q8, q8, d0[0] +; CHECK: vmov.i32 q9, #0x3F000000 +; CHECK: vadd.f32 q8, q8, q8 %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] %1 = insertelement <4 x float> %0, float undef, i32 1 ; <<4 x float>> [#uses=1] %2 = insertelement <4 x float> %1, float undef, i32 2 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/ARM/remat.ll b/test/CodeGen/ARM/remat.ll deleted file mode 100644 index 6b86f1a9f368..000000000000 --- a/test/CodeGen/ARM/remat.ll +++ /dev/null @@ -1,65 +0,0 @@ -; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -o /dev/null -stats -info-output-file - | grep "Number of re-materialization" - -define i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind { -entry: - br i1 undef, label %smvp.exit, label %bb.i3 - -bb.i3: ; preds = %bb.i3, %bb134 - br i1 undef, label %smvp.exit, label %bb.i3 - -smvp.exit: ; preds = %bb.i3 - %0 = fmul double %d1, 2.400000e-03 ; <double> [#uses=2] - br i1 undef, label %bb138.preheader, label %bb159 - -bb138.preheader: ; preds = %smvp.exit - br label %bb138 - -bb138: ; preds = %bb138, %bb138.preheader - br i1 undef, label %bb138, label %bb145.loopexit - -bb142: ; preds = %bb.nph218.bb.nph218.split_crit_edge, %phi0.exit - %1 = fmul double %d1, -1.200000e-03 ; <double> [#uses=1] - %2 = fadd double %d2, %1 ; <double> [#uses=1] - %3 = fmul double %2, %d2 ; <double> [#uses=1] - %4 = fsub double 0.000000e+00, %3 ; <double> [#uses=1] - br i1 %14, label %phi1.exit, label %bb.i35 - -bb.i35: ; preds = %bb142 - %5 = call double @sin(double %15) nounwind readonly ; <double> [#uses=1] - %6 = fmul double %5, 0x4031740AFA84AD8A ; <double> [#uses=1] - %7 = fsub double 1.000000e+00, undef ; <double> [#uses=1] - %8 = fdiv double %7, 6.000000e-01 ; <double> [#uses=1] - br label %phi1.exit - -phi1.exit: ; preds = %bb.i35, %bb142 - %.pn = phi double [ %6, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1] - %9 = phi double [ %8, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1] - %10 = fmul double %.pn, %9 ; <double> [#uses=1] - br i1 %14, label %phi0.exit, label %bb.i - -bb.i: ; preds = %phi1.exit - unreachable - -phi0.exit: ; preds = %phi1.exit - %11 = fsub double %4, %10 ; <double> [#uses=1] - %12 = fadd double 0.000000e+00, %11 ; <double> [#uses=1] - store double %12, double* undef, align 4 - br label %bb142 - -bb145.loopexit: ; preds = %bb138 - br i1 undef, label %bb.nph218.bb.nph218.split_crit_edge, label %bb159 - -bb.nph218.bb.nph218.split_crit_edge: ; preds = %bb145.loopexit - %13 = fmul double %0, 0x401921FB54442D18 ; <double> [#uses=1] - %14 = fcmp ugt double %0, 6.000000e-01 ; <i1> [#uses=2] - %15 = fdiv double %13, 6.000000e-01 ; <double> [#uses=1] - br label %bb142 - -bb159: ; preds = %bb145.loopexit, %smvp.exit, %bb134 - unreachable - -bb166: ; preds = %bb127 - unreachable -} - -declare double @sin(double) nounwind readonly diff --git a/test/CodeGen/ARM/rev.ll b/test/CodeGen/ARM/rev.ll index 1c12268ef86c..687bf8834c9f 100644 --- a/test/CodeGen/ARM/rev.ll +++ b/test/CodeGen/ARM/rev.ll @@ -1,27 +1,30 @@ -; RUN: llc < %s -march=arm -mattr=+v6 | grep rev16 -; RUN: llc < %s -march=arm -mattr=+v6 | grep revsh +; RUN: llc < %s -march=arm -mattr=+v6 | FileCheck %s define i32 @test1(i32 %X) { - %tmp1 = lshr i32 %X, 8 ; <i32> [#uses=3] - %X15 = bitcast i32 %X to i32 ; <i32> [#uses=1] - %tmp4 = shl i32 %X15, 8 ; <i32> [#uses=2] - %tmp2 = and i32 %tmp1, 16711680 ; <i32> [#uses=1] - %tmp5 = and i32 %tmp4, -16777216 ; <i32> [#uses=1] - %tmp9 = and i32 %tmp1, 255 ; <i32> [#uses=1] - %tmp13 = and i32 %tmp4, 65280 ; <i32> [#uses=1] - %tmp6 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1] - %tmp10 = or i32 %tmp6, %tmp13 ; <i32> [#uses=1] - %tmp14 = or i32 %tmp10, %tmp9 ; <i32> [#uses=1] +; CHECK: test1 +; CHECK: rev16 r0, r0 + %tmp1 = lshr i32 %X, 8 + %X15 = bitcast i32 %X to i32 + %tmp4 = shl i32 %X15, 8 + %tmp2 = and i32 %tmp1, 16711680 + %tmp5 = and i32 %tmp4, -16777216 + %tmp9 = and i32 %tmp1, 255 + %tmp13 = and i32 %tmp4, 65280 + %tmp6 = or i32 %tmp5, %tmp2 + %tmp10 = or i32 %tmp6, %tmp13 + %tmp14 = or i32 %tmp10, %tmp9 ret i32 %tmp14 } define i32 @test2(i32 %X) { - %tmp1 = lshr i32 %X, 8 ; <i32> [#uses=1] - %tmp1.upgrd.1 = trunc i32 %tmp1 to i16 ; <i16> [#uses=1] - %tmp3 = trunc i32 %X to i16 ; <i16> [#uses=1] - %tmp2 = and i16 %tmp1.upgrd.1, 255 ; <i16> [#uses=1] - %tmp4 = shl i16 %tmp3, 8 ; <i16> [#uses=1] - %tmp5 = or i16 %tmp2, %tmp4 ; <i16> [#uses=1] - %tmp5.upgrd.2 = sext i16 %tmp5 to i32 ; <i32> [#uses=1] +; CHECK: test2 +; CHECK: revsh r0, r0 + %tmp1 = lshr i32 %X, 8 + %tmp1.upgrd.1 = trunc i32 %tmp1 to i16 + %tmp3 = trunc i32 %X to i16 + %tmp2 = and i16 %tmp1.upgrd.1, 255 + %tmp4 = shl i16 %tmp3, 8 + %tmp5 = or i16 %tmp2, %tmp4 + %tmp5.upgrd.2 = sext i16 %tmp5 to i32 ret i32 %tmp5.upgrd.2 } diff --git a/test/CodeGen/ARM/select-imm.ll b/test/CodeGen/ARM/select-imm.ll index 6e15fde045fb..578834ec93bc 100644 --- a/test/CodeGen/ARM/select-imm.ll +++ b/test/CodeGen/ARM/select-imm.ll @@ -1,5 +1,6 @@ -; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM -; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=T2 +; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=ARMT2 +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s --check-prefix=THUMB2 define i32 @t1(i32 %c) nounwind readnone { entry: @@ -8,9 +9,13 @@ entry: ; ARM: orr r1, r1, #1, 24 ; ARM: movgt r0, #123 -; T2: t1: -; T2: movw r0, #357 -; T2: movgt r0, #123 +; ARMT2: t1: +; ARMT2: movw r0, #357 +; ARMT2: movgt r0, #123 + +; THUMB2: t1: +; THUMB2: movw r0, #357 +; THUMB2: movgt r0, #123 %0 = icmp sgt i32 %c, 1 %1 = select i1 %0, i32 123, i32 357 @@ -20,13 +25,17 @@ entry: define i32 @t2(i32 %c) nounwind readnone { entry: ; ARM: t2: -; ARM: mov r1, #101 -; ARM: orr r1, r1, #1, 24 -; ARM: movle r0, #123 +; ARM: mov r0, #123 +; ARM: movgt r0, #101 +; ARM: orrgt r0, r0, #1, 24 -; T2: t2: -; T2: movw r0, #357 -; T2: movle r0, #123 +; ARMT2: t2: +; ARMT2: mov r0, #123 +; ARMT2: movwgt r0, #357 + +; THUMB2: t2: +; THUMB2: mov.w r0, #123 +; THUMB2: movwgt r0, #357 %0 = icmp sgt i32 %c, 1 %1 = select i1 %0, i32 357, i32 123 @@ -39,10 +48,31 @@ entry: ; ARM: mov r0, #0 ; ARM: moveq r0, #1 -; T2: t3: -; T2: mov r0, #0 -; T2: moveq r0, #1 +; ARMT2: t3: +; ARMT2: mov r0, #0 +; ARMT2: moveq r0, #1 + +; THUMB2: t3: +; THUMB2: mov.w r0, #0 +; THUMB2: moveq r0, #1 %0 = icmp eq i32 %a, 160 %1 = zext i1 %0 to i32 ret i32 %1 } + +define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind { +entry: +; ARM: t4: +; ARM: ldr +; ARM: movlt + +; ARMT2: t4: +; ARMT2: movwlt r0, #65365 +; ARMT2: movtlt r0, #65365 + +; THUMB2: t4: +; THUMB2: mvnlt.w r0, #11141290 + %0 = icmp slt i32 %a, %b + %1 = select i1 %0, i32 4283826005, i32 %x + ret i32 %1 +} diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll index 7413bed5c5b1..1aa0d3904125 100644 --- a/test/CodeGen/ARM/select.ll +++ b/test/CodeGen/ARM/select.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP ; RUN: llc < %s -mattr=+neon,+thumb2 -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=CHECK-NEON @@ -79,9 +79,9 @@ define double @f7(double %a, double %b) { ; CHECK-NEON: movw [[REGISTER_1:r[0-9]+]], #1123 ; CHECK-NEON-NEXT: movs [[REGISTER_2:r[0-9]+]], #0 ; CHECK-NEON-NEXT: cmp r0, [[REGISTER_1]] -; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], #LCPI ; CHECK-NEON-NEXT: it eq ; CHECK-NEON-NEXT: moveq [[REGISTER_2]], #4 +; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], #LCPI ; CHECK-NEON-NEXT: ldr ; CHECK-NEON: bx diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll index 7fd91ceea5ad..5dabfc3a82a3 100644 --- a/test/CodeGen/ARM/select_xform.ll +++ b/test/CodeGen/ARM/select_xform.ll @@ -1,15 +1,60 @@ -; RUN: llc < %s -march=arm | grep mov | count 2 +; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -mtriple=thumb-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=T2 +; rdar://8662825 define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { - %tmp1 = icmp sgt i32 %c, 10 - %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 - %tmp3 = add i32 %tmp2, %b - ret i32 %tmp3 +; ARM: t1: +; ARM: sub r0, r1, #6, 2 +; ARM: movgt r0, r1 + +; T2: t1: +; T2: mvn r0, #-2147483648 +; T2: add r0, r1 +; T2: movgt r0, r1 + %tmp1 = icmp sgt i32 %c, 10 + %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 + %tmp3 = add i32 %tmp2, %b + ret i32 %tmp3 } define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { - %tmp1 = icmp sgt i32 %c, 10 - %tmp2 = select i1 %tmp1, i32 0, i32 10 - %tmp3 = sub i32 %b, %tmp2 - ret i32 %tmp3 +; ARM: t2: +; ARM: sub r0, r1, #10 +; ARM: movgt r0, r1 + +; T2: t2: +; T2: sub.w r0, r1, #10 +; T2: movgt r0, r1 + %tmp1 = icmp sgt i32 %c, 10 + %tmp2 = select i1 %tmp1, i32 0, i32 10 + %tmp3 = sub i32 %b, %tmp2 + ret i32 %tmp3 +} + +define i32 @t3(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { +; ARM: t3: +; ARM: mvnlt r2, #0 +; ARM: and r0, r2, r3 + +; T2: t3: +; T2: movlt.w r2, #-1 +; T2: and.w r0, r2, r3 + %cond = icmp slt i32 %a, %b + %z = select i1 %cond, i32 -1, i32 %x + %s = and i32 %z, %y + ret i32 %s +} + +define i32 @t4(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { +; ARM: t4: +; ARM: movlt r2, #0 +; ARM: orr r0, r2, r3 + +; T2: t4: +; T2: movlt r2, #0 +; T2: orr.w r0, r2, r3 + %cond = icmp slt i32 %a, %b + %z = select i1 %cond, i32 0, i32 %x + %s = or i32 %z, %y + ret i32 %s } diff --git a/test/CodeGen/ARM/shifter_operand.ll b/test/CodeGen/ARM/shifter_operand.ll index 2bbe9fd2602c..01e3a922f656 100644 --- a/test/CodeGen/ARM/shifter_operand.ll +++ b/test/CodeGen/ARM/shifter_operand.ll @@ -1,18 +1,72 @@ -; RUN: llc < %s -march=arm | grep add | grep lsl -; RUN: llc < %s -march=arm | grep bic | grep asr +; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8 +; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s -check-prefix=A9 +; rdar://8576755 define i32 @test1(i32 %X, i32 %Y, i8 %sh) { - %shift.upgrd.1 = zext i8 %sh to i32 ; <i32> [#uses=1] - %A = shl i32 %Y, %shift.upgrd.1 ; <i32> [#uses=1] - %B = add i32 %X, %A ; <i32> [#uses=1] +; A8: test1: +; A8: add r0, r0, r1, lsl r2 + +; A9: test1: +; A9: add r0, r0, r1, lsl r2 + %shift.upgrd.1 = zext i8 %sh to i32 + %A = shl i32 %Y, %shift.upgrd.1 + %B = add i32 %X, %A ret i32 %B } define i32 @test2(i32 %X, i32 %Y, i8 %sh) { - %shift.upgrd.2 = zext i8 %sh to i32 ; <i32> [#uses=1] - %A = ashr i32 %Y, %shift.upgrd.2 ; <i32> [#uses=1] - %B = xor i32 %A, -1 ; <i32> [#uses=1] - %C = and i32 %X, %B ; <i32> [#uses=1] +; A8: test2: +; A8: bic r0, r0, r1, asr r2 + +; A9: test2: +; A9: bic r0, r0, r1, asr r2 + %shift.upgrd.2 = zext i8 %sh to i32 + %A = ashr i32 %Y, %shift.upgrd.2 + %B = xor i32 %A, -1 + %C = and i32 %X, %B ret i32 %C } + +define i32 @test3(i32 %base, i32 %base2, i32 %offset) { +entry: +; A8: test3: +; A8: ldr r0, [r0, r2, lsl #2] +; A8: ldr r1, [r1, r2, lsl #2] + +; lsl #2 is free +; A9: test3: +; A9: ldr r0, [r0, r2, lsl #2] +; A9: ldr r1, [r1, r2, lsl #2] + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = add i32 %base2, %tmp1 + %tmp5 = inttoptr i32 %tmp4 to i32* + %tmp6 = load i32* %tmp3 + %tmp7 = load i32* %tmp5 + %tmp8 = add i32 %tmp7, %tmp6 + ret i32 %tmp8 +} + +declare i8* @malloc(...) + +define fastcc void @test4() nounwind { +entry: +; A8: test4: +; A8: ldr r1, [r0, r0, lsl #2] +; A8: str r1, [r0, r0, lsl #2] + +; A9: test4: +; A9: add r0, r0, r0, lsl #2 +; A9: ldr r1, [r0] +; A9: str r1, [r0] + %0 = tail call i8* (...)* @malloc(i32 undef) nounwind + %1 = bitcast i8* %0 to i32* + %2 = sext i16 undef to i32 + %3 = getelementptr inbounds i32* %1, i32 %2 + %4 = load i32* %3, align 4 + %5 = add nsw i32 %4, 1 + store i32 %5, i32* %3, align 4 + ret void +} diff --git a/test/CodeGen/ARM/spill-q.ll b/test/CodeGen/ARM/spill-q.ll index ae1ba2f73825..bf4e55cb06c4 100644 --- a/test/CodeGen/ARM/spill-q.ll +++ b/test/CodeGen/ARM/spill-q.ll @@ -15,11 +15,34 @@ define void @aaa(%quuz* %this, i8* %block) { ; CHECK: vst1.64 {{.*}}sp, :128 ; CHECK: vld1.64 {{.*}}sp, :128 entry: - %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] + %aligned_vec = alloca <4 x float>, align 16 + %"alloca point" = bitcast i32 0 to i32 + %vecptr = bitcast <4 x float>* %aligned_vec to i8* + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %vecptr, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 6.300000e+01, float* undef, align 4 %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 0.000000e+00, float* undef, align 4 %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] + %ld3 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld4 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld5 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld6 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld7 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld8 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld9 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld10 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld11 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld12 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 %val173 = load <4 x float>* undef ; <<4 x float>> [#uses=1] br label %bb4 @@ -44,7 +67,16 @@ bb4: ; preds = %bb193, %entry %18 = fmul <4 x float> %17, %val173 ; <<4 x float>> [#uses=1] %19 = shufflevector <4 x float> %18, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1] %20 = shufflevector <2 x float> %19, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] - %21 = fadd <4 x float> zeroinitializer, %20 ; <<4 x float>> [#uses=2] + %tmp1 = fadd <4 x float> %20, %ld3 + %tmp2 = fadd <4 x float> %tmp1, %ld4 + %tmp3 = fadd <4 x float> %tmp2, %ld5 + %tmp4 = fadd <4 x float> %tmp3, %ld6 + %tmp5 = fadd <4 x float> %tmp4, %ld7 + %tmp6 = fadd <4 x float> %tmp5, %ld8 + %tmp7 = fadd <4 x float> %tmp6, %ld9 + %tmp8 = fadd <4 x float> %tmp7, %ld10 + %tmp9 = fadd <4 x float> %tmp8, %ld11 + %21 = fadd <4 x float> %tmp9, %ld12 %22 = fcmp ogt <4 x float> %besterror.0.2264, %21 ; <<4 x i1>> [#uses=0] %tmp = extractelement <4 x i1> %22, i32 0 br i1 %tmp, label %bb193, label %bb186 diff --git a/test/CodeGen/ARM/stm.ll b/test/CodeGen/ARM/stm.ll index 22a7ecb4aa28..2f5fadbee28a 100644 --- a/test/CodeGen/ARM/stm.ll +++ b/test/CodeGen/ARM/stm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 | grep stm | count 2 +; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 | FileCheck %s @"\01LC" = internal constant [32 x i8] c"Boolean Not: %d %d %d %d %d %d\0A\00", section "__TEXT,__cstring,cstring_literals" ; <[32 x i8]*> [#uses=1] @"\01LC1" = internal constant [26 x i8] c"Bitwise Not: %d %d %d %d\0A\00", section "__TEXT,__cstring,cstring_literals" ; <[26 x i8]*> [#uses=1] @@ -7,6 +7,9 @@ declare i32 @printf(i8* nocapture, ...) nounwind define i32 @main() nounwind { entry: +; CHECK: main +; CHECK: push +; CHECK: stmib %0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([26 x i8]* @"\01LC1", i32 0, i32 0), i32 -2, i32 -3, i32 2, i32 -6) nounwind ; <i32> [#uses=0] %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([32 x i8]* @"\01LC", i32 0, i32 0), i32 0, i32 1, i32 0, i32 1, i32 0, i32 1) nounwind ; <i32> [#uses=0] ret i32 0 diff --git a/test/CodeGen/ARM/str_pre-2.ll b/test/CodeGen/ARM/str_pre-2.ll index 553cd64fce94..465c7e676c56 100644 --- a/test/CodeGen/ARM/str_pre-2.ll +++ b/test/CodeGen/ARM/str_pre-2.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -mtriple=arm-linux-gnu | grep {str.*\\!} -; RUN: llc < %s -mtriple=arm-linux-gnu | grep {ldr.*\\\[.*\], #4} +; RUN: llc < %s -mtriple=armv6-linux-gnu | FileCheck %s @b = external global i64* define i64 @t(i64 %a) nounwind readonly { entry: +; CHECK: str lr, [sp, #-4]! +; CHECK: ldr lr, [sp], #4 %0 = load i64** @b, align 4 %1 = load i64* %0, align 4 %2 = mul i64 %1, %a diff --git a/test/CodeGen/ARM/tail-opts.ll b/test/CodeGen/ARM/tail-opts.ll index 17c8baedbfa8..5b3dce386bb7 100644 --- a/test/CodeGen/ARM/tail-opts.ll +++ b/test/CodeGen/ARM/tail-opts.ll @@ -17,13 +17,16 @@ declare i8* @choose(i8*, i8*) ; CHECK: tail_duplicate_me: ; CHECK: qux ; CHECK: qux -; CHECK: ldr r{{.}}, LCPI +; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK +; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK ; CHECK: str r ; CHECK-NEXT: bx r -; CHECK: ldr r{{.}}, LCPI +; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK +; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK ; CHECK: str r ; CHECK-NEXT: bx r -; CHECK: ldr r{{.}}, LCPI +; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK +; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK ; CHECK: str r ; CHECK-NEXT: bx r diff --git a/test/CodeGen/ARM/thumb1-varalloc.ll b/test/CodeGen/ARM/thumb1-varalloc.ll new file mode 100644 index 000000000000..25093fee225a --- /dev/null +++ b/test/CodeGen/ARM/thumb1-varalloc.ll @@ -0,0 +1,40 @@ +; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s +; rdar://8819685 + +@__bar = external hidden global i8* +@__baz = external hidden global i8* + +define i8* @_foo() { +entry: +; CHECK: foo: + + %size = alloca i32, align 4 + %0 = load i8** @__bar, align 4 + %1 = icmp eq i8* %0, null + br i1 %1, label %bb1, label %bb3 + +bb1: + store i32 1026, i32* %size, align 4 + %2 = alloca [1026 x i8], align 1 +; CHECK: mov r0, sp +; CHECK: adds r4, r0, r4 + %3 = getelementptr inbounds [1026 x i8]* %2, i32 0, i32 0 + %4 = call i32 @_called_func(i8* %3, i32* %size) nounwind + %5 = icmp eq i32 %4, 0 + br i1 %5, label %bb2, label %bb3 + +bb2: + %6 = call i8* @strdup(i8* %3) nounwind + store i8* %6, i8** @__baz, align 4 + br label %bb3 + +bb3: + %.0 = phi i8* [ %0, %entry ], [ %6, %bb2 ], [ %3, %bb1 ] +; CHECK: subs r4, #5 +; CHECK-NEXT: mov sp, r4 +; CHECK-NEXT: pop {r4, r5, r6, r7, pc} + ret i8* %.0 +} + +declare noalias i8* @strdup(i8* nocapture) nounwind +declare i32 @_called_func(i8*, i32*) nounwind
\ No newline at end of file diff --git a/test/CodeGen/ARM/umulo-32.ll b/test/CodeGen/ARM/umulo-32.ll new file mode 100644 index 000000000000..aa7d28a62349 --- /dev/null +++ b/test/CodeGen/ARM/umulo-32.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s + +%umul.ty = type { i32, i1 } + +define i32 @func(i32 %a) nounwind { +; CHECK: func +; CHECK: muldi3 + %tmp0 = tail call %umul.ty @llvm.umul.with.overflow.i32(i32 %a, i32 37) + %tmp1 = extractvalue %umul.ty %tmp0, 0 + %tmp2 = select i1 undef, i32 -1, i32 %tmp1 + ret i32 %tmp2 +} + +declare %umul.ty @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone diff --git a/test/CodeGen/ARM/unaligned_load_store.ll b/test/CodeGen/ARM/unaligned_load_store.ll index e2794919d9da..b42e11f2c4ab 100644 --- a/test/CodeGen/ARM/unaligned_load_store.ll +++ b/test/CodeGen/ARM/unaligned_load_store.ll @@ -1,5 +1,6 @@ -; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=GENERIC +; RUN: llc < %s -march=arm -pre-RA-sched=source | FileCheck %s -check-prefix=GENERIC ; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6 +; RUN: llc < %s -mtriple=armv6-apple-darwin -arm-strict-align | FileCheck %s -check-prefix=GENERIC ; RUN: llc < %s -mtriple=armv6-linux | FileCheck %s -check-prefix=GENERIC ; rdar://7113725 diff --git a/test/CodeGen/ARM/vbits.ll b/test/CodeGen/ARM/vbits.ll index 293d22938a76..51f9bdf9718b 100644 --- a/test/CodeGen/ARM/vbits.ll +++ b/test/CodeGen/ARM/vbits.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+neon -mcpu=cortex-a8 | FileCheck %s define <8 x i8> @v_andi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { ;CHECK: v_andi8: @@ -505,3 +505,43 @@ define <4 x i32> @vtstQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind { %tmp5 = sext <4 x i1> %tmp4 to <4 x i32> ret <4 x i32> %tmp5 } + +define <8 x i8> @v_orrimm(<8 x i8>* %A) nounwind { +; CHECK: v_orrimm: +; CHECK-NOT: vmov +; CHECK-NOT: vmvn +; CHECK: vorr + %tmp1 = load <8 x i8>* %A + %tmp3 = or <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 1> + ret <8 x i8> %tmp3 +} + +define <16 x i8> @v_orrimmQ(<16 x i8>* %A) nounwind { +; CHECK: v_orrimmQ +; CHECK-NOT: vmov +; CHECK-NOT: vmvn +; CHECK: vorr + %tmp1 = load <16 x i8>* %A + %tmp3 = or <16 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 1> + ret <16 x i8> %tmp3 +} + +define <8 x i8> @v_bicimm(<8 x i8>* %A) nounwind { +; CHECK: v_bicimm: +; CHECK-NOT: vmov +; CHECK-NOT: vmvn +; CHECK: vbic + %tmp1 = load <8 x i8>* %A + %tmp3 = and <8 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0 > + ret <8 x i8> %tmp3 +} + +define <16 x i8> @v_bicimmQ(<16 x i8>* %A) nounwind { +; CHECK: v_bicimmQ: +; CHECK-NOT: vmov +; CHECK-NOT: vmvn +; CHECK: vbic + %tmp1 = load <16 x i8>* %A + %tmp3 = and <16 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0 > + ret <16 x i8> %tmp3 +} diff --git a/test/CodeGen/ARM/vceq.ll b/test/CodeGen/ARM/vceq.ll index e4787518e731..051c349a06a4 100644 --- a/test/CodeGen/ARM/vceq.ll +++ b/test/CodeGen/ARM/vceq.ll @@ -79,3 +79,14 @@ define <4 x i32> @vceqQf32(<4 x float>* %A, <4 x float>* %B) nounwind { %tmp4 = sext <4 x i1> %tmp3 to <4 x i32> ret <4 x i32> %tmp4 } + +define <8 x i8> @vceqi8Z(<8 x i8>* %A) nounwind { +;CHECK: vceqi8Z: +;CHECK-NOT: vmov +;CHECK-NOT: vmvn +;CHECK: vceq.i8 + %tmp1 = load <8 x i8>* %A + %tmp3 = icmp eq <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> + %tmp4 = sext <8 x i1> %tmp3 to <8 x i8> + ret <8 x i8> %tmp4 +} diff --git a/test/CodeGen/ARM/vcge.ll b/test/CodeGen/ARM/vcge.ll index 2c161113c113..bf5f0b9efb2f 100644 --- a/test/CodeGen/ARM/vcge.ll +++ b/test/CodeGen/ARM/vcge.ll @@ -160,3 +160,44 @@ define <4 x i32> @vacgeQf32(<4 x float>* %A, <4 x float>* %B) nounwind { declare <2 x i32> @llvm.arm.neon.vacged(<2 x float>, <2 x float>) nounwind readnone declare <4 x i32> @llvm.arm.neon.vacgeq(<4 x float>, <4 x float>) nounwind readnone + +define <8 x i8> @vcgei8Z(<8 x i8>* %A) nounwind { +;CHECK: vcgei8Z: +;CHECK-NOT: vmov +;CHECK-NOT: vmvn +;CHECK: vcge.s8 + %tmp1 = load <8 x i8>* %A + %tmp3 = icmp sge <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> + %tmp4 = sext <8 x i1> %tmp3 to <8 x i8> + ret <8 x i8> %tmp4 +} + +define <8 x i8> @vclei8Z(<8 x i8>* %A) nounwind { +;CHECK: vclei8Z: +;CHECK-NOT: vmov +;CHECK-NOT: vmvn +;CHECK: vcle.s8 + %tmp1 = load <8 x i8>* %A + %tmp3 = icmp sle <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> + %tmp4 = sext <8 x i1> %tmp3 to <8 x i8> + ret <8 x i8> %tmp4 +} + +; Radar 8782191 +; Floating-point comparisons against zero produce results with integer +; elements, not floating-point elements. +define void @test_vclez_fp() nounwind optsize { +;CHECK: test_vclez_fp +;CHECK: vcle.f32 +entry: + %0 = fcmp ole <4 x float> undef, zeroinitializer + %1 = sext <4 x i1> %0 to <4 x i16> + %2 = add <4 x i16> %1, zeroinitializer + %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> + %4 = add <8 x i16> %3, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> + %5 = trunc <8 x i16> %4 to <8 x i8> + tail call void @llvm.arm.neon.vst1.v8i8(i8* undef, <8 x i8> %5, i32 1) + unreachable +} + +declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>, i32) nounwind diff --git a/test/CodeGen/ARM/vcgt.ll b/test/CodeGen/ARM/vcgt.ll index 194093c8418c..c3c4cb356307 100644 --- a/test/CodeGen/ARM/vcgt.ll +++ b/test/CodeGen/ARM/vcgt.ll @@ -161,9 +161,9 @@ define <4 x i32> @vacgtQf32(<4 x float>* %A, <4 x float>* %B) nounwind { ; rdar://7923010 define <4 x i32> @vcgt_zext(<4 x float>* %A, <4 x float>* %B) nounwind { ;CHECK: vcgt_zext: -;CHECK: vcgt.f32 q0 -;CHECK: vmov.i32 q1, #0x1 -;CHECK: vand q0, q0, q1 +;CHECK: vmov.i32 q10, #0x1 +;CHECK: vcgt.f32 q8 +;CHECK: vand q8, q8, q10 %tmp1 = load <4 x float>* %A %tmp2 = load <4 x float>* %B %tmp3 = fcmp ogt <4 x float> %tmp1, %tmp2 @@ -173,3 +173,25 @@ define <4 x i32> @vcgt_zext(<4 x float>* %A, <4 x float>* %B) nounwind { declare <2 x i32> @llvm.arm.neon.vacgtd(<2 x float>, <2 x float>) nounwind readnone declare <4 x i32> @llvm.arm.neon.vacgtq(<4 x float>, <4 x float>) nounwind readnone + +define <8 x i8> @vcgti8Z(<8 x i8>* %A) nounwind { +;CHECK: vcgti8Z: +;CHECK-NOT: vmov +;CHECK-NOT: vmvn +;CHECK: vcgt.s8 + %tmp1 = load <8 x i8>* %A + %tmp3 = icmp sgt <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> + %tmp4 = sext <8 x i1> %tmp3 to <8 x i8> + ret <8 x i8> %tmp4 +} + +define <8 x i8> @vclti8Z(<8 x i8>* %A) nounwind { +;CHECK: vclti8Z: +;CHECK-NOT: vmov +;CHECK-NOT: vmvn +;CHECK: vclt.s8 + %tmp1 = load <8 x i8>* %A + %tmp3 = icmp slt <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> + %tmp4 = sext <8 x i1> %tmp3 to <8 x i8> + ret <8 x i8> %tmp4 +} diff --git a/test/CodeGen/ARM/vcombine.ll b/test/CodeGen/ARM/vcombine.ll index e6733051f269..527f93b6637c 100644 --- a/test/CodeGen/ARM/vcombine.ll +++ b/test/CodeGen/ARM/vcombine.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -march=arm -mattr=+neon +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +; CHECK: vcombine8 +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> @@ -8,6 +11,9 @@ define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind { } define <8 x i16> @vcombine16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +; CHECK: vcombine16 +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> @@ -15,6 +21,9 @@ define <8 x i16> @vcombine16(<4 x i16>* %A, <4 x i16>* %B) nounwind { } define <4 x i32> @vcombine32(<2 x i32>* %A, <2 x i32>* %B) nounwind { +; CHECK: vcombine32 +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -22,6 +31,9 @@ define <4 x i32> @vcombine32(<2 x i32>* %A, <2 x i32>* %B) nounwind { } define <4 x float> @vcombinefloat(<2 x float>* %A, <2 x float>* %B) nounwind { +; CHECK: vcombinefloat +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <2 x float>* %A %tmp2 = load <2 x float>* %B %tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -29,8 +41,32 @@ define <4 x float> @vcombinefloat(<2 x float>* %A, <2 x float>* %B) nounwind { } define <2 x i64> @vcombine64(<1 x i64>* %A, <1 x i64>* %B) nounwind { +; CHECK: vcombine64 +; CHECK: vmov r0, r1, d16 +; CHECK: vmov r2, r3, d17 %tmp1 = load <1 x i64>* %A %tmp2 = load <1 x i64>* %B %tmp3 = shufflevector <1 x i64> %tmp1, <1 x i64> %tmp2, <2 x i32> <i32 0, i32 1> ret <2 x i64> %tmp3 } + +; Check for vget_low and vget_high implemented with shufflevector. PR8411. +; They should not require storing to the stack. + +define <4 x i16> @vget_low16(<8 x i16>* %A) nounwind { +; CHECK: vget_low16 +; CHECK-NOT: vst +; CHECK: vmov r0, r1, d16 + %tmp1 = load <8 x i16>* %A + %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + ret <4 x i16> %tmp2 +} + +define <8 x i8> @vget_high8(<16 x i8>* %A) nounwind { +; CHECK: vget_high8 +; CHECK-NOT: vst +; CHECK: vmov r0, r1, d17 + %tmp1 = load <16 x i8>* %A + %tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> + ret <8 x i8> %tmp2 +} diff --git a/test/CodeGen/ARM/vcvt.ll b/test/CodeGen/ARM/vcvt.ll index f4cc5368d9aa..c078f493094b 100644 --- a/test/CodeGen/ARM/vcvt.ll +++ b/test/CodeGen/ARM/vcvt.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+neon,+fp16 | FileCheck %s define <2 x i32> @vcvt_f32tos32(<2 x float>* %A) nounwind { ;CHECK: vcvt_f32tos32: @@ -138,3 +138,21 @@ declare <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float>, i32) nounwi declare <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone declare <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone +define <4 x float> @vcvt_f16tof32(<4 x i16>* %A) nounwind { +;CHECK: vcvt_f16tof32: +;CHECK: vcvt.f32.f16 + %tmp1 = load <4 x i16>* %A + %tmp2 = call <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16> %tmp1) + ret <4 x float> %tmp2 +} + +define <4 x i16> @vcvt_f32tof16(<4 x float>* %A) nounwind { +;CHECK: vcvt_f32tof16: +;CHECK: vcvt.f16.f32 + %tmp1 = load <4 x float>* %A + %tmp2 = call <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float> %tmp1) + ret <4 x i16> %tmp2 +} + +declare <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16>) nounwind readnone +declare <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float>) nounwind readnone diff --git a/test/CodeGen/ARM/vdup.ll b/test/CodeGen/ARM/vdup.ll index a545f6c03d5b..e99fac1f1e67 100644 --- a/test/CodeGen/ARM/vdup.ll +++ b/test/CodeGen/ARM/vdup.ll @@ -162,24 +162,6 @@ define <4 x float> @v_shuffledupQfloat(float %A) nounwind { ret <4 x float> %tmp2 } -define <2 x float> @v_shuffledupfloat2(float* %A) nounwind { -;CHECK: v_shuffledupfloat2: -;CHECK: vdup.32 - %tmp0 = load float* %A - %tmp1 = insertelement <2 x float> undef, float %tmp0, i32 0 - %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer - ret <2 x float> %tmp2 -} - -define <4 x float> @v_shuffledupQfloat2(float* %A) nounwind { -;CHECK: v_shuffledupQfloat2: -;CHECK: vdup.32 - %tmp0 = load float* %A - %tmp1 = insertelement <4 x float> undef, float %tmp0, i32 0 - %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer - ret <4 x float> %tmp2 -} - define <8 x i8> @vduplane8(<8 x i8>* %A) nounwind { ;CHECK: vduplane8: ;CHECK: vdup.8 diff --git a/test/CodeGen/ARM/vector-DAGCombine.ll b/test/CodeGen/ARM/vector-DAGCombine.ll new file mode 100644 index 000000000000..3ab0cfcbbc77 --- /dev/null +++ b/test/CodeGen/ARM/vector-DAGCombine.ll @@ -0,0 +1,107 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s + +; PR7158 +define i32 @test_pr7158() nounwind { +bb.nph55.bb.nph55.split_crit_edge: + br label %bb3 + +bb3: ; preds = %bb3, %bb.nph55.bb.nph55.split_crit_edge + br i1 undef, label %bb.i19, label %bb3 + +bb.i19: ; preds = %bb.i19, %bb3 + %0 = insertelement <4 x float> undef, float undef, i32 3 ; <<4 x float>> [#uses=3] + %1 = fmul <4 x float> %0, %0 ; <<4 x float>> [#uses=1] + %2 = bitcast <4 x float> %1 to <2 x double> ; <<2 x double>> [#uses=0] + %3 = fmul <4 x float> %0, undef ; <<4 x float>> [#uses=0] + br label %bb.i19 +} + +; Check that the DAG combiner does not arbitrarily modify BUILD_VECTORs +; after legalization. +define void @test_illegal_build_vector() nounwind { +entry: + store <2 x i64> undef, <2 x i64>* undef, align 16 + %0 = load <16 x i8>* undef, align 16 ; <<16 x i8>> [#uses=1] + %1 = or <16 x i8> zeroinitializer, %0 ; <<16 x i8>> [#uses=1] + store <16 x i8> %1, <16 x i8>* undef, align 16 + ret void +} + +; Radar 8407927: Make sure that VMOVRRD gets optimized away when the result is +; converted back to be used as a vector type. +; CHECK: test_vmovrrd_combine +define <4 x i32> @test_vmovrrd_combine() nounwind { +entry: + br i1 undef, label %bb1, label %bb2 + +bb1: + %0 = bitcast <2 x i64> zeroinitializer to <2 x double> + %1 = extractelement <2 x double> %0, i32 0 + %2 = bitcast double %1 to i64 + %3 = insertelement <1 x i64> undef, i64 %2, i32 0 +; CHECK-NOT: vmov s +; CHECK: vext.8 + %4 = shufflevector <1 x i64> %3, <1 x i64> undef, <2 x i32> <i32 0, i32 1> + %tmp2006.3 = bitcast <2 x i64> %4 to <16 x i8> + %5 = shufflevector <16 x i8> %tmp2006.3, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> + %tmp2004.3 = bitcast <16 x i8> %5 to <4 x i32> + br i1 undef, label %bb2, label %bb1 + +bb2: + %result = phi <4 x i32> [ undef, %entry ], [ %tmp2004.3, %bb1 ] + ret <4 x i32> %result +} + +; Test trying to do a ShiftCombine on illegal types. +; The vector should be split first. +define void @lshrIllegalType(<8 x i32>* %A) nounwind { + %tmp1 = load <8 x i32>* %A + %tmp2 = lshr <8 x i32> %tmp1, < i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3> + store <8 x i32> %tmp2, <8 x i32>* %A + ret void +} + +; Test folding a binary vector operation with constant BUILD_VECTOR +; operands with i16 elements. +define void @test_i16_constant_fold() nounwind optsize { +entry: + %0 = sext <4 x i1> zeroinitializer to <4 x i16> + %1 = add <4 x i16> %0, zeroinitializer + %2 = shufflevector <4 x i16> %1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> + %3 = add <8 x i16> %2, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> + %4 = trunc <8 x i16> %3 to <8 x i8> + tail call void @llvm.arm.neon.vst1.v8i8(i8* undef, <8 x i8> %4, i32 1) + unreachable +} + +declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>, i32) nounwind + +; Test that loads and stores of i64 vector elements are handled as f64 values +; so they are not split up into i32 values. Radar 8755338. +define void @i64_buildvector(i64* %ptr, <2 x i64>* %vp) nounwind { +; CHECK: i64_buildvector +; CHECK: vldr.64 + %t0 = load i64* %ptr, align 4 + %t1 = insertelement <2 x i64> undef, i64 %t0, i32 0 + store <2 x i64> %t1, <2 x i64>* %vp + ret void +} + +define void @i64_insertelement(i64* %ptr, <2 x i64>* %vp) nounwind { +; CHECK: i64_insertelement +; CHECK: vldr.64 + %t0 = load i64* %ptr, align 4 + %vec = load <2 x i64>* %vp + %t1 = insertelement <2 x i64> %vec, i64 %t0, i32 0 + store <2 x i64> %t1, <2 x i64>* %vp + ret void +} + +define void @i64_extractelement(i64* %ptr, <2 x i64>* %vp) nounwind { +; CHECK: i64_extractelement +; CHECK: vstr.64 + %vec = load <2 x i64>* %vp + %t1 = extractelement <2 x i64> %vec, i32 0 + store i64 %t1, i64* %ptr + ret void +} diff --git a/test/CodeGen/ARM/vext.ll b/test/CodeGen/ARM/vext.ll index e460a84f6265..55abefef0fa7 100644 --- a/test/CodeGen/ARM/vext.ll +++ b/test/CodeGen/ARM/vext.ll @@ -74,3 +74,62 @@ define <16 x i8> @test_vextRq_undef(<16 x i8>* %A, <16 x i8>* %B) nounwind { ret <16 x i8> %tmp3 } +; Tests for ReconstructShuffle function. Indices have to be carefully +; chosen to reach lowering phase as a BUILD_VECTOR. + +; One vector needs vext, the other can be handled by extract_subvector +; Also checks interleaving of sources is handled correctly. +; Essence: a vext is used on %A and something saner than stack load/store for final result. +define <4 x i16> @test_interleaved(<8 x i16>* %A, <8 x i16>* %B) nounwind { +;CHECK: test_interleaved: +;CHECK: vext.16 +;CHECK-NOT: vext.16 +;CHECK: vzip.16 + %tmp1 = load <8 x i16>* %A + %tmp2 = load <8 x i16>* %B + %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <4 x i32> <i32 3, i32 8, i32 5, i32 9> + ret <4 x i16> %tmp3 +} + +; An undef in the shuffle list should still be optimizable +define <4 x i16> @test_undef(<8 x i16>* %A, <8 x i16>* %B) nounwind { +;CHECK: test_undef: +;CHECK: vzip.16 + %tmp1 = load <8 x i16>* %A + %tmp2 = load <8 x i16>* %B + %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <4 x i32> <i32 undef, i32 8, i32 5, i32 9> + ret <4 x i16> %tmp3 +} + +; We should ignore a build_vector with more than two sources. +; Use illegal <32 x i16> type to produce such a shuffle after legalizing types. +; Try to look for fallback to stack expansion. +define <4 x i16> @test_multisource(<32 x i16>* %B) nounwind { +;CHECK: test_multisource: +;CHECK: vst1.16 + %tmp1 = load <32 x i16>* %B + %tmp2 = shufflevector <32 x i16> %tmp1, <32 x i16> undef, <4 x i32> <i32 0, i32 8, i32 16, i32 24> + ret <4 x i16> %tmp2 +} + +; We don't handle shuffles using more than half of a 128-bit vector. +; Again, test for fallback to stack expansion +define <4 x i16> @test_largespan(<8 x i16>* %B) nounwind { +;CHECK: test_largespan: +;CHECK: vst1.16 + %tmp1 = load <8 x i16>* %B + %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> + ret <4 x i16> %tmp2 +} + +; The actual shuffle code only handles some cases, make sure we check +; this rather than blindly emitting a VECTOR_SHUFFLE (infinite +; lowering loop can result otherwise). +define <8 x i8> @test_illegal(<16 x i8>* %A, <16 x i8>* %B) nounwind { +;CHECK: test_illegal: +;CHECK: vst1.8 + %tmp1 = load <16 x i8>* %A + %tmp2 = load <16 x i8>* %B + %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <8 x i32> <i32 0, i32 7, i32 5, i32 25, i32 3, i32 2, i32 2, i32 26> + ret <8 x i8> %tmp3 +} diff --git a/test/CodeGen/ARM/vget_lane.ll b/test/CodeGen/ARM/vget_lane.ll index 05e7f5090952..1fc885d61372 100644 --- a/test/CodeGen/ARM/vget_lane.ll +++ b/test/CodeGen/ARM/vget_lane.ll @@ -96,13 +96,14 @@ define i32 @vgetQ_lanei32(<4 x i32>* %A) nounwind { define arm_aapcs_vfpcc void @test_vget_laneu16() nounwind { entry: -; CHECK: vmov.u16 r0, d0[1] +; CHECK: vmov.u16 r0, d{{.*}}[1] %arg0_uint16x4_t = alloca <4 x i16> ; <<4 x i16>*> [#uses=1] %out_uint16_t = alloca i16 ; <i16*> [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %0 = load <4 x i16>* %arg0_uint16x4_t, align 8 ; <<4 x i16>> [#uses=1] %1 = extractelement <4 x i16> %0, i32 1 ; <i16> [#uses=1] - store i16 %1, i16* %out_uint16_t, align 2 + %2 = add i16 %1, %1 + store i16 %2, i16* %out_uint16_t, align 2 br label %return return: ; preds = %entry @@ -111,13 +112,14 @@ return: ; preds = %entry define arm_aapcs_vfpcc void @test_vget_laneu8() nounwind { entry: -; CHECK: vmov.u8 r0, d0[1] +; CHECK: vmov.u8 r0, d{{.*}}[1] %arg0_uint8x8_t = alloca <8 x i8> ; <<8 x i8>*> [#uses=1] %out_uint8_t = alloca i8 ; <i8*> [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %0 = load <8 x i8>* %arg0_uint8x8_t, align 8 ; <<8 x i8>> [#uses=1] %1 = extractelement <8 x i8> %0, i32 1 ; <i8> [#uses=1] - store i8 %1, i8* %out_uint8_t, align 1 + %2 = add i8 %1, %1 + store i8 %2, i8* %out_uint8_t, align 1 br label %return return: ; preds = %entry @@ -126,13 +128,14 @@ return: ; preds = %entry define arm_aapcs_vfpcc void @test_vgetQ_laneu16() nounwind { entry: -; CHECK: vmov.u16 r0, d0[1] +; CHECK: vmov.u16 r0, d{{.*}}[1] %arg0_uint16x8_t = alloca <8 x i16> ; <<8 x i16>*> [#uses=1] %out_uint16_t = alloca i16 ; <i16*> [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %0 = load <8 x i16>* %arg0_uint16x8_t, align 16 ; <<8 x i16>> [#uses=1] %1 = extractelement <8 x i16> %0, i32 1 ; <i16> [#uses=1] - store i16 %1, i16* %out_uint16_t, align 2 + %2 = add i16 %1, %1 + store i16 %2, i16* %out_uint16_t, align 2 br label %return return: ; preds = %entry @@ -141,13 +144,14 @@ return: ; preds = %entry define arm_aapcs_vfpcc void @test_vgetQ_laneu8() nounwind { entry: -; CHECK: vmov.u8 r0, d0[1] +; CHECK: vmov.u8 r0, d{{.*}}[1] %arg0_uint8x16_t = alloca <16 x i8> ; <<16 x i8>*> [#uses=1] %out_uint8_t = alloca i8 ; <i8*> [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %0 = load <16 x i8>* %arg0_uint8x16_t, align 16 ; <<16 x i8>> [#uses=1] %1 = extractelement <16 x i8> %0, i32 1 ; <i8> [#uses=1] - store i8 %1, i8* %out_uint8_t, align 1 + %2 = add i8 %1, %1 + store i8 %2, i8* %out_uint8_t, align 1 br label %return return: ; preds = %entry @@ -210,3 +214,20 @@ entry: %0 = insertelement <2 x float> %arg1_float32x2_t, float %arg0_float32_t, i32 1 ; <<2 x float>> [#uses=1] ret <2 x float> %0 } + +; The llvm extractelement instruction does not require that the lane number +; be an immediate constant. Make sure a variable lane number is handled. + +define i32 @vget_variable_lanes8(<8 x i8>* %A, i32 %B) nounwind { + %tmp1 = load <8 x i8>* %A + %tmp2 = extractelement <8 x i8> %tmp1, i32 %B + %tmp3 = sext i8 %tmp2 to i32 + ret i32 %tmp3 +} + +define i32 @vgetQ_variable_lanei32(<4 x i32>* %A, i32 %B) nounwind { + %tmp1 = load <4 x i32>* %A + %tmp2 = add <4 x i32> %tmp1, %tmp1 + %tmp3 = extractelement <4 x i32> %tmp2, i32 %B + ret i32 %tmp3 +} diff --git a/test/CodeGen/ARM/vld1.ll b/test/CodeGen/ARM/vld1.ll index 2488e8a0d0cc..c886125a2fb0 100644 --- a/test/CodeGen/ARM/vld1.ll +++ b/test/CodeGen/ARM/vld1.ll @@ -2,8 +2,9 @@ define <8 x i8> @vld1i8(i8* %A) nounwind { ;CHECK: vld1i8: -;CHECK: vld1.8 - %tmp1 = call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %A, i32 1) +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vld1.8 {d16}, [r0, :64] + %tmp1 = call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %A, i32 16) ret <8 x i8> %tmp1 } @@ -15,6 +16,18 @@ define <4 x i16> @vld1i16(i16* %A) nounwind { ret <4 x i16> %tmp1 } +;Check for a post-increment updating load. +define <4 x i16> @vld1i16_update(i16** %ptr) nounwind { +;CHECK: vld1i16_update: +;CHECK: vld1.16 {d16}, [r1]! + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1) + %tmp2 = getelementptr i16* %A, i32 4 + store i16* %tmp2, i16** %ptr + ret <4 x i16> %tmp1 +} + define <2 x i32> @vld1i32(i32* %A) nounwind { ;CHECK: vld1i32: ;CHECK: vld1.32 @@ -23,6 +36,18 @@ define <2 x i32> @vld1i32(i32* %A) nounwind { ret <2 x i32> %tmp1 } +;Check for a post-increment updating load with register increment. +define <2 x i32> @vld1i32_update(i32** %ptr, i32 %inc) nounwind { +;CHECK: vld1i32_update: +;CHECK: vld1.32 {d16}, [r2], r1 + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0, i32 1) + %tmp2 = getelementptr i32* %A, i32 %inc + store i32* %tmp2, i32** %ptr + ret <2 x i32> %tmp1 +} + define <2 x float> @vld1f(float* %A) nounwind { ;CHECK: vld1f: ;CHECK: vld1.32 @@ -41,16 +66,29 @@ define <1 x i64> @vld1i64(i64* %A) nounwind { define <16 x i8> @vld1Qi8(i8* %A) nounwind { ;CHECK: vld1Qi8: -;CHECK: vld1.8 - %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A, i32 1) +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vld1.8 {d16, d17}, [r0, :64] + %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A, i32 8) + ret <16 x i8> %tmp1 +} + +;Check for a post-increment updating load. +define <16 x i8> @vld1Qi8_update(i8** %ptr) nounwind { +;CHECK: vld1Qi8_update: +;CHECK: vld1.8 {d16, d17}, [r1, :64]! + %A = load i8** %ptr + %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A, i32 8) + %tmp2 = getelementptr i8* %A, i32 16 + store i8* %tmp2, i8** %ptr ret <16 x i8> %tmp1 } define <8 x i16> @vld1Qi16(i16* %A) nounwind { ;CHECK: vld1Qi16: -;CHECK: vld1.16 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vld1.16 {d16, d17}, [r0, :128] %tmp0 = bitcast i16* %A to i8* - %tmp1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %tmp0, i32 1) + %tmp1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %tmp0, i32 32) ret <8 x i16> %tmp1 } diff --git a/test/CodeGen/ARM/vld2.ll b/test/CodeGen/ARM/vld2.ll index 811f6e6db96f..29b379465db5 100644 --- a/test/CodeGen/ARM/vld2.ll +++ b/test/CodeGen/ARM/vld2.ll @@ -13,8 +13,9 @@ define <8 x i8> @vld2i8(i8* %A) nounwind { ;CHECK: vld2i8: -;CHECK: vld2.8 - %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A, i32 1) +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vld2.8 {d16, d17}, [r0, :64] + %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A, i32 8) %tmp2 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 1 %tmp4 = add <8 x i8> %tmp2, %tmp3 @@ -23,9 +24,10 @@ define <8 x i8> @vld2i8(i8* %A) nounwind { define <4 x i16> @vld2i16(i16* %A) nounwind { ;CHECK: vld2i16: -;CHECK: vld2.16 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vld2.16 {d16, d17}, [r0, :128] %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8* %tmp0, i32 1) + %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8* %tmp0, i32 32) %tmp2 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 1 %tmp4 = add <4 x i16> %tmp2, %tmp3 @@ -54,11 +56,27 @@ define <2 x float> @vld2f(float* %A) nounwind { ret <2 x float> %tmp4 } +;Check for a post-increment updating load. +define <2 x float> @vld2f_update(float** %ptr) nounwind { +;CHECK: vld2f_update: +;CHECK: vld2.32 {d16, d17}, [r1]! + %A = load float** %ptr + %tmp0 = bitcast float* %A to i8* + %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1) + %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1 + %tmp4 = fadd <2 x float> %tmp2, %tmp3 + %tmp5 = getelementptr float* %A, i32 4 + store float* %tmp5, float** %ptr + ret <2 x float> %tmp4 +} + define <1 x i64> @vld2i64(i64* %A) nounwind { ;CHECK: vld2i64: -;CHECK: vld1.64 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vld1.64 {d16, d17}, [r0, :128] %tmp0 = bitcast i64* %A to i8* - %tmp1 = call %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i8* %tmp0, i32 1) + %tmp1 = call %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i8* %tmp0, i32 32) %tmp2 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 1 %tmp4 = add <1 x i64> %tmp2, %tmp3 @@ -67,19 +85,35 @@ define <1 x i64> @vld2i64(i64* %A) nounwind { define <16 x i8> @vld2Qi8(i8* %A) nounwind { ;CHECK: vld2Qi8: -;CHECK: vld2.8 - %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 1) +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vld2.8 {d16, d17, d18, d19}, [r0, :64] + %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 8) + %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 + %tmp4 = add <16 x i8> %tmp2, %tmp3 + ret <16 x i8> %tmp4 +} + +;Check for a post-increment updating load with register increment. +define <16 x i8> @vld2Qi8_update(i8** %ptr, i32 %inc) nounwind { +;CHECK: vld2Qi8_update: +;CHECK: vld2.8 {d16, d17, d18, d19}, [r2, :128], r1 + %A = load i8** %ptr + %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 16) %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 %tmp4 = add <16 x i8> %tmp2, %tmp3 + %tmp5 = getelementptr i8* %A, i32 %inc + store i8* %tmp5, i8** %ptr ret <16 x i8> %tmp4 } define <8 x i16> @vld2Qi16(i16* %A) nounwind { ;CHECK: vld2Qi16: -;CHECK: vld2.16 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vld2.16 {d16, d17, d18, d19}, [r0, :128] %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8* %tmp0, i32 1) + %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8* %tmp0, i32 16) %tmp2 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 1 %tmp4 = add <8 x i16> %tmp2, %tmp3 @@ -88,9 +122,10 @@ define <8 x i16> @vld2Qi16(i16* %A) nounwind { define <4 x i32> @vld2Qi32(i32* %A) nounwind { ;CHECK: vld2Qi32: -;CHECK: vld2.32 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vld2.32 {d16, d17, d18, d19}, [r0, :256] %tmp0 = bitcast i32* %A to i8* - %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp0, i32 1) + %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp0, i32 64) %tmp2 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 1 %tmp4 = add <4 x i32> %tmp2, %tmp3 diff --git a/test/CodeGen/ARM/vld3.ll b/test/CodeGen/ARM/vld3.ll index 92538c34f5b8..dde530f6df1f 100644 --- a/test/CodeGen/ARM/vld3.ll +++ b/test/CodeGen/ARM/vld3.ll @@ -13,8 +13,9 @@ define <8 x i8> @vld3i8(i8* %A) nounwind { ;CHECK: vld3i8: -;CHECK: vld3.8 - %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 1) +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vld3.8 {d16, d17, d18}, [r0, :64] + %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 32) %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 2 %tmp4 = add <8 x i8> %tmp2, %tmp3 @@ -32,6 +33,21 @@ define <4 x i16> @vld3i16(i16* %A) nounwind { ret <4 x i16> %tmp4 } +;Check for a post-increment updating load with register increment. +define <4 x i16> @vld3i16_update(i16** %ptr, i32 %inc) nounwind { +;CHECK: vld3i16_update: +;CHECK: vld3.16 {d16, d17, d18}, [r2], r1 + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i32 1) + %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2 + %tmp4 = add <4 x i16> %tmp2, %tmp3 + %tmp5 = getelementptr i16* %A, i32 %inc + store i16* %tmp5, i16** %ptr + ret <4 x i16> %tmp4 +} + define <2 x i32> @vld3i32(i32* %A) nounwind { ;CHECK: vld3i32: ;CHECK: vld3.32 @@ -56,9 +72,10 @@ define <2 x float> @vld3f(float* %A) nounwind { define <1 x i64> @vld3i64(i64* %A) nounwind { ;CHECK: vld3i64: -;CHECK: vld1.64 +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vld1.64 {d16, d17, d18}, [r0, :64] %tmp0 = bitcast i64* %A to i8* - %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8* %tmp0, i32 1) + %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8* %tmp0, i32 16) %tmp2 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 2 %tmp4 = add <1 x i64> %tmp2, %tmp3 @@ -67,9 +84,10 @@ define <1 x i64> @vld3i64(i64* %A) nounwind { define <16 x i8> @vld3Qi8(i8* %A) nounwind { ;CHECK: vld3Qi8: -;CHECK: vld3.8 -;CHECK: vld3.8 - %tmp1 = call %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8* %A, i32 1) +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vld3.8 {d16, d18, d20}, [r0, :64]! +;CHECK: vld3.8 {d17, d19, d21}, [r0, :64] + %tmp1 = call %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8* %A, i32 32) %tmp2 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 2 %tmp4 = add <16 x i8> %tmp2, %tmp3 @@ -100,6 +118,22 @@ define <4 x i32> @vld3Qi32(i32* %A) nounwind { ret <4 x i32> %tmp4 } +;Check for a post-increment updating load. +define <4 x i32> @vld3Qi32_update(i32** %ptr) nounwind { +;CHECK: vld3Qi32_update: +;CHECK: vld3.32 {d16, d18, d20}, [r1]! +;CHECK: vld3.32 {d17, d19, d21}, [r1]! + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8* %tmp0, i32 1) + %tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 2 + %tmp4 = add <4 x i32> %tmp2, %tmp3 + %tmp5 = getelementptr i32* %A, i32 12 + store i32* %tmp5, i32** %ptr + ret <4 x i32> %tmp4 +} + define <4 x float> @vld3Qf(float* %A) nounwind { ;CHECK: vld3Qf: ;CHECK: vld3.32 diff --git a/test/CodeGen/ARM/vld4.ll b/test/CodeGen/ARM/vld4.ll index d1bf957ebadc..59a73db3187e 100644 --- a/test/CodeGen/ARM/vld4.ll +++ b/test/CodeGen/ARM/vld4.ll @@ -13,19 +13,35 @@ define <8 x i8> @vld4i8(i8* %A) nounwind { ;CHECK: vld4i8: -;CHECK: vld4.8 - %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 1) +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vld4.8 {d16, d17, d18, d19}, [r0, :64] + %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 8) %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2 %tmp4 = add <8 x i8> %tmp2, %tmp3 ret <8 x i8> %tmp4 } +;Check for a post-increment updating load with register increment. +define <8 x i8> @vld4i8_update(i8** %ptr, i32 %inc) nounwind { +;CHECK: vld4i8_update: +;CHECK: vld4.8 {d16, d17, d18, d19}, [r2, :128], r1 + %A = load i8** %ptr + %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 16) + %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2 + %tmp4 = add <8 x i8> %tmp2, %tmp3 + %tmp5 = getelementptr i8* %A, i32 %inc + store i8* %tmp5, i8** %ptr + ret <8 x i8> %tmp4 +} + define <4 x i16> @vld4i16(i16* %A) nounwind { ;CHECK: vld4i16: -;CHECK: vld4.16 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vld4.16 {d16, d17, d18, d19}, [r0, :128] %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8* %tmp0, i32 1) + %tmp1 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8* %tmp0, i32 16) %tmp2 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 2 %tmp4 = add <4 x i16> %tmp2, %tmp3 @@ -34,9 +50,10 @@ define <4 x i16> @vld4i16(i16* %A) nounwind { define <2 x i32> @vld4i32(i32* %A) nounwind { ;CHECK: vld4i32: -;CHECK: vld4.32 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vld4.32 {d16, d17, d18, d19}, [r0, :256] %tmp0 = bitcast i32* %A to i8* - %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* %tmp0, i32 1) + %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* %tmp0, i32 32) %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2 %tmp4 = add <2 x i32> %tmp2, %tmp3 @@ -56,9 +73,10 @@ define <2 x float> @vld4f(float* %A) nounwind { define <1 x i64> @vld4i64(i64* %A) nounwind { ;CHECK: vld4i64: -;CHECK: vld1.64 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vld1.64 {d16, d17, d18, d19}, [r0, :256] %tmp0 = bitcast i64* %A to i8* - %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8* %tmp0, i32 1) + %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8* %tmp0, i32 64) %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2 %tmp4 = add <1 x i64> %tmp2, %tmp3 @@ -67,9 +85,10 @@ define <1 x i64> @vld4i64(i64* %A) nounwind { define <16 x i8> @vld4Qi8(i8* %A) nounwind { ;CHECK: vld4Qi8: -;CHECK: vld4.8 -;CHECK: vld4.8 - %tmp1 = call %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8* %A, i32 1) +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vld4.8 {d16, d18, d20, d22}, [r0, :256]! +;CHECK: vld4.8 {d17, d19, d21, d23}, [r0, :256] + %tmp1 = call %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8* %A, i32 64) %tmp2 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 2 %tmp4 = add <16 x i8> %tmp2, %tmp3 @@ -78,8 +97,9 @@ define <16 x i8> @vld4Qi8(i8* %A) nounwind { define <8 x i16> @vld4Qi16(i16* %A) nounwind { ;CHECK: vld4Qi16: -;CHECK: vld4.16 -;CHECK: vld4.16 +;Check for no alignment specifier. +;CHECK: vld4.16 {d16, d18, d20, d22}, [r0]! +;CHECK: vld4.16 {d17, d19, d21, d23}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0 @@ -88,6 +108,22 @@ define <8 x i16> @vld4Qi16(i16* %A) nounwind { ret <8 x i16> %tmp4 } +;Check for a post-increment updating load. +define <8 x i16> @vld4Qi16_update(i16** %ptr) nounwind { +;CHECK: vld4Qi16_update: +;CHECK: vld4.16 {d16, d18, d20, d22}, [r1, :64]! +;CHECK: vld4.16 {d17, d19, d21, d23}, [r1, :64]! + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 8) + %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2 + %tmp4 = add <8 x i16> %tmp2, %tmp3 + %tmp5 = getelementptr i16* %A, i32 32 + store i16* %tmp5, i16** %ptr + ret <8 x i16> %tmp4 +} + define <4 x i32> @vld4Qi32(i32* %A) nounwind { ;CHECK: vld4Qi32: ;CHECK: vld4.32 diff --git a/test/CodeGen/ARM/vlddup.ll b/test/CodeGen/ARM/vlddup.ll new file mode 100644 index 000000000000..d0e9ac3ad3c4 --- /dev/null +++ b/test/CodeGen/ARM/vlddup.ll @@ -0,0 +1,212 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +define <8 x i8> @vld1dupi8(i8* %A) nounwind { +;CHECK: vld1dupi8: +;Check the (default) alignment value. +;CHECK: vld1.8 {d16[]}, [r0] + %tmp1 = load i8* %A, align 8 + %tmp2 = insertelement <8 x i8> undef, i8 %tmp1, i32 0 + %tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> undef, <8 x i32> zeroinitializer + ret <8 x i8> %tmp3 +} + +define <4 x i16> @vld1dupi16(i16* %A) nounwind { +;CHECK: vld1dupi16: +;Check the alignment value. Max for this instruction is 16 bits: +;CHECK: vld1.16 {d16[]}, [r0, :16] + %tmp1 = load i16* %A, align 8 + %tmp2 = insertelement <4 x i16> undef, i16 %tmp1, i32 0 + %tmp3 = shufflevector <4 x i16> %tmp2, <4 x i16> undef, <4 x i32> zeroinitializer + ret <4 x i16> %tmp3 +} + +define <2 x i32> @vld1dupi32(i32* %A) nounwind { +;CHECK: vld1dupi32: +;Check the alignment value. Max for this instruction is 32 bits: +;CHECK: vld1.32 {d16[]}, [r0, :32] + %tmp1 = load i32* %A, align 8 + %tmp2 = insertelement <2 x i32> undef, i32 %tmp1, i32 0 + %tmp3 = shufflevector <2 x i32> %tmp2, <2 x i32> undef, <2 x i32> zeroinitializer + ret <2 x i32> %tmp3 +} + +define <2 x float> @vld1dupf(float* %A) nounwind { +;CHECK: vld1dupf: +;CHECK: vld1.32 {d16[]}, [r0] + %tmp0 = load float* %A + %tmp1 = insertelement <2 x float> undef, float %tmp0, i32 0 + %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer + ret <2 x float> %tmp2 +} + +define <16 x i8> @vld1dupQi8(i8* %A) nounwind { +;CHECK: vld1dupQi8: +;Check the (default) alignment value. +;CHECK: vld1.8 {d16[], d17[]}, [r0] + %tmp1 = load i8* %A, align 8 + %tmp2 = insertelement <16 x i8> undef, i8 %tmp1, i32 0 + %tmp3 = shufflevector <16 x i8> %tmp2, <16 x i8> undef, <16 x i32> zeroinitializer + ret <16 x i8> %tmp3 +} + +define <4 x float> @vld1dupQf(float* %A) nounwind { +;CHECK: vld1dupQf: +;CHECK: vld1.32 {d16[], d17[]}, [r0] + %tmp0 = load float* %A + %tmp1 = insertelement <4 x float> undef, float %tmp0, i32 0 + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer + ret <4 x float> %tmp2 +} + +%struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } +%struct.__neon_int4x16x2_t = type { <4 x i16>, <4 x i16> } +%struct.__neon_int2x32x2_t = type { <2 x i32>, <2 x i32> } + +define <8 x i8> @vld2dupi8(i8* %A) nounwind { +;CHECK: vld2dupi8: +;Check the (default) alignment value. +;CHECK: vld2.8 {d16[], d17[]}, [r0] + %tmp0 = tail call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, i32 0, i32 1) + %tmp1 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 0 + %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 1 + %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp5 = add <8 x i8> %tmp2, %tmp4 + ret <8 x i8> %tmp5 +} + +define <4 x i16> @vld2dupi16(i16* %A) nounwind { +;CHECK: vld2dupi16: +;Check that a power-of-two alignment smaller than the total size of the memory +;being loaded is ignored. +;CHECK: vld2.16 {d16[], d17[]}, [r0] + %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2) + %tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = add <4 x i16> %tmp2, %tmp4 + ret <4 x i16> %tmp5 +} + +;Check for a post-increment updating load. +define <4 x i16> @vld2dupi16_update(i16** %ptr) nounwind { +;CHECK: vld2dupi16_update: +;CHECK: vld2.16 {d16[], d17[]}, [r1]! + %A = load i16** %ptr + %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2) + %tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = add <4 x i16> %tmp2, %tmp4 + %tmp6 = getelementptr i16* %A, i32 2 + store i16* %tmp6, i16** %ptr + ret <4 x i16> %tmp5 +} + +define <2 x i32> @vld2dupi32(i32* %A) nounwind { +;CHECK: vld2dupi32: +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vld2.32 {d16[], d17[]}, [r0, :64] + %tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16) + %tmp1 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 0 + %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 1 + %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp5 = add <2 x i32> %tmp2, %tmp4 + ret <2 x i32> %tmp5 +} + +declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly +declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly + +%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> } +%struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> } + +;Check for a post-increment updating load with register increment. +define <8 x i8> @vld3dupi8_update(i8** %ptr, i32 %inc) nounwind { +;CHECK: vld3dupi8_update: +;CHECK: vld3.8 {d16[], d17[], d18[]}, [r2], r1 + %A = load i8** %ptr + %tmp0 = tail call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 0, i32 8) + %tmp1 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 0 + %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 1 + %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp0, 2 + %tmp6 = shufflevector <8 x i8> %tmp5, <8 x i8> undef, <8 x i32> zeroinitializer + %tmp7 = add <8 x i8> %tmp2, %tmp4 + %tmp8 = add <8 x i8> %tmp7, %tmp6 + %tmp9 = getelementptr i8* %A, i32 %inc + store i8* %tmp9, i8** %ptr + ret <8 x i8> %tmp8 +} + +define <4 x i16> @vld3dupi16(i16* %A) nounwind { +;CHECK: vld3dupi16: +;Check the (default) alignment value. VLD3 does not support alignment. +;CHECK: vld3.16 {d16[], d17[], d18[]}, [r0] + %tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8) + %tmp1 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 2 + %tmp6 = shufflevector <4 x i16> %tmp5, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp7 = add <4 x i16> %tmp2, %tmp4 + %tmp8 = add <4 x i16> %tmp7, %tmp6 + ret <4 x i16> %tmp8 +} + +declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly +declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly + +%struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } +%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } + +;Check for a post-increment updating load. +define <4 x i16> @vld4dupi16_update(i16** %ptr) nounwind { +;CHECK: vld4dupi16_update: +;CHECK: vld4.16 {d16[], d17[], d18[], d19[]}, [r1]! + %A = load i16** %ptr + %tmp0 = tail call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 1) + %tmp1 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 0 + %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 1 + %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 2 + %tmp6 = shufflevector <4 x i16> %tmp5, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp7 = extractvalue %struct.__neon_int16x4x4_t %tmp0, 3 + %tmp8 = shufflevector <4 x i16> %tmp7, <4 x i16> undef, <4 x i32> zeroinitializer + %tmp9 = add <4 x i16> %tmp2, %tmp4 + %tmp10 = add <4 x i16> %tmp6, %tmp8 + %tmp11 = add <4 x i16> %tmp9, %tmp10 + %tmp12 = getelementptr i16* %A, i32 4 + store i16* %tmp12, i16** %ptr + ret <4 x i16> %tmp11 +} + +define <2 x i32> @vld4dupi32(i32* %A) nounwind { +;CHECK: vld4dupi32: +;Check the alignment value. An 8-byte alignment is allowed here even though +;it is smaller than the total size of the memory being loaded. +;CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r0, :64] + %tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 8) + %tmp1 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 0 + %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 1 + %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 2 + %tmp6 = shufflevector <2 x i32> %tmp5, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp7 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 3 + %tmp8 = shufflevector <2 x i32> %tmp7, <2 x i32> undef, <2 x i32> zeroinitializer + %tmp9 = add <2 x i32> %tmp2, %tmp4 + %tmp10 = add <2 x i32> %tmp6, %tmp8 + %tmp11 = add <2 x i32> %tmp9, %tmp10 + ret <2 x i32> %tmp11 +} + +declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly diff --git a/test/CodeGen/ARM/vldlane.ll b/test/CodeGen/ARM/vldlane.ll index 31ee64fa598f..770ed071ac12 100644 --- a/test/CodeGen/ARM/vldlane.ll +++ b/test/CodeGen/ARM/vldlane.ll @@ -1,5 +1,80 @@ ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +define <8 x i8> @vld1lanei8(i8* %A, <8 x i8>* %B) nounwind { +;CHECK: vld1lanei8: +;Check the (default) alignment value. +;CHECK: vld1.8 {d16[3]}, [r0] + %tmp1 = load <8 x i8>* %B + %tmp2 = load i8* %A, align 8 + %tmp3 = insertelement <8 x i8> %tmp1, i8 %tmp2, i32 3 + ret <8 x i8> %tmp3 +} + +define <4 x i16> @vld1lanei16(i16* %A, <4 x i16>* %B) nounwind { +;CHECK: vld1lanei16: +;Check the alignment value. Max for this instruction is 16 bits: +;CHECK: vld1.16 {d16[2]}, [r0, :16] + %tmp1 = load <4 x i16>* %B + %tmp2 = load i16* %A, align 8 + %tmp3 = insertelement <4 x i16> %tmp1, i16 %tmp2, i32 2 + ret <4 x i16> %tmp3 +} + +define <2 x i32> @vld1lanei32(i32* %A, <2 x i32>* %B) nounwind { +;CHECK: vld1lanei32: +;Check the alignment value. Max for this instruction is 32 bits: +;CHECK: vld1.32 {d16[1]}, [r0, :32] + %tmp1 = load <2 x i32>* %B + %tmp2 = load i32* %A, align 8 + %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1 + ret <2 x i32> %tmp3 +} + +define <2 x float> @vld1lanef(float* %A, <2 x float>* %B) nounwind { +;CHECK: vld1lanef: +;CHECK: vld1.32 {d16[1]}, [r0] + %tmp1 = load <2 x float>* %B + %tmp2 = load float* %A, align 4 + %tmp3 = insertelement <2 x float> %tmp1, float %tmp2, i32 1 + ret <2 x float> %tmp3 +} + +define <16 x i8> @vld1laneQi8(i8* %A, <16 x i8>* %B) nounwind { +;CHECK: vld1laneQi8: +;CHECK: vld1.8 {d17[1]}, [r0] + %tmp1 = load <16 x i8>* %B + %tmp2 = load i8* %A, align 8 + %tmp3 = insertelement <16 x i8> %tmp1, i8 %tmp2, i32 9 + ret <16 x i8> %tmp3 +} + +define <8 x i16> @vld1laneQi16(i16* %A, <8 x i16>* %B) nounwind { +;CHECK: vld1laneQi16: +;CHECK: vld1.16 {d17[1]}, [r0, :16] + %tmp1 = load <8 x i16>* %B + %tmp2 = load i16* %A, align 8 + %tmp3 = insertelement <8 x i16> %tmp1, i16 %tmp2, i32 5 + ret <8 x i16> %tmp3 +} + +define <4 x i32> @vld1laneQi32(i32* %A, <4 x i32>* %B) nounwind { +;CHECK: vld1laneQi32: +;CHECK: vld1.32 {d17[1]}, [r0, :32] + %tmp1 = load <4 x i32>* %B + %tmp2 = load i32* %A, align 8 + %tmp3 = insertelement <4 x i32> %tmp1, i32 %tmp2, i32 3 + ret <4 x i32> %tmp3 +} + +define <4 x float> @vld1laneQf(float* %A, <4 x float>* %B) nounwind { +;CHECK: vld1laneQf: +;CHECK: vld1.32 {d16[0]}, [r0] + %tmp1 = load <4 x float>* %B + %tmp2 = load float* %A + %tmp3 = insertelement <4 x float> %tmp1, float %tmp2, i32 0 + ret <4 x float> %tmp3 +} + %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> } %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> } @@ -11,9 +86,10 @@ define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vld2lanei8: -;CHECK: vld2.8 +;Check the alignment value. Max for this instruction is 16 bits: +;CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16] %tmp1 = load <8 x i8>* %B - %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4) %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1 %tmp5 = add <8 x i8> %tmp3, %tmp4 @@ -22,10 +98,11 @@ define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind { define <4 x i16> @vld2lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vld2lanei16: -;CHECK: vld2.16 +;Check the alignment value. Max for this instruction is 32 bits: +;CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - %tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8) %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 1 %tmp5 = add <4 x i16> %tmp3, %tmp4 @@ -44,6 +121,22 @@ define <2 x i32> @vld2lanei32(i32* %A, <2 x i32>* %B) nounwind { ret <2 x i32> %tmp5 } +;Check for a post-increment updating load. +define <2 x i32> @vld2lanei32_update(i32** %ptr, <2 x i32>* %B) nounwind { +;CHECK: vld2lanei32_update: +;CHECK: vld2.32 {d16[1], d17[1]}, [r1]! + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = load <2 x i32>* %B + %tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) + %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 0 + %tmp4 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 1 + %tmp5 = add <2 x i32> %tmp3, %tmp4 + %tmp6 = getelementptr i32* %A, i32 2 + store i32* %tmp6, i32** %ptr + ret <2 x i32> %tmp5 +} + define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind { ;CHECK: vld2lanef: ;CHECK: vld2.32 @@ -58,10 +151,11 @@ define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind { define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vld2laneQi16: -;CHECK: vld2.16 +;Check the (default) alignment. +;CHECK: vld2.16 {d17[1], d19[1]}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1) %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1 %tmp5 = add <8 x i16> %tmp3, %tmp4 @@ -70,10 +164,11 @@ define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind { define <4 x i32> @vld2laneQi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vld2laneQi32: -;CHECK: vld2.32 +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - %tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1) + %tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16) %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 1 %tmp5 = add <4 x i32> %tmp3, %tmp4 @@ -125,10 +220,11 @@ define <8 x i8> @vld3lanei8(i8* %A, <8 x i8>* %B) nounwind { define <4 x i16> @vld3lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vld3lanei16: -;CHECK: vld3.16 +;Check the (default) alignment value. VLD3 does not support alignment. +;CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - %tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8) %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 2 @@ -167,10 +263,11 @@ define <2 x float> @vld3lanef(float* %A, <2 x float>* %B) nounwind { define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vld3laneQi16: -;CHECK: vld3.16 +;Check the (default) alignment value. VLD3 does not support alignment. +;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8) %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2 @@ -179,6 +276,24 @@ define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind { ret <8 x i16> %tmp7 } +;Check for a post-increment updating load with register increment. +define <8 x i16> @vld3laneQi16_update(i16** %ptr, <8 x i16>* %B, i32 %inc) nounwind { +;CHECK: vld3laneQi16_update: +;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r2], r1 + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = load <8 x i16>* %B + %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8) + %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0 + %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1 + %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2 + %tmp6 = add <8 x i16> %tmp3, %tmp4 + %tmp7 = add <8 x i16> %tmp5, %tmp6 + %tmp8 = getelementptr i16* %A, i32 %inc + store i16* %tmp8, i16** %ptr + ret <8 x i16> %tmp7 +} + define <4 x i32> @vld3laneQi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vld3laneQi32: ;CHECK: vld3.32 @@ -227,9 +342,10 @@ declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8*, <4 x flo define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vld4lanei8: -;CHECK: vld4.8 +;Check the alignment value. Max for this instruction is 32 bits: +;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] %tmp1 = load <8 x i8>* %B - %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8) %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2 @@ -240,12 +356,33 @@ define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind { ret <8 x i8> %tmp9 } +;Check for a post-increment updating load. +define <8 x i8> @vld4lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind { +;CHECK: vld4lanei8_update: +;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]! + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8) + %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0 + %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1 + %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2 + %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3 + %tmp7 = add <8 x i8> %tmp3, %tmp4 + %tmp8 = add <8 x i8> %tmp5, %tmp6 + %tmp9 = add <8 x i8> %tmp7, %tmp8 + %tmp10 = getelementptr i8* %A, i32 4 + store i8* %tmp10, i8** %ptr + ret <8 x i8> %tmp9 +} + define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vld4lanei16: -;CHECK: vld4.16 +;Check that a power-of-two alignment smaller than the total size of the memory +;being loaded is ignored. +;CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 4) %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 2 @@ -258,10 +395,12 @@ define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind { define <2 x i32> @vld4lanei32(i32* %A, <2 x i32>* %B) nounwind { ;CHECK: vld4lanei32: -;CHECK: vld4.32 +;Check the alignment value. An 8-byte alignment is allowed here even though +;it is smaller than the total size of the memory being loaded. +;CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :64] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 8) %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2 @@ -290,10 +429,11 @@ define <2 x float> @vld4lanef(float* %A, <2 x float>* %B) nounwind { define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vld4laneQi16: -;CHECK: vld4.16 +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - %tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 16) %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 2 @@ -306,10 +446,11 @@ define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind { define <4 x i32> @vld4laneQi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vld4laneQi32: -;CHECK: vld4.32 +;Check the (default) alignment. +;CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - %tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1, i32 1) + %tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1) %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 2 @@ -344,3 +485,22 @@ declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8*, <2 x flo declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly + +; Radar 8776599: If one of the operands to a QQQQ REG_SEQUENCE is a register +; in the QPR_VFP2 regclass, it needs to be copied to a QPR regclass because +; we don't currently have a QQQQ_VFP2 super-regclass. (The "0" for the low +; part of %ins67 is supposed to be loaded by a VLDRS instruction in this test.) +define void @test_qqqq_regsequence_subreg([6 x i64] %b) nounwind { +;CHECK: test_qqqq_regsequence_subreg +;CHECK: vld3.16 + %tmp63 = extractvalue [6 x i64] %b, 5 + %tmp64 = zext i64 %tmp63 to i128 + %tmp65 = shl i128 %tmp64, 64 + %ins67 = or i128 %tmp65, 0 + %tmp78 = bitcast i128 %ins67 to <8 x i16> + %vld3_lane = tail call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* undef, <8 x i16> undef, <8 x i16> undef, <8 x i16> %tmp78, i32 1, i32 2) + call void @llvm.trap() + unreachable +} + +declare void @llvm.trap() nounwind diff --git a/test/CodeGen/ARM/vmov.ll b/test/CodeGen/ARM/vmov.ll index 8cd94576b0c2..a86be32bd203 100644 --- a/test/CodeGen/ARM/vmov.ll +++ b/test/CodeGen/ARM/vmov.ll @@ -2,169 +2,169 @@ define <8 x i8> @v_movi8() nounwind { ;CHECK: v_movi8: -;CHECK: vmov.i8 d0, #0x8 +;CHECK: vmov.i8 d{{.*}}, #0x8 ret <8 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 > } define <4 x i16> @v_movi16a() nounwind { ;CHECK: v_movi16a: -;CHECK: vmov.i16 d0, #0x10 +;CHECK: vmov.i16 d{{.*}}, #0x10 ret <4 x i16> < i16 16, i16 16, i16 16, i16 16 > } define <4 x i16> @v_movi16b() nounwind { ;CHECK: v_movi16b: -;CHECK: vmov.i16 d0, #0x1000 +;CHECK: vmov.i16 d{{.*}}, #0x1000 ret <4 x i16> < i16 4096, i16 4096, i16 4096, i16 4096 > } define <4 x i16> @v_mvni16a() nounwind { ;CHECK: v_mvni16a: -;CHECK: vmvn.i16 d0, #0x10 +;CHECK: vmvn.i16 d{{.*}}, #0x10 ret <4 x i16> < i16 65519, i16 65519, i16 65519, i16 65519 > } define <4 x i16> @v_mvni16b() nounwind { ;CHECK: v_mvni16b: -;CHECK: vmvn.i16 d0, #0x1000 +;CHECK: vmvn.i16 d{{.*}}, #0x1000 ret <4 x i16> < i16 61439, i16 61439, i16 61439, i16 61439 > } define <2 x i32> @v_movi32a() nounwind { ;CHECK: v_movi32a: -;CHECK: vmov.i32 d0, #0x20 +;CHECK: vmov.i32 d{{.*}}, #0x20 ret <2 x i32> < i32 32, i32 32 > } define <2 x i32> @v_movi32b() nounwind { ;CHECK: v_movi32b: -;CHECK: vmov.i32 d0, #0x2000 +;CHECK: vmov.i32 d{{.*}}, #0x2000 ret <2 x i32> < i32 8192, i32 8192 > } define <2 x i32> @v_movi32c() nounwind { ;CHECK: v_movi32c: -;CHECK: vmov.i32 d0, #0x200000 +;CHECK: vmov.i32 d{{.*}}, #0x200000 ret <2 x i32> < i32 2097152, i32 2097152 > } define <2 x i32> @v_movi32d() nounwind { ;CHECK: v_movi32d: -;CHECK: vmov.i32 d0, #0x20000000 +;CHECK: vmov.i32 d{{.*}}, #0x20000000 ret <2 x i32> < i32 536870912, i32 536870912 > } define <2 x i32> @v_movi32e() nounwind { ;CHECK: v_movi32e: -;CHECK: vmov.i32 d0, #0x20FF +;CHECK: vmov.i32 d{{.*}}, #0x20FF ret <2 x i32> < i32 8447, i32 8447 > } define <2 x i32> @v_movi32f() nounwind { ;CHECK: v_movi32f: -;CHECK: vmov.i32 d0, #0x20FFFF +;CHECK: vmov.i32 d{{.*}}, #0x20FFFF ret <2 x i32> < i32 2162687, i32 2162687 > } define <2 x i32> @v_mvni32a() nounwind { ;CHECK: v_mvni32a: -;CHECK: vmvn.i32 d0, #0x20 +;CHECK: vmvn.i32 d{{.*}}, #0x20 ret <2 x i32> < i32 4294967263, i32 4294967263 > } define <2 x i32> @v_mvni32b() nounwind { ;CHECK: v_mvni32b: -;CHECK: vmvn.i32 d0, #0x2000 +;CHECK: vmvn.i32 d{{.*}}, #0x2000 ret <2 x i32> < i32 4294959103, i32 4294959103 > } define <2 x i32> @v_mvni32c() nounwind { ;CHECK: v_mvni32c: -;CHECK: vmvn.i32 d0, #0x200000 +;CHECK: vmvn.i32 d{{.*}}, #0x200000 ret <2 x i32> < i32 4292870143, i32 4292870143 > } define <2 x i32> @v_mvni32d() nounwind { ;CHECK: v_mvni32d: -;CHECK: vmvn.i32 d0, #0x20000000 +;CHECK: vmvn.i32 d{{.*}}, #0x20000000 ret <2 x i32> < i32 3758096383, i32 3758096383 > } define <2 x i32> @v_mvni32e() nounwind { ;CHECK: v_mvni32e: -;CHECK: vmvn.i32 d0, #0x20FF +;CHECK: vmvn.i32 d{{.*}}, #0x20FF ret <2 x i32> < i32 4294958848, i32 4294958848 > } define <2 x i32> @v_mvni32f() nounwind { ;CHECK: v_mvni32f: -;CHECK: vmvn.i32 d0, #0x20FFFF +;CHECK: vmvn.i32 d{{.*}}, #0x20FFFF ret <2 x i32> < i32 4292804608, i32 4292804608 > } define <1 x i64> @v_movi64() nounwind { ;CHECK: v_movi64: -;CHECK: vmov.i64 d0, #0xFF0000FF0000FFFF +;CHECK: vmov.i64 d{{.*}}, #0xFF0000FF0000FFFF ret <1 x i64> < i64 18374687574888349695 > } define <16 x i8> @v_movQi8() nounwind { ;CHECK: v_movQi8: -;CHECK: vmov.i8 q0, #0x8 +;CHECK: vmov.i8 q{{.*}}, #0x8 ret <16 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 > } define <8 x i16> @v_movQi16a() nounwind { ;CHECK: v_movQi16a: -;CHECK: vmov.i16 q0, #0x10 +;CHECK: vmov.i16 q{{.*}}, #0x10 ret <8 x i16> < i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16 > } define <8 x i16> @v_movQi16b() nounwind { ;CHECK: v_movQi16b: -;CHECK: vmov.i16 q0, #0x1000 +;CHECK: vmov.i16 q{{.*}}, #0x1000 ret <8 x i16> < i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096 > } define <4 x i32> @v_movQi32a() nounwind { ;CHECK: v_movQi32a: -;CHECK: vmov.i32 q0, #0x20 +;CHECK: vmov.i32 q{{.*}}, #0x20 ret <4 x i32> < i32 32, i32 32, i32 32, i32 32 > } define <4 x i32> @v_movQi32b() nounwind { ;CHECK: v_movQi32b: -;CHECK: vmov.i32 q0, #0x2000 +;CHECK: vmov.i32 q{{.*}}, #0x2000 ret <4 x i32> < i32 8192, i32 8192, i32 8192, i32 8192 > } define <4 x i32> @v_movQi32c() nounwind { ;CHECK: v_movQi32c: -;CHECK: vmov.i32 q0, #0x200000 +;CHECK: vmov.i32 q{{.*}}, #0x200000 ret <4 x i32> < i32 2097152, i32 2097152, i32 2097152, i32 2097152 > } define <4 x i32> @v_movQi32d() nounwind { ;CHECK: v_movQi32d: -;CHECK: vmov.i32 q0, #0x20000000 +;CHECK: vmov.i32 q{{.*}}, #0x20000000 ret <4 x i32> < i32 536870912, i32 536870912, i32 536870912, i32 536870912 > } define <4 x i32> @v_movQi32e() nounwind { ;CHECK: v_movQi32e: -;CHECK: vmov.i32 q0, #0x20FF +;CHECK: vmov.i32 q{{.*}}, #0x20FF ret <4 x i32> < i32 8447, i32 8447, i32 8447, i32 8447 > } define <4 x i32> @v_movQi32f() nounwind { ;CHECK: v_movQi32f: -;CHECK: vmov.i32 q0, #0x20FFFF +;CHECK: vmov.i32 q{{.*}}, #0x20FFFF ret <4 x i32> < i32 2162687, i32 2162687, i32 2162687, i32 2162687 > } define <2 x i64> @v_movQi64() nounwind { ;CHECK: v_movQi64: -;CHECK: vmov.i64 q0, #0xFF0000FF0000FFFF +;CHECK: vmov.i64 q{{.*}}, #0xFF0000FF0000FFFF ret <2 x i64> < i64 18374687574888349695, i64 18374687574888349695 > } @@ -173,7 +173,7 @@ define <2 x i64> @v_movQi64() nounwind { define void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind { entry: ;CHECK: vdupn128: -;CHECK: vmov.i8 d0, #0x80 +;CHECK: vmov.i8 d{{.*}}, #0x80 %0 = getelementptr inbounds %struct.int8x8_t* %agg.result, i32 0, i32 0 ; <<8 x i8>*> [#uses=1] store <8 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>, <8 x i8>* %0, align 8 ret void @@ -182,7 +182,7 @@ entry: define void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind { entry: ;CHECK: vdupnneg75: -;CHECK: vmov.i8 d0, #0xB5 +;CHECK: vmov.i8 d{{.*}}, #0xB5 %0 = getelementptr inbounds %struct.int8x8_t* %agg.result, i32 0, i32 0 ; <<8 x i8>*> [#uses=1] store <8 x i8> <i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75>, <8 x i8>* %0, align 8 ret void @@ -343,3 +343,13 @@ declare <2 x i32> @llvm.arm.neon.vqmovnu.v2i32(<2 x i64>) nounwind readnone declare <8 x i8> @llvm.arm.neon.vqmovnsu.v8i8(<8 x i16>) nounwind readnone declare <4 x i16> @llvm.arm.neon.vqmovnsu.v4i16(<4 x i32>) nounwind readnone declare <2 x i32> @llvm.arm.neon.vqmovnsu.v2i32(<2 x i64>) nounwind readnone + +; Truncating vector stores are not supported. The following should not crash. +; Radar 8598391. +define void @noTruncStore(<4 x i32>* %a, <4 x i16>* %b) nounwind { +;CHECK: vmovn + %tmp1 = load <4 x i32>* %a, align 16 + %tmp2 = trunc <4 x i32> %tmp1 to <4 x i16> + store <4 x i16> %tmp2, <4 x i16>* %b, align 8 + ret void +} diff --git a/test/CodeGen/ARM/vmul.ll b/test/CodeGen/ARM/vmul.ll index 5383425018f8..ee033caa00d0 100644 --- a/test/CodeGen/ARM/vmul.ll +++ b/test/CodeGen/ARM/vmul.ll @@ -267,3 +267,75 @@ entry: } declare <8 x i16> @llvm.arm.neon.vmullp.v8i16(<8 x i8>, <8 x i8>) nounwind readnone + + +; Radar 8687140 +; VMULL needs to recognize BUILD_VECTORs with sign/zero-extended elements. + +define <8 x i16> @vmull_extvec_s8(<8 x i8> %arg) nounwind { +; CHECK: vmull_extvec_s8 +; CHECK: vmull.s8 + %tmp3 = sext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, <i16 -12, i16 -12, i16 -12, i16 -12, i16 -12, i16 -12, i16 -12, i16 -12> + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_extvec_u8(<8 x i8> %arg) nounwind { +; CHECK: vmull_extvec_u8 +; CHECK: vmull.u8 + %tmp3 = zext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, <i16 12, i16 12, i16 12, i16 12, i16 12, i16 12, i16 12, i16 12> + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_noextvec_s8(<8 x i8> %arg) nounwind { +; Do not use VMULL if the BUILD_VECTOR element values are too big. +; CHECK: vmull_noextvec_s8 +; CHECK: vmovl.s8 +; CHECK: vmul.i16 + %tmp3 = sext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, <i16 -999, i16 -999, i16 -999, i16 -999, i16 -999, i16 -999, i16 -999, i16 -999> + ret <8 x i16> %tmp4 +} + +define <8 x i16> @vmull_noextvec_u8(<8 x i8> %arg) nounwind { +; Do not use VMULL if the BUILD_VECTOR element values are too big. +; CHECK: vmull_noextvec_u8 +; CHECK: vmovl.u8 +; CHECK: vmul.i16 + %tmp3 = zext <8 x i8> %arg to <8 x i16> + %tmp4 = mul <8 x i16> %tmp3, <i16 999, i16 999, i16 999, i16 999, i16 999, i16 999, i16 999, i16 999> + ret <8 x i16> %tmp4 +} + +define <4 x i32> @vmull_extvec_s16(<4 x i16> %arg) nounwind { +; CHECK: vmull_extvec_s16 +; CHECK: vmull.s16 + %tmp3 = sext <4 x i16> %arg to <4 x i32> + %tmp4 = mul <4 x i32> %tmp3, <i32 -12, i32 -12, i32 -12, i32 -12> + ret <4 x i32> %tmp4 +} + +define <4 x i32> @vmull_extvec_u16(<4 x i16> %arg) nounwind { +; CHECK: vmull_extvec_u16 +; CHECK: vmull.u16 + %tmp3 = zext <4 x i16> %arg to <4 x i32> + %tmp4 = mul <4 x i32> %tmp3, <i32 1234, i32 1234, i32 1234, i32 1234> + ret <4 x i32> %tmp4 +} + +define <2 x i64> @vmull_extvec_s32(<2 x i32> %arg) nounwind { +; CHECK: vmull_extvec_s32 +; CHECK: vmull.s32 + %tmp3 = sext <2 x i32> %arg to <2 x i64> + %tmp4 = mul <2 x i64> %tmp3, <i64 -1234, i64 -1234> + ret <2 x i64> %tmp4 +} + +define <2 x i64> @vmull_extvec_u32(<2 x i32> %arg) nounwind { +; CHECK: vmull_extvec_u32 +; CHECK: vmull.u32 + %tmp3 = zext <2 x i32> %arg to <2 x i64> + %tmp4 = mul <2 x i64> %tmp3, <i64 1234, i64 1234> + ret <2 x i64> %tmp4 +} diff --git a/test/CodeGen/ARM/vrev.ll b/test/CodeGen/ARM/vrev.ll index e1fe64b02d9d..f0f9e4e339b4 100644 --- a/test/CodeGen/ARM/vrev.ll +++ b/test/CodeGen/ARM/vrev.ll @@ -129,3 +129,21 @@ define <8 x i16> @test_vrev32Q16_undef(<8 x i16>* %A) nounwind { %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <8 x i32> <i32 undef, i32 0, i32 undef, i32 2, i32 5, i32 4, i32 7, i32 undef> ret <8 x i16> %tmp2 } + +; A vcombine feeding a VREV should not obscure things. Radar 8597007. + +define void @test_with_vcombine(<4 x float>* %v) nounwind { +;CHECK: test_with_vcombine: +;CHECK-NOT: vext +;CHECK: vrev64.32 + %tmp1 = load <4 x float>* %v, align 16 + %tmp2 = bitcast <4 x float> %tmp1 to <2 x double> + %tmp3 = extractelement <2 x double> %tmp2, i32 0 + %tmp4 = bitcast double %tmp3 to <2 x float> + %tmp5 = extractelement <2 x double> %tmp2, i32 1 + %tmp6 = bitcast double %tmp5 to <2 x float> + %tmp7 = fadd <2 x float> %tmp6, %tmp6 + %tmp8 = shufflevector <2 x float> %tmp4, <2 x float> %tmp7, <4 x i32> <i32 1, i32 0, i32 3, i32 2> + store <4 x float> %tmp8, <4 x float>* %v, align 16 + ret void +} diff --git a/test/CodeGen/ARM/vst1.ll b/test/CodeGen/ARM/vst1.ll index 2b535ada3072..364d44b7116f 100644 --- a/test/CodeGen/ARM/vst1.ll +++ b/test/CodeGen/ARM/vst1.ll @@ -2,9 +2,10 @@ define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst1i8: -;CHECK: vst1.8 +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vst1.8 {d16}, [r0, :64] %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst1.v8i8(i8* %A, <8 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst1.v8i8(i8* %A, <8 x i8> %tmp1, i32 16) ret void } @@ -35,6 +36,19 @@ define void @vst1f(float* %A, <2 x float>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst1f_update(float** %ptr, <2 x float>* %B) nounwind { +;CHECK: vst1f_update: +;CHECK: vst1.32 {d16}, [r1]! + %A = load float** %ptr + %tmp0 = bitcast float* %A to i8* + %tmp1 = load <2 x float>* %B + call void @llvm.arm.neon.vst1.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1) + %tmp2 = getelementptr float* %A, i32 2 + store float* %tmp2, float** %ptr + ret void +} + define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind { ;CHECK: vst1i64: ;CHECK: vst1.64 @@ -46,18 +60,33 @@ define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind { define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vst1Qi8: -;CHECK: vst1.8 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vst1.8 {d16, d17}, [r0, :64] %tmp1 = load <16 x i8>* %B - call void @llvm.arm.neon.vst1.v16i8(i8* %A, <16 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst1.v16i8(i8* %A, <16 x i8> %tmp1, i32 8) ret void } define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vst1Qi16: -;CHECK: vst1.16 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vst1.16 {d16, d17}, [r0, :128] + %tmp0 = bitcast i16* %A to i8* + %tmp1 = load <8 x i16>* %B + call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 32) + ret void +} + +;Check for a post-increment updating store with register increment. +define void @vst1Qi16_update(i16** %ptr, <8 x i16>* %B, i32 %inc) nounwind { +;CHECK: vst1Qi16_update: +;CHECK: vst1.16 {d16, d17}, [r1, :64], r2 + %A = load i16** %ptr %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 1) + call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 8) + %tmp2 = getelementptr i16* %A, i32 %inc + store i16* %tmp2, i16** %ptr ret void } diff --git a/test/CodeGen/ARM/vst2.ll b/test/CodeGen/ARM/vst2.ll index aed15fd51c56..915a84b67767 100644 --- a/test/CodeGen/ARM/vst2.ll +++ b/test/CodeGen/ARM/vst2.ll @@ -2,18 +2,32 @@ define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst2i8: -;CHECK: vst2.8 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vst2.8 {d16, d17}, [r0, :64] %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8) + ret void +} + +;Check for a post-increment updating store with register increment. +define void @vst2i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { +;CHECK: vst2i8_update: +;CHECK: vst2.8 {d16, d17}, [r1], r2 + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 4) + %tmp2 = getelementptr i8* %A, i32 %inc + store i8* %tmp2, i8** %ptr ret void } define void @vst2i16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst2i16: -;CHECK: vst2.16 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vst2.16 {d16, d17}, [r0, :128] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst2.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) + call void @llvm.arm.neon.vst2.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 32) ret void } @@ -37,36 +51,53 @@ define void @vst2f(float* %A, <2 x float>* %B) nounwind { define void @vst2i64(i64* %A, <1 x i64>* %B) nounwind { ;CHECK: vst2i64: -;CHECK: vst1.64 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vst1.64 {d16, d17}, [r0, :128] + %tmp0 = bitcast i64* %A to i8* + %tmp1 = load <1 x i64>* %B + call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 32) + ret void +} + +;Check for a post-increment updating store. +define void @vst2i64_update(i64** %ptr, <1 x i64>* %B) nounwind { +;CHECK: vst2i64_update: +;CHECK: vst1.64 {d16, d17}, [r1, :64]! + %A = load i64** %ptr %tmp0 = bitcast i64* %A to i8* %tmp1 = load <1 x i64>* %B - call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) + call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 8) + %tmp2 = getelementptr i64* %A, i32 2 + store i64* %tmp2, i64** %ptr ret void } define void @vst2Qi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vst2Qi8: -;CHECK: vst2.8 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64] %tmp1 = load <16 x i8>* %B - call void @llvm.arm.neon.vst2.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst2.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 8) ret void } define void @vst2Qi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vst2Qi16: -;CHECK: vst2.16 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vst2.16 {d16, d17, d18, d19}, [r0, :128] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst2.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) + call void @llvm.arm.neon.vst2.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 16) ret void } define void @vst2Qi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vst2Qi32: -;CHECK: vst2.32 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vst2.32 {d16, d17, d18, d19}, [r0, :256] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst2.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1) + call void @llvm.arm.neon.vst2.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 64) ret void } diff --git a/test/CodeGen/ARM/vst3.ll b/test/CodeGen/ARM/vst3.ll index 1feaed5a1044..d262303bc60e 100644 --- a/test/CodeGen/ARM/vst3.ll +++ b/test/CodeGen/ARM/vst3.ll @@ -2,9 +2,11 @@ define void @vst3i8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst3i8: -;CHECK: vst3.8 +;Check the alignment value. Max for this instruction is 64 bits: +;This test runs at -O0 so do not check for specific register numbers. +;CHECK: vst3.8 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}, :64] %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst3.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst3.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 32) ret void } @@ -26,6 +28,19 @@ define void @vst3i32(i32* %A, <2 x i32>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst3i32_update(i32** %ptr, <2 x i32>* %B) nounwind { +;CHECK: vst3i32_update: +;CHECK: vst3.32 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = load <2 x i32>* %B + call void @llvm.arm.neon.vst3.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + %tmp2 = getelementptr i32* %A, i32 6 + store i32* %tmp2, i32** %ptr + ret void +} + define void @vst3f(float* %A, <2 x float>* %B) nounwind { ;CHECK: vst3f: ;CHECK: vst3.32 @@ -37,19 +52,23 @@ define void @vst3f(float* %A, <2 x float>* %B) nounwind { define void @vst3i64(i64* %A, <1 x i64>* %B) nounwind { ;CHECK: vst3i64: -;CHECK: vst1.64 +;Check the alignment value. Max for this instruction is 64 bits: +;This test runs at -O0 so do not check for specific register numbers. +;CHECK: vst1.64 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}, :64] %tmp0 = bitcast i64* %A to i8* %tmp1 = load <1 x i64>* %B - call void @llvm.arm.neon.vst3.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) + call void @llvm.arm.neon.vst3.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 16) ret void } define void @vst3Qi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vst3Qi8: -;CHECK: vst3.8 -;CHECK: vst3.8 +;Check the alignment value. Max for this instruction is 64 bits: +;This test runs at -O0 so do not check for specific register numbers. +;CHECK: vst3.8 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}, :64]! +;CHECK: vst3.8 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}, :64] %tmp1 = load <16 x i8>* %B - call void @llvm.arm.neon.vst3.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst3.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 32) ret void } @@ -63,6 +82,20 @@ define void @vst3Qi16(i16* %A, <8 x i16>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst3Qi16_update(i16** %ptr, <8 x i16>* %B) nounwind { +;CHECK: vst3Qi16_update: +;CHECK: vst3.16 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! +;CHECK: vst3.16 {d{{.*}}, d{{.*}}, d{{.*}}}, [r{{.*}}]! + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = load <8 x i16>* %B + call void @llvm.arm.neon.vst3.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) + %tmp2 = getelementptr i16* %A, i32 24 + store i16* %tmp2, i16** %ptr + ret void +} + define void @vst3Qi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vst3Qi32: ;CHECK: vst3.32 diff --git a/test/CodeGen/ARM/vst4.ll b/test/CodeGen/ARM/vst4.ll index d302f097fc1f..e94acb66bf2e 100644 --- a/test/CodeGen/ARM/vst4.ll +++ b/test/CodeGen/ARM/vst4.ll @@ -2,27 +2,42 @@ define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst4i8: -;CHECK: vst4.8 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vst4.8 {d16, d17, d18, d19}, [r0, :64] %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8) + ret void +} + +;Check for a post-increment updating store with register increment. +define void @vst4i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { +;CHECK: vst4i8_update: +;CHECK: vst4.8 {d16, d17, d18, d19}, [r1, :128], r2 + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 16) + %tmp2 = getelementptr i8* %A, i32 %inc + store i8* %tmp2, i8** %ptr ret void } define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst4i16: -;CHECK: vst4.16 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vst4.16 {d16, d17, d18, d19}, [r0, :128] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst4.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) + call void @llvm.arm.neon.vst4.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 16) ret void } define void @vst4i32(i32* %A, <2 x i32>* %B) nounwind { ;CHECK: vst4i32: -;CHECK: vst4.32 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vst4.32 {d16, d17, d18, d19}, [r0, :256] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst4.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + call void @llvm.arm.neon.vst4.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 32) ret void } @@ -37,26 +52,29 @@ define void @vst4f(float* %A, <2 x float>* %B) nounwind { define void @vst4i64(i64* %A, <1 x i64>* %B) nounwind { ;CHECK: vst4i64: -;CHECK: vst1.64 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vst1.64 {d16, d17, d18, d19}, [r0, :256] %tmp0 = bitcast i64* %A to i8* %tmp1 = load <1 x i64>* %B - call void @llvm.arm.neon.vst4.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) + call void @llvm.arm.neon.vst4.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 64) ret void } define void @vst4Qi8(i8* %A, <16 x i8>* %B) nounwind { ;CHECK: vst4Qi8: -;CHECK: vst4.8 -;CHECK: vst4.8 +;Check the alignment value. Max for this instruction is 256 bits: +;CHECK: vst4.8 {d16, d18, d20, d22}, [r0, :256]! +;CHECK: vst4.8 {d17, d19, d21, d23}, [r0, :256] %tmp1 = load <16 x i8>* %B - call void @llvm.arm.neon.vst4.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst4.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 64) ret void } define void @vst4Qi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vst4Qi16: -;CHECK: vst4.16 -;CHECK: vst4.16 +;Check for no alignment specifier. +;CHECK: vst4.16 {d16, d18, d20, d22}, [r0]! +;CHECK: vst4.16 {d17, d19, d21, d23}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B call void @llvm.arm.neon.vst4.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) @@ -83,6 +101,20 @@ define void @vst4Qf(float* %A, <4 x float>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst4Qf_update(float** %ptr, <4 x float>* %B) nounwind { +;CHECK: vst4Qf_update: +;CHECK: vst4.32 {d16, d18, d20, d22}, [r1]! +;CHECK: vst4.32 {d17, d19, d21, d23}, [r1]! + %A = load float** %ptr + %tmp0 = bitcast float* %A to i8* + %tmp1 = load <4 x float>* %B + call void @llvm.arm.neon.vst4.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) + %tmp2 = getelementptr float* %A, i32 16 + store float* %tmp2, float** %ptr + ret void +} + declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind diff --git a/test/CodeGen/ARM/vstlane.ll b/test/CodeGen/ARM/vstlane.ll index 30ec52ac6420..6cc052bbeb1c 100644 --- a/test/CodeGen/ARM/vstlane.ll +++ b/test/CodeGen/ARM/vstlane.ll @@ -1,19 +1,109 @@ ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +define void @vst1lanei8(i8* %A, <8 x i8>* %B) nounwind { +;CHECK: vst1lanei8: +;Check the (default) alignment. +;CHECK: vst1.8 {d16[3]}, [r0] + %tmp1 = load <8 x i8>* %B + %tmp2 = extractelement <8 x i8> %tmp1, i32 3 + store i8 %tmp2, i8* %A, align 8 + ret void +} + +define void @vst1lanei16(i16* %A, <4 x i16>* %B) nounwind { +;CHECK: vst1lanei16: +;Check the alignment value. Max for this instruction is 16 bits: +;CHECK: vst1.16 {d16[2]}, [r0, :16] + %tmp1 = load <4 x i16>* %B + %tmp2 = extractelement <4 x i16> %tmp1, i32 2 + store i16 %tmp2, i16* %A, align 8 + ret void +} + +define void @vst1lanei32(i32* %A, <2 x i32>* %B) nounwind { +;CHECK: vst1lanei32: +;Check the alignment value. Max for this instruction is 32 bits: +;CHECK: vst1.32 {d16[1]}, [r0, :32] + %tmp1 = load <2 x i32>* %B + %tmp2 = extractelement <2 x i32> %tmp1, i32 1 + store i32 %tmp2, i32* %A, align 8 + ret void +} + +define void @vst1lanef(float* %A, <2 x float>* %B) nounwind { +;CHECK: vst1lanef: +;CHECK: vst1.32 {d16[1]}, [r0] + %tmp1 = load <2 x float>* %B + %tmp2 = extractelement <2 x float> %tmp1, i32 1 + store float %tmp2, float* %A + ret void +} + +define void @vst1laneQi8(i8* %A, <16 x i8>* %B) nounwind { +;CHECK: vst1laneQi8: +;CHECK: vst1.8 {d17[1]}, [r0] + %tmp1 = load <16 x i8>* %B + %tmp2 = extractelement <16 x i8> %tmp1, i32 9 + store i8 %tmp2, i8* %A, align 8 + ret void +} + +define void @vst1laneQi16(i16* %A, <8 x i16>* %B) nounwind { +;CHECK: vst1laneQi16: +;CHECK: vst1.16 {d17[1]}, [r0, :16] + %tmp1 = load <8 x i16>* %B + %tmp2 = extractelement <8 x i16> %tmp1, i32 5 + store i16 %tmp2, i16* %A, align 8 + ret void +} + +define void @vst1laneQi32(i32* %A, <4 x i32>* %B) nounwind { +;CHECK: vst1laneQi32: +;CHECK: vst1.32 {d17[1]}, [r0, :32] + %tmp1 = load <4 x i32>* %B + %tmp2 = extractelement <4 x i32> %tmp1, i32 3 + store i32 %tmp2, i32* %A, align 8 + ret void +} + +define void @vst1laneQf(float* %A, <4 x float>* %B) nounwind { +;CHECK: vst1laneQf: +;CHECK: vst1.32 {d17[1]}, [r0] + %tmp1 = load <4 x float>* %B + %tmp2 = extractelement <4 x float> %tmp1, i32 3 + store float %tmp2, float* %A + ret void +} + define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst2lanei8: -;CHECK: vst2.8 +;Check the alignment value. Max for this instruction is 16 bits: +;CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16] %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) + call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4) ret void } define void @vst2lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst2lanei16: -;CHECK: vst2.16 +;Check the alignment value. Max for this instruction is 32 bits: +;CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) + call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8) + ret void +} + +;Check for a post-increment updating store with register increment. +define void @vst2lanei16_update(i16** %ptr, <4 x i16>* %B, i32 %inc) nounwind { +;CHECK: vst2lanei16_update: +;CHECK: vst2.16 {d16[1], d17[1]}, [r1], r2 + %A = load i16** %ptr + %tmp0 = bitcast i16* %A to i8* + %tmp1 = load <4 x i16>* %B + call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 2) + %tmp2 = getelementptr i16* %A, i32 %inc + store i16* %tmp2, i16** %ptr ret void } @@ -37,19 +127,21 @@ define void @vst2lanef(float* %A, <2 x float>* %B) nounwind { define void @vst2laneQi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vst2laneQi16: -;CHECK: vst2.16 +;Check the (default) alignment. +;CHECK: vst2.16 {d17[1], d19[1]}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) + call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1) ret void } define void @vst2laneQi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vst2laneQi32: -;CHECK: vst2.32 +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1) + call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16) ret void } @@ -81,10 +173,11 @@ define void @vst3lanei8(i8* %A, <8 x i8>* %B) nounwind { define void @vst3lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst3lanei16: -;CHECK: vst3.16 +;Check the (default) alignment value. VST3 does not support alignment. +;CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) + call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8) ret void } @@ -108,10 +201,11 @@ define void @vst3lanef(float* %A, <2 x float>* %B) nounwind { define void @vst3laneQi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vst3laneQi16: -;CHECK: vst3.16 +;Check the (default) alignment value. VST3 does not support alignment. +;CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 1) + call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 8) ret void } @@ -124,6 +218,19 @@ define void @vst3laneQi32(i32* %A, <4 x i32>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst3laneQi32_update(i32** %ptr, <4 x i32>* %B) nounwind { +;CHECK: vst3laneQi32_update: +;CHECK: vst3.32 {d16[0], d18[0], d20[0]}, [r1]! + %A = load i32** %ptr + %tmp0 = bitcast i32* %A to i8* + %tmp1 = load <4 x i32>* %B + call void @llvm.arm.neon.vst3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0, i32 1) + %tmp2 = getelementptr i32* %A, i32 3 + store i32* %tmp2, i32** %ptr + ret void +} + define void @vst3laneQf(float* %A, <4 x float>* %B) nounwind { ;CHECK: vst3laneQf: ;CHECK: vst3.32 @@ -145,9 +252,22 @@ declare void @llvm.arm.neon.vst3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x f define void @vst4lanei8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst4lanei8: -;CHECK: vst4.8 +;Check the alignment value. Max for this instruction is 32 bits: +;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] + %tmp1 = load <8 x i8>* %B + call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8) + ret void +} + +;Check for a post-increment updating store. +define void @vst4lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind { +;CHECK: vst4lanei8_update: +;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]! + %A = load i8** %ptr %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) + call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8) + %tmp2 = getelementptr i8* %A, i32 4 + store i8* %tmp2, i8** %ptr ret void } @@ -162,10 +282,11 @@ define void @vst4lanei16(i16* %A, <4 x i16>* %B) nounwind { define void @vst4lanei32(i32* %A, <2 x i32>* %B) nounwind { ;CHECK: vst4lanei32: -;CHECK: vst4.32 +;Check the alignment value. Max for this instruction is 128 bits: +;CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) + call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16) ret void } @@ -180,16 +301,18 @@ define void @vst4lanef(float* %A, <2 x float>* %B) nounwind { define void @vst4laneQi16(i16* %A, <8 x i16>* %B) nounwind { ;CHECK: vst4laneQi16: -;CHECK: vst4.16 +;Check the alignment value. Max for this instruction is 64 bits: +;CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 1) + call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 16) ret void } define void @vst4laneQi32(i32* %A, <4 x i32>* %B) nounwind { ;CHECK: vst4laneQi32: -;CHECK: vst4.32 +;Check the (default) alignment. +;CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B call void @llvm.arm.neon.vst4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1) diff --git a/test/CodeGen/Alpha/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/Alpha/2010-04-07-DbgValueOtherTargets.ll index cf3f0b90037d..4590f1245ae9 100644 --- a/test/CodeGen/Alpha/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/Alpha/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=alpha -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/CellSPU/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/CellSPU/2010-04-07-DbgValueOtherTargets.ll index 45d53c8c975f..401399face9a 100644 --- a/test/CodeGen/CellSPU/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/CellSPU/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=cellspu -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/CellSPU/arg_ret.ll b/test/CodeGen/CellSPU/arg_ret.ll index 743292a58d59..7410b724d6fc 100644 --- a/test/CodeGen/CellSPU/arg_ret.ll +++ b/test/CodeGen/CellSPU/arg_ret.ll @@ -26,7 +26,8 @@ define ccc i32 @test_regs_and_stack( %paramstruct %prm, i32 %stackprm ) define ccc %paramstruct @test_return( i32 %param, %paramstruct %prm ) { -;CHECK: lqd $75, 80($sp) +;CHECK: lqd {{\$[0-9]+}}, 80($sp) +;CHECK-NOT: ori {{\$[0-9]+, \$[0-9]+, 0}} ;CHECK: lr $3, $4 ret %paramstruct %prm } diff --git a/test/CodeGen/CellSPU/div_ops.ll b/test/CodeGen/CellSPU/div_ops.ll new file mode 100644 index 000000000000..0c93d83ca76d --- /dev/null +++ b/test/CodeGen/CellSPU/div_ops.ll @@ -0,0 +1,22 @@ +; RUN: llc --march=cellspu %s -o - | FileCheck %s + +; signed division rounds towards zero, rotma don't. +define i32 @sdivide (i32 %val ) +{ +; CHECK: rotmai +; CHECK: rotmi +; CHECK: a +; CHECK: rotmai +; CHECK: bi $lr + %rv = sdiv i32 %val, 4 + ret i32 %rv +} + +define i32 @udivide (i32 %val ) +{ +; CHECK: rotmi +; CHECK: bi $lr + %rv = udiv i32 %val, 4 + ret i32 %rv +} + diff --git a/test/CodeGen/CellSPU/fcmp32.ll b/test/CodeGen/CellSPU/fcmp32.ll index f07fe6fdab28..c14fd7ba4a46 100644 --- a/test/CodeGen/CellSPU/fcmp32.ll +++ b/test/CodeGen/CellSPU/fcmp32.ll @@ -1,9 +1,4 @@ -; RUN: llc < %s -march=cellspu > %t1.s -; RUN: grep fceq %t1.s | count 1 -; RUN: grep fcmeq %t1.s | count 1 - -target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" -target triple = "spu" +; RUN: llc --march=cellspu %s -o - | FileCheck %s ; Exercise the floating point comparison operators for f32: @@ -11,13 +6,31 @@ declare double @fabs(double) declare float @fabsf(float) define i1 @fcmp_eq(float %arg1, float %arg2) { +; CHECK: fceq +; CHECK: bi $lr %A = fcmp oeq float %arg1, %arg2 ret i1 %A } define i1 @fcmp_mag_eq(float %arg1, float %arg2) { +; CHECK: fcmeq +; CHECK: bi $lr %1 = call float @fabsf(float %arg1) %2 = call float @fabsf(float %arg2) %3 = fcmp oeq float %1, %2 ret i1 %3 } + +define i1 @test_ogt(float %a, float %b) { +; CHECK: fcgt +; CHECK: bi $lr + %cmp = fcmp ogt float %a, %b + ret i1 %cmp +} + +define i1 @test_ugt(float %a, float %b) { +; CHECK: fcgt +; CHECK: bi $lr + %cmp = fcmp ugt float %a, %b + ret i1 %cmp +} diff --git a/test/CodeGen/CellSPU/immed32.ll b/test/CodeGen/CellSPU/immed32.ll index 119f526847ce..8e48f0b52c17 100644 --- a/test/CodeGen/CellSPU/immed32.ll +++ b/test/CodeGen/CellSPU/immed32.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=cellspu > %t1.s -; RUN: grep ilhu %t1.s | count 8 -; RUN: grep iohl %t1.s | count 6 +; RUN: grep ilhu %t1.s | count 9 +; RUN: grep iohl %t1.s | count 7 ; RUN: grep -w il %t1.s | count 3 ; RUN: grep 16429 %t1.s | count 1 ; RUN: grep 63572 %t1.s | count 1 @@ -12,6 +12,7 @@ ; RUN: grep 49077 %t1.s | count 1 ; RUN: grep 1267 %t1.s | count 2 ; RUN: grep 16309 %t1.s | count 1 +; RUN: cat %t1.s | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -31,6 +32,16 @@ define i32 @test_4() { ret i32 -512 ;; IL via pattern } +define i32 @test_5() +{ +;CHECK: test_5: +;CHECK-NOT: ila $3, 40000 +;CHECK: ilhu +;CHECK: iohl +;CHECK: bi $lr + ret i32 400000 +} + ;; double float floatval ;; 0x4005bf0a80000000 0x402d|f854 2.718282 define float @float_const_1() { diff --git a/test/CodeGen/CellSPU/loads.ll b/test/CodeGen/CellSPU/loads.ll index d40217dacfea..03d7ad1153a1 100644 --- a/test/CodeGen/CellSPU/loads.ll +++ b/test/CodeGen/CellSPU/loads.ll @@ -38,3 +38,15 @@ define <4 x float> @load_undef(){ %val = load <4 x float>* undef ret <4 x float> %val } + +;check that 'misaligned' loads that may span two memory chunks +;have two loads. Don't check for the bitmanipulation, as that +;might change with improved algorithms or scheduling +define i32 @load_misaligned( i32* %ptr ){ +;CHECK: load_misaligned +;CHECK: lqd +;CHECK: lqd +;CHECK: bi $lr + %rv = load i32* %ptr, align 2 + ret i32 %rv +} diff --git a/test/CodeGen/CellSPU/rotate_ops.ll b/test/CodeGen/CellSPU/rotate_ops.ll index a504c002ae12..e1172089c703 100644 --- a/test/CodeGen/CellSPU/rotate_ops.ll +++ b/test/CodeGen/CellSPU/rotate_ops.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=cellspu -o %t1.s -; RUN: grep rot %t1.s | count 85 +; RUN: grep rot %t1.s | count 86 ; RUN: grep roth %t1.s | count 8 ; RUN: grep roti.*5 %t1.s | count 1 ; RUN: grep roti.*27 %t1.s | count 1 @@ -8,6 +8,7 @@ ; RUN grep rothi.*,.3 %t1.s | count 1 ; RUN: grep andhi %t1.s | count 4 ; RUN: grep shlhi %t1.s | count 4 +; RUN: cat %t1.s | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -158,3 +159,14 @@ define i8 @rotri8(i8 %A) { %D = or i8 %B, %C ; <i8> [#uses=1] ret i8 %D } + +define <2 x float> @test1(<4 x float> %param ) +{ +; CHECK: test1 +; CHECK: rotqbyi + %el = extractelement <4 x float> %param, i32 1 + %vec1 = insertelement <1 x float> undef, float %el, i32 0 + %rv = shufflevector <1 x float> %vec1, <1 x float> undef, <2 x i32><i32 0,i32 0> +; CHECK: bi $lr + ret <2 x float> %rv +} diff --git a/test/CodeGen/CellSPU/sext128.ll b/test/CodeGen/CellSPU/sext128.ll index 0c0b3599b110..6ae9aa51202f 100644 --- a/test/CodeGen/CellSPU/sext128.ll +++ b/test/CodeGen/CellSPU/sext128.ll @@ -12,8 +12,9 @@ entry: ; CHECK: long 269488144 ; CHECK: long 66051 ; CHECK: long 67438087 -; CHECK: rotmai +; CHECK-NOT: rotqmbyi ; CHECK: lqa +; CHECK: rotmai ; CHECK: shufb } @@ -25,8 +26,9 @@ entry: ; CHECK: long 269488144 ; CHECK: long 269488144 ; CHECK: long 66051 -; CHECK: rotmai +; CHECK-NOT: rotqmbyi ; CHECK: lqa +; CHECK: rotmai ; CHECK: shufb } @@ -39,9 +41,31 @@ entry: ; CHECK: long 269488144 ; CHECK: long 269488144 ; CHECK: long 66051 -; CHECK: rotmai +; CHECK-NOT: rotqmbyi ; CHECK: lqa +; CHECK: rotmai ; CHECK: shufb } declare i32 @myfunc(float) + +define i128 @func1(i8 %u) { +entry: +; CHECK: xsbh +; CHECK: xshw +; CHECK: rotmai +; CHECK: shufb +; CHECK: bi $lr + %0 = sext i8 %u to i128 + ret i128 %0 +} + +define i128 @func2(i16 %u) { +entry: +; CHECK: xshw +; CHECK: rotmai +; CHECK: shufb +; CHECK: bi $lr + %0 = sext i16 %u to i128 + ret i128 %0 +} diff --git a/test/CodeGen/CellSPU/shift_ops.ll b/test/CodeGen/CellSPU/shift_ops.ll index 0264fc830ea8..92390abf9465 100644 --- a/test/CodeGen/CellSPU/shift_ops.ll +++ b/test/CodeGen/CellSPU/shift_ops.ll @@ -4,17 +4,18 @@ ; RUN: grep {shl } %t1.s | count 9 ; RUN: grep {shli } %t1.s | count 3 ; RUN: grep {xshw } %t1.s | count 5 -; RUN: grep {and } %t1.s | count 5 +; RUN: grep {and } %t1.s | count 14 ; RUN: grep {andi } %t1.s | count 2 ; RUN: grep {rotmi } %t1.s | count 2 ; RUN: grep {rotqmbyi } %t1.s | count 1 ; RUN: grep {rotqmbii } %t1.s | count 2 ; RUN: grep {rotqmby } %t1.s | count 1 -; RUN: grep {rotqmbi } %t1.s | count 1 +; RUN: grep {rotqmbi } %t1.s | count 2 ; RUN: grep {rotqbyi } %t1.s | count 1 ; RUN: grep {rotqbii } %t1.s | count 2 ; RUN: grep {rotqbybi } %t1.s | count 1 -; RUN: grep {sfi } %t1.s | count 3 +; RUN: grep {sfi } %t1.s | count 4 +; RUN: cat %t1.s | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -281,3 +282,14 @@ define i32 @hi32_i64(i64 %arg) { %2 = trunc i64 %1 to i32 ret i32 %2 } + +; some random tests +define i128 @test_lshr_i128( i128 %val ) { + ;CHECK: test_lshr_i128 + ;CHECK: sfi + ;CHECK: rotqmbi + ;CHECK: rotqmbybi + ;CHECK: bi $lr + %rv = lshr i128 %val, 64 + ret i128 %rv +} diff --git a/test/CodeGen/CellSPU/shuffles.ll b/test/CodeGen/CellSPU/shuffles.ll index f37d2ae89b00..c88a258c26c7 100644 --- a/test/CodeGen/CellSPU/shuffles.ll +++ b/test/CodeGen/CellSPU/shuffles.ll @@ -1,4 +1,4 @@ -; RUN: llc --march=cellspu < %s | FileCheck %s +; RUN: llc -O1 --march=cellspu < %s | FileCheck %s define <4 x float> @shuffle(<4 x float> %param1, <4 x float> %param2) { ; CHECK: cwd {{\$.}}, 0($sp) @@ -39,3 +39,29 @@ define <4 x float> @test_insert_1(<4 x float> %vparam, float %eltparam) { ret <4 x float> %rv } +define <2 x i32> @test_v2i32(<4 x i32>%vec) +{ +;CHECK: rotqbyi $3, $3, 4 +;CHECK: bi $lr + %rv = shufflevector <4 x i32> %vec, <4 x i32> undef, <2 x i32><i32 1,i32 2> + ret <2 x i32> %rv +} + +define <4 x i32> @test_v4i32_rot8(<4 x i32>%vec) +{ +;CHECK: rotqbyi $3, $3, 8 +;CHECK: bi $lr + %rv = shufflevector <4 x i32> %vec, <4 x i32> undef, + <4 x i32> <i32 2,i32 3,i32 0, i32 1> + ret <4 x i32> %rv +} + +define <4 x i32> @test_v4i32_rot4(<4 x i32>%vec) +{ +;CHECK: rotqbyi $3, $3, 4 +;CHECK: bi $lr + %rv = shufflevector <4 x i32> %vec, <4 x i32> undef, + <4 x i32> <i32 1,i32 2,i32 3, i32 0> + ret <4 x i32> %rv +} + diff --git a/test/CodeGen/CellSPU/stores.ll b/test/CodeGen/CellSPU/stores.ll index 05f44f4be046..7e0bf06b4e45 100644 --- a/test/CodeGen/CellSPU/stores.ll +++ b/test/CodeGen/CellSPU/stores.ll @@ -14,6 +14,7 @@ ; RUN: grep iohl %t1.s | count 8 ; RUN: grep shufb %t1.s | count 15 ; RUN: grep frds %t1.s | count 1 +; RUN: llc < %s -march=cellspu | FileCheck %s ; ModuleID = 'stores.bc' target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" @@ -149,3 +150,24 @@ entry: store float %conv, float* %dest ret float %conv } + +;Check stores that might span two 16 byte memory blocks +define void @store_misaligned( i32 %val, i32* %ptr) { +;CHECK: store_misaligned +;CHECK: lqd +;CHECK: lqd +;CHECK: stqd +;CHECK: stqd +;CHECK: bi $lr + store i32 %val, i32*%ptr, align 2 + ret void +} + +define void @store_v8( <8 x float> %val, <8 x float>* %ptr ) +{ +;CHECK: stq +;CHECK: stq +;CHECK: bi $lr + store <8 x float> %val, <8 x float>* %ptr + ret void +} diff --git a/test/CodeGen/CellSPU/v2f32.ll b/test/CodeGen/CellSPU/v2f32.ll index b81c0cdbb299..efd032031002 100644 --- a/test/CodeGen/CellSPU/v2f32.ll +++ b/test/CodeGen/CellSPU/v2f32.ll @@ -62,8 +62,7 @@ define %vec @test_insert(){ } define void @test_unaligned_store() { -;CHECK: cdd $3, 8($3) -;CHECK: lqd +;CHECK: cdd ;CHECK: shufb ;CHECK: stqd %data = alloca [4 x float], align 16 ; <[4 x float]*> [#uses=1] diff --git a/test/CodeGen/CellSPU/v2i32.ll b/test/CodeGen/CellSPU/v2i32.ll index dd51be5a71d2..71d4aba63332 100644 --- a/test/CodeGen/CellSPU/v2i32.ll +++ b/test/CodeGen/CellSPU/v2i32.ll @@ -37,9 +37,8 @@ define %vec @test_mul(%vec %param) } define <2 x i32> @test_splat(i32 %param ) { -;TODO insertelement transforms to a PREFSLOT2VEC, that trasforms to the -; somewhat redundant: -;CHECK-NOT or $3, $3, $3 +;see svn log for why this is here... +;CHECK-NOT: or $3, $3, $3 ;CHECK: lqa ;CHECK: shufb %sv = insertelement <1 x i32> undef, i32 %param, i32 0 @@ -62,3 +61,17 @@ define void @test_store( %vec %val, %vec* %ptr) store %vec %val, %vec* %ptr ret void } + +;Alignment of <2 x i32> is not *directly* defined in the ABI +;It probably is safe to interpret it as an array, thus having 8 byte +;alignment (according to ABI). This tests that the size of +;[2 x <2 x i32>] is 16 bytes, i.e. there is no padding between the +;two arrays +define <2 x i32>* @test_alignment( [2 x <2 x i32>]* %ptr) +{ +; CHECK-NOT: ai $3, $3, 16 +; CHECK: ai $3, $3, 8 +; CHECK: bi $lr + %rv = getelementptr [2 x <2 x i32>]* %ptr, i32 0, i32 1 + ret <2 x i32>* %rv +} diff --git a/test/CodeGen/Generic/2010-11-04-BigByval.ll b/test/CodeGen/Generic/2010-11-04-BigByval.ll new file mode 100644 index 000000000000..df2ca4c18a05 --- /dev/null +++ b/test/CodeGen/Generic/2010-11-04-BigByval.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s +; PR7170 + +%big = type [131072 x i8] + +declare void @foo(%big* byval align 1) + +define void @bar(%big* byval align 1 %x) { + call void @foo(%big* byval align 1 %x) + ret void +} diff --git a/test/CodeGen/Generic/2011-01-06-BigNumberCrash.ll b/test/CodeGen/Generic/2011-01-06-BigNumberCrash.ll new file mode 100644 index 000000000000..05fdf4c7449b --- /dev/null +++ b/test/CodeGen/Generic/2011-01-06-BigNumberCrash.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s +; PR8582 + +define void @uint82() nounwind { +entry: + %tmp3 = select i1 undef, i960 4872657003430991806293355221650511486142000513558154090491761976385142772940676648094983476628187266917101386048750715027104076737938178423519545241493072038894065019132638919037781494702597609951702322267198307200588774905587225212622510286498675097141625012190497682454879271766334636032, i960 0 + br i1 undef, label %for.body25.for.body25_crit_edge, label %if.end + +for.body25.for.body25_crit_edge: ; preds = %entry + %ins = or i960 %tmp3, undef + ret void + +if.end: ; preds = %entry + ret void +} diff --git a/test/CodeGen/Generic/2011-02-12-shuffle.ll b/test/CodeGen/Generic/2011-02-12-shuffle.ll new file mode 100644 index 000000000000..b4d56d193ca3 --- /dev/null +++ b/test/CodeGen/Generic/2011-02-12-shuffle.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s +; PR9165 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i686-pc-win32" + +define void @m_387() nounwind { +entry: + br i1 undef, label %if.end, label %UnifiedReturnBlock + +if.end: ; preds = %entry + %tmp1067 = load <16 x i32> addrspace(1)* null, align 64 + %tmp1082 = shufflevector <16 x i32> <i32 0, i32 0, i32 0, i32 undef, i32 undef, i32 0, i32 0, i32 undef, i32 0, i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef>, + <16 x i32> %tmp1067, + <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 26, i32 5, i32 6, i32 undef, i32 8, i32 9, i32 31, i32 30, i32 12, i32 undef, i32 undef, i32 undef> + + %tmp1100 = shufflevector <16 x i32> %tmp1082, + <16 x i32> %tmp1067, + <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 4, i32 5, i32 6, i32 18, i32 8, i32 9, i32 10, i32 11, i32 12, i32 25, i32 undef, i32 17> + + %tmp1112 = shufflevector <16 x i32> %tmp1100, + <16 x i32> %tmp1067, + <16 x i32> <i32 0, i32 1, i32 2, i32 24, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 18, i32 15> + + store <16 x i32> %tmp1112, <16 x i32> addrspace(1)* undef, align 64 + + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + diff --git a/test/CodeGen/Generic/add-with-overflow-128.ll b/test/CodeGen/Generic/add-with-overflow-128.ll index c46c820a7907..33f44d6e4436 100644 --- a/test/CodeGen/Generic/add-with-overflow-128.ll +++ b/test/CodeGen/Generic/add-with-overflow-128.ll @@ -3,22 +3,7 @@ @ok = internal constant [4 x i8] c"%d\0A\00" @no = internal constant [4 x i8] c"no\0A\00" -define i1 @func1(i128 signext %v1, i128 signext %v2) nounwind { -entry: - %t = call {i128, i1} @llvm.sadd.with.overflow.i128(i128 %v1, i128 %v2) - %sum = extractvalue {i128, i1} %t, 0 - %sum32 = trunc i128 %sum to i32 - %obit = extractvalue {i128, i1} %t, 1 - br i1 %obit, label %overflow, label %normal - -normal: - %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum32 ) nounwind - ret i1 true -overflow: - %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind - ret i1 false -} define i1 @func2(i128 zeroext %v1, i128 zeroext %v2) nounwind { entry: @@ -38,5 +23,12 @@ carry: } declare i32 @printf(i8*, ...) nounwind -declare {i128, i1} @llvm.sadd.with.overflow.i128(i128, i128) +declare {i96, i1} @llvm.sadd.with.overflow.i96(i96, i96) declare {i128, i1} @llvm.uadd.with.overflow.i128(i128, i128) + +define i1 @func1(i96 signext %v1, i96 signext %v2) nounwind { +entry: + %t = call {i96, i1} @llvm.sadd.with.overflow.i96(i96 %v1, i96 %v2) + %obit = extractvalue {i96, i1} %t, 1 + ret i1 %obit +} diff --git a/test/CodeGen/Generic/crash.ll b/test/CodeGen/Generic/crash.ll index 7218565617fc..042739884df7 100644 --- a/test/CodeGen/Generic/crash.ll +++ b/test/CodeGen/Generic/crash.ll @@ -6,3 +6,35 @@ @tags = global [1 x %struct.AVCodecTag*] [%struct.AVCodecTag* getelementptr inbounds ([0 x %struct.AVCodecTag]* @ff_codec_bmp_tags, i32 0, i32 0)] + +; rdar://8878965 + +%struct.CAMERA = type { [3 x double], [3 x double], [3 x double], [3 x double], [3 x double], [3 x double], double, double, i32, double, double, i32, double, i32* } + +define void @Parse_Camera(%struct.CAMERA** nocapture %Camera_Ptr) nounwind { +entry: +%.pre = load %struct.CAMERA** %Camera_Ptr, align 4 +%0 = getelementptr inbounds %struct.CAMERA* %.pre, i32 0, i32 1, i32 0 +%1 = getelementptr inbounds %struct.CAMERA* %.pre, i32 0, i32 1, i32 2 +br label %bb32 + +bb32: ; preds = %bb6 +%2 = load double* %0, align 4 +%3 = load double* %1, align 4 +%4 = load double* %0, align 4 +call void @Parse_Vector(double* %0) nounwind +%5 = call i32 @llvm.objectsize.i32(i8* undef, i1 false) +%6 = icmp eq i32 %5, -1 +br i1 %6, label %bb34, label %bb33 + +bb33: ; preds = %bb32 +unreachable + +bb34: ; preds = %bb32 +unreachable + +} + +declare void @Parse_Vector(double*) +declare i32 @llvm.objectsize.i32(i8*, i1) + diff --git a/test/CodeGen/Generic/overflow.ll b/test/CodeGen/Generic/overflow.ll new file mode 100644 index 000000000000..4196855c4ee7 --- /dev/null +++ b/test/CodeGen/Generic/overflow.ll @@ -0,0 +1,220 @@ +; RUN: llc < %s +; Verify codegen's don't crash on overflow intrinsics. + +;; SADD + +define zeroext i8 @sadd_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %sadd = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %sadd, 1 + %sadd.result = extractvalue { i8, i1 } %sadd, 0 + %X = select i1 %cmp, i8 %sadd.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.sadd.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @sadd_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %sadd = tail call { i16, i1 } @llvm.sadd.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %sadd, 1 + %sadd.result = extractvalue { i16, i1 } %sadd, 0 + %X = select i1 %cmp, i16 %sadd.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.sadd.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @sadd_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %sadd, 1 + %sadd.result = extractvalue { i32, i1 } %sadd, 0 + %X = select i1 %cmp, i32 %sadd.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone + + +;; UADD + +define zeroext i8 @uadd_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %uadd = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %uadd, 1 + %uadd.result = extractvalue { i8, i1 } %uadd, 0 + %X = select i1 %cmp, i8 %uadd.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @uadd_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %uadd = tail call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %uadd, 1 + %uadd.result = extractvalue { i16, i1 } %uadd, 0 + %X = select i1 %cmp, i16 %uadd.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.uadd.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @uadd_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %uadd = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %uadd, 1 + %uadd.result = extractvalue { i32, i1 } %uadd, 0 + %X = select i1 %cmp, i32 %uadd.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone + + + +;; ssub + +define zeroext i8 @ssub_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %ssub = tail call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %ssub, 1 + %ssub.result = extractvalue { i8, i1 } %ssub, 0 + %X = select i1 %cmp, i8 %ssub.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.ssub.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @ssub_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %ssub = tail call { i16, i1 } @llvm.ssub.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %ssub, 1 + %ssub.result = extractvalue { i16, i1 } %ssub, 0 + %X = select i1 %cmp, i16 %ssub.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.ssub.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @ssub_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %ssub = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %ssub, 1 + %ssub.result = extractvalue { i32, i1 } %ssub, 0 + %X = select i1 %cmp, i32 %ssub.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone + + +;; usub + +define zeroext i8 @usub_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %usub = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %usub, 1 + %usub.result = extractvalue { i8, i1 } %usub, 0 + %X = select i1 %cmp, i8 %usub.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.usub.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @usub_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %usub = tail call { i16, i1 } @llvm.usub.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %usub, 1 + %usub.result = extractvalue { i16, i1 } %usub, 0 + %X = select i1 %cmp, i16 %usub.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.usub.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @usub_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %usub = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %usub, 1 + %usub.result = extractvalue { i32, i1 } %usub, 0 + %X = select i1 %cmp, i32 %usub.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone + + + +;; smul + +define zeroext i8 @smul_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %smul = tail call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %smul, 1 + %smul.result = extractvalue { i8, i1 } %smul, 0 + %X = select i1 %cmp, i8 %smul.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.smul.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @smul_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %smul = tail call { i16, i1 } @llvm.smul.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %smul, 1 + %smul.result = extractvalue { i16, i1 } %smul, 0 + %X = select i1 %cmp, i16 %smul.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.smul.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @smul_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %smul = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %smul, 1 + %smul.result = extractvalue { i32, i1 } %smul, 0 + %X = select i1 %cmp, i32 %smul.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone + + +;; umul + +define zeroext i8 @umul_i8(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %umul = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %a, i8 %b) + %cmp = extractvalue { i8, i1 } %umul, 1 + %umul.result = extractvalue { i8, i1 } %umul, 0 + %X = select i1 %cmp, i8 %umul.result, i8 42 + ret i8 %X +} + +declare { i8, i1 } @llvm.umul.with.overflow.i8(i8, i8) nounwind readnone + +define zeroext i16 @umul_i16(i16 signext %a, i16 signext %b) nounwind ssp { +entry: + %umul = tail call { i16, i1 } @llvm.umul.with.overflow.i16(i16 %a, i16 %b) + %cmp = extractvalue { i16, i1 } %umul, 1 + %umul.result = extractvalue { i16, i1 } %umul, 0 + %X = select i1 %cmp, i16 %umul.result, i16 42 + ret i16 %X +} + +declare { i16, i1 } @llvm.umul.with.overflow.i16(i16, i16) nounwind readnone + +define zeroext i32 @umul_i32(i32 signext %a, i32 signext %b) nounwind ssp { +entry: + %umul = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %a, i32 %b) + %cmp = extractvalue { i32, i1 } %umul, 1 + %umul.result = extractvalue { i32, i1 } %umul, 0 + %X = select i1 %cmp, i32 %umul.result, i32 42 + ret i32 %X +} + +declare { i32, i1 } @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone + diff --git a/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll index 854352a70111..d8970eac9007 100644 --- a/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=mblaze -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/MBlaze/brind.ll b/test/CodeGen/MBlaze/brind.ll index 7798e0f56aac..2229a873827a 100644 --- a/test/CodeGen/MBlaze/brind.ll +++ b/test/CodeGen/MBlaze/brind.ll @@ -28,32 +28,31 @@ loop: label %L3, label %L4, label %L5 ] - ; CHECK: br {{r[0-9]*}} + ; CHECK: brad {{r[0-9]*}} L1: %tmp.1 = add i32 %a, %b br label %finish - ; CHECK: br + ; CHECK: brid L2: %tmp.2 = sub i32 %a, %b br label %finish - ; CHECK: br + ; CHECK: brid L3: %tmp.3 = mul i32 %a, %b br label %finish - ; CHECK: br + ; CHECK: brid L4: %tmp.4 = sdiv i32 %a, %b br label %finish - ; CHECK: br + ; CHECK: brid L5: %tmp.5 = srem i32 %a, %b br label %finish - ; CHECK: br finish: %tmp.6 = phi i32 [ %tmp.1, %L1 ], @@ -69,5 +68,5 @@ finish: %tmp.8 = urem i32 %tmp.7, 5 br label %loop - ; CHECK: br + ; CHECK: brad {{r[0-9]*}} } diff --git a/test/CodeGen/MBlaze/cc.ll b/test/CodeGen/MBlaze/cc.ll index aaa918ffc343..b1eb22aee9fd 100644 --- a/test/CodeGen/MBlaze/cc.ll +++ b/test/CodeGen/MBlaze/cc.ll @@ -12,7 +12,7 @@ declare i32 @printf(i8*, ...) define void @params0_noret() { ; CHECK: params0_noret: ret void - ; CHECK-NOT: {{.* r3, r0, 1}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd } @@ -20,81 +20,88 @@ define void @params0_noret() { define i8 @params0_8bitret() { ; CHECK: params0_8bitret: ret i8 1 - ; CHECK: {{.* r3, r0, 1}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r0, 1}} } define i16 @params0_16bitret() { ; CHECK: params0_16bitret: ret i16 1 + ; CHECK: rtsd ; CHECK: {{.* r3, r0, 1}} ; CHECK-NOT: {{.* r4, .*, .*}} - ; CHECK: rtsd } define i32 @params0_32bitret() { ; CHECK: params0_32bitret: ret i32 1 - ; CHECK: {{.* r3, r0, 1}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r0, 1}} } define i64 @params0_64bitret() { ; CHECK: params0_64bitret: ret i64 1 ; CHECK: {{.* r3, r0, .*}} - ; CHECK: {{.* r4, r0, 1}} ; CHECK: rtsd + ; CHECK: {{.* r4, r0, 1}} } define i32 @params1_32bitret(i32 %a) { ; CHECK: params1_32bitret: ret i32 %a - ; CHECK: {{.* r3, r5, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r5, r0}} } define i32 @params2_32bitret(i32 %a, i32 %b) { ; CHECK: params2_32bitret: ret i32 %b - ; CHECK: {{.* r3, r6, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r6, r0}} } define i32 @params3_32bitret(i32 %a, i32 %b, i32 %c) { ; CHECK: params3_32bitret: ret i32 %c - ; CHECK: {{.* r3, r7, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r7, r0}} } define i32 @params4_32bitret(i32 %a, i32 %b, i32 %c, i32 %d) { ; CHECK: params4_32bitret: ret i32 %d - ; CHECK: {{.* r3, r8, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r8, r0}} } define i32 @params5_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) { ; CHECK: params5_32bitret: ret i32 %e - ; CHECK: {{.* r3, r9, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r9, r0}} } define i32 @params6_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) { ; CHECK: params6_32bitret: ret i32 %f - ; CHECK: {{.* r3, r10, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r10, r0}} } define i32 @params7_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, @@ -142,53 +149,29 @@ define void @testing() { %tmp.1 = call i8 @params0_8bitret() ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i8 %tmp.1) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.2 = call i16 @params0_16bitret() ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i16 %tmp.2) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.3 = call i32 @params0_32bitret() ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.3) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.4 = call i64 @params0_64bitret() ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i64 %tmp.4) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK: {{.* r7, r4, r0}} - ; CHECK: brlid %tmp.5 = call i32 @params1_32bitret(i32 1) ; CHECK: {{.* r5, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.5) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.6 = call i32 @params2_32bitret(i32 1, i32 2) ; CHECK: {{.* r5, .*, .*}} ; CHECK: {{.* r6, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.6) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.7 = call i32 @params3_32bitret(i32 1, i32 2, i32 3) ; CHECK: {{.* r5, .*, .*}} @@ -196,10 +179,6 @@ define void @testing() { ; CHECK: {{.* r7, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.7) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.8 = call i32 @params4_32bitret(i32 1, i32 2, i32 3, i32 4) ; CHECK: {{.* r5, .*, .*}} @@ -208,10 +187,6 @@ define void @testing() { ; CHECK: {{.* r8, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.8) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.9 = call i32 @params5_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5) ; CHECK: {{.* r5, .*, .*}} @@ -221,10 +196,6 @@ define void @testing() { ; CHECK: {{.* r9, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.9) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.10 = call i32 @params6_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) @@ -236,10 +207,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.10) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.11 = call i32 @params7_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7) @@ -252,10 +219,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.11) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.12 = call i32 @params8_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8) @@ -269,10 +232,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.12) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.13 = call i32 @params9_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9) @@ -287,10 +246,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.13) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.14 = call i32 @params10_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10) @@ -306,10 +261,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.14) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid ret void } diff --git a/test/CodeGen/MBlaze/fpu.ll b/test/CodeGen/MBlaze/fpu.ll index 83f4d831241d..2aef4fd64105 100644 --- a/test/CodeGen/MBlaze/fpu.ll +++ b/test/CodeGen/MBlaze/fpu.ll @@ -10,14 +10,14 @@ define float @test_add(float %a, float %b) { ; FPU: test_add: %tmp.1 = fadd float %a, %b - ; FUN-NOT: fadd ; FUN: brlid ; FPU-NOT: brlid - ; FPU: fadd ret float %tmp.1 ; FUN: rtsd ; FPU: rtsd + ; FUN-NOT: fadd + ; FPU-NEXT: fadd } define float @test_sub(float %a, float %b) { @@ -25,14 +25,14 @@ define float @test_sub(float %a, float %b) { ; FPU: test_sub: %tmp.1 = fsub float %a, %b - ; FUN-NOT: frsub ; FUN: brlid ; FPU-NOT: brlid - ; FPU: frsub ret float %tmp.1 ; FUN: rtsd ; FPU: rtsd + ; FUN-NOT: frsub + ; FPU-NEXT: frsub } define float @test_mul(float %a, float %b) { @@ -40,14 +40,14 @@ define float @test_mul(float %a, float %b) { ; FPU: test_mul: %tmp.1 = fmul float %a, %b - ; FUN-NOT: fmul ; FUN: brlid ; FPU-NOT: brlid - ; FPU: fmul ret float %tmp.1 ; FUN: rtsd ; FPU: rtsd + ; FUN-NOT: fmul + ; FPU-NEXT: fmul } define float @test_div(float %a, float %b) { @@ -55,12 +55,12 @@ define float @test_div(float %a, float %b) { ; FPU: test_div: %tmp.1 = fdiv float %a, %b - ; FUN-NOT: fdiv ; FUN: brlid ; FPU-NOT: brlid - ; FPU: fdiv ret float %tmp.1 ; FUN: rtsd ; FPU: rtsd + ; FUN-NOT: fdiv + ; FPU-NEXT: fdiv } diff --git a/test/CodeGen/MBlaze/imm.ll b/test/CodeGen/MBlaze/imm.ll index 85fad175b77f..6effd3e09a24 100644 --- a/test/CodeGen/MBlaze/imm.ll +++ b/test/CodeGen/MBlaze/imm.ll @@ -7,22 +7,22 @@ define i8 @retimm_i8() { ; CHECK: retimm_i8: - ; CHECK: add - ; CHECK-NEXT: rtsd + ; CHECK: rtsd + ; CHECK-NEXT: add ; FPU: retimm_i8: - ; FPU: add - ; FPU-NEXT: rtsd + ; FPU: rtsd + ; FPU-NEXT: add ret i8 123 } define i16 @retimm_i16() { ; CHECK: retimm_i16: - ; CHECK: add - ; CHECK-NEXT: rtsd + ; CHECK: rtsd + ; CHECK-NEXT: add ; FPU: retimm_i16: - ; FPU: add - ; FPU-NEXT: rtsd - ret i16 38212 + ; FPU: rtsd + ; FPU-NEXT: add + ret i16 31212 } define i32 @retimm_i32() { @@ -38,12 +38,12 @@ define i32 @retimm_i32() { define i64 @retimm_i64() { ; CHECK: retimm_i64: ; CHECK: add - ; CHECK-NEXT: add ; CHECK-NEXT: rtsd + ; CHECK-NEXT: add ; FPU: retimm_i64: ; FPU: add - ; FPU-NEXT: add ; FPU-NEXT: rtsd + ; FPU-NEXT: add ret i64 94581823 } @@ -53,7 +53,7 @@ define float @retimm_float() { ; CHECK-NEXT: rtsd ; FPU: retimm_float: ; FPU: or - ; FPU: rtsd + ; FPU-NEXT: rtsd ret float 12.0 } diff --git a/test/CodeGen/MBlaze/intr.ll b/test/CodeGen/MBlaze/intr.ll new file mode 100644 index 000000000000..79c6bffd00cb --- /dev/null +++ b/test/CodeGen/MBlaze/intr.ll @@ -0,0 +1,48 @@ +; Ensure that the MBlaze interrupt_handler calling convention (cc73) is handled +; correctly correctly by the MBlaze backend. +; +; RUN: llc < %s -march=mblaze | FileCheck %s + +@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00" +@_interrupt_handler = alias void ()* @myintr + +define cc73 void @myintr() nounwind noinline { + ; CHECK: myintr: + ; CHECK: swi r3, r1 + ; CHECK: swi r4, r1 + ; CHECK: swi r5, r1 + ; CHECK: swi r6, r1 + ; CHECK: swi r7, r1 + ; CHECK: swi r8, r1 + ; CHECK: swi r9, r1 + ; CHECK: swi r10, r1 + ; CHECK: swi r11, r1 + ; CHECK: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK: mfs r11, rmsr + ; CHECK: swi r11, r1 + entry: + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0)) + ret void + + ; CHECK: lwi r11, r1 + ; CHECK: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK: lwi r12, r1 + ; CHECK: lwi r11, r1 + ; CHECK: lwi r10, r1 + ; CHECK: lwi r9, r1 + ; CHECK: lwi r8, r1 + ; CHECK: lwi r7, r1 + ; CHECK: lwi r6, r1 + ; CHECK: lwi r5, r1 + ; CHECK: lwi r4, r1 + ; CHECK: lwi r3, r1 + ; CHECK: rtid r14, 0 +} + + ; CHECK: .globl _interrupt_handler + ; CHECK: _interrupt_handler = myintr +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/MBlaze/jumptable.ll b/test/CodeGen/MBlaze/jumptable.ll index 3f27c12f19a3..299084d0ed23 100644 --- a/test/CodeGen/MBlaze/jumptable.ll +++ b/test/CodeGen/MBlaze/jumptable.ll @@ -18,8 +18,8 @@ define i32 @jmptable(i32 %arg) i32 8, label %L8 i32 9, label %L9 ] - ; CHECK: lw [[REG:r[0-9]*]] - ; CHECK: br [[REG]] + ; CHECK: lw [[REG:r[0-9]*]] + ; CHECK: brad [[REG]] L0: %var0 = add i32 %arg, 0 br label %DONE diff --git a/test/CodeGen/MBlaze/loop.ll b/test/CodeGen/MBlaze/loop.ll index b473020e6641..8973f75aa1dc 100644 --- a/test/CodeGen/MBlaze/loop.ll +++ b/test/CodeGen/MBlaze/loop.ll @@ -27,11 +27,10 @@ loop_inner: loop_inner_finish: %inner.5 = add i32 %inner.2, 1 - ; CHECK: addi {{.*, 1}} - call i32 (i8*,...)* @printf( i8* getelementptr([19 x i8]* @MSG,i32 0,i32 0), i32 %inner.0, i32 %inner.1, i32 %inner.2 ) ; CHECK: brlid + ; CHECK: addik {{.*, 1}} %inner.6 = icmp eq i32 %inner.5, 100 ; CHECK: cmp diff --git a/test/CodeGen/MBlaze/mul.ll b/test/CodeGen/MBlaze/mul.ll index 65d3e22a3e74..cefdb8d56f21 100644 --- a/test/CodeGen/MBlaze/mul.ll +++ b/test/CodeGen/MBlaze/mul.ll @@ -13,11 +13,11 @@ define i8 @test_i8(i8 %a, i8 %b) { ; FUN-NOT: mul ; FUN: brlid ; MUL-NOT: brlid - ; MUL: mul ret i8 %tmp.1 ; FUN: rtsd ; MUL: rtsd + ; MUL: mul } define i16 @test_i16(i16 %a, i16 %b) { @@ -28,11 +28,11 @@ define i16 @test_i16(i16 %a, i16 %b) { ; FUN-NOT: mul ; FUN: brlid ; MUL-NOT: brlid - ; MUL: mul ret i16 %tmp.1 ; FUN: rtsd ; MUL: rtsd + ; MUL: mul } define i32 @test_i32(i32 %a, i32 %b) { @@ -43,9 +43,9 @@ define i32 @test_i32(i32 %a, i32 %b) { ; FUN-NOT: mul ; FUN: brlid ; MUL-NOT: brlid - ; MUL: mul ret i32 %tmp.1 ; FUN: rtsd ; MUL: rtsd + ; MUL: mul } diff --git a/test/CodeGen/MBlaze/shift.ll b/test/CodeGen/MBlaze/shift.ll index 186115ec192b..99f0519c020c 100644 --- a/test/CodeGen/MBlaze/shift.ll +++ b/test/CodeGen/MBlaze/shift.ll @@ -10,17 +10,16 @@ define i8 @test_i8(i8 %a, i8 %b) { ; SHT: test_i8: %tmp.1 = shl i8 %a, %b - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei - ; SHT-NOT: andi ; SHT-NOT: bnei - ; SHT: bsll ret i8 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bsll } define i8 @testc_i8(i8 %a, i8 %b) { @@ -28,18 +27,18 @@ define i8 @testc_i8(i8 %a, i8 %b) { ; SHT: testc_i8: %tmp.1 = shl i8 %a, 5 - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei ; SHT-NOT: andi ; SHT-NOT: add ; SHT-NOT: bnei - ; SHT: bslli ret i8 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bslli } define i16 @test_i16(i16 %a, i16 %b) { @@ -47,17 +46,16 @@ define i16 @test_i16(i16 %a, i16 %b) { ; SHT: test_i16: %tmp.1 = shl i16 %a, %b - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei - ; SHT-NOT: andi ; SHT-NOT: bnei - ; SHT: bsll ret i16 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bsll } define i16 @testc_i16(i16 %a, i16 %b) { @@ -65,18 +63,18 @@ define i16 @testc_i16(i16 %a, i16 %b) { ; SHT: testc_i16: %tmp.1 = shl i16 %a, 5 - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei ; SHT-NOT: andi ; SHT-NOT: add ; SHT-NOT: bnei - ; SHT: bslli ret i16 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bslli } define i32 @test_i32(i32 %a, i32 %b) { @@ -84,17 +82,17 @@ define i32 @test_i32(i32 %a, i32 %b) { ; SHT: test_i32: %tmp.1 = shl i32 %a, %b - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei ; SHT-NOT: andi ; SHT-NOT: bnei - ; SHT: bsll ret i32 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bsll } define i32 @testc_i32(i32 %a, i32 %b) { @@ -102,16 +100,16 @@ define i32 @testc_i32(i32 %a, i32 %b) { ; SHT: testc_i32: %tmp.1 = shl i32 %a, 5 - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei ; SHT-NOT: andi ; SHT-NOT: add ; SHT-NOT: bnei - ; SHT: bslli ret i32 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bslli } diff --git a/test/CodeGen/MBlaze/svol.ll b/test/CodeGen/MBlaze/svol.ll new file mode 100644 index 000000000000..c1e96202845a --- /dev/null +++ b/test/CodeGen/MBlaze/svol.ll @@ -0,0 +1,80 @@ +; Ensure that the MBlaze save_volatiles calling convention (cc74) is handled +; correctly correctly by the MBlaze backend. +; +; RUN: llc < %s -march=mblaze | FileCheck %s + +@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00" + +define cc74 void @mysvol() nounwind noinline { + ; CHECK: mysvol: + ; CHECK: swi r3, r1 + ; CHECK: swi r4, r1 + ; CHECK: swi r5, r1 + ; CHECK: swi r6, r1 + ; CHECK: swi r7, r1 + ; CHECK: swi r8, r1 + ; CHECK: swi r9, r1 + ; CHECK: swi r10, r1 + ; CHECK: swi r11, r1 + ; CHECK: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK-NOT: mfs r11, rmsr + entry: + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0)) + ret void + + ; CHECK-NOT: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK: lwi r12, r1 + ; CHECK: lwi r11, r1 + ; CHECK: lwi r10, r1 + ; CHECK: lwi r9, r1 + ; CHECK: lwi r8, r1 + ; CHECK: lwi r7, r1 + ; CHECK: lwi r6, r1 + ; CHECK: lwi r5, r1 + ; CHECK: lwi r4, r1 + ; CHECK: lwi r3, r1 + ; CHECK: rtsd r15, 8 +} + +define cc74 void @mysvol2() nounwind noinline { + ; CHECK: mysvol2: + ; CHECK-NOT: swi r3, r1 + ; CHECK-NOT: swi r4, r1 + ; CHECK-NOT: swi r5, r1 + ; CHECK-NOT: swi r6, r1 + ; CHECK-NOT: swi r7, r1 + ; CHECK-NOT: swi r8, r1 + ; CHECK-NOT: swi r9, r1 + ; CHECK-NOT: swi r10, r1 + ; CHECK-NOT: swi r11, r1 + ; CHECK-NOT: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK-NOT: mfs r11, rmsr +entry: + + ; CHECK-NOT: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK-NOT: lwi r12, r1 + ; CHECK-NOT: lwi r11, r1 + ; CHECK-NOT: lwi r10, r1 + ; CHECK-NOT: lwi r9, r1 + ; CHECK-NOT: lwi r8, r1 + ; CHECK-NOT: lwi r7, r1 + ; CHECK-NOT: lwi r6, r1 + ; CHECK-NOT: lwi r5, r1 + ; CHECK-NOT: lwi r4, r1 + ; CHECK-NOT: lwi r3, r1 + ; CHECK: rtsd r15, 8 + ret void +} + + ; CHECK-NOT: .globl _interrupt_handler + ; CHECK-NOT: _interrupt_handler = mysvol + ; CHECK-NOT: _interrupt_handler = mysvol2 +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/MSP430/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/MSP430/2010-04-07-DbgValueOtherTargets.ll index 8de044cf48ba..9d549da8a93a 100644 --- a/test/CodeGen/MSP430/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/MSP430/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=msp430 -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/MSP430/mult-alt-generic-msp430.ll b/test/CodeGen/MSP430/mult-alt-generic-msp430.ll new file mode 100644 index 000000000000..342afed66053 --- /dev/null +++ b/test/CodeGen/MSP430/mult-alt-generic-msp430.ll @@ -0,0 +1,323 @@ +; RUN: llc < %s -march=msp430 +; ModuleID = 'mult-alt-generic.c' +target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16" +target triple = "msp430" + +@mout0 = common global i16 0, align 2 +@min1 = common global i16 0, align 2 +@marray = common global [2 x i16] zeroinitializer, align 2 + +define void @single_m() nounwind { +entry: + call void asm "foo $1,$0", "=*m,*m"(i16* @mout0, i16* @min1) nounwind + ret void +} + +define void @single_o() nounwind { +entry: + %out0 = alloca i16, align 2 + %index = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %index, align 2 + ret void +} + +define void @single_V() nounwind { +entry: + ret void +} + +define void @single_lt() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r,<r"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + %tmp1 = load i16* %in1, align 2 + %1 = call i16 asm "foo $1,$0", "=r,r<"(i16 %tmp1) nounwind + store i16 %1, i16* %out0, align 2 + ret void +} + +define void @single_gt() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r,>r"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + %tmp1 = load i16* %in1, align 2 + %1 = call i16 asm "foo $1,$0", "=r,r>"(i16 %tmp1) nounwind + store i16 %1, i16* %out0, align 2 + ret void +} + +define void @single_r() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r,r"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + ret void +} + +define void @single_i() nounwind { +entry: + %out0 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + %0 = call i16 asm "foo $1,$0", "=r,i"(i16 1) nounwind + store i16 %0, i16* %out0, align 2 + ret void +} + +define void @single_n() nounwind { +entry: + %out0 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + %0 = call i16 asm "foo $1,$0", "=r,n"(i16 1) nounwind + store i16 %0, i16* %out0, align 2 + ret void +} + +define void @single_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_s() nounwind { +entry: + %out0 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + ret void +} + +define void @single_g() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r,imr"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + %tmp1 = load i16* @min1, align 2 + %1 = call i16 asm "foo $1,$0", "=r,imr"(i16 %tmp1) nounwind + store i16 %1, i16* %out0, align 2 + %2 = call i16 asm "foo $1,$0", "=r,imr"(i16 1) nounwind + store i16 %2, i16* %out0, align 2 + ret void +} + +define void @single_X() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r,X"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + %tmp1 = load i16* @min1, align 2 + %1 = call i16 asm "foo $1,$0", "=r,X"(i16 %tmp1) nounwind + store i16 %1, i16* %out0, align 2 + %2 = call i16 asm "foo $1,$0", "=r,X"(i16 1) nounwind + store i16 %2, i16* %out0, align 2 + %3 = call i16 asm "foo $1,$0", "=r,X"(i16* getelementptr inbounds ([2 x i16]* @marray, i32 0, i32 0)) nounwind + store i16 %3, i16* %out0, align 2 +; No lowering support. +; %4 = call i16 asm "foo $1,$0", "=r,X"(double 1.000000e+001) nounwind +; store i16 %4, i16* %out0, align 2 +; %5 = call i16 asm "foo $1,$0", "=r,X"(double 1.000000e+000) nounwind +; store i16 %5, i16* %out0, align 2 + ret void +} + +define void @single_p() nounwind { +entry: + %out0 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + %0 = call i16 asm "foo $1,$0", "=r,r"(i16* getelementptr inbounds ([2 x i16]* @marray, i32 0, i32 0)) nounwind + store i16 %0, i16* %out0, align 2 + ret void +} + +define void @multi_m() nounwind { +entry: + %tmp = load i16* @min1, align 2 + call void asm "foo $1,$0", "=*m|r,m|r"(i16* @mout0, i16 %tmp) nounwind + ret void +} + +define void @multi_o() nounwind { +entry: + %out0 = alloca i16, align 2 + %index = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %index, align 2 + ret void +} + +define void @multi_V() nounwind { +entry: + ret void +} + +define void @multi_lt() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r|r,r|<r"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + %tmp1 = load i16* %in1, align 2 + %1 = call i16 asm "foo $1,$0", "=r|r,r|r<"(i16 %tmp1) nounwind + store i16 %1, i16* %out0, align 2 + ret void +} + +define void @multi_gt() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r|r,r|>r"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + %tmp1 = load i16* %in1, align 2 + %1 = call i16 asm "foo $1,$0", "=r|r,r|r>"(i16 %tmp1) nounwind + store i16 %1, i16* %out0, align 2 + ret void +} + +define void @multi_r() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r|r,r|m"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + ret void +} + +define void @multi_i() nounwind { +entry: + %out0 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + %0 = call i16 asm "foo $1,$0", "=r|r,r|i"(i16 1) nounwind + store i16 %0, i16* %out0, align 2 + ret void +} + +define void @multi_n() nounwind { +entry: + %out0 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + %0 = call i16 asm "foo $1,$0", "=r|r,r|n"(i16 1) nounwind + store i16 %0, i16* %out0, align 2 + ret void +} + +define void @multi_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_s() nounwind { +entry: + %out0 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + ret void +} + +define void @multi_g() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + %tmp1 = load i16* @min1, align 2 + %1 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 %tmp1) nounwind + store i16 %1, i16* %out0, align 2 + %2 = call i16 asm "foo $1,$0", "=r|r,r|imr"(i16 1) nounwind + store i16 %2, i16* %out0, align 2 + ret void +} + +define void @multi_X() nounwind { +entry: + %out0 = alloca i16, align 2 + %in1 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + store i16 1, i16* %in1, align 2 + %tmp = load i16* %in1, align 2 + %0 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 %tmp) nounwind + store i16 %0, i16* %out0, align 2 + %tmp1 = load i16* @min1, align 2 + %1 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 %tmp1) nounwind + store i16 %1, i16* %out0, align 2 + %2 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16 1) nounwind + store i16 %2, i16* %out0, align 2 + %3 = call i16 asm "foo $1,$0", "=r|r,r|X"(i16* getelementptr inbounds ([2 x i16]* @marray, i32 0, i32 0)) nounwind + store i16 %3, i16* %out0, align 2 +; No lowering support. +; %4 = call i16 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+001) nounwind +; store i16 %4, i16* %out0, align 2 +; %5 = call i16 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+000) nounwind +; store i16 %5, i16* %out0, align 2 + ret void +} + +define void @multi_p() nounwind { +entry: + %out0 = alloca i16, align 2 + store i16 0, i16* %out0, align 2 + %0 = call i16 asm "foo $1,$0", "=r|r,r|r"(i16* getelementptr inbounds ([2 x i16]* @marray, i32 0, i32 0)) nounwind + store i16 %0, i16* %out0, align 2 + ret void +} diff --git a/test/CodeGen/Mips/2008-07-15-InternalConstant.ll b/test/CodeGen/Mips/2008-07-15-InternalConstant.ll index bda4a3172f30..c3db6387aff3 100644 --- a/test/CodeGen/Mips/2008-07-15-InternalConstant.ll +++ b/test/CodeGen/Mips/2008-07-15-InternalConstant.ll @@ -7,8 +7,8 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "mipsallegrexel-unknown-psp-elf" -@.str = internal constant [10 x i8] c"AAAAAAAAA\00" -@i0 = internal constant [5 x i32] [ i32 0, i32 1, i32 2, i32 3, i32 4 ] +@.str = internal unnamed_addr constant [10 x i8] c"AAAAAAAAA\00" +@i0 = internal unnamed_addr constant [5 x i32] [ i32 0, i32 1, i32 2, i32 3, i32 4 ] define i8* @foo() nounwind { entry: diff --git a/test/CodeGen/Mips/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/Mips/2010-04-07-DbgValueOtherTargets.ll index 4161c1d686e6..994e19af4f87 100644 --- a/test/CodeGen/Mips/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/Mips/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=mips -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/Mips/2010-07-20-Select.ll b/test/CodeGen/Mips/2010-07-20-Select.ll index 8b7f9a919378..891b5d9e1884 100644 --- a/test/CodeGen/Mips/2010-07-20-Select.ll +++ b/test/CodeGen/Mips/2010-07-20-Select.ll @@ -9,12 +9,12 @@ entry: volatile store i32 0, i32* %c, align 4 %0 = volatile load i32* %a, align 4 ; <i32> [#uses=1] %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] -; CHECK: addiu $4, $zero, 3 +; CHECK: addiu $3, $zero, 0 %iftmp.0.0 = select i1 %1, i32 3, i32 0 ; <i32> [#uses=1] %2 = volatile load i32* %c, align 4 ; <i32> [#uses=1] %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1] -; CHECK: addu $4, $zero, $3 -; CHECK: addu $2, $5, $4 +; CHECK: addiu $3, $zero, 3 +; CHECK: addu $2, $5, $3 %iftmp.2.0 = select i1 %3, i32 0, i32 5 ; <i32> [#uses=1] %4 = add nsw i32 %iftmp.2.0, %iftmp.0.0 ; <i32> [#uses=1] ret i32 %4 diff --git a/test/CodeGen/Mips/2010-11-09-CountLeading.ll b/test/CodeGen/Mips/2010-11-09-CountLeading.ll new file mode 100644 index 000000000000..d592fef331af --- /dev/null +++ b/test/CodeGen/Mips/2010-11-09-CountLeading.ll @@ -0,0 +1,33 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; CHECK: clz $2, $4 +define i32 @t1(i32 %X) nounwind readnone { +entry: + %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X) + ret i32 %tmp1 +} + +declare i32 @llvm.ctlz.i32(i32) nounwind readnone + +; CHECK: clz $2, $4 +define i32 @t2(i32 %X) nounwind readnone { +entry: + %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X) + ret i32 %tmp1 +} + +; CHECK: clo $2, $4 +define i32 @t3(i32 %X) nounwind readnone { +entry: + %neg = xor i32 %X, -1 + %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg) + ret i32 %tmp1 +} + +; CHECK: clo $2, $4 +define i32 @t4(i32 %X) nounwind readnone { +entry: + %neg = xor i32 %X, -1 + %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg) + ret i32 %tmp1 +} diff --git a/test/CodeGen/Mips/2010-11-09-Mul.ll b/test/CodeGen/Mips/2010-11-09-Mul.ll new file mode 100644 index 000000000000..65a10b5836cc --- /dev/null +++ b/test/CodeGen/Mips/2010-11-09-Mul.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; CHECK: mul $2, $5, $4 +define i32 @mul1(i32 %a, i32 %b) nounwind readnone { +entry: + %mul = mul i32 %b, %a + ret i32 %mul +} + +; CHECK: mul $2, $5, $4 +define i32 @mul2(i32 %a, i32 %b) nounwind readnone { +entry: + %mul = mul nsw i32 %b, %a + ret i32 %mul +} diff --git a/test/CodeGen/Mips/cmov.ll b/test/CodeGen/Mips/cmov.ll new file mode 100755 index 000000000000..7d3e0252e3c9 --- /dev/null +++ b/test/CodeGen/Mips/cmov.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +@i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4 +@i3 = common global i32* null, align 4 + +; CHECK: lw $3, %got(i3)($gp) +; CHECK: addiu $5, $gp, %got(i1) +define i32* @cmov1(i32 %s) nounwind readonly { +entry: + %tobool = icmp ne i32 %s, 0 + %tmp1 = load i32** @i3, align 4 + %cond = select i1 %tobool, i32* getelementptr inbounds ([3 x i32]* @i1, i32 0, i32 0), i32* %tmp1 + ret i32* %cond +} + diff --git a/test/CodeGen/Mips/madd-msub.ll b/test/CodeGen/Mips/madd-msub.ll new file mode 100644 index 000000000000..4a205b1f3ffb --- /dev/null +++ b/test/CodeGen/Mips/madd-msub.ll @@ -0,0 +1,65 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; CHECK: madd $5, $4 +define i64 @madd1(i32 %a, i32 %b, i32 %c) nounwind readnone { +entry: + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %mul = mul nsw i64 %conv2, %conv + %conv4 = sext i32 %c to i64 + %add = add nsw i64 %mul, %conv4 + ret i64 %add +} + +; CHECK: maddu $5, $4 +define i64 @madd2(i32 %a, i32 %b, i32 %c) nounwind readnone { +entry: + %conv = zext i32 %a to i64 + %conv2 = zext i32 %b to i64 + %mul = mul nsw i64 %conv2, %conv + %conv4 = zext i32 %c to i64 + %add = add nsw i64 %mul, %conv4 + ret i64 %add +} + +; CHECK: madd $5, $4 +define i64 @madd3(i32 %a, i32 %b, i64 %c) nounwind readnone { +entry: + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %mul = mul nsw i64 %conv2, %conv + %add = add nsw i64 %mul, %c + ret i64 %add +} + +; CHECK: msub $5, $4 +define i64 @msub1(i32 %a, i32 %b, i32 %c) nounwind readnone { +entry: + %conv = sext i32 %c to i64 + %conv2 = sext i32 %a to i64 + %conv4 = sext i32 %b to i64 + %mul = mul nsw i64 %conv4, %conv2 + %sub = sub nsw i64 %conv, %mul + ret i64 %sub +} + +; CHECK: msubu $5, $4 +define i64 @msub2(i32 %a, i32 %b, i32 %c) nounwind readnone { +entry: + %conv = zext i32 %c to i64 + %conv2 = zext i32 %a to i64 + %conv4 = zext i32 %b to i64 + %mul = mul nsw i64 %conv4, %conv2 + %sub = sub nsw i64 %conv, %mul + ret i64 %sub +} + +; CHECK: msub $5, $4 +define i64 @msub3(i32 %a, i32 %b, i64 %c) nounwind readnone { +entry: + %conv = sext i32 %a to i64 + %conv3 = sext i32 %b to i64 + %mul = mul nsw i64 %conv3, %conv + %sub = sub nsw i64 %c, %mul + ret i64 %sub +} diff --git a/test/CodeGen/Mips/o32_cc.ll b/test/CodeGen/Mips/o32_cc.ll new file mode 100644 index 000000000000..b6df62be6603 --- /dev/null +++ b/test/CodeGen/Mips/o32_cc.ll @@ -0,0 +1,325 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; FIXME: Disabled because it unpredictably fails on certain platforms. +; REQUIRES: disabled + +; $f12, $f14 +; CHECK: ldc1 $f12, %lo +; CHECK: ldc1 $f14, %lo +define void @testlowercall0() nounwind { +entry: + tail call void @f0(double 5.000000e+00, double 6.000000e+00) nounwind + ret void +} + +declare void @f0(double, double) + +; $f12, $f14 +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +define void @testlowercall1() nounwind { +entry: + tail call void @f1(float 8.000000e+00, float 9.000000e+00) nounwind + ret void +} + +declare void @f1(float, float) + +; $f12, $f14 +; CHECK: lwc1 $f12, %lo +; CHECK: ldc1 $f14, %lo +define void @testlowercall2() nounwind { +entry: + tail call void @f2(float 8.000000e+00, double 6.000000e+00) nounwind + ret void +} + +declare void @f2(float, double) + +; $f12, $f14 +; CHECK: ldc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +define void @testlowercall3() nounwind { +entry: + tail call void @f3(double 5.000000e+00, float 9.000000e+00) nounwind + ret void +} + +declare void @f3(double, float) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 12 +; CHECK: addiu $5, $zero, 13 +; CHECK: addiu $6, $zero, 14 +; CHECK: addiu $7, $zero, 15 +define void @testlowercall4() nounwind { +entry: + tail call void @f4(i32 12, i32 13, i32 14, i32 15) nounwind + ret void +} + +declare void @f4(i32, i32, i32, i32) + +; $f12, $6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 23 +define void @testlowercall5() nounwind { +entry: + tail call void @f5(double 1.500000e+01, i32 23, double 1.700000e+01) nounwind + ret void +} + +declare void @f5(double, i32, double) + +; $f12, $6, $7 +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 33 +; CHECK: addiu $7, $zero, 24 +define void @testlowercall6() nounwind { +entry: + tail call void @f6(double 2.500000e+01, i32 33, i32 24) nounwind + ret void +} + +declare void @f6(double, i32, i32) + +; $f12, $5, $6 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 43 +; CHECK: addiu $6, $zero, 34 +define void @testlowercall7() nounwind { +entry: + tail call void @f7(float 1.800000e+01, i32 43, i32 34) nounwind + ret void +} + +declare void @f7(float, i32, i32) + +; $4, $5, $6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: addiu $4, $zero, 22 +; CHECK: addiu $5, $zero, 53 +; CHECK: addiu $6, $zero, 44 +define void @testlowercall8() nounwind { +entry: + tail call void @f8(i32 22, i32 53, i32 44, double 4.000000e+00) nounwind + ret void +} + +declare void @f8(i32, i32, i32, double) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 32 +; CHECK: addiu $5, $zero, 63 +; CHECK: addiu $6, $zero, 54 +; CHECK: ori $7, $2, 0 +define void @testlowercall9() nounwind { +entry: + tail call void @f9(i32 32, i32 63, i32 54, float 1.100000e+01) nounwind + ret void +} + +declare void @f9(i32, i32, i32, float) + +; $4, $5, ($6, $7) +; CHECK: addiu $4, $zero, 42 +; CHECK: addiu $5, $zero, 73 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $2, 0 +define void @testlowercall10() nounwind { +entry: + tail call void @f10(i32 42, i32 73, double 2.700000e+01) nounwind + ret void +} + +declare void @f10(i32, i32, double) + +; $4, ($6, $7) +; CHECK: addiu $4, $zero, 52 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $2, 0 +define void @testlowercall11() nounwind { +entry: + tail call void @f11(i32 52, double 1.600000e+01) nounwind + ret void +} + +declare void @f11(i32, double) + +; $f12, $f14, $6, $7 +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $6, $4, 0 +; CHECK: ori $7, $5, 0 +define void @testlowercall12() nounwind { +entry: + tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind + ret void +} + +declare void @f12(float, float, float, float) + +; $f12, $5, $6, $7 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 83 +; CHECK: ori $6, $3, 0 +; CHECK: addiu $7, $zero, 25 +define void @testlowercall13() nounwind { +entry: + tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind + ret void +} + + +declare void @f13(float, i32, float, i32) + +; $f12, $f14, $7 +; CHECK: ldc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $7, $4, 0 +define void @testlowercall14() nounwind { +entry: + tail call void @f14(double 3.500000e+01, float 2.900000e+01, float 3.000000e+01) nounwind + ret void +} + +declare void @f14(double, float, float) + +; $f12, $f14, ($6, $7) +; CHECK: lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $4, 32768 +define void @testlowercall15() nounwind { +entry: + tail call void @f15(float 4.800000e+01, float 3.900000e+01, double 3.700000e+01) nounwind + ret void +} + +declare void @f15(float, float, double) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 62 +; CHECK: ori $5, $2, 0 +; CHECK: addiu $6, $zero, 64 +; CHECK: ori $7, $3, 0 +define void @testlowercall16() nounwind { +entry: + tail call void @f16(i32 62, float 4.900000e+01, i32 64, float 3.100000e+01) nounwind + ret void +} + +declare void @f16(i32, float, i32, float) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 72 +; CHECK: ori $5, $2, 0 +; CHECK: addiu $6, $zero, 74 +; CHECK: addiu $7, $zero, 35 +define void @testlowercall17() nounwind { +entry: + tail call void @f17(i32 72, float 5.900000e+01, i32 74, i32 35) nounwind + ret void +} + +declare void @f17(i32, float, i32, i32) + +; $4, $5, $6, $7 +; CHECK: addiu $4, $zero, 82 +; CHECK: addiu $5, $zero, 93 +; CHECK: ori $6, $2, 0 +; CHECK: addiu $7, $zero, 45 +define void @testlowercall18() nounwind { +entry: + tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind + ret void +} + +declare void @f18(i32, i32, float, i32) + + +; $4, ($6, $7), stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: addiu $4, $zero, 92 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $3, 0 +define void @testlowercall20() nounwind { +entry: + tail call void @f20(i32 92, double 2.600000e+01, double 4.700000e+01) nounwind + ret void +} + +declare void @f20(i32, double, double) + +; $f12, $5 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 103 +define void @testlowercall21() nounwind { +entry: + tail call void @f21(float 5.800000e+01, i32 103) nounwind + ret void +} + +declare void @f21(float, i32) + +; $f12, $5, ($6, $7) +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 113 +; CHECK: addiu $6, $zero, 0 +; CHECK: ori $7, $3, 32768 +define void @testlowercall22() nounwind { +entry: + tail call void @f22(float 6.800000e+01, i32 113, double 5.700000e+01) nounwind + ret void +} + +declare void @f22(float, i32, double) + +; $f12, f6 +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 123 +define void @testlowercall23() nounwind { +entry: + tail call void @f23(double 4.500000e+01, i32 123) nounwind + ret void +} + +declare void @f23(double, i32) + +; $f12,$6, stack +; CHECK: sw $2, 16($sp) +; CHECK: sw $zero, 20($sp) +; CHECK: ldc1 $f12, %lo +; CHECK: addiu $6, $zero, 133 +define void @testlowercall24() nounwind { +entry: + tail call void @f24(double 5.500000e+01, i32 133, double 6.700000e+01) nounwind + ret void +} + +declare void @f24(double, i32, double) + +; CHECK: lwc1 $f12, %lo +; lwc1 $f12, %lo +; CHECK: lwc1 $f14, %lo +; CHECK: ori $6, $4, 0 +; CHECK: ori $7, $5, 0 +; CHECK: lwc1 $f12, %lo +; CHECK: addiu $5, $zero, 83 +; CHECK: ori $6, $3, 0 +; CHECK: addiu $7, $zero, 25 +; CHECK: addiu $4, $zero, 82 +; CHECK: addiu $5, $zero, 93 +; CHECK: ori $6, $2, 0 +; CHECK: addiu $7, $zero, 45 +define void @testlowercall25() nounwind { +entry: + tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind + tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind + tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind + ret void +} diff --git a/test/CodeGen/Mips/rotate.ll b/test/CodeGen/Mips/rotate.ll new file mode 100644 index 000000000000..e7dc30932144 --- /dev/null +++ b/test/CodeGen/Mips/rotate.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +; CHECK: rotrv $2, $4, $2 +define i32 @rot0(i32 %a, i32 %b) nounwind readnone { +entry: + %shl = shl i32 %a, %b + %sub = sub i32 32, %b + %shr = lshr i32 %a, %sub + %or = or i32 %shr, %shl + ret i32 %or +} + +; CHECK: rotr $2, $4, 22 +define i32 @rot1(i32 %a) nounwind readnone { +entry: + %shl = shl i32 %a, 10 + %shr = lshr i32 %a, 22 + %or = or i32 %shl, %shr + ret i32 %or +} + +; CHECK: rotrv $2, $4, $5 +define i32 @rot2(i32 %a, i32 %b) nounwind readnone { +entry: + %shr = lshr i32 %a, %b + %sub = sub i32 32, %b + %shl = shl i32 %a, %sub + %or = or i32 %shl, %shr + ret i32 %or +} + +; CHECK: rotr $2, $4, 10 +define i32 @rot3(i32 %a) nounwind readnone { +entry: + %shr = lshr i32 %a, 10 + %shl = shl i32 %a, 22 + %or = or i32 %shr, %shl + ret i32 %or +} + diff --git a/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll b/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll deleted file mode 100644 index 5b5e11f2df0c..000000000000 --- a/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll +++ /dev/null @@ -1,32 +0,0 @@ -; RUN: llc < %s -march=pic16 | FileCheck %s -; XFAIL: vg_leak - -target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-f32:32:32" -target triple = "pic16-" -@i = global i32 -10, align 1 ; <i32*> [#uses=1] -@j = global i32 -20, align 1 ; <i32*> [#uses=1] -@pc = global i8* inttoptr (i64 160 to i8*), align 1 ; <i8**> [#uses=3] -@main.auto.k = internal global i32 0 ; <i32*> [#uses=2] - -define void @main() nounwind { -entry: - %tmp = load i32* @i ; <i32> [#uses=1] - %tmp1 = load i32* @j ; <i32> [#uses=1] - %add = add i32 %tmp, %tmp1 ; <i32> [#uses=1] - store i32 %add, i32* @main.auto.k - %tmp2 = load i32* @main.auto.k ; <i32> [#uses=1] - %add3 = add i32 %tmp2, 32 ; <i32> [#uses=1] - %conv = trunc i32 %add3 to i8 ; <i8> [#uses=1] - %tmp4 = load i8** @pc ; <i8*> [#uses=1] - store i8 %conv, i8* %tmp4 - %tmp5 = load i8** @pc ; <i8*> [#uses=1] - %tmp6 = load i8* %tmp5 ; <i8> [#uses=1] - %conv7 = sext i8 %tmp6 to i16 ; <i16> [#uses=1] - %sub = sub i16 %conv7, 1 ; <i16> [#uses=1] - %conv8 = trunc i16 %sub to i8 ; <i8> [#uses=1] - %tmp9 = load i8** @pc ; <i8*> [#uses=1] - store i8 %conv8, i8* %tmp9 - ret void -} - -; CHECK: movf @i + 0, W diff --git a/test/CodeGen/PIC16/2009-11-20-NewNode.ll b/test/CodeGen/PIC16/2009-11-20-NewNode.ll deleted file mode 100644 index d68f0f41c4a5..000000000000 --- a/test/CodeGen/PIC16/2009-11-20-NewNode.ll +++ /dev/null @@ -1,36 +0,0 @@ -; RUN: llc -march=pic16 < %s -; PR5558 - -define i64 @_strtoll_r(i16 %base) nounwind { -entry: - br i1 undef, label %if.then, label %if.end27 - -if.then: ; preds = %do.end - br label %if.end27 - -if.end27: ; preds = %if.then, %do.end - %cond66 = select i1 undef, i64 -9223372036854775808, i64 9223372036854775807 ; <i64> [#uses=3] - %conv69 = sext i16 %base to i64 ; <i64> [#uses=1] - %div = udiv i64 %cond66, %conv69 ; <i64> [#uses=1] - br label %for.cond - -for.cond: ; preds = %if.end116, %if.end27 - br i1 undef, label %if.then152, label %if.then93 - -if.then93: ; preds = %for.cond - br i1 undef, label %if.end116, label %if.then152 - -if.end116: ; preds = %if.then93 - %cmp123 = icmp ugt i64 undef, %div ; <i1> [#uses=1] - %or.cond = or i1 undef, %cmp123 ; <i1> [#uses=0] - br label %for.cond - -if.then152: ; preds = %if.then93, %for.cond - br i1 undef, label %if.end182, label %if.then172 - -if.then172: ; preds = %if.then152 - ret i64 %cond66 - -if.end182: ; preds = %if.then152 - ret i64 %cond66 -} diff --git a/test/CodeGen/PIC16/C16-11.ll b/test/CodeGen/PIC16/C16-11.ll deleted file mode 100644 index 8a5a0ac11f75..000000000000 --- a/test/CodeGen/PIC16/C16-11.ll +++ /dev/null @@ -1,40 +0,0 @@ -; RUN: llc < %s -march=pic16 -; XFAIL: * -; This fails because PIC16 doesn't define a (xor reg, reg) pattern. -; - -@c612.auto.a.b = internal global i1 false ; <i1*> [#uses=2] -@c612.auto.A.b = internal global i1 false ; <i1*> [#uses=2] - -define void @c612() nounwind { -entry: - %tmp3.b = load i1* @c612.auto.a.b ; <i1> [#uses=1] - %tmp3 = zext i1 %tmp3.b to i16 ; <i16> [#uses=1] - %tmp4.b = load i1* @c612.auto.A.b ; <i1> [#uses=1] - %tmp4 = select i1 %tmp4.b, i16 2, i16 0 ; <i16> [#uses=1] - %cmp5 = icmp ne i16 %tmp3, %tmp4 ; <i1> [#uses=1] - %conv7 = zext i1 %cmp5 to i8 ; <i8> [#uses=1] - tail call void @expectWrap(i8 %conv7, i8 2) - ret void -} - -define void @expectWrap(i8 %boolresult, i8 %errCode) nounwind { -entry: - %tobool = icmp eq i8 %boolresult, 0 ; <i1> [#uses=1] - br i1 %tobool, label %if.then, label %if.end - -if.then: ; preds = %entry - tail call void @exit(i16 1) - unreachable - -if.end: ; preds = %entry - ret void -} - -define i16 @main() nounwind { -entry: - tail call void @c612() - ret i16 0 -} - -declare void @exit(i16) noreturn nounwind diff --git a/test/CodeGen/PIC16/C16-15.ll b/test/CodeGen/PIC16/C16-15.ll deleted file mode 100644 index 020b0dd6743e..000000000000 --- a/test/CodeGen/PIC16/C16-15.ll +++ /dev/null @@ -1,45 +0,0 @@ -; RUN: llc < %s -march=pic16 | grep "extern" | grep "@.lib.unordered.f32" | count 3 -; XFAIL: vg_leak - -@pc = global i8* inttoptr (i64 160 to i8*), align 1 ; <i8**> [#uses=2] -@aa = common global i16 0, align 1 ; <i16*> [#uses=0] -@c6214.auto.d = internal global float 0.000000e+00, align 4 ; <float*> [#uses=1] -@c6214.auto.l = internal global float 0.000000e+00, align 4 ; <float*> [#uses=1] - -define float @dvalue(float %f) nounwind { -entry: - ret float %f -} - -define void @_assert(i16 %line, i16 %result) nounwind { -entry: - %add = add i16 %line, %result ; <i16> [#uses=1] - %conv = trunc i16 %add to i8 ; <i8> [#uses=1] - %tmp2 = load i8** @pc ; <i8*> [#uses=1] - store i8 %conv, i8* %tmp2 - ret void -} - -define i16 @main() nounwind { -entry: - %retval = alloca i16, align 1 ; <i16*> [#uses=2] - store i16 0, i16* %retval - call void @c6214() - %0 = load i16* %retval ; <i16> [#uses=1] - ret i16 %0 -} - -define internal void @c6214() nounwind { -entry: - %call = call float @dvalue(float 0x3FF3C0CA40000000) ; <float> [#uses=3] - store float %call, float* @c6214.auto.d - store float %call, float* @c6214.auto.l - %cmp = fcmp ord float %call, 0.000000e+00 ; <i1> [#uses=1] - %conv = zext i1 %cmp to i16 ; <i16> [#uses=1] - call void @_assert(i16 10, i16 %conv) - %tmp3 = load i8** @pc ; <i8*> [#uses=2] - %tmp4 = load i8* %tmp3 ; <i8> [#uses=1] - %sub = add i8 %tmp4, -10 ; <i8> [#uses=1] - store i8 %sub, i8* %tmp3 - ret void -} diff --git a/test/CodeGen/PIC16/C16-49.ll b/test/CodeGen/PIC16/C16-49.ll deleted file mode 100644 index e59800b9a926..000000000000 --- a/test/CodeGen/PIC16/C16-49.ll +++ /dev/null @@ -1,15 +0,0 @@ -;RUN: llvm-as < %s | llc -march=pic16 - -@aa = global i16 55, align 1 ; <i16*> [#uses=1] -@bb = global i16 44, align 1 ; <i16*> [#uses=1] -@PORTD = external global i8 ; <i8*> [#uses=1] - -define void @foo() nounwind { -entry: - %tmp = volatile load i16* @aa ; <i16> [#uses=1] - %tmp1 = volatile load i16* @bb ; <i16> [#uses=1] - %sub = sub i16 %tmp, %tmp1 ; <i16> [#uses=1] - %conv = trunc i16 %sub to i8 ; <i8> [#uses=1] - store i8 %conv, i8* @PORTD - ret void -} diff --git a/test/CodeGen/PIC16/check_inc_files.ll b/test/CodeGen/PIC16/check_inc_files.ll deleted file mode 100644 index 436d41607374..000000000000 --- a/test/CodeGen/PIC16/check_inc_files.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s - -;CHECK: #include p16f1xxx.inc -;CHECK: #include stdmacros.inc - -define void @foo() nounwind { -entry: - ret void -} diff --git a/test/CodeGen/PIC16/global-in-user-section.ll b/test/CodeGen/PIC16/global-in-user-section.ll deleted file mode 100644 index 6cdb64864ad5..000000000000 --- a/test/CodeGen/PIC16/global-in-user-section.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=pic16 | FileCheck %s -; XFAIL: vg_leak - -@G1 = common global i16 0, section "usersection", align 1 -; CHECK: usersection UDATA -; CHECK: @G1 RES 2 diff --git a/test/CodeGen/PIC16/globals.ll b/test/CodeGen/PIC16/globals.ll deleted file mode 100644 index 3ee2e25265d3..000000000000 --- a/test/CodeGen/PIC16/globals.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc < %s -march=pic16 | FileCheck %s -; XFAIL: vg_leak - -@G1 = global i32 4712, section "Address=412" -; CHECK: @G1.412..user_section.# IDATA 412 -; CHECK: @G1 -; CHECK: dl 4712 - -@G2 = global i32 0, section "Address=412" -; CHECK: @G2.412..user_section.# UDATA 412 -; CHECK: @G2 RES 4 - -@G3 = addrspace(1) constant i32 4712, section "Address=412" -; CHECK: @G3.412..user_section.# ROMDATA 412 -; CHECK: @G3 -; CHECK: rom_dl 4712 - - diff --git a/test/CodeGen/PIC16/result_direction.ll b/test/CodeGen/PIC16/result_direction.ll deleted file mode 100644 index 8549e21b3333..000000000000 --- a/test/CodeGen/PIC16/result_direction.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s - -@a = common global i16 0, align 1 ; <i16*> [#uses=2] - -define void @foo() nounwind { -entry: - %tmp = load i16* @a ; <i16> [#uses=1] - %add = add nsw i16 %tmp, 1 ; <i16> [#uses=1] - store i16 %add, i16* @a -;CHECK: movlw 1 -;CHECK: addwf @a + 0, F - ret void -} diff --git a/test/CodeGen/PIC16/sext.ll b/test/CodeGen/PIC16/sext.ll deleted file mode 100644 index e51a54287ce6..000000000000 --- a/test/CodeGen/PIC16/sext.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: llc < %s -march=pic16 -; XFAIL: vg_leak - -@main.auto.c = internal global i8 0 ; <i8*> [#uses=1] - -define i16 @main() nounwind { -entry: - %tmp = load i8* @main.auto.c ; <i8> [#uses=1] - %conv = sext i8 %tmp to i16 ; <i16> [#uses=1] - ret i16 %conv -} diff --git a/test/CodeGen/PIC16/test_indf_name.ll b/test/CodeGen/PIC16/test_indf_name.ll deleted file mode 100644 index d52fc1125d7c..000000000000 --- a/test/CodeGen/PIC16/test_indf_name.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llvm-as < %s | llc -march=pic16 | FileCheck %s - -@pi = common global i16* null, align 1 ; <i16**> [#uses=1] - -define void @foo() nounwind { -entry: - %tmp = load i16** @pi ; <i16*> [#uses=1] - store i16 1, i16* %tmp -; CHECK: movwi {{[0-1]}}[INDF{{[0-1]}}] -; CHECK: movwi {{[0-1]}}[INDF{{[0-1]}}] - ret void -} diff --git a/test/CodeGen/PTX/add.ll b/test/CodeGen/PTX/add.ll new file mode 100644 index 000000000000..1259d03e96c9 --- /dev/null +++ b/test/CodeGen/PTX/add.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1(i32 %x, i32 %y) { +; CHECK: add.s32 r0, r1, r2; + %z = add i32 %x, %y +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t2(i32 %x) { +; CHECK: add.s32 r0, r1, 1; + %z = add i32 %x, 1 +; CHECK: ret; + ret i32 %z +} diff --git a/test/CodeGen/PIC16/dg.exp b/test/CodeGen/PTX/dg.exp index b08b9858e048..2c304b57741e 100644 --- a/test/CodeGen/PIC16/dg.exp +++ b/test/CodeGen/PTX/dg.exp @@ -1,5 +1,5 @@ load_lib llvm.exp -if { [llvm_supports_target PIC16] } { +if { [llvm_supports_target PTX] } { RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] } diff --git a/test/CodeGen/PTX/exit.ll b/test/CodeGen/PTX/exit.ll new file mode 100644 index 000000000000..4071babb80ce --- /dev/null +++ b/test/CodeGen/PTX/exit.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_kernel void @t1() { +; CHECK: exit; +; CHECK-NOT: ret; + ret void +} + +define ptx_kernel void @t2(i32* %p, i32 %x) { + store i32 %x, i32* %p +; CHECK: exit; +; CHECK-NOT: ret; + ret void +} diff --git a/test/CodeGen/PTX/ld.ll b/test/CodeGen/PTX/ld.ll new file mode 100644 index 000000000000..836c4d41045a --- /dev/null +++ b/test/CodeGen/PTX/ld.ll @@ -0,0 +1,78 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +;CHECK: .extern .global .s32 array[]; +@array = external global [10 x i32] + +;CHECK: .extern .const .s32 array_constant[]; +@array_constant = external addrspace(1) constant [10 x i32] + +;CHECK: .extern .local .s32 array_local[]; +@array_local = external addrspace(2) global [10 x i32] + +;CHECK: .extern .shared .s32 array_shared[]; +@array_shared = external addrspace(4) global [10 x i32] + +define ptx_device i32 @t1(i32* %p) { +entry: +;CHECK: ld.global.s32 r0, [r1]; + %x = load i32* %p + ret i32 %x +} + +define ptx_device i32 @t2(i32* %p) { +entry: +;CHECK: ld.global.s32 r0, [r1+4]; + %i = getelementptr i32* %p, i32 1 + %x = load i32* %i + ret i32 %x +} + +define ptx_device i32 @t3(i32* %p, i32 %q) { +entry: +;CHECK: shl.b32 r0, r2, 2; +;CHECK: add.s32 r0, r1, r0; +;CHECK: ld.global.s32 r0, [r0]; + %i = getelementptr i32* %p, i32 %q + %x = load i32* %i + ret i32 %x +} + +define ptx_device i32 @t4_global() { +entry: +;CHECK: ld.global.s32 r0, [array]; + %i = getelementptr [10 x i32]* @array, i32 0, i32 0 + %x = load i32* %i + ret i32 %x +} + +define ptx_device i32 @t4_const() { +entry: +;CHECK: ld.const.s32 r0, [array_constant]; + %i = getelementptr [10 x i32] addrspace(1)* @array_constant, i32 0, i32 0 + %x = load i32 addrspace(1)* %i + ret i32 %x +} + +define ptx_device i32 @t4_local() { +entry: +;CHECK: ld.local.s32 r0, [array_local]; + %i = getelementptr [10 x i32] addrspace(2)* @array_local, i32 0, i32 0 + %x = load i32 addrspace(2)* %i + ret i32 %x +} + +define ptx_device i32 @t4_shared() { +entry: +;CHECK: ld.shared.s32 r0, [array_shared]; + %i = getelementptr [10 x i32] addrspace(4)* @array_shared, i32 0, i32 0 + %x = load i32 addrspace(4)* %i + ret i32 %x +} + +define ptx_device i32 @t5() { +entry: +;CHECK: ld.global.s32 r0, [array+4]; + %i = getelementptr [10 x i32]* @array, i32 0, i32 1 + %x = load i32* %i + ret i32 %x +} diff --git a/test/CodeGen/PTX/mov.ll b/test/CodeGen/PTX/mov.ll new file mode 100644 index 000000000000..c365e9beb897 --- /dev/null +++ b/test/CodeGen/PTX/mov.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1() { +; CHECK: mov.s32 r0, 0; +; CHECK: ret; + ret i32 0 +} + +define ptx_device i32 @t2(i32 %x) { +; CHECK: mov.s32 r0, r1; +; CHECK: ret; + ret i32 %x +} diff --git a/test/CodeGen/PTX/options.ll b/test/CodeGen/PTX/options.ll new file mode 100644 index 000000000000..a14d5c9c27ba --- /dev/null +++ b/test/CodeGen/PTX/options.ll @@ -0,0 +1,6 @@ +; RUN: llc < %s -march=ptx -ptx-version=2.0 | grep ".version 2.0" +; RUN: llc < %s -march=ptx -ptx-target=sm_20 | grep ".target sm_20" + +define ptx_device void @t1() { + ret void +} diff --git a/test/CodeGen/PTX/ret.ll b/test/CodeGen/PTX/ret.ll new file mode 100644 index 000000000000..d5037f25fd36 --- /dev/null +++ b/test/CodeGen/PTX/ret.ll @@ -0,0 +1,7 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device void @t1() { +; CHECK: ret; +; CHECK-NOT: exit; + ret void +} diff --git a/test/CodeGen/PTX/shl.ll b/test/CodeGen/PTX/shl.ll new file mode 100644 index 000000000000..b564b43ab932 --- /dev/null +++ b/test/CodeGen/PTX/shl.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1(i32 %x, i32 %y) { +; CHECK: shl.b32 r0, r1, r2 + %z = shl i32 %x, %y +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t2(i32 %x) { +; CHECK: shl.b32 r0, r1, 3 + %z = shl i32 %x, 3 +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t3(i32 %x) { +; CHECK: shl.b32 r0, 3, r1 + %z = shl i32 3, %x +; CHECK: ret; + ret i32 %z +} diff --git a/test/CodeGen/PTX/shr.ll b/test/CodeGen/PTX/shr.ll new file mode 100644 index 000000000000..3f8ade862b75 --- /dev/null +++ b/test/CodeGen/PTX/shr.ll @@ -0,0 +1,43 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1(i32 %x, i32 %y) { +; CHECK: shr.u32 r0, r1, r2 + %z = lshr i32 %x, %y +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t2(i32 %x) { +; CHECK: shr.u32 r0, r1, 3 + %z = lshr i32 %x, 3 +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t3(i32 %x) { +; CHECK: shr.u32 r0, 3, r1 + %z = lshr i32 3, %x +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t4(i32 %x, i32 %y) { +; CHECK: shr.s32 r0, r1, r2 + %z = ashr i32 %x, %y +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t5(i32 %x) { +; CHECK: shr.s32 r0, r1, 3 + %z = ashr i32 %x, 3 +; CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t6(i32 %x) { +; CHECK: shr.s32 r0, -3, r1 + %z = ashr i32 -3, %x +; CHECK: ret; + ret i32 %z +} diff --git a/test/CodeGen/PTX/st.ll b/test/CodeGen/PTX/st.ll new file mode 100644 index 000000000000..2cbacb9ee59c --- /dev/null +++ b/test/CodeGen/PTX/st.ll @@ -0,0 +1,71 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +;CHECK: .extern .global .s32 array[]; +@array = external global [10 x i32] + +;CHECK: .extern .const .s32 array_constant[]; +@array_constant = external addrspace(1) constant [10 x i32] + +;CHECK: .extern .local .s32 array_local[]; +@array_local = external addrspace(2) global [10 x i32] + +;CHECK: .extern .shared .s32 array_shared[]; +@array_shared = external addrspace(4) global [10 x i32] + +define ptx_device void @t1(i32* %p, i32 %x) { +entry: +;CHECK: st.global.s32 [r1], r2; + store i32 %x, i32* %p + ret void +} + +define ptx_device void @t2(i32* %p, i32 %x) { +entry: +;CHECK: st.global.s32 [r1+4], r2; + %i = getelementptr i32* %p, i32 1 + store i32 %x, i32* %i + ret void +} + +define ptx_device void @t3(i32* %p, i32 %q, i32 %x) { +;CHECK: .reg .s32 r0; +entry: +;CHECK: shl.b32 r0, r2, 2; +;CHECK: add.s32 r0, r1, r0; +;CHECK: st.global.s32 [r0], r3; + %i = getelementptr i32* %p, i32 %q + store i32 %x, i32* %i + ret void +} + +define ptx_device void @t4_global(i32 %x) { +entry: +;CHECK: st.global.s32 [array], r1; + %i = getelementptr [10 x i32]* @array, i32 0, i32 0 + store i32 %x, i32* %i + ret void +} + +define ptx_device void @t4_local(i32 %x) { +entry: +;CHECK: st.local.s32 [array_local], r1; + %i = getelementptr [10 x i32] addrspace(2)* @array_local, i32 0, i32 0 + store i32 %x, i32 addrspace(2)* %i + ret void +} + +define ptx_device void @t4_shared(i32 %x) { +entry: +;CHECK: st.shared.s32 [array_shared], r1; + %i = getelementptr [10 x i32] addrspace(4)* @array_shared, i32 0, i32 0 + store i32 %x, i32 addrspace(4)* %i + ret void +} + +define ptx_device void @t5(i32 %x) { +entry: +;CHECK: st.global.s32 [array+4], r1; + %i = getelementptr [10 x i32]* @array, i32 0, i32 1 + store i32 %x, i32* %i + ret void +} diff --git a/test/CodeGen/PTX/sub.ll b/test/CodeGen/PTX/sub.ll new file mode 100644 index 000000000000..aab3fdadad13 --- /dev/null +++ b/test/CodeGen/PTX/sub.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=ptx | FileCheck %s + +define ptx_device i32 @t1(i32 %x, i32 %y) { +;CHECK: sub.s32 r0, r1, r2; + %z = sub i32 %x, %y +;CHECK: ret; + ret i32 %z +} + +define ptx_device i32 @t2(i32 %x) { +;CHECK: add.s32 r0, r1, -1; + %z = sub i32 %x, 1 +;CHECK: ret; + ret i32 %z +} diff --git a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll index e93395a67ec6..cca9e658ad5f 100644 --- a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll +++ b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=ppc64 -mcpu=g5 | grep cntlzd -define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) { +define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind { %tmp19 = load i64* %t %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19 ) ; <i64> [#uses=1] %tmp23 = trunc i64 %tmp22 to i32 diff --git a/test/CodeGen/PowerPC/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/PowerPC/2010-04-07-DbgValueOtherTargets.ll index f48f32f8fb17..4a850984a909 100644 --- a/test/CodeGen/PowerPC/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/PowerPC/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=ppc32 -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/PowerPC/2010-10-11-Fast-Varargs.ll b/test/CodeGen/PowerPC/2010-10-11-Fast-Varargs.ll new file mode 100644 index 000000000000..da77b2878543 --- /dev/null +++ b/test/CodeGen/PowerPC/2010-10-11-Fast-Varargs.ll @@ -0,0 +1,16 @@ +; RUN: llc < %s -O0 +; PR8357 +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32" +target triple = "powerpc-unknown-freebsd9.0" + +; RegAllocFast requires that each physreg only be used once. The varargs +; lowering code needs to use virtual registers when storing live-in registers on +; the stack. + +define i32 @testing(i32 %x, float %a, ...) nounwind { + %1 = alloca i32, align 4 + %2 = alloca float, align 4 + store i32 %x, i32* %1, align 4 + store float %a, float* %2, align 4 + ret i32 0 +} diff --git a/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll b/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll new file mode 100644 index 000000000000..bf3d577a3677 --- /dev/null +++ b/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll @@ -0,0 +1,22 @@ +; RUN: llc -disable-fp-elim < %s | FileCheck %s +; PR8749 +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32" +target triple = "powerpc-apple-darwin9.8" + +define i32 @main() nounwind { +entry: +; Make sure we're generating references using the red zone +; CHECK: main: +; CHECK: stw r3, -12(r1) + %retval = alloca i32 + %0 = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store i32 0, i32* %0, align 4 + %1 = load i32* %0, align 4 + store i32 %1, i32* %retval, align 4 + br label %return + +return: ; preds = %entry + %retval1 = load i32* %retval + ret i32 %retval1 +} diff --git a/test/CodeGen/PowerPC/align.ll b/test/CodeGen/PowerPC/align.ll index 109a83726e98..0797ca8d0be8 100644 --- a/test/CodeGen/PowerPC/align.ll +++ b/test/CodeGen/PowerPC/align.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -mtriple=powerpc-linux-gnu | FileCheck %s -check-prefix=ELF ; RUN: llc < %s -mtriple=powerpc-apple-darwin9 | FileCheck %s -check-prefix=DARWIN +; RUN: llc < %s -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=DARWIN8 @a = global i1 true ; no alignment @@ -40,3 +41,6 @@ @bar = common global [75 x i8] zeroinitializer, align 128 ;ELF: .comm bar,75,128 ;DARWIN: .comm _bar,75,7 + +;; Darwin8 doesn't support aligned comm. Just miscompile this. +; DARWIN8: .comm _bar,75 ; diff --git a/test/CodeGen/PowerPC/compare-simm.ll b/test/CodeGen/PowerPC/compare-simm.ll index 5ba050060fcb..92d1dbe902a1 100644 --- a/test/CodeGen/PowerPC/compare-simm.ll +++ b/test/CodeGen/PowerPC/compare-simm.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {cmpwi cr0, r3, -1} -define i32 @test(i32 %x) { +define i32 @test(i32 %x) nounwind { %c = icmp eq i32 %x, -1 br i1 %c, label %T, label %F T: diff --git a/test/CodeGen/PowerPC/indirectbr.ll b/test/CodeGen/PowerPC/indirectbr.ll index ab8d9dca5dc4..5122ab39d232 100644 --- a/test/CodeGen/PowerPC/indirectbr.ll +++ b/test/CodeGen/PowerPC/indirectbr.ll @@ -43,8 +43,8 @@ L2: ; preds = %L3, %bb2 L1: ; preds = %L2, %bb2 %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1] -; PIC: addis r4, r4, ha16(Ltmp0-"L0$pb") -; PIC: li r6, lo16(Ltmp0-"L0$pb") +; PIC: addis r4, r4, ha16(Ltmp0-L0$pb) +; PIC: li r6, lo16(Ltmp0-L0$pb) ; PIC: add r4, r4, r6 ; PIC: stw r4 ; STATIC: li r5, lo16(Ltmp0) diff --git a/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll b/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll new file mode 100644 index 000000000000..659cdf74d026 --- /dev/null +++ b/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll @@ -0,0 +1,321 @@ +; RUN: llc < %s -march=ppc32 +; ModuleID = 'mult-alt-generic.c' +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32" +target triple = "powerpc" + +@mout0 = common global i32 0, align 4 +@min1 = common global i32 0, align 4 +@marray = common global [2 x i32] zeroinitializer, align 4 + +define void @single_m() nounwind { +entry: + call void asm "foo $1,$0", "=*m,*m"(i32* @mout0, i32* @min1) nounwind + ret void +} + +define void @single_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @single_V() nounwind { +entry: + ret void +} + +define void @single_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,<r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r<"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,>r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r>"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,i"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,n"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @single_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,imr"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @single_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,X"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r,X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 + %4 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+001) nounwind + store i32 %4, i32* %out0, align 4 + %5 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+000) nounwind + store i32 %5, i32* %out0, align 4 + ret void +} + +define void @single_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_m() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*m|r,m|r"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @multi_V() nounwind { +entry: + ret void +} + +define void @multi_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|<r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r<"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|>r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r>"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|m"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|i"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|n"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @multi_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @multi_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 + %4 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+001) nounwind + store i32 %4, i32* %out0, align 4 + %5 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+000) nounwind + store i32 %5, i32* %out0, align 4 + ret void +} + +define void @multi_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} diff --git a/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll b/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll new file mode 100644 index 000000000000..3da06f65db83 --- /dev/null +++ b/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll @@ -0,0 +1,321 @@ +; RUN: llc < %s -march=ppc64 +; ModuleID = 'mult-alt-generic.c' +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64" + +@mout0 = common global i32 0, align 4 +@min1 = common global i32 0, align 4 +@marray = common global [2 x i32] zeroinitializer, align 4 + +define void @single_m() nounwind { +entry: + call void asm "foo $1,$0", "=*m,*m"(i32* @mout0, i32* @min1) nounwind + ret void +} + +define void @single_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @single_V() nounwind { +entry: + ret void +} + +define void @single_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,<r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r<"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,>r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r>"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,i"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,n"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @single_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,imr"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @single_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,X"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r,X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 + %4 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+001) nounwind + store i32 %4, i32* %out0, align 4 + %5 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+000) nounwind + store i32 %5, i32* %out0, align 4 + ret void +} + +define void @single_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_m() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*m|r,m|r"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @multi_V() nounwind { +entry: + ret void +} + +define void @multi_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|<r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r<"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|>r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r>"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|m"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|i"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|n"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @multi_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @multi_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 + %4 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+001) nounwind + store i32 %4, i32* %out0, align 4 + %5 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+000) nounwind + store i32 %5, i32* %out0, align 4 + ret void +} + +define void @multi_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} diff --git a/test/CodeGen/PowerPC/rlwimi2.ll b/test/CodeGen/PowerPC/rlwimi2.ll index 59a36555bf86..1bee4e03f1b0 100644 --- a/test/CodeGen/PowerPC/rlwimi2.ll +++ b/test/CodeGen/PowerPC/rlwimi2.ll @@ -4,7 +4,7 @@ ; RUN: grep srwi %t | count 1 ; RUN: not grep slwi %t -define i16 @test1(i32 %srcA, i32 %srcB, i32 %alpha) { +define i16 @test1(i32 %srcA, i32 %srcB, i32 %alpha) nounwind { entry: %tmp.1 = shl i32 %srcA, 15 ; <i32> [#uses=1] %tmp.4 = and i32 %tmp.1, 32505856 ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/stfiwx.ll b/test/CodeGen/PowerPC/stfiwx.ll index d1c3f5234a26..1ad558c6abc9 100644 --- a/test/CodeGen/PowerPC/stfiwx.ll +++ b/test/CodeGen/PowerPC/stfiwx.ll @@ -6,13 +6,13 @@ ; RUN: not grep stfiwx %t2 ; RUN: grep r1 %t2 -define void @test(float %a, i32* %b) { +define void @test(float %a, i32* %b) nounwind { %tmp.2 = fptosi float %a to i32 ; <i32> [#uses=1] store i32 %tmp.2, i32* %b ret void } -define void @test2(float %a, i32* %b, i32 %i) { +define void @test2(float %a, i32* %b, i32 %i) nounwind { %tmp.2 = getelementptr i32* %b, i32 1 ; <i32*> [#uses=1] %tmp.5 = getelementptr i32* %b, i32 %i ; <i32*> [#uses=1] %tmp.7 = fptosi float %a to i32 ; <i32> [#uses=3] diff --git a/test/CodeGen/PowerPC/tango.net.ftp.FtpClient.ll b/test/CodeGen/PowerPC/tango.net.ftp.FtpClient.ll deleted file mode 100644 index 6f103462664f..000000000000 --- a/test/CodeGen/PowerPC/tango.net.ftp.FtpClient.ll +++ /dev/null @@ -1,585 +0,0 @@ -; RN: llc < %s -; RUN: false -; XFAIL: * -; PR4534 - -; ModuleID = 'tango.net.ftp.FtpClient.bc' -target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" -target triple = "powerpc-apple-darwin9.6.0" - %"byte[]" = type { i32, i8* } -@.str167 = external constant [11 x i8] ; <[11 x i8]*> [#uses=1] -@.str170 = external constant [11 x i8] ; <[11 x i8]*> [#uses=2] -@.str171 = external constant [5 x i8] ; <[5 x i8]*> [#uses=1] -@llvm.used = appending global [1 x i8*] [i8* bitcast (void (%"byte[]")* @foo to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] - -define fastcc void @foo(%"byte[]" %line_arg) { -entry: - %line_arg830 = extractvalue %"byte[]" %line_arg, 0 ; <i32> [#uses=12] - %line_arg831 = extractvalue %"byte[]" %line_arg, 1 ; <i8*> [#uses=17] - %t5 = load i8* %line_arg831 ; <i8> [#uses=1] - br label %forcondi - -forcondi: ; preds = %forbodyi, %entry - %l.0i = phi i32 [ 10, %entry ], [ %t4i, %forbodyi ] ; <i32> [#uses=2] - %p.0i = phi i8* [ getelementptr ([11 x i8]* @.str167, i32 0, i32 -1), %entry ], [ %t7i, %forbodyi ] ; <i8*> [#uses=1] - %t4i = add i32 %l.0i, -1 ; <i32> [#uses=1] - %t5i = icmp eq i32 %l.0i, 0 ; <i1> [#uses=1] - br i1 %t5i, label %forcond.i, label %forbodyi - -forbodyi: ; preds = %forcondi - %t7i = getelementptr i8* %p.0i, i32 1 ; <i8*> [#uses=2] - %t8i = load i8* %t7i ; <i8> [#uses=1] - %t12i = icmp eq i8 %t8i, %t5 ; <i1> [#uses=1] - br i1 %t12i, label %forcond.i, label %forcondi - -forcond.i: ; preds = %forbody.i, %forbodyi, %forcondi - %storemerge.i = phi i32 [ %t106.i, %forbody.i ], [ 1, %forcondi ], [ 1, %forbodyi ] ; <i32> [#uses=1] - %t77.i286 = phi i1 [ %phit3, %forbody.i ], [ false, %forcondi ], [ false, %forbodyi ] ; <i1> [#uses=1] - br i1 %t77.i286, label %forcond.i295, label %forbody.i - -forbody.i: ; preds = %forcond.i - %t106.i = add i32 %storemerge.i, 1 ; <i32> [#uses=2] - %phit3 = icmp ugt i32 %t106.i, 3 ; <i1> [#uses=1] - br label %forcond.i - -forcond.i295: ; preds = %forbody.i301, %forcond.i - %storemerge.i292 = phi i32 [ %t106.i325, %forbody.i301 ], [ 4, %forcond.i ] ; <i32> [#uses=1] - %t77.i293 = phi i1 [ %phit2, %forbody.i301 ], [ false, %forcond.i ] ; <i1> [#uses=1] - br i1 %t77.i293, label %forcond.i332, label %forbody.i301 - -forbody.i301: ; preds = %forcond.i295 - %t106.i325 = add i32 %storemerge.i292, 1 ; <i32> [#uses=2] - %phit2 = icmp ugt i32 %t106.i325, 6 ; <i1> [#uses=1] - br label %forcond.i295 - -forcond.i332: ; preds = %forbody.i338, %forcond.i295 - %storemerge.i329 = phi i32 [ %t106.i362, %forbody.i338 ], [ 7, %forcond.i295 ] ; <i32> [#uses=3] - %t77.i330 = phi i1 [ %phit1, %forbody.i338 ], [ false, %forcond.i295 ] ; <i1> [#uses=1] - br i1 %t77.i330, label %wcond.i370, label %forbody.i338 - -forbody.i338: ; preds = %forcond.i332 - %t106.i362 = add i32 %storemerge.i329, 1 ; <i32> [#uses=2] - %phit1 = icmp ugt i32 %t106.i362, 9 ; <i1> [#uses=1] - br label %forcond.i332 - -wcond.i370: ; preds = %wbody.i372, %forcond.i332 - %.frame.0.11 = phi i32 [ %t18.i371.c, %wbody.i372 ], [ %storemerge.i329, %forcond.i332 ] ; <i32> [#uses=2] - %t3.i368 = phi i32 [ %t18.i371.c, %wbody.i372 ], [ %storemerge.i329, %forcond.i332 ] ; <i32> [#uses=5] - %t4.i369 = icmp ult i32 %t3.i368, %line_arg830 ; <i1> [#uses=1] - br i1 %t4.i369, label %andand.i378, label %wcond22.i383 - -wbody.i372: ; preds = %andand.i378 - %t18.i371.c = add i32 %t3.i368, 1 ; <i32> [#uses=2] - br label %wcond.i370 - -andand.i378: ; preds = %wcond.i370 - %t11.i375 = getelementptr i8* %line_arg831, i32 %t3.i368 ; <i8*> [#uses=1] - %t12.i376 = load i8* %t11.i375 ; <i8> [#uses=1] - %t14.i377 = icmp eq i8 %t12.i376, 32 ; <i1> [#uses=1] - br i1 %t14.i377, label %wbody.i372, label %wcond22.i383 - -wcond22.i383: ; preds = %wbody23.i385, %andand.i378, %wcond.i370 - %.frame.0.10 = phi i32 [ %t50.i384, %wbody23.i385 ], [ %.frame.0.11, %wcond.i370 ], [ %.frame.0.11, %andand.i378 ] ; <i32> [#uses=2] - %t49.i381 = phi i32 [ %t50.i384, %wbody23.i385 ], [ %t3.i368, %wcond.i370 ], [ %t3.i368, %andand.i378 ] ; <i32> [#uses=5] - %t32.i382 = icmp ult i32 %t49.i381, %line_arg830 ; <i1> [#uses=1] - br i1 %t32.i382, label %andand33.i391, label %wcond54.i396 - -wbody23.i385: ; preds = %andand33.i391 - %t50.i384 = add i32 %t49.i381, 1 ; <i32> [#uses=2] - br label %wcond22.i383 - -andand33.i391: ; preds = %wcond22.i383 - %t42.i388 = getelementptr i8* %line_arg831, i32 %t49.i381 ; <i8*> [#uses=1] - %t43.i389 = load i8* %t42.i388 ; <i8> [#uses=1] - %t45.i390 = icmp eq i8 %t43.i389, 32 ; <i1> [#uses=1] - br i1 %t45.i390, label %wcond54.i396, label %wbody23.i385 - -wcond54.i396: ; preds = %wbody55.i401, %andand33.i391, %wcond22.i383 - %.frame.0.9 = phi i32 [ %t82.i400, %wbody55.i401 ], [ %.frame.0.10, %wcond22.i383 ], [ %.frame.0.10, %andand33.i391 ] ; <i32> [#uses=2] - %t81.i394 = phi i32 [ %t82.i400, %wbody55.i401 ], [ %t49.i381, %wcond22.i383 ], [ %t49.i381, %andand33.i391 ] ; <i32> [#uses=3] - %t64.i395 = icmp ult i32 %t81.i394, %line_arg830 ; <i1> [#uses=1] - br i1 %t64.i395, label %andand65.i407, label %wcond.i716 - -wbody55.i401: ; preds = %andand65.i407 - %t82.i400 = add i32 %t81.i394, 1 ; <i32> [#uses=2] - br label %wcond54.i396 - -andand65.i407: ; preds = %wcond54.i396 - %t74.i404 = getelementptr i8* %line_arg831, i32 %t81.i394 ; <i8*> [#uses=1] - %t75.i405 = load i8* %t74.i404 ; <i8> [#uses=1] - %t77.i406 = icmp eq i8 %t75.i405, 32 ; <i1> [#uses=1] - br i1 %t77.i406, label %wbody55.i401, label %wcond.i716 - -wcond.i716: ; preds = %wbody.i717, %andand65.i407, %wcond54.i396 - %.frame.0.0 = phi i32 [ %t18.i.c829, %wbody.i717 ], [ %.frame.0.9, %wcond54.i396 ], [ %.frame.0.9, %andand65.i407 ] ; <i32> [#uses=7] - %t4.i715 = icmp ult i32 %.frame.0.0, %line_arg830 ; <i1> [#uses=1] - br i1 %t4.i715, label %andand.i721, label %wcond22.i724 - -wbody.i717: ; preds = %andand.i721 - %t18.i.c829 = add i32 %.frame.0.0, 1 ; <i32> [#uses=1] - br label %wcond.i716 - -andand.i721: ; preds = %wcond.i716 - %t11.i718 = getelementptr i8* %line_arg831, i32 %.frame.0.0 ; <i8*> [#uses=1] - %t12.i719 = load i8* %t11.i718 ; <i8> [#uses=1] - %t14.i720 = icmp eq i8 %t12.i719, 32 ; <i1> [#uses=1] - br i1 %t14.i720, label %wbody.i717, label %wcond22.i724 - -wcond22.i724: ; preds = %wbody23.i726, %andand.i721, %wcond.i716 - %.frame.0.1 = phi i32 [ %t50.i725, %wbody23.i726 ], [ %.frame.0.0, %wcond.i716 ], [ %.frame.0.0, %andand.i721 ] ; <i32> [#uses=2] - %t49.i722 = phi i32 [ %t50.i725, %wbody23.i726 ], [ %.frame.0.0, %wcond.i716 ], [ %.frame.0.0, %andand.i721 ] ; <i32> [#uses=5] - %t32.i723 = icmp ult i32 %t49.i722, %line_arg830 ; <i1> [#uses=1] - br i1 %t32.i723, label %andand33.i731, label %wcond54.i734 - -wbody23.i726: ; preds = %andand33.i731 - %t50.i725 = add i32 %t49.i722, 1 ; <i32> [#uses=2] - br label %wcond22.i724 - -andand33.i731: ; preds = %wcond22.i724 - %t42.i728 = getelementptr i8* %line_arg831, i32 %t49.i722 ; <i8*> [#uses=1] - %t43.i729 = load i8* %t42.i728 ; <i8> [#uses=1] - %t45.i730 = icmp eq i8 %t43.i729, 32 ; <i1> [#uses=1] - br i1 %t45.i730, label %wcond54.i734, label %wbody23.i726 - -wcond54.i734: ; preds = %wbody55.i736, %andand33.i731, %wcond22.i724 - %.frame.0.2 = phi i32 [ %t82.i735, %wbody55.i736 ], [ %.frame.0.1, %wcond22.i724 ], [ %.frame.0.1, %andand33.i731 ] ; <i32> [#uses=2] - %t81.i732 = phi i32 [ %t82.i735, %wbody55.i736 ], [ %t49.i722, %wcond22.i724 ], [ %t49.i722, %andand33.i731 ] ; <i32> [#uses=3] - %t64.i733 = icmp ult i32 %t81.i732, %line_arg830 ; <i1> [#uses=1] - br i1 %t64.i733, label %andand65.i740, label %wcond.i750 - -wbody55.i736: ; preds = %andand65.i740 - %t82.i735 = add i32 %t81.i732, 1 ; <i32> [#uses=2] - br label %wcond54.i734 - -andand65.i740: ; preds = %wcond54.i734 - %t74.i737 = getelementptr i8* %line_arg831, i32 %t81.i732 ; <i8*> [#uses=1] - %t75.i738 = load i8* %t74.i737 ; <i8> [#uses=1] - %t77.i739 = icmp eq i8 %t75.i738, 32 ; <i1> [#uses=1] - br i1 %t77.i739, label %wbody55.i736, label %wcond.i750 - -wcond.i750: ; preds = %wbody.i752, %andand65.i740, %wcond54.i734 - %.frame.0.3 = phi i32 [ %t18.i751.c, %wbody.i752 ], [ %.frame.0.2, %wcond54.i734 ], [ %.frame.0.2, %andand65.i740 ] ; <i32> [#uses=11] - %t4.i749 = icmp ult i32 %.frame.0.3, %line_arg830 ; <i1> [#uses=1] - br i1 %t4.i749, label %andand.i758, label %wcond22.i761 - -wbody.i752: ; preds = %andand.i758 - %t18.i751.c = add i32 %.frame.0.3, 1 ; <i32> [#uses=1] - br label %wcond.i750 - -andand.i758: ; preds = %wcond.i750 - %t11.i755 = getelementptr i8* %line_arg831, i32 %.frame.0.3 ; <i8*> [#uses=1] - %t12.i756 = load i8* %t11.i755 ; <i8> [#uses=1] - %t14.i757 = icmp eq i8 %t12.i756, 32 ; <i1> [#uses=1] - br i1 %t14.i757, label %wbody.i752, label %wcond22.i761 - -wcond22.i761: ; preds = %wbody23.i763, %andand.i758, %wcond.i750 - %.frame.0.4 = phi i32 [ %t50.i762, %wbody23.i763 ], [ %.frame.0.3, %wcond.i750 ], [ %.frame.0.3, %andand.i758 ] ; <i32> [#uses=2] - %t49.i759 = phi i32 [ %t50.i762, %wbody23.i763 ], [ %.frame.0.3, %wcond.i750 ], [ %.frame.0.3, %andand.i758 ] ; <i32> [#uses=7] - %t32.i760 = icmp ult i32 %t49.i759, %line_arg830 ; <i1> [#uses=1] - br i1 %t32.i760, label %andand33.i769, label %wcond54.i773 - -wbody23.i763: ; preds = %andand33.i769 - %t50.i762 = add i32 %t49.i759, 1 ; <i32> [#uses=2] - br label %wcond22.i761 - -andand33.i769: ; preds = %wcond22.i761 - %t42.i766 = getelementptr i8* %line_arg831, i32 %t49.i759 ; <i8*> [#uses=1] - %t43.i767 = load i8* %t42.i766 ; <i8> [#uses=1] - %t45.i768 = icmp eq i8 %t43.i767, 32 ; <i1> [#uses=1] - br i1 %t45.i768, label %wcond54.i773, label %wbody23.i763 - -wcond54.i773: ; preds = %wbody55.i775, %andand33.i769, %wcond22.i761 - %.frame.0.5 = phi i32 [ %t82.i774, %wbody55.i775 ], [ %.frame.0.4, %wcond22.i761 ], [ %.frame.0.4, %andand33.i769 ] ; <i32> [#uses=1] - %t81.i770 = phi i32 [ %t82.i774, %wbody55.i775 ], [ %t49.i759, %wcond22.i761 ], [ %t49.i759, %andand33.i769 ] ; <i32> [#uses=3] - %t64.i771 = icmp ult i32 %t81.i770, %line_arg830 ; <i1> [#uses=1] - br i1 %t64.i771, label %andand65.i780, label %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786 - -wbody55.i775: ; preds = %andand65.i780 - %t82.i774 = add i32 %t81.i770, 1 ; <i32> [#uses=2] - br label %wcond54.i773 - -andand65.i780: ; preds = %wcond54.i773 - %t74.i777 = getelementptr i8* %line_arg831, i32 %t81.i770 ; <i8*> [#uses=1] - %t75.i778 = load i8* %t74.i777 ; <i8> [#uses=1] - %t77.i779 = icmp eq i8 %t75.i778, 32 ; <i1> [#uses=1] - br i1 %t77.i779, label %wbody55.i775, label %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786 - -Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786: ; preds = %andand65.i780, %wcond54.i773 - %t89.i782 = getelementptr i8* %line_arg831, i32 %.frame.0.3 ; <i8*> [#uses=4] - %t90.i783 = sub i32 %t49.i759, %.frame.0.3 ; <i32> [#uses=2] - br label %wcond.i792 - -wcond.i792: ; preds = %wbody.i794, %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786 - %.frame.0.6 = phi i32 [ %.frame.0.5, %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit786 ], [ %t18.i793.c, %wbody.i794 ] ; <i32> [#uses=9] - %t4.i791 = icmp ult i32 %.frame.0.6, %line_arg830 ; <i1> [#uses=1] - br i1 %t4.i791, label %andand.i800, label %wcond22.i803 - -wbody.i794: ; preds = %andand.i800 - %t18.i793.c = add i32 %.frame.0.6, 1 ; <i32> [#uses=1] - br label %wcond.i792 - -andand.i800: ; preds = %wcond.i792 - %t11.i797 = getelementptr i8* %line_arg831, i32 %.frame.0.6 ; <i8*> [#uses=1] - %t12.i798 = load i8* %t11.i797 ; <i8> [#uses=1] - %t14.i799 = icmp eq i8 %t12.i798, 32 ; <i1> [#uses=1] - br i1 %t14.i799, label %wbody.i794, label %wcond22.i803 - -wcond22.i803: ; preds = %wbody23.i805, %andand.i800, %wcond.i792 - %t49.i801 = phi i32 [ %t50.i804, %wbody23.i805 ], [ %.frame.0.6, %wcond.i792 ], [ %.frame.0.6, %andand.i800 ] ; <i32> [#uses=7] - %t32.i802 = icmp ult i32 %t49.i801, %line_arg830 ; <i1> [#uses=1] - br i1 %t32.i802, label %andand33.i811, label %wcond54.i815 - -wbody23.i805: ; preds = %andand33.i811 - %t50.i804 = add i32 %t49.i801, 1 ; <i32> [#uses=1] - br label %wcond22.i803 - -andand33.i811: ; preds = %wcond22.i803 - %t42.i808 = getelementptr i8* %line_arg831, i32 %t49.i801 ; <i8*> [#uses=1] - %t43.i809 = load i8* %t42.i808 ; <i8> [#uses=1] - %t45.i810 = icmp eq i8 %t43.i809, 32 ; <i1> [#uses=1] - br i1 %t45.i810, label %wcond54.i815, label %wbody23.i805 - -wcond54.i815: ; preds = %wbody55.i817, %andand33.i811, %wcond22.i803 - %t81.i812 = phi i32 [ %t82.i816, %wbody55.i817 ], [ %t49.i801, %wcond22.i803 ], [ %t49.i801, %andand33.i811 ] ; <i32> [#uses=3] - %t64.i813 = icmp ult i32 %t81.i812, %line_arg830 ; <i1> [#uses=1] - br i1 %t64.i813, label %andand65.i822, label %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828 - -wbody55.i817: ; preds = %andand65.i822 - %t82.i816 = add i32 %t81.i812, 1 ; <i32> [#uses=1] - br label %wcond54.i815 - -andand65.i822: ; preds = %wcond54.i815 - %t74.i819 = getelementptr i8* %line_arg831, i32 %t81.i812 ; <i8*> [#uses=1] - %t75.i820 = load i8* %t74.i819 ; <i8> [#uses=1] - %t77.i821 = icmp eq i8 %t75.i820, 32 ; <i1> [#uses=1] - br i1 %t77.i821, label %wbody55.i817, label %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828 - -Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828: ; preds = %andand65.i822, %wcond54.i815 - %t89.i824 = getelementptr i8* %line_arg831, i32 %.frame.0.6 ; <i8*> [#uses=4] - %t90.i825 = sub i32 %t49.i801, %.frame.0.6 ; <i32> [#uses=2] - %t63 = load i8* %t89.i824 ; <i8> [#uses=2] - br label %forcondi622 - -forcondi622: ; preds = %forbodyi626, %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828 - %l.0i618 = phi i32 [ 10, %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828 ], [ %t4i620, %forbodyi626 ] ; <i32> [#uses=2] - %p.0i619 = phi i8* [ getelementptr ([11 x i8]* @.str170, i32 0, i32 -1), %Dt3net3ftp9FClient13FConnection13pListLineMFAaZS5t3net3ftp9FClient11FFileInfo10p_wordMFZAa.exit828 ], [ %t7i623, %forbodyi626 ] ; <i8*> [#uses=1] - %t4i620 = add i32 %l.0i618, -1 ; <i32> [#uses=1] - %t5i621 = icmp eq i32 %l.0i618, 0 ; <i1> [#uses=1] - br i1 %t5i621, label %if65, label %forbodyi626 - -forbodyi626: ; preds = %forcondi622 - %t7i623 = getelementptr i8* %p.0i619, i32 1 ; <i8*> [#uses=3] - %t8i624 = load i8* %t7i623 ; <i8> [#uses=1] - %t12i625 = icmp eq i8 %t8i624, %t63 ; <i1> [#uses=1] - br i1 %t12i625, label %ifi630, label %forcondi622 - -ifi630: ; preds = %forbodyi626 - %t15i627 = ptrtoint i8* %t7i623 to i32 ; <i32> [#uses=1] - %t17i629 = sub i32 %t15i627, ptrtoint ([11 x i8]* @.str170 to i32) ; <i32> [#uses=1] - %phit636 = icmp eq i32 %t17i629, 10 ; <i1> [#uses=1] - br i1 %phit636, label %if65, label %e67 - -if65: ; preds = %ifi630, %forcondi622 - %t4i532 = icmp eq i32 %t49.i759, %.frame.0.3 ; <i1> [#uses=1] - br i1 %t4i532, label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576, label %forcondi539 - -forcondi539: ; preds = %zi546, %if65 - %sign.1.i533 = phi i1 [ %sign.0.i543, %zi546 ], [ false, %if65 ] ; <i1> [#uses=2] - %l.0i534 = phi i32 [ %t33i545, %zi546 ], [ %t90.i783, %if65 ] ; <i32> [#uses=3] - %p.0i535 = phi i8* [ %t30i544, %zi546 ], [ %t89.i782, %if65 ] ; <i8*> [#uses=6] - %c.0.ini536 = phi i8* [ %t30i544, %zi546 ], [ %t89.i782, %if65 ] ; <i8*> [#uses=1] - %c.0i537 = load i8* %c.0.ini536 ; <i8> [#uses=2] - %t8i538 = icmp eq i32 %l.0i534, 0 ; <i1> [#uses=1] - br i1 %t8i538, label %endfori550, label %forbodyi540 - -forbodyi540: ; preds = %forcondi539 - switch i8 %c.0i537, label %endfori550 [ - i8 32, label %zi546 - i8 9, label %zi546 - i8 45, label %if20i541 - i8 43, label %if26i542 - ] - -if20i541: ; preds = %forbodyi540 - br label %zi546 - -if26i542: ; preds = %forbodyi540 - br label %zi546 - -zi546: ; preds = %if26i542, %if20i541, %forbodyi540, %forbodyi540 - %sign.0.i543 = phi i1 [ false, %if26i542 ], [ true, %if20i541 ], [ %sign.1.i533, %forbodyi540 ], [ %sign.1.i533, %forbodyi540 ] ; <i1> [#uses=1] - %t30i544 = getelementptr i8* %p.0i535, i32 1 ; <i8*> [#uses=2] - %t33i545 = add i32 %l.0i534, -1 ; <i32> [#uses=1] - br label %forcondi539 - -endfori550: ; preds = %forbodyi540, %forcondi539 - %t37i547 = icmp eq i8 %c.0i537, 48 ; <i1> [#uses=1] - %t39i548 = icmp sgt i32 %l.0i534, 1 ; <i1> [#uses=1] - %or.condi549 = and i1 %t37i547, %t39i548 ; <i1> [#uses=1] - br i1 %or.condi549, label %if40i554, label %endif41i564 - -if40i554: ; preds = %endfori550 - %t43i551 = getelementptr i8* %p.0i535, i32 1 ; <i8*> [#uses=2] - %t44i552 = load i8* %t43i551 ; <i8> [#uses=1] - %t45i553 = zext i8 %t44i552 to i32 ; <i32> [#uses=1] - switch i32 %t45i553, label %endif41i564 [ - i32 120, label %case46i556 - i32 88, label %case46i556 - i32 98, label %case51i558 - i32 66, label %case51i558 - i32 111, label %case56i560 - i32 79, label %case56i560 - ] - -case46i556: ; preds = %if40i554, %if40i554 - %t48i555 = getelementptr i8* %p.0i535, i32 2 ; <i8*> [#uses=1] - br label %endif41i564 - -case51i558: ; preds = %if40i554, %if40i554 - %t53i557 = getelementptr i8* %p.0i535, i32 2 ; <i8*> [#uses=1] - br label %endif41i564 - -case56i560: ; preds = %if40i554, %if40i554 - %t58i559 = getelementptr i8* %p.0i535, i32 2 ; <i8*> [#uses=1] - br label %endif41i564 - -endif41i564: ; preds = %case56i560, %case51i558, %case46i556, %if40i554, %endfori550 - %r.0i561 = phi i32 [ 0, %if40i554 ], [ 8, %case56i560 ], [ 2, %case51i558 ], [ 16, %case46i556 ], [ 0, %endfori550 ] ; <i32> [#uses=2] - %p.2i562 = phi i8* [ %t43i551, %if40i554 ], [ %t58i559, %case56i560 ], [ %t53i557, %case51i558 ], [ %t48i555, %case46i556 ], [ %p.0i535, %endfori550 ] ; <i8*> [#uses=2] - %t63i563 = icmp eq i32 %r.0i561, 0 ; <i1> [#uses=1] - br i1 %t63i563, label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576, label %if70i568 - -if70i568: ; preds = %endif41i564 - br label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576 - -Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576: ; preds = %if70i568, %endif41i564, %if65 - %radix.0.i570 = phi i32 [ 0, %if65 ], [ %r.0i561, %if70i568 ], [ 10, %endif41i564 ] ; <i32> [#uses=2] - %p.1i571 = phi i8* [ %p.2i562, %if70i568 ], [ %t89.i782, %if65 ], [ %p.2i562, %endif41i564 ] ; <i8*> [#uses=1] - %t84i572 = ptrtoint i8* %p.1i571 to i32 ; <i32> [#uses=1] - %t85i573 = ptrtoint i8* %t89.i782 to i32 ; <i32> [#uses=1] - %t86i574 = sub i32 %t84i572, %t85i573 ; <i32> [#uses=2] - %t6.i575 = sub i32 %t90.i783, %t86i574 ; <i32> [#uses=1] - %t59i604 = zext i32 %radix.0.i570 to i64 ; <i64> [#uses=1] - br label %fcondi581 - -fcondi581: ; preds = %if55i610, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576 - %value.0i577 = phi i64 [ 0, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576 ], [ %t65i607, %if55i610 ] ; <i64> [#uses=1] - %fkey.0i579 = phi i32 [ 0, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i576 ], [ %t70i609, %if55i610 ] ; <i32> [#uses=3] - %t3i580 = icmp ult i32 %fkey.0i579, %t6.i575 ; <i1> [#uses=1] - br i1 %t3i580, label %fbodyi587, label %wcond.i422 - -fbodyi587: ; preds = %fcondi581 - %t5.s.i582 = add i32 %t86i574, %fkey.0i579 ; <i32> [#uses=1] - %t89.i782.s = add i32 %.frame.0.3, %t5.s.i582 ; <i32> [#uses=1] - %t5i583 = getelementptr i8* %line_arg831, i32 %t89.i782.s ; <i8*> [#uses=1] - %t6i584 = load i8* %t5i583 ; <i8> [#uses=6] - %t6.off84i585 = add i8 %t6i584, -48 ; <i8> [#uses=1] - %or.cond.i28.i586 = icmp ugt i8 %t6.off84i585, 9 ; <i1> [#uses=1] - br i1 %or.cond.i28.i586, label %ei590, label %endifi603 - -ei590: ; preds = %fbodyi587 - %t6.off83i588 = add i8 %t6i584, -97 ; <i8> [#uses=1] - %or.cond81i589 = icmp ugt i8 %t6.off83i588, 25 ; <i1> [#uses=1] - br i1 %or.cond81i589, label %e24i595, label %if22i592 - -if22i592: ; preds = %ei590 - %t27i591 = add i8 %t6i584, -39 ; <i8> [#uses=1] - br label %endifi603 - -e24i595: ; preds = %ei590 - %t6.offi593 = add i8 %t6i584, -65 ; <i8> [#uses=1] - %or.cond82i594 = icmp ugt i8 %t6.offi593, 25 ; <i1> [#uses=1] - br i1 %or.cond82i594, label %wcond.i422, label %if39i597 - -if39i597: ; preds = %e24i595 - %t44.i29.i596 = add i8 %t6i584, -7 ; <i8> [#uses=1] - br label %endifi603 - -endifi603: ; preds = %if39i597, %if22i592, %fbodyi587 - %c.0.i30.i598 = phi i8 [ %t27i591, %if22i592 ], [ %t44.i29.i596, %if39i597 ], [ %t6i584, %fbodyi587 ] ; <i8> [#uses=1] - %t48.i31.i599 = zext i8 %c.0.i30.i598 to i32 ; <i32> [#uses=1] - %t49i600 = add i32 %t48.i31.i599, 208 ; <i32> [#uses=1] - %t52i601 = and i32 %t49i600, 255 ; <i32> [#uses=2] - %t54i602 = icmp ult i32 %t52i601, %radix.0.i570 ; <i1> [#uses=1] - br i1 %t54i602, label %if55i610, label %wcond.i422 - -if55i610: ; preds = %endifi603 - %t61i605 = mul i64 %value.0i577, %t59i604 ; <i64> [#uses=1] - %t64i606 = zext i32 %t52i601 to i64 ; <i64> [#uses=1] - %t65i607 = add i64 %t61i605, %t64i606 ; <i64> [#uses=1] - %t70i609 = add i32 %fkey.0i579, 1 ; <i32> [#uses=1] - br label %fcondi581 - -e67: ; preds = %ifi630 - %t4i447 = icmp eq i32 %t49.i801, %.frame.0.6 ; <i1> [#uses=1] - br i1 %t4i447, label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491, label %forcondi454 - -forcondi454: ; preds = %zi461, %e67 - %c.0i452 = phi i8 [ %c.0i452.pre, %zi461 ], [ %t63, %e67 ] ; <i8> [#uses=2] - %sign.1.i448 = phi i1 [ %sign.0.i458, %zi461 ], [ false, %e67 ] ; <i1> [#uses=2] - %l.0i449 = phi i32 [ %t33i460, %zi461 ], [ %t90.i825, %e67 ] ; <i32> [#uses=3] - %p.0i450 = phi i8* [ %t30i459, %zi461 ], [ %t89.i824, %e67 ] ; <i8*> [#uses=5] - %t8i453 = icmp eq i32 %l.0i449, 0 ; <i1> [#uses=1] - br i1 %t8i453, label %endfori465, label %forbodyi455 - -forbodyi455: ; preds = %forcondi454 - switch i8 %c.0i452, label %endfori465 [ - i8 32, label %zi461 - i8 9, label %zi461 - i8 45, label %if20i456 - i8 43, label %if26i457 - ] - -if20i456: ; preds = %forbodyi455 - br label %zi461 - -if26i457: ; preds = %forbodyi455 - br label %zi461 - -zi461: ; preds = %if26i457, %if20i456, %forbodyi455, %forbodyi455 - %sign.0.i458 = phi i1 [ false, %if26i457 ], [ true, %if20i456 ], [ %sign.1.i448, %forbodyi455 ], [ %sign.1.i448, %forbodyi455 ] ; <i1> [#uses=1] - %t30i459 = getelementptr i8* %p.0i450, i32 1 ; <i8*> [#uses=2] - %t33i460 = add i32 %l.0i449, -1 ; <i32> [#uses=1] - %c.0i452.pre = load i8* %t30i459 ; <i8> [#uses=1] - br label %forcondi454 - -endfori465: ; preds = %forbodyi455, %forcondi454 - %t37i462 = icmp eq i8 %c.0i452, 48 ; <i1> [#uses=1] - %t39i463 = icmp sgt i32 %l.0i449, 1 ; <i1> [#uses=1] - %or.condi464 = and i1 %t37i462, %t39i463 ; <i1> [#uses=1] - br i1 %or.condi464, label %if40i469, label %endif41i479 - -if40i469: ; preds = %endfori465 - %t43i466 = getelementptr i8* %p.0i450, i32 1 ; <i8*> [#uses=2] - %t44i467 = load i8* %t43i466 ; <i8> [#uses=1] - %t45i468 = zext i8 %t44i467 to i32 ; <i32> [#uses=1] - switch i32 %t45i468, label %endif41i479 [ - i32 120, label %case46i471 - i32 111, label %case56i475 - ] - -case46i471: ; preds = %if40i469 - %t48i470 = getelementptr i8* %p.0i450, i32 2 ; <i8*> [#uses=1] - br label %endif41i479 - -case56i475: ; preds = %if40i469 - %t58i474 = getelementptr i8* %p.0i450, i32 2 ; <i8*> [#uses=1] - br label %endif41i479 - -endif41i479: ; preds = %case56i475, %case46i471, %if40i469, %endfori465 - %r.0i476 = phi i32 [ 0, %if40i469 ], [ 8, %case56i475 ], [ 16, %case46i471 ], [ 0, %endfori465 ] ; <i32> [#uses=2] - %p.2i477 = phi i8* [ %t43i466, %if40i469 ], [ %t58i474, %case56i475 ], [ %t48i470, %case46i471 ], [ %p.0i450, %endfori465 ] ; <i8*> [#uses=2] - %t63i478 = icmp eq i32 %r.0i476, 0 ; <i1> [#uses=1] - br i1 %t63i478, label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491, label %if70i483 - -if70i483: ; preds = %endif41i479 - br label %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491 - -Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491: ; preds = %if70i483, %endif41i479, %e67 - %radix.0.i485 = phi i32 [ 0, %e67 ], [ %r.0i476, %if70i483 ], [ 10, %endif41i479 ] ; <i32> [#uses=2] - %p.1i486 = phi i8* [ %p.2i477, %if70i483 ], [ %t89.i824, %e67 ], [ %p.2i477, %endif41i479 ] ; <i8*> [#uses=1] - %t84i487 = ptrtoint i8* %p.1i486 to i32 ; <i32> [#uses=1] - %t85i488 = ptrtoint i8* %t89.i824 to i32 ; <i32> [#uses=1] - %t86i489 = sub i32 %t84i487, %t85i488 ; <i32> [#uses=2] - %ttt = sub i32 %t90.i825, %t86i489 ; <i32> [#uses=1] - %t59i519 = zext i32 %radix.0.i485 to i64 ; <i64> [#uses=1] - br label %fcondi496 - -fcondi496: ; preds = %if55i525, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491 - %value.0i492 = phi i64 [ 0, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491 ], [ %t65i522, %if55i525 ] ; <i64> [#uses=1] - %fkey.0i494 = phi i32 [ 0, %Dt4x7c7I11V4tTaZ4tFAaKbKkZk.exit.i491 ], [ %t70i524, %if55i525 ] ; <i32> [#uses=3] - %t3i495 = icmp ult i32 %fkey.0i494, %ttt ; <i1> [#uses=1] - br i1 %t3i495, label %fbodyi502, label %wcond.i422 - -fbodyi502: ; preds = %fcondi496 - %t5.s.i497 = add i32 %t86i489, %fkey.0i494 ; <i32> [#uses=1] - %t89.i824.s = add i32 %.frame.0.6, %t5.s.i497 ; <i32> [#uses=1] - %t5i498 = getelementptr i8* %line_arg831, i32 %t89.i824.s ; <i8*> [#uses=1] - %t6i499 = load i8* %t5i498 ; <i8> [#uses=6] - %t6.off84i500 = add i8 %t6i499, -48 ; <i8> [#uses=1] - %or.cond.i28.i501 = icmp ugt i8 %t6.off84i500, 9 ; <i1> [#uses=1] - br i1 %or.cond.i28.i501, label %ei505, label %endifi518 - -ei505: ; preds = %fbodyi502 - %t6.off83i503 = add i8 %t6i499, -97 ; <i8> [#uses=1] - %or.cond81i504 = icmp ugt i8 %t6.off83i503, 25 ; <i1> [#uses=1] - br i1 %or.cond81i504, label %e24i510, label %if22i507 - -if22i507: ; preds = %ei505 - %t27i506 = add i8 %t6i499, -39 ; <i8> [#uses=1] - br label %endifi518 - -e24i510: ; preds = %ei505 - %t6.offi508 = add i8 %t6i499, -65 ; <i8> [#uses=1] - %or.cond82i509 = icmp ugt i8 %t6.offi508, 25 ; <i1> [#uses=1] - br i1 %or.cond82i509, label %wcond.i422, label %if39i512 - -if39i512: ; preds = %e24i510 - %t44.i29.i511 = add i8 %t6i499, -7 ; <i8> [#uses=1] - br label %endifi518 - -endifi518: ; preds = %if39i512, %if22i507, %fbodyi502 - %c.0.i30.i513 = phi i8 [ %t27i506, %if22i507 ], [ %t44.i29.i511, %if39i512 ], [ %t6i499, %fbodyi502 ] ; <i8> [#uses=1] - %t48.i31.i514 = zext i8 %c.0.i30.i513 to i32 ; <i32> [#uses=1] - %t49i515 = add i32 %t48.i31.i514, 208 ; <i32> [#uses=1] - %t52i516 = and i32 %t49i515, 255 ; <i32> [#uses=2] - %t54i517 = icmp ult i32 %t52i516, %radix.0.i485 ; <i1> [#uses=1] - br i1 %t54i517, label %if55i525, label %wcond.i422 - -if55i525: ; preds = %endifi518 - %t61i520 = mul i64 %value.0i492, %t59i519 ; <i64> [#uses=1] - %t64i521 = zext i32 %t52i516 to i64 ; <i64> [#uses=1] - %t65i522 = add i64 %t61i520, %t64i521 ; <i64> [#uses=1] - %t70i524 = add i32 %fkey.0i494, 1 ; <i32> [#uses=1] - br label %fcondi496 - -wcond.i422: ; preds = %e40.i, %endifi518, %e24i510, %fcondi496, %endifi603, %e24i595, %fcondi581 - %sarg60.pn.i = phi i8* [ %p.0.i, %e40.i ], [ undef, %fcondi496 ], [ undef, %e24i510 ], [ undef, %endifi518 ], [ undef, %endifi603 ], [ undef, %e24i595 ], [ undef, %fcondi581 ] ; <i8*> [#uses=3] - %start_arg.pn.i = phi i32 [ %t49.i443, %e40.i ], [ 0, %fcondi496 ], [ 0, %e24i510 ], [ 0, %endifi518 ], [ 0, %endifi603 ], [ 0, %e24i595 ], [ 0, %fcondi581 ] ; <i32> [#uses=3] - %extent.0.i = phi i32 [ %t51.i, %e40.i ], [ undef, %fcondi496 ], [ undef, %e24i510 ], [ undef, %endifi518 ], [ undef, %endifi603 ], [ undef, %e24i595 ], [ undef, %fcondi581 ] ; <i32> [#uses=3] - %p.0.i = getelementptr i8* %sarg60.pn.i, i32 %start_arg.pn.i ; <i8*> [#uses=2] - %p.0.s63.i = add i32 %start_arg.pn.i, -1 ; <i32> [#uses=1] - %t2i424 = getelementptr i8* %sarg60.pn.i, i32 %p.0.s63.i ; <i8*> [#uses=1] - br label %forcondi430 - -forcondi430: ; preds = %forbodyi434, %wcond.i422 - %l.0i426 = phi i32 [ %extent.0.i, %wcond.i422 ], [ %t4i428, %forbodyi434 ] ; <i32> [#uses=2] - %p.0i427 = phi i8* [ %t2i424, %wcond.i422 ], [ %t7i431, %forbodyi434 ] ; <i8*> [#uses=1] - %t4i428 = add i32 %l.0i426, -1 ; <i32> [#uses=1] - %t5i429 = icmp eq i32 %l.0i426, 0 ; <i1> [#uses=1] - br i1 %t5i429, label %e.i441, label %forbodyi434 - -forbodyi434: ; preds = %forcondi430 - %t7i431 = getelementptr i8* %p.0i427, i32 1 ; <i8*> [#uses=3] - %t8i432 = load i8* %t7i431 ; <i8> [#uses=1] - %t12i433 = icmp eq i8 %t8i432, 32 ; <i1> [#uses=1] - br i1 %t12i433, label %ifi438, label %forcondi430 - -ifi438: ; preds = %forbodyi434 - %t15i435 = ptrtoint i8* %t7i431 to i32 ; <i32> [#uses=1] - %t16i436 = ptrtoint i8* %p.0.i to i32 ; <i32> [#uses=1] - %t17i437 = sub i32 %t15i435, %t16i436 ; <i32> [#uses=1] - br label %e.i441 - -e.i441: ; preds = %ifi438, %forcondi430 - %t2561.i = phi i32 [ %t17i437, %ifi438 ], [ %extent.0.i, %forcondi430 ] ; <i32> [#uses=2] - %p.0.s.i = add i32 %start_arg.pn.i, %t2561.i ; <i32> [#uses=1] - %t32.s.i = add i32 %p.0.s.i, -1 ; <i32> [#uses=1] - %t2i.i = getelementptr i8* %sarg60.pn.i, i32 %t32.s.i ; <i8*> [#uses=1] - br label %forbodyi.i - -forbodyi.i: ; preds = %forbodyi.i, %e.i441 - %p.0i.i = phi i8* [ %t2i.i, %e.i441 ], [ %t7i.i, %forbodyi.i ] ; <i8*> [#uses=1] - %s2.0i.i = phi i8* [ getelementptr ([5 x i8]* @.str171, i32 0, i32 0), %e.i441 ], [ %t11i.i, %forbodyi.i ] ; <i8*> [#uses=2] - %t7i.i = getelementptr i8* %p.0i.i, i32 1 ; <i8*> [#uses=2] - %t8i.i = load i8* %t7i.i ; <i8> [#uses=1] - %t11i.i = getelementptr i8* %s2.0i.i, i32 1 ; <i8*> [#uses=1] - %t12i.i = load i8* %s2.0i.i ; <i8> [#uses=1] - %t14i.i = icmp eq i8 %t8i.i, %t12i.i ; <i1> [#uses=1] - br i1 %t14i.i, label %forbodyi.i, label %e40.i - -e40.i: ; preds = %forbodyi.i - %t49.i443 = add i32 %t2561.i, 1 ; <i32> [#uses=2] - %t51.i = sub i32 %extent.0.i, %t49.i443 ; <i32> [#uses=1] - br label %wcond.i422 -} diff --git a/test/CodeGen/PowerPC/unsafe-math.ll b/test/CodeGen/PowerPC/unsafe-math.ll index ef9791277dcd..b0bdcc28d28e 100644 --- a/test/CodeGen/PowerPC/unsafe-math.ll +++ b/test/CodeGen/PowerPC/unsafe-math.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -march=ppc32 -enable-unsafe-fp-math | \ ; RUN: grep fmul | count 1 -define double @foo(double %X) { +define double @foo(double %X) nounwind { %tmp1 = fmul double %X, 1.23 %tmp2 = fmul double %tmp1, 4.124 ret double %tmp2 diff --git a/test/CodeGen/PowerPC/varargs.ll b/test/CodeGen/PowerPC/varargs.ll new file mode 100644 index 000000000000..1769be957ac4 --- /dev/null +++ b/test/CodeGen/PowerPC/varargs.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -mtriple=powerpc-apple-darwin | FileCheck -check-prefix=P32 %s +; RUN: llc < %s -mtriple=powerpc64-apple-darwin | FileCheck -check-prefix=P64 %s + +; PR8327 +define i8* @test1(i8** %foo) nounwind { + %A = va_arg i8** %foo, i8* + ret i8* %A +} + +; P32: test1: +; P32: lwz r4, 0(r3) +; P32: addi r5, r4, 4 +; P32: stw r5, 0(r3) +; P32: lwz r3, 0(r4) +; P32: blr + +; P64: test1: +; P64: ld r4, 0(r3) +; P64: addi r5, r4, 8 +; P64: std r5, 0(r3) +; P64: ld r3, 0(r4) +; P64: blr diff --git a/test/CodeGen/SPARC/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/SPARC/2010-04-07-DbgValueOtherTargets.ll index f66ee216089d..3b644986f2e4 100644 --- a/test/CodeGen/SPARC/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/SPARC/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=sparc -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/SPARC/2011-01-11-CC.ll b/test/CodeGen/SPARC/2011-01-11-CC.ll new file mode 100755 index 000000000000..3ceda958de6e --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-11-CC.ll @@ -0,0 +1,105 @@ +; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8 +; RUN: llc -march=sparc -mattr=v9 <%s | FileCheck %s -check-prefix=V9 + + +define i32 @test_addx(i64 %a, i64 %b, i64 %c) nounwind readnone noinline { +entry: +; V8: addcc +; V8-NOT: subcc +; V8: addx +; V9: addcc +; V9-NOT: subcc +; V9: addx +; V9: mov{{e|ne}} %icc + %0 = add i64 %a, %b + %1 = icmp ugt i64 %0, %c + %2 = zext i1 %1 to i32 + ret i32 %2 +} + + +define i32 @test_select_int_icc(i32 %a, i32 %b, i32 %c) nounwind readnone noinline { +entry: +; V8: test_select_int_icc +; V8: subcc +; V8: {{be|bne}} +; V9: test_select_int_icc +; V9: subcc +; V9-NOT: {{be|bne}} +; V9: mov{{e|ne}} %icc + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, i32 %b, i32 %c + ret i32 %1 +} + + +define float @test_select_fp_icc(i32 %a, float %f1, float %f2) nounwind readnone noinline { +entry: +; V8: test_select_fp_icc +; V8: subcc +; V8: {{be|bne}} +; V9: test_select_fp_icc +; V9: subcc +; V9-NOT: {{be|bne}} +; V9: fmovs{{e|ne}} %icc + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, float %f1, float %f2 + ret float %1 +} + +define double @test_select_dfp_icc(i32 %a, double %f1, double %f2) nounwind readnone noinline { +entry: +; V8: test_select_dfp_icc +; V8: subcc +; V8: {{be|bne}} +; V9: test_select_dfp_icc +; V9: subcc +; V9=NOT: {{be|bne}} +; V9: fmovd{{e|ne}} %icc + %0 = icmp eq i32 %a, 0 + %1 = select i1 %0, double %f1, double %f2 + ret double %1 +} + +define i32 @test_select_int_fcc(float %f, i32 %a, i32 %b) nounwind readnone noinline { +entry: +;V8: test_select_int_fcc +;V8: fcmps +;V8: {{fbe|fbne}} +;V9: test_select_int_fcc +;V9: fcmps +;V9-NOT: {{fbe|fbne}} +;V9: mov{{e|ne}} %fcc0 + %0 = fcmp une float %f, 0.000000e+00 + %a.b = select i1 %0, i32 %a, i32 %b + ret i32 %a.b +} + + +define float @test_select_fp_fcc(float %f, float %f1, float %f2) nounwind readnone noinline { +entry: +;V8: test_select_fp_fcc +;V8: fcmps +;V8: {{fbe|fbne}} +;V9: test_select_fp_fcc +;V9: fcmps +;V9-NOT: {{fbe|fbne}} +;V9: fmovs{{e|ne}} %fcc0 + %0 = fcmp une float %f, 0.000000e+00 + %1 = select i1 %0, float %f1, float %f2 + ret float %1 +} + +define double @test_select_dfp_fcc(double %f, double %f1, double %f2) nounwind readnone noinline { +entry: +;V8: test_select_dfp_fcc +;V8: fcmpd +;V8: {{fbne|fbe}} +;V9: test_select_dfp_fcc +;V9: fcmpd +;V9-NOT: {{fbne|fbe}} +;V9: fmovd{{e|ne}} %fcc0 + %0 = fcmp une double %f, 0.000000e+00 + %1 = select i1 %0, double %f1, double %f2 + ret double %1 +} diff --git a/test/CodeGen/SPARC/2011-01-11-Call.ll b/test/CodeGen/SPARC/2011-01-11-Call.ll new file mode 100644 index 000000000000..7350e9232428 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-11-Call.ll @@ -0,0 +1,13 @@ +; RUN: llc -march=sparc -O0 <%s + +define void @test() nounwind { +entry: + %0 = tail call i32 (...)* @foo() nounwind + tail call void (...)* @bar() nounwind + ret void +} + +declare i32 @foo(...) + +declare void @bar(...) + diff --git a/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll b/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll new file mode 100644 index 000000000000..fbf724270566 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll @@ -0,0 +1,64 @@ +;RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8 +;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9 + +define i8* @frameaddr() nounwind readnone { +entry: +;V8: frameaddr +;V8: or %g0, %fp, {{.+}} + +;V9: frameaddr +;V9: or %g0, %fp, {{.+}} + %0 = tail call i8* @llvm.frameaddress(i32 0) + ret i8* %0 +} + +define i8* @frameaddr2() nounwind readnone { +entry: +;V8: frameaddr2 +;V8: ta 3 +;V8: ld [%fp+56], {{.+}} +;V8: ld [{{.+}}+56], {{.+}} +;V8: ld [{{.+}}+56], {{.+}} + +;V9: frameaddr2 +;V9: flushw +;V9: ld [%fp+56], {{.+}} +;V9: ld [{{.+}}+56], {{.+}} +;V9: ld [{{.+}}+56], {{.+}} + %0 = tail call i8* @llvm.frameaddress(i32 3) + ret i8* %0 +} + +declare i8* @llvm.frameaddress(i32) nounwind readnone + + + +define i8* @retaddr() nounwind readnone { +entry: +;V8: retaddr +;V8: or %g0, %i7, {{.+}} + +;V9: retaddr +;V9: or %g0, %i7, {{.+}} + %0 = tail call i8* @llvm.returnaddress(i32 0) + ret i8* %0 +} + +define i8* @retaddr2() nounwind readnone { +entry: +;V8: retaddr2 +;V8: ta 3 +;V8: ld [%fp+56], {{.+}} +;V8: ld [{{.+}}+56], {{.+}} +;V8: ld [{{.+}}+60], {{.+}} + +;V9: retaddr2 +;V9: flushw +;V9: ld [%fp+56], {{.+}} +;V9: ld [{{.+}}+56], {{.+}} +;V9: ld [{{.+}}+60], {{.+}} + %0 = tail call i8* @llvm.returnaddress(i32 3) + ret i8* %0 +} + +declare i8* @llvm.returnaddress(i32) nounwind readnone diff --git a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll new file mode 100644 index 000000000000..bc27e987a179 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll @@ -0,0 +1,90 @@ +;RUN: llc -march=sparc < %s | FileCheck %s +;RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=UNOPT + + +define i32 @test(i32 %a) nounwind { +entry: +; CHECK: test +; CHECK: call bar +; CHECK-NOT: nop +; CHECK: ret +; CHECK-NEXT: restore + %0 = tail call i32 @bar(i32 %a) nounwind + ret i32 %0 +} + +define i32 @test_jmpl(i32 (i32, i32)* nocapture %f, i32 %a, i32 %b) nounwind { +entry: +; CHECK: test_jmpl +; CHECK: call +; CHECK-NOT: nop +; CHECK: ret +; CHECK-NEXT: restore + %0 = tail call i32 %f(i32 %a, i32 %b) nounwind + ret i32 %0 +} + +define i32 @test_loop(i32 %a, i32 %b) nounwind readnone { +; CHECK: test_loop +entry: + %0 = icmp sgt i32 %b, 0 + br i1 %0, label %bb, label %bb5 + +bb: ; preds = %entry, %bb + %a_addr.18 = phi i32 [ %a_addr.0, %bb ], [ %a, %entry ] + %1 = phi i32 [ %3, %bb ], [ 0, %entry ] + %tmp9 = mul i32 %1, %b + %2 = and i32 %1, 1 + %tmp = xor i32 %2, 1 + %.pn = shl i32 %tmp9, %tmp + %a_addr.0 = add i32 %.pn, %a_addr.18 + %3 = add nsw i32 %1, 1 + %exitcond = icmp eq i32 %3, %b +;CHECK: subcc +;CHECK: bne +;CHECK-NOT: nop + br i1 %exitcond, label %bb5, label %bb + +bb5: ; preds = %bb, %entry + %a_addr.1.lcssa = phi i32 [ %a, %entry ], [ %a_addr.0, %bb ] +;CHECK: ret +;CHECK-NEXT: restore + ret i32 %a_addr.1.lcssa +} + +define i32 @test_inlineasm(i32 %a) nounwind { +entry: +;CHECK: test_inlineasm +;CHECK: sethi +;CHECK: !NO_APP +;CHECK-NEXT: subcc +;CHECK-NEXT: bg +;CHECK-NEXT: nop + tail call void asm sideeffect "sethi 0, %g0", ""() nounwind + %0 = icmp slt i32 %a, 0 + br i1 %0, label %bb, label %bb1 + +bb: ; preds = %entry + %1 = tail call i32 (...)* @foo(i32 %a) nounwind + ret i32 %1 + +bb1: ; preds = %entry + %2 = tail call i32 @bar(i32 %a) nounwind + ret i32 %2 +} + +declare i32 @foo(...) + +declare i32 @bar(i32) + + +define i32 @test_implicit_def() nounwind { +entry: +;UNOPT: test_implicit_def +;UNOPT: call func +;UNOPT-NEXT: nop + %0 = tail call i32 @func(i32* undef) nounwind + ret i32 0 +} + +declare i32 @func(i32*) diff --git a/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll b/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll new file mode 100644 index 000000000000..85c16e4684ed --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll @@ -0,0 +1,18 @@ +;RUN: llc -march=sparc < %s | FileCheck %s + +%struct.foo_t = type { i32, i32, i32 } + +@s = internal unnamed_addr global %struct.foo_t { i32 10, i32 20, i32 30 } + +define i32 @test() nounwind { +entry: +;CHECK: test +;CHECK: st +;CHECK: st +;CHECK: st +;CHECK: bar + %0 = tail call i32 @bar(%struct.foo_t* byval @s) nounwind + ret i32 %0 +} + +declare i32 @bar(%struct.foo_t* byval) diff --git a/test/CodeGen/SPARC/2011-01-22-SRet.ll b/test/CodeGen/SPARC/2011-01-22-SRet.ll new file mode 100644 index 000000000000..2f684b009c96 --- /dev/null +++ b/test/CodeGen/SPARC/2011-01-22-SRet.ll @@ -0,0 +1,36 @@ +;RUN: llc -march=sparc < %s | FileCheck %s + +%struct.foo_t = type { i32, i32, i32 } + +define weak void @make_foo(%struct.foo_t* noalias sret %agg.result, i32 %a, i32 %b, i32 %c) nounwind { +entry: +;CHECK: make_foo +;CHECK: ld [%fp+64], {{.+}} +;CHECK: or {{.+}}, {{.+}}, %i0 +;CHECK: ret + %0 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 0 + store i32 %a, i32* %0, align 4 + %1 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 1 + store i32 %b, i32* %1, align 4 + %2 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 2 + store i32 %c, i32* %2, align 4 + ret void +} + +define i32 @test() nounwind { +entry: +;CHECK: test +;CHECK: st {{.+}}, [%sp+64] +;CHECK: make_foo + %f = alloca %struct.foo_t, align 8 + call void @make_foo(%struct.foo_t* noalias sret %f, i32 10, i32 20, i32 30) nounwind + %0 = getelementptr inbounds %struct.foo_t* %f, i32 0, i32 0 + %1 = load i32* %0, align 8 + %2 = getelementptr inbounds %struct.foo_t* %f, i32 0, i32 1 + %3 = load i32* %2, align 4 + %4 = getelementptr inbounds %struct.foo_t* %f, i32 0, i32 2 + %5 = load i32* %4, align 8 + %6 = add nsw i32 %3, %1 + %7 = add nsw i32 %6, %5 + ret i32 %7 +} diff --git a/test/CodeGen/SPARC/basictest.ll b/test/CodeGen/SPARC/basictest.ll index 9c2c16a6947c..4352e6246301 100644 --- a/test/CodeGen/SPARC/basictest.ll +++ b/test/CodeGen/SPARC/basictest.ll @@ -1,6 +1,26 @@ -; RUN: llc < %s -march=sparc +; RUN: llc < %s -march=sparc | FileCheck %s -define i32 @test(i32 %X) { +define i32 @test0(i32 %X) { %tmp.1 = add i32 %X, 1 ret i32 %tmp.1 +; CHECK: test0: +; CHECK: add %i0, 1, %i0 +} + + +;; xnor tests. +define i32 @test1(i32 %X, i32 %Y) { + %A = xor i32 %X, %Y + %B = xor i32 %A, -1 + ret i32 %B +; CHECK: test1: +; CHECK: xnor %i0, %i1, %i0 +} + +define i32 @test2(i32 %X, i32 %Y) { + %A = xor i32 %X, -1 + %B = xor i32 %A, %Y + ret i32 %B +; CHECK: test2: +; CHECK: xnor %i0, %i1, %i0 } diff --git a/test/CodeGen/SPARC/mult-alt-generic-sparc.ll b/test/CodeGen/SPARC/mult-alt-generic-sparc.ll new file mode 100644 index 000000000000..6013b17d9372 --- /dev/null +++ b/test/CodeGen/SPARC/mult-alt-generic-sparc.ll @@ -0,0 +1,323 @@ +; RUN: llc < %s -march=sparc +; ModuleID = 'mult-alt-generic.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32" +target triple = "sparc" + +@mout0 = common global i32 0, align 4 +@min1 = common global i32 0, align 4 +@marray = common global [2 x i32] zeroinitializer, align 4 + +define void @single_m() nounwind { +entry: + call void asm "foo $1,$0", "=*m,*m"(i32* @mout0, i32* @min1) nounwind + ret void +} + +define void @single_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @single_V() nounwind { +entry: + ret void +} + +define void @single_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,<r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r<"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,>r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r>"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,i"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,n"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @single_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,imr"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @single_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,X"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r,X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 +; No lowering support. +; %4 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+001) nounwind +; store i32 %4, i32* %out0, align 4 +; %5 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+000) nounwind +; store i32 %5, i32* %out0, align 4 + ret void +} + +define void @single_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_m() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*m|r,m|r"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @multi_V() nounwind { +entry: + ret void +} + +define void @multi_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|<r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r<"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|>r"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r>"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|m"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|i"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|n"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|E"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|F"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @multi_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @multi_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 +; No lowering support. +; %4 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+001) nounwind +; store i32 %4, i32* %out0, align 4 +; %5 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+000) nounwind +; store i32 %5, i32* %out0, align 4 + ret void +} + +define void @multi_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} diff --git a/test/CodeGen/SPARC/xnor.ll b/test/CodeGen/SPARC/xnor.ll deleted file mode 100644 index 6ff66bd6fcc6..000000000000 --- a/test/CodeGen/SPARC/xnor.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s -march=sparc | \ -; RUN: grep xnor | count 2 - -define i32 @test1(i32 %X, i32 %Y) { - %A = xor i32 %X, %Y ; <i32> [#uses=1] - %B = xor i32 %A, -1 ; <i32> [#uses=1] - ret i32 %B -} - -define i32 @test2(i32 %X, i32 %Y) { - %A = xor i32 %X, -1 ; <i32> [#uses=1] - %B = xor i32 %A, %Y ; <i32> [#uses=1] - ret i32 %B -} - diff --git a/test/CodeGen/SystemZ/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/SystemZ/2010-04-07-DbgValueOtherTargets.ll index 610aa40197e3..c2877ac55ed1 100644 --- a/test/CodeGen/SystemZ/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/SystemZ/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=systemz -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/Thumb/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/Thumb/2010-04-07-DbgValueOtherTargets.ll index 6b6c14f40871..b9039774d42e 100644 --- a/test/CodeGen/Thumb/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/Thumb/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=thumb -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll b/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll index 9a6321bb43c4..06c0dfec5bab 100644 --- a/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll +++ b/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll @@ -10,7 +10,7 @@ define void @_Z19getClosestDiagonal3ii(%0* noalias sret, i32, i32) nounwind { ; CHECK: blx ___muldf3 ; CHECK: blx ___muldf3 -; CHECK: beq LBB0_8 +; CHECK: beq LBB0_7 ; CHECK: blx ___muldf3 ; <label>:3 switch i32 %1, label %4 [ diff --git a/test/CodeGen/Thumb/2011-EpilogueBug.ll b/test/CodeGen/Thumb/2011-EpilogueBug.ll new file mode 100644 index 000000000000..16789e66cc18 --- /dev/null +++ b/test/CodeGen/Thumb/2011-EpilogueBug.ll @@ -0,0 +1,17 @@ +; RUN: llc -mtriple=thumbv6-apple-darwin < %s | FileCheck %s +; r8869722 + +%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } +%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } + +define void @t1(%struct.state* %v) { +; CHECK: push {r4 + %tmp6 = load i32* null + %tmp8 = alloca float, i32 %tmp6 + store i32 1, i32* null + br label %return + +return: ; preds = %0 +; CHECK: mov sp, r4 + ret void +} diff --git a/test/CodeGen/Thumb/barrier.ll b/test/CodeGen/Thumb/barrier.ll index c611b865f67d..419c3baa3da3 100644 --- a/test/CodeGen/Thumb/barrier.ll +++ b/test/CodeGen/Thumb/barrier.ll @@ -1,15 +1,16 @@ ; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=V6 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=-db | FileCheck %s -check-prefix=V6 ; RUN: llc < %s -march=thumb -mattr=+v6m | FileCheck %s -check-prefix=V6M -declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1 ) +declare void @llvm.memory.barrier(i1 , i1 , i1 , i1 , i1) define void @t1() { ; V6: t1: ; V6: blx {{_*}}sync_synchronize ; V6M: t1: -; V6M: dsb - call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 true ) +; V6M: dmb st + call void @llvm.memory.barrier(i1 false, i1 false, i1 false, i1 true, i1 true) ret void } @@ -18,7 +19,7 @@ define void @t2() { ; V6: blx {{_*}}sync_synchronize ; V6M: t2: -; V6M: dmb - call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 false ) +; V6M: dmb ish + call void @llvm.memory.barrier(i1 true, i1 false, i1 false, i1 true, i1 false) ret void } diff --git a/test/CodeGen/Thumb/dyn-stackalloc.ll b/test/CodeGen/Thumb/dyn-stackalloc.ll index 5c8ad974bc0e..1f31dca0524d 100644 --- a/test/CodeGen/Thumb/dyn-stackalloc.ll +++ b/test/CodeGen/Thumb/dyn-stackalloc.ll @@ -1,12 +1,15 @@ -; RUN: llc < %s -march=thumb | not grep {ldr sp} -; RUN: llc < %s -mtriple=thumb-apple-darwin | \ -; RUN: not grep {sub.*r7} -; RUN: llc < %s -march=thumb | grep {mov.*r6, sp} +; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } define void @t1(%struct.state* %v) { +; CHECK: t1: +; CHECK: push +; CHECK: add r7, sp, #12 +; CHECK: mov r2, sp +; CHECK: subs r4, r2, r1 +; CHECK: mov sp, r4 %tmp6 = load i32* null %tmp8 = alloca float, i32 %tmp6 store i32 1, i32* null @@ -34,6 +37,18 @@ declare fastcc void @f2(float*, float*, float*, i32) @str215 = external global [2 x i8] define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { +; CHECK: t2: +; CHECK: push +; CHECK: add r7, sp, #12 +; CHECK: sub sp, #8 +; CHECK: mov r6, sp +; CHECK: str r2, [r6, #4] +; CHECK: str r0, [r6] +; CHECK-NOT: ldr r0, [sp +; CHECK: ldr r0, [r6, #4] +; CHECK: mov r0, sp +; CHECK: subs r5, r0, r1 +; CHECK: mov sp, r5 %tmp1 = call i32 @strlen( i8* %tag ) %tmp3 = call i32 @strlen( i8* %contents ) %tmp4 = add i32 %tmp1, 2 diff --git a/test/CodeGen/Thumb/large-stack.ll b/test/CodeGen/Thumb/large-stack.ll index b289484f5efb..fbacabaedc35 100644 --- a/test/CodeGen/Thumb/large-stack.ll +++ b/test/CodeGen/Thumb/large-stack.ll @@ -10,22 +10,22 @@ define void @test1() { define void @test2() { ; CHECK: test2: -; CHECK: ldr r0, LCPI +; CHECK: ldr.n r0, LCPI ; CHECK: add sp, r0 -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 %tmp = alloca [ 4168 x i8 ] , align 4 ret void } define i32 @test3() { ; CHECK: test3: -; CHECK: ldr r2, LCPI +; CHECK: ldr.n r2, LCPI ; CHECK: add sp, r2 -; CHECK: ldr r1, LCPI +; CHECK: ldr.n r1, LCPI ; CHECK: add r1, sp -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 %retval = alloca i32, align 4 %tmp = alloca i32, align 4 %a = alloca [805306369 x i8], align 16 diff --git a/test/CodeGen/Thumb/long.ll b/test/CodeGen/Thumb/long.ll index e3ef44a87586..197e19e31b49 100644 --- a/test/CodeGen/Thumb/long.ll +++ b/test/CodeGen/Thumb/long.ll @@ -4,7 +4,7 @@ ; RUN: grep adc | count 1 ; RUN: llc < %s -march=thumb | \ ; RUN: grep sbc | count 1 -; RUN: llc < %s -march=thumb | grep __muldi3 +; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __muldi3 define i64 @f1() { entry: diff --git a/test/CodeGen/Thumb/select.ll b/test/CodeGen/Thumb/select.ll index 7a183b0f9e26..780e5fac02b9 100644 --- a/test/CodeGen/Thumb/select.ll +++ b/test/CodeGen/Thumb/select.ll @@ -4,7 +4,7 @@ ; RUN: llc < %s -march=thumb | grep ble | count 1 ; RUN: llc < %s -march=thumb | grep bls | count 1 ; RUN: llc < %s -march=thumb | grep bhi | count 1 -; RUN: llc < %s -march=thumb | grep __ltdf2 +; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __ltdf2 define i32 @f1(i32 %a.s) { entry: diff --git a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll index f26c6d114b8e..550b3efae998 100644 --- a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll +++ b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll @@ -5,8 +5,13 @@ define hidden i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind { entry: ; CHECK: __gcov_execlp: -; CHECK: mov sp, r7 -; CHECK: sub sp, #4 +; CHECK: sub sp, #8 +; CHECK: push +; CHECK: add r7, sp, #4 +; CHECK: subs r4, r7, #4 +; CHECK: mov sp, r4 +; CHECK-NOT: mov sp, r7 +; CHECK: add sp, #8 call void @__gcov_flush() nounwind br i1 undef, label %bb5, label %bb diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll b/test/CodeGen/Thumb2/2009-08-21-PostRAKill4.ll index 5cfc68d09408..5cfc68d09408 100644 --- a/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll +++ b/test/CodeGen/Thumb2/2009-08-21-PostRAKill4.ll diff --git a/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll b/test/CodeGen/Thumb2/2009-09-01-PostRAProlog.ll index 06a152d56e4d..06a152d56e4d 100644 --- a/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll +++ b/test/CodeGen/Thumb2/2009-09-01-PostRAProlog.ll diff --git a/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll b/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll index 7ee19863de19..458569ec93b5 100644 --- a/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll +++ b/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 \ +; RUN: -pre-RA-sched=source | FileCheck -check-prefix=SOURCE %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 \ +; RUN: -pre-RA-sched=list-hybrid | FileCheck -check-prefix=HYBRID %s ; Radar 7459078 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" @@ -10,9 +13,11 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32- %s5 = type { i32 } ; Make sure the cmp is not scheduled before the InlineAsm that clobbers cc. -; CHECK: InlineAsm End -; CHECK: cmp -; CHECK: beq +; SOURCE: InlineAsm End +; SOURCE: cmp +; SOURCE: beq +; HYBRID: InlineAsm End +; HYBRID: cbz define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind { entry: %tmp1 = getelementptr inbounds %s1* %this, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0 diff --git a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll index 26750065af3f..9ed6a01255f8 100644 --- a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll +++ b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll @@ -23,8 +23,9 @@ entry: %4 = insertelement <2 x double> %2, double %V.0.ph, i32 1 ; <<2 x double>> [#uses=2] ; Constant pool load followed by add. ; Then clobber the loaded register, not the sum. -; CHECK: vldr.64 [[LDR:d.]] -; CHECK: vadd.f64 [[ADD:d.]], [[LDR]], [[LDR]] +; CHECK: vldr.64 [[LDR:d.*]], +; CHECK: LPC0_0: +; CHECK: vadd.f64 [[ADD:d.*]], [[LDR]], [[LDR]] ; CHECK: vmov.f64 [[LDR]] %5 = fadd <2 x double> %3, %3 ; <<2 x double>> [#uses=2] %6 = fadd <2 x double> %4, %4 ; <<2 x double>> [#uses=2] diff --git a/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll b/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll index c5fc5098cd46..f91e1c9febe2 100644 --- a/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll +++ b/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O3 -relocation-model=pic -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O3 -relocation-model=pic | FileCheck %s ; rdar://8115404 ; Tail merging must not split an IT block. diff --git a/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll b/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll index abcf13a3e38f..41f7f299555d 100644 --- a/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll +++ b/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll @@ -5,6 +5,10 @@ define internal fastcc i32 @Callee(i32 %i) nounwind { entry: ; CHECK: Callee: +; CHECK: push +; CHECK: mov r4, sp +; CHECK: sub.w r12, r4, #1000 +; CHECK: mov sp, r12 %0 = icmp eq i32 %i, 0 ; <i1> [#uses=1] br i1 %0, label %bb2, label %bb @@ -17,9 +21,11 @@ bb: ; preds = %entry ret i32 %4 bb2: ; preds = %entry -; Must restore sp from fp here -; CHECK: mov sp, r7 -; CHECK: sub sp, #8 +; Must restore sp from fp here. Make sure not to leave sp in a temporarily invalid +; state though. rdar://8465407 +; CHECK-NOT: mov sp, r7 +; CHECK: sub.w r4, r7, #8 +; CHECK: mov sp, r4 ; CHECK: pop ret i32 0 } diff --git a/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll b/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll new file mode 100644 index 000000000000..313728c1b56a --- /dev/null +++ b/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll @@ -0,0 +1,34 @@ +; rdar://8465407 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s + +%struct.buf = type opaque + +declare void @bar() nounwind optsize + +define void @foo() nounwind optsize { +; CHECK: foo: +; CHECK: push +; CHECK: add r7, sp, #4 +; CHECK: sub sp, #4 +entry: + %m.i = alloca %struct.buf*, align 4 + br label %bb + +bb: + br i1 undef, label %bb3, label %bb2 + +bb2: + call void @bar() nounwind optsize + br i1 undef, label %bb, label %bb3 + +bb3: + br i1 undef, label %return, label %bb + +return: +; CHECK: %return +; 'mov sp, r7' would have left sp in an invalid state +; CHECK-NOT: mov sp, r7 +; CHECK-NOT: sub, sp, #4 +; CHECK: add sp, #4 + ret void +} diff --git a/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll b/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll new file mode 100644 index 000000000000..5b91a5f65aee --- /dev/null +++ b/test/CodeGen/Thumb2/2010-12-03-AddSPNarrowing.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s +; Radar 8724703: Make sure that a t2ADDrSPi instruction with SP as the +; destination register is narrowed to tADDspi instead of tADDrSPi. + +define void @test() nounwind { +entry: +; CHECK: sub.w +; CHECK: add.w + %Buffer.i = alloca [512 x i8], align 4 + ret void +} diff --git a/test/CodeGen/Thumb2/bfi.ll b/test/CodeGen/Thumb2/bfi.ll index 22473bb35a0a..6fb2fc888d9f 100644 --- a/test/CodeGen/Thumb2/bfi.ll +++ b/test/CodeGen/Thumb2/bfi.ll @@ -38,3 +38,14 @@ entry: %or = or i32 %and2, %and ; <i32> [#uses=1] ret i32 %or } + +; rdar://8752056 +define i32 @f4(i32 %a) nounwind { +; CHECK: f4 +; CHECK: movw r1, #3137 +; CHECK: bfi r1, r0, #15, #5 + %1 = shl i32 %a, 15 + %ins7 = and i32 %1, 1015808 + %ins12 = or i32 %ins7, 3137 + ret i32 %ins12 +} diff --git a/test/CodeGen/Thumb2/buildvector-crash.ll b/test/CodeGen/Thumb2/buildvector-crash.ll new file mode 100644 index 000000000000..01ef472d3104 --- /dev/null +++ b/test/CodeGen/Thumb2/buildvector-crash.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -O3 -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 | FileCheck %s +; Formerly crashed, 3573915. + +define void @RotateStarsFP_Vec() nounwind { +bb.nph372: + br label %bb8 + +bb8: ; preds = %bb8, %bb.nph372 + %0 = fadd <4 x float> undef, <float 0xBFEE353F80000000, float 0xBFEE353F80000000, float 0xBFEE353F80000000, float 0xBFEE353F80000000> + %1 = fmul <4 x float> %0, undef + %2 = fmul <4 x float> %1, undef + %3 = fadd <4 x float> undef, %2 + store <4 x float> %3, <4 x float>* undef, align 4 + br label %bb8 +; CHECK: RotateStarsFP_Vec: +; CHECK: vldmia +} diff --git a/test/CodeGen/Thumb2/cortex-fp.ll b/test/CodeGen/Thumb2/cortex-fp.ll index f7ec5a3b577c..d06f8a7beeb0 100644 --- a/test/CodeGen/Thumb2/cortex-fp.ll +++ b/test/CodeGen/Thumb2/cortex-fp.ll @@ -19,6 +19,6 @@ entry: %0 = fmul double %a, %b ; CORTEXM3: blx ___muldf3 ; CORTEXM4: blx ___muldf3 -; CORTEXA8: vmul.f64 d0, d1, d0 +; CORTEXA8: vmul.f64 d16, d17, d16 ret double %0 } diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll index 583f4057bcd9..b8c8cb122a19 100644 --- a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll +++ b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll @@ -1,15 +1,20 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 1 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | FileCheck %s define void @fht(float* nocapture %fz, i16 signext %n) nounwind { +; CHECK: fht: entry: br label %bb5 bb5: ; preds = %bb5, %entry +; CHECK: %bb5 +; CHECK: bne br i1 undef, label %bb5, label %bb.nph bb.nph: ; preds = %bb5 br label %bb7 +; Loop preheader +; CHECK: vmov.f32 bb7: ; preds = %bb9, %bb.nph %s1.02 = phi float [ undef, %bb.nph ], [ %35, %bb9 ] ; <float> [#uses=3] %tmp79 = add i32 undef, undef ; <i32> [#uses=1] @@ -19,6 +24,9 @@ bb7: ; preds = %bb9, %bb.nph br label %bb8 bb8: ; preds = %bb8, %bb7 +; CHECK: %bb8 +; CHECK-NOT: vmov.f32 +; CHECK: blt %tmp54 = add i32 0, %tmp53 ; <i32> [#uses=0] %fi.1 = getelementptr float* %fz, i32 undef ; <float*> [#uses=2] %tmp80 = add i32 0, %tmp79 ; <i32> [#uses=1] diff --git a/test/CodeGen/Thumb2/div.ll b/test/CodeGen/Thumb2/div.ll index e63a115273ff..2c00c70c0db6 100644 --- a/test/CodeGen/Thumb2/div.ll +++ b/test/CodeGen/Thumb2/div.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 \ +; RUN: llc < %s -mtriple=thumb-apple-darwin -mattr=+thumb2 \ ; RUN: | FileCheck %s -check-prefix=CHECK-THUMB ; RUN: llc < %s -march=thumb -mcpu=cortex-m3 -mattr=+thumb2 \ ; RUN: | FileCheck %s -check-prefix=CHECK-THUMBV7M diff --git a/test/CodeGen/Thumb2/large-stack.ll b/test/CodeGen/Thumb2/large-stack.ll index 97295341858c..68b5d1cc94fb 100644 --- a/test/CodeGen/Thumb2/large-stack.ll +++ b/test/CodeGen/Thumb2/large-stack.ll @@ -27,7 +27,7 @@ define i32 @test3() { ; DARWIN: sub.w sp, sp, #805306368 ; DARWIN: sub sp, #20 ; LINUX: test3: -; LINUX: stmdb sp!, {r4, r7, r11, lr} +; LINUX: push.w {r4, r7, r11, lr} ; LINUX: sub.w sp, sp, #805306368 ; LINUX: sub sp, #16 %retval = alloca i32, align 4 diff --git a/test/CodeGen/Thumb2/load-global.ll b/test/CodeGen/Thumb2/load-global.ll deleted file mode 100644 index 46e053ca4ea5..000000000000 --- a/test/CodeGen/Thumb2/load-global.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC -; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LINUX - -@G = external global i32 - -define i32 @test1() { -; STATIC: _test1: -; STATIC: .long _G - -; DYNAMIC: _test1: -; DYNAMIC: .long L_G$non_lazy_ptr - -; PIC: _test1 -; PIC: add r0, pc -; PIC: .long L_G$non_lazy_ptr-(LPC0_0+4) - -; LINUX: test1 -; LINUX: .long G(GOT) - %tmp = load i32* @G - ret i32 %tmp -} diff --git a/test/CodeGen/Thumb2/machine-licm-vdup.ll b/test/CodeGen/Thumb2/machine-licm-vdup.ll deleted file mode 100644 index fde2ee0ab0c9..000000000000 --- a/test/CodeGen/Thumb2/machine-licm-vdup.ll +++ /dev/null @@ -1,38 +0,0 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-fp-elim -arm-vdup-splat | FileCheck %s -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -arm-vdup-splat | FileCheck %s -; Modified version of machine-licm.ll with -arm-vdup-splat turned on, 8003375. -; Eventually this should become the default and be moved into machine-licm.ll. -; FIXME: the vdup should be hoisted out of the loop, 8248029. - -define void @t2(i8* %ptr1, i8* %ptr2) nounwind { -entry: -; CHECK: t2: -; CHECK: mov.w r3, #1065353216 - br i1 undef, label %bb1, label %bb2 - -bb1: -; CHECK-NEXT: %bb1 -; CHECK: vdup.32 q1, r3 - %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ] - %tmp1 = shl i32 %indvar, 2 - %gep1 = getelementptr i8* %ptr1, i32 %tmp1 - %tmp2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %gep1, i32 1) - %tmp3 = call <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> %tmp2) - %gep2 = getelementptr i8* %ptr2, i32 %tmp1 - call void @llvm.arm.neon.vst1.v4f32(i8* %gep2, <4 x float> %tmp3, i32 1) - %indvar.next = add i32 %indvar, 1 - %cond = icmp eq i32 %indvar.next, 10 - br i1 %cond, label %bb2, label %bb1 - -bb2: - ret void -} - -; CHECK-NOT: LCPI1_0: -; CHECK: .subsections_via_symbols - -declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly - -declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind - -declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index b949b2f30506..5e776dd8937c 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -3,9 +3,6 @@ ; rdar://7353541 ; rdar://7354376 -; The generated code is no where near ideal. It's not recognizing the two -; constantpool entries being loaded can be merged into one. - @GV = external global i32 ; <i32*> [#uses=2] define void @t1(i32* nocapture %vals, i32 %c) nounwind { @@ -17,21 +14,21 @@ entry: bb.nph: ; preds = %entry ; CHECK: BB#1 -; CHECK: ldr.n r2, LCPI0_0 +; CHECK: movw r2, :lower16:L_GV$non_lazy_ptr +; CHECK: movt r2, :upper16:L_GV$non_lazy_ptr ; CHECK: ldr r2, [r2] ; CHECK: ldr r3, [r2] ; CHECK: LBB0_2 -; CHECK: LCPI0_0: -; CHECK-NOT: LCPI0_1: +; CHECK-NOT: LCPI0_0: ; PIC: BB#1 -; PIC: ldr.n r2, LCPI0_0 +; PIC: movw r2, :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4)) +; PIC: movt r2, :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: add r2, pc ; PIC: ldr r2, [r2] ; PIC: ldr r3, [r2] ; PIC: LBB0_2 -; PIC: LCPI0_0: -; PIC-NOT: LCPI0_1: +; PIC-NOT: LCPI0_0: ; PIC: .section %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] br label %bb @@ -55,8 +52,8 @@ return: ; preds = %bb, %entry define void @t2(i8* %ptr1, i8* %ptr2) nounwind { entry: ; CHECK: t2: -; CHECK: adr r{{.}}, #LCPI1_0 -; CHECK: vldmia r3, {d0, d1} +; CHECK: mov.w r3, #1065353216 +; CHECK: vdup.32 q{{.*}}, r3 br i1 undef, label %bb1, label %bb2 bb1: @@ -76,11 +73,50 @@ bb2: ret void } -; CHECK: LCPI1_0: -; CHECK: .section +; CHECK-NOT: LCPI1_0: declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone + +; rdar://8241368 +; isel should not fold immediate into eor's which would have prevented LICM. +define zeroext i16 @t3(i8 zeroext %data, i16 zeroext %crc) nounwind readnone { +; CHECK: t3: +bb.nph: +; CHECK: bb.nph +; CHECK: movw {{(r[0-9])|(lr)}}, #32768 +; CHECK: movs {{(r[0-9])|(lr)}}, #8 +; CHECK: movw [[REGISTER:(r[0-9])|(lr)]], #16386 +; CHECK: movw {{(r[0-9])|(lr)}}, #65534 +; CHECK: movt {{(r[0-9])|(lr)}}, #65535 + br label %bb + +bb: ; preds = %bb, %bb.nph +; CHECK: bb +; CHECK: eor.w {{(r[0-9])|(lr)}}, {{(r[0-9])|(lr)}}, [[REGISTER]] +; CHECK: eor.w +; CHECK-NOT: eor +; CHECK: and + %data_addr.013 = phi i8 [ %data, %bb.nph ], [ %8, %bb ] ; <i8> [#uses=2] + %crc_addr.112 = phi i16 [ %crc, %bb.nph ], [ %crc_addr.2, %bb ] ; <i16> [#uses=3] + %i.011 = phi i8 [ 0, %bb.nph ], [ %7, %bb ] ; <i8> [#uses=1] + %0 = trunc i16 %crc_addr.112 to i8 ; <i8> [#uses=1] + %1 = xor i8 %data_addr.013, %0 ; <i8> [#uses=1] + %2 = and i8 %1, 1 ; <i8> [#uses=1] + %3 = icmp eq i8 %2, 0 ; <i1> [#uses=2] + %4 = xor i16 %crc_addr.112, 16386 ; <i16> [#uses=1] + %crc_addr.0 = select i1 %3, i16 %crc_addr.112, i16 %4 ; <i16> [#uses=1] + %5 = lshr i16 %crc_addr.0, 1 ; <i16> [#uses=2] + %6 = or i16 %5, -32768 ; <i16> [#uses=1] + %crc_addr.2 = select i1 %3, i16 %5, i16 %6 ; <i16> [#uses=2] + %7 = add i8 %i.011, 1 ; <i8> [#uses=2] + %8 = lshr i8 %data_addr.013, 1 ; <i8> [#uses=1] + %exitcond = icmp eq i8 %7, 8 ; <i1> [#uses=1] + br i1 %exitcond, label %bb8, label %bb + +bb8: ; preds = %bb + ret i16 %crc_addr.2 +} diff --git a/test/CodeGen/Thumb2/thumb2-badreg-operands.ll b/test/CodeGen/Thumb2/thumb2-badreg-operands.ll deleted file mode 100644 index 4df06b836fc5..000000000000 --- a/test/CodeGen/Thumb2/thumb2-badreg-operands.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 | FileCheck %s - -define void @b(i32 %x) nounwind optsize { -entry: -; CHECK: b -; CHECK: mov r2, sp -; CHECK: mls r0, r0, r1, r2 -; CHECK: mov sp, r0 - %0 = mul i32 %x, 24 ; <i32> [#uses=1] - %vla = alloca i8, i32 %0, align 1 ; <i8*> [#uses=1] - call arm_aapcscc void @a(i8* %vla) nounwind optsize - ret void -} - -declare void @a(i8*) optsize diff --git a/test/CodeGen/Thumb2/thumb2-barrier.ll b/test/CodeGen/Thumb2/thumb2-barrier.ll index a54d09e62919..93ae7c428bdf 100644 --- a/test/CodeGen/Thumb2/thumb2-barrier.ll +++ b/test/CodeGen/Thumb2/thumb2-barrier.ll @@ -1,17 +1,31 @@ ; RUN: llc < %s -march=thumb -mcpu=cortex-a8 | FileCheck %s -declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1 ) +declare void @llvm.memory.barrier(i1 , i1 , i1 , i1 , i1) -define void @t1() { -; CHECK: t1: -; CHECK: dsb - call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 true ) +define void @t_st() { +; CHECK: t_st: +; CHECK: dmb st + call void @llvm.memory.barrier(i1 false, i1 false, i1 false, i1 true, i1 true) ret void } -define void @t2() { -; CHECK: t2: -; CHECK: dmb - call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 false ) +define void @t_sy() { +; CHECK: t_sy: +; CHECK: dmb sy + call void @llvm.memory.barrier(i1 true, i1 false, i1 false, i1 true, i1 true) + ret void +} + +define void @t_ishst() { +; CHECK: t_ishst: +; CHECK: dmb ishst + call void @llvm.memory.barrier(i1 false, i1 false, i1 false, i1 true, i1 false) + ret void +} + +define void @t_ish() { +; CHECK: t_ish: +; CHECK: dmb ish + call void @llvm.memory.barrier(i1 true, i1 false, i1 false, i1 true, i1 false) ret void } diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt3.ll b/test/CodeGen/Thumb2/thumb2-ifcvt3.ll index cc2ef140d113..bcf10eff729b 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt3.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt3.ll @@ -23,7 +23,6 @@ bb52: ; preds = %newFuncRoot ; CHECK: movne ; CHECK: moveq ; CHECK: pop -; CHECK-NEXT: @ BB#1: %0 = load i64* @posed, align 4 ; <i64> [#uses=3] %1 = sub i64 %0, %.reload78 ; <i64> [#uses=1] %2 = ashr i64 %1, 1 ; <i64> [#uses=3] diff --git a/test/CodeGen/Thumb2/thumb2-ldrd.ll b/test/CodeGen/Thumb2/thumb2-ldrd.ll index 22d4e88ed17d..a747d5f75697 100644 --- a/test/CodeGen/Thumb2/thumb2-ldrd.ll +++ b/test/CodeGen/Thumb2/thumb2-ldrd.ll @@ -4,7 +4,7 @@ define i64 @t(i64 %a) nounwind readonly { entry: -;CHECK: ldrd r2, [r2] +;CHECK: ldrd r2, r3, [r2] %0 = load i64** @b, align 4 %1 = load i64* %0, align 4 %2 = mul i64 %1, %a diff --git a/test/CodeGen/Thumb2/thumb2-mov.ll b/test/CodeGen/Thumb2/thumb2-mov.ll index 1dc3614993bd..adb6dde2c788 100644 --- a/test/CodeGen/Thumb2/thumb2-mov.ll +++ b/test/CodeGen/Thumb2/thumb2-mov.ll @@ -53,7 +53,7 @@ define i32 @t2_const_var2_2_ok_1(i32 %lhs) { define i32 @t2_const_var2_2_ok_2(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_2: -;CHECK: add.w r0, r0, #-1426063360 +;CHECK: add.w r0, r0, #2868903936 ;CHECK: add.w r0, r0, #47616 %ret = add i32 %lhs, 2868951552 ; 0xab00ba00 ret i32 %ret @@ -61,7 +61,7 @@ define i32 @t2_const_var2_2_ok_2(i32 %lhs) { define i32 @t2_const_var2_2_ok_3(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_3: -;CHECK: add.w r0, r0, #-1426019584 +;CHECK: add.w r0, r0, #2868947712 ;CHECK: adds r0, #16 %ret = add i32 %lhs, 2868947728 ; 0xab00ab10 ret i32 %ret @@ -69,7 +69,7 @@ define i32 @t2_const_var2_2_ok_3(i32 %lhs) { define i32 @t2_const_var2_2_ok_4(i32 %lhs) { ;CHECK: t2_const_var2_2_ok_4: -;CHECK: add.w r0, r0, #-1426019584 +;CHECK: add.w r0, r0, #2868947712 ;CHECK: add.w r0, r0, #1048592 %ret = add i32 %lhs, 2869996304 ; 0xab10ab10 ret i32 %ret diff --git a/test/CodeGen/Thumb2/thumb2-mul.ll b/test/CodeGen/Thumb2/thumb2-mul.ll index b1515b514820..8d1de55b4dc6 100644 --- a/test/CodeGen/Thumb2/thumb2-mul.ll +++ b/test/CodeGen/Thumb2/thumb2-mul.ll @@ -6,3 +6,21 @@ define i32 @f1(i32 %a, i32 %b, i32 %c) { %tmp = mul i32 %a, %b ret i32 %tmp } + +%struct.CMPoint = type { %struct.Point, float, float, [5 x float] } +%struct.Point = type { float, float } + +define %struct.CMPoint* @t1(i32 %i, i32 %j, i32 %n, %struct.CMPoint* %thePoints) nounwind readnone ssp { +entry: +; CHECK: t1: +; CHECK: mla r0, r2, r0, r1 +; CHECK: add.w r0, r0, r0, lsl #3 +; CHECL: add.w r0, r3, r0, lsl #2 + %mul = mul i32 %n, %i + %add = add i32 %mul, %j + %0 = ptrtoint %struct.CMPoint* %thePoints to i32 + %mul5 = mul i32 %add, 36 + %add6 = add i32 %mul5, %0 + %1 = inttoptr i32 %add6 to %struct.CMPoint* + ret %struct.CMPoint* %1 +} diff --git a/test/CodeGen/Thumb2/thumb2-select_xform.ll b/test/CodeGen/Thumb2/thumb2-select_xform.ll index 56cb1f6fb409..ceefabbbfa21 100644 --- a/test/CodeGen/Thumb2/thumb2-select_xform.ll +++ b/test/CodeGen/Thumb2/thumb2-select_xform.ll @@ -2,8 +2,8 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK: t1 -; CHECK: sub.w r0, r1, #-2147483648 -; CHECK: subs r0, #1 +; CHECK: mvn r0, #-2147483648 +; CHECK: add r0, r1 ; CHECK: cmp r2, #10 ; CHECK: it gt ; CHECK: movgt r0, r1 diff --git a/test/CodeGen/Thumb2/thumb2-spill-q.ll b/test/CodeGen/Thumb2/thumb2-spill-q.ll index 4f92c9333806..d9a0617f5a46 100644 --- a/test/CodeGen/Thumb2/thumb2-spill-q.ll +++ b/test/CodeGen/Thumb2/thumb2-spill-q.ll @@ -15,11 +15,34 @@ define void @aaa(%quuz* %this, i8* %block) { ; CHECK: vst1.64 {{.*}}[{{.*}}, :128] ; CHECK: vld1.64 {{.*}}[{{.*}}, :128] entry: - %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] + %aligned_vec = alloca <4 x float>, align 16 + %"alloca point" = bitcast i32 0 to i32 + %vecptr = bitcast <4 x float>* %aligned_vec to i8* + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %vecptr, i32 1) nounwind store float 6.300000e+01, float* undef, align 4 %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 0.000000e+00, float* undef, align 4 %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] + %ld3 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld4 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld5 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld6 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld7 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld8 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld9 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld10 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld11 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 + %ld12 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind + store float 0.000000e+00, float* undef, align 4 %val173 = load <4 x float>* undef ; <<4 x float>> [#uses=1] br label %bb4 @@ -44,7 +67,16 @@ bb4: ; preds = %bb193, %entry %18 = fmul <4 x float> %17, %val173 ; <<4 x float>> [#uses=1] %19 = shufflevector <4 x float> %18, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1] %20 = shufflevector <2 x float> %19, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] - %21 = fadd <4 x float> zeroinitializer, %20 ; <<4 x float>> [#uses=2] + %tmp1 = fadd <4 x float> %20, %ld3 + %tmp2 = fadd <4 x float> %tmp1, %ld4 + %tmp3 = fadd <4 x float> %tmp2, %ld5 + %tmp4 = fadd <4 x float> %tmp3, %ld6 + %tmp5 = fadd <4 x float> %tmp4, %ld7 + %tmp6 = fadd <4 x float> %tmp5, %ld8 + %tmp7 = fadd <4 x float> %tmp6, %ld9 + %tmp8 = fadd <4 x float> %tmp7, %ld10 + %tmp9 = fadd <4 x float> %tmp8, %ld11 + %21 = fadd <4 x float> %tmp9, %ld12 %22 = fcmp ogt <4 x float> %besterror.0.2264, %21 ; <<4 x i1>> [#uses=0] %tmp = extractelement <4 x i1> %22, i32 0 br i1 %tmp, label %bb193, label %bb186 diff --git a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll index c39b82a1fe36..a662dd58df57 100644 --- a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll +++ b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -o - -march=x86 -mattr=+mmx | FileCheck %s +; There are no MMX instructions here. We use add+adcl for the adds. define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) nounwind { entry: @@ -7,9 +8,8 @@ entry: bb26: ; preds = %bb26, %entry -; CHECK: movq ({{.*}},8), %mm -; CHECK: paddq ({{.*}},8), %mm -; CHECK: paddq %mm{{[0-7]}}, %mm +; CHECK: addl %e +; CHECK: adcl %e %i.037.0 = phi i32 [ 0, %entry ], [ %tmp25, %bb26 ] ; <i32> [#uses=3] %sum.035.0 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1] @@ -27,3 +27,38 @@ bb31: ; preds = %bb26, %entry %sum.035.1 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1] ret <1 x i64> %sum.035.1 } + + +; This is the original test converted to use MMX intrinsics. + +define <1 x i64> @unsigned_add3a(x86_mmx* %a, x86_mmx* %b, i32 %count) nounwind { +entry: + %tmp2943 = bitcast <1 x i64><i64 0> to x86_mmx + %tmp2942 = icmp eq i32 %count, 0 ; <i1> [#uses=1] + br i1 %tmp2942, label %bb31, label %bb26 + +bb26: ; preds = %bb26, %entry + +; CHECK: movq ({{.*}},8), %mm +; CHECK: paddq ({{.*}},8), %mm +; CHECK: paddq %mm{{[0-7]}}, %mm + + %i.037.0 = phi i32 [ 0, %entry ], [ %tmp25, %bb26 ] ; <i32> [#uses=3] + %sum.035.0 = phi x86_mmx [ %tmp2943, %entry ], [ %tmp22, %bb26 ] ; <x86_mmx> [#uses=1] + %tmp13 = getelementptr x86_mmx* %b, i32 %i.037.0 ; <x86_mmx*> [#uses=1] + %tmp14 = load x86_mmx* %tmp13 ; <x86_mmx> [#uses=1] + %tmp18 = getelementptr x86_mmx* %a, i32 %i.037.0 ; <x86_mmx*> [#uses=1] + %tmp19 = load x86_mmx* %tmp18 ; <x86_mmx> [#uses=1] + %tmp21 = call x86_mmx @llvm.x86.mmx.padd.q (x86_mmx %tmp19, x86_mmx %tmp14) ; <x86_mmx> [#uses=1] + %tmp22 = call x86_mmx @llvm.x86.mmx.padd.q (x86_mmx %tmp21, x86_mmx %sum.035.0) ; <x86_mmx> [#uses=2] + %tmp25 = add i32 %i.037.0, 1 ; <i32> [#uses=2] + %tmp29 = icmp ult i32 %tmp25, %count ; <i1> [#uses=1] + br i1 %tmp29, label %bb26, label %bb31 + +bb31: ; preds = %bb26, %entry + %sum.035.1 = phi x86_mmx [ %tmp2943, %entry ], [ %tmp22, %bb26 ] ; <x86_mmx> [#uses=1] + %t = bitcast x86_mmx %sum.035.1 to <1 x i64> + ret <1 x i64> %t +} + +declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx) diff --git a/test/CodeGen/X86/2007-05-15-maskmovq.ll b/test/CodeGen/X86/2007-05-15-maskmovq.ll index 2093b8f68744..006cf2e43a2f 100644 --- a/test/CodeGen/X86/2007-05-15-maskmovq.ll +++ b/test/CodeGen/X86/2007-05-15-maskmovq.ll @@ -5,10 +5,10 @@ target triple = "i686-apple-darwin8" define void @test(<1 x i64> %c64, <1 x i64> %mask1, i8* %P) { entry: - %tmp4 = bitcast <1 x i64> %mask1 to <8 x i8> ; <<8 x i8>> [#uses=1] - %tmp6 = bitcast <1 x i64> %c64 to <8 x i8> ; <<8 x i8>> [#uses=1] - tail call void @llvm.x86.mmx.maskmovq( <8 x i8> %tmp6, <8 x i8> %tmp4, i8* %P ) + %tmp4 = bitcast <1 x i64> %mask1 to x86_mmx ; <x86_mmx> [#uses=1] + %tmp6 = bitcast <1 x i64> %c64 to x86_mmx ; <x86_mmx> [#uses=1] + tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp4, x86_mmx %tmp6, i8* %P ) ret void } -declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*) +declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*) diff --git a/test/CodeGen/X86/2007-06-15-IntToMMX.ll b/test/CodeGen/X86/2007-06-15-IntToMMX.ll index 6128d8b92d11..660d4fe7b19e 100644 --- a/test/CodeGen/X86/2007-06-15-IntToMMX.ll +++ b/test/CodeGen/X86/2007-06-15-IntToMMX.ll @@ -1,17 +1,16 @@ ; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep paddusw -@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] +@R = external global x86_mmx ; <x86_mmx*> [#uses=1] define void @foo(<1 x i64> %A, <1 x i64> %B) { entry: - %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1] - %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1] - %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1] - %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1] - store <1 x i64> %tmp8, <1 x i64>* @R + %tmp2 = bitcast <1 x i64> %A to x86_mmx + %tmp3 = bitcast <1 x i64> %B to x86_mmx + %tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp2, x86_mmx %tmp3 ) ; <x86_mmx> [#uses=1] + store x86_mmx %tmp7, x86_mmx* @R tail call void @llvm.x86.mmx.emms( ) ret void } -declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) +declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx) declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll index 2c513f17811a..1c5e6766fd6e 100644 --- a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll +++ b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll @@ -2,19 +2,17 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rdi, %mm1} ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {paddusw %mm0, %mm1} -@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] +@R = external global x86_mmx ; <x86_mmx*> [#uses=1] define void @foo(<1 x i64> %A, <1 x i64> %B) nounwind { entry: - %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1] - %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1] - %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1] - %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1] - store <1 x i64> %tmp8, <1 x i64>* @R + %tmp4 = bitcast <1 x i64> %B to x86_mmx ; <<4 x i16>> [#uses=1] + %tmp6 = bitcast <1 x i64> %A to x86_mmx ; <<4 x i16>> [#uses=1] + %tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp6, x86_mmx %tmp4 ) ; <x86_mmx> [#uses=1] + store x86_mmx %tmp7, x86_mmx* @R tail call void @llvm.x86.mmx.emms( ) ret void } -declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) - +declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx) declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/2007-10-16-fp80_select.ll b/test/CodeGen/X86/2007-10-16-fp80_select.ll deleted file mode 100644 index 3f9845c3c3ec..000000000000 --- a/test/CodeGen/X86/2007-10-16-fp80_select.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: llc < %s -march=x86 -; ModuleID = 'bugpoint-reduced-simplified.bc' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i686-apple-darwin9" - %struct.wxPoint2DInt = type { i32, i32 } - -define x86_fp80 @_ZNK12wxPoint2DInt14GetVectorAngleEv(%struct.wxPoint2DInt* %this) { -entry: - br i1 false, label %cond_true, label %UnifiedReturnBlock - -cond_true: ; preds = %entry - %tmp8 = load i32* null, align 4 ; <i32> [#uses=1] - %tmp9 = icmp sgt i32 %tmp8, -1 ; <i1> [#uses=1] - %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 ; <x86_fp80> [#uses=1] - ret x86_fp80 %retval - -UnifiedReturnBlock: ; preds = %entry - ret x86_fp80 0xK4005B400000000000000 -} diff --git a/test/CodeGen/X86/2008-02-18-TailMergingBug.ll b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll index 7463a0eebf34..bdacf5071128 100644 --- a/test/CodeGen/X86/2008-02-18-TailMergingBug.ll +++ b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& grep {Number of block tails merged} | grep 9 +; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& grep {Number of block tails merged} | grep 16 ; PR1909 @.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll b/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll index dc8c097efc50..5089e8c5b69d 100644 --- a/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll +++ b/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll @@ -5,15 +5,15 @@ entry: tail call void asm sideeffect "# top of block", "~{dirflag},~{fpsr},~{flags},~{di},~{si},~{dx},~{cx},~{ax}"( ) nounwind tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind tail call void asm sideeffect ".line 8", "~{dirflag},~{fpsr},~{flags}"( ) nounwind - %tmp1 = tail call <2 x i32> asm sideeffect "movd $1, $0", "=={mm4},{bp},~{dirflag},~{fpsr},~{flags},~{memory}"( i32 undef ) nounwind ; <<2 x i32>> [#uses=1] + %tmp1 = tail call x86_mmx asm sideeffect "movd $1, $0", "=={mm4},{bp},~{dirflag},~{fpsr},~{flags},~{memory}"( i32 undef ) nounwind ; <x86_mmx> [#uses=1] tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind tail call void asm sideeffect ".line 9", "~{dirflag},~{fpsr},~{flags}"( ) nounwind - %tmp3 = tail call i32 asm sideeffect "movd $1, $0", "=={bp},{mm3},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> undef ) nounwind ; <i32> [#uses=1] + %tmp3 = tail call i32 asm sideeffect "movd $1, $0", "=={bp},{mm3},~{dirflag},~{fpsr},~{flags},~{memory}"( x86_mmx undef ) nounwind ; <i32> [#uses=1] tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind tail call void asm sideeffect ".line 10", "~{dirflag},~{fpsr},~{flags}"( ) nounwind - tail call void asm sideeffect "movntq $0, 0($1,$2)", "{mm0},{di},{bp},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> undef, i32 undef, i32 %tmp3 ) nounwind + tail call void asm sideeffect "movntq $0, 0($1,$2)", "{mm0},{di},{bp},~{dirflag},~{fpsr},~{flags},~{memory}"( x86_mmx undef, i32 undef, i32 %tmp3 ) nounwind tail call void asm sideeffect ".file \224443946.c\22", "~{dirflag},~{fpsr},~{flags}"( ) nounwind tail call void asm sideeffect ".line 11", "~{dirflag},~{fpsr},~{flags}"( ) nounwind - %tmp8 = tail call i32 asm sideeffect "movd $1, $0", "=={bp},{mm4},~{dirflag},~{fpsr},~{flags},~{memory}"( <2 x i32> %tmp1 ) nounwind ; <i32> [#uses=0] + %tmp8 = tail call i32 asm sideeffect "movd $1, $0", "=={bp},{mm4},~{dirflag},~{fpsr},~{flags},~{memory}"( x86_mmx %tmp1 ) nounwind ; <i32> [#uses=0] ret i32 undef } diff --git a/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll b/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll index 500cd1f08cfa..86652826aeac 100644 --- a/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll +++ b/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 5 -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movl | count 2 +; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep movsd | count 5 +; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep movl | count 2 @atomic = global double 0.000000e+00 ; <double*> [#uses=1] @atomic2 = global double 0.000000e+00 ; <double*> [#uses=1] diff --git a/test/CodeGen/X86/2008-07-19-movups-spills.ll b/test/CodeGen/X86/2008-07-19-movups-spills.ll index 98919ee5221a..cf04dcf0f18c 100644 --- a/test/CodeGen/X86/2008-07-19-movups-spills.ll +++ b/test/CodeGen/X86/2008-07-19-movups-spills.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75 -; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 1 +; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 75 ; PR2539 +; PR8969 - make 32-bit linux have a 16-byte aligned stack external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2] external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1] diff --git a/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll b/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll index c76dd7de1256..53402c04511c 100644 --- a/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll +++ b/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll @@ -17,11 +17,13 @@ entry: br i1 false, label %bb.nph144.split, label %bb133 bb.nph144.split: ; preds = %entry - tail call void @llvm.x86.mmx.maskmovq( <8 x i8> zeroinitializer, <8 x i8> zeroinitializer, i8* null ) nounwind + %tmp = bitcast <8 x i8> zeroinitializer to x86_mmx + %tmp2 = bitcast <8 x i8> zeroinitializer to x86_mmx + tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp, x86_mmx %tmp2, i8* null ) nounwind unreachable bb133: ; preds = %entry ret void } -declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*) nounwind +declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*) nounwind diff --git a/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll b/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll index 60be0d51e7e7..2dc1deaf1738 100644 --- a/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll +++ b/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll @@ -1,6 +1,9 @@ +; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | grep unpcklpd +; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | grep unpckhpd ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1 -; PR2687 +; originally from PR2687, but things don't work that way any more. +; there are no MMX instructions here; we use XMM. define <2 x double> @a(<2 x i32> %x) nounwind { entry: @@ -13,3 +16,20 @@ entry: %y = fptosi <2 x double> %x to <2 x i32> ret <2 x i32> %y } + +; This is how to get MMX instructions. + +define <2 x double> @a2(x86_mmx %x) nounwind { +entry: + %y = tail call <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx %x) + ret <2 x double> %y +} + +define x86_mmx @b2(<2 x double> %x) nounwind { +entry: + %y = tail call x86_mmx @llvm.x86.sse.cvttpd2pi (<2 x double> %x) + ret x86_mmx %y +} + +declare <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx) +declare x86_mmx @llvm.x86.sse.cvttpd2pi(<2 x double>) diff --git a/test/CodeGen/X86/2008-09-17-inline-asm-1.ll b/test/CodeGen/X86/2008-09-17-inline-asm-1.ll index 3c64fe45c997..86e50c98bfdb 100644 --- a/test/CodeGen/X86/2008-09-17-inline-asm-1.ll +++ b/test/CodeGen/X86/2008-09-17-inline-asm-1.ll @@ -15,14 +15,16 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" -@x = common global i32 0 ; <i32*> [#uses=1] +@x = common global i32 0 define i32 @aci(i32* %pw) nounwind { entry: - %0 = load i32* @x, align 4 ; <i32> [#uses=1] - %asmtmp = tail call { i32, i32 } asm "movl $0, %eax\0A\090:\0A\09test %eax, %eax\0A\09je 1f\0A\09movl %eax, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{ax},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind ; <{ i32, i32 }> [#uses=0] - %asmtmp2 = tail call { i32, i32 } asm "movl $0, %edx\0A\090:\0A\09test %edx, %edx\0A\09je 1f\0A\09movl %edx, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{dx},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind ; <{ i32, i32 }> [#uses=1] - %asmresult3 = extractvalue { i32, i32 } %asmtmp2, 0 ; <i32> [#uses=1] - %1 = add i32 %asmresult3, %0 ; <i32> [#uses=1] - ret i32 %1 + %0 = load i32* @x, align 4 + %asmtmp = tail call { i32, i32 } asm "movl $0, %eax\0A\090:\0A\09test %eax, %eax\0A\09je 1f\0A\09movl %eax, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{ax},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind + %asmtmp2 = tail call { i32, i32 } asm "movl $0, %edx\0A\090:\0A\09test %edx, %edx\0A\09je 1f\0A\09movl %edx, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{dx},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind + %asmresult2 = extractvalue { i32, i32 } %asmtmp, 0 + %asmresult3 = extractvalue { i32, i32 } %asmtmp2, 0 + %1 = add i32 %asmresult2, %asmresult3 + %2 = add i32 %0, %1 + ret i32 %2 } diff --git a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll index afeb358da572..9d144a4be0e9 100644 --- a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills} +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats |& FileCheck %s +; Now this test spills one register. But a reload in the loop is cheaper than +; the divsd so it's a win. define fastcc void @fourn(double* %data, i32 %isign) nounwind { +; CHECK: fourn entry: br label %bb @@ -11,6 +14,11 @@ bb: ; preds = %bb, %entry %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1] br i1 %1, label %bb30.loopexit, label %bb +; CHECK: %bb30.loopexit +; CHECK: divsd %xmm0 +; CHECK: movsd %xmm0, 16(%esp) +; CHECK: .align +; CHECK-NEXT: %bb3 bb3: ; preds = %bb30.loopexit, %bb25, %bb3 %2 = load i32* null, align 4 ; <i32> [#uses=1] %3 = mul i32 %2, 0 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2008-10-27-StackRealignment.ll b/test/CodeGen/X86/2008-10-27-StackRealignment.ll index 784bc72f42e9..3d0766cde845 100644 --- a/test/CodeGen/X86/2008-10-27-StackRealignment.ll +++ b/test/CodeGen/X86/2008-10-27-StackRealignment.ll @@ -1,8 +1,8 @@ ; Linux doesn't support stack realignment for functions with allocas (PR2888). ; Until it does, we shouldn't use movaps to access the stack. On targets with ; sufficiently aligned stack (e.g. darwin) we should. - -; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mcpu=yonah | not grep movaps +; PR8969 - make 32-bit linux have a 16-byte aligned stack +; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mcpu=yonah | grep movaps | count 2 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mcpu=yonah | grep movaps | count 2 diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll deleted file mode 100644 index 2e114ab5ae88..000000000000 --- a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985 | count 1 -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" - -define zeroext i16 @a(i16 zeroext %x) nounwind { -entry: - %div = udiv i16 %x, 33 ; <i32> [#uses=1] - ret i16 %div -} diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll deleted file mode 100644 index 7c811afa51d3..000000000000 --- a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985 -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" - -define signext i16 @a(i16 signext %x) nounwind { -entry: - %div = sdiv i16 %x, 33 ; <i32> [#uses=1] - ret i16 %div -} diff --git a/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll b/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll index 9c71469b5b20..4feb764bec6b 100644 --- a/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll +++ b/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx -enable-legalize-types-checking +; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-legalize-types-checking declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone diff --git a/test/CodeGen/X86/2009-01-27-NullStrings.ll b/test/CodeGen/X86/2009-01-27-NullStrings.ll index 8684f4a19ca4..8b3094be4b06 100644 --- a/test/CodeGen/X86/2009-01-27-NullStrings.ll +++ b/test/CodeGen/X86/2009-01-27-NullStrings.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s ; CHECK: .section __TEXT,__cstring,cstring_literals -@x = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] +@x = internal unnamed_addr constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] @y = global [1 x i8]* @x diff --git a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll index bb01e5afceff..0b5b7bdd94d7 100644 --- a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll +++ b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {6 machine-licm} +; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {8 machine-licm} ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 | FileCheck %s ; rdar://6627786 ; rdar://7792037 diff --git a/test/CodeGen/X86/2009-04-24.ll b/test/CodeGen/X86/2009-04-24.ll index 757042e5be42..dd8823574cde 100644 --- a/test/CodeGen/X86/2009-04-24.ll +++ b/test/CodeGen/X86/2009-04-24.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -relocation-model=pic > %t2 -; RUN: grep {leaq.*TLSGD.*__tls_get_addr} %t2 +; RUN: grep {leaq.*TLSGD} %t2 +; RUN; grep {__tls_get_addr} %t2 ; PR4004 @i = thread_local global i32 15 diff --git a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll index c5982285afe0..98b1e0ed2f42 100644 --- a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll +++ b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll @@ -1,9 +1,8 @@ -; RUN: llc < %s | grep "subq.*\\\$40, \\\%rsp" -target triple = "x86_64-pc-mingw64" +; RUN: llc -mtriple=x86_64-mingw32 < %s | FileCheck %s +; CHECK-NOT: -{{[1-9][0-9]*}}(%rsp) define x86_fp80 @a(i64 %x) nounwind readnone { entry: - %conv = sitofp i64 %x to x86_fp80 ; <x86_fp80> [#uses=1] - ret x86_fp80 %conv + %conv = sitofp i64 %x to x86_fp80 ; <x86_fp80> [#uses=1] + ret x86_fp80 %conv } - diff --git a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll index 810a6f4d6c65..12bd28518762 100644 --- a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll +++ b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll @@ -1,12 +1,10 @@ -; RUN: llc < %s -o %t1 -; RUN: grep "subq.*\\\$72, \\\%rsp" %t1 -; RUN: grep "movaps \\\%xmm8, 32\\\(\\\%rsp\\\)" %t1 -; RUN: grep "movaps \\\%xmm7, 48\\\(\\\%rsp\\\)" %t1 -target triple = "x86_64-pc-mingw64" +; RUN: llc -mtriple=x86_64-mingw32 < %s | FileCheck %s +; CHECK: subq $40, %rsp +; CHECK: movaps %xmm8, (%rsp) +; CHECK: movaps %xmm7, 16(%rsp) define i32 @a() nounwind { entry: - tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind - ret i32 undef + tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind + ret i32 undef } - diff --git a/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll b/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll index 336f17e2a325..01852a6eca1f 100644 --- a/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll +++ b/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movl +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | not grep movl define <8 x i8> @a(i8 zeroext %x) nounwind { %r = insertelement <8 x i8> undef, i8 %x, i32 0 diff --git a/test/CodeGen/X86/2009-07-07-SplitICmp.ll b/test/CodeGen/X86/2009-07-07-SplitICmp.ll index eb9378b9527b..366985678e54 100644 --- a/test/CodeGen/X86/2009-07-07-SplitICmp.ll +++ b/test/CodeGen/X86/2009-07-07-SplitICmp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-mmx +; RUN: llc < %s -march=x86 define void @test2(<2 x i32> %A, <2 x i32> %B, <2 x i32>* %C) nounwind { %D = icmp sgt <2 x i32> %A, %B diff --git a/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll b/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll index b9b09a3f0004..288eef4f6991 100644 --- a/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll +++ b/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll @@ -1,10 +1,12 @@ ; RUN: llc < %s -march=x86-64 ; PR4669 -declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32) +declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) define <1 x i64> @test(i64 %t) { entry: %t1 = insertelement <1 x i64> undef, i64 %t, i32 0 - %t2 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %t1, i32 48) - ret <1 x i64> %t2 + %t0 = bitcast <1 x i64> %t1 to x86_mmx + %t2 = tail call x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx %t0, i32 48) + %t3 = bitcast x86_mmx %t2 to <1 x i64> + ret <1 x i64> %t3 } diff --git a/test/CodeGen/X86/2009-08-06-inlineasm.ll b/test/CodeGen/X86/2009-08-06-inlineasm.ll index de32c2159ce1..f9b5f9e0b1fd 100644 --- a/test/CodeGen/X86/2009-08-06-inlineasm.ll +++ b/test/CodeGen/X86/2009-08-06-inlineasm.ll @@ -1,10 +1,12 @@ -; RUN: llc -mtriple=i386-pc-linux-gnu < %s +; RUN: false +; XRUN: llc -mtriple=i386-pc-linux-gnu < %s ; PR4668 ; XFAIL: * ; FIXME: If the coalescer happens to coalesce %level.1 with the copy to EAX ; (for ret) then this will fail to compile. The fundamental problem is ; once the coalescer fixes a virtual register to physical register we can't -; evict it. +; evict it. This started passing again due to the changes for PR8969 +; so I've disabled it with a bigger stick. define i32 @x(i32 %qscale) nounwind { entry: diff --git a/test/CodeGen/X86/2009-09-10-SpillComments.ll b/test/CodeGen/X86/2009-09-10-SpillComments.ll index f9ca861c558a..adac20336048 100644 --- a/test/CodeGen/X86/2009-09-10-SpillComments.ll +++ b/test/CodeGen/X86/2009-09-10-SpillComments.ll @@ -2,9 +2,9 @@ ; This test shouldn't require spills. -; CHECK: subq $8, %rsp +; CHECK: pushq ; CHECK-NOT: $rsp -; CHECK: addq $8, %rsp +; CHECK: popq %struct..0anon = type { i32 } %struct.rtvec_def = type { i32, [1 x %struct..0anon] } diff --git a/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll b/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll index f7ba661c4f75..823e0ca465ef 100644 --- a/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll +++ b/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll @@ -21,7 +21,7 @@ define void @leaf() nounwind { ; CHECK: leaf: ; CHECK-NOT: -8(%rsp) ; CHECK: leaq link_ptr@TLSGD -; CHECK: call __tls_get_addr@PLT +; CHECK: callq __tls_get_addr@PLT "file foo2.c, line 14, bb1": %p = alloca %test*, align 8 ; <%test**> [#uses=4] br label %"file foo2.c, line 14, bb2" diff --git a/test/CodeGen/X86/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/X86/2010-04-07-DbgValueOtherTargets.ll index 76cc1a497d3d..42f19b3ad86a 100644 --- a/test/CodeGen/X86/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/X86/2010-04-07-DbgValueOtherTargets.ll @@ -2,33 +2,27 @@ ; RUN: llc -O0 -march=x86-64 -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} diff --git a/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll b/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll index 4cd3be35e820..fa3d5fbcdc48 100644 --- a/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll +++ b/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s +; There are no MMX operations here, so we use XMM or i64. define void @ti8(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <8 x i8> -; CHECK: movdq2q %tmp2 = bitcast double %b to <8 x i8> -; CHECK: movdq2q %tmp3 = add <8 x i8> %tmp1, %tmp2 +; CHECK: paddb %xmm1, %xmm0 store <8 x i8> %tmp3, <8 x i8>* null ret void } @@ -14,10 +14,9 @@ entry: define void @ti16(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <4 x i16> -; CHECK: movdq2q %tmp2 = bitcast double %b to <4 x i16> -; CHECK: movdq2q %tmp3 = add <4 x i16> %tmp1, %tmp2 +; CHECK: paddw %xmm1, %xmm0 store <4 x i16> %tmp3, <4 x i16>* null ret void } @@ -25,10 +24,9 @@ entry: define void @ti32(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <2 x i32> -; CHECK: movdq2q %tmp2 = bitcast double %b to <2 x i32> -; CHECK: movdq2q %tmp3 = add <2 x i32> %tmp1, %tmp2 +; CHECK: paddd %xmm1, %xmm0 store <2 x i32> %tmp3, <2 x i32>* null ret void } @@ -36,10 +34,60 @@ entry: define void @ti64(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <1 x i64> -; CHECK: movdq2q %tmp2 = bitcast double %b to <1 x i64> -; CHECK: movdq2q %tmp3 = add <1 x i64> %tmp1, %tmp2 +; CHECK: addq %rax, %rcx store <1 x i64> %tmp3, <1 x i64>* null ret void } + +; MMX intrinsics calls get us MMX instructions. + +define void @ti8a(double %a, double %b) nounwind { +entry: + %tmp1 = bitcast double %a to x86_mmx +; CHECK: movdq2q + %tmp2 = bitcast double %b to x86_mmx +; CHECK: movdq2q + %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %tmp1, x86_mmx %tmp2) + store x86_mmx %tmp3, x86_mmx* null + ret void +} + +define void @ti16a(double %a, double %b) nounwind { +entry: + %tmp1 = bitcast double %a to x86_mmx +; CHECK: movdq2q + %tmp2 = bitcast double %b to x86_mmx +; CHECK: movdq2q + %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %tmp1, x86_mmx %tmp2) + store x86_mmx %tmp3, x86_mmx* null + ret void +} + +define void @ti32a(double %a, double %b) nounwind { +entry: + %tmp1 = bitcast double %a to x86_mmx +; CHECK: movdq2q + %tmp2 = bitcast double %b to x86_mmx +; CHECK: movdq2q + %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %tmp1, x86_mmx %tmp2) + store x86_mmx %tmp3, x86_mmx* null + ret void +} + +define void @ti64a(double %a, double %b) nounwind { +entry: + %tmp1 = bitcast double %a to x86_mmx +; CHECK: movdq2q + %tmp2 = bitcast double %b to x86_mmx +; CHECK: movdq2q + %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %tmp1, x86_mmx %tmp2) + store x86_mmx %tmp3, x86_mmx* null + ret void +} + +declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx) diff --git a/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll b/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll index e20f1d8c79ce..3738f802e95a 100644 --- a/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll +++ b/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll @@ -11,7 +11,7 @@ target triple = "i386-apple-darwin10.0.0" ; Verify that %esi gets spilled before the call. ; CHECK: Z4test1SiS ; CHECK: movl %esi,{{.*}}(%ebp) -; CHECK: call __Z6throwsv +; CHECK: calll __Z6throwsv define i8* @_Z4test1SiS_(%struct.S* byval %s1, i32 %n, %struct.S* byval %s2) ssp { entry: diff --git a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll index d2115496f8f4..f9bda7f1007e 100644 --- a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll @@ -1,5 +1,8 @@ -; RUN: llc -march=x86-64 -O2 < %s | grep debug_loc12 -; Test to check .debug_loc support. This test case emits 13 debug_loc entries. +; RUN: llc -march=x86-64 -O2 < %s | FileCheck %s +; Test to check .debug_loc support. This test case emits many debug_loc entries. + +; CHECK: Loc expr size +; CHECK-NEXT: DW_OP_reg %0 = type { double } diff --git a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll index 13f72a99d2b2..60171eb62973 100644 --- a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll @@ -61,6 +61,6 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone ; CHECK-NEXT: .short 1 ; CHECK-NEXT: .byte 85 ; CHECK-NEXT: .quad Ltmp3 -; CHECK-NEXT: .quad Lfunc_end +; CHECK-NEXT: .quad Ltmp6 ; CHECK-NEXT: .short 1 ; CHECK-NEXT: .byte 83 diff --git a/test/CodeGen/X86/2010-05-28-Crash.ll b/test/CodeGen/X86/2010-05-28-Crash.ll index 80643d0792ac..ad8546ef8ce8 100644 --- a/test/CodeGen/X86/2010-05-28-Crash.ll +++ b/test/CodeGen/X86/2010-05-28-Crash.ll @@ -39,6 +39,6 @@ entry: !13 = metadata !{i32 7, i32 0, metadata !14, null} !14 = metadata !{i32 524299, metadata !8, i32 6, i32 0} ; [ DW_TAG_lexical_block ] -;CHECK: DEBUG_VALUE: bar:x <- EBX+0 -;CHECK-NEXT:Ltmp -;CHECK-NEXT: DEBUG_VALUE: foo:y <- 1+0 +;CHECK: DEBUG_VALUE: bar:x <- E +;CHECK: Ltmp +;CHECK: DEBUG_VALUE: foo:y <- 1+0 diff --git a/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll b/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll index c6421a247eaa..6db3ce1f42c0 100644 --- a/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll +++ b/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll @@ -1,4 +1,4 @@ -; RUN: llc -O1 -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim < %s | FileCheck %s +; RUN: llc -O1 -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -disable-fp-elim < %s | FileCheck %s ; <rdar://problem/8124405> %struct.type = type { %struct.subtype*, i32, i8, i32, i8, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, [256 x i32], i32, [257 x i32], [257 x i32], i32*, i16*, i8*, i32, i32, i32, i32, i32, [256 x i8], [16 x i8], [256 x i8], [4096 x i8], [16 x i32], [18002 x i8], [18002 x i8], [6 x [258 x i8]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, i32*, i32* } @@ -21,9 +21,9 @@ bb: ; statement. It can be an ADD or LEA instruction, it's not important which one ; it is. ; -; CHECK: ## %bb -; CHECK-NEXT: addq $64036, %rdi -; CHECK: rep;stosl +; CHECK: # %bb +; CHECK: addq $64036, %rdi +; CHECK: rep;stosl %tmp5 = bitcast i32* %tmp4 to i8* call void @llvm.memset.p0i8.i64(i8* %tmp5, i8 0, i64 84, i32 4, i1 false) diff --git a/test/CodeGen/X86/2010-07-02-asm-alignstack.ll b/test/CodeGen/X86/2010-07-02-asm-alignstack.ll index cb47d208dd44..0bbb24f6ecdf 100644 --- a/test/CodeGen/X86/2010-07-02-asm-alignstack.ll +++ b/test/CodeGen/X86/2010-07-02-asm-alignstack.ll @@ -3,7 +3,7 @@ define void @foo() nounwind ssp { entry: ; CHECK: foo -; CHECK: subq $8, %rsp +; CHECK: pushq ; CHECK: int $3 call void asm sideeffect alignstack "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind call void asm sideeffect alignstack ".file \22small.c\22", "~{dirflag},~{fpsr},~{flags}"() nounwind @@ -18,7 +18,7 @@ return: ; preds = %entry define void @bar() nounwind ssp { entry: ; CHECK: bar -; CHECK-NOT: subq $8, %rsp +; CHECK-NOT: pushq ; CHECK: int $3 call void asm sideeffect "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind call void asm sideeffect ".file \22small.c\22", "~{dirflag},~{fpsr},~{flags}"() nounwind diff --git a/test/CodeGen/X86/2010-09-16-EmptyFilename.ll b/test/CodeGen/X86/2010-09-16-EmptyFilename.ll new file mode 100644 index 000000000000..bed8c8a77b9a --- /dev/null +++ b/test/CodeGen/X86/2010-09-16-EmptyFilename.ll @@ -0,0 +1,29 @@ +; RUN: llc -O0 -mtriple=x86_64-apple-darwin10 < %s - | FileCheck %s +; Radar 8286101 +; CHECK: .file 2 "<stdin>" + +define i32 @foo() nounwind ssp { +entry: + ret i32 42, !dbg !8 +} + +define i32 @bar() nounwind ssp { +entry: + ret i32 21, !dbg !10 +} + +!llvm.dbg.sp = !{!0, !6} + +!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 53, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 524329, metadata !"", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 524305, i32 0, i32 12, metadata !"bug.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 114084)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 524324, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 524334, i32 0, metadata !7, metadata !"bar", metadata !"bar", metadata !"bar", metadata !7, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @bar} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 524329, metadata !"bug.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!8 = metadata !{i32 53, i32 13, metadata !9, null} +!9 = metadata !{i32 524299, metadata !0, i32 53, i32 11, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!10 = metadata !{i32 4, i32 13, metadata !11, null} +!11 = metadata !{i32 524299, metadata !12, i32 4, i32 13, metadata !7, i32 2} ; [ DW_TAG_lexical_block ] +!12 = metadata !{i32 524299, metadata !6, i32 4, i32 11, metadata !7, i32 1} ; [ DW_TAG_lexical_block ] diff --git a/test/CodeGen/X86/2010-09-16-asmcrash.ll b/test/CodeGen/X86/2010-09-16-asmcrash.ll new file mode 100644 index 000000000000..9bbd6919421f --- /dev/null +++ b/test/CodeGen/X86/2010-09-16-asmcrash.ll @@ -0,0 +1,56 @@ +; RUN: llc < %s -mtriple=x86_64-unknown-freebsd8.1 -o /dev/null +; This formerly crashed, PR 8154. + +module asm ".weak sem_close" +module asm ".equ sem_close, _sem_close" +module asm ".weak sem_destroy" +module asm ".equ sem_destroy, _sem_destroy" +module asm ".weak sem_getvalue" +module asm ".equ sem_getvalue, _sem_getvalue" +module asm ".weak sem_init" +module asm ".equ sem_init, _sem_init" +module asm ".weak sem_open" +module asm ".equ sem_open, _sem_open" +module asm ".weak sem_post" +module asm ".equ sem_post, _sem_post" +module asm ".weak sem_timedwait" +module asm ".equ sem_timedwait, _sem_timedwait" +module asm ".weak sem_trywait" +module asm ".equ sem_trywait, _sem_trywait" +module asm ".weak sem_unlink" +module asm ".equ sem_unlink, _sem_unlink" +module asm ".weak sem_wait" +module asm ".equ sem_wait, _sem_wait" + +%struct._sem = type { i32, %struct._usem } +%struct._usem = type { i32, i32, i32 } + +define void @_sem_timedwait(%struct._sem* noalias %sem) nounwind ssp { +entry: + br i1 undef, label %while.cond.preheader, label %sem_check_validity.exit + +while.cond.preheader: ; preds = %entry + %tmp4 = getelementptr inbounds %struct._sem* %sem, i64 0, i32 1, i32 1 + br label %while.cond + +sem_check_validity.exit: ; preds = %entry + ret void + +while.cond: ; preds = %while.body, %while.cond.preheader + br i1 undef, label %while.body, label %while.end + +while.body: ; preds = %while.cond + %0 = call i8 asm sideeffect "\09lock ; \09\09\09cmpxchgl $2,$1 ;\09 sete\09$0 ;\09\091:\09\09\09\09# atomic_cmpset_int", "={ax},=*m,r,{ax},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %tmp4, i32 undef, i32 undef, i32* %tmp4) nounwind, !srcloc !0 + br i1 undef, label %while.cond, label %return + +while.end: ; preds = %while.cond + br i1 undef, label %if.end18, label %return + +if.end18: ; preds = %while.end + unreachable + +return: ; preds = %while.end, %while.body + ret void +} + +!0 = metadata !{i32 158484} diff --git a/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll b/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll new file mode 100644 index 000000000000..8fe0309421e5 --- /dev/null +++ b/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s -combiner-alias-analysis -march=x86-64 | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.4" +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +define fastcc i32 @cli_magic_scandesc(i8* %in) nounwind ssp { +entry: + %a = alloca [64 x i8] + %b = getelementptr inbounds [64 x i8]* %a, i64 0, i32 0 + %c = getelementptr inbounds [64 x i8]* %a, i64 0, i32 30 + %d = load i8* %b, align 8 + %e = load i8* %c, align 8 + %f = bitcast [64 x i8]* %a to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %f, i8* %in, i64 64, i32 8, i1 false) nounwind + store i8 %d, i8* %b, align 8 + store i8 %e, i8* %c, align 8 + ret i32 0 +} + +; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %rax +; CHECK: movb 30(%rsp), %dl +; CHECK: movb (%rsp), %sil +; CHECK: movb %sil, (%rsp) +; CHECK: movb %dl, 30(%rsp) +; CHECK: callq ___stack_chk_fail diff --git a/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll b/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll new file mode 100644 index 000000000000..cae81d086ea1 --- /dev/null +++ b/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll @@ -0,0 +1,71 @@ +; RUN: llc -verify-machineinstrs -cgp-critical-edge-splitting=0 -mcpu=i386 < %s +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-pc-linux-gnu" + +; The bb.i basic block gets split while emitting the schedule because +; -mcpu=i386 doesn't have CMOV.' +; +; That causes the PHI to be updated wrong because the jumptable data structure is remembering the original MBB. +; +; -cgp-critical-edge-splitting=0 prevents the edge to PHI from being split. + +@.str146 = external constant [4 x i8], align 1 +@.str706 = external constant [4 x i8], align 1 +@.str1189 = external constant [5 x i8], align 1 + +declare i32 @memcmp(i8* nocapture, i8* nocapture, i32) nounwind readonly +declare i32 @strlen(i8* nocapture) nounwind readonly + +define hidden zeroext i8 @f(i8* %this, i8* %Name.0, i32 %Name.1, i8* noalias %NameLoc, i8* %Operands) nounwind align 2 { +bb.i: + %0 = icmp eq i8 undef, 0 + %iftmp.285.0 = select i1 %0, i8* getelementptr inbounds ([5 x i8]* @.str1189, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8]* @.str706, i32 0, i32 0) + %1 = call i32 @strlen(i8* %iftmp.285.0) nounwind readonly + switch i32 %Name.1, label %_ZNK4llvm12StringSwitchINS_9StringRefES1_E7DefaultERKS1_.exit [ + i32 3, label %bb1.i + i32 4, label %bb1.i1237 + i32 5, label %bb1.i1266 + i32 6, label %bb1.i1275 + i32 2, label %bb1.i1434 + i32 8, label %bb1.i1523 + i32 7, label %bb1.i1537 + ] + +bb1.i: ; preds = %bb.i + unreachable + +bb1.i1237: ; preds = %bb.i + br i1 undef, label %bb.i1820, label %bb1.i1241 + +bb1.i1241: ; preds = %bb1.i1237 + unreachable + +bb1.i1266: ; preds = %bb.i + unreachable + +bb1.i1275: ; preds = %bb.i + unreachable + +bb1.i1434: ; preds = %bb.i + unreachable + +bb1.i1523: ; preds = %bb.i + unreachable + +bb1.i1537: ; preds = %bb.i + unreachable + +bb.i1820: ; preds = %bb1.i1237 + br label %_ZNK4llvm12StringSwitchINS_9StringRefES1_E7DefaultERKS1_.exit + +_ZNK4llvm12StringSwitchINS_9StringRefES1_E7DefaultERKS1_.exit: ; preds = %bb.i1820, %bb.i + %PatchedName.0.0 = phi i8* [ undef, %bb.i1820 ], [ %Name.0, %bb.i ] + br i1 undef, label %bb141, label %_ZNK4llvm9StringRef10startswithES0_.exit + +_ZNK4llvm9StringRef10startswithES0_.exit: ; preds = %_ZNK4llvm12StringSwitchINS_9StringRefES1_E7DefaultERKS1_.exit + %2 = call i32 @memcmp(i8* %PatchedName.0.0, i8* getelementptr inbounds ([4 x i8]* @.str146, i32 0, i32 0), i32 3) nounwind readonly + unreachable + +bb141: ; preds = %_ZNK4llvm12StringSwitchINS_9StringRefES1_E7DefaultERKS1_.exit + unreachable +} diff --git a/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll b/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll new file mode 100644 index 000000000000..40e7f017dc3d --- /dev/null +++ b/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin | FileCheck %s +; PR8297 +; +; On i386, i64 cmpxchg is lowered during legalize types to extract the +; 64-bit result into a pair of fixed regs. So creation of the DAG node +; happens in a different place. See +; X86TargetLowering::ReplaceNodeResults, case ATOMIC_CMP_SWAP. +; +; Neither Atomic-xx.ll nor atomic_op.ll cover this. Those tests were +; autogenerated from C source before 64-bit variants were supported. +; +; Note that this case requires a loop around the cmpxchg to force +; machine licm to query alias anlysis, exposing a bad +; MachineMemOperand. +define void @foo(i64* %ptr) nounwind inlinehint { +entry: + br label %loop +loop: +; CHECK: lock +; CHECK-NEXT: cmpxchg8b + %r = call i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* %ptr, i64 0, i64 1) + %stored1 = icmp eq i64 %r, 0 + br i1 %stored1, label %loop, label %continue +continue: + ret void +} + +declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* nocapture, i64, i64) nounwind diff --git a/test/CodeGen/X86/2010-11-02-DbgParameter.ll b/test/CodeGen/X86/2010-11-02-DbgParameter.ll new file mode 100644 index 000000000000..79c0cf35c660 --- /dev/null +++ b/test/CodeGen/X86/2010-11-02-DbgParameter.ll @@ -0,0 +1,35 @@ +; RUN: llc -O2 -asm-verbose < %s | FileCheck %s +; Radar 8616981 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" +target triple = "i386-apple-darwin11.0.0" + +%struct.bar = type { i32, i32 } + +define i32 @foo(%struct.bar* nocapture %i) nounwind readnone optsize noinline ssp { +; CHECK: TAG_formal_parameter +entry: + tail call void @llvm.dbg.value(metadata !{%struct.bar* %i}, i64 0, metadata !6), !dbg !12 + ret i32 1, !dbg !13 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0} +!llvm.dbg.lv.foo = !{!6} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (%struct.bar*)* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"one.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"one.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 117922)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 590081, metadata !0, metadata !"i", metadata !1, i32 3, metadata !7, i32 0} ; [ DW_TAG_arg_variable ] +!7 = metadata !{i32 589839, metadata !1, metadata !"", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] +!8 = metadata !{i32 589843, metadata !1, metadata !"bar", metadata !1, i32 2, i64 64, i64 32, i64 0, i32 0, null, metadata !9, i32 0, null} ; [ DW_TAG_structure_type ] +!9 = metadata !{metadata !10, metadata !11} +!10 = metadata !{i32 589837, metadata !1, metadata !"x", metadata !1, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] +!11 = metadata !{i32 589837, metadata !1, metadata !"y", metadata !1, i32 2, i64 32, i64 32, i64 32, i32 0, metadata !5} ; [ DW_TAG_member ] +!12 = metadata !{i32 3, i32 47, metadata !0, null} +!13 = metadata !{i32 4, i32 2, metadata !14, null} +!14 = metadata !{i32 589835, metadata !0, i32 3, i32 50, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/CodeGen/X86/2010-11-09-MOVLPS.ll b/test/CodeGen/X86/2010-11-09-MOVLPS.ll new file mode 100644 index 000000000000..2368f3f69195 --- /dev/null +++ b/test/CodeGen/X86/2010-11-09-MOVLPS.ll @@ -0,0 +1,66 @@ +; RUN: llc < %s -march=x86-64 -O0 +; PR8211 +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +module asm "\09.ident\09\22GCC: (GNU) 4.5.2 20100914 (prerelease) LLVM: 114628\22" + +%0 = type { %"int[]" } +%float = type float +%"float[]" = type [4 x float] +%int = type i32 +%"int[]" = type [4 x i32] +%"long unsigned int" = type i64 + +define void @swizzle(i8* %a, %0* %b, %0* %c) nounwind { +entry: + %a_addr = alloca i8* + %b_addr = alloca %0* + %c_addr = alloca %0* + %"alloca point" = bitcast i32 0 to i32 + store i8* %a, i8** %a_addr + store %0* %b, %0** %b_addr + store %0* %c, %0** %c_addr + %0 = load i8** %a_addr, align 64 + %1 = load %0** %b_addr, align 64 + %2 = load %0** %c_addr, align 64 + %"ssa point" = bitcast i32 0 to i32 + br label %"2" + +"2": ; preds = %entry + %3 = bitcast i8* %0 to <2 x i32>* + %4 = getelementptr inbounds %0* %1, i32 0, i32 0 + %5 = bitcast %"int[]"* %4 to <4 x float>* + %6 = load <4 x float>* %5, align 16 + %7 = bitcast <2 x i32>* %3 to <2 x float>* + %8 = bitcast <2 x float>* %7 to double* + %9 = load double* %8 + %10 = insertelement <2 x double> undef, double %9, i32 0 + %11 = insertelement <2 x double> %10, double undef, i32 1 + %12 = bitcast <2 x double> %11 to <4 x float> + %13 = shufflevector <4 x float> %6, <4 x float> %12, <4 x i32> <i32 4, i32 5, i32 2, i32 3> + %14 = getelementptr inbounds %0* %1, i32 0, i32 0 + %15 = bitcast %"int[]"* %14 to <4 x float>* + store <4 x float> %13, <4 x float>* %15, align 16 + %16 = bitcast i8* %0 to <2 x i32>* + %17 = bitcast <2 x i32>* %16 to i8* + %18 = getelementptr i8* %17, i64 8 + %19 = bitcast i8* %18 to <2 x i32>* + %20 = getelementptr inbounds %0* %2, i32 0, i32 0 + %21 = bitcast %"int[]"* %20 to <4 x float>* + %22 = load <4 x float>* %21, align 16 + %23 = bitcast <2 x i32>* %19 to <2 x float>* + %24 = bitcast <2 x float>* %23 to double* + %25 = load double* %24 + %26 = insertelement <2 x double> undef, double %25, i32 0 + %27 = insertelement <2 x double> %26, double undef, i32 1 + %28 = bitcast <2 x double> %27 to <4 x float> + %29 = shufflevector <4 x float> %22, <4 x float> %28, <4 x i32> <i32 4, i32 5, i32 2, i32 3> + %30 = getelementptr inbounds %0* %2, i32 0, i32 0 + %31 = bitcast %"int[]"* %30 to <4 x float>* + store <4 x float> %29, <4 x float>* %31, align 16 + br label %return + +return: ; preds = %"2" + ret void +} diff --git a/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll b/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll new file mode 100644 index 000000000000..a1074b6b8f3c --- /dev/null +++ b/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; Both values were being zero extended. +@u = external global i8 +@s = external global i8 +define i32 @foo(i1 %cond) { +; CHECK: @foo + %u_base = load i8* @u + %u_val = zext i8 %u_base to i32 +; CHECK: movzbl +; CHECK: movsbl + %s_base = load i8* @s + %s_val = sext i8 %s_base to i32 + %val = select i1 %cond, i32 %u_val, i32 %s_val + ret i32 %val +} diff --git a/test/CodeGen/X86/2010-12-02-MC-Set.ll b/test/CodeGen/X86/2010-12-02-MC-Set.ll new file mode 100644 index 000000000000..31446786ec15 --- /dev/null +++ b/test/CodeGen/X86/2010-12-02-MC-Set.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -disable-dot-loc -mtriple=x86_64-apple-darwin -O0 | FileCheck %s + + +define void @foo() nounwind ssp { +entry: + ret void, !dbg !5 +} + +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"e.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"e.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 120563)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{null} +!5 = metadata !{i32 5, i32 1, metadata !6, null} +!6 = metadata !{i32 589835, metadata !0, i32 3, i32 16, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] + +; CHECK: .subsections_via_symbols +; CHECK-NEXT: __debug_line +; CHECK-NEXT: Ltmp +; CHECK-NEXT: Ltmp{{[0-9]}} = (Ltmp diff --git a/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll b/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll new file mode 100644 index 000000000000..b9cf65b1e733 --- /dev/null +++ b/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -enable-legalize-types-checking +; PR8582 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i686-pc-win32" + +define void @test() nounwind { + %i17 = icmp eq <4 x i8> undef, zeroinitializer + %cond = extractelement <4 x i1> %i17, i32 0 + %_comp = select i1 %cond, i8 0, i8 undef + %merge = insertelement <4 x i8> undef, i8 %_comp, i32 0 + %cond3 = extractelement <4 x i1> %i17, i32 1 + %_comp4 = select i1 %cond3, i8 0, i8 undef + %merge5 = insertelement <4 x i8> %merge, i8 %_comp4, i32 1 + %cond8 = extractelement <4 x i1> %i17, i32 2 + %_comp9 = select i1 %cond8, i8 0, i8 undef + %m387 = insertelement <4 x i8> %merge5, i8 %_comp9, i32 2 + store <4 x i8> %m387, <4 x i8>* undef + ret void +} diff --git a/test/CodeGen/X86/2011-01-10-DagCombineHang.ll b/test/CodeGen/X86/2011-01-10-DagCombineHang.ll new file mode 100644 index 000000000000..bf438b82edf8 --- /dev/null +++ b/test/CodeGen/X86/2011-01-10-DagCombineHang.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 +; This formerly got DagCombine into a loop, PR 8916. + +define i32 @foo(i64 %x, i64 %y, i64 %z, i32 %a, i32 %b) { +entry: + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + %t1 = shl i64 %x, 15 + %t2 = and i64 %t1, 4294934528 + %t3 = or i64 %t2, %y + %t4 = xor i64 %z, %t3 + %t5 = trunc i64 %t4 to i32 + %t6 = add i32 %a, %t5 + %t7 = add i32 %t6, %b + ret i32 %t7 +} diff --git a/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll b/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll new file mode 100644 index 000000000000..973975b658a3 --- /dev/null +++ b/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll @@ -0,0 +1,103 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; Check debug info for variable z_s +;CHECK: .ascii "z_s" ## DW_AT_name +;CHECK-NEXT: .byte 0 +;CHECK-NEXT: ## DW_AT_decl_file +;CHECK-NEXT: ## DW_AT_decl_line +;CHECK-NEXT: ## DW_AT_type +;CHECK-NEXT: ## DW_AT_location + + +@.str1 = private unnamed_addr constant [14 x i8] c"m=%u, z_s=%d\0A\00" +@str = internal constant [21 x i8] c"Failing test vector:\00" + +define i64 @gcd(i64 %a, i64 %b) nounwind readnone optsize noinline ssp { +entry: + tail call void @llvm.dbg.value(metadata !{i64 %a}, i64 0, metadata !10), !dbg !18 + tail call void @llvm.dbg.value(metadata !{i64 %b}, i64 0, metadata !11), !dbg !19 + br label %while.body, !dbg !20 + +while.body: ; preds = %while.body, %entry + %b.addr.0 = phi i64 [ %b, %entry ], [ %rem, %while.body ] + %a.addr.0 = phi i64 [ %a, %entry ], [ %b.addr.0, %while.body ] + %rem = srem i64 %a.addr.0, %b.addr.0, !dbg !21 + %cmp = icmp eq i64 %rem, 0, !dbg !23 + br i1 %cmp, label %if.then, label %while.body, !dbg !23 + +if.then: ; preds = %while.body + tail call void @llvm.dbg.value(metadata !{i64 %rem}, i64 0, metadata !12), !dbg !21 + ret i64 %b.addr.0, !dbg !23 +} + +define i32 @main() nounwind optsize ssp { +entry: + %call = tail call i32 @rand() nounwind optsize, !dbg !24 + tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !14), !dbg !24 + %cmp = icmp ugt i32 %call, 21, !dbg !25 + br i1 %cmp, label %cond.true, label %cond.end, !dbg !25 + +cond.true: ; preds = %entry + %call1 = tail call i32 @rand() nounwind optsize, !dbg !25 + br label %cond.end, !dbg !25 + +cond.end: ; preds = %entry, %cond.true + %cond = phi i32 [ %call1, %cond.true ], [ %call, %entry ], !dbg !25 + tail call void @llvm.dbg.value(metadata !{i32 %cond}, i64 0, metadata !17), !dbg !25 + %conv = sext i32 %cond to i64, !dbg !26 + %conv5 = zext i32 %call to i64, !dbg !26 + %call6 = tail call i64 @gcd(i64 %conv, i64 %conv5) optsize, !dbg !26 + %cmp7 = icmp eq i64 %call6, 0 + br i1 %cmp7, label %return, label %if.then, !dbg !26 + +if.then: ; preds = %cond.end + %puts = tail call i32 @puts(i8* getelementptr inbounds ([21 x i8]* @str, i64 0, i64 0)) + %call12 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([14 x i8]* @.str1, i64 0, i64 0), i32 %call, i32 %cond) nounwind optsize, !dbg !26 + ret i32 1, !dbg !27 + +return: ; preds = %cond.end + ret i32 0, !dbg !27 +} + +declare i32 @rand() optsize + +declare i32 @printf(i8* nocapture, ...) nounwind optsize + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +declare i32 @puts(i8* nocapture) nounwind + +!llvm.dbg.sp = !{!0, !6} +!llvm.dbg.lv.gcd = !{!10, !11, !12} +!llvm.dbg.lv.main = !{!14, !17} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"gcd", metadata !"gcd", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i64 (i64, i64)* @gcd} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"rem_small.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"rem_small.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 124117)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"long int", null, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 25, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @main} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!8 = metadata !{metadata !9} +!9 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{i32 590081, metadata !0, metadata !"a", metadata !1, i32 5, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!11 = metadata !{i32 590081, metadata !0, metadata !"b", metadata !1, i32 5, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!12 = metadata !{i32 590080, metadata !13, metadata !"c", metadata !1, i32 6, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!13 = metadata !{i32 589835, metadata !0, i32 5, i32 52, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!14 = metadata !{i32 590080, metadata !15, metadata !"m", metadata !1, i32 26, metadata !16, i32 0} ; [ DW_TAG_auto_variable ] +!15 = metadata !{i32 589835, metadata !6, i32 25, i32 12, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 589860, metadata !2, metadata !"unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!17 = metadata !{i32 590080, metadata !15, metadata !"z_s", metadata !1, i32 27, metadata !9, i32 0} ; [ DW_TAG_auto_variable ] +!18 = metadata !{i32 5, i32 41, metadata !0, null} +!19 = metadata !{i32 5, i32 49, metadata !0, null} +!20 = metadata !{i32 7, i32 5, metadata !13, null} +!21 = metadata !{i32 8, i32 9, metadata !22, null} +!22 = metadata !{i32 589835, metadata !13, i32 7, i32 14, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!23 = metadata !{i32 9, i32 9, metadata !22, null} +!24 = metadata !{i32 26, i32 38, metadata !15, null} +!25 = metadata !{i32 27, i32 38, metadata !15, null} +!26 = metadata !{i32 28, i32 9, metadata !15, null} +!27 = metadata !{i32 30, i32 1, metadata !15, null} diff --git a/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll b/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll new file mode 100644 index 000000000000..cedd6a2a1b8e --- /dev/null +++ b/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll @@ -0,0 +1,14 @@ +; RUN: llc -O0 < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +declare i32 @foo() + +define i32 @bar() nounwind { +; CHECK: bar +; CHECK-NOT: pop.*ax + %call = call i32 @foo() + ret i32 %call +} + diff --git a/test/CodeGen/X86/3addr-or.ll b/test/CodeGen/X86/3addr-or.ll index 30a1f36850de..912bdc215474 100644 --- a/test/CodeGen/X86/3addr-or.ll +++ b/test/CodeGen/X86/3addr-or.ll @@ -1,9 +1,9 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s ; rdar://7527734 -define i32 @test(i32 %x) nounwind readnone ssp { +define i32 @test1(i32 %x) nounwind readnone ssp { entry: -; CHECK: test: +; CHECK: test1: ; CHECK: leal 3(%rdi), %eax %0 = shl i32 %x, 5 ; <i32> [#uses=1] %1 = or i32 %0, 3 ; <i32> [#uses=1] @@ -25,3 +25,37 @@ define i64 @test2(i8 %A, i8 %B) nounwind { %H = or i64 %G, %E ; <i64> [#uses=1] ret i64 %H } + +;; Test that OR is only emitted as LEA, not as ADD. + +define void @test3(i32 %x, i32* %P) nounwind readnone ssp { +entry: +; No reason to emit an add here, should be an or. +; CHECK: test3: +; CHECK: orl $3, %edi + %0 = shl i32 %x, 5 + %1 = or i32 %0, 3 + store i32 %1, i32* %P + ret void +} + +define i32 @test4(i32 %a, i32 %b) nounwind readnone ssp { +entry: + %and = and i32 %a, 6 + %and2 = and i32 %b, 16 + %or = or i32 %and2, %and + ret i32 %or +; CHECK: test4: +; CHECK: leal (%rsi,%rdi), %eax +} + +define void @test5(i32 %a, i32 %b, i32* nocapture %P) nounwind ssp { +entry: + %and = and i32 %a, 6 + %and2 = and i32 %b, 16 + %or = or i32 %and2, %and + store i32 %or, i32* %P, align 4 + ret void +; CHECK: test5: +; CHECK: orl +} diff --git a/test/CodeGen/X86/abi-isel.ll b/test/CodeGen/X86/abi-isel.ll index 23042b6eff3e..5b4d79fa22b9 100644 --- a/test/CodeGen/X86/abi-isel.ll +++ b/test/CodeGen/X86/abi-isel.ll @@ -1,16 +1,16 @@ -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-32-STATIC -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-32-PIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-PIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-64-STATIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX-64-PIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-64-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=LINUX-64-PIC -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-STATIC -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC -; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-32-PIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-32-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-PIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-STATIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC -; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small -post-RA-scheduler=false | FileCheck %s -check-prefix=DARWIN-64-PIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-64-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-PIC @src = external global [131072 x i32] @dst = external global [131072 x i32] @@ -72,7 +72,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo00: -; DARWIN-32-PIC: call L0$pb +; DARWIN-32-PIC: calll L0$pb ; DARWIN-32-PIC-NEXT: L0$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L0$pb(%eax), %ecx @@ -144,7 +144,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _fxo00: -; DARWIN-32-PIC: call L1$pb +; DARWIN-32-PIC: calll L1$pb ; DARWIN-32-PIC-NEXT: L1$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L1$pb(%eax), %ecx @@ -208,7 +208,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo01: -; DARWIN-32-PIC: call L2$pb +; DARWIN-32-PIC: calll L2$pb ; DARWIN-32-PIC-NEXT: L2$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L2$pb(%eax), %ecx @@ -268,7 +268,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _fxo01: -; DARWIN-32-PIC: call L3$pb +; DARWIN-32-PIC: calll L3$pb ; DARWIN-32-PIC-NEXT: L3$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L3$pb(%eax), %ecx @@ -342,7 +342,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo02: -; DARWIN-32-PIC: call L4$pb +; DARWIN-32-PIC: calll L4$pb ; DARWIN-32-PIC-NEXT: L4$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L4$pb(%eax), %ecx @@ -424,7 +424,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _fxo02: -; DARWIN-32-PIC: call L5$pb +; DARWIN-32-PIC: calll L5$pb ; DARWIN-32-PIC-NEXT: L5$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L5$pb(%eax), %ecx @@ -497,7 +497,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo03: -; DARWIN-32-PIC: call L6$pb +; DARWIN-32-PIC: calll L6$pb ; DARWIN-32-PIC-NEXT: L6$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl _dsrc-L6$pb(%eax), %ecx @@ -551,7 +551,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo04: -; DARWIN-32-PIC: call L7$pb +; DARWIN-32-PIC: calll L7$pb ; DARWIN-32-PIC-NEXT: L7$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _ddst-L7$pb(%eax), %ecx @@ -619,7 +619,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo05: -; DARWIN-32-PIC: call L8$pb +; DARWIN-32-PIC: calll L8$pb ; DARWIN-32-PIC-NEXT: L8$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl _dsrc-L8$pb(%eax), %ecx @@ -682,7 +682,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo06: -; DARWIN-32-PIC: call L9$pb +; DARWIN-32-PIC: calll L9$pb ; DARWIN-32-PIC-NEXT: L9$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl _lsrc-L9$pb(%eax), %ecx @@ -735,7 +735,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo07: -; DARWIN-32-PIC: call L10$pb +; DARWIN-32-PIC: calll L10$pb ; DARWIN-32-PIC-NEXT: L10$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _ldst-L10$pb(%eax), %ecx @@ -801,7 +801,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _foo08: -; DARWIN-32-PIC: call L11$pb +; DARWIN-32-PIC: calll L11$pb ; DARWIN-32-PIC-NEXT: L11$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl _lsrc-L11$pb(%eax), %ecx @@ -868,7 +868,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux00: -; DARWIN-32-PIC: call L12$pb +; DARWIN-32-PIC: calll L12$pb ; DARWIN-32-PIC-NEXT: L12$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L12$pb(%eax), %ecx @@ -939,7 +939,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qxx00: -; DARWIN-32-PIC: call L13$pb +; DARWIN-32-PIC: calll L13$pb ; DARWIN-32-PIC-NEXT: L13$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L13$pb(%eax), %ecx @@ -1005,7 +1005,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux01: -; DARWIN-32-PIC: call L14$pb +; DARWIN-32-PIC: calll L14$pb ; DARWIN-32-PIC-NEXT: L14$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L14$pb(%eax), %ecx @@ -1071,7 +1071,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qxx01: -; DARWIN-32-PIC: call L15$pb +; DARWIN-32-PIC: calll L15$pb ; DARWIN-32-PIC-NEXT: L15$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L15$pb(%eax), %ecx @@ -1150,7 +1150,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux02: -; DARWIN-32-PIC: call L16$pb +; DARWIN-32-PIC: calll L16$pb ; DARWIN-32-PIC-NEXT: L16$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L16$pb(%eax), %ecx @@ -1233,7 +1233,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qxx02: -; DARWIN-32-PIC: call L17$pb +; DARWIN-32-PIC: calll L17$pb ; DARWIN-32-PIC-NEXT: L17$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L17$pb(%eax), %ecx @@ -1306,7 +1306,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux03: -; DARWIN-32-PIC: call L18$pb +; DARWIN-32-PIC: calll L18$pb ; DARWIN-32-PIC-NEXT: L18$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl (_dsrc-L18$pb)+64(%eax), %ecx @@ -1361,7 +1361,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux04: -; DARWIN-32-PIC: call L19$pb +; DARWIN-32-PIC: calll L19$pb ; DARWIN-32-PIC-NEXT: L19$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_ddst-L19$pb)+64(%eax), %ecx @@ -1430,7 +1430,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux05: -; DARWIN-32-PIC: call L20$pb +; DARWIN-32-PIC: calll L20$pb ; DARWIN-32-PIC-NEXT: L20$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl (_dsrc-L20$pb)+64(%eax), %ecx @@ -1493,7 +1493,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux06: -; DARWIN-32-PIC: call L21$pb +; DARWIN-32-PIC: calll L21$pb ; DARWIN-32-PIC-NEXT: L21$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl (_lsrc-L21$pb)+64(%eax), %ecx @@ -1546,7 +1546,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux07: -; DARWIN-32-PIC: call L22$pb +; DARWIN-32-PIC: calll L22$pb ; DARWIN-32-PIC-NEXT: L22$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_ldst-L22$pb)+64(%eax), %ecx @@ -1613,7 +1613,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _qux08: -; DARWIN-32-PIC: call L23$pb +; DARWIN-32-PIC: calll L23$pb ; DARWIN-32-PIC-NEXT: L23$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl (_lsrc-L23$pb)+64(%eax), %ecx @@ -1686,7 +1686,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind00: -; DARWIN-32-PIC: call L24$pb +; DARWIN-32-PIC: calll L24$pb ; DARWIN-32-PIC-NEXT: L24$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -1764,7 +1764,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ixd00: -; DARWIN-32-PIC: call L25$pb +; DARWIN-32-PIC: calll L25$pb ; DARWIN-32-PIC-NEXT: L25$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -1840,7 +1840,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind01: -; DARWIN-32-PIC: call L26$pb +; DARWIN-32-PIC: calll L26$pb ; DARWIN-32-PIC-NEXT: L26$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -1916,7 +1916,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ixd01: -; DARWIN-32-PIC: call L27$pb +; DARWIN-32-PIC: calll L27$pb ; DARWIN-32-PIC-NEXT: L27$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2001,7 +2001,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind02: -; DARWIN-32-PIC: call L28$pb +; DARWIN-32-PIC: calll L28$pb ; DARWIN-32-PIC-NEXT: L28$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2090,7 +2090,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ixd02: -; DARWIN-32-PIC: call L29$pb +; DARWIN-32-PIC: calll L29$pb ; DARWIN-32-PIC-NEXT: L29$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2170,7 +2170,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind03: -; DARWIN-32-PIC: call L30$pb +; DARWIN-32-PIC: calll L30$pb ; DARWIN-32-PIC-NEXT: L30$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2242,7 +2242,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind04: -; DARWIN-32-PIC: call L31$pb +; DARWIN-32-PIC: calll L31$pb ; DARWIN-32-PIC-NEXT: L31$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2320,7 +2320,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind05: -; DARWIN-32-PIC: call L32$pb +; DARWIN-32-PIC: calll L32$pb ; DARWIN-32-PIC-NEXT: L32$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2395,7 +2395,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind06: -; DARWIN-32-PIC: call L33$pb +; DARWIN-32-PIC: calll L33$pb ; DARWIN-32-PIC-NEXT: L33$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2466,7 +2466,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind07: -; DARWIN-32-PIC: call L34$pb +; DARWIN-32-PIC: calll L34$pb ; DARWIN-32-PIC-NEXT: L34$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2543,7 +2543,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ind08: -; DARWIN-32-PIC: call L35$pb +; DARWIN-32-PIC: calll L35$pb ; DARWIN-32-PIC-NEXT: L35$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2621,7 +2621,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off00: -; DARWIN-32-PIC: call L36$pb +; DARWIN-32-PIC: calll L36$pb ; DARWIN-32-PIC-NEXT: L36$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2700,7 +2700,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _oxf00: -; DARWIN-32-PIC: call L37$pb +; DARWIN-32-PIC: calll L37$pb ; DARWIN-32-PIC-NEXT: L37$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2777,7 +2777,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off01: -; DARWIN-32-PIC: call L38$pb +; DARWIN-32-PIC: calll L38$pb ; DARWIN-32-PIC-NEXT: L38$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2854,7 +2854,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _oxf01: -; DARWIN-32-PIC: call L39$pb +; DARWIN-32-PIC: calll L39$pb ; DARWIN-32-PIC-NEXT: L39$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -2940,7 +2940,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off02: -; DARWIN-32-PIC: call L40$pb +; DARWIN-32-PIC: calll L40$pb ; DARWIN-32-PIC-NEXT: L40$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -3030,7 +3030,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _oxf02: -; DARWIN-32-PIC: call L41$pb +; DARWIN-32-PIC: calll L41$pb ; DARWIN-32-PIC-NEXT: L41$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -3111,7 +3111,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off03: -; DARWIN-32-PIC: call L42$pb +; DARWIN-32-PIC: calll L42$pb ; DARWIN-32-PIC-NEXT: L42$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -3184,7 +3184,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off04: -; DARWIN-32-PIC: call L43$pb +; DARWIN-32-PIC: calll L43$pb ; DARWIN-32-PIC-NEXT: L43$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -3263,7 +3263,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off05: -; DARWIN-32-PIC: call L44$pb +; DARWIN-32-PIC: calll L44$pb ; DARWIN-32-PIC-NEXT: L44$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -3339,7 +3339,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off06: -; DARWIN-32-PIC: call L45$pb +; DARWIN-32-PIC: calll L45$pb ; DARWIN-32-PIC-NEXT: L45$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -3411,7 +3411,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off07: -; DARWIN-32-PIC: call L46$pb +; DARWIN-32-PIC: calll L46$pb ; DARWIN-32-PIC-NEXT: L46$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -3489,7 +3489,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _off08: -; DARWIN-32-PIC: call L47$pb +; DARWIN-32-PIC: calll L47$pb ; DARWIN-32-PIC-NEXT: L47$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -3560,7 +3560,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo00: -; DARWIN-32-PIC: call L48$pb +; DARWIN-32-PIC: calll L48$pb ; DARWIN-32-PIC-NEXT: L48$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L48$pb(%eax), %ecx @@ -3626,7 +3626,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo01: -; DARWIN-32-PIC: call L49$pb +; DARWIN-32-PIC: calll L49$pb ; DARWIN-32-PIC-NEXT: L49$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl $262144, %ecx @@ -3705,7 +3705,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo02: -; DARWIN-32-PIC: call L50$pb +; DARWIN-32-PIC: calll L50$pb ; DARWIN-32-PIC-NEXT: L50$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L50$pb(%eax), %ecx @@ -3778,7 +3778,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo03: -; DARWIN-32-PIC: call L51$pb +; DARWIN-32-PIC: calll L51$pb ; DARWIN-32-PIC-NEXT: L51$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl (_dsrc-L51$pb)+262144(%eax), %ecx @@ -3833,7 +3833,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo04: -; DARWIN-32-PIC: call L52$pb +; DARWIN-32-PIC: calll L52$pb ; DARWIN-32-PIC-NEXT: L52$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_ddst-L52$pb)+262144(%eax), %ecx @@ -3902,7 +3902,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo05: -; DARWIN-32-PIC: call L53$pb +; DARWIN-32-PIC: calll L53$pb ; DARWIN-32-PIC-NEXT: L53$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl (_dsrc-L53$pb)+262144(%eax), %ecx @@ -3965,7 +3965,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo06: -; DARWIN-32-PIC: call L54$pb +; DARWIN-32-PIC: calll L54$pb ; DARWIN-32-PIC-NEXT: L54$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl (_lsrc-L54$pb)+262144(%eax), %ecx @@ -4018,7 +4018,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo07: -; DARWIN-32-PIC: call L55$pb +; DARWIN-32-PIC: calll L55$pb ; DARWIN-32-PIC-NEXT: L55$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_ldst-L55$pb)+262144(%eax), %ecx @@ -4085,7 +4085,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _moo08: -; DARWIN-32-PIC: call L56$pb +; DARWIN-32-PIC: calll L56$pb ; DARWIN-32-PIC-NEXT: L56$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl (_lsrc-L56$pb)+262144(%eax), %ecx @@ -4159,7 +4159,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big00: -; DARWIN-32-PIC: call L57$pb +; DARWIN-32-PIC: calll L57$pb ; DARWIN-32-PIC-NEXT: L57$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4236,7 +4236,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big01: -; DARWIN-32-PIC: call L58$pb +; DARWIN-32-PIC: calll L58$pb ; DARWIN-32-PIC-NEXT: L58$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4322,7 +4322,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big02: -; DARWIN-32-PIC: call L59$pb +; DARWIN-32-PIC: calll L59$pb ; DARWIN-32-PIC-NEXT: L59$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4403,7 +4403,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big03: -; DARWIN-32-PIC: call L60$pb +; DARWIN-32-PIC: calll L60$pb ; DARWIN-32-PIC-NEXT: L60$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4476,7 +4476,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big04: -; DARWIN-32-PIC: call L61$pb +; DARWIN-32-PIC: calll L61$pb ; DARWIN-32-PIC-NEXT: L61$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4555,7 +4555,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big05: -; DARWIN-32-PIC: call L62$pb +; DARWIN-32-PIC: calll L62$pb ; DARWIN-32-PIC-NEXT: L62$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4631,7 +4631,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big06: -; DARWIN-32-PIC: call L63$pb +; DARWIN-32-PIC: calll L63$pb ; DARWIN-32-PIC-NEXT: L63$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4703,7 +4703,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big07: -; DARWIN-32-PIC: call L64$pb +; DARWIN-32-PIC: calll L64$pb ; DARWIN-32-PIC-NEXT: L64$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4781,7 +4781,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _big08: -; DARWIN-32-PIC: call L65$pb +; DARWIN-32-PIC: calll L65$pb ; DARWIN-32-PIC-NEXT: L65$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -4840,7 +4840,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar00: -; DARWIN-32-PIC: call L66$pb +; DARWIN-32-PIC: calll L66$pb ; DARWIN-32-PIC-NEXT: L66$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L66$pb(%eax), %eax @@ -4887,7 +4887,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bxr00: -; DARWIN-32-PIC: call L67$pb +; DARWIN-32-PIC: calll L67$pb ; DARWIN-32-PIC-NEXT: L67$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L67$pb(%eax), %eax @@ -4934,7 +4934,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar01: -; DARWIN-32-PIC: call L68$pb +; DARWIN-32-PIC: calll L68$pb ; DARWIN-32-PIC-NEXT: L68$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L68$pb(%eax), %eax @@ -4981,7 +4981,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bxr01: -; DARWIN-32-PIC: call L69$pb +; DARWIN-32-PIC: calll L69$pb ; DARWIN-32-PIC-NEXT: L69$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L69$pb(%eax), %eax @@ -5028,7 +5028,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar02: -; DARWIN-32-PIC: call L70$pb +; DARWIN-32-PIC: calll L70$pb ; DARWIN-32-PIC-NEXT: L70$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L70$pb(%eax), %eax @@ -5075,7 +5075,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar03: -; DARWIN-32-PIC: call L71$pb +; DARWIN-32-PIC: calll L71$pb ; DARWIN-32-PIC-NEXT: L71$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _dsrc-L71$pb(%eax), %eax @@ -5122,7 +5122,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar04: -; DARWIN-32-PIC: call L72$pb +; DARWIN-32-PIC: calll L72$pb ; DARWIN-32-PIC-NEXT: L72$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _ddst-L72$pb(%eax), %eax @@ -5169,7 +5169,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar05: -; DARWIN-32-PIC: call L73$pb +; DARWIN-32-PIC: calll L73$pb ; DARWIN-32-PIC-NEXT: L73$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _dptr-L73$pb(%eax), %eax @@ -5216,7 +5216,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar06: -; DARWIN-32-PIC: call L74$pb +; DARWIN-32-PIC: calll L74$pb ; DARWIN-32-PIC-NEXT: L74$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _lsrc-L74$pb(%eax), %eax @@ -5263,7 +5263,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar07: -; DARWIN-32-PIC: call L75$pb +; DARWIN-32-PIC: calll L75$pb ; DARWIN-32-PIC-NEXT: L75$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _ldst-L75$pb(%eax), %eax @@ -5310,7 +5310,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bar08: -; DARWIN-32-PIC: call L76$pb +; DARWIN-32-PIC: calll L76$pb ; DARWIN-32-PIC-NEXT: L76$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _lptr-L76$pb(%eax), %eax @@ -5357,7 +5357,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har00: -; DARWIN-32-PIC: call L77$pb +; DARWIN-32-PIC: calll L77$pb ; DARWIN-32-PIC-NEXT: L77$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L77$pb(%eax), %eax @@ -5404,7 +5404,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _hxr00: -; DARWIN-32-PIC: call L78$pb +; DARWIN-32-PIC: calll L78$pb ; DARWIN-32-PIC-NEXT: L78$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L78$pb(%eax), %eax @@ -5451,7 +5451,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har01: -; DARWIN-32-PIC: call L79$pb +; DARWIN-32-PIC: calll L79$pb ; DARWIN-32-PIC-NEXT: L79$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L79$pb(%eax), %eax @@ -5498,7 +5498,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _hxr01: -; DARWIN-32-PIC: call L80$pb +; DARWIN-32-PIC: calll L80$pb ; DARWIN-32-PIC-NEXT: L80$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L80$pb(%eax), %eax @@ -5549,7 +5549,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har02: -; DARWIN-32-PIC: call L81$pb +; DARWIN-32-PIC: calll L81$pb ; DARWIN-32-PIC-NEXT: L81$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L81$pb(%eax), %eax @@ -5600,7 +5600,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har03: -; DARWIN-32-PIC: call L82$pb +; DARWIN-32-PIC: calll L82$pb ; DARWIN-32-PIC-NEXT: L82$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _dsrc-L82$pb(%eax), %eax @@ -5647,7 +5647,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har04: -; DARWIN-32-PIC: call L83$pb +; DARWIN-32-PIC: calll L83$pb ; DARWIN-32-PIC-NEXT: L83$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _ddst-L83$pb(%eax), %eax @@ -5697,7 +5697,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har05: -; DARWIN-32-PIC: call L84$pb +; DARWIN-32-PIC: calll L84$pb ; DARWIN-32-PIC-NEXT: L84$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl _dptr-L84$pb(%eax), %eax @@ -5744,7 +5744,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har06: -; DARWIN-32-PIC: call L85$pb +; DARWIN-32-PIC: calll L85$pb ; DARWIN-32-PIC-NEXT: L85$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _lsrc-L85$pb(%eax), %eax @@ -5791,7 +5791,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har07: -; DARWIN-32-PIC: call L86$pb +; DARWIN-32-PIC: calll L86$pb ; DARWIN-32-PIC-NEXT: L86$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _ldst-L86$pb(%eax), %eax @@ -5840,7 +5840,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _har08: -; DARWIN-32-PIC: call L87$pb +; DARWIN-32-PIC: calll L87$pb ; DARWIN-32-PIC-NEXT: L87$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl _lptr-L87$pb(%eax), %eax @@ -5889,7 +5889,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat00: -; DARWIN-32-PIC: call L88$pb +; DARWIN-32-PIC: calll L88$pb ; DARWIN-32-PIC-NEXT: L88$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L88$pb(%eax), %eax @@ -5942,7 +5942,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bxt00: -; DARWIN-32-PIC: call L89$pb +; DARWIN-32-PIC: calll L89$pb ; DARWIN-32-PIC-NEXT: L89$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L89$pb(%eax), %eax @@ -5995,7 +5995,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat01: -; DARWIN-32-PIC: call L90$pb +; DARWIN-32-PIC: calll L90$pb ; DARWIN-32-PIC-NEXT: L90$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L90$pb(%eax), %eax @@ -6048,7 +6048,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bxt01: -; DARWIN-32-PIC: call L91$pb +; DARWIN-32-PIC: calll L91$pb ; DARWIN-32-PIC-NEXT: L91$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L91$pb(%eax), %eax @@ -6110,7 +6110,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat02: -; DARWIN-32-PIC: call L92$pb +; DARWIN-32-PIC: calll L92$pb ; DARWIN-32-PIC-NEXT: L92$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L92$pb(%eax), %eax @@ -6166,7 +6166,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat03: -; DARWIN-32-PIC: call L93$pb +; DARWIN-32-PIC: calll L93$pb ; DARWIN-32-PIC-NEXT: L93$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_dsrc-L93$pb)+64(%eax), %eax @@ -6214,7 +6214,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat04: -; DARWIN-32-PIC: call L94$pb +; DARWIN-32-PIC: calll L94$pb ; DARWIN-32-PIC-NEXT: L94$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_ddst-L94$pb)+64(%eax), %eax @@ -6271,7 +6271,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat05: -; DARWIN-32-PIC: call L95$pb +; DARWIN-32-PIC: calll L95$pb ; DARWIN-32-PIC-NEXT: L95$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl _dptr-L95$pb(%eax), %eax @@ -6322,7 +6322,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat06: -; DARWIN-32-PIC: call L96$pb +; DARWIN-32-PIC: calll L96$pb ; DARWIN-32-PIC-NEXT: L96$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_lsrc-L96$pb)+64(%eax), %eax @@ -6369,7 +6369,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat07: -; DARWIN-32-PIC: call L97$pb +; DARWIN-32-PIC: calll L97$pb ; DARWIN-32-PIC-NEXT: L97$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_ldst-L97$pb)+64(%eax), %eax @@ -6425,7 +6425,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bat08: -; DARWIN-32-PIC: call L98$pb +; DARWIN-32-PIC: calll L98$pb ; DARWIN-32-PIC-NEXT: L98$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl _lptr-L98$pb(%eax), %eax @@ -6478,7 +6478,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam00: -; DARWIN-32-PIC: call L99$pb +; DARWIN-32-PIC: calll L99$pb ; DARWIN-32-PIC-NEXT: L99$pb: ; DARWIN-32-PIC-NEXT: popl %ecx ; DARWIN-32-PIC-NEXT: movl $262144, %eax @@ -6531,7 +6531,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam01: -; DARWIN-32-PIC: call L100$pb +; DARWIN-32-PIC: calll L100$pb ; DARWIN-32-PIC-NEXT: L100$pb: ; DARWIN-32-PIC-NEXT: popl %ecx ; DARWIN-32-PIC-NEXT: movl $262144, %eax @@ -6584,7 +6584,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bxm01: -; DARWIN-32-PIC: call L101$pb +; DARWIN-32-PIC: calll L101$pb ; DARWIN-32-PIC-NEXT: L101$pb: ; DARWIN-32-PIC-NEXT: popl %ecx ; DARWIN-32-PIC-NEXT: movl $262144, %eax @@ -6646,7 +6646,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam02: -; DARWIN-32-PIC: call L102$pb +; DARWIN-32-PIC: calll L102$pb ; DARWIN-32-PIC-NEXT: L102$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L102$pb(%eax), %ecx @@ -6702,7 +6702,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam03: -; DARWIN-32-PIC: call L103$pb +; DARWIN-32-PIC: calll L103$pb ; DARWIN-32-PIC-NEXT: L103$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_dsrc-L103$pb)+262144(%eax), %eax @@ -6750,7 +6750,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam04: -; DARWIN-32-PIC: call L104$pb +; DARWIN-32-PIC: calll L104$pb ; DARWIN-32-PIC-NEXT: L104$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_ddst-L104$pb)+262144(%eax), %eax @@ -6807,7 +6807,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam05: -; DARWIN-32-PIC: call L105$pb +; DARWIN-32-PIC: calll L105$pb ; DARWIN-32-PIC-NEXT: L105$pb: ; DARWIN-32-PIC-NEXT: popl %ecx ; DARWIN-32-PIC-NEXT: movl $262144, %eax @@ -6858,7 +6858,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam06: -; DARWIN-32-PIC: call L106$pb +; DARWIN-32-PIC: calll L106$pb ; DARWIN-32-PIC-NEXT: L106$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_lsrc-L106$pb)+262144(%eax), %eax @@ -6905,7 +6905,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam07: -; DARWIN-32-PIC: call L107$pb +; DARWIN-32-PIC: calll L107$pb ; DARWIN-32-PIC-NEXT: L107$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal (_ldst-L107$pb)+262144(%eax), %eax @@ -6961,7 +6961,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _bam08: -; DARWIN-32-PIC: call L108$pb +; DARWIN-32-PIC: calll L108$pb ; DARWIN-32-PIC-NEXT: L108$pb: ; DARWIN-32-PIC-NEXT: popl %ecx ; DARWIN-32-PIC-NEXT: movl $262144, %eax @@ -7021,7 +7021,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat00: -; DARWIN-32-PIC: call L109$pb +; DARWIN-32-PIC: calll L109$pb ; DARWIN-32-PIC-NEXT: L109$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7082,7 +7082,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cxt00: -; DARWIN-32-PIC: call L110$pb +; DARWIN-32-PIC: calll L110$pb ; DARWIN-32-PIC-NEXT: L110$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7143,7 +7143,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat01: -; DARWIN-32-PIC: call L111$pb +; DARWIN-32-PIC: calll L111$pb ; DARWIN-32-PIC-NEXT: L111$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7204,7 +7204,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cxt01: -; DARWIN-32-PIC: call L112$pb +; DARWIN-32-PIC: calll L112$pb ; DARWIN-32-PIC-NEXT: L112$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7272,7 +7272,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat02: -; DARWIN-32-PIC: call L113$pb +; DARWIN-32-PIC: calll L113$pb ; DARWIN-32-PIC-NEXT: L113$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L113$pb(%eax), %eax @@ -7336,7 +7336,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat03: -; DARWIN-32-PIC: call L114$pb +; DARWIN-32-PIC: calll L114$pb ; DARWIN-32-PIC-NEXT: L114$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7395,7 +7395,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat04: -; DARWIN-32-PIC: call L115$pb +; DARWIN-32-PIC: calll L115$pb ; DARWIN-32-PIC-NEXT: L115$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7461,7 +7461,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat05: -; DARWIN-32-PIC: call L116$pb +; DARWIN-32-PIC: calll L116$pb ; DARWIN-32-PIC-NEXT: L116$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7521,7 +7521,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat06: -; DARWIN-32-PIC: call L117$pb +; DARWIN-32-PIC: calll L117$pb ; DARWIN-32-PIC-NEXT: L117$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7580,7 +7580,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat07: -; DARWIN-32-PIC: call L118$pb +; DARWIN-32-PIC: calll L118$pb ; DARWIN-32-PIC-NEXT: L118$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7645,7 +7645,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cat08: -; DARWIN-32-PIC: call L119$pb +; DARWIN-32-PIC: calll L119$pb ; DARWIN-32-PIC-NEXT: L119$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7706,7 +7706,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam00: -; DARWIN-32-PIC: call L120$pb +; DARWIN-32-PIC: calll L120$pb ; DARWIN-32-PIC-NEXT: L120$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7767,7 +7767,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cxm00: -; DARWIN-32-PIC: call L121$pb +; DARWIN-32-PIC: calll L121$pb ; DARWIN-32-PIC-NEXT: L121$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7828,7 +7828,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam01: -; DARWIN-32-PIC: call L122$pb +; DARWIN-32-PIC: calll L122$pb ; DARWIN-32-PIC-NEXT: L122$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7889,7 +7889,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cxm01: -; DARWIN-32-PIC: call L123$pb +; DARWIN-32-PIC: calll L123$pb ; DARWIN-32-PIC-NEXT: L123$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -7957,7 +7957,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam02: -; DARWIN-32-PIC: call L124$pb +; DARWIN-32-PIC: calll L124$pb ; DARWIN-32-PIC-NEXT: L124$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L124$pb(%eax), %eax @@ -8021,7 +8021,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam03: -; DARWIN-32-PIC: call L125$pb +; DARWIN-32-PIC: calll L125$pb ; DARWIN-32-PIC-NEXT: L125$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -8080,7 +8080,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam04: -; DARWIN-32-PIC: call L126$pb +; DARWIN-32-PIC: calll L126$pb ; DARWIN-32-PIC-NEXT: L126$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -8146,7 +8146,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam05: -; DARWIN-32-PIC: call L127$pb +; DARWIN-32-PIC: calll L127$pb ; DARWIN-32-PIC-NEXT: L127$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -8206,7 +8206,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam06: -; DARWIN-32-PIC: call L128$pb +; DARWIN-32-PIC: calll L128$pb ; DARWIN-32-PIC-NEXT: L128$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -8265,7 +8265,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam07: -; DARWIN-32-PIC: call L129$pb +; DARWIN-32-PIC: calll L129$pb ; DARWIN-32-PIC-NEXT: L129$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -8330,7 +8330,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _cam08: -; DARWIN-32-PIC: call L130$pb +; DARWIN-32-PIC: calll L130$pb ; DARWIN-32-PIC-NEXT: L130$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx @@ -8375,31 +8375,32 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: lcallee: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call x -; LINUX-32-STATIC-NEXT: call x -; LINUX-32-STATIC-NEXT: call x -; LINUX-32-STATIC-NEXT: call x -; LINUX-32-STATIC-NEXT: call x -; LINUX-32-STATIC-NEXT: call x -; LINUX-32-STATIC-NEXT: call x -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll x +; LINUX-32-STATIC-NEXT: calll x +; LINUX-32-STATIC-NEXT: calll x +; LINUX-32-STATIC-NEXT: calll x +; LINUX-32-STATIC-NEXT: calll x +; LINUX-32-STATIC-NEXT: calll x +; LINUX-32-STATIC-NEXT: calll x +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: lcallee: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call x -; LINUX-32-PIC-NEXT: call x -; LINUX-32-PIC-NEXT: call x -; LINUX-32-PIC-NEXT: call x -; LINUX-32-PIC-NEXT: call x -; LINUX-32-PIC-NEXT: call x -; LINUX-32-PIC-NEXT: call x -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll x +; LINUX-32-PIC-NEXT: calll x +; LINUX-32-PIC-NEXT: calll x +; LINUX-32-PIC-NEXT: calll x +; LINUX-32-PIC-NEXT: calll x +; LINUX-32-PIC-NEXT: calll x +; LINUX-32-PIC-NEXT: calll x +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: lcallee: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT @@ -8407,47 +8408,47 @@ entry: ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT ; LINUX-64-PIC-NEXT: callq x@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _lcallee: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call _x -; DARWIN-32-STATIC-NEXT: call _x -; DARWIN-32-STATIC-NEXT: call _x -; DARWIN-32-STATIC-NEXT: call _x -; DARWIN-32-STATIC-NEXT: call _x -; DARWIN-32-STATIC-NEXT: call _x -; DARWIN-32-STATIC-NEXT: call _x +; DARWIN-32-STATIC-NEXT: calll _x +; DARWIN-32-STATIC-NEXT: calll _x +; DARWIN-32-STATIC-NEXT: calll _x +; DARWIN-32-STATIC-NEXT: calll _x +; DARWIN-32-STATIC-NEXT: calll _x +; DARWIN-32-STATIC-NEXT: calll _x +; DARWIN-32-STATIC-NEXT: calll _x ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _lcallee: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call L_x$stub -; DARWIN-32-DYNAMIC-NEXT: call L_x$stub -; DARWIN-32-DYNAMIC-NEXT: call L_x$stub -; DARWIN-32-DYNAMIC-NEXT: call L_x$stub -; DARWIN-32-DYNAMIC-NEXT: call L_x$stub -; DARWIN-32-DYNAMIC-NEXT: call L_x$stub -; DARWIN-32-DYNAMIC-NEXT: call L_x$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_x$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_x$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_x$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_x$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_x$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_x$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_x$stub ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _lcallee: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call L_x$stub -; DARWIN-32-PIC-NEXT: call L_x$stub -; DARWIN-32-PIC-NEXT: call L_x$stub -; DARWIN-32-PIC-NEXT: call L_x$stub -; DARWIN-32-PIC-NEXT: call L_x$stub -; DARWIN-32-PIC-NEXT: call L_x$stub -; DARWIN-32-PIC-NEXT: call L_x$stub +; DARWIN-32-PIC-NEXT: calll L_x$stub +; DARWIN-32-PIC-NEXT: calll L_x$stub +; DARWIN-32-PIC-NEXT: calll L_x$stub +; DARWIN-32-PIC-NEXT: calll L_x$stub +; DARWIN-32-PIC-NEXT: calll L_x$stub +; DARWIN-32-PIC-NEXT: calll L_x$stub +; DARWIN-32-PIC-NEXT: calll L_x$stub ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _lcallee: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: callq _x @@ -8455,11 +8456,11 @@ entry: ; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: callq _x ; DARWIN-64-STATIC-NEXT: callq _x -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _lcallee: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: callq _x @@ -8467,11 +8468,11 @@ entry: ; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: callq _x ; DARWIN-64-DYNAMIC-NEXT: callq _x -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _lcallee: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: callq _x @@ -8479,7 +8480,7 @@ entry: ; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: callq _x ; DARWIN-64-PIC-NEXT: callq _x -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8506,31 +8507,32 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dcallee: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call y -; LINUX-32-STATIC-NEXT: call y -; LINUX-32-STATIC-NEXT: call y -; LINUX-32-STATIC-NEXT: call y -; LINUX-32-STATIC-NEXT: call y -; LINUX-32-STATIC-NEXT: call y -; LINUX-32-STATIC-NEXT: call y -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll y +; LINUX-32-STATIC-NEXT: calll y +; LINUX-32-STATIC-NEXT: calll y +; LINUX-32-STATIC-NEXT: calll y +; LINUX-32-STATIC-NEXT: calll y +; LINUX-32-STATIC-NEXT: calll y +; LINUX-32-STATIC-NEXT: calll y +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: dcallee: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call y -; LINUX-32-PIC-NEXT: call y -; LINUX-32-PIC-NEXT: call y -; LINUX-32-PIC-NEXT: call y -; LINUX-32-PIC-NEXT: call y -; LINUX-32-PIC-NEXT: call y -; LINUX-32-PIC-NEXT: call y -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll y +; LINUX-32-PIC-NEXT: calll y +; LINUX-32-PIC-NEXT: calll y +; LINUX-32-PIC-NEXT: calll y +; LINUX-32-PIC-NEXT: calll y +; LINUX-32-PIC-NEXT: calll y +; LINUX-32-PIC-NEXT: calll y +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: dcallee: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT @@ -8538,47 +8540,47 @@ entry: ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT ; LINUX-64-PIC-NEXT: callq y@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _dcallee: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call _y -; DARWIN-32-STATIC-NEXT: call _y -; DARWIN-32-STATIC-NEXT: call _y -; DARWIN-32-STATIC-NEXT: call _y -; DARWIN-32-STATIC-NEXT: call _y -; DARWIN-32-STATIC-NEXT: call _y -; DARWIN-32-STATIC-NEXT: call _y +; DARWIN-32-STATIC-NEXT: calll _y +; DARWIN-32-STATIC-NEXT: calll _y +; DARWIN-32-STATIC-NEXT: calll _y +; DARWIN-32-STATIC-NEXT: calll _y +; DARWIN-32-STATIC-NEXT: calll _y +; DARWIN-32-STATIC-NEXT: calll _y +; DARWIN-32-STATIC-NEXT: calll _y ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _dcallee: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call L_y$stub -; DARWIN-32-DYNAMIC-NEXT: call L_y$stub -; DARWIN-32-DYNAMIC-NEXT: call L_y$stub -; DARWIN-32-DYNAMIC-NEXT: call L_y$stub -; DARWIN-32-DYNAMIC-NEXT: call L_y$stub -; DARWIN-32-DYNAMIC-NEXT: call L_y$stub -; DARWIN-32-DYNAMIC-NEXT: call L_y$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_y$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_y$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_y$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_y$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_y$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_y$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_y$stub ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _dcallee: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call L_y$stub -; DARWIN-32-PIC-NEXT: call L_y$stub -; DARWIN-32-PIC-NEXT: call L_y$stub -; DARWIN-32-PIC-NEXT: call L_y$stub -; DARWIN-32-PIC-NEXT: call L_y$stub -; DARWIN-32-PIC-NEXT: call L_y$stub -; DARWIN-32-PIC-NEXT: call L_y$stub +; DARWIN-32-PIC-NEXT: calll L_y$stub +; DARWIN-32-PIC-NEXT: calll L_y$stub +; DARWIN-32-PIC-NEXT: calll L_y$stub +; DARWIN-32-PIC-NEXT: calll L_y$stub +; DARWIN-32-PIC-NEXT: calll L_y$stub +; DARWIN-32-PIC-NEXT: calll L_y$stub +; DARWIN-32-PIC-NEXT: calll L_y$stub ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _dcallee: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: callq _y @@ -8586,11 +8588,11 @@ entry: ; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: callq _y ; DARWIN-64-STATIC-NEXT: callq _y -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dcallee: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: callq _y @@ -8598,11 +8600,11 @@ entry: ; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: callq _y ; DARWIN-64-DYNAMIC-NEXT: callq _y -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dcallee: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: callq _y @@ -8610,7 +8612,7 @@ entry: ; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: callq _y ; DARWIN-64-PIC-NEXT: callq _y -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8644,7 +8646,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _address: -; DARWIN-32-PIC: call L133$pb +; DARWIN-32-PIC: calll L133$pb ; DARWIN-32-PIC-NEXT: L133$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_callee$non_lazy_ptr-L133$pb(%eax), %eax @@ -8693,7 +8695,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _laddress: -; DARWIN-32-PIC: call L134$pb +; DARWIN-32-PIC: calll L134$pb ; DARWIN-32-PIC-NEXT: L134$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _lcallee-L134$pb(%eax), %eax @@ -8740,7 +8742,7 @@ entry: ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _daddress: -; DARWIN-32-PIC: call L135$pb +; DARWIN-32-PIC: calll L135$pb ; DARWIN-32-PIC-NEXT: L135$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: leal _dcallee-L135$pb(%eax), %eax @@ -8770,66 +8772,67 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: caller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call callee -; LINUX-32-STATIC-NEXT: call callee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll callee +; LINUX-32-STATIC-NEXT: calll callee +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: caller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call callee -; LINUX-32-PIC-NEXT: call callee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll callee +; LINUX-32-PIC-NEXT: calll callee +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: caller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq callee@PLT ; LINUX-64-PIC-NEXT: callq callee@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _caller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call _callee -; DARWIN-32-STATIC-NEXT: call _callee +; DARWIN-32-STATIC-NEXT: calll _callee +; DARWIN-32-STATIC-NEXT: calll _callee ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _caller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub -; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_callee$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_callee$stub ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _caller: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call L_callee$stub -; DARWIN-32-PIC-NEXT: call L_callee$stub +; DARWIN-32-PIC-NEXT: calll L_callee$stub +; DARWIN-32-PIC-NEXT: calll L_callee$stub ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _caller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _callee ; DARWIN-64-STATIC-NEXT: callq _callee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _caller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _callee ; DARWIN-64-DYNAMIC-NEXT: callq _callee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _caller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _callee ; DARWIN-64-PIC-NEXT: callq _callee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8844,66 +8847,67 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dcaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call dcallee -; LINUX-32-STATIC-NEXT: call dcallee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll dcallee +; LINUX-32-STATIC-NEXT: calll dcallee +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: dcaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call dcallee -; LINUX-32-PIC-NEXT: call dcallee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll dcallee +; LINUX-32-PIC-NEXT: calll dcallee +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: dcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq dcallee ; LINUX-64-PIC-NEXT: callq dcallee -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _dcaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call _dcallee -; DARWIN-32-STATIC-NEXT: call _dcallee +; DARWIN-32-STATIC-NEXT: calll _dcallee +; DARWIN-32-STATIC-NEXT: calll _dcallee ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _dcaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call _dcallee -; DARWIN-32-DYNAMIC-NEXT: call _dcallee +; DARWIN-32-DYNAMIC-NEXT: calll _dcallee +; DARWIN-32-DYNAMIC-NEXT: calll _dcallee ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _dcaller: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call _dcallee -; DARWIN-32-PIC-NEXT: call _dcallee +; DARWIN-32-PIC-NEXT: calll _dcallee +; DARWIN-32-PIC-NEXT: calll _dcallee ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _dcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _dcallee ; DARWIN-64-STATIC-NEXT: callq _dcallee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _dcallee ; DARWIN-64-DYNAMIC-NEXT: callq _dcallee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _dcallee ; DARWIN-64-PIC-NEXT: callq _dcallee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8918,66 +8922,67 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: lcaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call lcallee -; LINUX-32-STATIC-NEXT: call lcallee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll lcallee +; LINUX-32-STATIC-NEXT: calll lcallee +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: lcaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call lcallee -; LINUX-32-PIC-NEXT: call lcallee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll lcallee +; LINUX-32-PIC-NEXT: calll lcallee +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: lcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq lcallee@PLT ; LINUX-64-PIC-NEXT: callq lcallee@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _lcaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call _lcallee -; DARWIN-32-STATIC-NEXT: call _lcallee +; DARWIN-32-STATIC-NEXT: calll _lcallee +; DARWIN-32-STATIC-NEXT: calll _lcallee ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _lcaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call _lcallee -; DARWIN-32-DYNAMIC-NEXT: call _lcallee +; DARWIN-32-DYNAMIC-NEXT: calll _lcallee +; DARWIN-32-DYNAMIC-NEXT: calll _lcallee ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _lcaller: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call _lcallee -; DARWIN-32-PIC-NEXT: call _lcallee +; DARWIN-32-PIC-NEXT: calll _lcallee +; DARWIN-32-PIC-NEXT: calll _lcallee ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _lcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _lcallee ; DARWIN-64-STATIC-NEXT: callq _lcallee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _lcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _lcallee ; DARWIN-64-DYNAMIC-NEXT: callq _lcallee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _lcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _lcallee ; DARWIN-64-PIC-NEXT: callq _lcallee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -8990,57 +8995,58 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: tailcaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call callee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll callee +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: tailcaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call callee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll callee +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: tailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq callee@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _tailcaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call _callee +; DARWIN-32-STATIC-NEXT: calll _callee ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _tailcaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub +; DARWIN-32-DYNAMIC-NEXT: calll L_callee$stub ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _tailcaller: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call L_callee$stub +; DARWIN-32-PIC-NEXT: calll L_callee$stub ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _tailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _callee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _tailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _callee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _tailcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _callee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9053,57 +9059,58 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dtailcaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call dcallee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll dcallee +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: dtailcaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call dcallee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll dcallee +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: dtailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq dcallee -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _dtailcaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call _dcallee +; DARWIN-32-STATIC-NEXT: calll _dcallee ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _dtailcaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call _dcallee +; DARWIN-32-DYNAMIC-NEXT: calll _dcallee ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _dtailcaller: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call _dcallee +; DARWIN-32-PIC-NEXT: calll _dcallee ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _dtailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _dcallee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dtailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _dcallee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dtailcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _dcallee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9116,57 +9123,58 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: ltailcaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call lcallee -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll lcallee +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: ltailcaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call lcallee -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll lcallee +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: ltailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq lcallee@PLT -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _ltailcaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call _lcallee +; DARWIN-32-STATIC-NEXT: calll _lcallee ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _ltailcaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call _lcallee +; DARWIN-32-DYNAMIC-NEXT: calll _lcallee ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ltailcaller: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call _lcallee +; DARWIN-32-PIC-NEXT: calll _lcallee ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _ltailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq _lcallee -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _ltailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq _lcallee -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _ltailcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq _lcallee -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9183,17 +9191,18 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: icaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call *ifunc -; LINUX-32-STATIC-NEXT: call *ifunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll *ifunc +; LINUX-32-STATIC-NEXT: calll *ifunc +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: icaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call *ifunc -; LINUX-32-PIC-NEXT: call *ifunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll *ifunc +; LINUX-32-PIC-NEXT: calll *ifunc +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: icaller: @@ -9206,8 +9215,8 @@ entry: ; DARWIN-32-STATIC: _icaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call *_ifunc -; DARWIN-32-STATIC-NEXT: call *_ifunc +; DARWIN-32-STATIC-NEXT: calll *_ifunc +; DARWIN-32-STATIC-NEXT: calll *_ifunc ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret @@ -9215,8 +9224,8 @@ entry: ; DARWIN-32-DYNAMIC: pushl %esi ; DARWIN-32-DYNAMIC-NEXT: subl $8, %esp ; DARWIN-32-DYNAMIC-NEXT: movl L_ifunc$non_lazy_ptr, %esi -; DARWIN-32-DYNAMIC-NEXT: call *(%esi) -; DARWIN-32-DYNAMIC-NEXT: call *(%esi) +; DARWIN-32-DYNAMIC-NEXT: calll *(%esi) +; DARWIN-32-DYNAMIC-NEXT: calll *(%esi) ; DARWIN-32-DYNAMIC-NEXT: addl $8, %esp ; DARWIN-32-DYNAMIC-NEXT: popl %esi ; DARWIN-32-DYNAMIC-NEXT: ret @@ -9224,12 +9233,12 @@ entry: ; DARWIN-32-PIC: _icaller: ; DARWIN-32-PIC: pushl %esi ; DARWIN-32-PIC-NEXT: subl $8, %esp -; DARWIN-32-PIC-NEXT: call L142$pb +; DARWIN-32-PIC-NEXT: calll L142$pb ; DARWIN-32-PIC-NEXT: L142$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_ifunc$non_lazy_ptr-L142$pb(%eax), %esi -; DARWIN-32-PIC-NEXT: call *(%esi) -; DARWIN-32-PIC-NEXT: call *(%esi) +; DARWIN-32-PIC-NEXT: calll *(%esi) +; DARWIN-32-PIC-NEXT: calll *(%esi) ; DARWIN-32-PIC-NEXT: addl $8, %esp ; DARWIN-32-PIC-NEXT: popl %esi ; DARWIN-32-PIC-NEXT: ret @@ -9272,17 +9281,18 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: dicaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call *difunc -; LINUX-32-STATIC-NEXT: call *difunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll *difunc +; LINUX-32-STATIC-NEXT: calll *difunc +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: dicaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call *difunc -; LINUX-32-PIC-NEXT: call *difunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll *difunc +; LINUX-32-PIC-NEXT: calll *difunc +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: dicaller: @@ -9295,49 +9305,49 @@ entry: ; DARWIN-32-STATIC: _dicaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call *_difunc -; DARWIN-32-STATIC-NEXT: call *_difunc +; DARWIN-32-STATIC-NEXT: calll *_difunc +; DARWIN-32-STATIC-NEXT: calll *_difunc ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _dicaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call *_difunc -; DARWIN-32-DYNAMIC-NEXT: call *_difunc +; DARWIN-32-DYNAMIC-NEXT: calll *_difunc +; DARWIN-32-DYNAMIC-NEXT: calll *_difunc ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _dicaller: ; DARWIN-32-PIC: pushl %esi ; DARWIN-32-PIC-NEXT: subl $8, %esp -; DARWIN-32-PIC-NEXT: call L143$pb +; DARWIN-32-PIC-NEXT: calll L143$pb ; DARWIN-32-PIC-NEXT: L143$pb: ; DARWIN-32-PIC-NEXT: popl %esi -; DARWIN-32-PIC-NEXT: call *_difunc-L143$pb(%esi) -; DARWIN-32-PIC-NEXT: call *_difunc-L143$pb(%esi) +; DARWIN-32-PIC-NEXT: calll *_difunc-L143$pb(%esi) +; DARWIN-32-PIC-NEXT: calll *_difunc-L143$pb(%esi) ; DARWIN-32-PIC-NEXT: addl $8, %esp ; DARWIN-32-PIC-NEXT: popl %esi ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _dicaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _dicaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _dicaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq *_difunc(%rip) ; DARWIN-64-PIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9354,71 +9364,72 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: licaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call *lifunc -; LINUX-32-STATIC-NEXT: call *lifunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll *lifunc +; LINUX-32-STATIC-NEXT: calll *lifunc +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: licaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call *lifunc -; LINUX-32-PIC-NEXT: call *lifunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll *lifunc +; LINUX-32-PIC-NEXT: calll *lifunc +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: licaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _licaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call *_lifunc -; DARWIN-32-STATIC-NEXT: call *_lifunc +; DARWIN-32-STATIC-NEXT: calll *_lifunc +; DARWIN-32-STATIC-NEXT: calll *_lifunc ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _licaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call *_lifunc -; DARWIN-32-DYNAMIC-NEXT: call *_lifunc +; DARWIN-32-DYNAMIC-NEXT: calll *_lifunc +; DARWIN-32-DYNAMIC-NEXT: calll *_lifunc ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _licaller: ; DARWIN-32-PIC: pushl %esi ; DARWIN-32-PIC-NEXT: subl $8, %esp -; DARWIN-32-PIC-NEXT: call L144$pb +; DARWIN-32-PIC-NEXT: calll L144$pb ; DARWIN-32-PIC-NEXT: L144$pb: ; DARWIN-32-PIC-NEXT: popl %esi -; DARWIN-32-PIC-NEXT: call *_lifunc-L144$pb(%esi) -; DARWIN-32-PIC-NEXT: call *_lifunc-L144$pb(%esi) +; DARWIN-32-PIC-NEXT: calll *_lifunc-L144$pb(%esi) +; DARWIN-32-PIC-NEXT: calll *_lifunc-L144$pb(%esi) ; DARWIN-32-PIC-NEXT: addl $8, %esp ; DARWIN-32-PIC-NEXT: popl %esi ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _licaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _licaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _licaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) ; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9435,17 +9446,18 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: itailcaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call *ifunc -; LINUX-32-STATIC-NEXT: call *ifunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll *ifunc +; LINUX-32-STATIC-NEXT: calll *ifunc +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: itailcaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call *ifunc -; LINUX-32-PIC-NEXT: call *ifunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll *ifunc +; LINUX-32-PIC-NEXT: calll *ifunc +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: itailcaller: @@ -9458,8 +9470,8 @@ entry: ; DARWIN-32-STATIC: _itailcaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call *_ifunc -; DARWIN-32-STATIC-NEXT: call *_ifunc +; DARWIN-32-STATIC-NEXT: calll *_ifunc +; DARWIN-32-STATIC-NEXT: calll *_ifunc ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret @@ -9467,8 +9479,8 @@ entry: ; DARWIN-32-DYNAMIC: pushl %esi ; DARWIN-32-DYNAMIC-NEXT: subl $8, %esp ; DARWIN-32-DYNAMIC-NEXT: movl L_ifunc$non_lazy_ptr, %esi -; DARWIN-32-DYNAMIC-NEXT: call *(%esi) -; DARWIN-32-DYNAMIC-NEXT: call *(%esi) +; DARWIN-32-DYNAMIC-NEXT: calll *(%esi) +; DARWIN-32-DYNAMIC-NEXT: calll *(%esi) ; DARWIN-32-DYNAMIC-NEXT: addl $8, %esp ; DARWIN-32-DYNAMIC-NEXT: popl %esi ; DARWIN-32-DYNAMIC-NEXT: ret @@ -9476,12 +9488,12 @@ entry: ; DARWIN-32-PIC: _itailcaller: ; DARWIN-32-PIC: pushl %esi ; DARWIN-32-PIC-NEXT: subl $8, %esp -; DARWIN-32-PIC-NEXT: call L145$pb +; DARWIN-32-PIC-NEXT: calll L145$pb ; DARWIN-32-PIC-NEXT: L145$pb: ; DARWIN-32-PIC-NEXT: popl %eax ; DARWIN-32-PIC-NEXT: movl L_ifunc$non_lazy_ptr-L145$pb(%eax), %esi -; DARWIN-32-PIC-NEXT: call *(%esi) -; DARWIN-32-PIC-NEXT: call *(%esi) +; DARWIN-32-PIC-NEXT: calll *(%esi) +; DARWIN-32-PIC-NEXT: calll *(%esi) ; DARWIN-32-PIC-NEXT: addl $8, %esp ; DARWIN-32-PIC-NEXT: popl %esi ; DARWIN-32-PIC-NEXT: ret @@ -9521,60 +9533,61 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: ditailcaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call *difunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll *difunc +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: ditailcaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call *difunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll *difunc +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: ditailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), %rax ; LINUX-64-PIC-NEXT: callq *(%rax) -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _ditailcaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call *_difunc +; DARWIN-32-STATIC-NEXT: calll *_difunc ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _ditailcaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call *_difunc +; DARWIN-32-DYNAMIC-NEXT: calll *_difunc ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _ditailcaller: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call L146$pb +; DARWIN-32-PIC-NEXT: calll L146$pb ; DARWIN-32-PIC-NEXT: L146$pb: ; DARWIN-32-PIC-NEXT: popl %eax -; DARWIN-32-PIC-NEXT: call *_difunc-L146$pb(%eax) +; DARWIN-32-PIC-NEXT: calll *_difunc-L146$pb(%eax) ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _ditailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _ditailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq *_difunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _ditailcaller: ; DARWIN-64-PIC: callq *_difunc(%rip) -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } @@ -9588,59 +9601,60 @@ entry: ; LINUX-64-STATIC: ret ; LINUX-32-STATIC: litailcaller: -; LINUX-32-STATIC: subl $4, %esp -; LINUX-32-STATIC-NEXT: call *lifunc -; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC: subl +; LINUX-32-STATIC-NEXT: calll *lifunc +; LINUX-32-STATIC-NEXT: addl ; LINUX-32-STATIC-NEXT: ret ; LINUX-32-PIC: litailcaller: -; LINUX-32-PIC: subl $4, %esp -; LINUX-32-PIC-NEXT: call *lifunc -; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC: subl +; LINUX-32-PIC-NEXT: calll *lifunc +; LINUX-32-PIC-NEXT: addl + ; LINUX-32-PIC-NEXT: ret ; LINUX-64-PIC: litailcaller: -; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC: pushq ; LINUX-64-PIC-NEXT: callq *lifunc(%rip) -; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: popq ; LINUX-64-PIC-NEXT: ret ; DARWIN-32-STATIC: _litailcaller: ; DARWIN-32-STATIC: subl $12, %esp -; DARWIN-32-STATIC-NEXT: call *_lifunc +; DARWIN-32-STATIC-NEXT: calll *_lifunc ; DARWIN-32-STATIC-NEXT: addl $12, %esp ; DARWIN-32-STATIC-NEXT: ret ; DARWIN-32-DYNAMIC: _litailcaller: ; DARWIN-32-DYNAMIC: subl $12, %esp -; DARWIN-32-DYNAMIC-NEXT: call *_lifunc +; DARWIN-32-DYNAMIC-NEXT: calll *_lifunc ; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp ; DARWIN-32-DYNAMIC-NEXT: ret ; DARWIN-32-PIC: _litailcaller: ; DARWIN-32-PIC: subl $12, %esp -; DARWIN-32-PIC-NEXT: call L147$pb +; DARWIN-32-PIC-NEXT: calll L147$pb ; DARWIN-32-PIC-NEXT: L147$pb: ; DARWIN-32-PIC-NEXT: popl %eax -; DARWIN-32-PIC-NEXT: call *_lifunc-L147$pb(%eax) +; DARWIN-32-PIC-NEXT: calll *_lifunc-L147$pb(%eax) ; DARWIN-32-PIC-NEXT: addl $12, %esp ; DARWIN-32-PIC-NEXT: ret ; DARWIN-64-STATIC: _litailcaller: -; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC: pushq ; DARWIN-64-STATIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: popq ; DARWIN-64-STATIC-NEXT: ret ; DARWIN-64-DYNAMIC: _litailcaller: -; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC: pushq ; DARWIN-64-DYNAMIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: popq ; DARWIN-64-DYNAMIC-NEXT: ret ; DARWIN-64-PIC: _litailcaller: -; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC: pushq ; DARWIN-64-PIC-NEXT: callq *_lifunc(%rip) -; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: popq ; DARWIN-64-PIC-NEXT: ret } diff --git a/test/CodeGen/X86/add-of-carry.ll b/test/CodeGen/X86/add-of-carry.ll new file mode 100644 index 000000000000..f924ec8132ee --- /dev/null +++ b/test/CodeGen/X86/add-of-carry.ll @@ -0,0 +1,34 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; <rdar://problem/8449754> + +define i32 @test1(i32 %sum, i32 %x) nounwind readnone ssp { +entry: +; CHECK: test1: +; CHECK: sbbl %ecx, %ecx +; CHECK-NOT: addl +; CHECK: subl %ecx, %eax + %add4 = add i32 %x, %sum + %cmp = icmp ult i32 %add4, %x + %inc = zext i1 %cmp to i32 + %z.0 = add i32 %add4, %inc + ret i32 %z.0 +} + +; Instcombine transforms test1 into test2: +; CHECK: test2: +; CHECK: movl +; CHECK-NEXT: addl +; CHECK-NEXT: sbbl +; CHECK-NEXT: subl +; CHECK-NEXT: ret +define i32 @test2(i32 %sum, i32 %x) nounwind readnone ssp { +entry: + %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x, i32 %sum) + %0 = extractvalue { i32, i1 } %uadd, 0 + %cmp = extractvalue { i32, i1 } %uadd, 1 + %inc = zext i1 %cmp to i32 + %z.0 = add i32 %0, %inc + ret i32 %z.0 +} + +declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone diff --git a/test/CodeGen/X86/add.ll b/test/CodeGen/X86/add.ll index 3991a6849f3e..3ec5358affb3 100644 --- a/test/CodeGen/X86/add.ll +++ b/test/CodeGen/X86/add.ll @@ -92,3 +92,43 @@ define i64 @test6(i64 %A, i32 %B) nounwind { ; X64: ret } +define {i32, i1} @test7(i32 %v1, i32 %v2) nounwind { + %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2) + ret {i32, i1} %t +} + +; X64: test7: +; X64: addl %esi, %eax +; X64-NEXT: setb %dl +; X64-NEXT: ret + +; PR5443 +define {i64, i1} @test8(i64 %left, i64 %right) nounwind { +entry: + %extleft = zext i64 %left to i65 + %extright = zext i64 %right to i65 + %sum = add i65 %extleft, %extright + %res.0 = trunc i65 %sum to i64 + %overflow = and i65 %sum, -18446744073709551616 + %res.1 = icmp ne i65 %overflow, 0 + %final0 = insertvalue {i64, i1} undef, i64 %res.0, 0 + %final1 = insertvalue {i64, i1} %final0, i1 %res.1, 1 + ret {i64, i1} %final1 +} + +; X64: test8: +; X64: addq +; X64-NEXT: sbbq +; X64-NEXT: testb + +define i32 @test9(i32 %x, i32 %y) nounwind readnone { + %cmp = icmp eq i32 %x, 10 + %sub = sext i1 %cmp to i32 + %cond = add i32 %sub, %y + ret i32 %cond +; X64: test9: +; X64: cmpl $10 +; X64: sete +; X64: subl +; X64: ret +} diff --git a/test/CodeGen/X86/addr-label-difference.ll b/test/CodeGen/X86/addr-label-difference.ll index be0908aa1a9d..49abd8a92e64 100644 --- a/test/CodeGen/X86/addr-label-difference.ll +++ b/test/CodeGen/X86/addr-label-difference.ll @@ -5,7 +5,7 @@ target triple = "i386-apple-darwin10.0" ; This array should go into the __TEXT,__const section, not into the ; __DATA,__const section, because the elements don't need relocations. -@test.array = internal constant [3 x i32] [i32 sub (i32 ptrtoint (i8* blockaddress(@test, %foo) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %bar) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %hack) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32))] ; <[3 x i32]*> [#uses=1] +@test.array = internal unnamed_addr constant [3 x i32] [i32 sub (i32 ptrtoint (i8* blockaddress(@test, %foo) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %bar) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32)), i32 sub (i32 ptrtoint (i8* blockaddress(@test, %hack) to i32), i32 ptrtoint (i8* blockaddress(@test, %foo) to i32))] ; <[3 x i32]*> [#uses=1] define void @test(i32 %i) nounwind ssp { entry: diff --git a/test/CodeGen/X86/alldiv-divdi3.ll b/test/CodeGen/X86/alldiv-divdi3.ll new file mode 100644 index 000000000000..86aa1fde1957 --- /dev/null +++ b/test/CodeGen/X86/alldiv-divdi3.ll @@ -0,0 +1,17 @@ +; Test that, for a 64 bit signed div, a libcall to alldiv is made on Windows +; unless we have libgcc. + +; RUN: llc < %s -mtriple i386-pc-win32 | FileCheck %s +; RUN: llc < %s -mtriple i386-pc-cygwin | FileCheck %s -check-prefix USEDIVDI +; RUN: llc < %s -mtriple i386-pc-mingw32 | FileCheck %s -check-prefix USEDIVDI + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readonly { +entry: + %conv4 = sext i32 %argc to i64 + %div = sdiv i64 84, %conv4 + %conv7 = trunc i64 %div to i32 + ret i32 %conv7 +} + +; CHECK: alldiv +; USEDIVDI: divdi3 diff --git a/test/CodeGen/X86/andimm8.ll b/test/CodeGen/X86/andimm8.ll new file mode 100644 index 000000000000..640237d0b504 --- /dev/null +++ b/test/CodeGen/X86/andimm8.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s + +; PR8365 +; CHECK: andl $-64, %edi # encoding: [0x83,0xe7,0xc0] + +define i64 @bra(i32 %zed) nounwind { + %t1 = zext i32 %zed to i64 + %t2 = and i64 %t1, 4294967232 + ret i64 %t2 +} + +; CHECK: orq $2, %rdi # encoding: [0x48,0x83,0xcf,0x02] + +define void @foo(i64 %zed, i64* %x) nounwind { + %t1 = and i64 %zed, -4 + %t2 = or i64 %t1, 2 + store i64 %t2, i64* %x, align 8 + ret void +} diff --git a/test/CodeGen/X86/apm.ll b/test/CodeGen/X86/apm.ll new file mode 100644 index 000000000000..d0c64f243386 --- /dev/null +++ b/test/CodeGen/X86/apm.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s -o - -march=x86-64 | FileCheck %s +; PR8573 + +; CHECK: foo: +; CHECK: leaq (%rdi), %rax +; CHECK-NEXT: movl %esi, %ecx +; CHECK-NEXT: monitor +define void @foo(i8* %P, i32 %E, i32 %H) nounwind { +entry: + tail call void @llvm.x86.sse3.monitor(i8* %P, i32 %E, i32 %H) + ret void +} + +declare void @llvm.x86.sse3.monitor(i8*, i32, i32) nounwind + +; CHECK: bar: +; CHECK: movl %edi, %ecx +; CHECK-NEXT: movl %esi, %eax +; CHECK-NEXT: mwait +define void @bar(i32 %E, i32 %H) nounwind { +entry: + tail call void @llvm.x86.sse3.mwait(i32 %E, i32 %H) + ret void +} + +declare void @llvm.x86.sse3.mwait(i32, i32) nounwind diff --git a/test/CodeGen/X86/atomic_op.ll b/test/CodeGen/X86/atomic_op.ll index 3ef1887083d0..f3ade93c8a30 100644 --- a/test/CodeGen/X86/atomic_op.ll +++ b/test/CodeGen/X86/atomic_op.ll @@ -1,16 +1,8 @@ -; RUN: llc < %s -march=x86 -o %t1 -; RUN: grep "lock" %t1 | count 17 -; RUN: grep "xaddl" %t1 | count 4 -; RUN: grep "cmpxchgl" %t1 | count 13 -; RUN: grep "xchgl" %t1 | count 14 -; RUN: grep "cmova" %t1 | count 2 -; RUN: grep "cmovb" %t1 | count 2 -; RUN: grep "cmovg" %t1 | count 2 -; RUN: grep "cmovl" %t1 | count 2 +; RUN: llc < %s -march=x86 | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -define void @main(i32 %argc, i8** %argv) { +define void @func(i32 %argc, i8** %argv) nounwind { entry: %argc.addr = alloca i32 ; <i32*> [#uses=1] %argv.addr = alloca i8** ; <i8***> [#uses=1] @@ -29,48 +21,105 @@ entry: store i32 3855, i32* %ort store i32 3855, i32* %xort store i32 4, i32* %temp - %tmp = load i32* %temp ; <i32> [#uses=1] + %tmp = load i32* %temp + ; CHECK: lock + ; CHECK: xaddl call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val1, i32 %tmp ) ; <i32>:0 [#uses=1] store i32 %0, i32* %old + ; CHECK: lock + ; CHECK: xaddl call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 30 ) ; <i32>:1 [#uses=1] store i32 %1, i32* %old + ; CHECK: lock + ; CHECK: xaddl call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:2 [#uses=1] store i32 %2, i32* %old + ; CHECK: lock + ; CHECK: xaddl call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:3 [#uses=1] store i32 %3, i32* %old + ; CHECK: andl + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.and.i32.p0i32( i32* %andt, i32 4080 ) ; <i32>:4 [#uses=1] store i32 %4, i32* %old + ; CHECK: orl + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ort, i32 4080 ) ; <i32>:5 [#uses=1] store i32 %5, i32* %old + ; CHECK: xorl + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %xort, i32 4080 ) ; <i32>:6 [#uses=1] store i32 %6, i32* %old + ; CHECK: cmov + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 16 ) ; <i32>:7 [#uses=1] store i32 %7, i32* %old %neg = sub i32 0, 1 ; <i32> [#uses=1] + ; CHECK: cmov + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 %neg ) ; <i32>:8 [#uses=1] store i32 %8, i32* %old + ; CHECK: cmov + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:9 [#uses=1] store i32 %9, i32* %old + ; CHECK: cmov + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 0 ) ; <i32>:10 [#uses=1] store i32 %10, i32* %old + ; CHECK: cmov + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %val2, i32 65535 ) ; <i32>:11 [#uses=1] store i32 %11, i32* %old + ; CHECK: cmov + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %val2, i32 10 ) ; <i32>:12 [#uses=1] store i32 %12, i32* %old + ; CHECK: cmov + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %val2, i32 1 ) ; <i32>:13 [#uses=1] store i32 %13, i32* %old + ; CHECK: cmov + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %val2, i32 10 ) ; <i32>:14 [#uses=1] store i32 %14, i32* %old + ; CHECK: xchgl %{{.*}}, {{.*}}(%esp) call i32 @llvm.atomic.swap.i32.p0i32( i32* %val2, i32 1976 ) ; <i32>:15 [#uses=1] store i32 %15, i32* %old %neg1 = sub i32 0, 10 ; <i32> [#uses=1] + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %val2, i32 %neg1, i32 1 ) ; <i32>:16 [#uses=1] store i32 %16, i32* %old + ; CHECK: lock + ; CHECK: cmpxchgl call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %val2, i32 1976, i32 1 ) ; <i32>:17 [#uses=1] store i32 %17, i32* %old ret void } +define void @test2(i32 addrspace(256)* nocapture %P) nounwind { +entry: +; CHECK: lock +; CHECK: cmpxchgl %{{.*}}, %gs:(%{{.*}}) + + %0 = tail call i32 @llvm.atomic.cmp.swap.i32.p256i32(i32 addrspace(256)* %P, i32 0, i32 1) + ret void +} + +declare i32 @llvm.atomic.cmp.swap.i32.p256i32(i32 addrspace(256)* nocapture, i32, i32) nounwind + declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind diff --git a/test/CodeGen/X86/avx-128.ll b/test/CodeGen/X86/avx-128.ll index a72160be719a..2bd3b5dfedd6 100644 --- a/test/CodeGen/X86/avx-128.ll +++ b/test/CodeGen/X86/avx-128.ll @@ -4,7 +4,7 @@ define void @zero() nounwind ssp { entry: - ; CHECK: vpxor + ; CHECK: vxorps ; CHECK: vmovaps store <4 x float> zeroinitializer, <4 x float>* @z, align 16 ret void diff --git a/test/CodeGen/X86/avx-intrinsics-x86.ll b/test/CodeGen/X86/avx-intrinsics-x86.ll index 9de90237d146..6c32396a4177 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -114,8 +114,8 @@ declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1) { ; CHECK: vcomisd - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %eax, %eax + ; CHECK: andl $1, %eax %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -230,7 +230,7 @@ declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) nounwind readnone define i32 @test_x86_sse2_cvttsd2si(<2 x double> %a0) { - ; CHECK: vcvttss2si + ; CHECK: vcvttsd2si %res = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %a0) ; <i32> [#uses=1] ret i32 %res } @@ -825,8 +825,7 @@ declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) { ; CHECK: vucomisd - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -1183,8 +1182,7 @@ declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone define i32 @test_x86_sse41_ptestc(<4 x float> %a0, <4 x float> %a1) { ; CHECK: vptest - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.sse41.ptestc(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -1455,8 +1453,7 @@ declare i32 @llvm.x86.sse.comile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1) { ; CHECK: vcomiss - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbb %res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -1697,8 +1694,7 @@ declare i32 @llvm.x86.sse.ucomile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) { ; CHECK: vucomiss - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2173,8 +2169,7 @@ declare void @llvm.x86.avx.movnt.ps.256(i8*, <8 x float>) nounwind define i32 @test_x86_avx_ptestc_256(<4 x i64> %a0, <4 x i64> %a1) { ; CHECK: vptest - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a0, <4 x i64> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2451,8 +2446,7 @@ declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>) noun define i32 @test_x86_avx_vtestc_pd(<2 x double> %a0, <2 x double> %a1) { ; CHECK: vtestpd - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.vtestc.pd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2461,8 +2455,7 @@ declare i32 @llvm.x86.avx.vtestc.pd(<2 x double>, <2 x double>) nounwind readnon define i32 @test_x86_avx_vtestc_pd_256(<4 x double> %a0, <4 x double> %a1) { ; CHECK: vtestpd - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.vtestc.pd.256(<4 x double> %a0, <4 x double> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2471,8 +2464,7 @@ declare i32 @llvm.x86.avx.vtestc.pd.256(<4 x double>, <4 x double>) nounwind rea define i32 @test_x86_avx_vtestc_ps(<4 x float> %a0, <4 x float> %a1) { ; CHECK: vtestps - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.vtestc.ps(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] ret i32 %res } @@ -2481,8 +2473,7 @@ declare i32 @llvm.x86.avx.vtestc.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_avx_vtestc_ps_256(<8 x float> %a0, <8 x float> %a1) { ; CHECK: vtestps - ; CHECK: setb - ; CHECK: movzbl + ; CHECK: sbbl %res = call i32 @llvm.x86.avx.vtestc.ps.256(<8 x float> %a0, <8 x float> %a1) ; <i32> [#uses=1] ret i32 %res } diff --git a/test/CodeGen/X86/avx-intrinsics-x86_64.ll b/test/CodeGen/X86/avx-intrinsics-x86_64.ll index b1867105ce85..5a466fc3250f 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86_64.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86_64.ll @@ -17,7 +17,7 @@ declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readn define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) { - ; CHECK: vcvttss2si + ; CHECK: vcvttsd2si %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1] ret i64 %res } diff --git a/test/CodeGen/X86/bc-extract.ll b/test/CodeGen/X86/bc-extract.ll new file mode 100644 index 000000000000..ac972a8e2e5b --- /dev/null +++ b/test/CodeGen/X86/bc-extract.ll @@ -0,0 +1,27 @@ +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s + + +define float @extractFloat1() nounwind { +entry: + ; CHECK: 1065353216 + %tmp0 = bitcast <1 x double> <double 0x000000003F800000> to <2 x float> + %tmp1 = extractelement <2 x float> %tmp0, i32 0 + ret float %tmp1 +} + +define float @extractFloat2() nounwind { +entry: + ; CHECK: pxor %xmm0, %xmm0 + %tmp4 = bitcast <1 x double> <double 0x000000003F800000> to <2 x float> + %tmp5 = extractelement <2 x float> %tmp4, i32 1 + ret float %tmp5 +} + +define i32 @extractInt2() nounwind { +entry: + ; CHECK: xorl %eax, %eax + %tmp4 = bitcast <1 x i64> <i64 256> to <2 x i32> + %tmp5 = extractelement <2 x i32> %tmp4, i32 1 + ret i32 %tmp5 +} + diff --git a/test/CodeGen/X86/bit-test-shift.ll b/test/CodeGen/X86/bit-test-shift.ll new file mode 100644 index 000000000000..7497613f2565 --- /dev/null +++ b/test/CodeGen/X86/bit-test-shift.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; <rdar://problem/8285015> + +define i32 @x(i32 %t) nounwind readnone ssp { +entry: +; CHECK: shll $23, %eax +; CHECK: sarl $31, %eax +; CHECK: andl $-26, %eax + %and = and i32 %t, 256 + %tobool = icmp eq i32 %and, 0 + %retval.0 = select i1 %tobool, i32 0, i32 -26 + ret i32 %retval.0 +} diff --git a/test/CodeGen/X86/bswap-inline-asm.ll b/test/CodeGen/X86/bswap-inline-asm.ll index 2b7019371a17..3bb9124633d6 100644 --- a/test/CodeGen/X86/bswap-inline-asm.ll +++ b/test/CodeGen/X86/bswap-inline-asm.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 > %t -; RUN: not grep APP %t +; RUN: llc < %s -mtriple=x86_64-apple-darwin > %t +; RUN: not grep InlineAsm %t ; RUN: FileCheck %s < %t ; CHECK: foo: @@ -65,6 +65,13 @@ define i32 @t32(i32 %x) nounwind { ret i32 %asmtmp } +; CHECK: u32: +; CHECK: bswapl +define i32 @u32(i32 %x) nounwind { + %asmtmp = tail call i32 asm "rorw $$8, ${0:w};rorl $$16, $0;rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind + ret i32 %asmtmp +} + ; CHECK: s64: ; CHECK: bswapq define i64 @s64(i64 %x) nounwind { diff --git a/test/CodeGen/X86/byval.ll b/test/CodeGen/X86/byval.ll index af36e1bb8cb4..ac0bc094e56e 100644 --- a/test/CodeGen/X86/byval.ll +++ b/test/CodeGen/X86/byval.ll @@ -1,7 +1,10 @@ -; RUN: llc < %s -march=x86-64 | grep {movq 8(%rsp), %rax} -; RUN: llc < %s -march=x86 > %t -; RUN: grep {movl 8(%esp), %edx} %t -; RUN: grep {movl 4(%esp), %eax} %t +; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix=X86-64 %s +; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s + +; X86: movl 4(%esp), %eax +; X86: movl 8(%esp), %edx + +; X86-64: movq 8(%rsp), %rax %struct.s = type { i64, i64, i64 } diff --git a/test/CodeGen/X86/cmp-test.ll b/test/CodeGen/X86/cmp-test.ll deleted file mode 100644 index 898c09b82f5e..000000000000 --- a/test/CodeGen/X86/cmp-test.ll +++ /dev/null @@ -1,27 +0,0 @@ -; RUN: llc < %s -march=x86 | grep cmp | count 1 -; RUN: llc < %s -march=x86 | grep test | count 1 - -define i32 @f1(i32 %X, i32* %y) { - %tmp = load i32* %y ; <i32> [#uses=1] - %tmp.upgrd.1 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1] - br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true - -cond_true: ; preds = %0 - ret i32 1 - -ReturnBlock: ; preds = %0 - ret i32 0 -} - -define i32 @f2(i32 %X, i32* %y) { - %tmp = load i32* %y ; <i32> [#uses=1] - %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1] - %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1] - br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true - -cond_true: ; preds = %0 - ret i32 1 - -ReturnBlock: ; preds = %0 - ret i32 0 -} diff --git a/test/CodeGen/X86/cmp.ll b/test/CodeGen/X86/cmp.ll new file mode 100644 index 000000000000..ef5e353e9f9f --- /dev/null +++ b/test/CodeGen/X86/cmp.ll @@ -0,0 +1,92 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -show-mc-encoding | FileCheck %s + +define i32 @test1(i32 %X, i32* %y) nounwind { + %tmp = load i32* %y ; <i32> [#uses=1] + %tmp.upgrd.1 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1] + br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true + +cond_true: ; preds = %0 + ret i32 1 + +ReturnBlock: ; preds = %0 + ret i32 0 +; CHECK: test1: +; CHECK: cmpl $0, (%rsi) +} + +define i32 @test2(i32 %X, i32* %y) nounwind { + %tmp = load i32* %y ; <i32> [#uses=1] + %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1] + %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1] + br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true + +cond_true: ; preds = %0 + ret i32 1 + +ReturnBlock: ; preds = %0 + ret i32 0 +; CHECK: test2: +; CHECK: movl (%rsi), %eax +; CHECK: shll $3, %eax +; CHECK: testl %eax, %eax +} + +define i64 @test3(i64 %x) nounwind { + %t = icmp eq i64 %x, 0 + %r = zext i1 %t to i64 + ret i64 %r +; CHECK: test3: +; CHECK: testq %rdi, %rdi +; CHECK: sete %al +; CHECK: movzbl %al, %eax +; CHECK: ret +} + +define i64 @test4(i64 %x) nounwind { + %t = icmp slt i64 %x, 1 + %r = zext i1 %t to i64 + ret i64 %r +; CHECK: test4: +; CHECK: testq %rdi, %rdi +; CHECK: setle %al +; CHECK: movzbl %al, %eax +; CHECK: ret +} + + +define i32 @test5(double %A) nounwind { + entry: + %tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1] + %tmp5 = fcmp ult double %A, 7.500000e+01; <i1> [#uses=1] + %bothcond = or i1 %tmp2, %tmp5; <i1> [#uses=1] + br i1 %bothcond, label %bb8, label %bb12 + + bb8:; preds = %entry + %tmp9 = tail call i32 (...)* @foo( ) nounwind ; <i32> [#uses=1] + ret i32 %tmp9 + + bb12:; preds = %entry + ret i32 32 +; CHECK: test5: +; CHECK: ucomisd LCPI4_0(%rip), %xmm0 +; CHECK: ucomisd LCPI4_1(%rip), %xmm0 +} + +declare i32 @foo(...) + +define i32 @test6() nounwind align 2 { + %A = alloca {i64, i64}, align 8 + %B = getelementptr inbounds {i64, i64}* %A, i64 0, i32 1 + %C = load i64* %B + %D = icmp eq i64 %C, 0 + br i1 %D, label %T, label %F +T: + ret i32 1 + +F: + ret i32 0 +; CHECK: test6: +; CHECK: cmpq $0, -8(%rsp) +; CHECK: encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00] +} + diff --git a/test/CodeGen/X86/cmp0.ll b/test/CodeGen/X86/cmp0.ll deleted file mode 100644 index 4878448800cc..000000000000 --- a/test/CodeGen/X86/cmp0.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s - -define i64 @test0(i64 %x) nounwind { - %t = icmp eq i64 %x, 0 - %r = zext i1 %t to i64 - ret i64 %r -; CHECK: test0: -; CHECK: testq %rdi, %rdi -; CHECK: sete %al -; CHECK: movzbl %al, %eax -; CHECK: ret -} - -define i64 @test1(i64 %x) nounwind { - %t = icmp slt i64 %x, 1 - %r = zext i1 %t to i64 - ret i64 %r -; CHECK: test1: -; CHECK: testq %rdi, %rdi -; CHECK: setle %al -; CHECK: movzbl %al, %eax -; CHECK: ret -} - diff --git a/test/CodeGen/X86/cmp2.ll b/test/CodeGen/X86/cmp2.ll deleted file mode 100644 index 9a8e00c8bca0..000000000000 --- a/test/CodeGen/X86/cmp2.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep ucomisd | grep CPI | count 2 - -define i32 @test(double %A) nounwind { - entry: - %tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1] - %tmp5 = fcmp ult double %A, 7.500000e+01; <i1> [#uses=1] - %bothcond = or i1 %tmp2, %tmp5; <i1> [#uses=1] - br i1 %bothcond, label %bb8, label %bb12 - - bb8:; preds = %entry - %tmp9 = tail call i32 (...)* @foo( ) nounwind ; <i32> [#uses=1] - ret i32 %tmp9 - - bb12:; preds = %entry - ret i32 32 -} - -declare i32 @foo(...) diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll index 56ea26b658d8..89b436e75c9e 100644 --- a/test/CodeGen/X86/commute-two-addr.ll +++ b/test/CodeGen/X86/commute-two-addr.ll @@ -2,24 +2,62 @@ ; insertion of register-register copies. ; Make sure there are only 3 mov's for each testcase -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep {\\\<mov\\\>} | count 6 +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=DARWIN -target triple = "i686-pc-linux-gnu" @G = external global i32 ; <i32*> [#uses=2] declare void @ext(i32) -define i32 @add_test(i32 %X, i32 %Y) { +define i32 @t1(i32 %X, i32 %Y) nounwind { +; LINUX: t1: +; LINUX: movl 4(%esp), %eax +; LINUX: movl 8(%esp), %ecx +; LINUX: addl %eax, %ecx +; LINUX: movl %ecx, G %Z = add i32 %X, %Y ; <i32> [#uses=1] store i32 %Z, i32* @G ret i32 %X } -define i32 @xor_test(i32 %X, i32 %Y) { +define i32 @t2(i32 %X, i32 %Y) nounwind { +; LINUX: t2: +; LINUX: movl 4(%esp), %eax +; LINUX: movl 8(%esp), %ecx +; LINUX: xorl %eax, %ecx +; LINUX: movl %ecx, G %Z = xor i32 %X, %Y ; <i32> [#uses=1] store i32 %Z, i32* @G ret i32 %X } +; rdar://8762995 +%0 = type { i64, i32 } + +define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind { +entry: +; DARWIN: t3: +; DARWIN: shlq $32, %rcx +; DARWIN-NOT: leaq +; DARWIN: orq %rcx, %rax +; DARWIN-NOT: mov +; DARWIN: shll $16 + %tmp21 = zext i32 %lb to i64 + %tmp23 = zext i32 %ub to i64 + %tmp24 = shl i64 %tmp23, 32 + %ins26 = or i64 %tmp24, %tmp21 + %tmp28 = zext i8 %has_lb to i32 + %tmp33 = zext i8 %has_ub to i32 + %tmp34 = shl i32 %tmp33, 8 + %tmp38 = zext i8 %lb_inclusive to i32 + %tmp39 = shl i32 %tmp38, 16 + %tmp43 = zext i8 %ub_inclusive to i32 + %tmp44 = shl i32 %tmp43, 24 + %ins31 = or i32 %tmp39, %tmp28 + %ins36 = or i32 %ins31, %tmp34 + %ins46 = or i32 %ins36, %tmp44 + %tmp16 = insertvalue %0 undef, i64 %ins26, 0 + %tmp19 = insertvalue %0 %tmp16, i32 %ins46, 1 + ret %0 %tmp19 +} diff --git a/test/CodeGen/X86/compare-inf.ll b/test/CodeGen/X86/compare-inf.ll index 2be90c9764c2..9aa44a30af57 100644 --- a/test/CodeGen/X86/compare-inf.ll +++ b/test/CodeGen/X86/compare-inf.ll @@ -5,7 +5,7 @@ ; CHECK: oeq_inff: ; CHECK: ucomiss -; CHECK: jae +; CHECK: jb define float @oeq_inff(float %x, float %y) nounwind readonly { %t0 = fcmp oeq float %x, 0x7FF0000000000000 %t1 = select i1 %t0, float 1.0, float %y @@ -14,7 +14,7 @@ define float @oeq_inff(float %x, float %y) nounwind readonly { ; CHECK: oeq_inf: ; CHECK: ucomisd -; CHECK: jae +; CHECK: jb define double @oeq_inf(double %x, double %y) nounwind readonly { %t0 = fcmp oeq double %x, 0x7FF0000000000000 %t1 = select i1 %t0, double 1.0, double %y @@ -23,7 +23,7 @@ define double @oeq_inf(double %x, double %y) nounwind readonly { ; CHECK: une_inff: ; CHECK: ucomiss -; CHECK: jb +; CHECK: jae define float @une_inff(float %x, float %y) nounwind readonly { %t0 = fcmp une float %x, 0x7FF0000000000000 %t1 = select i1 %t0, float 1.0, float %y @@ -32,7 +32,7 @@ define float @une_inff(float %x, float %y) nounwind readonly { ; CHECK: une_inf: ; CHECK: ucomisd -; CHECK: jb +; CHECK: jae define double @une_inf(double %x, double %y) nounwind readonly { %t0 = fcmp une double %x, 0x7FF0000000000000 %t1 = select i1 %t0, double 1.0, double %y @@ -41,7 +41,7 @@ define double @une_inf(double %x, double %y) nounwind readonly { ; CHECK: oeq_neg_inff: ; CHECK: ucomiss -; CHECK: jae +; CHECK: jb define float @oeq_neg_inff(float %x, float %y) nounwind readonly { %t0 = fcmp oeq float %x, 0xFFF0000000000000 %t1 = select i1 %t0, float 1.0, float %y @@ -50,7 +50,7 @@ define float @oeq_neg_inff(float %x, float %y) nounwind readonly { ; CHECK: oeq_neg_inf: ; CHECK: ucomisd -; CHECK: jae +; CHECK: jb define double @oeq_neg_inf(double %x, double %y) nounwind readonly { %t0 = fcmp oeq double %x, 0xFFF0000000000000 %t1 = select i1 %t0, double 1.0, double %y @@ -59,7 +59,7 @@ define double @oeq_neg_inf(double %x, double %y) nounwind readonly { ; CHECK: une_neg_inff: ; CHECK: ucomiss -; CHECK: jb +; CHECK: jae define float @une_neg_inff(float %x, float %y) nounwind readonly { %t0 = fcmp une float %x, 0xFFF0000000000000 %t1 = select i1 %t0, float 1.0, float %y @@ -68,7 +68,7 @@ define float @une_neg_inff(float %x, float %y) nounwind readonly { ; CHECK: une_neg_inf: ; CHECK: ucomisd -; CHECK: jb +; CHECK: jae define double @une_neg_inf(double %x, double %y) nounwind readonly { %t0 = fcmp une double %x, 0xFFF0000000000000 %t1 = select i1 %t0, double 1.0, double %y diff --git a/test/CodeGen/X86/complex-asm.ll b/test/CodeGen/X86/complex-asm.ll new file mode 100644 index 000000000000..49878b982db3 --- /dev/null +++ b/test/CodeGen/X86/complex-asm.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin +; This formerly crashed. + +%0 = type { i64, i64 } + +define %0 @f() nounwind ssp { +entry: + %v = alloca %0, align 8 + call void asm sideeffect "", "=*r,r,r,0,~{dirflag},~{fpsr},~{flags}"(%0* %v, i32 0, i32 1, i128 undef) nounwind + %0 = getelementptr inbounds %0* %v, i64 0, i32 0 + %1 = load i64* %0, align 8 + %2 = getelementptr inbounds %0* %v, i64 0, i32 1 + %3 = load i64* %2, align 8 + %mrv4 = insertvalue %0 undef, i64 %1, 0 + %mrv5 = insertvalue %0 %mrv4, i64 %3, 1 + ret %0 %mrv5 +} diff --git a/test/CodeGen/X86/conditional-indecrement.ll b/test/CodeGen/X86/conditional-indecrement.ll new file mode 100644 index 000000000000..a3a0c39905aa --- /dev/null +++ b/test/CodeGen/X86/conditional-indecrement.ll @@ -0,0 +1,89 @@ +; RUN: llc -march=x86 < %s | FileCheck %s + +define i32 @test1(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test1: +; CHECK: cmpl $1 +; CHECK: sbbl $-1 +; CHECK: ret +} + +define i32 @test2(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test2: +; CHECK: cmpl $1 +; CHECK: adcl $0 +; CHECK: ret +} + +define i32 @test3(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test3: +; CHECK: cmpl $1 +; CHECK: adcl $0 +; CHECK: ret +} + +define i32 @test4(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = add i32 %inc, %b + ret i32 %retval.0 +; CHECK: test4: +; CHECK: cmpl $1 +; CHECK: sbbl $-1 +; CHECK: ret +} + +define i32 @test5(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test5: +; CHECK: cmpl $1 +; CHECK: adcl $-1 +; CHECK: ret +} + +define i32 @test6(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test6: +; CHECK: cmpl $1 +; CHECK: sbbl $0 +; CHECK: ret +} + +define i32 @test7(i32 %a, i32 %b) nounwind readnone { + %cmp = icmp eq i32 %a, 0 + %inc = zext i1 %cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test7: +; CHECK: cmpl $1 +; CHECK: sbbl $0 +; CHECK: ret +} + +define i32 @test8(i32 %a, i32 %b) nounwind readnone { + %not.cmp = icmp ne i32 %a, 0 + %inc = zext i1 %not.cmp to i32 + %retval.0 = sub i32 %b, %inc + ret i32 %retval.0 +; CHECK: test8: +; CHECK: cmpl $1 +; CHECK: adcl $-1 +; CHECK: ret +} diff --git a/test/CodeGen/X86/const-select.ll b/test/CodeGen/X86/const-select.ll deleted file mode 100644 index 665984ce28ed..000000000000 --- a/test/CodeGen/X86/const-select.ll +++ /dev/null @@ -1,22 +0,0 @@ - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin7" - -; RUN: llc < %s | grep {LCPI0_0(,%eax,4)} -define float @f(i32 %x) nounwind readnone { -entry: - %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] - %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1] - ret float %iftmp.0.0 -} - -; RUN: llc < %s | grep {movsbl.*(%e.x,%e.x,4), %eax} -define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly { -entry: - %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1] - %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1] - %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1] - %2 = load i8* %1, align 1 ; <i8> [#uses=1] - ret i8 %2 -} - diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll index a14a48baa355..2d8e63e31342 100644 --- a/test/CodeGen/X86/crash.ll +++ b/test/CodeGen/X86/crash.ll @@ -141,3 +141,61 @@ entry: call void asm sideeffect "outb $0, ${1:w}", "{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8 %conv4.i, i32 1017) nounwind unreachable } + +; Crash trying to form conditional increment with fp value. +; PR8981 +define i32 @test9(double %X) ssp align 2 { +entry: + %0 = fcmp one double %X, 0.000000e+00 + %cond = select i1 %0, i32 1, i32 2 + ret i32 %cond +} + + +; PR8514 - Crash in match address do to "heroics" turning and-of-shift into +; shift of and. +%struct.S0 = type { i8, [2 x i8], i8 } + +define void @func_59(i32 %p_63) noreturn nounwind { +entry: + br label %for.body + +for.body: ; preds = %for.inc44, %entry + %p_63.addr.1 = phi i32 [ %p_63, %entry ], [ 0, %for.inc44 ] + %l_74.0 = phi i32 [ 0, %entry ], [ %add46, %for.inc44 ] + br i1 undef, label %for.inc44, label %bb.nph81 + +bb.nph81: ; preds = %for.body + %tmp98 = add i32 %p_63.addr.1, 0 + br label %for.body22 + +for.body22: ; preds = %for.body22, %bb.nph81 + %l_75.077 = phi i64 [ %ins, %for.body22 ], [ undef, %bb.nph81 ] + %tmp110 = trunc i64 %l_75.077 to i32 + %tmp111 = and i32 %tmp110, 65535 + %arrayidx32.0 = getelementptr [9 x [5 x [2 x %struct.S0]]]* undef, i32 0, i32 %l_74.0, i32 %tmp98, i32 %tmp111, i32 0 + store i8 1, i8* %arrayidx32.0, align 4 + %tmp106 = shl i32 %tmp110, 2 + %tmp107 = and i32 %tmp106, 262140 + %scevgep99.sum114 = or i32 %tmp107, 1 + %arrayidx32.1.1 = getelementptr [9 x [5 x [2 x %struct.S0]]]* undef, i32 0, i32 %l_74.0, i32 %tmp98, i32 0, i32 1, i32 %scevgep99.sum114 + store i8 0, i8* %arrayidx32.1.1, align 1 + %ins = or i64 undef, undef + br label %for.body22 + +for.inc44: ; preds = %for.body + %add46 = add i32 %l_74.0, 1 + br label %for.body +} + +; PR9028 +define void @f(i64 %A) nounwind { +entry: + %0 = zext i64 %A to i160 + %1 = shl i160 %0, 64 + %2 = zext i160 %1 to i576 + %3 = zext i96 undef to i576 + %4 = or i576 %3, %2 + store i576 %4, i576* undef, align 8 + ret void +} diff --git a/test/CodeGen/X86/critical-edge-split-2.ll b/test/CodeGen/X86/critical-edge-split-2.ll new file mode 100644 index 000000000000..70301cd9bcc4 --- /dev/null +++ b/test/CodeGen/X86/critical-edge-split-2.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +%0 = type <{ %1, %1 }> +%1 = type { i8, i8, i8, i8 } + +@g_2 = global %0 zeroinitializer +@g_4 = global %1 zeroinitializer, align 4 + + +; PR8642 +define i16 @test1(i1 zeroext %C, i8** nocapture %argv) nounwind ssp { +entry: + br i1 %C, label %cond.end.i, label %cond.false.i + +cond.false.i: ; preds = %entry + br label %cond.end.i + +cond.end.i: ; preds = %entry + %call1 = phi i16 [ trunc (i32 srem (i32 1, i32 zext (i1 icmp eq (%1* bitcast (i8* getelementptr inbounds (%0* @g_2, i64 0, i32 1, i32 0) to %1*), %1* @g_4) to i32)) to i16), %cond.false.i ], [ 1, %entry ] + ret i16 %call1 +} + +; CHECK: test1: +; CHECK: testb %dil, %dil +; CHECK: jne LBB0_2 +; CHECK: divl +; CHECK: LBB0_2: diff --git a/test/CodeGen/X86/critical-edge-split.ll b/test/CodeGen/X86/critical-edge-split.ll deleted file mode 100644 index 96fef0fbfc61..000000000000 --- a/test/CodeGen/X86/critical-edge-split.ll +++ /dev/null @@ -1,50 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -o /dev/null -stats -info-output-file - | grep asm-printer | grep 29 - - %CC = type { %Register } - %II = type { %"struct.XX::II::$_74" } - %JITFunction = type %YYValue* (%CC*, %YYValue**) - %YYValue = type { i32 (...)** } - %Register = type { %"struct.XX::ByteCodeFeatures" } - %"struct.XX::ByteCodeFeatures" = type { i32 } - %"struct.XX::II::$_74" = type { i8* } -@llvm.used = appending global [1 x i8*] [ i8* bitcast (%JITFunction* @loop to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] - -define %YYValue* @loop(%CC*, %YYValue**) nounwind { -; <label>:2 - %3 = getelementptr %CC* %0, i32 -9 ; <%CC*> [#uses=1] - %4 = bitcast %CC* %3 to %YYValue** ; <%YYValue**> [#uses=2] - %5 = load %YYValue** %4 ; <%YYValue*> [#uses=3] - %unique_1.i = ptrtoint %YYValue* %5 to i1 ; <i1> [#uses=1] - br i1 %unique_1.i, label %loop, label %11 - -loop: ; preds = %6, %2 - %.1 = phi %YYValue* [ inttoptr (i32 1 to %YYValue*), %2 ], [ %intAddValue, %6 ] ; <%YYValue*> [#uses=3] - %immediateCmp = icmp slt %YYValue* %.1, %5 ; <i1> [#uses=1] - br i1 %immediateCmp, label %6, label %8 - -; <label>:6 ; preds = %loop - %lhsInt = ptrtoint %YYValue* %.1 to i32 ; <i32> [#uses=1] - %7 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %lhsInt, i32 2) ; <{ i32, i1 }> [#uses=2] - %intAdd = extractvalue { i32, i1 } %7, 0 ; <i32> [#uses=1] - %intAddValue = inttoptr i32 %intAdd to %YYValue* ; <%YYValue*> [#uses=1] - %intAddOverflow = extractvalue { i32, i1 } %7, 1 ; <i1> [#uses=1] - br i1 %intAddOverflow, label %.loopexit, label %loop - -; <label>:8 ; preds = %loop - ret %YYValue* inttoptr (i32 10 to %YYValue*) - -.loopexit: ; preds = %6 - %9 = bitcast %CC* %0 to %YYValue** ; <%YYValue**> [#uses=1] - store %YYValue* %.1, %YYValue** %9 - store %YYValue* %5, %YYValue** %4 - %10 = call fastcc %YYValue* @foobar(%II* inttoptr (i32 3431104 to %II*), %CC* %0, %YYValue** %1) ; <%YYValue*> [#uses=1] - ret %YYValue* %10 - -; <label>:11 ; preds = %2 - %12 = call fastcc %YYValue* @foobar(%II* inttoptr (i32 3431080 to %II*), %CC* %0, %YYValue** %1) ; <%YYValue*> [#uses=1] - ret %YYValue* %12 -} - -declare fastcc %YYValue* @foobar(%II*, %CC*, %YYValue**) nounwind - -declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind diff --git a/test/CodeGen/X86/ctpop-combine.ll b/test/CodeGen/X86/ctpop-combine.ll new file mode 100644 index 000000000000..c957d385a24a --- /dev/null +++ b/test/CodeGen/X86/ctpop-combine.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s + +declare i64 @llvm.ctpop.i64(i64) nounwind readnone + +define i32 @test1(i64 %x) nounwind readnone { + %count = tail call i64 @llvm.ctpop.i64(i64 %x) + %cast = trunc i64 %count to i32 + %cmp = icmp ugt i32 %cast, 1 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: test1: +; CHECK: leaq -1(%rdi) +; CHECK-NEXT: testq +; CHECK-NEXT: setne +; CHECK: ret +} + + +define i32 @test2(i64 %x) nounwind readnone { + %count = tail call i64 @llvm.ctpop.i64(i64 %x) + %cmp = icmp ult i64 %count, 2 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: test2: +; CHECK: leaq -1(%rdi) +; CHECK-NEXT: testq +; CHECK-NEXT: sete +; CHECK: ret +} + +define i32 @test3(i64 %x) nounwind readnone { + %count = tail call i64 @llvm.ctpop.i64(i64 %x) + %cast = trunc i64 %count to i6 ; Too small for 0-64 + %cmp = icmp ult i6 %cast, 2 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: test3: +; CHECK: cmpb $2 +; CHECK: ret +} diff --git a/test/CodeGen/X86/dagcombine-buildvector.ll b/test/CodeGen/X86/dagcombine-buildvector.ll index 5cc6eaa405ad..dae91d5ccdd6 100644 --- a/test/CodeGen/X86/dagcombine-buildvector.ll +++ b/test/CodeGen/X86/dagcombine-buildvector.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=penryn -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=penryn | FileCheck %s ; Shows a dag combine bug that will generate an illegal build vector ; with v2i64 build_vector i32, i32. diff --git a/test/CodeGen/X86/dbg-live-in-location.ll b/test/CodeGen/X86/dbg-live-in-location.ll new file mode 100644 index 000000000000..9b1464d415f9 --- /dev/null +++ b/test/CodeGen/X86/dbg-live-in-location.ll @@ -0,0 +1,84 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +@str = internal constant [3 x i8] c"Hi\00" + +define void @foo() nounwind ssp { +entry: + %puts = tail call i32 @puts(i8* getelementptr inbounds ([3 x i8]* @str, i64 0, i64 0)) + ret void, !dbg !17 +} + +; CHECK: arg.c:5:14 + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp { +entry: + tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !9), !dbg !19 + tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !10), !dbg !20 + %cmp = icmp sgt i32 %argc, 1, !dbg !21 + br i1 %cmp, label %cond.end, label %for.body.lr.ph, !dbg !21 + +cond.end: ; preds = %entry + %arrayidx = getelementptr inbounds i8** %argv, i64 1, !dbg !21 + %tmp2 = load i8** %arrayidx, align 8, !dbg !21, !tbaa !22 + %call = tail call i32 (...)* @atoi(i8* %tmp2) nounwind, !dbg !21 + tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !16), !dbg !21 + tail call void @llvm.dbg.value(metadata !25, i64 0, metadata !14), !dbg !26 + %cmp57 = icmp sgt i32 %call, 0, !dbg !26 + br i1 %cmp57, label %for.body.lr.ph, label %for.end, !dbg !26 + +for.body.lr.ph: ; preds = %entry, %cond.end + %cond10 = phi i32 [ %call, %cond.end ], [ 300, %entry ] + br label %for.body + +for.body: ; preds = %for.body, %for.body.lr.ph + %i.08 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] + %puts.i = tail call i32 @puts(i8* getelementptr inbounds ([3 x i8]* @str, i64 0, i64 0)) nounwind + %inc = add nsw i32 %i.08, 1, !dbg !27 + %exitcond = icmp eq i32 %inc, %cond10 + br i1 %exitcond, label %for.end, label %for.body, !dbg !26 + +for.end: ; preds = %for.body, %cond.end + ret i32 0, !dbg !29 +} + +declare i32 @atoi(...) + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +declare i32 @puts(i8* nocapture) nounwind + +!llvm.dbg.sp = !{!0, !5} +!llvm.dbg.lv.main = !{!9, !10, !14, !16} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, void ()* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"arg.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"arg.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 124504)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{null} +!5 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 6, metadata !6, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**)* @main} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !7, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!7 = metadata !{metadata !8} +!8 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 590081, metadata !5, metadata !"argc", metadata !1, i32 5, metadata !8, i32 0} ; [ DW_TAG_arg_variable ] +!10 = metadata !{i32 590081, metadata !5, metadata !"argv", metadata !1, i32 5, metadata !11, i32 0} ; [ DW_TAG_arg_variable ] +!11 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !12} ; [ DW_TAG_pointer_type ] +!12 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !13} ; [ DW_TAG_pointer_type ] +!13 = metadata !{i32 589860, metadata !2, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] +!14 = metadata !{i32 590080, metadata !15, metadata !"i", metadata !1, i32 7, metadata !8, i32 0} ; [ DW_TAG_auto_variable ] +!15 = metadata !{i32 589835, metadata !5, i32 6, i32 1, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 590080, metadata !15, metadata !"iterations", metadata !1, i32 8, metadata !8, i32 0} ; [ DW_TAG_auto_variable ] +!17 = metadata !{i32 4, i32 1, metadata !18, null} +!18 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!19 = metadata !{i32 5, i32 14, metadata !5, null} +!20 = metadata !{i32 5, i32 26, metadata !5, null} +!21 = metadata !{i32 8, i32 51, metadata !15, null} +!22 = metadata !{metadata !"any pointer", metadata !23} +!23 = metadata !{metadata !"omnipotent char", metadata !24} +!24 = metadata !{metadata !"Simple C/C++ TBAA", null} +!25 = metadata !{i32 0} +!26 = metadata !{i32 9, i32 2, metadata !15, null} +!27 = metadata !{i32 9, i32 30, metadata !28, null} +!28 = metadata !{i32 589835, metadata !15, i32 9, i32 2, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] +!29 = metadata !{i32 12, i32 9, metadata !15, null} diff --git a/test/CodeGen/X86/dbg-merge-loc-entry.ll b/test/CodeGen/X86/dbg-merge-loc-entry.ll new file mode 100644 index 000000000000..83df1478cf18 --- /dev/null +++ b/test/CodeGen/X86/dbg-merge-loc-entry.ll @@ -0,0 +1,71 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin8" + +;CHECK: Ldebug_loc0: +;CHECK-NEXT: .quad Lfunc_begin0 +;CHECK-NEXT: .quad Lfunc_end0 +;CHECK-NEXT: .short 1 ## Loc expr size +;CHECK-NEXT: .byte 85 ## DW_OP_reg5 +;CHECK-NEXT: .quad 0 +;CHECK-NEXT: .quad 0 + +%0 = type { i64, i1 } + +@__clz_tab = external constant [256 x i8] + +define hidden i128 @__divti3(i128 %u, i128 %v) nounwind readnone { +entry: + tail call void @llvm.dbg.value(metadata !{i128 %u}, i64 0, metadata !14), !dbg !15 + tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !17), !dbg !21 + br i1 undef, label %bb2, label %bb4, !dbg !22 + +bb2: ; preds = %entry + br label %bb4, !dbg !23 + +bb4: ; preds = %bb2, %entry + br i1 undef, label %__udivmodti4.exit, label %bb82.i, !dbg !24 + +bb82.i: ; preds = %bb4 + unreachable + +__udivmodti4.exit: ; preds = %bb4 + ret i128 undef, !dbg !27 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone + +!llvm.dbg.sp = !{!0, !9} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"__udivmodti4", metadata !"__udivmodti4", metadata !"", metadata !1, i32 879, metadata !3, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, null} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"foobar.c", metadata !"/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 1, metadata !"foobar.c", metadata !"/tmp", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5, metadata !5, metadata !5, metadata !8} +!5 = metadata !{i32 589846, metadata !6, metadata !"UTItype", metadata !6, i32 166, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_typedef ] +!6 = metadata !{i32 589865, metadata !"foobar.h", metadata !"/tmp", metadata !2} ; [ DW_TAG_file_type ] +!7 = metadata !{i32 589860, metadata !1, metadata !"", metadata !1, i32 0, i64 128, i64 128, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!8 = metadata !{i32 589839, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_pointer_type ] +!9 = metadata !{i32 589870, i32 0, metadata !1, metadata !"__divti3", metadata !"__divti3", metadata !"__divti3", metadata !1, i32 1094, metadata !10, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i128 (i128, i128)* @__divti3} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] +!11 = metadata !{metadata !12, metadata !12, metadata !12} +!12 = metadata !{i32 589846, metadata !6, metadata !"TItype", metadata !6, i32 160, i64 0, i64 0, i64 0, i32 0, metadata !13} ; [ DW_TAG_typedef ] +!13 = metadata !{i32 589860, metadata !1, metadata !"", metadata !1, i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!14 = metadata !{i32 590081, metadata !9, metadata !"u", metadata !1, i32 1093, metadata !12, i32 0} ; [ DW_TAG_arg_variable ] +!15 = metadata !{i32 1093, i32 0, metadata !9, null} +!16 = metadata !{i64 0} +!17 = metadata !{i32 590080, metadata !18, metadata !"c", metadata !1, i32 1095, metadata !19, i32 0} ; [ DW_TAG_auto_variable ] +!18 = metadata !{i32 589835, metadata !9, i32 1094, i32 0, metadata !1, i32 13} ; [ DW_TAG_lexical_block ] +!19 = metadata !{i32 589846, metadata !6, metadata !"word_type", metadata !6, i32 424, i64 0, i64 0, i64 0, i32 0, metadata !20} ; [ DW_TAG_typedef ] +!20 = metadata !{i32 589860, metadata !1, metadata !"long int", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!21 = metadata !{i32 1095, i32 0, metadata !18, null} +!22 = metadata !{i32 1103, i32 0, metadata !18, null} +!23 = metadata !{i32 1104, i32 0, metadata !18, null} +!24 = metadata !{i32 1003, i32 0, metadata !25, metadata !26} +!25 = metadata !{i32 589835, metadata !0, i32 879, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!26 = metadata !{i32 1107, i32 0, metadata !18, null} +!27 = metadata !{i32 1111, i32 0, metadata !18, null} diff --git a/test/CodeGen/X86/dbg-value-inlined-parameter.ll b/test/CodeGen/X86/dbg-value-inlined-parameter.ll new file mode 100644 index 000000000000..89bbf34a1286 --- /dev/null +++ b/test/CodeGen/X86/dbg-value-inlined-parameter.ll @@ -0,0 +1,86 @@ +; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s + +;CHECK: DW_TAG_inlined_subroutine +;CHECK-NEXT: DW_AT_abstract_origin +;CHECK-NEXT: DW_AT_low_pc +;CHECK-NEXT: DW_AT_high_pc +;CHECK-NEXT: DW_AT_call_file +;CHECK-NEXT: DW_AT_call_line +;CHECK-NEXT: DW_TAG_formal_parameter +;CHECK-NEXT: .ascii "sp" ## DW_AT_name + +%struct.S1 = type { float*, i32 } + +@p = common global %struct.S1 zeroinitializer, align 8 + +define i32 @foo(%struct.S1* nocapture %sp, i32 %nums) nounwind optsize ssp { +entry: + tail call void @llvm.dbg.value(metadata !{%struct.S1* %sp}, i64 0, metadata !9), !dbg !20 + tail call void @llvm.dbg.value(metadata !{i32 %nums}, i64 0, metadata !18), !dbg !21 + %tmp2 = getelementptr inbounds %struct.S1* %sp, i64 0, i32 1, !dbg !22 + store i32 %nums, i32* %tmp2, align 4, !dbg !22, !tbaa !24 + %call = tail call float* @bar(i32 %nums) nounwind optsize, !dbg !27 + %tmp5 = getelementptr inbounds %struct.S1* %sp, i64 0, i32 0, !dbg !27 + store float* %call, float** %tmp5, align 8, !dbg !27, !tbaa !28 + %cmp = icmp ne float* %call, null, !dbg !29 + %cond = zext i1 %cmp to i32, !dbg !29 + ret i32 %cond, !dbg !29 +} + +declare float* @bar(i32) optsize + +define void @foobar() nounwind optsize ssp { +entry: + tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !9) nounwind, !dbg !31 + tail call void @llvm.dbg.value(metadata !34, i64 0, metadata !18) nounwind, !dbg !35 + store i32 1, i32* getelementptr inbounds (%struct.S1* @p, i64 0, i32 1), align 8, !dbg !36, !tbaa !24 + %call.i = tail call float* @bar(i32 1) nounwind optsize, !dbg !37 + store float* %call.i, float** getelementptr inbounds (%struct.S1* @p, i64 0, i32 0), align 8, !dbg !37, !tbaa !28 + ret void, !dbg !38 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0, !6} +!llvm.dbg.lv.foo = !{!9, !18} +!llvm.dbg.gv = !{!19} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 8, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (%struct.S1*, i32)* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"nm2.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"nm2.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 125693)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foobar", metadata !"foobar", metadata !"", metadata !1, i32 15, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, void ()* @foobar} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!8 = metadata !{null} +!9 = metadata !{i32 590081, metadata !0, metadata !"sp", metadata !1, i32 7, metadata !10, i32 0} ; [ DW_TAG_arg_variable ] +!10 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] +!11 = metadata !{i32 589846, metadata !2, metadata !"S1", metadata !1, i32 4, i64 0, i64 0, i64 0, i32 0, metadata !12} ; [ DW_TAG_typedef ] +!12 = metadata !{i32 589843, metadata !2, metadata !"S1", metadata !1, i32 1, i64 128, i64 64, i32 0, i32 0, i32 0, metadata !13, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!13 = metadata !{metadata !14, metadata !17} +!14 = metadata !{i32 589837, metadata !1, metadata !"m", metadata !1, i32 2, i64 64, i64 64, i64 0, i32 0, metadata !15} ; [ DW_TAG_member ] +!15 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !16} ; [ DW_TAG_pointer_type ] +!16 = metadata !{i32 589860, metadata !2, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!17 = metadata !{i32 589837, metadata !1, metadata !"nums", metadata !1, i32 3, i64 32, i64 32, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] +!18 = metadata !{i32 590081, metadata !0, metadata !"nums", metadata !1, i32 7, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!19 = metadata !{i32 589876, i32 0, metadata !2, metadata !"p", metadata !"p", metadata !"", metadata !1, i32 14, metadata !11, i32 0, i32 1, %struct.S1* @p} ; [ DW_TAG_variable ] +!20 = metadata !{i32 7, i32 13, metadata !0, null} +!21 = metadata !{i32 7, i32 21, metadata !0, null} +!22 = metadata !{i32 9, i32 3, metadata !23, null} +!23 = metadata !{i32 589835, metadata !0, i32 8, i32 1, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!24 = metadata !{metadata !"int", metadata !25} +!25 = metadata !{metadata !"omnipotent char", metadata !26} +!26 = metadata !{metadata !"Simple C/C++ TBAA", null} +!27 = metadata !{i32 10, i32 3, metadata !23, null} +!28 = metadata !{metadata !"any pointer", metadata !25} +!29 = metadata !{i32 11, i32 3, metadata !23, null} +!30 = metadata !{%struct.S1* @p} +!31 = metadata !{i32 7, i32 13, metadata !0, metadata !32} +!32 = metadata !{i32 16, i32 3, metadata !33, null} +!33 = metadata !{i32 589835, metadata !6, i32 15, i32 15, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!34 = metadata !{i32 1} +!35 = metadata !{i32 7, i32 21, metadata !0, metadata !32} +!36 = metadata !{i32 9, i32 3, metadata !23, metadata !32} +!37 = metadata !{i32 10, i32 3, metadata !23, metadata !32} +!38 = metadata !{i32 17, i32 1, metadata !33, null} diff --git a/test/CodeGen/X86/dbg-value-location.ll b/test/CodeGen/X86/dbg-value-location.ll new file mode 100644 index 000000000000..2449046c65fb --- /dev/null +++ b/test/CodeGen/X86/dbg-value-location.ll @@ -0,0 +1,70 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" +;Radar 8950491 + +;CHECK: .ascii "var" ## DW_AT_name +;CHECK-NEXT: .byte 0 +;CHECK-NEXT: .byte 2 ## DW_AT_decl_file +;CHECK-NEXT: .short 19509 ## DW_AT_decl_line +;CHECK-NEXT: .long 68 ## DW_AT_type +;CHECK-NEXT: .byte 1 ## DW_AT_location + +@dfm = external global i32, align 4 + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +define i32 @foo(i32 %dev, i64 %cmd, i8* %data, i32 %data2) nounwind optsize ssp { +entry: + call void @llvm.dbg.value(metadata !{i32 %dev}, i64 0, metadata !12), !dbg !13 + %tmp.i = load i32* @dfm, align 4, !dbg !14 + %cmp.i = icmp eq i32 %tmp.i, 0, !dbg !14 + br i1 %cmp.i, label %if.else, label %if.end.i, !dbg !14 + +if.end.i: ; preds = %entry + switch i64 %cmd, label %if.then [ + i64 2147772420, label %bb.i + i64 536897538, label %bb116.i + ], !dbg !22 + +bb.i: ; preds = %if.end.i + unreachable + +bb116.i: ; preds = %if.end.i + unreachable + +if.then: ; preds = %if.end.i + ret i32 undef, !dbg !23 + +if.else: ; preds = %entry + ret i32 0 +} + +declare hidden fastcc i32 @bar(i32, i32* nocapture) nounwind optsize ssp +declare hidden fastcc i32 @bar2(i32) nounwind optsize ssp +declare hidden fastcc i32 @bar3(i32) nounwind optsize ssp +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0, !6, !7, !8} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 19510, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i64, i8*, i32)* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/f.c", metadata !"/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"f.i", metadata !"/tmp", metadata !"clang version 2.9 (trunk 124753)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 589870, i32 0, metadata !1, metadata !"bar3", metadata !"bar3", metadata !"", metadata !1, i32 14827, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @bar3} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 589870, i32 0, metadata !1, metadata !"bar2", metadata !"bar2", metadata !"", metadata !1, i32 15397, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @bar2} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 589870, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"", metadata !1, i32 12382, metadata !9, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i32*)* @bar} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !10, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!10 = metadata !{metadata !11} +!11 = metadata !{i32 589860, metadata !2, metadata !"unsigned char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 8} ; [ DW_TAG_base_type ] +!12 = metadata !{i32 590081, metadata !0, metadata !"var", metadata !1, i32 19509, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!13 = metadata !{i32 19509, i32 20, metadata !0, null} +!14 = metadata !{i32 18091, i32 2, metadata !15, metadata !17} +!15 = metadata !{i32 589835, metadata !16, i32 18086, i32 1, metadata !1, i32 748} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo_bar", metadata !"foo_bar", metadata !"", metadata !1, i32 18086, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null} ; [ DW_TAG_subprogram ] +!17 = metadata !{i32 19514, i32 2, metadata !18, null} +!18 = metadata !{i32 589835, metadata !0, i32 19510, i32 1, metadata !1, i32 99} ; [ DW_TAG_lexical_block ] +!22 = metadata !{i32 18094, i32 2, metadata !15, metadata !17} +!23 = metadata !{i32 19524, i32 1, metadata !18, null} diff --git a/test/CodeGen/X86/dbg-value-range.ll b/test/CodeGen/X86/dbg-value-range.ll new file mode 100644 index 000000000000..2985224d9dbd --- /dev/null +++ b/test/CodeGen/X86/dbg-value-range.ll @@ -0,0 +1,56 @@ +; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s + +%struct.a = type { i32 } + +define i32 @bar(%struct.a* nocapture %b) nounwind ssp { +entry: + tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !6), !dbg !13 + %tmp1 = getelementptr inbounds %struct.a* %b, i64 0, i32 0, !dbg !14 + %tmp2 = load i32* %tmp1, align 4, !dbg !14, !tbaa !15 + tail call void @llvm.dbg.value(metadata !{i32 %tmp2}, i64 0, metadata !11), !dbg !14 + %call = tail call i32 (...)* @foo(i32 %tmp2) nounwind , !dbg !18 + %add = add nsw i32 %tmp2, 1, !dbg !19 + ret i32 %add, !dbg !19 +} + +declare i32 @foo(...) + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0} +!llvm.dbg.lv.bar = !{!6, !11} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (%struct.a*)* @bar} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"bar.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"bar.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 122997)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 590081, metadata !0, metadata !"b", metadata !1, i32 5, metadata !7, i32 0} ; [ DW_TAG_arg_variable ] +!7 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] +!8 = metadata !{i32 589843, metadata !2, metadata !"a", metadata !1, i32 1, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !9, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!9 = metadata !{metadata !10} +!10 = metadata !{i32 589837, metadata !1, metadata !"c", metadata !1, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] +!11 = metadata !{i32 590080, metadata !12, metadata !"x", metadata !1, i32 6, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!12 = metadata !{i32 589835, metadata !0, i32 5, i32 22, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!13 = metadata !{i32 5, i32 19, metadata !0, null} +!14 = metadata !{i32 6, i32 14, metadata !12, null} +!15 = metadata !{metadata !"int", metadata !16} +!16 = metadata !{metadata !"omnipotent char", metadata !17} +!17 = metadata !{metadata !"Simple C/C++ TBAA", null} +!18 = metadata !{i32 7, i32 2, metadata !12, null} +!19 = metadata !{i32 8, i32 2, metadata !12, null} + +; check that variable bar:b value range is appropriately trucated in debug info. Here Ltmp5 is end of +; location range. + +;CHECK:Ltmp6 +;CHECK-NEXT: DEBUG_VALUE: bar:b <- undef + +;CHECK:Ldebug_loc0: +;CHECK-NEXT: .quad Ltmp +;CHECK-NEXT: .quad Ltmp6 +;CHECK-NEXT: .short 1 +;CHECK-NEXT: .byte 85 +;CHECK-NEXT: .quad 0 +;CHECK-NEXT: .quad 0 diff --git a/test/CodeGen/X86/div_const.ll b/test/CodeGen/X86/div_const.ll deleted file mode 100644 index f0ada41338b2..000000000000 --- a/test/CodeGen/X86/div_const.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=x86 | grep 365384439 - -define i32 @f9188_mul365384439_shift27(i32 %A) { - %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1] - ret i32 %tmp1 -} - diff --git a/test/CodeGen/X86/divide-by-constant.ll b/test/CodeGen/X86/divide-by-constant.ll new file mode 100644 index 000000000000..7ceb972f61bb --- /dev/null +++ b/test/CodeGen/X86/divide-by-constant.ll @@ -0,0 +1,62 @@ +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -asm-verbose=0 | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i686-pc-linux-gnu" + +define zeroext i16 @test1(i16 zeroext %x) nounwind { +entry: + %div = udiv i16 %x, 33 + ret i16 %div +; CHECK: test1: +; CHECK: imull $63551, %eax, %eax +; CHECK-NEXT: shrl $21, %eax +; CHECK-NEXT: ret +} + +define zeroext i16 @test2(i8 signext %x, i16 zeroext %c) nounwind readnone ssp noredzone { +entry: + %div = udiv i16 %c, 3 + ret i16 %div + +; CHECK: test2: +; CHECK: imull $43691, %eax, %eax +; CHECK-NEXT: shrl $17, %eax +; CHECK-NEXT: ret +} + +define zeroext i8 @test3(i8 zeroext %x, i8 zeroext %c) nounwind readnone ssp noredzone { +entry: + %div = udiv i8 %c, 3 + ret i8 %div + +; CHECK: test3: +; CHECK: movzbl 8(%esp), %eax +; CHECK-NEXT: imull $171, %eax, %eax +; CHECK-NEXT: shrl $9, %eax +; CHECK-NEXT: ret +} + +define signext i16 @test4(i16 signext %x) nounwind { +entry: + %div = sdiv i16 %x, 33 ; <i32> [#uses=1] + ret i16 %div +; CHECK: test4: +; CHECK: imull $-1985, %ecx, %ecx +} + +define i32 @test5(i32 %A) nounwind { + %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1] + ret i32 %tmp1 +; CHECK: test5: +; CHECK: movl $365384439, %eax +; CHECK: mull 4(%esp) +} + +define signext i16 @test6(i16 signext %x) nounwind { +entry: + %div = sdiv i16 %x, 10 + ret i16 %div +; CHECK: test6: +; CHECK: imull $26215, %eax, %eax +; CHECK: shrl $31, %ecx +; CHECK: sarl $18, %eax +} diff --git a/test/CodeGen/X86/dll-linkage.ll b/test/CodeGen/X86/dll-linkage.ll index c634c7e1fd42..913617585206 100644 --- a/test/CodeGen/X86/dll-linkage.ll +++ b/test/CodeGen/X86/dll-linkage.ll @@ -3,7 +3,7 @@ declare dllimport void @foo() define void @bar() nounwind { -; CHECK: call *__imp__foo +; CHECK: calll *__imp__foo call void @foo() ret void } diff --git a/test/CodeGen/X86/dollar-name.ll b/test/CodeGen/X86/dollar-name.ll index 3b263194a5a8..2ecd72909cb1 100644 --- a/test/CodeGen/X86/dollar-name.ll +++ b/test/CodeGen/X86/dollar-name.ll @@ -7,7 +7,7 @@ define i32 @"$foo"() nounwind { ; CHECK: movl ($bar), ; CHECK: addl ($qux), -; CHECK: call ($hen) +; CHECK: calll ($hen) %m = load i32* @"$bar" %n = load i32* @"$qux" %t = add i32 %m, %n diff --git a/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll b/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll new file mode 100644 index 000000000000..9233d3f7c1a0 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll @@ -0,0 +1,23 @@ +; RUN: llc -O0 -relocation-model=pic < %s | not grep call +; rdar://8396318 + +; Don't emit a PIC base register if no addresses are needed. + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" +target triple = "i386-apple-darwin11.0.0" + +define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind ssp { +entry: + %x.addr = alloca i32, align 4 + %y.addr = alloca i32, align 4 + %z.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + store i32 %y, i32* %y.addr, align 4 + store i32 %z, i32* %z.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %tmp1 = load i32* %y.addr, align 4 + %add = add nsw i32 %tmp, %tmp1 + %tmp2 = load i32* %z.addr, align 4 + %add3 = add nsw i32 %add, %tmp2 + ret i32 %add3 +} diff --git a/test/CodeGen/X86/fast-isel-bc.ll b/test/CodeGen/X86/fast-isel-bc.ll index 8d7dc8f9a7f8..4abc3b5b3c85 100644 --- a/test/CodeGen/X86/fast-isel-bc.ll +++ b/test/CodeGen/X86/fast-isel-bc.ll @@ -1,19 +1,23 @@ -; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx | FileCheck %s +; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s ; PR4684 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin9.8" -declare void @func2(<1 x i64>) +declare void @func2(x86_mmx) define void @func1() nounwind { ; This isn't spectacular, but it's MMX code at -O0... -; CHECK: movl $2, %eax -; CHECK: movd %rax, %mm0 -; CHECK: movd %mm0, %rdi +; CHECK: movq2dq %mm0, %xmm0 +; For now, handling of x86_mmx parameters in fast Isel is unimplemented, +; so we get pretty poor code. The below is preferable. +; CHEK: movl $2, %eax +; CHEK: movd %rax, %mm0 +; CHEK: movd %mm0, %rdi - call void @func2(<1 x i64> <i64 2>) + %tmp0 = bitcast <2 x i32><i32 0, i32 2> to x86_mmx + call void @func2(x86_mmx %tmp0) ret void } diff --git a/test/CodeGen/X86/fast-isel-gep.ll b/test/CodeGen/X86/fast-isel-gep.ll index 577dd7223a4d..622a1ff831d0 100644 --- a/test/CodeGen/X86/fast-isel-gep.ll +++ b/test/CodeGen/X86/fast-isel-gep.ll @@ -70,3 +70,20 @@ entry: ; X64: test4: ; X64: 128(%r{{.*}},%r{{.*}},8) } + +; PR8961 - Make sure the sext for the GEP addressing comes before the load that +; is folded. +define i64 @test5(i8* %A, i32 %I, i64 %B) nounwind { + %v8 = getelementptr i8* %A, i32 %I + %v9 = bitcast i8* %v8 to i64* + %v10 = load i64* %v9 + %v11 = add i64 %B, %v10 + ret i64 %v11 +; X64: test5: +; X64: movslq %esi, %rax +; X64-NEXT: movq (%rdi,%rax), %rax +; X64-NEXT: addq %rdx, %rax +; X64-NEXT: ret +} + + diff --git a/test/CodeGen/X86/fast-isel-mem.ll b/test/CodeGen/X86/fast-isel-mem.ll index 35ec1e7115b2..8db1936bc20e 100644 --- a/test/CodeGen/X86/fast-isel-mem.ll +++ b/test/CodeGen/X86/fast-isel-mem.ll @@ -1,10 +1,8 @@ -; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin | \ -; RUN: grep lazy_ptr, | count 2 -; RUN: llc < %s -fast-isel -march=x86 -relocation-model=static | \ -; RUN: grep lea +; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin | FileCheck %s @src = external global i32 +; rdar://6653118 define i32 @loadgv() nounwind { entry: %0 = load i32* @src, align 4 @@ -12,6 +10,14 @@ entry: %2 = add i32 %0, %1 store i32 %2, i32* @src ret i32 %2 +; This should fold one of the loads into the add. +; CHECK: loadgv: +; CHECK: movl L_src$non_lazy_ptr, %ecx +; CHECK: movl (%ecx), %eax +; CHECK: addl (%ecx), %eax +; CHECK: movl %eax, (%ecx) +; CHECK: ret + } %stuff = type { i32 (...)** } @@ -21,4 +27,8 @@ define void @t(%stuff* %this) nounwind { entry: store i32 (...)** getelementptr ([4 x i32 (...)*]* @LotsStuff, i32 0, i32 2), i32 (...)*** null, align 4 ret void +; CHECK: _t: +; CHECK: movl $0, %eax +; CHECK: movl L_LotsStuff$non_lazy_ptr, %ecx + } diff --git a/test/CodeGen/X86/fltused.ll b/test/CodeGen/X86/fltused.ll new file mode 100644 index 000000000000..2ffcb966782a --- /dev/null +++ b/test/CodeGen/X86/fltused.ll @@ -0,0 +1,19 @@ +; The purpose of this test to to verify that the fltused symbol is emitted when +; any function is called with floating point arguments on Windows. And that it +; is not emitted otherwise. + +; RUN: llc < %s -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32 +; RUN: llc < %s -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64 + +@.str = private constant [4 x i8] c"%f\0A\00" + +define i32 @main() nounwind { +entry: + %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), double 1.000000e+000) nounwind + ret i32 0 +} + +declare i32 @printf(i8* nocapture, ...) nounwind + +; WIN32: .globl __fltused +; WIN64: .globl _fltused diff --git a/test/CodeGen/X86/fp-in-intregs.ll b/test/CodeGen/X86/fp-in-intregs.ll index 08ea77d75f26..6966cf049789 100644 --- a/test/CodeGen/X86/fp-in-intregs.ll +++ b/test/CodeGen/X86/fp-in-intregs.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | not egrep {\(\(xor\|and\)ps\|movd\)} +; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s +; CHECK-NOT: {{((xor|and)ps|movd)}} ; These operations should be done in integer registers, eliminating constant ; pool loads, movd's etc. diff --git a/test/CodeGen/X86/fp-stack-compare.ll b/test/CodeGen/X86/fp-stack-compare.ll index 4bdf4590b07c..b216914d2391 100644 --- a/test/CodeGen/X86/fp-stack-compare.ll +++ b/test/CodeGen/X86/fp-stack-compare.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=i386 | \ -; RUN: grep {fucomi.*st.\[12\]} +; RUN: llc < %s -march=x86 -mcpu=i386 | grep {fucompi.*st.\[12\]} ; PR1012 define float @foo(float* %col.2.0) { diff --git a/test/CodeGen/X86/ghc-cc.ll b/test/CodeGen/X86/ghc-cc.ll index 9393cf5a7383..0e65cfdbae30 100644 --- a/test/CodeGen/X86/ghc-cc.ll +++ b/test/CodeGen/X86/ghc-cc.ll @@ -11,9 +11,9 @@ define void @zap(i32 %a, i32 %b) nounwind { entry: ; CHECK: movl {{[0-9]*}}(%esp), %ebx ; CHECK-NEXT: movl {{[0-9]*}}(%esp), %ebp - ; CHECK-NEXT: call addtwo + ; CHECK-NEXT: calll addtwo %0 = call cc 10 i32 @addtwo(i32 %a, i32 %b) - ; CHECK: call foo + ; CHECK: calll foo call void @foo() nounwind ret void } diff --git a/test/CodeGen/X86/global-sections.ll b/test/CodeGen/X86/global-sections.ll index 6d211913b015..39a69e17a100 100644 --- a/test/CodeGen/X86/global-sections.ll +++ b/test/CodeGen/X86/global-sections.ll @@ -15,7 +15,7 @@ ; const int G2 __attribute__((weak)) = 42; -@G2 = weak_odr constant i32 42 +@G2 = weak_odr unnamed_addr constant i32 42 ; TODO: linux drops this into .rodata, we drop it into ".gnu.linkonce.r.G2" @@ -26,7 +26,7 @@ ; int * const G3 = &G1; -@G3 = constant i32* @G1 +@G3 = unnamed_addr constant i32* @G1 ; DARWIN: .section __DATA,__const ; DARWIN: .globl _G3 @@ -41,7 +41,7 @@ ; _Complex long long const G4 = 34; -@G4 = constant {i64,i64} { i64 34, i64 0 } +@G4 = unnamed_addr constant {i64,i64} { i64 34, i64 0 } ; DARWIN: .section __TEXT,__const ; DARWIN: _G4: @@ -66,7 +66,7 @@ @"foo bar" = linkonce global i32 42 ; LINUX: .type foo_20_bar,@object -; LINUX:.section .gnu.linkonce.d.foo_20_bar,"aw",@progbits +; LINUX: .section .data.foo_20_bar,"aGw",@progbits,foo_20_bar,comdat ; LINUX: .weak foo_20_bar ; LINUX: foo_20_bar: @@ -76,10 +76,10 @@ ; DARWIN: "_foo bar": ; PR4650 -@G6 = weak_odr constant [1 x i8] c"\01" +@G6 = weak_odr unnamed_addr constant [1 x i8] c"\01" ; LINUX: .type G6,@object -; LINUX: .section .gnu.linkonce.r.G6,"a",@progbits +; LINUX: .section .rodata.G6,"aG",@progbits,G6,comdat ; LINUX: .weak G6 ; LINUX: G6: ; LINUX: .byte 1 @@ -92,7 +92,7 @@ ; DARWIN: .byte 1 -@G7 = constant [10 x i8] c"abcdefghi\00" +@G7 = unnamed_addr constant [10 x i8] c"abcdefghi\00" ; DARWIN: __TEXT,__cstring,cstring_literals ; DARWIN: .globl _G7 @@ -108,7 +108,7 @@ ; LINUX-SECTIONS: .globl G7 -@G8 = constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ] +@G8 = unnamed_addr constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ] ; DARWIN: .section __TEXT,__const ; DARWIN: .globl _G8 @@ -118,7 +118,7 @@ ; LINUX: .globl G8 ; LINUX:G8: -@G9 = constant [4 x i32] [ i32 1, i32 2, i32 3, i32 0 ] +@G9 = unnamed_addr constant [4 x i32] [ i32 1, i32 2, i32 3, i32 0 ] ; DARWIN: .globl _G9 ; DARWIN: _G9: diff --git a/test/CodeGen/X86/inline-asm-h.ll b/test/CodeGen/X86/inline-asm-h.ll new file mode 100644 index 000000000000..53cf419bd11a --- /dev/null +++ b/test/CodeGen/X86/inline-asm-h.ll @@ -0,0 +1,12 @@ +; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s | FileCheck %s + +@foobar = common global i32 0, align 4 + +define void @zed() nounwind { +entry: + call void asm "movq %mm2,${0:H}", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* @foobar) nounwind + ret void +} + +; CHECK: zed +; CHECK: movq %mm2,foobar+8(%rip) diff --git a/test/CodeGen/X86/inline-asm-ptr-cast.ll b/test/CodeGen/X86/inline-asm-ptr-cast.ll new file mode 100644 index 000000000000..50e302101814 --- /dev/null +++ b/test/CodeGen/X86/inline-asm-ptr-cast.ll @@ -0,0 +1,27 @@ +; RUN: llc -mtriple=x86_64-unknown-linux-gnu <%s +; ModuleID = 'bug.c' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +@func.flagmask = internal constant i64 1, align 8 + +define void @func() nounwind { +entry: + %src = alloca i32, align 4 + %dst = alloca i32, align 4 + %flags = alloca i64, align 8 + %newflags = alloca i64, align 8 + store i32 0, i32* %src, align 4 + store i32 0, i32* %dst, align 4 + store i64 1, i64* %flags, align 8 + store i64 -1, i64* %newflags, align 8 + %0 = bitcast i32* %dst to i8* + %tmp = load i64* %flags, align 8 + %and = and i64 %tmp, 1 + %1 = bitcast i32* %src to i8* + %tmp1 = load i8* %1 + %2 = bitcast i32* %dst to i8* + %tmp2 = load i8* %2 + call void asm "pushfq \0Aandq $2, (%rsp) \0Aorq $3, (%rsp) \0Apopfq \0Aaddb $4, $1 \0Apushfq \0Apopq $0 \0A", "=*&rm,=*&rm,i,r,r,1,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %newflags, i8* %0, i64 -2, i64 %and, i8 %tmp1, i8 %tmp2) nounwind + ret void +} diff --git a/test/CodeGen/X86/insertelement-legalize.ll b/test/CodeGen/X86/insertelement-legalize.ll index 18aade2bb302..3805cbbaaaf8 100644 --- a/test/CodeGen/X86/insertelement-legalize.ll +++ b/test/CodeGen/X86/insertelement-legalize.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-mmx +; RUN: llc < %s -march=x86 ; Test to check that we properly legalize an insert vector element define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind { diff --git a/test/CodeGen/X86/legalize-sub-zero-2.ll b/test/CodeGen/X86/legalize-sub-zero-2.ll new file mode 100644 index 000000000000..f02ca715aeeb --- /dev/null +++ b/test/CodeGen/X86/legalize-sub-zero-2.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin + +define fastcc void @foo(i32 %type) nounwind optsize { +entry: + switch i32 %type, label %bb26 [ + i32 33634, label %bb11 + i32 5121, label %bb27 + ] + +bb11: ; preds = %entry + br label %bb27 + +bb26: ; preds = %entry + unreachable + +bb27: ; preds = %bb11, %entry + %srcpb.0 = phi i32 [ 1, %bb11 ], [ 0, %entry ] + br i1 undef, label %bb348, label %bb30.lr.ph + +bb30.lr.ph: ; preds = %bb27 + %.sum743 = shl i32 %srcpb.0, 1 + %0 = mul i32 %srcpb.0, -2 + %.sum745 = add i32 %.sum743, %0 + br i1 undef, label %bb70, label %bb71 + +bb70: ; preds = %bb30.lr.ph + unreachable + +bb71: ; preds = %bb30.lr.ph + br i1 undef, label %bb92, label %bb80 + +bb80: ; preds = %bb71 + unreachable + +bb92: ; preds = %bb71 + %1 = getelementptr inbounds i8* undef, i32 %.sum745 + unreachable + +bb348: ; preds = %bb27 + ret void +} diff --git a/test/CodeGen/X86/legalize-sub-zero.ll b/test/CodeGen/X86/legalize-sub-zero.ll new file mode 100644 index 000000000000..ee76d468e811 --- /dev/null +++ b/test/CodeGen/X86/legalize-sub-zero.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -mtriple=i686-pc-win32 + +;target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +;target triple = "i686-pc-win32" + +define void @test() nounwind { + %1 = fdiv <3 x double> zeroinitializer, undef + %2 = fdiv <2 x double> zeroinitializer, undef + %3 = shufflevector <2 x double> %2, <2 x double> undef, <3 x i32> <i32 0, i32 +1, i32 undef> + %4 = insertelement <3 x double> %3, double undef, i32 2 + %5 = bitcast <3 x double> %1 to <3 x i64> + %6 = bitcast <3 x double> %4 to <3 x i64> + %7 = sub <3 x i64> %5, %6 + %8 = shufflevector <3 x i64> %7, <3 x i64> undef, <2 x i32> <i32 0, i32 1> + %9 = xor <2 x i64> %8, zeroinitializer + %10 = add nsw <2 x i64> %9, zeroinitializer + %11 = shufflevector <2 x i64> %10, <2 x i64> undef, <3 x i32> <i32 0, i32 1, +i32 undef> + %12 = insertelement <3 x i64> %11, i64 0, i32 2 + %13 = shufflevector <3 x i64> %12, <3 x i64> undef, <4 x i32> <i32 0, i32 1, +i32 2, i32 3> + %14 = shufflevector <4 x i64> %13, <4 x i64> undef, <2 x i32> <i32 0, i32 1> + %15 = bitcast <2 x i64> %14 to <4 x i32> + %16 = shufflevector <4 x i32> %15, <4 x i32> undef, <4 x i32> <i32 0, i32 2, +i32 0, i32 2> + %17 = bitcast <4 x i32> %16 to <2 x i64> + %18 = shufflevector <2 x i64> %17, <2 x i64> undef, <2 x i32> <i32 0, i32 2> + %19 = bitcast <2 x i64> %18 to <4 x i32> + %20 = shufflevector <4 x i32> %19, <4 x i32> undef, <3 x i32> <i32 0, i32 1, +i32 2> + %21 = or <3 x i32> %20, zeroinitializer + store <3 x i32> %21, <3 x i32> addrspace(1)* undef, align 16 + ret void +} diff --git a/test/CodeGen/X86/legalizedag_vec.ll b/test/CodeGen/X86/legalizedag_vec.ll index 574b46acea60..dff693120fb6 100644 --- a/test/CodeGen/X86/legalizedag_vec.ll +++ b/test/CodeGen/X86/legalizedag_vec.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse2 -disable-mmx -o %t -; RUN: grep {call.*divdi3} %t | count 2 +; RUN: llc < %s -march=x86 -mattr=sse2 | FileCheck %s ; Test case for r63760 where we generate a legalization assert that an illegal @@ -12,4 +11,7 @@ define <2 x i64> @test_long_div(<2 x i64> %num, <2 x i64> %div) { %div.r = sdiv <2 x i64> %num, %div ret <2 x i64> %div.r -} +} + +; CHECK: call{{.*(divdi3|alldiv)}} +; CHECK: call{{.*(divdi3|alldiv)}} diff --git a/test/CodeGen/X86/licm-symbol.ll b/test/CodeGen/X86/licm-symbol.ll index 08306c2950e2..c3d1938e9dbd 100644 --- a/test/CodeGen/X86/licm-symbol.ll +++ b/test/CodeGen/X86/licm-symbol.ll @@ -3,7 +3,7 @@ ; MachineLICM should be able to hoist the sF reference out of the loop. ; CHECK: pushl %esi -; CHECK: subl $4, %esp +; CHECK: pushl ; CHECK: movl $176, %esi ; CHECK: addl L___sF$non_lazy_ptr, %esi ; CHECK: .align 4, 0x90 diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll index 354d08206972..faba63007127 100644 --- a/test/CodeGen/X86/loop-blocks.ll +++ b/test/CodeGen/X86/loop-blocks.ll @@ -70,6 +70,7 @@ exit: ; Same as slightly_more_involved, but block_a is now a CFG diamond with ; fallthrough edges which should be preserved. +; "callq block_a_merge_func" is tail duped. ; CHECK: yet_more_involved: ; CHECK: jmp .LBB2_1 @@ -78,12 +79,12 @@ exit: ; CHECK-NEXT: callq bar99 ; CHECK-NEXT: callq get ; CHECK-NEXT: cmpl $2999, %eax -; CHECK-NEXT: jg .LBB2_6 -; CHECK-NEXT: callq block_a_true_func -; CHECK-NEXT: jmp .LBB2_7 -; CHECK-NEXT: .LBB2_6: +; CHECK-NEXT: jle .LBB2_5 ; CHECK-NEXT: callq block_a_false_func -; CHECK-NEXT: .LBB2_7: +; CHECK-NEXT: callq block_a_merge_func +; CHECK-NEXT: jmp .LBB2_1 +; CHECK-NEXT: .LBB2_5: +; CHECK-NEXT: callq block_a_true_func ; CHECK-NEXT: callq block_a_merge_func ; CHECK-NEXT: .LBB2_1: ; CHECK-NEXT: callq body diff --git a/test/CodeGen/X86/lsr-reuse.ll b/test/CodeGen/X86/lsr-reuse.ll index d2ff58be1055..2a9762928329 100644 --- a/test/CodeGen/X86/lsr-reuse.ll +++ b/test/CodeGen/X86/lsr-reuse.ll @@ -353,11 +353,11 @@ return: ; CHECK: count_me_3: ; CHECK: call -; CHECK: movsd (%r15,%r13,8), %xmm0 -; CHECK: mulsd (%r14,%r13,8), %xmm0 -; CHECK: movsd %xmm0, (%r12,%r13,8) -; CHECK: incq %r13 -; CHECK: cmpq %r13, %rbx +; CHECK: movsd (%r{{[^,]*}},%r{{[^,]*}},8), %xmm0 +; CHECK: mulsd (%r{{[^,]*}},%r{{[^,]*}},8), %xmm0 +; CHECK: movsd %xmm0, (%r{{[^,]*}},%r{{[^,]*}},8) +; CHECK: incq %r{{.*}} +; CHECK: cmpq %r{{.*}}, %r{{.*}} ; CHECK: jne declare void @use(i64) @@ -389,7 +389,7 @@ return: ; rdar://7657764 ; CHECK: asd: -; CHECK: BB9_5: +; CHECK: BB9_4: ; CHECK-NEXT: addl (%r{{[^,]*}},%rdi,4), %e ; CHECK-NEXT: incq %rdi ; CHECK-NEXT: cmpq %rdi, %r{{[^,]*}} @@ -464,7 +464,7 @@ bb5: ; preds = %bb3, %entry ; And the one at %bb68, where we want to be sure to use superhero mode: -; CHECK: BB10_9: +; CHECK: BB10_7: ; CHECK-NEXT: movaps 48(%r{{[^,]*}}), %xmm{{.*}} ; CHECK-NEXT: mulps %xmm{{.*}}, %xmm{{.*}} ; CHECK-NEXT: movaps 32(%r{{[^,]*}}), %xmm{{.*}} @@ -484,7 +484,6 @@ bb5: ; preds = %bb3, %entry ; CHECK-NEXT: addq $64, %r{{.*}} ; CHECK-NEXT: addq $64, %r{{.*}} ; CHECK-NEXT: addq $-16, %r{{.*}} -; CHECK-NEXT: BB10_10: ; CHECK-NEXT: cmpq $15, %r{{.*}} ; CHECK-NEXT: jg diff --git a/test/CodeGen/X86/machine-cse.ll b/test/CodeGen/X86/machine-cse.ll index a8afdc84c51f..e284776ed02d 100644 --- a/test/CodeGen/X86/machine-cse.ll +++ b/test/CodeGen/X86/machine-cse.ll @@ -37,3 +37,43 @@ bb3: declare void @bar(i32*) declare fastcc i8* @foo(%struct.s2*) nounwind + +; rdar://8773371 + +declare void @printf(...) nounwind + +define void @commute(i32 %test_case, i32 %scale) nounwind ssp { +; CHECK: commute: +entry: + switch i32 %test_case, label %sw.bb307 [ + i32 1, label %sw.bb + i32 2, label %sw.bb + i32 3, label %sw.bb + ] + +sw.bb: ; preds = %entry, %entry, %entry + %mul = mul nsw i32 %test_case, 3 + %mul20 = mul nsw i32 %mul, %scale + br i1 undef, label %if.end34, label %sw.bb307 + +if.end34: ; preds = %sw.bb +; CHECK: %if.end34 +; CHECK: imull +; CHECK: leal +; CHECK-NOT: imull + tail call void (...)* @printf(i32 %test_case, i32 %mul20) nounwind + %tmp = mul i32 %scale, %test_case + %tmp752 = mul i32 %tmp, 3 + %tmp753 = zext i32 %tmp752 to i64 + br label %bb.nph743.us + +for.body53.us: ; preds = %bb.nph743.us, %for.body53.us + %exitcond = icmp eq i64 undef, %tmp753 + br i1 %exitcond, label %bb.nph743.us, label %for.body53.us + +bb.nph743.us: ; preds = %for.body53.us, %if.end34 + br label %for.body53.us + +sw.bb307: ; preds = %sw.bb, %entry + ret void +} diff --git a/test/CodeGen/X86/memcmp.ll b/test/CodeGen/X86/memcmp.ll index b90d2e211878..36be1f308ccd 100644 --- a/test/CodeGen/X86/memcmp.ll +++ b/test/CodeGen/X86/memcmp.ll @@ -20,8 +20,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp2: -; CHECK: movw (%rsi), %ax -; CHECK: cmpw %ax, (%rdi) +; CHECK: movw (%rdi), %ax +; CHECK: cmpw (%rsi), %ax } define void @memcmp2a(i8* %X, i32* nocapture %P) nounwind { @@ -54,8 +54,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp4: -; CHECK: movl (%rsi), %eax -; CHECK: cmpl %eax, (%rdi) +; CHECK: movl (%rdi), %eax +; CHECK: cmpl (%rsi), %eax } define void @memcmp4a(i8* %X, i32* nocapture %P) nounwind { @@ -87,8 +87,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp8: -; CHECK: movq (%rsi), %rax -; CHECK: cmpq %rax, (%rdi) +; CHECK: movq (%rdi), %rax +; CHECK: cmpq (%rsi), %rax } define void @memcmp8a(i8* %X, i32* nocapture %P) nounwind { diff --git a/test/CodeGen/X86/memcpy.ll b/test/CodeGen/X86/memcpy.ll index 7bc31bec163d..72342cbacb4f 100644 --- a/test/CodeGen/X86/memcpy.ll +++ b/test/CodeGen/X86/memcpy.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=DARWIN declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind @@ -9,8 +10,8 @@ entry: tail call void @llvm.memcpy.p0i8.p0i8.i64( i8* %a, i8* %b, i64 %n, i32 1, i1 0 ) ret i8* %a -; CHECK: test1: -; CHECK: memcpy +; LINUX: test1: +; LINUX: memcpy } ; Variable memcpy's should lower to calls. @@ -21,18 +22,41 @@ entry: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp14, i8* %tmp25, i64 %n, i32 8, i1 0 ) ret i8* %tmp14 -; CHECK: test2: -; CHECK: memcpy +; LINUX: test2: +; LINUX: memcpy } ; Large constant memcpy's should lower to a call when optimizing for size. ; PR6623 + +; On the other hand, Darwin's definition of -Os is optimizing for size without +; hurting performance so it should just ignore optsize when expanding memcpy. +; rdar://8821501 define void @test3(i8* nocapture %A, i8* nocapture %B) nounwind optsize noredzone { entry: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %A, i8* %B, i64 64, i32 1, i1 false) ret void -; CHECK: test3: -; CHECK: memcpy +; LINUX: test3: +; LINUX: memcpy + +; DARWIN: test3: +; DARWIN-NOT: memcpy +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq +; DARWIN: movq } ; Large constant memcpy's should be inlined when not optimizing for size. @@ -40,18 +64,18 @@ define void @test4(i8* nocapture %A, i8* nocapture %B) nounwind noredzone { entry: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %A, i8* %B, i64 64, i32 1, i1 false) ret void -; CHECK: test4: -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq -; CHECK: movq +; LINUX: test4: +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq +; LINUX movq } diff --git a/test/CodeGen/X86/memmove-0.ll b/test/CodeGen/X86/memmove-0.ll deleted file mode 100644 index d4050689f594..000000000000 --- a/test/CodeGen/X86/memmove-0.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memcpy} - -declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a) - -define void @foo(i8* noalias %d, i8* noalias %s, i64 %l) -{ - call void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 1) - ret void -} diff --git a/test/CodeGen/X86/memmove-1.ll b/test/CodeGen/X86/memmove-1.ll deleted file mode 100644 index 2057be88174d..000000000000 --- a/test/CodeGen/X86/memmove-1.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove} - -declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a) - -define void @foo(i8* %d, i8* %s, i64 %l) -{ - call void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 1) - ret void -} diff --git a/test/CodeGen/X86/memmove-2.ll b/test/CodeGen/X86/memmove-2.ll deleted file mode 100644 index 68a9f4dfb9cb..000000000000 --- a/test/CodeGen/X86/memmove-2.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | not grep call - -declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a) - -define void @foo(i8* noalias %d, i8* noalias %s) -{ - call void @llvm.memmove.i64(i8* %d, i8* %s, i64 32, i32 1) - ret void -} diff --git a/test/CodeGen/X86/memmove-3.ll b/test/CodeGen/X86/memmove-3.ll deleted file mode 100644 index d8a419c07457..000000000000 --- a/test/CodeGen/X86/memmove-3.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove} - -declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a) - -define void @foo(i8* %d, i8* %s) -{ - call void @llvm.memmove.i64(i8* %d, i8* %s, i64 32, i32 1) - ret void -} diff --git a/test/CodeGen/X86/memset-2.ll b/test/CodeGen/X86/memset-2.ll index 0e1559548e2b..993583b4a49b 100644 --- a/test/CodeGen/X86/memset-2.ll +++ b/test/CodeGen/X86/memset-2.ll @@ -1,11 +1,11 @@ -; RUN: llc -mtriple=i386-apple-darwin < %s | FileCheck %s +; RUN: llc -mtriple=i386-apple-darwin -mcpu=yonah < %s | FileCheck %s declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind define fastcc void @t1() nounwind { entry: ; CHECK: t1: -; CHECK: call _memset +; CHECK: calll _memset call void @llvm.memset.i32( i8* null, i8 0, i32 188, i32 1 ) nounwind unreachable } @@ -13,7 +13,27 @@ entry: define fastcc void @t2(i8 signext %c) nounwind { entry: ; CHECK: t2: -; CHECK: call _memset +; CHECK: calll _memset call void @llvm.memset.i32( i8* undef, i8 %c, i32 76, i32 1 ) nounwind unreachable } + +declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind + +define void @t3(i8* nocapture %s, i8 %a) nounwind { +entry: + tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 8, i32 1, i1 false) + ret void +; CHECK: t3: +; CHECK: imull $16843009 +} + +define void @t4(i8* nocapture %s, i8 %a) nounwind { +entry: + tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i32 1, i1 false) + ret void +; CHECK: t4: +; CHECK: imull $16843009 +; CHECK-NOT: imul +; CHECK: ret +} diff --git a/test/CodeGen/X86/memset64-on-x86-32.ll b/test/CodeGen/X86/memset64-on-x86-32.ll index c0cd271d985e..3f069b4a1aa8 100644 --- a/test/CodeGen/X86/memset64-on-x86-32.ll +++ b/test/CodeGen/X86/memset64-on-x86-32.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=nehalem | grep movaps | count 5 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=nehalem | grep movups | count 5 ; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=core2 | grep movl | count 20 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | grep movq | count 10 diff --git a/test/CodeGen/X86/mingw-alloca.ll b/test/CodeGen/X86/mingw-alloca.ll index 7dcd84d8a157..ded4b73d0931 100644 --- a/test/CodeGen/X86/mingw-alloca.ll +++ b/test/CodeGen/X86/mingw-alloca.ll @@ -6,7 +6,7 @@ target triple = "i386-pc-mingw32" define void @foo1(i32 %N) nounwind { entry: ; CHECK: _foo1: -; CHECK: call __alloca +; CHECK: calll __alloca %tmp14 = alloca i32, i32 %N ; <i32*> [#uses=1] call void @bar1( i32* %tmp14 ) ret void @@ -19,7 +19,7 @@ entry: ; CHECK: _foo2: ; CHECK: andl $-16, %esp ; CHECK: pushl %eax -; CHECK: call __alloca +; CHECK: calll __alloca ; CHECK: movl 8028(%esp), %eax %A2 = alloca [2000 x i32], align 16 ; <[2000 x i32]*> [#uses=1] %A2.sub = getelementptr [2000 x i32]* %A2, i32 0, i32 0 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/misaligned-memset.ll b/test/CodeGen/X86/misaligned-memset.ll new file mode 100644 index 000000000000..21f8bf2bf29e --- /dev/null +++ b/test/CodeGen/X86/misaligned-memset.ll @@ -0,0 +1,15 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=nehalem < %s | FileCheck %s + +@a = common global [3 x i64] zeroinitializer, align 16 + +define i32 @main() nounwind ssp { +; CHECK: movups +entry: + %retval = alloca i32, align 4 + store i32 0, i32* %retval + call void @llvm.memset.p0i8.i64(i8* bitcast (i64* getelementptr inbounds ([3 x i64]* @a, i32 0, i64 1) to i8*), i8 0, i64 16, i32 1, i1 false) + %0 = load i32* %retval + ret i32 %0 +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/mmx-arg-passing.ll b/test/CodeGen/X86/mmx-arg-passing.ll index 426e98e019bc..b348512b5798 100644 --- a/test/CodeGen/X86/mmx-arg-passing.ll +++ b/test/CodeGen/X86/mmx-arg-passing.ll @@ -1,24 +1,27 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep mm0 | count 3 -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep esp | count 1 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep mm0 | count 1 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep esp | count 2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep xmm0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep rdi ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | not grep movups ; ; On Darwin x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2]. -; On Darwin x86-32, v1i64 values are passed in memory. +; On Darwin x86-32, v1i64 values are passed in memory. In this example, they +; are never moved into an MM register at all. ; On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7]. ; On Darwin x86-64, v1i64 values are passed in 64-bit GPRs. -@u1 = external global <8 x i8> +@u1 = external global x86_mmx -define void @t1(<8 x i8> %v1) nounwind { - store <8 x i8> %v1, <8 x i8>* @u1, align 8 +define void @t1(x86_mmx %v1) nounwind { + store x86_mmx %v1, x86_mmx* @u1, align 8 ret void } -@u2 = external global <1 x i64> +@u2 = external global x86_mmx define void @t2(<1 x i64> %v1) nounwind { - store <1 x i64> %v1, <1 x i64>* @u2, align 8 + %tmp = bitcast <1 x i64> %v1 to x86_mmx + store x86_mmx %tmp, x86_mmx* @u2, align 8 ret void } + diff --git a/test/CodeGen/X86/mmx-arg-passing2.ll b/test/CodeGen/X86/mmx-arg-passing2.ll index c42af082364c..c132d311b94b 100644 --- a/test/CodeGen/X86/mmx-arg-passing2.ll +++ b/test/CodeGen/X86/mmx-arg-passing2.ll @@ -1,17 +1,21 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movq2dq | count 1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2 +; Since the add is not an MMX add, we don't have a movq2dq any more. @g_v8qi = external global <8 x i8> define void @t1() nounwind { %tmp3 = load <8 x i8>* @g_v8qi, align 8 - %tmp4 = tail call i32 (...)* @pass_v8qi( <8 x i8> %tmp3 ) nounwind + %tmp3a = bitcast <8 x i8> %tmp3 to x86_mmx + %tmp4 = tail call i32 (...)* @pass_v8qi( x86_mmx %tmp3a ) nounwind ret void } -define void @t2(<8 x i8> %v1, <8 x i8> %v2) nounwind { - %tmp3 = add <8 x i8> %v1, %v2 - %tmp4 = tail call i32 (...)* @pass_v8qi( <8 x i8> %tmp3 ) nounwind +define void @t2(x86_mmx %v1, x86_mmx %v2) nounwind { + %v1a = bitcast x86_mmx %v1 to <8 x i8> + %v2b = bitcast x86_mmx %v2 to <8 x i8> + %tmp3 = add <8 x i8> %v1a, %v2b + %tmp3a = bitcast <8 x i8> %tmp3 to x86_mmx + %tmp4 = tail call i32 (...)* @pass_v8qi( x86_mmx %tmp3a ) nounwind ret void } diff --git a/test/CodeGen/X86/mmx-arith.ll b/test/CodeGen/X86/mmx-arith.ll index e4dfdbfe1bb1..681748732401 100644 --- a/test/CodeGen/X86/mmx-arith.ll +++ b/test/CodeGen/X86/mmx-arith.ll @@ -1,131 +1,309 @@ ; RUN: llc < %s -march=x86 -mattr=+mmx ;; A basic sanity check to make sure that MMX arithmetic actually compiles. +;; First is a straight translation of the original with bitcasts as needed. -define void @foo(<8 x i8>* %A, <8 x i8>* %B) { +define void @foo(x86_mmx* %A, x86_mmx* %B) { entry: - %tmp1 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1] - %tmp3 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp4 = add <8 x i8> %tmp1, %tmp3 ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp4, <8 x i8>* %A - %tmp7 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp12 = tail call <8 x i8> @llvm.x86.mmx.padds.b( <8 x i8> %tmp4, <8 x i8> %tmp7 ) ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp12, <8 x i8>* %A - %tmp16 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp21 = tail call <8 x i8> @llvm.x86.mmx.paddus.b( <8 x i8> %tmp12, <8 x i8> %tmp16 ) ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp21, <8 x i8>* %A - %tmp27 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp28 = sub <8 x i8> %tmp21, %tmp27 ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp28, <8 x i8>* %A - %tmp31 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp36 = tail call <8 x i8> @llvm.x86.mmx.psubs.b( <8 x i8> %tmp28, <8 x i8> %tmp31 ) ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp36, <8 x i8>* %A - %tmp40 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp45 = tail call <8 x i8> @llvm.x86.mmx.psubus.b( <8 x i8> %tmp36, <8 x i8> %tmp40 ) ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp45, <8 x i8>* %A - %tmp51 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp52 = mul <8 x i8> %tmp45, %tmp51 ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp52, <8 x i8>* %A - %tmp57 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp58 = and <8 x i8> %tmp52, %tmp57 ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp58, <8 x i8>* %A - %tmp63 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp64 = or <8 x i8> %tmp58, %tmp63 ; <<8 x i8>> [#uses=2] - store <8 x i8> %tmp64, <8 x i8>* %A - %tmp69 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1] - %tmp70 = xor <8 x i8> %tmp64, %tmp69 ; <<8 x i8>> [#uses=1] - store <8 x i8> %tmp70, <8 x i8>* %A + %tmp1 = load x86_mmx* %A ; <x86_mmx> [#uses=1] + %tmp3 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp1a = bitcast x86_mmx %tmp1 to <8 x i8> + %tmp3a = bitcast x86_mmx %tmp3 to <8 x i8> + %tmp4 = add <8 x i8> %tmp1a, %tmp3a ; <<8 x i8>> [#uses=2] + %tmp4a = bitcast <8 x i8> %tmp4 to x86_mmx + store x86_mmx %tmp4a, x86_mmx* %A + %tmp7 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.b( x86_mmx %tmp4a, x86_mmx %tmp7 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp12, x86_mmx* %A + %tmp16 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp21, x86_mmx* %A + %tmp27 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp21a = bitcast x86_mmx %tmp21 to <8 x i8> + %tmp27a = bitcast x86_mmx %tmp27 to <8 x i8> + %tmp28 = sub <8 x i8> %tmp21a, %tmp27a ; <<8 x i8>> [#uses=2] + %tmp28a = bitcast <8 x i8> %tmp28 to x86_mmx + store x86_mmx %tmp28a, x86_mmx* %A + %tmp31 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.b( x86_mmx %tmp28a, x86_mmx %tmp31 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp36, x86_mmx* %A + %tmp40 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.b( x86_mmx %tmp36, x86_mmx %tmp40 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp45, x86_mmx* %A + %tmp51 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp45a = bitcast x86_mmx %tmp45 to <8 x i8> + %tmp51a = bitcast x86_mmx %tmp51 to <8 x i8> + %tmp52 = mul <8 x i8> %tmp45a, %tmp51a ; <<8 x i8>> [#uses=2] + %tmp52a = bitcast <8 x i8> %tmp52 to x86_mmx + store x86_mmx %tmp52a, x86_mmx* %A + %tmp57 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp57a = bitcast x86_mmx %tmp57 to <8 x i8> + %tmp58 = and <8 x i8> %tmp52, %tmp57a ; <<8 x i8>> [#uses=2] + %tmp58a = bitcast <8 x i8> %tmp58 to x86_mmx + store x86_mmx %tmp58a, x86_mmx* %A + %tmp63 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp63a = bitcast x86_mmx %tmp63 to <8 x i8> + %tmp64 = or <8 x i8> %tmp58, %tmp63a ; <<8 x i8>> [#uses=2] + %tmp64a = bitcast <8 x i8> %tmp64 to x86_mmx + store x86_mmx %tmp64a, x86_mmx* %A + %tmp69 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp69a = bitcast x86_mmx %tmp69 to <8 x i8> + %tmp64b = bitcast x86_mmx %tmp64a to <8 x i8> + %tmp70 = xor <8 x i8> %tmp64b, %tmp69a ; <<8 x i8>> [#uses=1] + %tmp70a = bitcast <8 x i8> %tmp70 to x86_mmx + store x86_mmx %tmp70a, x86_mmx* %A tail call void @llvm.x86.mmx.emms( ) ret void } -define void @baz(<2 x i32>* %A, <2 x i32>* %B) { +define void @baz(x86_mmx* %A, x86_mmx* %B) { entry: - %tmp1 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1] - %tmp3 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] - %tmp4 = add <2 x i32> %tmp1, %tmp3 ; <<2 x i32>> [#uses=2] - store <2 x i32> %tmp4, <2 x i32>* %A - %tmp9 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] - %tmp10 = sub <2 x i32> %tmp4, %tmp9 ; <<2 x i32>> [#uses=2] - store <2 x i32> %tmp10, <2 x i32>* %A - %tmp15 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] - %tmp16 = mul <2 x i32> %tmp10, %tmp15 ; <<2 x i32>> [#uses=2] - store <2 x i32> %tmp16, <2 x i32>* %A - %tmp21 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] - %tmp22 = and <2 x i32> %tmp16, %tmp21 ; <<2 x i32>> [#uses=2] - store <2 x i32> %tmp22, <2 x i32>* %A - %tmp27 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] - %tmp28 = or <2 x i32> %tmp22, %tmp27 ; <<2 x i32>> [#uses=2] - store <2 x i32> %tmp28, <2 x i32>* %A - %tmp33 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1] - %tmp34 = xor <2 x i32> %tmp28, %tmp33 ; <<2 x i32>> [#uses=1] - store <2 x i32> %tmp34, <2 x i32>* %A + %tmp1 = load x86_mmx* %A ; <x86_mmx> [#uses=1] + %tmp3 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp1a = bitcast x86_mmx %tmp1 to <2 x i32> + %tmp3a = bitcast x86_mmx %tmp3 to <2 x i32> + %tmp4 = add <2 x i32> %tmp1a, %tmp3a ; <<2 x i32>> [#uses=2] + %tmp4a = bitcast <2 x i32> %tmp4 to x86_mmx + store x86_mmx %tmp4a, x86_mmx* %A + %tmp9 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp9a = bitcast x86_mmx %tmp9 to <2 x i32> + %tmp10 = sub <2 x i32> %tmp4, %tmp9a ; <<2 x i32>> [#uses=2] + %tmp10a = bitcast <2 x i32> %tmp4 to x86_mmx + store x86_mmx %tmp10a, x86_mmx* %A + %tmp15 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp10b = bitcast x86_mmx %tmp10a to <2 x i32> + %tmp15a = bitcast x86_mmx %tmp15 to <2 x i32> + %tmp16 = mul <2 x i32> %tmp10b, %tmp15a ; <<2 x i32>> [#uses=2] + %tmp16a = bitcast <2 x i32> %tmp16 to x86_mmx + store x86_mmx %tmp16a, x86_mmx* %A + %tmp21 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp16b = bitcast x86_mmx %tmp16a to <2 x i32> + %tmp21a = bitcast x86_mmx %tmp21 to <2 x i32> + %tmp22 = and <2 x i32> %tmp16b, %tmp21a ; <<2 x i32>> [#uses=2] + %tmp22a = bitcast <2 x i32> %tmp22 to x86_mmx + store x86_mmx %tmp22a, x86_mmx* %A + %tmp27 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp22b = bitcast x86_mmx %tmp22a to <2 x i32> + %tmp27a = bitcast x86_mmx %tmp27 to <2 x i32> + %tmp28 = or <2 x i32> %tmp22b, %tmp27a ; <<2 x i32>> [#uses=2] + %tmp28a = bitcast <2 x i32> %tmp28 to x86_mmx + store x86_mmx %tmp28a, x86_mmx* %A + %tmp33 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp28b = bitcast x86_mmx %tmp28a to <2 x i32> + %tmp33a = bitcast x86_mmx %tmp33 to <2 x i32> + %tmp34 = xor <2 x i32> %tmp28b, %tmp33a ; <<2 x i32>> [#uses=1] + %tmp34a = bitcast <2 x i32> %tmp34 to x86_mmx + store x86_mmx %tmp34a, x86_mmx* %A tail call void @llvm.x86.mmx.emms( ) ret void } -define void @bar(<4 x i16>* %A, <4 x i16>* %B) { +define void @bar(x86_mmx* %A, x86_mmx* %B) { entry: - %tmp1 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1] - %tmp3 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp4 = add <4 x i16> %tmp1, %tmp3 ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp4, <4 x i16>* %A - %tmp7 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp12 = tail call <4 x i16> @llvm.x86.mmx.padds.w( <4 x i16> %tmp4, <4 x i16> %tmp7 ) ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp12, <4 x i16>* %A - %tmp16 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp21 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp12, <4 x i16> %tmp16 ) ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp21, <4 x i16>* %A - %tmp27 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp28 = sub <4 x i16> %tmp21, %tmp27 ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp28, <4 x i16>* %A - %tmp31 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp36 = tail call <4 x i16> @llvm.x86.mmx.psubs.w( <4 x i16> %tmp28, <4 x i16> %tmp31 ) ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp36, <4 x i16>* %A - %tmp40 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp45 = tail call <4 x i16> @llvm.x86.mmx.psubus.w( <4 x i16> %tmp36, <4 x i16> %tmp40 ) ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp45, <4 x i16>* %A - %tmp51 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp52 = mul <4 x i16> %tmp45, %tmp51 ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp52, <4 x i16>* %A - %tmp55 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp60 = tail call <4 x i16> @llvm.x86.mmx.pmulh.w( <4 x i16> %tmp52, <4 x i16> %tmp55 ) ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp60, <4 x i16>* %A - %tmp64 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp69 = tail call <2 x i32> @llvm.x86.mmx.pmadd.wd( <4 x i16> %tmp60, <4 x i16> %tmp64 ) ; <<2 x i32>> [#uses=1] - %tmp70 = bitcast <2 x i32> %tmp69 to <4 x i16> ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp70, <4 x i16>* %A - %tmp75 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp76 = and <4 x i16> %tmp70, %tmp75 ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp76, <4 x i16>* %A - %tmp81 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp82 = or <4 x i16> %tmp76, %tmp81 ; <<4 x i16>> [#uses=2] - store <4 x i16> %tmp82, <4 x i16>* %A - %tmp87 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1] - %tmp88 = xor <4 x i16> %tmp82, %tmp87 ; <<4 x i16>> [#uses=1] - store <4 x i16> %tmp88, <4 x i16>* %A + %tmp1 = load x86_mmx* %A ; <x86_mmx> [#uses=1] + %tmp3 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp1a = bitcast x86_mmx %tmp1 to <4 x i16> + %tmp3a = bitcast x86_mmx %tmp3 to <4 x i16> + %tmp4 = add <4 x i16> %tmp1a, %tmp3a ; <<4 x i16>> [#uses=2] + %tmp4a = bitcast <4 x i16> %tmp4 to x86_mmx + store x86_mmx %tmp4a, x86_mmx* %A + %tmp7 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.w( x86_mmx %tmp4a, x86_mmx %tmp7 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp12, x86_mmx* %A + %tmp16 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp21, x86_mmx* %A + %tmp27 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp21a = bitcast x86_mmx %tmp21 to <4 x i16> + %tmp27a = bitcast x86_mmx %tmp27 to <4 x i16> + %tmp28 = sub <4 x i16> %tmp21a, %tmp27a ; <<4 x i16>> [#uses=2] + %tmp28a = bitcast <4 x i16> %tmp28 to x86_mmx + store x86_mmx %tmp28a, x86_mmx* %A + %tmp31 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.w( x86_mmx %tmp28a, x86_mmx %tmp31 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp36, x86_mmx* %A + %tmp40 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.w( x86_mmx %tmp36, x86_mmx %tmp40 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp45, x86_mmx* %A + %tmp51 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp45a = bitcast x86_mmx %tmp45 to <4 x i16> + %tmp51a = bitcast x86_mmx %tmp51 to <4 x i16> + %tmp52 = mul <4 x i16> %tmp45a, %tmp51a ; <<4 x i16>> [#uses=2] + %tmp52a = bitcast <4 x i16> %tmp52 to x86_mmx + store x86_mmx %tmp52a, x86_mmx* %A + %tmp55 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp60 = tail call x86_mmx @llvm.x86.mmx.pmulh.w( x86_mmx %tmp52a, x86_mmx %tmp55 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp60, x86_mmx* %A + %tmp64 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp69 = tail call x86_mmx @llvm.x86.mmx.pmadd.wd( x86_mmx %tmp60, x86_mmx %tmp64 ) ; <x86_mmx> [#uses=1] + %tmp70 = bitcast x86_mmx %tmp69 to x86_mmx ; <x86_mmx> [#uses=2] + store x86_mmx %tmp70, x86_mmx* %A + %tmp75 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp70a = bitcast x86_mmx %tmp70 to <4 x i16> + %tmp75a = bitcast x86_mmx %tmp75 to <4 x i16> + %tmp76 = and <4 x i16> %tmp70a, %tmp75a ; <<4 x i16>> [#uses=2] + %tmp76a = bitcast <4 x i16> %tmp76 to x86_mmx + store x86_mmx %tmp76a, x86_mmx* %A + %tmp81 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp76b = bitcast x86_mmx %tmp76a to <4 x i16> + %tmp81a = bitcast x86_mmx %tmp81 to <4 x i16> + %tmp82 = or <4 x i16> %tmp76b, %tmp81a ; <<4 x i16>> [#uses=2] + %tmp82a = bitcast <4 x i16> %tmp82 to x86_mmx + store x86_mmx %tmp82a, x86_mmx* %A + %tmp87 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp82b = bitcast x86_mmx %tmp82a to <4 x i16> + %tmp87a = bitcast x86_mmx %tmp87 to <4 x i16> + %tmp88 = xor <4 x i16> %tmp82b, %tmp87a ; <<4 x i16>> [#uses=1] + %tmp88a = bitcast <4 x i16> %tmp88 to x86_mmx + store x86_mmx %tmp88a, x86_mmx* %A tail call void @llvm.x86.mmx.emms( ) ret void } -declare <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8>, <8 x i8>) +;; The following is modified to use MMX intrinsics everywhere they work. -declare <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8>, <8 x i8>) +define void @fooa(x86_mmx* %A, x86_mmx* %B) { +entry: + %tmp1 = load x86_mmx* %A ; <x86_mmx> [#uses=1] + %tmp3 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp4 = tail call x86_mmx @llvm.x86.mmx.padd.b( x86_mmx %tmp1, x86_mmx %tmp3 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp4, x86_mmx* %A + %tmp7 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.b( x86_mmx %tmp4, x86_mmx %tmp7 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp12, x86_mmx* %A + %tmp16 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp21, x86_mmx* %A + %tmp27 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp28 = tail call x86_mmx @llvm.x86.mmx.psub.b( x86_mmx %tmp21, x86_mmx %tmp27 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp28, x86_mmx* %A + %tmp31 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.b( x86_mmx %tmp28, x86_mmx %tmp31 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp36, x86_mmx* %A + %tmp40 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.b( x86_mmx %tmp36, x86_mmx %tmp40 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp45, x86_mmx* %A + %tmp51 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp51a = bitcast x86_mmx %tmp51 to i64 + %tmp51aa = bitcast i64 %tmp51a to <8 x i8> + %tmp51b = bitcast x86_mmx %tmp45 to <8 x i8> + %tmp52 = mul <8 x i8> %tmp51b, %tmp51aa ; <x86_mmx> [#uses=2] + %tmp52a = bitcast <8 x i8> %tmp52 to i64 + %tmp52aa = bitcast i64 %tmp52a to x86_mmx + store x86_mmx %tmp52aa, x86_mmx* %A + %tmp57 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp58 = tail call x86_mmx @llvm.x86.mmx.pand( x86_mmx %tmp51, x86_mmx %tmp57 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp58, x86_mmx* %A + %tmp63 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp64 = tail call x86_mmx @llvm.x86.mmx.por( x86_mmx %tmp58, x86_mmx %tmp63 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp64, x86_mmx* %A + %tmp69 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp70 = tail call x86_mmx @llvm.x86.mmx.pxor( x86_mmx %tmp64, x86_mmx %tmp69 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp70, x86_mmx* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} -declare <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8>, <8 x i8>) +define void @baza(x86_mmx* %A, x86_mmx* %B) { +entry: + %tmp1 = load x86_mmx* %A ; <x86_mmx> [#uses=1] + %tmp3 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp4 = tail call x86_mmx @llvm.x86.mmx.padd.d( x86_mmx %tmp1, x86_mmx %tmp3 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp4, x86_mmx* %A + %tmp9 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp10 = tail call x86_mmx @llvm.x86.mmx.psub.d( x86_mmx %tmp4, x86_mmx %tmp9 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp10, x86_mmx* %A + %tmp15 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp10a = bitcast x86_mmx %tmp10 to <2 x i32> + %tmp15a = bitcast x86_mmx %tmp15 to <2 x i32> + %tmp16 = mul <2 x i32> %tmp10a, %tmp15a ; <x86_mmx> [#uses=2] + %tmp16a = bitcast <2 x i32> %tmp16 to x86_mmx + store x86_mmx %tmp16a, x86_mmx* %A + %tmp21 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp22 = tail call x86_mmx @llvm.x86.mmx.pand( x86_mmx %tmp16a, x86_mmx %tmp21 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp22, x86_mmx* %A + %tmp27 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp28 = tail call x86_mmx @llvm.x86.mmx.por( x86_mmx %tmp22, x86_mmx %tmp27 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp28, x86_mmx* %A + %tmp33 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp34 = tail call x86_mmx @llvm.x86.mmx.pxor( x86_mmx %tmp28, x86_mmx %tmp33 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp34, x86_mmx* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} -declare <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8>, <8 x i8>) +define void @bara(x86_mmx* %A, x86_mmx* %B) { +entry: + %tmp1 = load x86_mmx* %A ; <x86_mmx> [#uses=1] + %tmp3 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp4 = tail call x86_mmx @llvm.x86.mmx.padd.w( x86_mmx %tmp1, x86_mmx %tmp3 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp4, x86_mmx* %A + %tmp7 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.w( x86_mmx %tmp4, x86_mmx %tmp7 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp12, x86_mmx* %A + %tmp16 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp21, x86_mmx* %A + %tmp27 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp28 = tail call x86_mmx @llvm.x86.mmx.psub.w( x86_mmx %tmp21, x86_mmx %tmp27 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp28, x86_mmx* %A + %tmp31 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.w( x86_mmx %tmp28, x86_mmx %tmp31 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp36, x86_mmx* %A + %tmp40 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.w( x86_mmx %tmp36, x86_mmx %tmp40 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp45, x86_mmx* %A + %tmp51 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp52 = tail call x86_mmx @llvm.x86.mmx.pmull.w( x86_mmx %tmp45, x86_mmx %tmp51 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp52, x86_mmx* %A + %tmp55 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp60 = tail call x86_mmx @llvm.x86.mmx.pmulh.w( x86_mmx %tmp52, x86_mmx %tmp55 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp60, x86_mmx* %A + %tmp64 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp69 = tail call x86_mmx @llvm.x86.mmx.pmadd.wd( x86_mmx %tmp60, x86_mmx %tmp64 ) ; <x86_mmx> [#uses=1] + %tmp70 = bitcast x86_mmx %tmp69 to x86_mmx ; <x86_mmx> [#uses=2] + store x86_mmx %tmp70, x86_mmx* %A + %tmp75 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp76 = tail call x86_mmx @llvm.x86.mmx.pand( x86_mmx %tmp70, x86_mmx %tmp75 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp76, x86_mmx* %A + %tmp81 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp82 = tail call x86_mmx @llvm.x86.mmx.por( x86_mmx %tmp76, x86_mmx %tmp81 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp82, x86_mmx* %A + %tmp87 = load x86_mmx* %B ; <x86_mmx> [#uses=1] + %tmp88 = tail call x86_mmx @llvm.x86.mmx.pxor( x86_mmx %tmp82, x86_mmx %tmp87 ) ; <x86_mmx> [#uses=2] + store x86_mmx %tmp88, x86_mmx* %A + tail call void @llvm.x86.mmx.emms( ) + ret void +} -declare <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16>, <4 x i16>) +declare x86_mmx @llvm.x86.mmx.paddus.b(x86_mmx, x86_mmx) -declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) +declare x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx, x86_mmx) -declare <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16>, <4 x i16>) +declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx) -declare <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16>, <4 x i16>) +declare x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx, x86_mmx) -declare <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16>, <4 x i16>) +declare x86_mmx @llvm.x86.mmx.pmulh.w(x86_mmx, x86_mmx) -declare <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16>, <4 x i16>) +declare x86_mmx @llvm.x86.mmx.pmadd.wd(x86_mmx, x86_mmx) declare void @llvm.x86.mmx.emms() + +declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padds.b(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padds.w(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padds.d(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.psubs.d(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.psub.b(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.psub.w(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.psub.d(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.pmull.w(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.pand(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.por(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.pxor(x86_mmx, x86_mmx) + diff --git a/test/CodeGen/X86/mmx-bitcast-to-i64.ll b/test/CodeGen/X86/mmx-bitcast-to-i64.ll index 1fd8f67a0ccc..8b1840abf615 100644 --- a/test/CodeGen/X86/mmx-bitcast-to-i64.ll +++ b/test/CodeGen/X86/mmx-bitcast-to-i64.ll @@ -1,26 +1,31 @@ ; RUN: llc < %s -march=x86-64 | grep movd | count 4 -define i64 @foo(<1 x i64>* %p) { - %t = load <1 x i64>* %p - %u = add <1 x i64> %t, %t - %s = bitcast <1 x i64> %u to i64 +define i64 @foo(x86_mmx* %p) { + %t = load x86_mmx* %p + %u = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %t, x86_mmx %t) + %s = bitcast x86_mmx %u to i64 ret i64 %s } -define i64 @goo(<2 x i32>* %p) { - %t = load <2 x i32>* %p - %u = add <2 x i32> %t, %t - %s = bitcast <2 x i32> %u to i64 +define i64 @goo(x86_mmx* %p) { + %t = load x86_mmx* %p + %u = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %t, x86_mmx %t) + %s = bitcast x86_mmx %u to i64 ret i64 %s } -define i64 @hoo(<4 x i16>* %p) { - %t = load <4 x i16>* %p - %u = add <4 x i16> %t, %t - %s = bitcast <4 x i16> %u to i64 +define i64 @hoo(x86_mmx* %p) { + %t = load x86_mmx* %p + %u = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %t, x86_mmx %t) + %s = bitcast x86_mmx %u to i64 ret i64 %s } -define i64 @ioo(<8 x i8>* %p) { - %t = load <8 x i8>* %p - %u = add <8 x i8> %t, %t - %s = bitcast <8 x i8> %u to i64 +define i64 @ioo(x86_mmx* %p) { + %t = load x86_mmx* %p + %u = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %t, x86_mmx %t) + %s = bitcast x86_mmx %u to i64 ret i64 %s } + +declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx) diff --git a/test/CodeGen/X86/mmx-builtins.ll b/test/CodeGen/X86/mmx-builtins.ll new file mode 100644 index 000000000000..3ac0e4ee4b85 --- /dev/null +++ b/test/CodeGen/X86/mmx-builtins.ll @@ -0,0 +1,1324 @@ +; RUN: llc < %s -march=x86 -mattr=+mmx,+ssse3 | FileCheck %s + +declare x86_mmx @llvm.x86.ssse3.phadd.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test1(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: phaddw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %2 = bitcast <4 x i16> %1 to x86_mmx + %3 = bitcast <4 x i16> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.phadd.w(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <4 x i16> + %6 = bitcast <4 x i16> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.mmx.pcmpgt.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test88(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pcmpgtd +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pcmpgt.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test87(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pcmpgtw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pcmpgt.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test86(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pcmpgtb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pcmpeq.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test85(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pcmpeqd +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pcmpeq.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pcmpeq.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test84(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pcmpeqw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pcmpeq.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pcmpeq.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test83(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pcmpeqb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pcmpeq.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.punpckldq(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test82(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: punpckldq +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.punpckldq(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.punpcklwd(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test81(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: punpcklwd +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.punpcklwd(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.punpcklbw(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test80(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: punpcklbw +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.punpcklbw(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test79(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: punpckhdq +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.punpckhwd(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test78(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: punpckhwd +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.punpckhwd(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.punpckhbw(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test77(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: punpckhbw +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.punpckhbw(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.packuswb(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test76(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: packuswb +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.packuswb(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.packssdw(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test75(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: packssdw +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.packssdw(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.packsswb(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test74(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: packsswb +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.packsswb(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psrai.d(x86_mmx, i32) nounwind readnone + +define i64 @test73(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: psrad +entry: + %0 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %0 to x86_mmx + %1 = tail call x86_mmx @llvm.x86.mmx.psrai.d(x86_mmx %mmx_var.i, i32 3) nounwind + %2 = bitcast x86_mmx %1 to <2 x i32> + %3 = bitcast <2 x i32> %2 to <1 x i64> + %4 = extractelement <1 x i64> %3, i32 0 + ret i64 %4 +} + +declare x86_mmx @llvm.x86.mmx.psrai.w(x86_mmx, i32) nounwind readnone + +define i64 @test72(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: psraw +entry: + %0 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %0 to x86_mmx + %1 = tail call x86_mmx @llvm.x86.mmx.psrai.w(x86_mmx %mmx_var.i, i32 3) nounwind + %2 = bitcast x86_mmx %1 to <4 x i16> + %3 = bitcast <4 x i16> %2 to <1 x i64> + %4 = extractelement <1 x i64> %3, i32 0 + ret i64 %4 +} + +declare x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx, i32) nounwind readnone + +define i64 @test71(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: psrlq +entry: + %0 = extractelement <1 x i64> %a, i32 0 + %mmx_var.i = bitcast i64 %0 to x86_mmx + %1 = tail call x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx %mmx_var.i, i32 3) nounwind + %2 = bitcast x86_mmx %1 to i64 + ret i64 %2 +} + +declare x86_mmx @llvm.x86.mmx.psrli.d(x86_mmx, i32) nounwind readnone + +define i64 @test70(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: psrld +entry: + %0 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %0 to x86_mmx + %1 = tail call x86_mmx @llvm.x86.mmx.psrli.d(x86_mmx %mmx_var.i, i32 3) nounwind + %2 = bitcast x86_mmx %1 to <2 x i32> + %3 = bitcast <2 x i32> %2 to <1 x i64> + %4 = extractelement <1 x i64> %3, i32 0 + ret i64 %4 +} + +declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32) nounwind readnone + +define i64 @test69(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: psrlw +entry: + %0 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %0 to x86_mmx + %1 = tail call x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx %mmx_var.i, i32 3) nounwind + %2 = bitcast x86_mmx %1 to <4 x i16> + %3 = bitcast <4 x i16> %2 to <1 x i64> + %4 = extractelement <1 x i64> %3, i32 0 + ret i64 %4 +} + +declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) nounwind readnone + +define i64 @test68(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: psllq +entry: + %0 = extractelement <1 x i64> %a, i32 0 + %mmx_var.i = bitcast i64 %0 to x86_mmx + %1 = tail call x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx %mmx_var.i, i32 3) nounwind + %2 = bitcast x86_mmx %1 to i64 + ret i64 %2 +} + +declare x86_mmx @llvm.x86.mmx.pslli.d(x86_mmx, i32) nounwind readnone + +define i64 @test67(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: pslld +entry: + %0 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %0 to x86_mmx + %1 = tail call x86_mmx @llvm.x86.mmx.pslli.d(x86_mmx %mmx_var.i, i32 3) nounwind + %2 = bitcast x86_mmx %1 to <2 x i32> + %3 = bitcast <2 x i32> %2 to <1 x i64> + %4 = extractelement <1 x i64> %3, i32 0 + ret i64 %4 +} + +declare x86_mmx @llvm.x86.mmx.pslli.w(x86_mmx, i32) nounwind readnone + +define i64 @test66(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: psllw +entry: + %0 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %0 to x86_mmx + %1 = tail call x86_mmx @llvm.x86.mmx.pslli.w(x86_mmx %mmx_var.i, i32 3) nounwind + %2 = bitcast x86_mmx %1 to <4 x i16> + %3 = bitcast <4 x i16> %2 to <1 x i64> + %4 = extractelement <1 x i64> %3, i32 0 + ret i64 %4 +} + +declare x86_mmx @llvm.x86.mmx.psra.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test65(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psrad +entry: + %0 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1.i = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psra.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psra.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test64(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psraw +entry: + %0 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1.i = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psra.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psrl.q(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test63(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psrlq +entry: + %0 = extractelement <1 x i64> %a, i32 0 + %mmx_var.i = bitcast i64 %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1.i = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psrl.q(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to i64 + ret i64 %3 +} + +declare x86_mmx @llvm.x86.mmx.psrl.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test62(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psrld +entry: + %0 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1.i = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psrl.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psrl.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test61(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psrlw +entry: + %0 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1.i = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psrl.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psll.q(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test60(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psllq +entry: + %0 = extractelement <1 x i64> %a, i32 0 + %mmx_var.i = bitcast i64 %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1.i = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psll.q(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to i64 + ret i64 %3 +} + +declare x86_mmx @llvm.x86.mmx.psll.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test59(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pslld +entry: + %0 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1.i = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psll.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psll.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test58(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psllw +entry: + %0 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1.i = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psll.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pxor(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test56(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pxor +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pxor(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.por(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test55(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: por +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.por(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pandn(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test54(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pandn +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pandn(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pand(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test53(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pand +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pand(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pmull.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test52(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmullw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmull.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +define i64 @test51(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmullw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmull.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pmulh.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test50(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmulhw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmulh.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pmadd.wd(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test49(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmaddwd +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmadd.wd(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test48(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psubusw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test47(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psubusb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test46(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psubsw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test45(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psubsb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +define i64 @test44(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psubq +entry: + %0 = extractelement <1 x i64> %a, i32 0 + %mmx_var = bitcast i64 %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1 = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psub.q(x86_mmx %mmx_var, x86_mmx %mmx_var1) + %3 = bitcast x86_mmx %2 to i64 + ret i64 %3 +} + +declare x86_mmx @llvm.x86.mmx.psub.q(x86_mmx, x86_mmx) nounwind readnone + +declare x86_mmx @llvm.x86.mmx.psub.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test43(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psubd +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psub.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psub.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test42(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psubw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psub.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psub.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test41(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psubb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psub.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test40(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: paddusw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.paddus.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test39(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: paddusb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.paddus.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.padds.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test38(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: paddsw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.padds.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.padds.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test37(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: paddsb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.padds.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test36(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: paddq +entry: + %0 = extractelement <1 x i64> %a, i32 0 + %mmx_var = bitcast i64 %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1 = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %mmx_var, x86_mmx %mmx_var1) + %3 = bitcast x86_mmx %2 to i64 + ret i64 %3 +} + +declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test35(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: paddd +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test34(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: paddw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test33(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: paddb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.psad.bw(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test32(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psadbw +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.psad.bw(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to i64 + ret i64 %3 +} + +declare x86_mmx @llvm.x86.mmx.pmins.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test31(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pminsw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmins.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pminu.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test30(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pminub +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pminu.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pmaxs.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test29(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmaxsw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmaxs.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pmaxu.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test28(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmaxub +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmaxu.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pavg.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test27(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pavgw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pavg.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pavg.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test26(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pavgb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pavg.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare void @llvm.x86.mmx.movnt.dq(x86_mmx*, x86_mmx) nounwind + +define void @test25(<1 x i64>* %p, <1 x i64> %a) nounwind optsize ssp { +; CHECK: movntq +entry: + %mmx_ptr_var.i = bitcast <1 x i64>* %p to x86_mmx* + %0 = extractelement <1 x i64> %a, i32 0 + %mmx_var.i = bitcast i64 %0 to x86_mmx + tail call void @llvm.x86.mmx.movnt.dq(x86_mmx* %mmx_ptr_var.i, x86_mmx %mmx_var.i) nounwind + ret void +} + +declare i32 @llvm.x86.mmx.pmovmskb(x86_mmx) nounwind readnone + +define i32 @test24(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: pmovmskb +entry: + %0 = bitcast <1 x i64> %a to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %0 to x86_mmx + %1 = tail call i32 @llvm.x86.mmx.pmovmskb(x86_mmx %mmx_var.i) nounwind + ret i32 %1 +} + +declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*) nounwind + +define void @test23(<1 x i64> %d, <1 x i64> %n, i8* %p) nounwind optsize ssp { +; CHECK: maskmovq +entry: + %0 = bitcast <1 x i64> %n to <8 x i8> + %1 = bitcast <1 x i64> %d to <8 x i8> + %mmx_var.i = bitcast <8 x i8> %1 to x86_mmx + %mmx_var1.i = bitcast <8 x i8> %0 to x86_mmx + tail call void @llvm.x86.mmx.maskmovq(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i, i8* %p) nounwind + ret void +} + +declare x86_mmx @llvm.x86.mmx.pmulhu.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test22(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmulhuw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %mmx_var.i = bitcast <4 x i16> %1 to x86_mmx + %mmx_var1.i = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmulhu.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx, i8) nounwind readnone + +define i64 @test21(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: pshufw +entry: + %0 = bitcast <1 x i64> %a to <4 x i16> + %1 = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %1, i8 3) nounwind readnone + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.mmx.pmulu.dq(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test20(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmuludq +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %mmx_var.i = bitcast <2 x i32> %1 to x86_mmx + %mmx_var1.i = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.pmulu.dq(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind + %3 = bitcast x86_mmx %2 to i64 + ret i64 %3 +} + +declare <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx) nounwind readnone + +define <2 x double> @test19(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: cvtpi2pd +entry: + %0 = bitcast <1 x i64> %a to <2 x i32> + %1 = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx %1) nounwind readnone + ret <2 x double> %2 +} + +declare x86_mmx @llvm.x86.sse.cvttpd2pi(<2 x double>) nounwind readnone + +define i64 @test18(<2 x double> %a) nounwind readnone optsize ssp { +; CHECK: cvttpd2pi +entry: + %0 = tail call x86_mmx @llvm.x86.sse.cvttpd2pi(<2 x double> %a) nounwind readnone + %1 = bitcast x86_mmx %0 to <2 x i32> + %2 = bitcast <2 x i32> %1 to <1 x i64> + %3 = extractelement <1 x i64> %2, i32 0 + ret i64 %3 +} + +declare x86_mmx @llvm.x86.sse.cvtpd2pi(<2 x double>) nounwind readnone + +define i64 @test17(<2 x double> %a) nounwind readnone optsize ssp { +; CHECK: cvtpd2pi +entry: + %0 = tail call x86_mmx @llvm.x86.sse.cvtpd2pi(<2 x double> %a) nounwind readnone + %1 = bitcast x86_mmx %0 to <2 x i32> + %2 = bitcast <2 x i32> %1 to <1 x i64> + %3 = extractelement <1 x i64> %2, i32 0 + ret i64 %3 +} + +declare x86_mmx @llvm.x86.mmx.palignr.b(x86_mmx, x86_mmx, i8) nounwind readnone + +define i64 @test16(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: palignr +entry: + %0 = extractelement <1 x i64> %a, i32 0 + %mmx_var = bitcast i64 %0 to x86_mmx + %1 = extractelement <1 x i64> %b, i32 0 + %mmx_var1 = bitcast i64 %1 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.mmx.palignr.b(x86_mmx %mmx_var, x86_mmx %mmx_var1, i8 16) + %3 = bitcast x86_mmx %2 to i64 + ret i64 %3 +} + +declare x86_mmx @llvm.x86.ssse3.pabs.d(x86_mmx) nounwind readnone + +define i64 @test15(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: pabsd +entry: + %0 = bitcast <1 x i64> %a to <2 x i32> + %1 = bitcast <2 x i32> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.ssse3.pabs.d(x86_mmx %1) nounwind readnone + %3 = bitcast x86_mmx %2 to <2 x i32> + %4 = bitcast <2 x i32> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.ssse3.pabs.w(x86_mmx) nounwind readnone + +define i64 @test14(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: pabsw +entry: + %0 = bitcast <1 x i64> %a to <4 x i16> + %1 = bitcast <4 x i16> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.ssse3.pabs.w(x86_mmx %1) nounwind readnone + %3 = bitcast x86_mmx %2 to <4 x i16> + %4 = bitcast <4 x i16> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.ssse3.pabs.b(x86_mmx) nounwind readnone + +define i64 @test13(<1 x i64> %a) nounwind readnone optsize ssp { +; CHECK: pabsb +entry: + %0 = bitcast <1 x i64> %a to <8 x i8> + %1 = bitcast <8 x i8> %0 to x86_mmx + %2 = tail call x86_mmx @llvm.x86.ssse3.pabs.b(x86_mmx %1) nounwind readnone + %3 = bitcast x86_mmx %2 to <8 x i8> + %4 = bitcast <8 x i8> %3 to <1 x i64> + %5 = extractelement <1 x i64> %4, i32 0 + ret i64 %5 +} + +declare x86_mmx @llvm.x86.ssse3.psign.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test12(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psignd +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %2 = bitcast <2 x i32> %1 to x86_mmx + %3 = bitcast <2 x i32> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.psign.d(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <2 x i32> + %6 = bitcast <2 x i32> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.psign.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test11(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psignw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %2 = bitcast <4 x i16> %1 to x86_mmx + %3 = bitcast <4 x i16> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.psign.w(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <4 x i16> + %6 = bitcast <4 x i16> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.psign.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test10(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: psignb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %2 = bitcast <8 x i8> %1 to x86_mmx + %3 = bitcast <8 x i8> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.psign.b(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <8 x i8> + %6 = bitcast <8 x i8> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.pshuf.b(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test9(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pshufb +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %2 = bitcast <8 x i8> %1 to x86_mmx + %3 = bitcast <8 x i8> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.pshuf.b(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <8 x i8> + %6 = bitcast <8 x i8> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.pmul.hr.sw(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test8(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmulhrsw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %2 = bitcast <4 x i16> %1 to x86_mmx + %3 = bitcast <4 x i16> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.pmul.hr.sw(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <4 x i16> + %6 = bitcast <4 x i16> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.pmadd.ub.sw(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test7(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: pmaddubsw +entry: + %0 = bitcast <1 x i64> %b to <8 x i8> + %1 = bitcast <1 x i64> %a to <8 x i8> + %2 = bitcast <8 x i8> %1 to x86_mmx + %3 = bitcast <8 x i8> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.pmadd.ub.sw(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <8 x i8> + %6 = bitcast <8 x i8> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.phsub.sw(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test6(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: phsubsw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %2 = bitcast <4 x i16> %1 to x86_mmx + %3 = bitcast <4 x i16> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.phsub.sw(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <4 x i16> + %6 = bitcast <4 x i16> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.phsub.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test5(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: phsubd +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %2 = bitcast <2 x i32> %1 to x86_mmx + %3 = bitcast <2 x i32> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.phsub.d(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <2 x i32> + %6 = bitcast <2 x i32> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.phsub.w(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test4(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: phsubw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %2 = bitcast <4 x i16> %1 to x86_mmx + %3 = bitcast <4 x i16> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.phsub.w(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <4 x i16> + %6 = bitcast <4 x i16> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.phadd.sw(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test3(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: phaddsw +entry: + %0 = bitcast <1 x i64> %b to <4 x i16> + %1 = bitcast <1 x i64> %a to <4 x i16> + %2 = bitcast <4 x i16> %1 to x86_mmx + %3 = bitcast <4 x i16> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.phadd.sw(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <4 x i16> + %6 = bitcast <4 x i16> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} + +declare x86_mmx @llvm.x86.ssse3.phadd.d(x86_mmx, x86_mmx) nounwind readnone + +define i64 @test2(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp { +; CHECK: phaddd +entry: + %0 = bitcast <1 x i64> %b to <2 x i32> + %1 = bitcast <1 x i64> %a to <2 x i32> + %2 = bitcast <2 x i32> %1 to x86_mmx + %3 = bitcast <2 x i32> %0 to x86_mmx + %4 = tail call x86_mmx @llvm.x86.ssse3.phadd.d(x86_mmx %2, x86_mmx %3) nounwind readnone + %5 = bitcast x86_mmx %4 to <2 x i32> + %6 = bitcast <2 x i32> %5 to <1 x i64> + %7 = extractelement <1 x i64> %6, i32 0 + ret i64 %7 +} diff --git a/test/CodeGen/X86/mmx-insert-element.ll b/test/CodeGen/X86/mmx-insert-element.ll index a063ee1d6cf4..348dac8d4d59 100644 --- a/test/CodeGen/X86/mmx-insert-element.ll +++ b/test/CodeGen/X86/mmx-insert-element.ll @@ -1,7 +1,9 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movq -; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep movq +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pshufd +; This is not an MMX operation; promoted to XMM. -define <2 x i32> @qux(i32 %A) nounwind { +define x86_mmx @qux(i32 %A) nounwind { %tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1 ; <<2 x i32>> [#uses=1] - ret <2 x i32> %tmp3 + %tmp4 = bitcast <2 x i32> %tmp3 to x86_mmx + ret x86_mmx %tmp4 } diff --git a/test/CodeGen/X86/mmx-pinsrw.ll b/test/CodeGen/X86/mmx-pinsrw.ll index 3af09f4998d3..6062b505a569 100644 --- a/test/CodeGen/X86/mmx-pinsrw.ll +++ b/test/CodeGen/X86/mmx-pinsrw.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx | grep pinsrw | count 1 +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pinsrw | count 1 ; PR2562 external global i16 ; <i16*>:0 [#uses=1] diff --git a/test/CodeGen/X86/mmx-punpckhdq.ll b/test/CodeGen/X86/mmx-punpckhdq.ll index 0af7e017b626..689f7bf59564 100644 --- a/test/CodeGen/X86/mmx-punpckhdq.ll +++ b/test/CodeGen/X86/mmx-punpckhdq.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx | grep punpckhdq | count 1 +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=x86_64-apple-darwin10 | FileCheck %s +; There are no MMX operations in bork; promoted to XMM. define void @bork(<1 x i64>* %x) { +; CHECK: bork +; CHECK: pextrd entry: %tmp2 = load <1 x i64>* %x ; <<1 x i64>> [#uses=1] %tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32> ; <<2 x i32>> [#uses=1] @@ -11,4 +14,18 @@ entry: ret void } +; pork uses MMX. + +define void @pork(x86_mmx* %x) { +; CHECK: pork +; CHECK: punpckhdq +entry: + %tmp2 = load x86_mmx* %x ; <x86_mmx> [#uses=1] + %tmp9 = tail call x86_mmx @llvm.x86.mmx.punpckhdq (x86_mmx %tmp2, x86_mmx %tmp2) + store x86_mmx %tmp9, x86_mmx* %x + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx, x86_mmx) declare void @llvm.x86.mmx.emms() diff --git a/test/CodeGen/X86/mmx-shift.ll b/test/CodeGen/X86/mmx-shift.ll index dd0aa2ca31f4..bafc75444d91 100644 --- a/test/CodeGen/X86/mmx-shift.ll +++ b/test/CodeGen/X86/mmx-shift.ll @@ -5,28 +5,28 @@ define i64 @t1(<1 x i64> %mm1) nounwind { entry: - %tmp6 = tail call <1 x i64> @llvm.x86.mmx.pslli.q( <1 x i64> %mm1, i32 32 ) ; <<1 x i64>> [#uses=1] - %retval1112 = bitcast <1 x i64> %tmp6 to i64 ; <i64> [#uses=1] + %tmp = bitcast <1 x i64> %mm1 to x86_mmx + %tmp6 = tail call x86_mmx @llvm.x86.mmx.pslli.q( x86_mmx %tmp, i32 32 ) ; <x86_mmx> [#uses=1] + %retval1112 = bitcast x86_mmx %tmp6 to i64 ret i64 %retval1112 } -declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32) nounwind readnone +declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) nounwind readnone -define i64 @t2(<2 x i32> %mm1, <2 x i32> %mm2) nounwind { +define i64 @t2(x86_mmx %mm1, x86_mmx %mm2) nounwind { entry: - %tmp7 = tail call <2 x i32> @llvm.x86.mmx.psra.d( <2 x i32> %mm1, <2 x i32> %mm2 ) nounwind readnone ; <<2 x i32>> [#uses=1] - %retval1112 = bitcast <2 x i32> %tmp7 to i64 ; <i64> [#uses=1] + %tmp7 = tail call x86_mmx @llvm.x86.mmx.psra.d( x86_mmx %mm1, x86_mmx %mm2 ) nounwind readnone ; <x86_mmx> [#uses=1] + %retval1112 = bitcast x86_mmx %tmp7 to i64 ret i64 %retval1112 } -declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <2 x i32>) nounwind readnone +declare x86_mmx @llvm.x86.mmx.psra.d(x86_mmx, x86_mmx) nounwind readnone -define i64 @t3(<1 x i64> %mm1, i32 %bits) nounwind { +define i64 @t3(x86_mmx %mm1, i32 %bits) nounwind { entry: - %tmp6 = bitcast <1 x i64> %mm1 to <4 x i16> ; <<4 x i16>> [#uses=1] - %tmp8 = tail call <4 x i16> @llvm.x86.mmx.psrli.w( <4 x i16> %tmp6, i32 %bits ) nounwind readnone ; <<4 x i16>> [#uses=1] - %retval1314 = bitcast <4 x i16> %tmp8 to i64 ; <i64> [#uses=1] + %tmp8 = tail call x86_mmx @llvm.x86.mmx.psrli.w( x86_mmx %mm1, i32 %bits ) nounwind readnone ; <x86_mmx> [#uses=1] + %retval1314 = bitcast x86_mmx %tmp8 to i64 ret i64 %retval1314 } -declare <4 x i16> @llvm.x86.mmx.psrli.w(<4 x i16>, i32) nounwind readnone +declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32) nounwind readnone diff --git a/test/CodeGen/X86/mmx-shuffle.ll b/test/CodeGen/X86/mmx-shuffle.ll index e3125c7345b8..9f7501eb7c5d 100644 --- a/test/CodeGen/X86/mmx-shuffle.ll +++ b/test/CodeGen/X86/mmx-shuffle.ll @@ -22,8 +22,10 @@ entry: %tmp542 = bitcast <2 x i32> %tmp529 to <4 x i16> ; <<4 x i16>> [#uses=1] %tmp543 = add <4 x i16> %tmp542, < i16 0, i16 16448, i16 24672, i16 28784 > ; <<4 x i16>> [#uses=1] %tmp555 = bitcast <4 x i16> %tmp543 to <8 x i8> ; <<8 x i8>> [#uses=1] - tail call void @llvm.x86.mmx.maskmovq( <8 x i8> zeroinitializer, <8 x i8> %tmp555, i8* null ) + %tmp556 = bitcast <8 x i8> %tmp555 to x86_mmx + %tmp557 = bitcast <8 x i8> zeroinitializer to x86_mmx + tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp557, x86_mmx %tmp556, i8* null ) ret void } -declare void @llvm.x86.mmx.maskmovq(<8 x i8>, <8 x i8>, i8*) +declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*) diff --git a/test/CodeGen/X86/mmx-vzmovl-2.ll b/test/CodeGen/X86/mmx-vzmovl-2.ll index 8253c200323c..a7ce7d93920e 100644 --- a/test/CodeGen/X86/mmx-vzmovl-2.ll +++ b/test/CodeGen/X86/mmx-vzmovl-2.ll @@ -1,10 +1,10 @@ -; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep pxor -; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep punpckldq +; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep pxor +; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep punpckldq %struct.vS1024 = type { [8 x <4 x i32>] } %struct.vS512 = type { [4 x <4 x i32>] } -declare <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64>, i32) nounwind readnone +declare x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx, i32) nounwind readnone define void @t() nounwind { entry: @@ -12,14 +12,18 @@ entry: bb554: ; preds = %bb554, %entry %sum.0.reg2mem.0 = phi <1 x i64> [ %tmp562, %bb554 ], [ zeroinitializer, %entry ] ; <<1 x i64>> [#uses=1] - %0 = load <1 x i64>* null, align 8 ; <<1 x i64>> [#uses=2] - %1 = bitcast <1 x i64> %0 to <2 x i32> ; <<2 x i32>> [#uses=1] + %0 = load x86_mmx* null, align 8 ; <<1 x i64>> [#uses=2] + %1 = bitcast x86_mmx %0 to <2 x i32> ; <<2 x i32>> [#uses=1] %tmp555 = and <2 x i32> %1, < i32 -1, i32 0 > ; <<2 x i32>> [#uses=1] - %2 = bitcast <2 x i32> %tmp555 to <1 x i64> ; <<1 x i64>> [#uses=1] - %3 = call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %0, i32 32) nounwind readnone ; <<1 x i64>> [#uses=1] + %2 = bitcast <2 x i32> %tmp555 to x86_mmx ; <<1 x i64>> [#uses=1] + %3 = call x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx %0, i32 32) nounwind readnone ; <<1 x i64>> [#uses=1] store <1 x i64> %sum.0.reg2mem.0, <1 x i64>* null - %tmp558 = add <1 x i64> %sum.0.reg2mem.0, %2 ; <<1 x i64>> [#uses=1] - %4 = call <1 x i64> @llvm.x86.mmx.psrli.q(<1 x i64> %tmp558, i32 32) nounwind readnone ; <<1 x i64>> [#uses=1] - %tmp562 = add <1 x i64> %4, %3 ; <<1 x i64>> [#uses=1] + %tmp3 = bitcast x86_mmx %2 to <1 x i64> + %tmp558 = add <1 x i64> %sum.0.reg2mem.0, %tmp3 ; <<1 x i64>> [#uses=1] + %tmp5 = bitcast <1 x i64> %tmp558 to x86_mmx + %4 = call x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx %tmp5, i32 32) nounwind readnone ; <<1 x i64>> [#uses=1] + %tmp6 = bitcast x86_mmx %4 to <1 x i64> + %tmp7 = bitcast x86_mmx %3 to <1 x i64> + %tmp562 = add <1 x i64> %tmp6, %tmp7 ; <<1 x i64>> [#uses=1] br label %bb554 } diff --git a/test/CodeGen/X86/mmx-vzmovl.ll b/test/CodeGen/X86/mmx-vzmovl.ll index d21e2404882d..191e261f616f 100644 --- a/test/CodeGen/X86/mmx-vzmovl.ll +++ b/test/CodeGen/X86/mmx-vzmovl.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movd -; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movq +; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep movq | count 2 +; There are no MMX operations here; this is promoted to XMM. define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind { entry: diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll index b04048b92c13..00190e802fc9 100644 --- a/test/CodeGen/X86/movgs.ll +++ b/test/CodeGen/X86/movgs.ll @@ -1,8 +1,57 @@ -; RUN: llc < %s -march=x86 | grep gs +; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -march=x86-64 -mattr=sse41 | FileCheck %s --check-prefix=X64 -define i32 @foo() nounwind readonly { +define i32 @test1() nounwind readonly { entry: %tmp = load i32* addrspace(256)* getelementptr (i32* addrspace(256)* inttoptr (i32 72 to i32* addrspace(256)*), i32 31) ; <i32*> [#uses=1] %tmp1 = load i32* %tmp ; <i32> [#uses=1] ret i32 %tmp1 } +; X32: test1: +; X32: movl %gs:196, %eax +; X32: movl (%eax), %eax +; X32: ret + +; X64: test1: +; X64: movq %gs:320, %rax +; X64: movl (%rax), %eax +; X64: ret + +define i64 @test2(void (i8*)* addrspace(256)* %tmp8) nounwind { +entry: + %tmp9 = load void (i8*)* addrspace(256)* %tmp8, align 8 + tail call void %tmp9(i8* undef) nounwind optsize + ret i64 0 +} + +; rdar://8453210 +; X32: test2: +; X32: movl {{.*}}(%esp), %eax +; X32: calll *%gs:(%eax) + +; X64: test2: +; X64: callq *%gs:(%rdi) + + + + +define <2 x i64> @pmovsxwd_1(i64 addrspace(256)* %p) nounwind readonly { +entry: + %0 = load i64 addrspace(256)* %p + %tmp2 = insertelement <2 x i64> zeroinitializer, i64 %0, i32 0 + %1 = bitcast <2 x i64> %tmp2 to <8 x i16> + %2 = tail call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %1) nounwind readnone + %3 = bitcast <4 x i32> %2 to <2 x i64> + ret <2 x i64> %3 + +; X32: pmovsxwd_1: +; X32: movl 4(%esp), %eax +; X32: pmovsxwd %gs:(%eax), %xmm0 +; X32: ret + +; X64: pmovsxwd_1: +; X64: pmovsxwd %gs:(%rdi), %xmm0 +; X64: ret +} + +declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnone diff --git a/test/CodeGen/X86/mult-alt-generic-i686.ll b/test/CodeGen/X86/mult-alt-generic-i686.ll new file mode 100644 index 000000000000..7c3499f178a6 --- /dev/null +++ b/test/CodeGen/X86/mult-alt-generic-i686.ll @@ -0,0 +1,321 @@ +; RUN: llc < %s -march=x86 +; ModuleID = 'mult-alt-generic.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i686" + +@mout0 = common global i32 0, align 4 +@min1 = common global i32 0, align 4 +@marray = common global [2 x i32] zeroinitializer, align 4 + +define void @single_m() nounwind { +entry: + call void asm "foo $1,$0", "=*m,*m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32* @min1) nounwind + ret void +} + +define void @single_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @single_V() nounwind { +entry: + ret void +} + +define void @single_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,<r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r<,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,>r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r>,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,i,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,n,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,E,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,F,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @single_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,imr,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,imr,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,imr,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @single_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 + %4 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+001) nounwind + store i32 %4, i32* %out0, align 4 + %5 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+000) nounwind + store i32 %5, i32* %out0, align 4 + ret void +} + +define void @single_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,im,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_m() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*m|r,m|r,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @multi_V() nounwind { +entry: + ret void +} + +define void @multi_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|<r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r<,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|>r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r>,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|m,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|i,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|n,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|E,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|F,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @multi_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|imr,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|imr,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|imr,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @multi_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 + %4 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+001) nounwind + store i32 %4, i32* %out0, align 4 + %5 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+000) nounwind + store i32 %5, i32* %out0, align 4 + ret void +} + +define void @multi_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|im,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} diff --git a/test/CodeGen/X86/mult-alt-generic-x86_64.ll b/test/CodeGen/X86/mult-alt-generic-x86_64.ll new file mode 100644 index 000000000000..f35bb5e34079 --- /dev/null +++ b/test/CodeGen/X86/mult-alt-generic-x86_64.ll @@ -0,0 +1,321 @@ +; RUN: llc < %s -march=x86-64 +; ModuleID = 'mult-alt-generic.c' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64" + +@mout0 = common global i32 0, align 4 +@min1 = common global i32 0, align 4 +@marray = common global [2 x i32] zeroinitializer, align 4 + +define void @single_m() nounwind { +entry: + call void asm "foo $1,$0", "=*m,*m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32* @min1) nounwind + ret void +} + +define void @single_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @single_V() nounwind { +entry: + ret void +} + +define void @single_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,<r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r<,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,>r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,r>,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @single_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,i,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,n,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @single_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,E,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r,F,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @single_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @single_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,imr,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,imr,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,imr,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @single_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 + %4 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+001) nounwind + store i32 %4, i32* %out0, align 4 + %5 = call i32 asm "foo $1,$0", "=r,X,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+000) nounwind + store i32 %5, i32* %out0, align 4 + ret void +} + +define void @single_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r,im,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_m() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*m|r,m|r,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_o() nounwind { +entry: + %out0 = alloca i32, align 4 + %index = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %index, align 4 + ret void +} + +define void @multi_V() nounwind { +entry: + ret void +} + +define void @multi_lt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|<r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r<,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_gt() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|>r,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* %in1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|r>,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + ret void +} + +define void @multi_r() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|m,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_i() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|i,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_n() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|n,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} + +define void @multi_E() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|E,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+001) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_F() nounwind { +entry: + %out0 = alloca double, align 8 + store double 0.000000e+000, double* %out0, align 8 +; No lowering support. +; %0 = call double asm "foo $1,$0", "=r|r,r|F,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+000) nounwind +; store double %0, double* %out0, align 8 + ret void +} + +define void @multi_s() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + ret void +} + +define void @multi_g() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|imr,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|imr,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|imr,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + ret void +} + +define void @multi_X() nounwind { +entry: + %out0 = alloca i32, align 4 + %in1 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + store i32 1, i32* %in1, align 4 + %tmp = load i32* %in1, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* %out0, align 4 + %tmp1 = load i32* @min1, align 4 + %1 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(i32 %tmp1) nounwind + store i32 %1, i32* %out0, align 4 + %2 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind + store i32 %2, i32* %out0, align 4 + %3 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %3, i32* %out0, align 4 + %4 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+001) nounwind + store i32 %4, i32* %out0, align 4 + %5 = call i32 asm "foo $1,$0", "=r|r,r|X,~{dirflag},~{fpsr},~{flags}"(double 1.000000e+000) nounwind + store i32 %5, i32* %out0, align 4 + ret void +} + +define void @multi_p() nounwind { +entry: + %out0 = alloca i32, align 4 + store i32 0, i32* %out0, align 4 + %0 = call i32 asm "foo $1,$0", "=r|r,r|im,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind + store i32 %0, i32* %out0, align 4 + ret void +} diff --git a/test/CodeGen/X86/mult-alt-x86.ll b/test/CodeGen/X86/mult-alt-x86.ll new file mode 100644 index 000000000000..06175da46454 --- /dev/null +++ b/test/CodeGen/X86/mult-alt-x86.ll @@ -0,0 +1,358 @@ +; RUN: llc < %s -march=x86 -mattr=+sse2 +; ModuleID = 'mult-alt-x86.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i686-pc-win32" + +@mout0 = common global i32 0, align 4 +@min1 = common global i32 0, align 4 +@dout0 = common global double 0.000000e+000, align 8 +@din1 = common global double 0.000000e+000, align 8 +@marray = common global [2 x i32] zeroinitializer, align 4 + +define void @single_R() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "=R,R,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_q() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "=q,q,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_Q() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "=Q,Q,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_a() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "={ax},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_b() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "={bx},{bx},~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_c() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "={cx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_d() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "={dx},{dx},~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_S() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "={si},{si},~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_D() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "={di},{di},~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_A() nounwind { +entry: + %tmp = load i32* @min1, align 4 + %0 = call i32 asm "foo $1,$0", "=A,A,~{dirflag},~{fpsr},~{flags}"(i32 %tmp) nounwind + store i32 %0, i32* @mout0, align 4 + ret void +} + +define void @single_f() nounwind { +entry: + ret void +} + +define void @single_t() nounwind { +entry: + ret void +} + +define void @single_u() nounwind { +entry: + ret void +} + +define void @single_y() nounwind { +entry: + %tmp = load double* @din1, align 8 + %0 = call double asm "foo $1,$0", "=y,y,~{dirflag},~{fpsr},~{flags}"(double %tmp) nounwind + store double %0, double* @dout0, align 8 + ret void +} + +define void @single_x() nounwind { +entry: + %tmp = load double* @din1, align 8 + %0 = call double asm "foo $1,$0", "=x,x,~{dirflag},~{fpsr},~{flags}"(double %tmp) nounwind + store double %0, double* @dout0, align 8 + ret void +} + +define void @single_Y0() nounwind { +entry: + ret void +} + +define void @single_I() nounwind { +entry: + call void asm "foo $1,$0", "=*m,I,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @single_J() nounwind { +entry: + call void asm "foo $1,$0", "=*m,J,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @single_K() nounwind { +entry: + call void asm "foo $1,$0", "=*m,K,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @single_L() nounwind { +entry: +; Missing lowering support for 'L'. +; call void asm "foo $1,$0", "=*m,L,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @single_M() nounwind { +entry: +; Missing lowering support for 'M'. +; call void asm "foo $1,$0", "=*m,M,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @single_N() nounwind { +entry: + call void asm "foo $1,$0", "=*m,N,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @single_G() nounwind { +entry: +; Missing lowering support for 'G'. +; call void asm "foo $1,$0", "=*m,G,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, double 1.000000e+000) nounwind + ret void +} + +define void @single_C() nounwind { +entry: +; Missing lowering support for 'C'. +; call void asm "foo $1,$0", "=*m,C,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, double 1.000000e+000) nounwind + ret void +} + +define void @single_e() nounwind { +entry: + call void asm "foo $1,$0", "=*m,e,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @single_Z() nounwind { +entry: + call void asm "foo $1,$0", "=*m,Z,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @multi_R() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|R|m,r|R|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_q() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|q|m,r|q|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_Q() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|Q|m,r|Q|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_a() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|{ax}|m,r|{ax}|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_b() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|{bx}|m,r|{bx}|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_c() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|{cx}|m,r|{cx}|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_d() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|{dx}|m,r|{dx},~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_S() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|{si}|m,r|{si}|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_D() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|{di}|m,r|{di}|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_A() nounwind { +entry: + %tmp = load i32* @min1, align 4 + call void asm "foo $1,$0", "=*r|A|m,r|A|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 %tmp) nounwind + ret void +} + +define void @multi_f() nounwind { +entry: + ret void +} + +define void @multi_t() nounwind { +entry: + ret void +} + +define void @multi_u() nounwind { +entry: + ret void +} + +define void @multi_y() nounwind { +entry: + %tmp = load double* @din1, align 8 + call void asm "foo $1,$0", "=*r|y|m,r|y|m,~{dirflag},~{fpsr},~{flags}"(double* @dout0, double %tmp) nounwind + ret void +} + +define void @multi_x() nounwind { +entry: + %tmp = load double* @din1, align 8 + call void asm "foo $1,$0", "=*r|x|m,r|x|m,~{dirflag},~{fpsr},~{flags}"(double* @dout0, double %tmp) nounwind + ret void +} + +define void @multi_Y0() nounwind { +entry: + ret void +} + +define void @multi_I() nounwind { +entry: + call void asm "foo $1,$0", "=*r|m|m,r|I|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @multi_J() nounwind { +entry: + call void asm "foo $1,$0", "=*r|m|m,r|J|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @multi_K() nounwind { +entry: + call void asm "foo $1,$0", "=*r|m|m,r|K|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @multi_L() nounwind { +entry: +; Missing lowering support for 'L'. +; call void asm "foo $1,$0", "=*r|m|m,r|L|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @multi_M() nounwind { +entry: +; Missing lowering support for 'M'. +; call void asm "foo $1,$0", "=*r|m|m,r|M|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @multi_N() nounwind { +entry: + call void asm "foo $1,$0", "=*r|m|m,r|N|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @multi_G() nounwind { +entry: +; Missing lowering support for 'G'. +; call void asm "foo $1,$0", "=*r|m|m,r|G|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, double 1.000000e+000) nounwind + ret void +} + +define void @multi_C() nounwind { +entry: +; Missing lowering support for 'C'. +; call void asm "foo $1,$0", "=*r|m|m,r|C|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, double 1.000000e+000) nounwind + ret void +} + +define void @multi_e() nounwind { +entry: + call void asm "foo $1,$0", "=*r|m|m,r|e|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} + +define void @multi_Z() nounwind { +entry: + call void asm "foo $1,$0", "=*r|m|m,r|Z|m,~{dirflag},~{fpsr},~{flags}"(i32* @mout0, i32 1) nounwind + ret void +} diff --git a/test/CodeGen/X86/narrow-shl-load.ll b/test/CodeGen/X86/narrow-shl-load.ll new file mode 100644 index 000000000000..ef27cbc3418c --- /dev/null +++ b/test/CodeGen/X86/narrow-shl-load.ll @@ -0,0 +1,83 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-pc-linux-gnu" + +; DAGCombiner should fold this code in finite time. +; rdar://8606584 + +define void @test1() nounwind readnone { +bb.nph: + br label %while.cond + +while.cond: ; preds = %while.cond, %bb.nph + %tmp6 = load i32* undef, align 4 + %and = or i64 undef, undef + %conv11 = zext i32 undef to i64 + %conv14 = zext i32 %tmp6 to i64 + %shl15 = shl i64 %conv14, 1 + %shl15.masked = and i64 %shl15, 4294967294 + %and17 = or i64 %shl15.masked, %conv11 + %add = add i64 %and17, 1 + %xor = xor i64 %add, %and + %tmp20 = load i64* undef, align 8 + %add21 = add i64 %xor, %tmp20 + %conv22 = trunc i64 %add21 to i32 + store i32 %conv22, i32* undef, align 4 + br i1 false, label %while.end, label %while.cond + +while.end: ; preds = %while.cond + ret void +} + + +; DAGCombiner shouldn't fold the sdiv (ashr) away. +; rdar://8636812 +; CHECK: test2: +; CHECK: sarl + +define i32 @test2() nounwind { +entry: + %i = alloca i32, align 4 + %j = alloca i8, align 1 + store i32 127, i32* %i, align 4 + store i8 0, i8* %j, align 1 + %tmp3 = load i32* %i, align 4 + %mul = mul nsw i32 %tmp3, 2 + %conv4 = trunc i32 %mul to i8 + %conv5 = sext i8 %conv4 to i32 + %div6 = sdiv i32 %conv5, 2 + %conv7 = trunc i32 %div6 to i8 + %conv9 = sext i8 %conv7 to i32 + %cmp = icmp eq i32 %conv9, -1 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + ret i32 0 + +if.end: ; preds = %entry + call void @abort() noreturn + unreachable +} + +declare void @abort() noreturn + +declare void @exit(i32) noreturn + +; DAG Combiner can't fold this into a load of the 1'th byte. +; PR8757 +define i32 @test3(i32 *%P) nounwind ssp { + volatile store i32 128, i32* %P + %tmp4.pre = load i32* %P + %phitmp = trunc i32 %tmp4.pre to i16 + %phitmp13 = shl i16 %phitmp, 8 + %phitmp14 = ashr i16 %phitmp13, 8 + %phitmp15 = lshr i16 %phitmp14, 8 + %phitmp16 = zext i16 %phitmp15 to i32 + ret i32 %phitmp16 + +; CHECK: movl $128, (%rdi) +; CHECK-NEXT: movsbl (%rdi), %eax +; CHECK-NEXT: movzbl %ah, %eax +; CHECK-NEXT: ret +} diff --git a/test/CodeGen/X86/negative-sin.ll b/test/CodeGen/X86/negative-sin.ll index 7842eb8456eb..76e557b84225 100644 --- a/test/CodeGen/X86/negative-sin.ll +++ b/test/CodeGen/X86/negative-sin.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -enable-unsafe-fp-math -march=x86-64 | \ -; RUN: not egrep {addsd|subsd|xor} +; RUN: llc < %s -enable-unsafe-fp-math -march=x86-64 | FileCheck %s +; CHECK-NOT: {{addsd|subsd|xor}} declare double @sin(double %f) diff --git a/test/CodeGen/X86/non-globl-eh-frame.ll b/test/CodeGen/X86/non-globl-eh-frame.ll new file mode 100644 index 000000000000..71349ecafeb6 --- /dev/null +++ b/test/CodeGen/X86/non-globl-eh-frame.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -mtriple x86_64-apple-darwin10 -march x86 | not grep {{.globl\[\[:space:\]\]*__Z4funcv.eh}} +; RUN: llc < %s -mtriple x86_64-apple-darwin9 -march x86 | FileCheck %s -check-prefix=DARWIN9 + +%struct.__pointer_type_info_pseudo = type { %struct.__type_info_pseudo, i32, %"struct.std::type_info"* } +%struct.__type_info_pseudo = type { i8*, i8* } +%"struct.std::type_info" = type opaque + +@.str = private constant [12 x i8] c"hello world\00", align 1 +@_ZTIPc = external constant %struct.__pointer_type_info_pseudo + +define void @_Z4funcv() noreturn optsize ssp { +entry: + %0 = tail call i8* @__cxa_allocate_exception(i64 8) nounwind + %1 = bitcast i8* %0 to i8** + store i8* getelementptr inbounds ([12 x i8]* @.str, i64 0, i64 0), i8** %1, align 8 + tail call void @__cxa_throw(i8* %0, i8* bitcast (%struct.__pointer_type_info_pseudo* @_ZTIPc to i8*), void (i8*)* null) noreturn + unreachable +} + +; DARWIN9: .globl __Z4funcv.eh + +declare i8* @__cxa_allocate_exception(i64) nounwind + +declare void @__cxa_throw(i8*, i8*, void (i8*)*) noreturn diff --git a/test/CodeGen/X86/phi-immediate-factoring.ll b/test/CodeGen/X86/phi-immediate-factoring.ll index 8bed62488070..ef02af2d7851 100644 --- a/test/CodeGen/X86/phi-immediate-factoring.ll +++ b/test/CodeGen/X86/phi-immediate-factoring.ll @@ -1,5 +1,5 @@ +; RUN: llc < %s -march=x86 -stats |& grep {Number of blocks eliminated} | grep 6 ; PR1296 -; RUN: llc < %s -march=x86 | grep {movl \$1} | count 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/phys_subreg_coalesce-2.ll b/test/CodeGen/X86/phys_subreg_coalesce-2.ll index 23c509c9936b..13e804d94a57 100644 --- a/test/CodeGen/X86/phys_subreg_coalesce-2.ll +++ b/test/CodeGen/X86/phys_subreg_coalesce-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep mov | count 5 +; RUN: llc < %s -march=x86 | grep mov | count 4 ; PR2659 define i32 @binomial(i32 %n, i32 %k) nounwind { diff --git a/test/CodeGen/X86/pic.ll b/test/CodeGen/X86/pic.ll index a1a9759dd36c..dc5fcd78dc84 100644 --- a/test/CodeGen/X86/pic.ll +++ b/test/CodeGen/X86/pic.ll @@ -12,7 +12,7 @@ entry: ret void ; LINUX: test0: -; LINUX: call .L0$pb +; LINUX: calll .L0$pb ; LINUX-NEXT: .L0$pb: ; LINUX-NEXT: popl ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L0$pb), @@ -34,7 +34,7 @@ entry: ret void ; LINUX: test1: -; LINUX: call .L1$pb +; LINUX: calll .L1$pb ; LINUX-NEXT: .L1$pb: ; LINUX-NEXT: popl ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L1$pb), %eax @@ -54,12 +54,12 @@ entry: ; LINUX: test2: ; LINUX: pushl %ebx ; LINUX-NEXT: subl $8, %esp -; LINUX-NEXT: call .L2$pb +; LINUX-NEXT: calll .L2$pb ; LINUX-NEXT: .L2$pb: ; LINUX-NEXT: popl %ebx ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L2$pb), %ebx ; LINUX: movl $40, (%esp) -; LINUX: call malloc@PLT +; LINUX: calll malloc@PLT ; LINUX: addl $8, %esp ; LINUX: popl %ebx ; LINUX: ret @@ -75,13 +75,13 @@ entry: call void(...)* %tmp1() ret void ; LINUX: test3: -; LINUX: call .L3$pb +; LINUX: calll .L3$pb ; LINUX-NEXT: .L3$pb: ; LINUX: popl ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L3$pb), %[[REG3:e..]] ; LINUX: movl pfoo@GOT(%[[REG3]]), -; LINUX: call afoo@PLT -; LINUX: call * +; LINUX: calll afoo@PLT +; LINUX: calll * } declare void(...)* @afoo(...) @@ -91,10 +91,10 @@ entry: call void(...)* @foo() ret void ; LINUX: test4: -; LINUX: call .L4$pb +; LINUX: calll .L4$pb ; LINUX: popl %ebx ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L4$pb), %ebx -; LINUX: call foo@PLT +; LINUX: calll foo@PLT } declare void @foo(...) @@ -112,7 +112,7 @@ entry: ret void ; LINUX: test5: -; LINUX: call .L5$pb +; LINUX: calll .L5$pb ; LINUX-NEXT: .L5$pb: ; LINUX-NEXT: popl %eax ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L5$pb), %eax @@ -134,7 +134,7 @@ entry: ; LINUX: .LCPI6_0: ; LINUX: test6: -; LINUX: call .L6$pb +; LINUX: calll .L6$pb ; LINUX: .L6$pb: ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L6$pb), ; LINUX: fldl .LCPI6_0@GOTOFF( @@ -186,7 +186,7 @@ bb12: ret void ; LINUX: test7: -; LINUX: call .L7$pb +; LINUX: calll .L7$pb ; LINUX: .L7$pb: ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L7$pb), ; LINUX: .LJTI7_0@GOTOFF( diff --git a/test/CodeGen/X86/pic_jumptable.ll b/test/CodeGen/X86/pic_jumptable.ll index 31071bc74a78..b6761e338aa9 100644 --- a/test/CodeGen/X86/pic_jumptable.ll +++ b/test/CodeGen/X86/pic_jumptable.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text +; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | grep -F .text._Z3fooILi1EEvi,"axG",@progbits,_Z3fooILi1EEvi,comdat ; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI' ; rdar://6971437 diff --git a/test/CodeGen/X86/popcnt.ll b/test/CodeGen/X86/popcnt.ll new file mode 100644 index 000000000000..430214c73b13 --- /dev/null +++ b/test/CodeGen/X86/popcnt.ll @@ -0,0 +1,38 @@ +; RUN: llc -march=x86-64 -mattr=+popcnt < %s | FileCheck %s + +define i8 @cnt8(i8 %x) nounwind readnone { + %cnt = tail call i8 @llvm.ctpop.i8(i8 %x) + ret i8 %cnt +; CHECK: cnt8: +; CHECK: popcntw +; CHECK: ret +} + +define i16 @cnt16(i16 %x) nounwind readnone { + %cnt = tail call i16 @llvm.ctpop.i16(i16 %x) + ret i16 %cnt +; CHECK: cnt16: +; CHECK: popcntw +; CHECK: ret +} + +define i32 @cnt32(i32 %x) nounwind readnone { + %cnt = tail call i32 @llvm.ctpop.i32(i32 %x) + ret i32 %cnt +; CHECK: cnt32: +; CHECK: popcntl +; CHECK: ret +} + +define i64 @cnt64(i64 %x) nounwind readnone { + %cnt = tail call i64 @llvm.ctpop.i64(i64 %x) + ret i64 %cnt +; CHECK: cnt64: +; CHECK: popcntq +; CHECK: ret +} + +declare i8 @llvm.ctpop.i8(i8) nounwind readnone +declare i16 @llvm.ctpop.i16(i16) nounwind readnone +declare i32 @llvm.ctpop.i32(i32) nounwind readnone +declare i64 @llvm.ctpop.i64(i64) nounwind readnone diff --git a/test/CodeGen/X86/postra-licm.ll b/test/CodeGen/X86/postra-licm.ll index 97cc7b4977cf..902c69b471db 100644 --- a/test/CodeGen/X86/postra-licm.ll +++ b/test/CodeGen/X86/postra-licm.ll @@ -68,7 +68,7 @@ bb26.preheader: ; preds = %imix_test.exit bb23: ; preds = %imix_test.exit unreachable -; X86-32: %bb26.preheader.bb28_crit_edge +; X86-32: %bb26.preheader ; X86-32: movl -16(%ebp), ; X86-32-NEXT: .align 4 ; X86-32-NEXT: %bb28 diff --git a/test/CodeGen/X86/pr2659.ll b/test/CodeGen/X86/pr2659.ll index e5daf5da9f3e..54d043d54f83 100644 --- a/test/CodeGen/X86/pr2659.ll +++ b/test/CodeGen/X86/pr2659.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 5 +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 4 ; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | FileCheck %s ; PR2659 @@ -14,10 +14,11 @@ forcond.preheader: ; preds = %entry %cmp44 = icmp eq i32 %k, 0 ; <i1> [#uses=1] br i1 %cmp44, label %afterfor, label %forbody -; CHECK: %forcond.preheader.forbody_crit_edge +; CHECK: %forcond.preheader ; CHECK: movl $1 ; CHECK-NOT: xorl -; CHECK-NEXT: movl +; CHECK-NOT: movl +; CHECK-NEXT: je ifthen: ; preds = %entry ret i32 0 diff --git a/test/CodeGen/X86/pr3522.ll b/test/CodeGen/X86/pr3522.ll index 7cdeaa099271..da1623721d1c 100644 --- a/test/CodeGen/X86/pr3522.ll +++ b/test/CodeGen/X86/pr3522.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -stats |& not grep machine-sink +; RUN: llc < %s -march=x86 -stats |& not grep {instructions sunk} ; PR3522 target triple = "i386-pc-linux-gnu" diff --git a/test/CodeGen/X86/pr9127.ll b/test/CodeGen/X86/pr9127.ll new file mode 100644 index 000000000000..45b0c6c78706 --- /dev/null +++ b/test/CodeGen/X86/pr9127.ll @@ -0,0 +1,12 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s + +define i8 @foobar(double %d, double* %x) { +entry: + %tmp2 = load double* %x, align 8 + %cmp = fcmp oeq double %tmp2, %d + %conv3 = zext i1 %cmp to i8 + ret i8 %conv3 +} + +; test that the load is folded. +; CHECK: ucomisd (%rdi), %xmm0 diff --git a/test/CodeGen/X86/prefetch.ll b/test/CodeGen/X86/prefetch.ll index fac5915aae88..48d2673e4884 100644 --- a/test/CodeGen/X86/prefetch.ll +++ b/test/CodeGen/X86/prefetch.ll @@ -1,11 +1,11 @@ -; RUN: llc < %s -march=x86 -mattr=+sse > %t -; RUN: grep prefetchnta %t -; RUN: grep prefetcht0 %t -; RUN: grep prefetcht1 %t -; RUN: grep prefetcht2 %t +; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s define void @t(i8* %ptr) nounwind { entry: +; CHECK: prefetcht2 +; CHECK: prefetcht1 +; CHECK: prefetcht0 +; CHECK: prefetchnta tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1 ) tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2 ) tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) diff --git a/test/CodeGen/X86/rodata-relocs.ll b/test/CodeGen/X86/rodata-relocs.ll index 276f8bb48d06..9291200f0110 100644 --- a/test/CodeGen/X86/rodata-relocs.ll +++ b/test/CodeGen/X86/rodata-relocs.ll @@ -8,14 +8,14 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" -@a = internal constant [2 x i32] [i32 1, i32 2] -@a1 = constant [2 x i32] [i32 1, i32 2] -@e = internal constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 -@e1 = constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 -@p = constant i8* bitcast ([2 x i32]* @a to i8*) -@t = constant i8* bitcast ([2 x [2 x i32]]* @e to i8*) -@p1 = constant i8* bitcast ([2 x i32]* @a1 to i8*) -@t1 = constant i8* bitcast ([2 x [2 x i32]]* @e1 to i8*) +@a = internal unnamed_addr constant [2 x i32] [i32 1, i32 2] +@a1 = unnamed_addr constant [2 x i32] [i32 1, i32 2] +@e = internal unnamed_addr constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 +@e1 = unnamed_addr constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 +@p = unnamed_addr constant i8* bitcast ([2 x i32]* @a to i8*) +@t = unnamed_addr constant i8* bitcast ([2 x [2 x i32]]* @e to i8*) +@p1 = unnamed_addr constant i8* bitcast ([2 x i32]* @a1 to i8*) +@t1 = unnamed_addr constant i8* bitcast ([2 x [2 x i32]]* @e1 to i8*) @p2 = internal global i8* bitcast([2 x i32]* @a1 to i8*) @t2 = internal global i8* bitcast([2 x [2 x i32]]* @e1 to i8*) @p3 = internal global i8* bitcast([2 x i32]* @a to i8*) diff --git a/test/CodeGen/X86/scalar_widen_div.ll b/test/CodeGen/X86/scalar_widen_div.ll index 77f320f1056e..adc58ac34b9e 100644 --- a/test/CodeGen/X86/scalar_widen_div.ll +++ b/test/CodeGen/X86/scalar_widen_div.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -disable-mmx -march=x86-64 -mattr=+sse42 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s ; Verify when widening a divide/remainder operation, we only generate a ; divide/rem per element since divide/remainder can trap. diff --git a/test/CodeGen/X86/select-aggregate.ll b/test/CodeGen/X86/select-aggregate.ll deleted file mode 100644 index 44cafe22af14..000000000000 --- a/test/CodeGen/X86/select-aggregate.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s -; PR5757 - -; CHECK: cmovneq %rdi, %rsi -; CHECK: movl (%rsi), %eax - -%0 = type { i64, i32 } - -define i32 @foo(%0* %p, %0* %q, i1 %r) nounwind { - %t0 = load %0* %p - %t1 = load %0* %q - %t4 = select i1 %r, %0 %t0, %0 %t1 - %t5 = extractvalue %0 %t4, 1 - ret i32 %t5 -} diff --git a/test/CodeGen/X86/select-zero-one.ll b/test/CodeGen/X86/select-zero-one.ll deleted file mode 100644 index c38a02080523..000000000000 --- a/test/CodeGen/X86/select-zero-one.ll +++ /dev/null @@ -1,25 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep cmov -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movzbl | count 1 - -@r1 = weak global i32 0 - -define void @t1(i32 %a, double %b) { - %tmp114 = fcmp ugt double %b, 1.000000e-09 - %tmp120 = icmp eq i32 %a, 0 ; <i1> [#uses=1] - %bothcond = or i1 %tmp114, %tmp120 ; <i1> [#uses=1] - %storemerge = select i1 %bothcond, i32 0, i32 1 ; <i32> [#uses=2] - store i32 %storemerge, i32* @r1, align 4 - ret void -} - -@r2 = weak global i8 0 - -define void @t2(i32 %a, double %b) { - %tmp114 = fcmp ugt double %b, 1.000000e-09 - %tmp120 = icmp eq i32 %a, 0 ; <i1> [#uses=1] - %bothcond = or i1 %tmp114, %tmp120 ; <i1> [#uses=1] - %storemerge = select i1 %bothcond, i8 0, i8 1 ; <i32> [#uses=2] - store i8 %storemerge, i8* @r2, align 4 - ret void -} diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll index 95ed9e97cdfd..ce04e07854a4 100644 --- a/test/CodeGen/X86/select.ll +++ b/test/CodeGen/X86/select.ll @@ -1,63 +1,220 @@ -; RUN: llc < %s -march=x86 -mcpu=pentium -; RUN: llc < %s -march=x86 -mcpu=yonah -; RUN: llc < %s -march=x86 -mcpu=yonah | not grep set +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s +; PR5757 -define i1 @boolSel(i1 %A, i1 %B, i1 %C) nounwind { - %X = select i1 %A, i1 %B, i1 %C ; <i1> [#uses=1] - ret i1 %X +%0 = type { i64, i32 } + +define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind { + %t0 = load %0* %p + %t1 = load %0* %q + %t4 = select i1 %r, %0 %t0, %0 %t1 + %t5 = extractvalue %0 %t4, 1 + ret i32 %t5 +; CHECK: test1: +; CHECK: cmovneq %rdi, %rsi +; CHECK: movl (%rsi), %eax +} + + +; PR2139 +define i32 @test2() nounwind { +entry: + %tmp73 = tail call i1 @return_false() ; <i8> [#uses=1] + %g.0 = select i1 %tmp73, i16 0, i16 -480 ; <i16> [#uses=2] + %tmp7778 = sext i16 %g.0 to i32 ; <i32> [#uses=1] + %tmp80 = shl i32 %tmp7778, 3 ; <i32> [#uses=2] + %tmp87 = icmp sgt i32 %tmp80, 32767 ; <i1> [#uses=1] + br i1 %tmp87, label %bb90, label %bb91 +bb90: ; preds = %bb84, %bb72 + unreachable +bb91: ; preds = %bb84 + ret i32 0 +; CHECK: test2: +; CHECK: movnew +; CHECK: movswl +} + +declare i1 @return_false() + + +;; Select between two floating point constants. +define float @test3(i32 %x) nounwind readnone { +entry: + %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] + %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1] + ret float %iftmp.0.0 +; CHECK: test3: +; CHECK: movss {{.*}},4), %xmm0 +} + +define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly { +entry: + %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1] + %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1] + %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1] + %2 = load i8* %1, align 1 ; <i8> [#uses=1] + ret i8 %2 +; CHECK: test4: +; CHECK: movsbl ({{.*}},4), %eax +} + +define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind { + %x = select i1 %c, <2 x i16> %a, <2 x i16> %b + store <2 x i16> %x, <2 x i16>* %p + ret void +; CHECK: test5: } -define i8 @byteSel(i1 %A, i8 %B, i8 %C) nounwind { - %X = select i1 %A, i8 %B, i8 %C ; <i8> [#uses=1] - ret i8 %X +define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { + %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1] + %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=2] + %tmp9 = fmul <4 x float> %tmp3, %tmp3 ; <<4 x float>> [#uses=1] + %tmp.upgrd.1 = icmp eq i32 %C, 0 ; <i1> [#uses=1] + %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp ; <<4 x float>> [#uses=1] + store <4 x float> %iftmp.38.0, <4 x float>* %A + ret void +; Verify that the fmul gets sunk into the one part of the diamond where it is +; needed. +; CHECK: test6: +; CHECK: jne +; CHECK: mulps +; CHECK: ret +; CHECK: ret } -define i16 @shortSel(i1 %A, i16 %B, i16 %C) nounwind { - %X = select i1 %A, i16 %B, i16 %C ; <i16> [#uses=1] - ret i16 %X +; Select with fp80's +define x86_fp80 @test7(i32 %tmp8) nounwind { + %tmp9 = icmp sgt i32 %tmp8, -1 ; <i1> [#uses=1] + %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 + ret x86_fp80 %retval +; CHECK: test7: +; CHECK: leaq +; CHECK: fldt (%r{{.}}x,%r{{.}}x) } -define i32 @intSel(i1 %A, i32 %B, i32 %C) nounwind { - %X = select i1 %A, i32 %B, i32 %C ; <i32> [#uses=1] - ret i32 %X +; widening select v6i32 and then a sub +define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { + %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 + %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > + store <6 x i32> %val, <6 x i32>* %dst.addr + ret void + +; CHECK: test8: } -define i64 @longSel(i1 %A, i64 %B, i64 %C) nounwind { - %X = select i1 %A, i64 %B, i64 %C ; <i64> [#uses=1] - ret i64 %X + +;; Test integer select between values and constants. + +define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp ne i64 %x, 0 + %cond = select i1 %cmp, i64 %y, i64 -1 + ret i64 %cond +; CHECK: test9: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: orq %rsi, %rax +; CHECK: ret +} + +;; Same as test9 +define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp eq i64 %x, 0 + %cond = select i1 %cmp, i64 -1, i64 %y + ret i64 %cond +; CHECK: test9a: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: orq %rsi, %rax +; CHECK: ret +} + +define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp eq i64 %x, 0 + %A = sext i1 %cmp to i64 + %cond = or i64 %y, %A + ret i64 %cond +; CHECK: test9b: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: orq %rsi, %rax +; CHECK: ret } -define double @doubleSel(i1 %A, double %B, double %C) nounwind { - %X = select i1 %A, double %B, double %C ; <double> [#uses=1] - ret double %X +;; Select between -1 and 1. +define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp eq i64 %x, 0 + %cond = select i1 %cmp, i64 -1, i64 1 + ret i64 %cond +; CHECK: test10: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: orq $1, %rax +; CHECK: ret } -define i8 @foldSel(i1 %A, i8 %B, i8 %C) nounwind { - %Cond = icmp slt i8 %B, %C ; <i1> [#uses=1] - %X = select i1 %Cond, i8 %B, i8 %C ; <i8> [#uses=1] - ret i8 %X + + +define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp eq i64 %x, 0 + %cond = select i1 %cmp, i64 %y, i64 -1 + ret i64 %cond +; CHECK: test11: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: notq %rax +; CHECK: orq %rsi, %rax +; CHECK: ret } -define i32 @foldSel2(i1 %A, i32 %B, i32 %C) nounwind { - %Cond = icmp eq i32 %B, %C ; <i1> [#uses=1] - %X = select i1 %Cond, i32 %B, i32 %C ; <i32> [#uses=1] - ret i32 %X +define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { + %cmp = icmp ne i64 %x, 0 + %cond = select i1 %cmp, i64 -1, i64 %y + ret i64 %cond +; CHECK: test11a: +; CHECK: cmpq $1, %rdi +; CHECK: sbbq %rax, %rax +; CHECK: notq %rax +; CHECK: orq %rsi, %rax +; CHECK: ret } -define i32 @foldSel2a(i1 %A, i32 %B, i32 %C, double %X, double %Y) nounwind { - %Cond = fcmp olt double %X, %Y ; <i1> [#uses=1] - %X.upgrd.1 = select i1 %Cond, i32 %B, i32 %C ; <i32> [#uses=1] - ret i32 %X.upgrd.1 + +declare noalias i8* @_Znam(i64) noredzone + +define noalias i8* @test12(i64 %count) nounwind ssp noredzone { +entry: + %A = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %count, i64 4) + %B = extractvalue { i64, i1 } %A, 1 + %C = extractvalue { i64, i1 } %A, 0 + %D = select i1 %B, i64 -1, i64 %C + %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone + ret i8* %call +; CHECK: test12: +; CHECK: mulq +; CHECK: movq $-1, %rdi +; CHECK: cmovnoq %rax, %rdi +; CHECK: jmp __Znam } -define float @foldSel3(i1 %A, float %B, float %C, i32 %X, i32 %Y) nounwind { - %Cond = icmp ult i32 %X, %Y ; <i1> [#uses=1] - %X.upgrd.2 = select i1 %Cond, float %B, float %C ; <float> [#uses=1] - ret float %X.upgrd.2 +declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone + +define i32 @test13(i32 %a, i32 %b) nounwind { + %c = icmp ult i32 %a, %b + %d = sext i1 %c to i32 + ret i32 %d +; CHECK: test13: +; CHECK: cmpl +; CHECK-NEXT: sbbl +; CHECK-NEXT: ret } -define float @nofoldSel4(i1 %A, float %B, float %C, i32 %X, i32 %Y) nounwind { - %Cond = icmp slt i32 %X, %Y ; <i1> [#uses=1] - %X.upgrd.3 = select i1 %Cond, float %B, float %C ; <float> [#uses=1] - ret float %X.upgrd.3 +define i32 @test14(i32 %a, i32 %b) nounwind { + %c = icmp uge i32 %a, %b + %d = sext i1 %c to i32 + ret i32 %d +; CHECK: test14: +; CHECK: cmpl +; CHECK-NEXT: sbbl +; CHECK-NEXT: notl +; CHECK-NEXT: ret } + diff --git a/test/CodeGen/X86/sext-select.ll b/test/CodeGen/X86/sext-select.ll deleted file mode 100644 index 4aca0407b36f..000000000000 --- a/test/CodeGen/X86/sext-select.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: llc < %s -march=x86 | grep movsw -; PR2139 - -declare void @abort() - -define i32 @main() { -entry: - %tmp73 = tail call i1 @return_false() ; <i8> [#uses=1] - %g.0 = select i1 %tmp73, i16 0, i16 -480 ; <i16> [#uses=2] - %tmp7778 = sext i16 %g.0 to i32 ; <i32> [#uses=1] - %tmp80 = shl i32 %tmp7778, 3 ; <i32> [#uses=2] - %tmp87 = icmp sgt i32 %tmp80, 32767 ; <i1> [#uses=1] - br i1 %tmp87, label %bb90, label %bb91 -bb90: ; preds = %bb84, %bb72 - tail call void @abort() - unreachable -bb91: ; preds = %bb84 - ret i32 0 -} - -define i1 @return_false() { - ret i1 0 -} diff --git a/test/CodeGen/X86/shift-folding.ll b/test/CodeGen/X86/shift-folding.ll index 48ca36ca9813..d9c3061ff687 100644 --- a/test/CodeGen/X86/shift-folding.ll +++ b/test/CodeGen/X86/shift-folding.ll @@ -1,21 +1,21 @@ ; RUN: llc < %s -march=x86 | \ ; RUN: grep {s\[ah\]\[rl\]l} | count 1 -define i32* @test1(i32* %P, i32 %X) { +define i32* @test1(i32* %P, i32 %X) nounwind { %Y = lshr i32 %X, 2 ; <i32> [#uses=1] %gep.upgrd.1 = zext i32 %Y to i64 ; <i64> [#uses=1] %P2 = getelementptr i32* %P, i64 %gep.upgrd.1 ; <i32*> [#uses=1] ret i32* %P2 } -define i32* @test2(i32* %P, i32 %X) { +define i32* @test2(i32* %P, i32 %X) nounwind { %Y = shl i32 %X, 2 ; <i32> [#uses=1] %gep.upgrd.2 = zext i32 %Y to i64 ; <i64> [#uses=1] %P2 = getelementptr i32* %P, i64 %gep.upgrd.2 ; <i32*> [#uses=1] ret i32* %P2 } -define i32* @test3(i32* %P, i32 %X) { +define i32* @test3(i32* %P, i32 %X) nounwind { %Y = ashr i32 %X, 2 ; <i32> [#uses=1] %P2 = getelementptr i32* %P, i32 %Y ; <i32*> [#uses=1] ret i32* %P2 diff --git a/test/CodeGen/X86/sibcall-3.ll b/test/CodeGen/X86/sibcall-3.ll index f0d66cf7b696..f97abe002957 100644 --- a/test/CodeGen/X86/sibcall-3.ll +++ b/test/CodeGen/X86/sibcall-3.ll @@ -3,7 +3,7 @@ define void @t1(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind { ; CHECK: t1: -; CHECK: call 0 +; CHECK: calll 0 tail call void null(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind ret void } diff --git a/test/CodeGen/X86/sibcall-5.ll b/test/CodeGen/X86/sibcall-5.ll new file mode 100644 index 000000000000..9d74121b4301 --- /dev/null +++ b/test/CodeGen/X86/sibcall-5.ll @@ -0,0 +1,31 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=X64 + +; Sibcall optimization of expanded libcalls. +; rdar://8707777 + +define double @foo(double %a) nounwind readonly ssp { +entry: +; X32: foo: +; X32: jmp _sin$stub + +; X64: foo: +; X64: jmp _sin + %0 = tail call double @sin(double %a) nounwind readonly + ret double %0 +} + +define float @bar(float %a) nounwind readonly ssp { +; X32: bar: +; X32: jmp _sinf$stub + +; X64: bar: +; X64: jmp _sinf +entry: + %0 = tail call float @sinf(float %a) nounwind readonly + ret float %0 +} + +declare float @sinf(float) nounwind readonly + +declare double @sin(double) nounwind readonly diff --git a/test/CodeGen/X86/sibcall.ll b/test/CodeGen/X86/sibcall.ll index a3c9957be34e..de2a81e80bd4 100644 --- a/test/CodeGen/X86/sibcall.ll +++ b/test/CodeGen/X86/sibcall.ll @@ -1,7 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -asm-verbose=false | FileCheck %s -check-prefix=32 -; RUN: llc < %s -march=x86-64 -mattr=+sse2 -asm-verbose=false | FileCheck %s -check-prefix=64 -; Darwin 8 generates stubs, which don't match -; XFAIL: apple-darwin8 +; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 -asm-verbose=false | FileCheck %s -check-prefix=32 +; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2 -asm-verbose=false | FileCheck %s -check-prefix=64 define void @t1(i32 %x) nounwind ssp { entry: @@ -45,7 +43,7 @@ declare i32 @foo3() define void @t4(void (i32)* nocapture %x) nounwind ssp { entry: ; 32: t4: -; 32: call * +; 32: calll * ; FIXME: gcc can generate a tailcall for this. But it's tricky. ; 64: t4: @@ -71,7 +69,7 @@ entry: define i32 @t6(i32 %x) nounwind ssp { entry: ; 32: t6: -; 32: call {{_?}}t6 +; 32: calll {{_?}}t6 ; 32: jmp {{_?}}bar ; 64: t6: @@ -108,7 +106,7 @@ declare i32 @bar2(i32, i32, i32) define signext i16 @t8() nounwind ssp { entry: ; 32: t8: -; 32: call {{_?}}bar3 +; 32: calll {{_?}}bar3 ; 64: t8: ; 64: callq {{_?}}bar3 @@ -121,7 +119,7 @@ declare signext i16 @bar3() define signext i16 @t9(i32 (i32)* nocapture %x) nounwind ssp { entry: ; 32: t9: -; 32: call * +; 32: calll * ; 64: t9: ; 64: callq * @@ -133,7 +131,7 @@ entry: define void @t10() nounwind ssp { entry: ; 32: t10: -; 32: call +; 32: calll ; 64: t10: ; 64: callq @@ -205,12 +203,12 @@ declare i32 @foo6(i32, i32, %struct.t* byval align 4) define %struct.ns* @t13(%struct.cp* %yy) nounwind ssp { ; 32: t13: ; 32-NOT: jmp -; 32: call +; 32: calll ; 32: ret ; 64: t13: ; 64-NOT: jmp -; 64: call +; 64: callq ; 64: ret entry: %0 = tail call fastcc %struct.ns* @foo7(%struct.cp* byval align 4 %yy, i8 signext 0) nounwind @@ -248,7 +246,7 @@ entry: define void @t15(%struct.foo* noalias sret %agg.result) nounwind { ; 32: t15: -; 32: call {{_?}}f +; 32: calll {{_?}}f ; 32: ret $4 ; 64: t15: @@ -263,7 +261,7 @@ declare void @f(%struct.foo* noalias sret) nounwind define void @t16() nounwind ssp { entry: ; 32: t16: -; 32: call {{_?}}bar4 +; 32: calll {{_?}}bar4 ; 32: fstp ; 64: t16: @@ -293,7 +291,7 @@ declare void @bar5(...) define void @t18() nounwind ssp { entry: ; 32: t18: -; 32: call {{_?}}bar6 +; 32: calll {{_?}}bar6 ; 32: fstp %st(0) ; 64: t18: @@ -309,7 +307,7 @@ define void @t19() alignstack(32) nounwind { entry: ; CHECK: t19: ; CHECK: andl $-32 -; CHECK: call {{_?}}foo +; CHECK: calll {{_?}}foo tail call void @foo() nounwind ret void } @@ -323,7 +321,7 @@ declare void @foo() define double @t20(double %x) nounwind { entry: ; 32: t20: -; 32: call {{_?}}foo20 +; 32: calll {{_?}}foo20 ; 32: fldl (%esp) ; 64: t20: diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll index acba5288c0d1..31f41eebc5aa 100644 --- a/test/CodeGen/X86/sink-hoist.ll +++ b/test/CodeGen/X86/sink-hoist.ll @@ -6,10 +6,11 @@ ; that it's conditionally evaluated. ; CHECK: foo: -; CHECK: divsd ; CHECK-NEXT: testb $1, %dil -; CHECK-NEXT: jne +; CHECK-NEXT: je ; CHECK-NEXT: divsd +; CHECK-NEXT: ret +; CHECK: divsd define double @foo(double %x, double %y, i1 %c) nounwind { %a = fdiv double %x, 3.2 @@ -18,6 +19,24 @@ define double @foo(double %x, double %y, i1 %c) nounwind { ret double %z } +; Make sure the critical edge is broken so the divsd is sunken below +; the conditional branch. +; rdar://8454886 + +; CHECK: split: +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: je +; CHECK-NEXT: divsd +; CHECK-NEXT: ret +; CHECK: movaps +; CHECK-NEXT: ret +define double @split(double %x, double %y, i1 %c) nounwind { + %a = fdiv double %x, 3.2 + %z = select i1 %c, double %a, double %y + ret double %z +} + + ; Hoist floating-point constant-pool loads out of loops. ; CHECK: bar: @@ -68,9 +87,9 @@ return: ; Codegen should hoist and CSE these constants. ; CHECK: vv: -; CHECK: LCPI2_0(%rip), %xmm0 -; CHECK: LCPI2_1(%rip), %xmm1 -; CHECK: LCPI2_2(%rip), %xmm2 +; CHECK: LCPI3_0(%rip), %xmm0 +; CHECK: LCPI3_1(%rip), %xmm1 +; CHECK: LCPI3_2(%rip), %xmm2 ; CHECK: align ; CHECK-NOT: LCPI ; CHECK: ret diff --git a/test/CodeGen/X86/split-select.ll b/test/CodeGen/X86/split-select.ll deleted file mode 100644 index 07d4d52f97a3..000000000000 --- a/test/CodeGen/X86/split-select.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=x86-64 | grep test | count 1 - -define void @foo(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) { - %x = select i1 %c, <2 x i16> %a, <2 x i16> %b - store <2 x i16> %x, <2 x i16>* %p - ret void -} diff --git a/test/CodeGen/X86/sse-align-11.ll b/test/CodeGen/X86/sse-align-11.ll index 3cc83ca0db2a..9f5d4b40d61a 100644 --- a/test/CodeGen/X86/sse-align-11.ll +++ b/test/CodeGen/X86/sse-align-11.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps -; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-linux-gnu | grep movups +; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-linux-gnu | grep movaps +; PR8969 - make 32-bit linux have a 16-byte aligned stack define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind { entry: diff --git a/test/CodeGen/X86/sse2.ll b/test/CodeGen/X86/sse2.ll index 6fc019071f8b..5c3e32f016a7 100644 --- a/test/CodeGen/X86/sse2.ll +++ b/test/CodeGen/X86/sse2.ll @@ -192,3 +192,33 @@ entry: ; CHECK: test15: ; CHECK: movhlps %xmm1, %xmm0 } + +; PR8900 +; CHECK: test16: +; CHECK: unpcklpd +; CHECK: ret + +define <2 x double> @test16(<4 x double> * nocapture %srcA, <2 x double>* nocapture %dst) { + %i5 = getelementptr inbounds <4 x double>* %srcA, i32 3 + %i6 = load <4 x double>* %i5, align 32 + %i7 = shufflevector <4 x double> %i6, <4 x double> undef, <2 x i32> <i32 0, i32 2> + ret <2 x double> %i7 +} + +; PR9009 +define fastcc void @test17() nounwind { +entry: + %0 = insertelement <4 x i32> undef, i32 undef, i32 1 + %1 = shufflevector <4 x i32> <i32 undef, i32 undef, i32 32768, i32 32768>, <4 x i32> %0, <4 x i32> <i32 4, i32 5, i32 2, i32 3> + %2 = bitcast <4 x i32> %1 to <4 x float> + store <4 x float> %2, <4 x float> * undef + ret void +} + +; PR9210 +define <4 x float> @f(<4 x double>) nounwind { +entry: + %double2float.i = fptrunc <4 x double> %0 to <4 x float> + ret <4 x float> %double2float.i +} + diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll index 206cdff1ba7d..9a60091a0cf0 100644 --- a/test/CodeGen/X86/sse3.ll +++ b/test/CodeGen/X86/sse3.ll @@ -169,7 +169,7 @@ define internal void @t10() nounwind { ret void ; X64: t10: ; X64: pextrw $4, %xmm0, %eax -; X64: movlhps %xmm1, %xmm1 +; X64: unpcklpd %xmm1, %xmm1 ; X64: pshuflw $8, %xmm1, %xmm1 ; X64: pinsrw $2, %eax, %xmm1 ; X64: pextrw $6, %xmm0, %eax @@ -260,3 +260,18 @@ entry: ; X64: pinsrw $1, %eax, %xmm0 ; X64: ret } + +; rdar://8520311 +define <4 x i32> @t17() nounwind { +entry: +; X64: t17: +; X64: movddup (%rax), %xmm0 + %tmp1 = load <4 x float>* undef, align 16 + %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> <i32 4, i32 1, i32 2, i32 3> + %tmp3 = load <4 x float>* undef, align 16 + %tmp4 = shufflevector <4 x float> %tmp2, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1> + %tmp5 = bitcast <4 x float> %tmp3 to <4 x i32> + %tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1> + %tmp7 = and <4 x i32> %tmp6, <i32 undef, i32 undef, i32 -1, i32 0> + ret <4 x i32> %tmp7 +} diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll index 3a14fa26300c..2ac4cb435a75 100644 --- a/test/CodeGen/X86/sse41.ll +++ b/test/CodeGen/X86/sse41.ll @@ -200,11 +200,11 @@ define i32 @ptestz_2(<4 x float> %t1, <4 x float> %t2) nounwind { ret i32 %tmp1 ; X32: _ptestz_2: ; X32: ptest %xmm1, %xmm0 -; X32: setb %al +; X32: sbbl %eax ; X64: _ptestz_2: ; X64: ptest %xmm1, %xmm0 -; X64: setb %al +; X64: sbbl %eax } define i32 @ptestz_3(<4 x float> %t1, <4 x float> %t2) nounwind { diff --git a/test/CodeGen/X86/stack-align.ll b/test/CodeGen/X86/stack-align.ll index 8ca0b12b547f..793c0267124c 100644 --- a/test/CodeGen/X86/stack-align.ll +++ b/test/CodeGen/X86/stack-align.ll @@ -7,7 +7,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 target triple = "i686-apple-darwin8" @G = external global double -define void @test({ double, double }* byval %z, double* %P) { +define void @test({ double, double }* byval %z, double* %P) nounwind { entry: %tmp3 = load double* @G, align 16 ; <double> [#uses=1] %tmp4 = tail call double @fabs( double %tmp3 ) ; <double> [#uses=1] @@ -21,14 +21,14 @@ entry: ret void } -define void @test2() alignstack(16) { +define void @test2() alignstack(16) nounwind { entry: ; CHECK: andl{{.*}}$-16, %esp ret void } ; Use a call to force a spill. -define <2 x double> @test3(<2 x double> %x, <2 x double> %y) alignstack(32) { +define <2 x double> @test3(<2 x double> %x, <2 x double> %y) alignstack(32) nounwind { entry: ; CHECK: andl{{.*}}$-32, %esp call void @test2() @@ -38,3 +38,14 @@ entry: declare double @fabs(double) +; The pointer is already known aligned, so and x,-16 is eliminable. +define i32 @test4() nounwind { +entry: + %buffer = alloca [2048 x i8], align 16 + %0 = ptrtoint [2048 x i8]* %buffer to i32 + %and = and i32 %0, -16 + ret i32 %and +; CHECK: test4: +; CHECK-NOT: and +; CHECK: ret +} diff --git a/test/CodeGen/X86/stdcall-notailcall.ll b/test/CodeGen/X86/stdcall-notailcall.ll new file mode 100644 index 000000000000..8e33c30bf293 --- /dev/null +++ b/test/CodeGen/X86/stdcall-notailcall.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple=i386-apple-darwin11 -O2 < %s | FileCheck %s + +%struct.I = type { i32 (...)** } +define x86_stdcallcc void @bar(%struct.I* nocapture %this) ssp align 2 { +; CHECK: bar: +; CHECK-NOT: jmp +; CHECK: ret $4 +entry: + tail call void @foo() + ret void +} + +declare void @foo() diff --git a/test/CodeGen/X86/store-narrow.ll b/test/CodeGen/X86/store-narrow.ll index abc5174c98de..0dd228eb145f 100644 --- a/test/CodeGen/X86/store-narrow.ll +++ b/test/CodeGen/X86/store-narrow.ll @@ -152,3 +152,17 @@ define void @test9() nounwind { store i32 %or, i32* @g_16 ret void } + +; rdar://8494845 + PR8244 +; X64: test10: +; X64-NEXT: movsbl (%rdi), %eax +; X64-NEXT: shrl $8, %eax +; X64-NEXT: ret +define i8 @test10(i8* %P) nounwind ssp { +entry: + %tmp = load i8* %P, align 1 + %conv = sext i8 %tmp to i32 + %shr3 = lshr i32 %conv, 8 + %conv2 = trunc i32 %shr3 to i8 + ret i8 %conv2 +} diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll index 46e59e95e53f..11686227ab9c 100644 --- a/test/CodeGen/X86/store_op_load_fold2.ll +++ b/test/CodeGen/X86/store_op_load_fold2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=intel | FileCheck %s target datalayout = "e-p:32:32" %struct.Macroblock = type { i32, i32, i32, i32, i32, [8 x i32], %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/switch-bt.ll b/test/CodeGen/X86/switch-bt.ll index ed3266ec422b..9f491d452fa8 100644 --- a/test/CodeGen/X86/switch-bt.ll +++ b/test/CodeGen/X86/switch-bt.ll @@ -49,3 +49,33 @@ sw.epilog: ; preds = %sw.default, %sw.bb4 } declare void @foo(i32) + +; Don't zero extend the test operands to pointer type if it can be avoided. +; rdar://8781238 +define void @test2(i32 %x) nounwind ssp { +; CHECK: test2: +; CHECK: cmpl $6 +; CHECK: ja + +; CHECK-NEXT: movl $91 +; CHECK-NOT: movl +; CHECK-NEXT: btl +; CHECK-NEXT: jb +entry: + switch i32 %x, label %if.end [ + i32 6, label %if.then + i32 4, label %if.then + i32 3, label %if.then + i32 1, label %if.then + i32 0, label %if.then + ] + +if.then: ; preds = %entry, %entry, %entry, %entry, %entry + tail call void @bar() nounwind + ret void + +if.end: ; preds = %entry + ret void +} + +declare void @bar() diff --git a/test/CodeGen/X86/switch-or.ll b/test/CodeGen/X86/switch-or.ll new file mode 100644 index 000000000000..75832c7d304c --- /dev/null +++ b/test/CodeGen/X86/switch-or.ll @@ -0,0 +1,22 @@ +; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s + +; Check that merging switch cases that differ in one bit works. +; CHECK: orl $2 +; CHECK-NEXT: cmpl $6 + +define void @foo(i32 %variable) nounwind { +entry: + switch i32 %variable, label %if.end [ + i32 4, label %if.then + i32 6, label %if.then + ] + +if.then: + %call = tail call i32 (...)* @bar() nounwind + ret void + +if.end: + ret void +} + +declare i32 @bar(...) nounwind diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll index 9662ad6cd740..9291695f4d65 100644 --- a/test/CodeGen/X86/tail-opts.ll +++ b/test/CodeGen/X86/tail-opts.ll @@ -62,11 +62,11 @@ declare i8* @choose(i8*, i8*) ; CHECK: tail_duplicate_me: ; CHECK: movl $0, GHJK(%rip) -; CHECK-NEXT: jmpq *%rbx +; CHECK-NEXT: jmpq *%r ; CHECK: movl $0, GHJK(%rip) -; CHECK-NEXT: jmpq *%rbx +; CHECK-NEXT: jmpq *%r ; CHECK: movl $0, GHJK(%rip) -; CHECK-NEXT: jmpq *%rbx +; CHECK-NEXT: jmpq *%r define void @tail_duplicate_me() nounwind { entry: @@ -153,19 +153,16 @@ bb30: ; an unconditional jump to complete a two-way conditional branch. ; CHECK: c_expand_expr_stmt: -; CHECK: jmp .LBB3_7 -; CHECK-NEXT: .LBB3_12: +; CHECK: jmp .LBB3_11 +; CHECK-NEXT: .LBB3_9: ; CHECK-NEXT: movq 8(%rax), %rax +; CHECK-NEXT: xorb %dl, %dl ; CHECK-NEXT: movb 16(%rax), %al ; CHECK-NEXT: cmpb $16, %al -; CHECK-NEXT: je .LBB3_6 +; CHECK-NEXT: je .LBB3_11 ; CHECK-NEXT: cmpb $23, %al -; CHECK-NEXT: je .LBB3_6 -; CHECK-NEXT: jmp .LBB3_15 -; CHECK-NEXT: .LBB3_14: -; CHECK-NEXT: cmpb $23, %bl -; CHECK-NEXT: jne .LBB3_15 -; CHECK-NEXT: .LBB3_15: +; CHECK-NEXT: jne .LBB3_14 +; CHECK-NEXT: .LBB3_11: %0 = type { %struct.rtx_def* } %struct.lang_decl = type opaque @@ -276,7 +273,7 @@ declare fastcc %union.tree_node* @default_conversion(%union.tree_node*) nounwind ; CHECK: foo: ; CHECK: callq func ; CHECK-NEXT: .LBB4_2: -; CHECK-NEXT: addq $8, %rsp +; CHECK-NEXT: popq ; CHECK-NEXT: ret define void @foo(i1* %V) nounwind { diff --git a/test/CodeGen/X86/tailcall-largecode.ll b/test/CodeGen/X86/tailcall-largecode.ll index c7070f2abd25..c3f4278aecbe 100644 --- a/test/CodeGen/X86/tailcall-largecode.ll +++ b/test/CodeGen/X86/tailcall-largecode.ll @@ -17,7 +17,7 @@ define fastcc i32 @indirect_manyargs(i32(i32,i32,i32,i32,i32,i32,i32)* %target) ; Adjust the stack to enter the function. (The amount of the ; adjustment may change in the future, in which case the location of ; the stack argument and the return adjustment will change too.) -; CHECK: subq $8, %rsp +; CHECK: pushq ; Put the call target into R11, which won't be clobbered while restoring ; callee-saved registers and won't be used for passing arguments. ; CHECK: movq %rdi, %rax @@ -31,7 +31,7 @@ define fastcc i32 @indirect_manyargs(i32(i32,i32,i32,i32,i32,i32,i32)* %target) ; CHECK: movl $5, %r8d ; CHECK: movl $6, %r9d ; Adjust the stack to "return". -; CHECK: addq $8, %rsp +; CHECK: popq ; And tail-call to the target. ; CHECK: jmpq *%rax # TAILCALL %res = tail call fastcc i32 %target(i32 1, i32 2, i32 3, i32 4, i32 5, @@ -46,7 +46,7 @@ define fastcc i32 @direct_manyargs() { ; Adjust the stack to enter the function. (The amount of the ; adjustment may change in the future, in which case the location of ; the stack argument and the return adjustment will change too.) -; CHECK: subq $8, %rsp +; CHECK: pushq ; Pass the stack argument. ; CHECK: movl $7, 16(%rsp) ; Pass the register arguments, in the right registers. @@ -62,7 +62,7 @@ define fastcc i32 @direct_manyargs() { ; arguments. ; CHECK: movabsq $manyargs_callee, %rax ; Adjust the stack to "return". -; CHECK: addq $8, %rsp +; CHECK: popq ; And tail-call to the target. ; CHECK: jmpq *%rax # TAILCALL %res = tail call fastcc i32 @manyargs_callee(i32 1, i32 2, i32 3, i32 4, diff --git a/test/CodeGen/X86/tailcall-ri64.ll b/test/CodeGen/X86/tailcall-ri64.ll new file mode 100644 index 000000000000..914d8f7b8bc7 --- /dev/null +++ b/test/CodeGen/X86/tailcall-ri64.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=AMD64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64 +; PR8743 +; TAILJMPri64 should not receive "callee-saved" registers beyond epilogue. + +; AMD64: jmpq +; AMD64-NOT: %{{e[a-z]|rbx|rbp|r10|r12|r13|r14|r15}} + +; WIN64: jmpq +; WIN64-NOT: %{{e[a-z]|rbx|rsi|rdi|rbp|r12|r13|r14|r15}} + +%class = type { [8 x i8] } +%vt = type { i32 (...)** } + +define %vt* @_ZN4llvm9UnsetInit20convertInitializerToEPNS_5RecTyE(%class* +%this, %vt* %Ty) align 2 { +entry: + %0 = bitcast %vt* %Ty to %vt* (%vt*, %class*)*** + %vtable = load %vt* (%vt*, %class*)*** %0, align 8 + %vfn = getelementptr inbounds %vt* (%vt*, %class*)** %vtable, i64 4 + %1 = load %vt* (%vt*, %class*)** %vfn, align 8 + %call = tail call %vt* %1(%vt* %Ty, %class* %this) + ret %vt* %call +} diff --git a/test/CodeGen/X86/tailcall-stackalign.ll b/test/CodeGen/X86/tailcall-stackalign.ll index 0233139e8082..d3f811cff248 100644 --- a/test/CodeGen/X86/tailcall-stackalign.ll +++ b/test/CodeGen/X86/tailcall-stackalign.ll @@ -19,5 +19,5 @@ define i32 @main(i32 %argc, i8** %argv) { ret i32 0 } -; CHECK: call tailcaller +; CHECK: calll tailcaller ; CHECK-NEXT: subl $12 diff --git a/test/CodeGen/X86/tailcallfp2.ll b/test/CodeGen/X86/tailcallfp2.ll index 4ec127f81ac7..04c4e95710c5 100644 --- a/test/CodeGen/X86/tailcallfp2.ll +++ b/test/CodeGen/X86/tailcallfp2.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%edx} +; RUN: llc < %s -march=x86 -tailcallopt | FileCheck %s declare i32 @putchar(i32) define fastcc i32 @checktail(i32 %x, i32* %f, i32 %g) nounwind { +; CHECK: checktail: %tmp1 = icmp sgt i32 %x, 0 br i1 %tmp1, label %if-then, label %if-else @@ -10,6 +11,7 @@ if-then: %fun_ptr = bitcast i32* %f to i32(i32, i32*, i32)* %arg1 = add i32 %x, -1 call i32 @putchar(i32 90) +; CHECK: jmpl *%e{{.*}} %res = tail call fastcc i32 %fun_ptr( i32 %arg1, i32 * %f, i32 %g) ret i32 %res diff --git a/test/CodeGen/X86/tailcallstack64.ll b/test/CodeGen/X86/tailcallstack64.ll index 107bdf9de3e7..0c732d56b6ca 100644 --- a/test/CodeGen/X86/tailcallstack64.ll +++ b/test/CodeGen/X86/tailcallstack64.ll @@ -1,16 +1,20 @@ -; RUN: llc < %s -tailcallopt -march=x86-64 -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -tailcallopt -mtriple=x86_64-linux -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -tailcallopt -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s + +; FIXME: Redundant unused stack allocation could be eliminated. +; CHECK: subq ${{24|88}}, %rsp ; Check that lowered arguments on the stack do not overwrite each other. ; Add %in1 %p1 to a different temporary register (%eax). -; CHECK: movl 32(%rsp), %eax +; CHECK: movl [[A1:32|144]](%rsp), %eax ; Move param %in1 to temp register (%r10d). -; CHECK: movl 40(%rsp), %r10d +; CHECK: movl [[A2:40|152]](%rsp), %r10d ; Add %in1 %p1 to a different temporary register (%eax). -; CHECK: addl %edi, %eax +; CHECK: addl {{%edi|%ecx}}, %eax ; Move param %in2 to stack. -; CHECK: movl %r10d, 32(%rsp) +; CHECK: movl %r10d, [[A1]](%rsp) ; Move result of addition to stack. -; CHECK: movl %eax, 40(%rsp) +; CHECK: movl %eax, [[A2]](%rsp) ; Eventually, do a TAILCALL ; CHECK: TAILCALL @@ -22,4 +26,3 @@ entry: %retval = tail call fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %in2,i32 %tmp) ret i32 %retval } - diff --git a/test/CodeGen/X86/tls-pic.ll b/test/CodeGen/X86/tls-pic.ll index 4cad8376d8d9..b83416d4b32b 100644 --- a/test/CodeGen/X86/tls-pic.ll +++ b/test/CodeGen/X86/tls-pic.ll @@ -11,11 +11,11 @@ entry: ; X32: f1: ; X32: leal i@TLSGD(,%ebx), %eax -; X32: call ___tls_get_addr@PLT +; X32: calll ___tls_get_addr@PLT ; X64: f1: ; X64: leaq i@TLSGD(%rip), %rdi -; X64: call __tls_get_addr@PLT +; X64: callq __tls_get_addr@PLT @i2 = external thread_local global i32 @@ -27,11 +27,11 @@ entry: ; X32: f2: ; X32: leal i@TLSGD(,%ebx), %eax -; X32: call ___tls_get_addr@PLT +; X32: calll ___tls_get_addr@PLT ; X64: f2: ; X64: leaq i@TLSGD(%rip), %rdi -; X64: call __tls_get_addr@PLT +; X64: callq __tls_get_addr@PLT @@ -43,11 +43,11 @@ entry: ; X32: f3: ; X32: leal i@TLSGD(,%ebx), %eax -; X32: call ___tls_get_addr@PLT +; X32: calll ___tls_get_addr@PLT ; X64: f3: ; X64: leaq i@TLSGD(%rip), %rdi -; X64: call __tls_get_addr@PLT +; X64: callq __tls_get_addr@PLT define i32* @f4() nounwind { @@ -57,11 +57,11 @@ entry: ; X32: f4: ; X32: leal i@TLSGD(,%ebx), %eax -; X32: call ___tls_get_addr@PLT +; X32: calll ___tls_get_addr@PLT ; X64: f4: ; X64: leaq i@TLSGD(%rip), %rdi -; X64: call __tls_get_addr@PLT +; X64: callq __tls_get_addr@PLT diff --git a/test/CodeGen/X86/tls9.ll b/test/CodeGen/X86/tls9.ll index 214146fe998c..7d08df84a9fa 100644 --- a/test/CodeGen/X86/tls9.ll +++ b/test/CodeGen/X86/tls9.ll @@ -5,7 +5,7 @@ @i = external hidden thread_local global i32 -define i32 @f() { +define i32 @f() nounwind { entry: %tmp1 = load i32* @i ret i32 %tmp1 diff --git a/test/CodeGen/X86/tls-1.ll b/test/CodeGen/X86/tlv-1.ll index de694d8d471f..42940f147ed8 100644 --- a/test/CodeGen/X86/tls-1.ll +++ b/test/CodeGen/X86/tlv-1.ll @@ -1,5 +1,21 @@ ; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s +%struct.A = type { [48 x i8], i32, i32, i32 } + +@c = external thread_local global %struct.A, align 4 + +define void @main() nounwind ssp { +entry: + call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false) + unreachable + ; CHECK: movq _c@TLVP(%rip), %rdi + ; CHECK-NEXT: callq *(%rdi) + ; CHECK-NEXT: movl $0, 56(%rax) + ; CHECK-NEXT: movq $0, 48(%rax) +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind + @a = thread_local global i32 0 ; <i32*> [#uses=0] @b = thread_local global i32 0 ; <i32*> [#uses=0] diff --git a/test/CodeGen/X86/tlv-2.ll b/test/CodeGen/X86/tlv-2.ll new file mode 100644 index 000000000000..5f29a60bef5a --- /dev/null +++ b/test/CodeGen/X86/tlv-2.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -mtriple x86_64-apple-darwin -O0 | FileCheck %s + +@b = thread_local global i32 5, align 4 +@a = thread_local global i32 0, align 4 +@c = internal thread_local global i32 0, align 4 +@d = internal thread_local global i32 5, align 4 + +define void @foo() nounwind ssp { +entry: + store i32 1, i32* @a, align 4 + ; CHECK: movq _a@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $1, (%rax) + + store i32 2, i32* @b, align 4 + ; CHECK: movq _b@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $2, (%rax) + + store i32 3, i32* @c, align 4 + ; CHECK: movq _c@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $3, (%rax) + + store i32 4, i32* @d, align 4 + ; CHECK: movq _d@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $4, (%rax) + ; CHECK: popq + + ret void +} diff --git a/test/CodeGen/X86/twoaddr-lea.ll b/test/CodeGen/X86/twoaddr-lea.ll index a245ed7caa84..ec16dfe172e3 100644 --- a/test/CodeGen/X86/twoaddr-lea.ll +++ b/test/CodeGen/X86/twoaddr-lea.ll @@ -5,20 +5,32 @@ ;; allocator turns the shift into an LEA. This also occurs for ADD. ; Check that the shift gets turned into an LEA. -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ -; RUN: not grep {mov E.X, E.X} +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -@G = external global i32 ; <i32*> [#uses=3] +@G = external global i32 -define i32 @test1(i32 %X, i32 %Y) { - %Z = add i32 %X, %Y ; <i32> [#uses=1] - volatile store i32 %Y, i32* @G +define i32 @test1(i32 %X) nounwind { +; CHECK: test1: +; CHECK-NOT: mov +; CHECK: leal 1(%rdi) + %Z = add i32 %X, 1 volatile store i32 %Z, i32* @G ret i32 %X } -define i32 @test2(i32 %X) { - %Z = add i32 %X, 1 ; <i32> [#uses=1] - volatile store i32 %Z, i32* @G - ret i32 %X +; rdar://8977508 +; The second add should not be transformed to leal nor should it be +; commutted (which would require inserting a copy). +define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind { +entry: +; CHECK: test2: +; CHECK: leal +; CHECK-NOT: leal +; CHECK-NOT: mov +; CHECK-NEXT: addl +; CHECK-NEXT: ret + %add = add i32 %b, %a + %add3 = add i32 %add, %c + %add5 = add i32 %add3, %d + ret i32 %add5 } diff --git a/test/CodeGen/X86/uint64-to-float.ll b/test/CodeGen/X86/uint64-to-float.ll new file mode 100644 index 000000000000..d9f753c7a88e --- /dev/null +++ b/test/CodeGen/X86/uint64-to-float.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s +; Verify that we are using the efficient uitofp --> sitofp lowering illustrated +; by the compiler_rt implementation of __floatundisf. +; <rdar://problem/8493982> + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; CHECK: testq %rdi, %rdi +; CHECK-NEXT: jns LBB0_2 +; CHECK: shrq +; CHECK-NEXT: andq +; CHECK-NEXT: orq +; CHECK-NEXT: cvtsi2ss +; CHECK: LBB0_2 +; CHECK-NEXT: cvtsi2ss +define float @test(i64 %a) { +entry: + %b = uitofp i64 %a to float + ret float %b +} diff --git a/test/CodeGen/X86/umul-with-overflow.ll b/test/CodeGen/X86/umul-with-overflow.ll index d522bd80acfd..c9976617a247 100644 --- a/test/CodeGen/X86/umul-with-overflow.ll +++ b/test/CodeGen/X86/umul-with-overflow.ll @@ -1,8 +1,14 @@ -; RUN: llc < %s -march=x86 | grep "\\\\\\\<mul" +; RUN: llc < %s -march=x86 | FileCheck %s declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b) define i1 @a(i32 %x) zeroext nounwind { %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3) %obil = extractvalue {i32, i1} %res, 1 ret i1 %obil + +; CHECK: a: +; CHECK: mull +; CHECK: seto %al +; CHECK: movzbl %al, %eax +; CHECK: ret } diff --git a/test/CodeGen/X86/umulo-64.ll b/test/CodeGen/X86/umulo-64.ll new file mode 100644 index 000000000000..280bd9cb066d --- /dev/null +++ b/test/CodeGen/X86/umulo-64.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin + +%0 = type { i64, i1 } + +define i32 @f0(i64 %a, i64 %b) nounwind ssp { + %1 = alloca i64, align 4 + %2 = alloca i64, align 4 + store i64 %a, i64* %1, align 8 + store i64 %b, i64* %2, align 8 + %3 = load i64* %1, align 8 + %4 = load i64* %2, align 8 + %5 = call %0 @llvm.smul.with.overflow.i64(i64 %3, i64 %4) + %6 = extractvalue %0 %5, 0 + %7 = extractvalue %0 %5, 1 + br i1 %7, label %8, label %9 + +; <label>:8 ; preds = %0 + call void @llvm.trap() + unreachable + +; <label>:9 ; preds = %0 + %10 = trunc i64 %6 to i32 + ret i32 %10 +} + +declare %0 @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone + +declare void @llvm.trap() nounwind diff --git a/test/CodeGen/X86/unaligned-load.ll b/test/CodeGen/X86/unaligned-load.ll index a99af0605b12..6a493c0594de 100644 --- a/test/CodeGen/X86/unaligned-load.ll +++ b/test/CodeGen/X86/unaligned-load.ll @@ -13,7 +13,7 @@ entry: bb: %String2Loc9 = getelementptr inbounds [31 x i8]* %String2Loc, i64 0, i64 0 call void @llvm.memcpy.i64(i8* %String2Loc9, i8* getelementptr inbounds ([31 x i8]* @.str3, i64 0, i64 0), i64 31, i32 1) -; I386: call {{_?}}memcpy +; I386: calll {{_?}}memcpy ; CORE2: movabsq ; CORE2: movabsq diff --git a/test/CodeGen/X86/unknown-location.ll b/test/CodeGen/X86/unknown-location.ll index fa98b781e4ea..09431b5564ae 100644 --- a/test/CodeGen/X86/unknown-location.ll +++ b/test/CodeGen/X86/unknown-location.ll @@ -1,15 +1,15 @@ -; RUN: llc < %s -asm-verbose=false -march=x86-64 -use-unknown-locations | FileCheck %s +; RUN: llc < %s -asm-verbose=false -mtriple=x86_64-apple-darwin10 -use-unknown-locations | FileCheck %s ; The divide instruction does not have a debug location. CodeGen should -; represent this in the debug information. This is checked by a check -; for a label between the code for the add and the code for the divide, -; which indicates that the add's location doesn't spill over unto the -; divide. +; represent this in the debug information. This is done by setting line +; and column to 0 ; CHECK: leal (%rdi,%rsi), %eax +; CHECK-NEXT: .loc 1 0 0 ; CHECK-NEXT: Ltmp ; CHECK-NEXT: cltd ; CHECK-NEXT: idivl %r8d +; CHECK-NEXT: .loc 1 4 3 ; CHECK-NEXT: Ltmp ; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: ret diff --git a/test/CodeGen/X86/vec-sign.ll b/test/CodeGen/X86/vec-sign.ll new file mode 100644 index 000000000000..31b9c2eb4c77 --- /dev/null +++ b/test/CodeGen/X86/vec-sign.ll @@ -0,0 +1,30 @@ +; RUN: llc < %s -march=x86 -mcpu=nehalem | FileCheck %s + +define <4 x i32> @signd(<4 x i32> %a, <4 x i32> %b) nounwind { +entry: +; CHECK: signd: +; CHECK: psignd +; CHECK-NOT: sub +; CHECK: ret + %b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31> + %sub = sub nsw <4 x i32> zeroinitializer, %a + %0 = xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1> + %1 = and <4 x i32> %a, %0 + %2 = and <4 x i32> %b.lobit, %sub + %cond = or <4 x i32> %1, %2 + ret <4 x i32> %cond +} + +define <4 x i32> @blendvb(<4 x i32> %b, <4 x i32> %a, <4 x i32> %c) nounwind { +entry: +; CHECK: blendvb: +; CHECK: pblendvb +; CHECK: ret + %b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31> + %sub = sub nsw <4 x i32> zeroinitializer, %a + %0 = xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1> + %1 = and <4 x i32> %c, %0 + %2 = and <4 x i32> %a, %b.lobit + %cond = or <4 x i32> %1, %2 + ret <4 x i32> %cond +} diff --git a/test/CodeGen/X86/vec-trunc-store.ll b/test/CodeGen/X86/vec-trunc-store.ll index 2f57d7b571f0..4d665f1843ef 100644 --- a/test/CodeGen/X86/vec-trunc-store.ll +++ b/test/CodeGen/X86/vec-trunc-store.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -disable-mmx >/dev/null +; RUN: llc < %s -march=x86-64 define void @foo(<8 x i32>* %p) nounwind { %t = load <8 x i32>* %p diff --git a/test/CodeGen/X86/vec_cast.ll b/test/CodeGen/X86/vec_cast.ll index f8531646effa..95289c9685a1 100644 --- a/test/CodeGen/X86/vec_cast.ll +++ b/test/CodeGen/X86/vec_cast.ll @@ -1,5 +1,4 @@ ; RUN: llc < %s -march=x86-64 -mcpu=core2 -; RUN: llc < %s -march=x86-64 -mcpu=core2 -disable-mmx define <8 x i32> @a(<8 x i16> %a) nounwind { diff --git a/test/CodeGen/X86/vec_compare-2.ll b/test/CodeGen/X86/vec_compare-2.ll index 091641b3bc3b..04bb7254fb08 100644 --- a/test/CodeGen/X86/vec_compare-2.ll +++ b/test/CodeGen/X86/vec_compare-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=penryn -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=penryn | FileCheck %s declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone diff --git a/test/CodeGen/X86/vec_ext_inreg.ll b/test/CodeGen/X86/vec_ext_inreg.ll index 8d2a3c31aedf..02b16a79f4a0 100644 --- a/test/CodeGen/X86/vec_ext_inreg.ll +++ b/test/CodeGen/X86/vec_ext_inreg.ll @@ -1,5 +1,4 @@ ; RUN: llc < %s -march=x86-64 -; RUN: llc < %s -march=x86-64 -disable-mmx define <8 x i32> @a(<8 x i32> %a) nounwind { %b = trunc <8 x i32> %a to <8 x i16> diff --git a/test/CodeGen/X86/vec_insert-5.ll b/test/CodeGen/X86/vec_insert-5.ll index 291fc0454c9c..471cc1611fce 100644 --- a/test/CodeGen/X86/vec_insert-5.ll +++ b/test/CodeGen/X86/vec_insert-5.ll @@ -1,15 +1,16 @@ ; RUN: llc < %s -march=x86 -mattr=+sse2 > %t -; RUN: grep psllq %t | grep 32 +; RUN: grep shll %t | grep 12 ; RUN: grep pslldq %t | grep 12 ; RUN: grep psrldq %t | grep 8 ; RUN: grep psrldq %t | grep 12 +; There are no MMX operations in @t1 -define void @t1(i32 %a, <1 x i64>* %P) nounwind { +define void @t1(i32 %a, x86_mmx* %P) nounwind { %tmp12 = shl i32 %a, 12 %tmp21 = insertelement <2 x i32> undef, i32 %tmp12, i32 1 %tmp22 = insertelement <2 x i32> %tmp21, i32 0, i32 0 - %tmp23 = bitcast <2 x i32> %tmp22 to <1 x i64> - store <1 x i64> %tmp23, <1 x i64>* %P + %tmp23 = bitcast <2 x i32> %tmp22 to x86_mmx + store x86_mmx %tmp23, x86_mmx* %P ret void } diff --git a/test/CodeGen/X86/vec_insert-7.ll b/test/CodeGen/X86/vec_insert-7.ll index 9ede10f63d3e..268b5c4bf972 100644 --- a/test/CodeGen/X86/vec_insert-7.ll +++ b/test/CodeGen/X86/vec_insert-7.ll @@ -1,8 +1,15 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx -mtriple=i686-apple-darwin9 -o - | grep punpckldq +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=i686-apple-darwin9 | FileCheck %s +; MMX insertelement is not available; these are promoted to XMM. +; (Without SSE they are split to two ints, and the code is much better.) -define <2 x i32> @mmx_movzl(<2 x i32> %x) nounwind { +define x86_mmx @mmx_movzl(x86_mmx %x) nounwind { entry: - %tmp3 = insertelement <2 x i32> %x, i32 32, i32 0 ; <<2 x i32>> [#uses=1] +; CHECK: mmx_movzl +; CHECK: pinsrd +; CHECK: pinsrd + %tmp = bitcast x86_mmx %x to <2 x i32> + %tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0 ; <<2 x i32>> [#uses=1] %tmp8 = insertelement <2 x i32> %tmp3, i32 0, i32 1 ; <<2 x i32>> [#uses=1] - ret <2 x i32> %tmp8 + %tmp9 = bitcast <2 x i32> %tmp8 to x86_mmx + ret x86_mmx %tmp9 } diff --git a/test/CodeGen/X86/vec_select.ll b/test/CodeGen/X86/vec_select.ll deleted file mode 100644 index 033e9f7027f9..000000000000 --- a/test/CodeGen/X86/vec_select.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse - -define void @test(i32 %C, <4 x float>* %A, <4 x float>* %B) { - %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1] - %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=2] - %tmp9 = fmul <4 x float> %tmp3, %tmp3 ; <<4 x float>> [#uses=1] - %tmp.upgrd.1 = icmp eq i32 %C, 0 ; <i1> [#uses=1] - %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp ; <<4 x float>> [#uses=1] - store <4 x float> %iftmp.38.0, <4 x float>* %A - ret void -} - diff --git a/test/CodeGen/X86/vec_set-F.ll b/test/CodeGen/X86/vec_set-F.ll index 4f0acb2d151d..6dd3cb0abeb9 100644 --- a/test/CodeGen/X86/vec_set-F.ll +++ b/test/CodeGen/X86/vec_set-F.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 3 +; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep movq +; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep movsd +; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep mov | count 3 define <2 x i64> @t1(<2 x i64>* %ptr) nounwind { %tmp45 = bitcast <2 x i64>* %ptr to <2 x i32>* diff --git a/test/CodeGen/X86/vec_shuffle-27.ll b/test/CodeGen/X86/vec_shuffle-27.ll index d700ccbf5303..dec98c7400a5 100644 --- a/test/CodeGen/X86/vec_shuffle-27.ll +++ b/test/CodeGen/X86/vec_shuffle-27.ll @@ -1,7 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 -o %t -; RUN: grep addps %t | count 2 -; RUN: grep mulps %t | count 2 -; RUN: grep subps %t | count 2 +; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s ; ModuleID = 'vec_shuffle-27.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" @@ -9,9 +6,33 @@ target triple = "i686-apple-cl.1.0" define <8 x float> @my2filter4_1d(<4 x float> %a, <8 x float> %T0, <8 x float> %T1) nounwind readnone { entry: +; CHECK: subps +; CHECK: mulps +; CHECK: addps +; CHECK: subps +; CHECK: mulps +; CHECK: addps %tmp7 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3 > ; <<8 x float>> [#uses=1] %sub = fsub <8 x float> %T1, %T0 ; <<8 x float>> [#uses=1] %mul = fmul <8 x float> %sub, %tmp7 ; <<8 x float>> [#uses=1] %add = fadd <8 x float> %mul, %T0 ; <<8 x float>> [#uses=1] ret <8 x float> %add } + +; Test case for r122206 +define void @test2(<4 x i64>* %ap, <4 x i64>* %bp) nounwind { +entry: +; CHECK: movdqa + %a = load <4 x i64> * %ap + %b = load <4 x i64> * %bp + %mulaa = mul <4 x i64> %a, %a + %mulbb = mul <4 x i64> %b, %b + %mulab = mul <4 x i64> %a, %b + %vect1271 = shufflevector <4 x i64> %mulaa, <4 x i64> %mulbb, <4 x i32> <i32 0, i32 4, i32 undef, i32 undef> + %vect1272 = shufflevector <4 x i64> %mulaa, <4 x i64> %mulbb, <4 x i32> <i32 1, i32 5, i32 undef, i32 undef> + %vect1487 = shufflevector <4 x i64> %vect1271, <4 x i64> %mulab, <4 x i32> <i32 0, i32 1, i32 2, i32 4> + %vect1488 = shufflevector <4 x i64> %vect1272, <4 x i64> %mulab, <4 x i32> <i32 0, i32 1, i32 2, i32 5> + store <4 x i64> %vect1487, <4 x i64>* %ap + store <4 x i64> %vect1488, <4 x i64>* %bp + ret void; +}
\ No newline at end of file diff --git a/test/CodeGen/X86/vec_shuffle-30.ll b/test/CodeGen/X86/vec_shuffle-30.ll index 3f69150ac533..1651c4cdace2 100644 --- a/test/CodeGen/X86/vec_shuffle-30.ll +++ b/test/CodeGen/X86/vec_shuffle-30.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse41 -disable-mmx -o %t +; RUN: llc < %s -march=x86 -mattr=sse41 -o %t ; RUN: grep pshufhw %t | grep -- -95 | count 1 ; RUN: grep shufps %t | count 1 ; RUN: not grep pslldq %t diff --git a/test/CodeGen/X86/vec_shuffle-37.ll b/test/CodeGen/X86/vec_shuffle-37.ll index 1ed858de64e8..b09093089c5a 100644 --- a/test/CodeGen/X86/vec_shuffle-37.ll +++ b/test/CodeGen/X86/vec_shuffle-37.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc -O0 < %s -march=x86 -mcpu=core2 | FileCheck %s --check-prefix=CHECK_O0 define <4 x i32> @t00(<4 x i32>* %a0) nounwind ssp { entry: @@ -12,3 +13,12 @@ entry: ret <4 x i32> %2 } +define void @t01(double* %a0) nounwind ssp { +entry: +; CHECK_O0: movsd (%eax), %xmm0 +; CHECK_O0: unpcklpd %xmm0, %xmm0 + %tmp93 = load double* %a0, align 8 + %vecinit94 = insertelement <2 x double> undef, double %tmp93, i32 1 + store <2 x double> %vecinit94, <2 x double>* undef + ret void +} diff --git a/test/CodeGen/X86/vec_zero_cse.ll b/test/CodeGen/X86/vec_zero_cse.ll index 3b15d4cc407b..8aa50945e635 100644 --- a/test/CodeGen/X86/vec_zero_cse.ll +++ b/test/CodeGen/X86/vec_zero_cse.ll @@ -1,5 +1,6 @@ -; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pxor | count 2 -; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 2 +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pxor | count 1 +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 1 +; 64-bit stores here do not use MMX. @M1 = external global <1 x i64> @M2 = external global <2 x i32> diff --git a/test/CodeGen/X86/visibility.ll b/test/CodeGen/X86/visibility.ll new file mode 100644 index 000000000000..a8d287083a80 --- /dev/null +++ b/test/CodeGen/X86/visibility.ll @@ -0,0 +1,11 @@ +; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s + +define hidden void @foo() nounwind { +entry: + call void @bar() + ret void +} + +declare hidden void @bar() + +;CHECK: .hidden bar diff --git a/test/CodeGen/X86/vshift-1.ll b/test/CodeGen/X86/vshift-1.ll index ae845e0a33d1..49551562c5ae 100644 --- a/test/CodeGen/X86/vshift-1.ll +++ b/test/CodeGen/X86/vshift-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. diff --git a/test/CodeGen/X86/vshift-2.ll b/test/CodeGen/X86/vshift-2.ll index 36feb11603d8..9a9b419abea5 100644 --- a/test/CodeGen/X86/vshift-2.ll +++ b/test/CodeGen/X86/vshift-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. diff --git a/test/CodeGen/X86/vshift-3.ll b/test/CodeGen/X86/vshift-3.ll index 20d3f48a1a67..8e8a9aa04b27 100644 --- a/test/CodeGen/X86/vshift-3.ll +++ b/test/CodeGen/X86/vshift-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. diff --git a/test/CodeGen/X86/vshift-4.ll b/test/CodeGen/X86/vshift-4.ll index 9773cbed0ae3..8e24fda1835d 100644 --- a/test/CodeGen/X86/vshift-4.ll +++ b/test/CodeGen/X86/vshift-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same when using a shuffle splat. diff --git a/test/CodeGen/X86/vshift-5.ll b/test/CodeGen/X86/vshift-5.ll index a543f382b513..cb254aeb5735 100644 --- a/test/CodeGen/X86/vshift-5.ll +++ b/test/CodeGen/X86/vshift-5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; When loading the shift amount from memory, avoid generating the splat. diff --git a/test/CodeGen/X86/vsplit-and.ll b/test/CodeGen/X86/vsplit-and.ll index a247c6eb00d7..97dacfdf09e0 100644 --- a/test/CodeGen/X86/vsplit-and.ll +++ b/test/CodeGen/X86/vsplit-and.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 | FileCheck %s define void @t(<2 x i64>* %dst, <2 x i64> %src1, <2 x i64> %src2) nounwind readonly { diff --git a/test/CodeGen/X86/widen_arith-1.ll b/test/CodeGen/X86/widen_arith-1.ll index f8d06902c553..4b8016dc7132 100644 --- a/test/CodeGen/X86/widen_arith-1.ll +++ b/test/CodeGen/X86/widen_arith-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; Widen a v3i8 to v16i8 to use a vector add diff --git a/test/CodeGen/X86/widen_arith-2.ll b/test/CodeGen/X86/widen_arith-2.ll index fdecaa3f77ff..03b3fea01f6c 100644 --- a/test/CodeGen/X86/widen_arith-2.ll +++ b/test/CodeGen/X86/widen_arith-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: paddb ; CHECK: pand diff --git a/test/CodeGen/X86/widen_arith-3.ll b/test/CodeGen/X86/widen_arith-3.ll index 1f2c25068ca4..057492377a27 100644 --- a/test/CodeGen/X86/widen_arith-3.ll +++ b/test/CodeGen/X86/widen_arith-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 -post-RA-scheduler=true | FileCheck %s ; CHECK: paddw ; CHECK: pextrw ; CHECK: movd diff --git a/test/CodeGen/X86/widen_arith-4.ll b/test/CodeGen/X86/widen_arith-4.ll index f7506ae3e3cd..5931d639f19b 100644 --- a/test/CodeGen/X86/widen_arith-4.ll +++ b/test/CodeGen/X86/widen_arith-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s ; CHECK: psubw ; CHECK-NEXT: pmullw diff --git a/test/CodeGen/X86/widen_arith-5.ll b/test/CodeGen/X86/widen_arith-5.ll index bae5c54eea64..7f2eff09f473 100644 --- a/test/CodeGen/X86/widen_arith-5.ll +++ b/test/CodeGen/X86/widen_arith-5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s ; CHECK: movdqa ; CHECK: pmulld ; CHECK: psubd diff --git a/test/CodeGen/X86/widen_arith-6.ll b/test/CodeGen/X86/widen_arith-6.ll index 538123f10c25..b983d141ddf6 100644 --- a/test/CodeGen/X86/widen_arith-6.ll +++ b/test/CodeGen/X86/widen_arith-6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: mulps ; CHECK: addps diff --git a/test/CodeGen/X86/widen_cast-1.ll b/test/CodeGen/X86/widen_cast-1.ll index d4ab174ae9fb..1eace9e024e0 100644 --- a/test/CodeGen/X86/widen_cast-1.ll +++ b/test/CodeGen/X86/widen_cast-1.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -mattr=+sse42 < %s -disable-mmx | FileCheck %s +; RUN: llc -march=x86 -mattr=+sse42 < %s | FileCheck %s ; CHECK: paddw ; CHECK: pextrd ; CHECK: movd diff --git a/test/CodeGen/X86/widen_cast-2.ll b/test/CodeGen/X86/widen_cast-2.ll index 14e8f7562482..5c695ea00033 100644 --- a/test/CodeGen/X86/widen_cast-2.ll +++ b/test/CodeGen/X86/widen_cast-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: pextrd ; CHECK: pextrd ; CHECK: movd diff --git a/test/CodeGen/X86/widen_cast-3.ll b/test/CodeGen/X86/widen_cast-3.ll index 02674dd1459c..87486d96611b 100644 --- a/test/CodeGen/X86/widen_cast-3.ll +++ b/test/CodeGen/X86/widen_cast-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: paddd ; CHECK: pextrd ; CHECK: pextrd diff --git a/test/CodeGen/X86/widen_cast-4.ll b/test/CodeGen/X86/widen_cast-4.ll index 5f31e560f500..8e1adf58f869 100644 --- a/test/CodeGen/X86/widen_cast-4.ll +++ b/test/CodeGen/X86/widen_cast-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: sarb ; CHECK: sarb ; CHECK: sarb diff --git a/test/CodeGen/X86/widen_cast-5.ll b/test/CodeGen/X86/widen_cast-5.ll index d1d7fecbd275..136578df1e8e 100644 --- a/test/CodeGen/X86/widen_cast-5.ll +++ b/test/CodeGen/X86/widen_cast-5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: movl ; CHECK: movd diff --git a/test/CodeGen/X86/widen_cast-6.ll b/test/CodeGen/X86/widen_cast-6.ll index 08759bf5510c..39032347c018 100644 --- a/test/CodeGen/X86/widen_cast-6.ll +++ b/test/CodeGen/X86/widen_cast-6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse41 | FileCheck %s ; CHECK: movd ; Test bit convert that requires widening in the operand. diff --git a/test/CodeGen/X86/widen_conv-1.ll b/test/CodeGen/X86/widen_conv-1.ll index a2029dd2748d..f6810cda9e35 100644 --- a/test/CodeGen/X86/widen_conv-1.ll +++ b/test/CodeGen/X86/widen_conv-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: pshufd ; CHECK: paddd diff --git a/test/CodeGen/X86/widen_conv-2.ll b/test/CodeGen/X86/widen_conv-2.ll index b24a9b36673c..969cb512beb3 100644 --- a/test/CodeGen/X86/widen_conv-2.ll +++ b/test/CodeGen/X86/widen_conv-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: movswl ; CHECK: movswl diff --git a/test/CodeGen/X86/widen_conv-3.ll b/test/CodeGen/X86/widen_conv-3.ll index 1a40800de975..a25fae9e1bc8 100644 --- a/test/CodeGen/X86/widen_conv-3.ll +++ b/test/CodeGen/X86/widen_conv-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: cvtsi2ss ; sign to float v2i16 to v2f32 diff --git a/test/CodeGen/X86/widen_conv-4.ll b/test/CodeGen/X86/widen_conv-4.ll index e505b62a3dbf..80f3a492c494 100644 --- a/test/CodeGen/X86/widen_conv-4.ll +++ b/test/CodeGen/X86/widen_conv-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; CHECK: cvtsi2ss ; unsigned to float v7i16 to v7f32 diff --git a/test/CodeGen/X86/widen_extract-1.ll b/test/CodeGen/X86/widen_extract-1.ll index 308e6b859be6..4bcac58f2b6c 100644 --- a/test/CodeGen/X86/widen_extract-1.ll +++ b/test/CodeGen/X86/widen_extract-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s ; widen extract subvector define void @convert(<2 x double>* %dst.addr, <3 x double> %src) { diff --git a/test/CodeGen/X86/widen_load-1.ll b/test/CodeGen/X86/widen_load-1.ll index d397645f193f..639617f17774 100644 --- a/test/CodeGen/X86/widen_load-1.ll +++ b/test/CodeGen/X86/widen_load-1.ll @@ -1,4 +1,4 @@ -; RUN: llc %s -o - -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -disable-mmx | FileCheck %s +; RUN: llc %s -o - -march=x86-64 -mtriple=x86_64-unknown-linux-gnu | FileCheck %s ; PR4891 ; This load should be before the call, not after. diff --git a/test/CodeGen/X86/widen_load-2.ll b/test/CodeGen/X86/widen_load-2.ll index 551704c498fa..642206316c6b 100644 --- a/test/CodeGen/X86/widen_load-2.ll +++ b/test/CodeGen/X86/widen_load-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -o - -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -o - -march=x86-64 -mattr=+sse42 | FileCheck %s ; Test based on pr5626 to load/store ; diff --git a/test/CodeGen/X86/widen_select-1.ll b/test/CodeGen/X86/widen_select-1.ll deleted file mode 100644 index d9de892933e0..000000000000 --- a/test/CodeGen/X86/widen_select-1.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s -; CHECK: jne - -; widening select v6i32 and then a sub - -define void @select(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { -entry: - %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 - %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > - store <6 x i32> %val, <6 x i32>* %dst.addr - ret void -} diff --git a/test/CodeGen/X86/widen_shuffle-1.ll b/test/CodeGen/X86/widen_shuffle-1.ll index 463f522a11df..034c42c758be 100644 --- a/test/CodeGen/X86/widen_shuffle-1.ll +++ b/test/CodeGen/X86/widen_shuffle-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s ; widening shuffle v3float and then a add define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind { diff --git a/test/CodeGen/X86/win64_params.ll b/test/CodeGen/X86/win64_params.ll new file mode 100644 index 000000000000..f9d4bf9c3094 --- /dev/null +++ b/test/CodeGen/X86/win64_params.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s + +; Verify that the 5th and 6th parameters are coming from the correct location +; on the stack. +define i32 @f6(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize { +entry: +; CHECK: movl 48(%rsp), %eax +; CHECK: addl 40(%rsp), %eax + %add = add nsw i32 %p6, %p5 + ret i32 %add +} diff --git a/test/CodeGen/X86/win64_vararg.ll b/test/CodeGen/X86/win64_vararg.ll new file mode 100644 index 000000000000..a451318f6e8c --- /dev/null +++ b/test/CodeGen/X86/win64_vararg.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s + +; Verify that the var arg parameters which are passed in registers are stored +; in home stack slots allocated by the caller and that AP is correctly +; calculated. +define void @average_va(i32 %count, ...) nounwind { +entry: +; CHECK: pushq +; CHECK: movq %r9, 40(%rsp) +; CHECK: movq %r8, 32(%rsp) +; CHECK: movq %rdx, 24(%rsp) +; CHECK: leaq 24(%rsp), %rax + + %ap = alloca i8*, align 8 ; <i8**> [#uses=1] + %ap1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] + call void @llvm.va_start(i8* %ap1) + ret void +} + +declare void @llvm.va_start(i8*) nounwind diff --git a/test/CodeGen/X86/win_chkstk.ll b/test/CodeGen/X86/win_chkstk.ll index 27d3358d4ac1..82ce81d4ae70 100644 --- a/test/CodeGen/X86/win_chkstk.ll +++ b/test/CodeGen/X86/win_chkstk.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN_X32 +; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN_X64 ; RUN: llc < %s -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X32 ; RUN: llc < %s -mtriple=x86_64-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X64 ; RUN: llc < %s -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX @@ -12,10 +13,10 @@ ; Stack allocation >= 4096 bytes will require call to __chkstk in the Windows ABI. define i32 @main4k() nounwind { entry: -; WIN_X32: call __chkstk -; WIN_X64: call __chkstk -; MINGW_X32: call __alloca -; MINGW_X64: call _alloca +; WIN_X32: calll __chkstk +; WIN_X64: callq __chkstk +; MINGW_X32: calll __alloca +; MINGW_X64: callq __chkstk ; LINUX-NOT: call __chkstk %array4096 = alloca [4096 x i8], align 16 ; <[4096 x i8]*> [#uses=0] ret i32 0 @@ -26,15 +27,15 @@ entry: define i32 @main128() nounwind { entry: ; WIN_X32: # BB#0: -; WIN_X32-NOT: call __chkstk +; WIN_X32-NOT: calll __chkstk ; WIN_X32: ret ; WIN_X64: # BB#0: -; WIN_X64-NOT: call __chkstk +; WIN_X64-NOT: callq __chkstk ; WIN_X64: ret ; MINGW_X64: # BB#0: -; MINGW_X64-NOT: call _alloca +; MINGW_X64-NOT: callq _alloca ; MINGW_X64: ret ; LINUX: # BB#0: diff --git a/test/CodeGen/X86/x86-64-extend-shift.ll b/test/CodeGen/X86/x86-64-extend-shift.ll new file mode 100644 index 000000000000..6852785fd6af --- /dev/null +++ b/test/CodeGen/X86/x86-64-extend-shift.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; Formerly there were two shifts. + +define i64 @baz(i32 %A) nounwind { +; CHECK: shlq $49, %rax + %tmp1 = shl i32 %A, 17 + %tmp2 = zext i32 %tmp1 to i64 + %tmp3 = shl i64 %tmp2, 32 + ret i64 %tmp3 +} diff --git a/test/CodeGen/X86/x86_64-mul-by-const.ll b/test/CodeGen/X86/x86_64-mul-by-const.ll new file mode 100644 index 000000000000..df48a29156ca --- /dev/null +++ b/test/CodeGen/X86/x86_64-mul-by-const.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; Formerly there were two shifts. rdar://8771012. + +define i32 @f9188_mul365384439_shift27(i32 %A) nounwind { +; CHECK: imulq $365384439, +; CHECK: shrq $59, %rax + %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1] + ret i32 %tmp1 +} diff --git a/test/CodeGen/X86/zext-extract_subreg.ll b/test/CodeGen/X86/zext-extract_subreg.ll new file mode 100644 index 000000000000..e61e8805a2fd --- /dev/null +++ b/test/CodeGen/X86/zext-extract_subreg.ll @@ -0,0 +1,60 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s + +define void @t() nounwind ssp { +; CHECK: t: +entry: + br i1 undef, label %return, label %if.end.i + +if.end.i: ; preds = %entry + %tmp7.i = load i32* undef, align 4, !tbaa !0 + br i1 undef, label %return, label %if.end + +if.end: ; preds = %if.end.i +; CHECK: %if.end +; CHECK: movl (%{{.*}}), [[REG:%[a-z]+]] +; CHECK-NOT: movl [[REG]], [[REG]] +; CHECK-NEXT: xorb + %tmp138 = select i1 undef, i32 0, i32 %tmp7.i + %tmp867 = zext i32 %tmp138 to i64 + br label %while.cond + +while.cond: ; preds = %while.body, %if.end + %tmp869 = sub i64 %tmp867, 0 + %scale2.0 = trunc i64 %tmp869 to i32 + %cmp149 = icmp eq i32 %scale2.0, 0 + br i1 %cmp149, label %while.end, label %land.rhs + +land.rhs: ; preds = %while.cond + br i1 undef, label %while.body, label %while.end + +while.body: ; preds = %land.rhs + br label %while.cond + +while.end: ; preds = %land.rhs, %while.cond + br i1 undef, label %cond.false205, label %cond.true190 + +cond.true190: ; preds = %while.end + br i1 undef, label %cond.false242, label %cond.true225 + +cond.false205: ; preds = %while.end + unreachable + +cond.true225: ; preds = %cond.true190 + br i1 undef, label %cond.false280, label %cond.true271 + +cond.false242: ; preds = %cond.true190 + unreachable + +cond.true271: ; preds = %cond.true225 + unreachable + +cond.false280: ; preds = %cond.true225 + unreachable + +return: ; preds = %if.end.i, %entry + ret void +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/XCore/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/XCore/2010-04-07-DbgValueOtherTargets.ll index f24e1d1851b4..80cf3a6d678f 100644 --- a/test/CodeGen/XCore/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/XCore/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=xcore -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll b/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll new file mode 100644 index 000000000000..f8fe0d2136ff --- /dev/null +++ b/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -march=xcore +%struct.st = type <{ i8, i32, i8, i32, i8, i32 }> + +@x = external global %struct.st, align 4 + +define i32 @test_entry() nounwind { +entry: + %0 = load i32* getelementptr inbounds (%struct.st* @x, i32 0, i32 3), align 2 + ret i32 %0 +} diff --git a/test/CodeGen/XCore/ashr.ll b/test/CodeGen/XCore/ashr.ll index d99808fc4a2f..4514fdb8bf3b 100644 --- a/test/CodeGen/XCore/ashr.ll +++ b/test/CodeGen/XCore/ashr.ll @@ -50,9 +50,9 @@ define i32 @f3(i32 %a) { ret i32 %2 } ; CHECK: f3: -; CHECK-NEXT: ashr r1, r0, 32 +; CHECK-NEXT: ashr r0, r0, 32 +; CHECK-NEXT: bf r0 ; CHECK-NEXT: ldc r0, 10 -; CHECK-NEXT: bt r1 ; CHECK: ldc r0, 17 define i32 @f4(i32 %a) { @@ -61,9 +61,9 @@ define i32 @f4(i32 %a) { ret i32 %2 } ; CHECK: f4: -; CHECK-NEXT: ashr r1, r0, 32 +; CHECK-NEXT: ashr r0, r0, 32 +; CHECK-NEXT: bf r0 ; CHECK-NEXT: ldc r0, 17 -; CHECK-NEXT: bt r1 ; CHECK: ldc r0, 10 define i32 @f5(i32 %a) { diff --git a/test/CodeGen/XCore/globals.ll b/test/CodeGen/XCore/globals.ll index 342e5932dd10..7487561dec96 100644 --- a/test/CodeGen/XCore/globals.ll +++ b/test/CodeGen/XCore/globals.ll @@ -67,7 +67,7 @@ entry: ; CHECK: .section .dp.bss,"awd",@nobits ; CHECK: G2: -@G3 = constant i32 9401 +@G3 = unnamed_addr constant i32 9401 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4 ; CHECK: G3: @@ -75,7 +75,7 @@ entry: ; CHECK: .section .dp.data,"awd",@progbits ; CHECK: G4: -@G5 = constant i32* @G1 +@G5 = unnamed_addr constant i32* @G1 ; CHECK: .section .cp.rodata,"ac",@progbits ; CHECK: G5: @@ -83,7 +83,7 @@ entry: ; CHECK: .section .dp.data,"awd",@progbits ; CHECK: G6: -@G7 = constant i32* @G8 +@G7 = unnamed_addr constant i32* @G8 ; CHECK: .section .cp.rodata,"ac",@progbits ; CHECK: G7: diff --git a/test/CodeGen/XCore/resources.ll b/test/CodeGen/XCore/resources.ll new file mode 100644 index 000000000000..3114bdcd1777 --- /dev/null +++ b/test/CodeGen/XCore/resources.ll @@ -0,0 +1,111 @@ +; RUN: llc -march=xcore < %s | FileCheck %s + +declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type) +declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r) +declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value) + +define i8 addrspace(1)* @getr() { +; CHECK: getr: +; CHECK: getr r0, 5 + %result = call i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 5) + ret i8 addrspace(1)* %result +} + +define void @freer(i8 addrspace(1)* %r) { +; CHECK: freer: +; CHECK: freer res[r0] + call void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r) + ret void +} + +define i32 @in(i8 addrspace(1)* %r) { +; CHECK: in: +; CHECK: in r0, res[r0] + %result = call i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r) + ret i32 %result +} + +define i32 @int(i8 addrspace(1)* %r) { +; CHECK: int: +; CHECK: int r0, res[r0] + %result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r) + ret i32 %result +} + +define i32 @inct(i8 addrspace(1)* %r) { +; CHECK: inct: +; CHECK: inct r0, res[r0] + %result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r) + ret i32 %result +} + +define void @out(i8 addrspace(1)* %r, i32 %value) { +; CHECK: out: +; CHECK: out res[r0], r1 + call void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @outt(i8 addrspace(1)* %r, i32 %value) { +; CHECK: outt: +; CHECK: outt res[r0], r1 + call void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @outct(i8 addrspace(1)* %r, i32 %value) { +; CHECK: outct: +; CHECK: outct res[r0], r1 + call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @outcti(i8 addrspace(1)* %r) { +; CHECK: outcti: +; CHECK: outct res[r0], 11 + call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 11) + ret void +} + +define void @chkct(i8 addrspace(1)* %r, i32 %value) { +; CHECK: chkct: +; CHECK: chkct res[r0], r1 + call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @chkcti(i8 addrspace(1)* %r) { +; CHECK: chkcti: +; CHECK: chkct res[r0], 11 + call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 11) + ret void +} + +define void @setd(i8 addrspace(1)* %r, i32 %value) { +; CHECK: setd: +; CHECK: setd res[r0], r1 + call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @setc(i8 addrspace(1)* %r, i32 %value) { +; CHECK: setc: +; CHECK: setc res[r0], r1 + call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @setci(i8 addrspace(1)* %r) { +; CHECK: setci: +; CHECK: setc res[r0], 2 + call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2) + ret void +} diff --git a/test/CodeGen/XCore/trampoline.ll b/test/CodeGen/XCore/trampoline.ll new file mode 100644 index 000000000000..18cc45edbf9f --- /dev/null +++ b/test/CodeGen/XCore/trampoline.ll @@ -0,0 +1,37 @@ +; RUN: llc < %s -march=xcore | FileCheck %s + +%struct.FRAME.f = type { i32, i32 ()* } + +define void @f() nounwind { +entry: +; CHECK: f: +; CHECK ldap r11, g.1101 +; CHECK stw r11, sp[7] + %TRAMP.23 = alloca [20 x i8], align 2 + %FRAME.0 = alloca %struct.FRAME.f, align 4 + %TRAMP.23.sub = getelementptr inbounds [20 x i8]* %TRAMP.23, i32 0, i32 0 + %FRAME.02 = bitcast %struct.FRAME.f* %FRAME.0 to i8* + %tramp = call i8* @llvm.init.trampoline(i8* %TRAMP.23.sub, i8* bitcast (i32 (%struct.FRAME.f*)* @g.1101 to i8*), i8* %FRAME.02) + %0 = getelementptr inbounds %struct.FRAME.f* %FRAME.0, i32 0, i32 1 + %1 = bitcast i8* %tramp to i32 ()* + store i32 ()* %1, i32 ()** %0, align 4 + %2 = getelementptr inbounds %struct.FRAME.f* %FRAME.0, i32 0, i32 0 + store i32 1, i32* %2, align 4 + call void @h(i32 ()* %1) nounwind + ret void +} + +define internal i32 @g.1101(%struct.FRAME.f* nocapture nest %CHAIN.1) nounwind readonly { +entry: +; CHECK: g.1101: +; CHECK: ldw r11, sp[0] +; CHECK-NEXT: ldw r0, r11[0] +; CHECK-NEXT: retsp 0 + %0 = getelementptr inbounds %struct.FRAME.f* %CHAIN.1, i32 0, i32 0 + %1 = load i32* %0, align 4 + ret i32 %1 +} + +declare i8* @llvm.init.trampoline(i8*, i8*, i8*) nounwind + +declare void @h(i32 ()*) diff --git a/test/DebugInfo/2009-10-16-Scope.ll b/test/DebugInfo/2009-10-16-Scope.ll index 9f9fa65d5b79..037294fc63a4 100644 --- a/test/DebugInfo/2009-10-16-Scope.ll +++ b/test/DebugInfo/2009-10-16-Scope.ll @@ -1,4 +1,5 @@ -; RUN: llc %s -O0 -o /dev/null +; RUN: llc %s -O0 -o /dev/null -mtriple=x86_64-apple-darwin +; RUN: llc %s -O0 -o /dev/null -mtriple=arm-apple-darwin ; PR 5197 ; There is not any llvm instruction assocated with !5. The code generator ; should be able to handle this. diff --git a/test/DebugInfo/2010-05-10-MultipleCU.ll b/test/DebugInfo/2010-05-10-MultipleCU.ll index 3b24c0cead35..721b70839fef 100644 --- a/test/DebugInfo/2010-05-10-MultipleCU.ll +++ b/test/DebugInfo/2010-05-10-MultipleCU.ll @@ -1,7 +1,21 @@ -; RUN: llc -O0 -asm-verbose %s -o %t -; RUN: grep DW_TAG_compile_unit %t | count 3 +; RUN: llc -O0 -asm-verbose < %s | FileCheck %s ; One for a.c, second one for b.c and third one for abbrev. +; CHECK: info_begin +; CHECK: DW_TAG_compile_unit +; CHECK-NOT: DW_TAG_compile_unit +; CHECK: info_end + +; CHECK: info_begin +; CHECK: DW_TAG_compile_unit +; CHECK-NOT: DW_TAG_compile_unit +; CHECK: info_end + +; CHECK: abbrev_begin +; CHECK: DW_TAG_compile_unit +; CHECK-NOT: DW_TAG_compile_unit +; CHECK: abbrev_end + define i32 @foo() nounwind readnone ssp { return: ret i32 42, !dbg !0 diff --git a/test/DebugInfo/2010-08-04-StackVariable.ll b/test/DebugInfo/2010-08-04-StackVariable.ll index 61cd20bb1ab3..c35c3d36d261 100644 --- a/test/DebugInfo/2010-08-04-StackVariable.ll +++ b/test/DebugInfo/2010-08-04-StackVariable.ll @@ -1,4 +1,5 @@ -; RUN: llc -O0 < %s | grep DW_OP_fbreg +; RUN: llc -O0 -mtriple=arm-apple-darwin < %s | grep DW_OP_fbreg +; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_fbreg ; Use DW_OP_fbreg in variable's location expression if the variable is in a stack slot. %struct.SVal = type { i8*, i32 } diff --git a/test/DebugInfo/2010-10-01-crash.ll b/test/DebugInfo/2010-10-01-crash.ll new file mode 100644 index 000000000000..e61f63f40d8f --- /dev/null +++ b/test/DebugInfo/2010-10-01-crash.ll @@ -0,0 +1,21 @@ +; RUN: llc -O0 %s -o /dev/null +; PR 8235 + +define void @CGRectStandardize(i32* sret %agg.result, i32* byval %rect) nounwind ssp { +entry: + call void @llvm.dbg.declare(metadata !{i32* %rect}, metadata !23), !dbg !24 + ret void +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind + + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"CGRectStandardize", metadata !"CGRectStandardize", metadata !"CGRectStandardize", metadata !1, i32 54, null, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, void (i32*, i32*)* @CGRectStandardize} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"GSFusedSilica.m", metadata !"/Volumes/Data/Users/sabre/Desktop", metadata !2} +!2 = metadata !{i32 589841, i32 0, i32 16, metadata !"GSFusedSilica.m", metadata !"/Volumes/Data/Users/sabre/Desktop", metadata !"clang version 2.9 (trunk 115292)", i1 true, i1 false, metadata !"", i32 1} ; [ DW_TAG_compile_unit ] +!5 = metadata !{i32 589846, metadata !1, metadata !"CGRect", metadata !1, i32 49, i64 0, i64 0, i64 0, i32 0, null} +!23 = metadata !{i32 590081, metadata !0, metadata !"rect", metadata !1, i32 53, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!24 = metadata !{i32 53, i32 33, metadata !0, null} + diff --git a/test/ExecutionEngine/2002-12-16-ArgTest.ll b/test/ExecutionEngine/2002-12-16-ArgTest.ll index 455196923e84..eba58ccca423 100644 --- a/test/ExecutionEngine/2002-12-16-ArgTest.ll +++ b/test/ExecutionEngine/2002-12-16-ArgTest.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null @.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1] diff --git a/test/ExecutionEngine/2003-01-04-ArgumentBug.ll b/test/ExecutionEngine/2003-01-04-ArgumentBug.ll index 5d37e9664162..4cfd1ebb69e2 100644 --- a/test/ExecutionEngine/2003-01-04-ArgumentBug.ll +++ b/test/ExecutionEngine/2003-01-04-ArgumentBug.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @foo(i32 %X, i32 %Y, double %A) { %cond212 = fcmp une double %A, 1.000000e+00 ; <i1> [#uses=1] diff --git a/test/ExecutionEngine/2003-01-04-LoopTest.ll b/test/ExecutionEngine/2003-01-04-LoopTest.ll index 653cf79a52a3..668c8fd7ad0c 100644 --- a/test/ExecutionEngine/2003-01-04-LoopTest.ll +++ b/test/ExecutionEngine/2003-01-04-LoopTest.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { call i32 @mylog( i32 4 ) ; <i32>:1 [#uses=0] diff --git a/test/ExecutionEngine/2003-01-04-PhiTest.ll b/test/ExecutionEngine/2003-01-04-PhiTest.ll index b5c9d8132432..2bc70d749f50 100644 --- a/test/ExecutionEngine/2003-01-04-PhiTest.ll +++ b/test/ExecutionEngine/2003-01-04-PhiTest.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { ; <label>:0 diff --git a/test/ExecutionEngine/2003-01-09-SARTest.ll b/test/ExecutionEngine/2003-01-09-SARTest.ll index 81478972d57f..560cd3eae9a2 100644 --- a/test/ExecutionEngine/2003-01-09-SARTest.ll +++ b/test/ExecutionEngine/2003-01-09-SARTest.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; We were accidentally inverting the signedness of right shifts. Whoops. diff --git a/test/ExecutionEngine/2003-01-10-FUCOM.ll b/test/ExecutionEngine/2003-01-10-FUCOM.ll index d996fa53d9c5..8512f634323f 100644 --- a/test/ExecutionEngine/2003-01-10-FUCOM.ll +++ b/test/ExecutionEngine/2003-01-10-FUCOM.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { %X = fadd double 0.000000e+00, 1.000000e+00 ; <double> [#uses=1] diff --git a/test/ExecutionEngine/2003-01-15-AlignmentTest.ll b/test/ExecutionEngine/2003-01-15-AlignmentTest.ll index a55d74df0d44..9df21c1ccd6d 100644 --- a/test/ExecutionEngine/2003-01-15-AlignmentTest.ll +++ b/test/ExecutionEngine/2003-01-15-AlignmentTest.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @bar(i8* %X) { ; pointer should be 4 byte aligned! diff --git a/test/ExecutionEngine/2003-05-06-LivenessClobber.ll b/test/ExecutionEngine/2003-05-06-LivenessClobber.ll index 57fe95b2d915..e670d11d4a15 100644 --- a/test/ExecutionEngine/2003-05-06-LivenessClobber.ll +++ b/test/ExecutionEngine/2003-05-06-LivenessClobber.ll @@ -1,6 +1,6 @@ -; This testcase shoudl return with an exit code of 1. +; This testcase should return with an exit code of 1. ; -; RUN: llvm-as < %s | not lli +; RUN: not lli %s @test = global i64 0 ; <i64*> [#uses=1] diff --git a/test/ExecutionEngine/2003-05-07-ArgumentTest.ll b/test/ExecutionEngine/2003-05-07-ArgumentTest.ll index fa15d7110c32..baf42e5e83d8 100644 --- a/test/ExecutionEngine/2003-05-07-ArgumentTest.ll +++ b/test/ExecutionEngine/2003-05-07-ArgumentTest.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | lli - test +; RUN: lli %s test declare i32 @puts(i8*) diff --git a/test/ExecutionEngine/2003-05-11-PHIRegAllocBug.ll b/test/ExecutionEngine/2003-05-11-PHIRegAllocBug.ll index 5a13b21b5f49..bcdb11468dca 100644 --- a/test/ExecutionEngine/2003-05-11-PHIRegAllocBug.ll +++ b/test/ExecutionEngine/2003-05-11-PHIRegAllocBug.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null target datalayout = "e-p:32:32" diff --git a/test/ExecutionEngine/2003-06-04-bzip2-bug.ll b/test/ExecutionEngine/2003-06-04-bzip2-bug.ll index 6e2da70f736b..37dae861c983 100644 --- a/test/ExecutionEngine/2003-06-04-bzip2-bug.ll +++ b/test/ExecutionEngine/2003-06-04-bzip2-bug.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; Testcase distilled from 256.bzip2. diff --git a/test/ExecutionEngine/2003-06-05-PHIBug.ll b/test/ExecutionEngine/2003-06-05-PHIBug.ll index 50b48da49445..f7bd8b77244f 100644 --- a/test/ExecutionEngine/2003-06-05-PHIBug.ll +++ b/test/ExecutionEngine/2003-06-05-PHIBug.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; Testcase distilled from 256.bzip2. diff --git a/test/ExecutionEngine/2003-08-15-AllocaAssertion.ll b/test/ExecutionEngine/2003-08-15-AllocaAssertion.ll index 6c90b33cb431..5970628eaedf 100644 --- a/test/ExecutionEngine/2003-08-15-AllocaAssertion.ll +++ b/test/ExecutionEngine/2003-08-15-AllocaAssertion.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; This testcase failed to work because two variable sized allocas confused the ; local register allocator. diff --git a/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll b/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll index 3a4a4e439fb8..9c8ec1dd9ce5 100644 --- a/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll +++ b/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; ; Regression Test: EnvironmentTest.ll diff --git a/test/ExecutionEngine/2003-08-23-RegisterAllocatePhysReg.ll b/test/ExecutionEngine/2003-08-23-RegisterAllocatePhysReg.ll index b165a1cf30e3..152482d436d1 100644 --- a/test/ExecutionEngine/2003-08-23-RegisterAllocatePhysReg.ll +++ b/test/ExecutionEngine/2003-08-23-RegisterAllocatePhysReg.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; This testcase exposes a bug in the local register allocator where it runs out ; of registers (due to too many overlapping live ranges), but then attempts to diff --git a/test/ExecutionEngine/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll b/test/ExecutionEngine/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll index aa9d7e7d3632..97e84cd4092c 100644 --- a/test/ExecutionEngine/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll +++ b/test/ExecutionEngine/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null @A = global i32 0 ; <i32*> [#uses=1] diff --git a/test/ExecutionEngine/2005-12-02-TailCallBug.ll b/test/ExecutionEngine/2005-12-02-TailCallBug.ll index 59a40ae81403..874ce39e662f 100644 --- a/test/ExecutionEngine/2005-12-02-TailCallBug.ll +++ b/test/ExecutionEngine/2005-12-02-TailCallBug.ll @@ -1,5 +1,6 @@ ; PR672 -; RUN: llvm-as < %s | lli +; RUN: lli %s +; XFAIL: arm define i32 @main() { %f = bitcast i32 (i32, i32*, i32)* @check_tail to i32* ; <i32*> [#uses=1] diff --git a/test/ExecutionEngine/2007-12-10-APIntLoadStore.ll b/test/ExecutionEngine/2007-12-10-APIntLoadStore.ll index f347f5d35724..c0dc4cf61abb 100644 --- a/test/ExecutionEngine/2007-12-10-APIntLoadStore.ll +++ b/test/ExecutionEngine/2007-12-10-APIntLoadStore.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as %s -o - | lli -force-interpreter +; RUN: lli -force-interpreter %s ; PR1836 define i32 @main() { diff --git a/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll b/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll index e7e434f271c6..07cc659cd040 100644 --- a/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll +++ b/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli -force-interpreter=true %t.bc | grep 1 +; RUN: lli -force-interpreter=true %s | grep 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" diff --git a/test/ExecutionEngine/2010-01-15-UndefValue.ll b/test/ExecutionEngine/2010-01-15-UndefValue.ll index 33ca63a02050..6e7a392125e1 100644 --- a/test/ExecutionEngine/2010-01-15-UndefValue.ll +++ b/test/ExecutionEngine/2010-01-15-UndefValue.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli -force-interpreter=true %t.bc +; RUN: lli -force-interpreter=true %s define i32 @main() { %a = add i32 0, undef diff --git a/test/ExecutionEngine/fpbitcast.ll b/test/ExecutionEngine/fpbitcast.ll index 34ca129ead6f..47cbb02db180 100644 --- a/test/ExecutionEngine/fpbitcast.ll +++ b/test/ExecutionEngine/fpbitcast.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s > %t.bc -; RUN: lli -force-interpreter=true %t.bc | grep 40091eb8 +; RUN: lli -force-interpreter=true %s | grep 40091eb8 ; define i32 @test(double %x) { entry: diff --git a/test/ExecutionEngine/hello.ll b/test/ExecutionEngine/hello.ll index fad36ed58361..0b75c10f354b 100644 --- a/test/ExecutionEngine/hello.ll +++ b/test/ExecutionEngine/hello.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null @.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1] diff --git a/test/ExecutionEngine/hello2.ll b/test/ExecutionEngine/hello2.ll index 7ca0d8827d54..9f060be1c342 100644 --- a/test/ExecutionEngine/hello2.ll +++ b/test/ExecutionEngine/hello2.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null @X = global i32 7 ; <i32*> [#uses=0] @msg = internal global [13 x i8] c"Hello World\0A\00" ; <[13 x i8]*> [#uses=1] diff --git a/test/ExecutionEngine/simplesttest.ll b/test/ExecutionEngine/simplesttest.ll index 5d9cf767bcb3..ad38485d6e02 100644 --- a/test/ExecutionEngine/simplesttest.ll +++ b/test/ExecutionEngine/simplesttest.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { ret i32 0 diff --git a/test/ExecutionEngine/simpletest.ll b/test/ExecutionEngine/simpletest.ll index 53fb79c2c768..68eb7580b4c1 100644 --- a/test/ExecutionEngine/simpletest.ll +++ b/test/ExecutionEngine/simpletest.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @bar() { ret i32 0 diff --git a/test/ExecutionEngine/stubs.ll b/test/ExecutionEngine/stubs.ll index 525d135ff45c..bd9f69adb833 100644 --- a/test/ExecutionEngine/stubs.ll +++ b/test/ExecutionEngine/stubs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | lli -disable-lazy-compilation=false +; RUN: lli -disable-lazy-compilation=false %s define i32 @main() nounwind { entry: diff --git a/test/ExecutionEngine/test-arith.ll b/test/ExecutionEngine/test-arith.ll index 8c51e6b2e224..354ecd24bc83 100644 --- a/test/ExecutionEngine/test-arith.ll +++ b/test/ExecutionEngine/test-arith.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { %A = add i8 0, 12 ; <i8> [#uses=1] diff --git a/test/ExecutionEngine/test-branch.ll b/test/ExecutionEngine/test-branch.ll index dd8db5465f0b..7d4fd5605922 100644 --- a/test/ExecutionEngine/test-branch.ll +++ b/test/ExecutionEngine/test-branch.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; test unconditional branch define i32 @main() { diff --git a/test/ExecutionEngine/test-call.ll b/test/ExecutionEngine/test-call.ll index 4464ebd39bff..c4131a20f795 100644 --- a/test/ExecutionEngine/test-call.ll +++ b/test/ExecutionEngine/test-call.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null +; XFAIL: arm declare void @exit(i32) diff --git a/test/ExecutionEngine/test-cast.ll b/test/ExecutionEngine/test-cast.ll index 82d4949782a8..f41448cc60aa 100644 --- a/test/ExecutionEngine/test-cast.ll +++ b/test/ExecutionEngine/test-cast.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @foo() { ret i32 0 diff --git a/test/ExecutionEngine/test-constantexpr.ll b/test/ExecutionEngine/test-constantexpr.ll index cd5c635331d3..d6d90e3e1982 100644 --- a/test/ExecutionEngine/test-constantexpr.ll +++ b/test/ExecutionEngine/test-constantexpr.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; This tests to make sure that we can evaluate weird constant expressions diff --git a/test/ExecutionEngine/test-fp.ll b/test/ExecutionEngine/test-fp.ll index 4ebcf6f7aa7c..f653660fb832 100644 --- a/test/ExecutionEngine/test-fp.ll +++ b/test/ExecutionEngine/test-fp.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define double @test(double* %DP, double %Arg) { %D = load double* %DP ; <double> [#uses=1] diff --git a/test/ExecutionEngine/test-loadstore.ll b/test/ExecutionEngine/test-loadstore.ll index ba0f0baf8d6d..53155e8ac90a 100644 --- a/test/ExecutionEngine/test-loadstore.ll +++ b/test/ExecutionEngine/test-loadstore.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define void @test(i8* %P, i16* %P.upgrd.1, i32* %P.upgrd.2, i64* %P.upgrd.3) { %V = load i8* %P ; <i8> [#uses=1] diff --git a/test/ExecutionEngine/test-logical.ll b/test/ExecutionEngine/test-logical.ll index e560e52d568d..710763a30bd8 100644 --- a/test/ExecutionEngine/test-logical.ll +++ b/test/ExecutionEngine/test-logical.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { %A = and i8 4, 8 ; <i8> [#uses=2] diff --git a/test/ExecutionEngine/test-loop.ll b/test/ExecutionEngine/test-loop.ll index 7cd69e2943bc..f0e6f7a6f9c1 100644 --- a/test/ExecutionEngine/test-loop.ll +++ b/test/ExecutionEngine/test-loop.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { ; <label>:0 diff --git a/test/ExecutionEngine/test-malloc.ll b/test/ExecutionEngine/test-malloc.ll index 8f79d974edb5..b3400df44092 100644 --- a/test/ExecutionEngine/test-malloc.ll +++ b/test/ExecutionEngine/test-malloc.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { %X = malloc i32 ; <i32*> [#uses=1] diff --git a/test/ExecutionEngine/test-phi.ll b/test/ExecutionEngine/test-phi.ll index f1aaefa50585..c5848a8b5cce 100644 --- a/test/ExecutionEngine/test-phi.ll +++ b/test/ExecutionEngine/test-phi.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; test phi node @Y = global i32 6 ; <i32*> [#uses=1] diff --git a/test/ExecutionEngine/test-ret.ll b/test/ExecutionEngine/test-ret.ll index eae91f553752..beec39960751 100644 --- a/test/ExecutionEngine/test-ret.ll +++ b/test/ExecutionEngine/test-ret.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null ; test return instructions define void @test1() { diff --git a/test/ExecutionEngine/test-setcond-fp.ll b/test/ExecutionEngine/test-setcond-fp.ll index 4264e2c593fc..d1d6d05b3352 100644 --- a/test/ExecutionEngine/test-setcond-fp.ll +++ b/test/ExecutionEngine/test-setcond-fp.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { diff --git a/test/ExecutionEngine/test-setcond-int.ll b/test/ExecutionEngine/test-setcond-int.ll index 772f4fa70a4b..f59d325a5b59 100644 --- a/test/ExecutionEngine/test-setcond-int.ll +++ b/test/ExecutionEngine/test-setcond-int.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { %int1 = add i32 0, 0 ; <i32> [#uses=6] diff --git a/test/ExecutionEngine/test-shift.ll b/test/ExecutionEngine/test-shift.ll index 2791b8534a58..d0fb90a42750 100644 --- a/test/ExecutionEngine/test-shift.ll +++ b/test/ExecutionEngine/test-shift.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: lli %t.bc > /dev/null +; RUN: lli %s > /dev/null define i32 @main() { %shamt = add i8 0, 1 ; <i8> [#uses=8] diff --git a/test/Feature/load_module.ll b/test/Feature/load_module.ll index e2e222f4edcf..05f6c238134f 100644 --- a/test/Feature/load_module.ll +++ b/test/Feature/load_module.ll @@ -1,6 +1,8 @@ ; PR1318 -; RUN: opt < %s -load=%llvmlibsdir/LLVMHello%shlibext -hello \ +; RUN: opt < %s -load=%llvmshlibdir/LLVMHello%shlibext -hello \ ; RUN: -disable-output |& grep Hello +; REQUIRES: loadable_module +; FIXME: On Cygming, it might fail without building LLVMHello manually. @junk = global i32 0 diff --git a/test/FrontendAda/Support/real_cst.ads b/test/FrontendAda/Support/real_cst.ads new file mode 100644 index 000000000000..54a34bc4056f --- /dev/null +++ b/test/FrontendAda/Support/real_cst.ads @@ -0,0 +1,4 @@ +with Ada.Streams; +package Real_Cst is + procedure Write (Stream : access Ada.Streams.Root_Stream_Type'Class); +end; diff --git a/test/FrontendAda/array_constructor.adb b/test/FrontendAda/array_constructor.adb index de64b45a1e3e..13517c7565a5 100644 --- a/test/FrontendAda/array_constructor.adb +++ b/test/FrontendAda/array_constructor.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Constructor is A : array (Integer range <>) of Boolean := (True, False); begin diff --git a/test/FrontendAda/array_range_ref.adb b/test/FrontendAda/array_range_ref.adb index ae9bdc6cfcdf..037c5aa8b6f0 100644 --- a/test/FrontendAda/array_range_ref.adb +++ b/test/FrontendAda/array_range_ref.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Range_Ref is A : String (1 .. 3); B : String := A (A'RANGE)(1 .. 3); diff --git a/test/FrontendAda/array_ref.adb b/test/FrontendAda/array_ref.adb index 9577e21ad70f..2bf4b7988d6d 100644 --- a/test/FrontendAda/array_ref.adb +++ b/test/FrontendAda/array_ref.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Ref is type A is array (Natural range <>, Natural range <>) of Boolean; type A_Access is access A; diff --git a/test/FrontendAda/array_size.adb b/test/FrontendAda/array_size.adb index 2f07d0639082..c73616c98079 100644 --- a/test/FrontendAda/array_size.adb +++ b/test/FrontendAda/array_size.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Array_Size is subtype S is String (1 .. 2); type R is record diff --git a/test/FrontendAda/asm.adb b/test/FrontendAda/asm.adb index 575617c08788..844885e67152 100644 --- a/test/FrontendAda/asm.adb +++ b/test/FrontendAda/asm.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with System.Machine_Code; procedure Asm is begin diff --git a/test/FrontendAda/debug_var_size.ads b/test/FrontendAda/debug_var_size.ads index ea966fbae0fe..e8863cbddf94 100644 --- a/test/FrontendAda/debug_var_size.ads +++ b/test/FrontendAda/debug_var_size.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c -g %s +-- RUN: %llvmgcc -S -g %s package Debug_Var_Size is subtype Length_Type is Positive range 1 .. 64; type T (Length : Length_Type := 1) is record diff --git a/test/FrontendAda/element_copy.adb b/test/FrontendAda/element_copy.adb index bffcb973265b..29274fa744ae 100644 --- a/test/FrontendAda/element_copy.adb +++ b/test/FrontendAda/element_copy.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -S -O2 %s -I%p/Support -o - | grep 6899714 +-- RUN: %llvmgcc -S -O2 %s -I%p/Support -o - | grep 105 | count 2 package body Element_Copy is function F return VariableSizedField is X : VariableSizedField; diff --git a/test/FrontendAda/emit_var.ads b/test/FrontendAda/emit_var.ads index 35d45448cb6d..47e2538691ac 100644 --- a/test/FrontendAda/emit_var.ads +++ b/test/FrontendAda/emit_var.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with Ada.Finalization; package Emit_Var is type Search_Type is new Ada.Finalization.Controlled with null record; diff --git a/test/FrontendAda/fat_fields.adb b/test/FrontendAda/fat_fields.adb index 510105f6840f..443a9b679c55 100644 --- a/test/FrontendAda/fat_fields.adb +++ b/test/FrontendAda/fat_fields.adb @@ -1,5 +1,5 @@ --- RUN: %llvmgcc -c %s -I%p/Support --- RUN: %llvmgcc -c %s -I%p/Support -O2 +-- RUN: %llvmgcc -S %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support -O2 package body Fat_Fields is procedure Proc is begin diff --git a/test/FrontendAda/field_order.ads b/test/FrontendAda/field_order.ads index b49185d6dd80..9b2b37c20db0 100644 --- a/test/FrontendAda/field_order.ads +++ b/test/FrontendAda/field_order.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Field_Order is type Tagged_Type is abstract tagged null record; type With_Discriminant (L : Positive) is new Tagged_Type with record diff --git a/test/FrontendAda/global_constant.adb b/test/FrontendAda/global_constant.adb index ce9f406dba58..330f97b5d0e0 100644 --- a/test/FrontendAda/global_constant.adb +++ b/test/FrontendAda/global_constant.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Global_Constant is begin raise An_Error; diff --git a/test/FrontendAda/init_size.ads b/test/FrontendAda/init_size.ads index 1d76ba24f341..f423682bec72 100644 --- a/test/FrontendAda/init_size.ads +++ b/test/FrontendAda/init_size.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Init_Size is type T (B : Boolean := False) is record case B is diff --git a/test/FrontendAda/negative_field_offset.adb b/test/FrontendAda/negative_field_offset.adb index f8b85108504d..ec8184dde47b 100644 --- a/test/FrontendAda/negative_field_offset.adb +++ b/test/FrontendAda/negative_field_offset.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s with System; procedure Negative_Field_Offset (N : Integer) is type String_Pointer is access String; diff --git a/test/FrontendAda/non_bitfield.ads b/test/FrontendAda/non_bitfield.ads index 8f5845adb431..8a49d46f6b42 100644 --- a/test/FrontendAda/non_bitfield.ads +++ b/test/FrontendAda/non_bitfield.ads @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s package Non_Bitfield is type SP is access String; type E is (A, B, C); diff --git a/test/FrontendAda/non_lvalue.adb b/test/FrontendAda/non_lvalue.adb index 157f3ddd287f..71e7e102d05b 100644 --- a/test/FrontendAda/non_lvalue.adb +++ b/test/FrontendAda/non_lvalue.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Non_LValue is function A (Y : U) return String is begin diff --git a/test/FrontendAda/placeholder.adb b/test/FrontendAda/placeholder.adb index f33c9a5ab89d..88908263f871 100644 --- a/test/FrontendAda/placeholder.adb +++ b/test/FrontendAda/placeholder.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure Placeholder is subtype Bounded is Integer range 1 .. 5; type Vector is array (Bounded range <>) of Integer; diff --git a/test/FrontendAda/real_cst.adb b/test/FrontendAda/real_cst.adb new file mode 100644 index 000000000000..c9708301d62f --- /dev/null +++ b/test/FrontendAda/real_cst.adb @@ -0,0 +1,8 @@ +-- RUN: %llvmgcc -S -O2 -gnatn %s +package body Real_Cst is + Cst : constant Float := 0.0; + procedure Write (Stream : access Ada.Streams.Root_Stream_Type'Class) is + begin + Float'Write (Stream, Cst); + end; +end; diff --git a/test/FrontendAda/switch.adb b/test/FrontendAda/switch.adb index f214bca2ec42..0c83a2e6420e 100644 --- a/test/FrontendAda/switch.adb +++ b/test/FrontendAda/switch.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s function Switch (N : Integer) return Integer is begin case N is diff --git a/test/FrontendAda/unc_constructor.adb b/test/FrontendAda/unc_constructor.adb index bc3002c6a95b..ee10de6c811d 100644 --- a/test/FrontendAda/unc_constructor.adb +++ b/test/FrontendAda/unc_constructor.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Unc_Constructor is procedure P (X : A) is begin diff --git a/test/FrontendAda/var_offset.adb b/test/FrontendAda/var_offset.adb index 09f1c155a061..1d3ca98fa49d 100644 --- a/test/FrontendAda/var_offset.adb +++ b/test/FrontendAda/var_offset.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Var_Offset is function F (X : T) return Character is begin diff --git a/test/FrontendAda/var_size.adb b/test/FrontendAda/var_size.adb index b3db9a36fe1b..291f91d4eebd 100644 --- a/test/FrontendAda/var_size.adb +++ b/test/FrontendAda/var_size.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s -I%p/Support +-- RUN: %llvmgcc -S %s -I%p/Support package body Var_Size is function A (X : T) return String is begin diff --git a/test/FrontendAda/vce.adb b/test/FrontendAda/vce.adb index f24045cbee3f..85cdca066a29 100644 --- a/test/FrontendAda/vce.adb +++ b/test/FrontendAda/vce.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure VCE is S : String (1 .. 2); B : Character := 'B'; diff --git a/test/FrontendAda/vce_lv.adb b/test/FrontendAda/vce_lv.adb index 4ca4d5c8b542..d1b9e0824f17 100644 --- a/test/FrontendAda/vce_lv.adb +++ b/test/FrontendAda/vce_lv.adb @@ -1,4 +1,4 @@ --- RUN: %llvmgcc -c %s +-- RUN: %llvmgcc -S %s procedure VCE_LV is type P is access String ; type T is new P (5 .. 7); diff --git a/test/FrontendC++/2003-08-20-ExceptionFail.cpp b/test/FrontendC++/2003-08-20-ExceptionFail.cpp deleted file mode 100644 index f071c3c0e80c..000000000000 --- a/test/FrontendC++/2003-08-20-ExceptionFail.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -void foo(); - -void bar() { - struct local { - ~local() { foo(); } - } local_obj; - - foo(); -} - diff --git a/test/FrontendC++/2003-08-21-EmptyClass.cpp b/test/FrontendC++/2003-08-21-EmptyClass.cpp deleted file mode 100644 index 5dbfa33e03c3..000000000000 --- a/test/FrontendC++/2003-08-21-EmptyClass.cpp +++ /dev/null @@ -1,9 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// This tests compilation of EMPTY_CLASS_EXPR's - -struct empty {}; - -void foo(empty) {} - -void bar() { foo(empty()); } diff --git a/test/FrontendC++/2003-08-24-Cleanup.cpp b/test/FrontendC++/2003-08-24-Cleanup.cpp deleted file mode 100644 index ab0d1a0d11cd..000000000000 --- a/test/FrontendC++/2003-08-24-Cleanup.cpp +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep unwind - -struct S { ~S(); }; - -int mightthrow(); - -int test() { - S s; - mightthrow(); -} diff --git a/test/FrontendC++/2003-08-27-TypeNamespaces.cpp b/test/FrontendC++/2003-08-27-TypeNamespaces.cpp deleted file mode 100644 index dec97180a420..000000000000 --- a/test/FrontendC++/2003-08-27-TypeNamespaces.cpp +++ /dev/null @@ -1,16 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -namespace foo { - namespace bar { - struct X { X(); }; - - X::X() {} - } -} - - -namespace { - struct Y { Y(); }; - Y::Y() {} -} diff --git a/test/FrontendC++/2003-08-28-ForwardType.cpp b/test/FrontendC++/2003-08-28-ForwardType.cpp deleted file mode 100644 index 9330e94aec57..000000000000 --- a/test/FrontendC++/2003-08-28-ForwardType.cpp +++ /dev/null @@ -1,23 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Default placement versions of operator new. -#include <new> - -void* operator new(size_t, void* __p) throw(); - - -template<typename _CharT> -struct stdio_filebuf -{ stdio_filebuf(); - -}; - -extern stdio_filebuf<char> buf_cout; - -void foo() { - // Create stream buffers for the standard streams and use - // those buffers without destroying and recreating the - // streams. - new (&buf_cout) stdio_filebuf<char>(); - -} diff --git a/test/FrontendC++/2003-08-28-SaveExprBug.cpp b/test/FrontendC++/2003-08-28-SaveExprBug.cpp deleted file mode 100644 index 98c5f5d8d659..000000000000 --- a/test/FrontendC++/2003-08-28-SaveExprBug.cpp +++ /dev/null @@ -1,24 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -char* eback(); - -template<typename foo> -struct basic_filebuf { - char *instancevar; - - void callee() { - instancevar += eback() != eback(); - } - - void caller(); -}; - - -template<typename _CharT> -void basic_filebuf<_CharT>::caller() { - callee(); -} - - -template class basic_filebuf<char>; diff --git a/test/FrontendC++/2003-08-29-ArgPassingBug.cpp b/test/FrontendC++/2003-08-29-ArgPassingBug.cpp deleted file mode 100644 index d4cddff3147c..000000000000 --- a/test/FrontendC++/2003-08-29-ArgPassingBug.cpp +++ /dev/null @@ -1,13 +0,0 @@ - -// RUN: %llvmgcc -xc++ -c -o /dev/null %s |& not grep WARNING - -struct iterator { - iterator(); - iterator(const iterator &I); -}; - -iterator foo(const iterator &I) { return I; } - -void test() { - foo(iterator()); -} diff --git a/test/FrontendC++/2003-08-31-StructLayout.cpp b/test/FrontendC++/2003-08-31-StructLayout.cpp deleted file mode 100644 index a45ad030e3cc..000000000000 --- a/test/FrontendC++/2003-08-31-StructLayout.cpp +++ /dev/null @@ -1,16 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// There is a HOLE in the derived2 object due to not wanting to place the two -// baseclass instances at the same offset! - -struct baseclass {}; - -class derived1 : public baseclass { - void * NodePtr; -}; - -class derived2 : public baseclass { - derived1 current; -}; - -derived2 RI; diff --git a/test/FrontendC++/2003-09-22-CompositeExprValue.cpp b/test/FrontendC++/2003-09-22-CompositeExprValue.cpp deleted file mode 100644 index 3bd707ed8657..000000000000 --- a/test/FrontendC++/2003-09-22-CompositeExprValue.cpp +++ /dev/null @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct duration { - duration operator/=(int c) { - return *this; - } -}; - -void a000090() { - duration() /= 1; -} diff --git a/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp b/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp deleted file mode 100644 index 72997c524b85..000000000000 --- a/test/FrontendC++/2003-09-29-ArgumentNumberMismatch.cpp +++ /dev/null @@ -1,17 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Non-POD classes cannot be passed into a function by component, because their -// dtors must be run. Instead, pass them in by reference. The C++ front-end -// was mistakenly "thinking" that 'foo' took a structure by component. - -struct C { - int A, B; - ~C() {} -}; - -void foo(C b); - -void test(C *P) { - foo(*P); -} - diff --git a/test/FrontendC++/2003-09-30-CommaExprBug.cpp b/test/FrontendC++/2003-09-30-CommaExprBug.cpp deleted file mode 100644 index 365795dafde4..000000000000 --- a/test/FrontendC++/2003-09-30-CommaExprBug.cpp +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -class Empty {}; - -void foo(Empty E); - -void bar() { - foo(Empty()); -} - diff --git a/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp b/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp deleted file mode 100644 index 63f62f28dbf1..000000000000 --- a/test/FrontendC++/2003-09-30-ForIncrementExprBug.cpp +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct C {}; - -C &foo(); - -void foox() { - for (; ; foo()); -} - diff --git a/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp b/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp deleted file mode 100644 index a1eee71f52c5..000000000000 --- a/test/FrontendC++/2003-09-30-ForIncrementExprBug2.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// Test with an opaque type - -struct C; - -C &foo(); - -void foox() { - for (; ; foo()); -} - diff --git a/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp b/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp deleted file mode 100644 index 94c11998963b..000000000000 --- a/test/FrontendC++/2003-09-30-NestedFunctionDecl.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -// The C++ front-end thinks the two foo's are different, the LLVM emitter -// thinks they are the same. The disconnect causes problems. - -void foo() { } - -void bar() { - void foo(); - - foo(); -} diff --git a/test/FrontendC++/2003-10-17-BoolBitfields.cpp b/test/FrontendC++/2003-10-17-BoolBitfields.cpp deleted file mode 100644 index 103945df8aeb..000000000000 --- a/test/FrontendC++/2003-10-17-BoolBitfields.cpp +++ /dev/null @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -struct test { - bool A : 1; - bool B : 1; -}; - -void foo(test *T) { - T->B = true; -} - diff --git a/test/FrontendC++/2003-10-21-InnerClass.cpp b/test/FrontendC++/2003-10-21-InnerClass.cpp deleted file mode 100644 index fadd51d22670..000000000000 --- a/test/FrontendC++/2003-10-21-InnerClass.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgcc -xc++ -S -o - %s | grep {struct.X::Y} -struct X { - - struct Y { - Y(); - }; - -}; - -X::Y::Y() { - -} diff --git a/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp b/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp deleted file mode 100644 index abda017ab96b..000000000000 --- a/test/FrontendC++/2003-10-27-VirtualBaseClassCrash.cpp +++ /dev/null @@ -1,17 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -template<class T> -struct super { - int Y; - void foo(); -}; - -template <class T> -struct test : virtual super<int> {}; - -extern test<int> X; - -void foo() { - X.foo(); -} diff --git a/test/FrontendC++/2003-11-04-ArrayConstructors.cpp b/test/FrontendC++/2003-11-04-ArrayConstructors.cpp deleted file mode 100644 index 4ab33988ebb8..000000000000 --- a/test/FrontendC++/2003-11-04-ArrayConstructors.cpp +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - - -struct Foo { - Foo(int); - ~Foo(); -}; -void foo() { - struct { - Foo name; - } Int[] = { 1 }; -} diff --git a/test/FrontendC++/2003-11-04-CatchLabelName.cpp b/test/FrontendC++/2003-11-04-CatchLabelName.cpp deleted file mode 100644 index 7dbe788f4e17..000000000000 --- a/test/FrontendC++/2003-11-04-CatchLabelName.cpp +++ /dev/null @@ -1,11 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -#include <string> - -void bar(); - -void test() { - try { - bar(); - } catch (std::string) {} -} diff --git a/test/FrontendC++/2003-11-08-ArrayAddress.cpp b/test/FrontendC++/2003-11-08-ArrayAddress.cpp deleted file mode 100644 index 9ad1b8f82f72..000000000000 --- a/test/FrontendC++/2003-11-08-ArrayAddress.cpp +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep getelementptr - -struct foo { - int array[100]; - void *getAddr(unsigned i); -}; - -void *foo::getAddr(unsigned i) { - return &array[i]; -} diff --git a/test/FrontendC++/2003-11-18-EnumArray.cpp b/test/FrontendC++/2003-11-18-EnumArray.cpp deleted file mode 100644 index bb1b3bf301e5..000000000000 --- a/test/FrontendC++/2003-11-18-EnumArray.cpp +++ /dev/null @@ -1,14 +0,0 @@ -// RUN: %llvmgxx -S %s -o - | llvm-as -o /dev/null - -enum TchkType { - tchkNum, tchkString, tchkSCN, tchkNone -}; - -struct Operator { - enum TchkType tchk[8]; -}; - -struct Operator opTab[] = { - {{tchkNum, tchkNum, tchkString} } -}; - diff --git a/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp b/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp index b019e0c0ef3d..a600e841e7a3 100644 --- a/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp +++ b/test/FrontendC++/2004-03-09-UnmangledBuiltinMethods.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc++ -c -o - %s | llvm-dis | grep _ZN11AccessFlags6strlenEv +// RUN: %llvmgcc -xc++ -S -o - %s | grep _ZN11AccessFlags6strlenEv struct AccessFlags { void strlen(); diff --git a/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp b/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp index 706d541bee67..66b970cb6fd8 100644 --- a/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp +++ b/test/FrontendC++/2004-09-27-DidntEmitTemplate.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep callDefaultCtor | \ +// RUN: %llvmgxx -xc++ %s -S -o - | grep callDefaultCtor | \ // RUN: not grep declare // This is a testcase for LLVM PR445, which was a problem where the diff --git a/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp b/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp index 7711cff6d360..ca600d6433df 100644 --- a/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp +++ b/test/FrontendC++/2005-07-21-VirtualBaseAccess.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | opt -die | llvm-dis | not grep cast +// RUN: %llvmgxx -xc++ %s -S -o - | opt -die -S | not grep cast void foo(int*); diff --git a/test/FrontendC++/2006-09-27-Debug-Protection.cpp b/test/FrontendC++/2006-09-27-Debug-Protection.cpp index cb09bd0a974b..2a70a0f5b457 100644 --- a/test/FrontendC++/2006-09-27-Debug-Protection.cpp +++ b/test/FrontendC++/2006-09-27-Debug-Protection.cpp @@ -1,5 +1,5 @@ -// RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 1,} -// RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 2,} +// RUN: %llvmgxx -O0 -S -g -o - %s | grep {i32 1,} +// RUN: %llvmgxx -O0 -S -g -o - %s | grep {i32 2,} class A { public: int x; diff --git a/test/FrontendC++/2006-10-30-ClassBitfield.cpp b/test/FrontendC++/2006-10-30-ClassBitfield.cpp index bd3b173cf8fd..b3b43fb30ce6 100644 --- a/test/FrontendC++/2006-10-30-ClassBitfield.cpp +++ b/test/FrontendC++/2006-10-30-ClassBitfield.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR954 struct _Refcount_Base { diff --git a/test/FrontendC++/2006-11-20-GlobalSymbols.cpp b/test/FrontendC++/2006-11-20-GlobalSymbols.cpp index fc896b330a4d..c4afd32b66d2 100644 --- a/test/FrontendC++/2006-11-20-GlobalSymbols.cpp +++ b/test/FrontendC++/2006-11-20-GlobalSymbols.cpp @@ -1,7 +1,7 @@ // PR1013 // Check to make sure debug symbols use the correct name for globals and // functions. Will not assemble if it fails to. -// RUN: %llvmgcc -O0 -g -c %s +// RUN: %llvmgcc_only -O0 -g -c %s int foo __asm__("f\001oo"); diff --git a/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp b/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp index 365c8e80fbf5..d351b9413af3 100644 --- a/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp +++ b/test/FrontendC++/2006-11-30-ConstantExprCrash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR1027 struct sys_var { diff --git a/test/FrontendC++/2006-11-30-NoCompileUnit.cpp b/test/FrontendC++/2006-11-30-NoCompileUnit.cpp deleted file mode 100644 index 242a37e41336..000000000000 --- a/test/FrontendC++/2006-11-30-NoCompileUnit.cpp +++ /dev/null @@ -1,60 +0,0 @@ -// This is a regression test on debug info to make sure we don't hit a compile -// unit size issue with gdb. -// RUN: %llvmgcc -S -O0 -g %s -o - | \ -// RUN: llc --disable-fp-elim -o NoCompileUnit.s -// RUN: %compile_c NoCompileUnit.s -o NoCompileUnit.o -// RUN: %link NoCompileUnit.o -o NoCompileUnit.exe -// RUN: echo {break main\nrun\np NoCompileUnit::pubname} > %t2 -// RUN: gdb -q -batch -n -x %t2 NoCompileUnit.exe | \ -// RUN: tee NoCompileUnit.out | not grep {"low == high"} -// XFAIL: alpha,arm -// XFAIL: * -// See PR2454 - - -class MamaDebugTest { -private: - int N; - -protected: - MamaDebugTest(int n) : N(n) {} - - int getN() const { return N; } - -}; - -class BabyDebugTest : public MamaDebugTest { -private: - -public: - BabyDebugTest(int n) : MamaDebugTest(n) {} - - static int doh; - - int doit() { - int N = getN(); - int Table[N]; - - int sum = 0; - - for (int i = 0; i < N; ++i) { - int j = i; - Table[i] = j; - } - for (int i = 0; i < N; ++i) { - int j = Table[i]; - sum += j; - } - - return sum; - } - -}; - -int BabyDebugTest::doh; - - -int main(int argc, const char *argv[]) { - BabyDebugTest BDT(20); - return BDT.doit(); -} diff --git a/test/FrontendC++/2007-01-02-UnboundedArray.cpp b/test/FrontendC++/2007-01-02-UnboundedArray.cpp index 648d19be62b8..310308694b78 100644 --- a/test/FrontendC++/2007-01-02-UnboundedArray.cpp +++ b/test/FrontendC++/2007-01-02-UnboundedArray.cpp @@ -1,6 +1,6 @@ // Make sure unbounded arrays compile with debug information. // -// RUN: %llvmgcc -O0 -c -g %s +// RUN: %llvmgcc -O0 -S -g %s // PR1068 diff --git a/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp b/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp index 654e11be1ffc..5206640be10a 100644 --- a/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp +++ b/test/FrontendC++/2007-01-06-ELF-Thunk-Sections.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - | not grep gnu.linkonce. +// RUN: %llvmgxx %s -S -o - | not grep gnu.linkonce. // PR1085 class diff --git a/test/FrontendC++/2007-01-06-PtrMethodInit.cpp b/test/FrontendC++/2007-01-06-PtrMethodInit.cpp index f87c8d888fce..beb79457b559 100644 --- a/test/FrontendC++/2007-01-06-PtrMethodInit.cpp +++ b/test/FrontendC++/2007-01-06-PtrMethodInit.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - // PR1084 extern "C" diff --git a/test/FrontendC++/2007-03-27-FunctionVarRename.cpp b/test/FrontendC++/2007-03-27-FunctionVarRename.cpp index 538d6df1813c..6ff1284ddb40 100644 --- a/test/FrontendC++/2007-03-27-FunctionVarRename.cpp +++ b/test/FrontendC++/2007-03-27-FunctionVarRename.cpp @@ -1,5 +1,5 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - | not grep eprintf1 -// RUN: %llvmgxx %s -emit-llvm -S -o - | grep eprintf +// RUN: %llvmgxx %s -S -o - | not grep eprintf1 +// RUN: %llvmgxx %s -S -o - | grep eprintf // Only one eprintf should exist in the output diff --git a/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp b/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp index eabcd5732708..4c2aad397c89 100644 --- a/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp +++ b/test/FrontendC++/2007-04-11-InlineStorageClassC++.cpp @@ -1,16 +1,16 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xglobWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xextWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep linkonce | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgxx %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); inline int xglobWeak (int i) { diff --git a/test/FrontendC++/2007-05-03-VectorInit.cpp b/test/FrontendC++/2007-05-03-VectorInit.cpp index b87f4d4665ca..af56d3a08a84 100644 --- a/test/FrontendC++/2007-05-03-VectorInit.cpp +++ b/test/FrontendC++/2007-05-03-VectorInit.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O0 -o - +// RUN: %llvmgxx %s -S -O0 -o - // PR1378 typedef float v4sf __attribute__((vector_size(16))); diff --git a/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp b/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp index 8392c0b94a52..42342fc9486c 100644 --- a/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp +++ b/test/FrontendC++/2007-05-16-ReverseBitFieldCrash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -S -o - +// RUN: %llvmgxx %s -S -o - #pragma reverse_bitfields on typedef unsigned long UINT32; diff --git a/test/FrontendC++/2007-05-23-TryFinally.cpp b/test/FrontendC++/2007-05-23-TryFinally.cpp index 38f0b021aba0..c7971820ec75 100644 --- a/test/FrontendC++/2007-05-23-TryFinally.cpp +++ b/test/FrontendC++/2007-05-23-TryFinally.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | ignore grep _Unwind_Resume | \ +// RUN: %llvmgxx %s -S -O2 -o - | ignore grep _Unwind_Resume | \ // RUN: wc -l | grep {\[23\]} struct One { }; diff --git a/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp b/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp index d54dfbe57121..2e85abdf25ea 100644 --- a/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp +++ b/test/FrontendC++/2007-07-29-RestrictPtrArg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias void foo(int * __restrict myptr1, int * myptr2) { myptr1[0] = 0; diff --git a/test/FrontendC++/2007-07-29-RestrictRefArg.cpp b/test/FrontendC++/2007-07-29-RestrictRefArg.cpp index 0c28e4d27a2b..128ddb3ab592 100644 --- a/test/FrontendC++/2007-07-29-RestrictRefArg.cpp +++ b/test/FrontendC++/2007-07-29-RestrictRefArg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias void foo(int & __restrict myptr1, int & myptr2) { myptr1 = 0; diff --git a/test/FrontendC++/2007-08-01-RestrictMethod.cpp b/test/FrontendC++/2007-08-01-RestrictMethod.cpp index b4922beab1b2..feefaa1759c5 100644 --- a/test/FrontendC++/2007-08-01-RestrictMethod.cpp +++ b/test/FrontendC++/2007-08-01-RestrictMethod.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgxx -S %s -o - | grep noalias class foo { diff --git a/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp b/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp index f81394409d4a..1fcf15f0d9d8 100644 --- a/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp +++ b/test/FrontendC++/2007-09-10-RecursiveTypeResolution.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - +// RUN: %llvmgxx -S %s -o - // PR1634 namespace Manta diff --git a/test/FrontendC++/2007-10-01-StructResize.cpp b/test/FrontendC++/2007-10-01-StructResize.cpp index d37057a901a4..71109eb7b6a5 100644 --- a/test/FrontendC++/2007-10-01-StructResize.cpp +++ b/test/FrontendC++/2007-10-01-StructResize.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null #pragma pack(4) diff --git a/test/FrontendC++/2008-10-29-WrongOffset.cpp b/test/FrontendC++/2008-10-29-WrongOffset.cpp index 1b3be2132b18..c261c3123767 100644 --- a/test/FrontendC++/2008-10-29-WrongOffset.cpp +++ b/test/FrontendC++/2008-10-29-WrongOffset.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -c -o /dev/null +// RUN: %llvmgxx %s -S -o /dev/null // PR2917 #include <complex> diff --git a/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp b/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp index 8f1b598aa2bf..eb69963e5343 100644 --- a/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp +++ b/test/FrontendC++/2009-02-16-CtorNames-dbg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -g --emit-llvm %s -o - | grep "\~A" +// RUN: %llvmgcc -S -g %s -o - | grep "\~A" class A { int i; public: diff --git a/test/FrontendC++/2009-03-17-dbg.cpp b/test/FrontendC++/2009-03-17-dbg.cpp index 93da61873bfc..6708e12f9b93 100644 --- a/test/FrontendC++/2009-03-17-dbg.cpp +++ b/test/FrontendC++/2009-03-17-dbg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null -g +// RUN: %llvmgxx -S %s -o /dev/null -g // XTARGET: darwin,linux // XFAIL: * template <typename T1,typename T2> diff --git a/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp b/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp index 997c3f703508..e3616da073bf 100644 --- a/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp +++ b/test/FrontendC++/2009-04-21-DtorNames-dbg.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -g %s -o - | llc -O0 -o %t.s +// RUN: %llvmgcc -S -g %s -o - | llc -O0 -o %t.s // RUN: %compile_c %t.s -o %t.o // PR4025 diff --git a/test/FrontendC++/2009-04-23-bool2.cpp b/test/FrontendC++/2009-04-23-bool2.cpp index 8614a37d36c4..2c76d982ea6e 100644 --- a/test/FrontendC++/2009-04-23-bool2.cpp +++ b/test/FrontendC++/2009-04-23-bool2.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null // g++.old-deja/g++.jason/bool2.C from gcc testsuite. // Crashed before 67975 went in. struct F { diff --git a/test/FrontendC++/2009-05-04-PureConstNounwind.cpp b/test/FrontendC++/2009-05-04-PureConstNounwind.cpp index a4b4653e122e..e275c340a950 100644 --- a/test/FrontendC++/2009-05-04-PureConstNounwind.cpp +++ b/test/FrontendC++/2009-05-04-PureConstNounwind.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | grep nounwind | count 4 +// RUN: %llvmgxx -S %s -o - | grep nounwind | count 4 int c(void) __attribute__((const)); int p(void) __attribute__((pure)); int t(void); diff --git a/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp b/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp index b3758d2782ca..c2a841b1a674 100644 --- a/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp +++ b/test/FrontendC++/2009-06-16-DebugInfoCrash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o /dev/null -g +// RUN: %llvmgxx -S %s -o /dev/null -g // This crashes if we try to emit debug info for TEMPLATE_DECL members. template <class T> class K2PtrVectorBase {}; template <class T> class K2Vector {}; diff --git a/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp b/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp index dcb2f16a5dc8..e0bc043adad9 100644 --- a/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp +++ b/test/FrontendC++/2009-06-20-DarwinPPCLayout.cpp @@ -1,10 +1,10 @@ -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep baz | grep global | grep {struct.bar} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep ccc | grep global | grep {struct.CC} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep quux | grep global | grep {struct.bar} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep foo | grep global | grep {struct.SRCFilter::FilterEntry} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.bar} | grep {1 x i32} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.CC} | grep {struct.payre<KBFP,float*} | grep {.base.32} | grep {1 x i32} -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o - | grep {struct.SRCFilter::FilterEntry} | not grep {1 x i32} +// RUN: %llvmgxx -S -m32 %s -o - | grep baz | grep global | grep {struct.bar} +// RUN: %llvmgxx -S -m32 %s -o - | grep ccc | grep global | grep {struct.CC} +// RUN: %llvmgxx -S -m32 %s -o - | grep quux | grep global | grep {struct.bar} +// RUN: %llvmgxx -S -m32 %s -o - | grep foo | grep global | grep {struct.SRCFilter::FilterEntry} +// RUN: %llvmgxx -S -m32 %s -o - | grep {struct.bar} | grep {1 x i32} +// RUN: %llvmgxx -S -m32 %s -o - | grep {struct.CC} | grep {struct.payre<KBFP,float*} | grep {.base.32} | grep {1 x i32} +// RUN: %llvmgxx -S -m32 %s -o - | grep {struct.SRCFilter::FilterEntry} | not grep {1 x i32} // XFAIL: * // XTARGET: powerpc-apple-darwin diff --git a/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp b/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp index bc862e70bde1..89a79f244639 100644 --- a/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp +++ b/test/FrontendC++/2009-08-05-ZeroInitWidth.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -c -emit-llvm %s -o - +// RUN: %llvmgxx -S %s -o - // rdar://7114564 struct A { unsigned long long : (sizeof(unsigned long long) * 8) - 16; diff --git a/test/FrontendC++/2009-08-11-VectorRetTy.cpp b/test/FrontendC++/2009-08-11-VectorRetTy.cpp index b2c3ba185b5c..403b59d8f99e 100644 --- a/test/FrontendC++/2009-08-11-VectorRetTy.cpp +++ b/test/FrontendC++/2009-08-11-VectorRetTy.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -c -o /dev/null +// RUN: %llvmgxx %s -S -o /dev/null // <rdar://problem/7096460> typedef void (*Func) (); typedef long long m64 __attribute__((__vector_size__(8), __may_alias__)); diff --git a/test/FrontendC++/2009-09-04-modify-crash.cpp b/test/FrontendC++/2009-09-04-modify-crash.cpp index ac16f8c36d18..89274e09c7ed 100644 --- a/test/FrontendC++/2009-09-04-modify-crash.cpp +++ b/test/FrontendC++/2009-09-04-modify-crash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -emit-llvm -fapple-kext -S -o - +// RUN: %llvmgxx %s -fapple-kext -S -o - // The extra check in 71555 caused this to crash on Darwin X86 // in an assert build. class foo { diff --git a/test/FrontendC++/2009-09-09-packed-layout.cpp b/test/FrontendC++/2009-09-09-packed-layout.cpp index a569f9f78767..921aad79f73c 100644 --- a/test/FrontendC++/2009-09-09-packed-layout.cpp +++ b/test/FrontendC++/2009-09-09-packed-layout.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -m32 -emit-llvm %s -o /dev/null +// RUN: %llvmgxx -S -m32 %s -o /dev/null class X { public: virtual ~X(); diff --git a/test/FrontendC++/2009-10-27-crash.cpp b/test/FrontendC++/2009-10-27-crash.cpp index 21d0064c687b..da73988b6976 100644 --- a/test/FrontendC++/2009-10-27-crash.cpp +++ b/test/FrontendC++/2009-10-27-crash.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -emit-llvm -S %s -o /dev/null +// RUN: %llvmgxx -S %s -o /dev/null // Radar 7328944 typedef struct diff --git a/test/FrontendC++/2010-03-22-empty-baseclass.cpp b/test/FrontendC++/2010-03-22-empty-baseclass.cpp index b6bdea40c3f2..bb741c42c842 100644 --- a/test/FrontendC++/2010-03-22-empty-baseclass.cpp +++ b/test/FrontendC++/2010-03-22-empty-baseclass.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - -O2 | FileCheck %s +// RUN: %llvmgxx -S %s -o - -O2 | FileCheck %s namespace boost { namespace detail { template <typename T> struct cv_traits_imp {}; diff --git a/test/FrontendC++/2010-04-30-OptimizedMethod-Dbg.cpp b/test/FrontendC++/2010-04-30-OptimizedMethod-Dbg.cpp index 7052dc0dccd5..761c0dc097a4 100644 --- a/test/FrontendC++/2010-04-30-OptimizedMethod-Dbg.cpp +++ b/test/FrontendC++/2010-04-30-OptimizedMethod-Dbg.cpp @@ -7,12 +7,12 @@ public: }; int foo::bar(int x) { - // CHECK: {{i1 false, i1 true(, i[0-9]+ [^\}]+[}]|[}]) ; \[ DW_TAG_subprogram \]}} + // CHECK: {{i32 [0-9]+, i1 true(, i[0-9]+ [^\}]+[}]|[}]) ; \[ DW_TAG_subprogram \]}} return x*4 + 1; } int foo::baz(int x) { - // CHECK: {{i1 false, i1 true(, i[0-9]+ [^\},]+[}]|[}]) ; \[ DW_TAG_subprogram \]}} + // CHECK: {{i32 [0-9]+, i1 true(, i[0-9]+ [^\},]+[}]|[}]) ; \[ DW_TAG_subprogram \]}} return x*4 + 1; } diff --git a/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp b/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp index 203b542b784b..9203dbd0bd9f 100644 --- a/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp +++ b/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp @@ -1,5 +1,5 @@ -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | not grep ZN12basic_stringIcEC1Ev -// RUN: %llvmgxx -xc++ %s -c -o - | llvm-dis | grep ZN12basic_stringIcED1Ev | count 2 +// RUN: %llvmgxx -xc++ %s -S -o - | not grep ZN12basic_stringIcEC1Ev +// RUN: %llvmgxx -xc++ %s -S -o - | grep ZN12basic_stringIcED1Ev | count 2 template<class charT> class basic_string diff --git a/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp b/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp index 66acfbe4b326..c2d6abe97fc5 100644 --- a/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp +++ b/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp @@ -1,4 +1,4 @@ -//RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep DW_TAG_auto_variable +//RUN: %llvmgxx -O0 -S -g -o - %s | grep DW_TAG_auto_variable class Foo { public: diff --git a/test/FrontendC++/2010-06-22-BitfieldInit.cpp b/test/FrontendC++/2010-06-22-BitfieldInit.cpp index 1cfe1f9f6fd5..8dceb78bfc67 100644 --- a/test/FrontendC++/2010-06-22-BitfieldInit.cpp +++ b/test/FrontendC++/2010-06-22-BitfieldInit.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -g -c %s +// RUN: %llvmgxx -g -S %s struct TEST2 { int subid:32; diff --git a/test/FrontendC++/2010-06-22-ZeroBitfield.cpp b/test/FrontendC++/2010-06-22-ZeroBitfield.cpp index c979f8d9b918..9c4f2629f748 100644 --- a/test/FrontendC++/2010-06-22-ZeroBitfield.cpp +++ b/test/FrontendC++/2010-06-22-ZeroBitfield.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -g -c %s +// RUN: %llvmgxx -g -S %s struct s8_0 { unsigned : 0; }; struct s8_1 { double x; }; struct s8 { s8_0 a; s8_1 b; }; diff --git a/test/FrontendC++/2010-07-19-nowarn.cpp b/test/FrontendC++/2010-07-19-nowarn.cpp index 8742bf152329..a61a84ff28b0 100644 --- a/test/FrontendC++/2010-07-19-nowarn.cpp +++ b/test/FrontendC++/2010-07-19-nowarn.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -m32 -fasm-blocks -o /dev/null +// RUN: %llvmgcc %s -S -m32 -fasm-blocks -o /dev/null // This should not warn about unreferenced label. 8195660. // XFAIL: * // XTARGET: x86,i386,i686 diff --git a/test/FrontendC++/2010-07-23-DeclLoc.cpp b/test/FrontendC++/2010-07-23-DeclLoc.cpp index c72de3b33623..9bf432beb727 100644 --- a/test/FrontendC++/2010-07-23-DeclLoc.cpp +++ b/test/FrontendC++/2010-07-23-DeclLoc.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -emit-llvm -S -g %s -o - | FileCheck %s +// RUN: %llvmgxx -S -g %s -o - | FileCheck %s // Require the template function declaration refer to the correct filename. // First, locate the function decl in metadata, and pluck out the file handle: // CHECK: {{extract_dwarf_data_from_header.*extract_dwarf_data_from_header.*extract_dwarf_data_from_header.*[^ ]+", metadata !}}[[filehandle:[0-9]+]], diff --git a/test/FrontendC++/member-alignment.cpp b/test/FrontendC++/member-alignment.cpp index 6afc0aaede1c..c5b20b279325 100644 --- a/test/FrontendC++/member-alignment.cpp +++ b/test/FrontendC++/member-alignment.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | FileCheck %s +// RUN: %llvmgxx -S %s -o - | FileCheck %s // XFAIL: arm,powerpc // rdar://7268289 diff --git a/test/FrontendC++/ptr-to-method-devirt.cpp b/test/FrontendC++/ptr-to-method-devirt.cpp index 358b801af556..a5ca5c76559a 100644 --- a/test/FrontendC++/ptr-to-method-devirt.cpp +++ b/test/FrontendC++/ptr-to-method-devirt.cpp @@ -1,6 +1,6 @@ // PR1602 -// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | not grep ptrtoint -// RUN: %llvmgxx -c -emit-llvm %s -o - -O3 | llvm-dis | grep getelementptr | count 1 +// RUN: %llvmgxx -S %s -o - -O3 | not grep ptrtoint +// RUN: %llvmgxx -S %s -o - -O3 | grep getelementptr | count 1 struct S { virtual void f(); }; diff --git a/test/FrontendC++/varargs.cpp b/test/FrontendC++/varargs.cpp index 1c07aedd093d..c4de76acc30b 100644 --- a/test/FrontendC++/varargs.cpp +++ b/test/FrontendC++/varargs.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | FileCheck %s +// RUN: %llvmgxx -S %s -o - | FileCheck %s // rdar://7309675 // PR4678 diff --git a/test/FrontendC++/weak-external.cpp b/test/FrontendC++/weak-external.cpp index 94360c2e97ee..f4f0ba19ef37 100644 --- a/test/FrontendC++/weak-external.cpp +++ b/test/FrontendC++/weak-external.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | not grep {_ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag} +// RUN: %llvmgxx %s -S -O2 -o - | not grep {_ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag} // PR4262 // The "basic_string" extern template instantiation declaration is supposed to diff --git a/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp b/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp index ec69afc21541..f81854e0cb92 100644 --- a/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp +++ b/test/FrontendC++/x86-64-abi-sret-vs-2word-struct-param.cpp @@ -1,4 +1,4 @@ -// RUN: %llvmgxx -S -emit-llvm %s -o - | grep byval | count 2 +// RUN: %llvmgxx -S %s -o - | grep byval | count 2 // XTARGET: x86 // PR4242 // (PR 4242 bug is on 64-bit only, test passes on x86-32 as well) diff --git a/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c b/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c index 39412e5f84ee..12b4f7b93329 100644 --- a/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c +++ b/test/FrontendC/2003-08-06-BuiltinSetjmpLongjmp.c @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc -xc %s -c -o - | llvm-dis | not grep __builtin_ +/* RUN: %llvmgcc -xc %s -S -o - | not grep __builtin_ * * __builtin_longjmp/setjmp should get transformed into llvm.setjmp/longjmp * just like explicit setjmp/longjmp calls are. diff --git a/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c b/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c index c275fee5d09a..9ae633ee0812 100644 --- a/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c +++ b/test/FrontendC/2003-08-17-DeadCodeShortCircuit.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o %t.o +// RUN: %llvmgcc -xc %s -S -o %t.o int test(_Bool pos, _Bool color) { return 0; diff --git a/test/FrontendC/2003-11-03-AddrArrayElement.c b/test/FrontendC/2003-11-03-AddrArrayElement.c index ed3fc1a6cb42..4337da7d1e43 100644 --- a/test/FrontendC/2003-11-03-AddrArrayElement.c +++ b/test/FrontendC/2003-11-03-AddrArrayElement.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr // This should be turned into a tasty getelementptr instruction, not a nasty // series of casts and address arithmetic. diff --git a/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c b/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c index 443dfbdb37fc..58f9f82e1543 100644 --- a/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c +++ b/test/FrontendC/2003-11-08-PointerSubNotGetelementptr.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr char *test(char* C) { return C-1; // Should turn into a GEP diff --git a/test/FrontendC/2003-11-13-TypeSafety.c b/test/FrontendC/2003-11-13-TypeSafety.c index 128b767e22da..9b76bb11c984 100644 --- a/test/FrontendC/2003-11-13-TypeSafety.c +++ b/test/FrontendC/2003-11-13-TypeSafety.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep getelementptr +// RUN: %llvmgcc -xc %s -S -o - | grep getelementptr int *test(int *X, int Y) { return X + Y; diff --git a/test/FrontendC/2003-12-14-ExternInlineSupport.c b/test/FrontendC/2003-12-14-ExternInlineSupport.c index fb92ec773c1a..a45eb98dca2a 100644 --- a/test/FrontendC/2003-12-14-ExternInlineSupport.c +++ b/test/FrontendC/2003-12-14-ExternInlineSupport.c @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | not grep dead_function +// RUN: %llvmgcc -xc %s -S -o - | not grep dead_function extern __inline__ void dead_function() {} diff --git a/test/FrontendC/2004-02-12-LargeAggregateCopy.c b/test/FrontendC/2004-02-12-LargeAggregateCopy.c index b3c9bcf38108..93b7fe44bf60 100644 --- a/test/FrontendC/2004-02-12-LargeAggregateCopy.c +++ b/test/FrontendC/2004-02-12-LargeAggregateCopy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memcpy +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.memcpy struct X { int V[10000]; }; struct X Global1, Global2; diff --git a/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c b/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c index 162d32a658c0..f115b5a5f013 100644 --- a/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c +++ b/test/FrontendC/2004-02-13-BuiltinFrameReturnAddress.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.*address | count 4 +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.*address | count 4 void *test1() { return __builtin_return_address(1); diff --git a/test/FrontendC/2004-02-13-IllegalVararg.c b/test/FrontendC/2004-02-13-IllegalVararg.c index 21039c6b0fa9..0d003c8033ca 100644 --- a/test/FrontendC/2004-02-13-IllegalVararg.c +++ b/test/FrontendC/2004-02-13-IllegalVararg.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -w -c -o - | llc +// RUN: %llvmgcc -xc %s -w -S -o - | llc // XFAIL: * // See PR2452 diff --git a/test/FrontendC/2004-02-13-Memset.c b/test/FrontendC/2004-02-13-Memset.c index fc26051f6d85..fb6ed2352ea3 100644 --- a/test/FrontendC/2004-02-13-Memset.c +++ b/test/FrontendC/2004-02-13-Memset.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep llvm.memset | count 3 +// RUN: %llvmgcc -xc %s -S -o - | grep llvm.memset | count 3 void *memset(void*, int, long); void bzero(void*, long); diff --git a/test/FrontendC/2004-02-20-Builtins.c b/test/FrontendC/2004-02-20-Builtins.c index 0c9ac7cae8af..c056a8405f73 100644 --- a/test/FrontendC/2004-02-20-Builtins.c +++ b/test/FrontendC/2004-02-20-Builtins.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O3 -xc %s -c -o - | llvm-dis | not grep builtin +// RUN: %llvmgcc -O3 -xc %s -S -o - | not grep builtin #include <math.h> diff --git a/test/FrontendC/2004-03-07-ExternalConstant.c b/test/FrontendC/2004-03-07-ExternalConstant.c index b8e13a35548a..4a9094bdf344 100644 --- a/test/FrontendC/2004-03-07-ExternalConstant.c +++ b/test/FrontendC/2004-03-07-ExternalConstant.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep constant +// RUN: %llvmgcc -xc %s -S -o - | grep constant extern const int a[]; // 'a' should be marked constant even though it's external! int foo () { diff --git a/test/FrontendC/2004-06-17-UnorderedCompares.c b/test/FrontendC/2004-06-17-UnorderedCompares.c index f91ed6687ce4..286e7bc7cf70 100644 --- a/test/FrontendC/2004-06-17-UnorderedCompares.c +++ b/test/FrontendC/2004-06-17-UnorderedCompares.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc -std=c99 %s -c -o - | llvm-dis | grep -v llvm.isunordered | not grep call +// RUN: %llvmgcc -xc -std=c99 %s -S -o - | grep -v llvm.isunordered | not grep call #include <math.h> diff --git a/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c b/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c index b1e14212732e..994ac8f8436f 100644 --- a/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c +++ b/test/FrontendC/2004-11-27-StaticFunctionRedeclare.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | \ -// RUN: opt -std-compile-opts | llvm-dis | not grep {declare i32.*func} +// RUN: %llvmgcc -S %s -o - | \ +// RUN: opt -std-compile-opts -S | not grep {declare i32.*func} // There should not be an unresolved reference to func here. Believe it or not, // the "expected result" is a function named 'func' which is internal and diff --git a/test/FrontendC/2005-01-02-PointerDifference.c b/test/FrontendC/2005-01-02-PointerDifference.c index a351da2ed8c8..2c108e5f6cac 100644 --- a/test/FrontendC/2005-01-02-PointerDifference.c +++ b/test/FrontendC/2005-01-02-PointerDifference.c @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep -v div +// RUN: %llvmgcc -xc %s -S -o - | grep -v div int Diff(int *P, int *Q) { return P-Q; } diff --git a/test/FrontendC/2005-02-27-MarkGlobalConstant.c b/test/FrontendC/2005-02-27-MarkGlobalConstant.c index b9fbbb6369a5..6806c94c10b3 100644 --- a/test/FrontendC/2005-02-27-MarkGlobalConstant.c +++ b/test/FrontendC/2005-02-27-MarkGlobalConstant.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc %s -S -o - | grep {private constant } +// RUN: %llvmgcc -xc %s -S -o - | grep {private unnamed_addr constant } // The synthetic global made by the CFE for big initializer should be marked // constant. diff --git a/test/FrontendC/2005-12-04-AttributeUsed.c b/test/FrontendC/2005-12-04-AttributeUsed.c index 33e27e89f4c8..f47e977f4861 100644 --- a/test/FrontendC/2005-12-04-AttributeUsed.c +++ b/test/FrontendC/2005-12-04-AttributeUsed.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llvm-as | llvm-dis | \ +// RUN: %llvmgcc %s -S -o - | llvm-as | llvm-dis | \ // RUN: grep llvm.used | grep foo | grep X int X __attribute__((used)); diff --git a/test/FrontendC/2006-03-03-MissingInitializer.c b/test/FrontendC/2006-03-03-MissingInitializer.c index 19d4bc7fe7a8..5e027b1894ac 100644 --- a/test/FrontendC/2006-03-03-MissingInitializer.c +++ b/test/FrontendC/2006-03-03-MissingInitializer.c @@ -1,5 +1,5 @@ // RUN: %llvmgcc %s -S -o - | opt -std-compile-opts | \ -// RUN: llvm-dis | grep {@nate.*internal global i32 0} +// RUN: llvm-dis | grep {@nate.*internal unnamed_addr global i32 0} struct X { int *XX; int Y;}; diff --git a/test/FrontendC/2007-01-06-KNR-Proto.c b/test/FrontendC/2007-01-06-KNR-Proto.c index eb2f25482d9d..6aa74d4cb25f 100644 --- a/test/FrontendC/2007-01-06-KNR-Proto.c +++ b/test/FrontendC/2007-01-06-KNR-Proto.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -o - -emit-llvm %s +// RUN: %llvmgcc -S -o - %s // PR1083 int svc_register (void (*dispatch) (int)); diff --git a/test/FrontendC/2007-02-04-AddrLValue-2.c b/test/FrontendC/2007-02-04-AddrLValue-2.c index 90251e6debdf..fa20faff3e15 100644 --- a/test/FrontendC/2007-02-04-AddrLValue-2.c +++ b/test/FrontendC/2007-02-04-AddrLValue-2.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1173 struct S { char s; }; diff --git a/test/FrontendC/2007-02-04-AddrLValue.c b/test/FrontendC/2007-02-04-AddrLValue.c index c8b65a946f5e..214fce7747ce 100644 --- a/test/FrontendC/2007-02-04-AddrLValue.c +++ b/test/FrontendC/2007-02-04-AddrLValue.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1176 typedef struct diff --git a/test/FrontendC/2007-02-04-EmptyStruct.c b/test/FrontendC/2007-02-04-EmptyStruct.c index 48ad31f7c3fd..5ad2c705cce8 100644 --- a/test/FrontendC/2007-02-04-EmptyStruct.c +++ b/test/FrontendC/2007-02-04-EmptyStruct.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1175 struct empty { }; diff --git a/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c b/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c index f02a44b15733..d5a9fbb0ecc2 100644 --- a/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c +++ b/test/FrontendC/2007-02-04-WITH_SIZE_EXPR.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm +// RUN: %llvmgcc %s -O3 -S -o - // PR1174 void zzz (char *s1, char *s2, int len, int *q) diff --git a/test/FrontendC/2007-02-05-nested.c b/test/FrontendC/2007-02-05-nested.c index be23f175c8c8..bd6d30695ba0 100644 --- a/test/FrontendC/2007-02-05-nested.c +++ b/test/FrontendC/2007-02-05-nested.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -fnested-functions -O0 -o - -emit-llvm %s +// RUN: %llvmgcc -S -fnested-functions -O0 -o - %s // PR915 extern void abort(void); diff --git a/test/FrontendC/2007-02-07-AddrLabel.c b/test/FrontendC/2007-02-07-AddrLabel.c index 144f62d0992b..03ed4c987e44 100644 --- a/test/FrontendC/2007-02-07-AddrLabel.c +++ b/test/FrontendC/2007-02-07-AddrLabel.c @@ -1,5 +1,5 @@ // PR947 -// RUN: %llvmgcc %s -c -o - +// RUN: %llvmgcc %s -S -o - void foo() { void *ptr; diff --git a/test/FrontendC/2007-02-16-VoidPtrDiff.c b/test/FrontendC/2007-02-16-VoidPtrDiff.c index 713b9b28b075..15df28cae3fe 100644 --- a/test/FrontendC/2007-02-16-VoidPtrDiff.c +++ b/test/FrontendC/2007-02-16-VoidPtrDiff.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -o - -emit-llvm +// RUN: %llvmgcc %s -S -o - void foo(void *ptr, int test) { (ptr - ((void *) test + 0x2000)); diff --git a/test/FrontendC/2007-02-16-WritableStrings.c b/test/FrontendC/2007-02-16-WritableStrings.c index 0f281ce7c5e3..8fa7f15dc6c3 100644 --- a/test/FrontendC/2007-02-16-WritableStrings.c +++ b/test/FrontendC/2007-02-16-WritableStrings.c @@ -1,7 +1,7 @@ // Test the -fwritable-strings option. -// RUN: %llvmgcc -O3 -S -o - -emit-llvm -fwritable-strings %s | \ -// RUN: grep {internal global} -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {private constant} +// RUN: %llvmgcc -O3 -S -o - -fwritable-strings %s | \ +// RUN: grep {internal unnamed_addr global} +// RUN: %llvmgcc -O3 -S -o - %s | grep {private unnamed_addr constant} char *X = "foo"; diff --git a/test/FrontendC/2007-02-25-C-DotDotDot.c b/test/FrontendC/2007-02-25-C-DotDotDot.c index 969602200c19..3f96fd1f9e1f 100644 --- a/test/FrontendC/2007-02-25-C-DotDotDot.c +++ b/test/FrontendC/2007-02-25-C-DotDotDot.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O0 -S -o - -emit-llvm -fno-inline -fno-unit-at-a-time %s | \ +// RUN: %llvmgcc -O0 -S -o - -fno-inline -fno-unit-at-a-time %s | \ // RUN: grep {call float @foo} // Make sure the call to foo is compiled as: diff --git a/test/FrontendC/2007-03-01-VarSizeArrayIdx.c b/test/FrontendC/2007-03-01-VarSizeArrayIdx.c index a3d480cafe66..6ebe79672f58 100644 --- a/test/FrontendC/2007-03-01-VarSizeArrayIdx.c +++ b/test/FrontendC/2007-03-01-VarSizeArrayIdx.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -O3 -S -o - -emit-llvm | grep mul +// RUN: %llvmgcc %s -O3 -S -o - | grep mul // PR1233 float foo(int w, float A[][w], int g, int h) { diff --git a/test/FrontendC/2007-04-11-InlineAsmStruct.c b/test/FrontendC/2007-04-11-InlineAsmStruct.c index 49741c68ee6e..6c6c1509903d 100644 --- a/test/FrontendC/2007-04-11-InlineAsmStruct.c +++ b/test/FrontendC/2007-04-11-InlineAsmStruct.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc struct V { short X, Y; }; int bar() { diff --git a/test/FrontendC/2007-04-11-InlineAsmUnion.c b/test/FrontendC/2007-04-11-InlineAsmUnion.c index 83fe7db771f5..014470102d32 100644 --- a/test/FrontendC/2007-04-11-InlineAsmUnion.c +++ b/test/FrontendC/2007-04-11-InlineAsmUnion.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc union U { int x; float p; }; void foo() { diff --git a/test/FrontendC/2007-04-11-InlineStorageClassC89.c b/test/FrontendC/2007-04-11-InlineStorageClassC89.c index ec2b1ec70bec..834fb07a2623 100644 --- a/test/FrontendC/2007-04-11-InlineStorageClassC89.c +++ b/test/FrontendC/2007-04-11-InlineStorageClassC89.c @@ -1,17 +1,17 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xglobWeak | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | grep xglobWeak | \ // RUN: grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | grep xextWeak | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | grep xextWeak | \ // RUN: grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep -v internal | grep -v weak | \ // RUN: grep -v linkonce | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); diff --git a/test/FrontendC/2007-04-11-InlineStorageClassC99.c b/test/FrontendC/2007-04-11-InlineStorageClassC99.c index 89af2789b3e5..6031071e3464 100644 --- a/test/FrontendC/2007-04-11-InlineStorageClassC99.c +++ b/test/FrontendC/2007-04-11-InlineStorageClassC99.c @@ -1,17 +1,17 @@ -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep declare | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep declare | \ // RUN: grep xglobWeak | grep extern_weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xextWeak | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xWeaknoinline | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xWeakextnoinline | grep weak | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xglobnoWeak | grep available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xstatnoWeak | grep internal | count 1 -// RUN: %llvmgcc -std=c99 %s -S -emit-llvm -O0 -o - | grep define | \ +// RUN: %llvmgcc -std=c99 %s -S -O0 -o - | grep define | \ // RUN: grep xextnoWeak | grep -v available_externally | grep -v weak | \ // RUN: grep -v linkonce | count 1 inline int xglobWeak(int) __attribute__((weak)); diff --git a/test/FrontendC/2007-04-13-InlineAsmStruct2.c b/test/FrontendC/2007-04-13-InlineAsmStruct2.c index e4870e75be2f..44ddeb3f95d8 100644 --- a/test/FrontendC/2007-04-13-InlineAsmStruct2.c +++ b/test/FrontendC/2007-04-13-InlineAsmStruct2.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep {call void asm} +// RUN: %llvmgcc %s -S -o - | grep {call void asm} struct V { short X, Y; }; int bar() { diff --git a/test/FrontendC/2007-04-13-InlineAsmUnion2.c b/test/FrontendC/2007-04-13-InlineAsmUnion2.c index 284654d223c0..a0944a7b6407 100644 --- a/test/FrontendC/2007-04-13-InlineAsmUnion2.c +++ b/test/FrontendC/2007-04-13-InlineAsmUnion2.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep {call void asm} +// RUN: %llvmgcc %s -S -o - | grep {call void asm} union U { int x; char* p; }; void foo() { diff --git a/test/FrontendC/2007-04-24-VolatileStructCopy.c b/test/FrontendC/2007-04-24-VolatileStructCopy.c index 4765921f1d21..d49e75e02541 100644 --- a/test/FrontendC/2007-04-24-VolatileStructCopy.c +++ b/test/FrontendC/2007-04-24-VolatileStructCopy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {volatile store} +// RUN: %llvmgcc -O3 -S -o - %s | grep {volatile store} // PR1352 struct foo { diff --git a/test/FrontendC/2007-04-24-bit-not-expr.c b/test/FrontendC/2007-04-24-bit-not-expr.c index 1c27f181c0e4..fab0b90bb15f 100644 --- a/test/FrontendC/2007-04-24-bit-not-expr.c +++ b/test/FrontendC/2007-04-24-bit-not-expr.c @@ -1,5 +1,5 @@ // PR 1346 -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null extern bar(void *); void f(void *cd) { diff --git a/test/FrontendC/2007-04-24-str-const.c b/test/FrontendC/2007-04-24-str-const.c index 4c109c41b019..3c3dab372ab5 100644 --- a/test/FrontendC/2007-04-24-str-const.c +++ b/test/FrontendC/2007-04-24-str-const.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null static char *str; static const struct { diff --git a/test/FrontendC/2007-05-07-PaddingElements.c b/test/FrontendC/2007-05-07-PaddingElements.c index 9be8850895ae..1e4f4d0a7512 100644 --- a/test/FrontendC/2007-05-07-PaddingElements.c +++ b/test/FrontendC/2007-05-07-PaddingElements.c @@ -1,6 +1,6 @@ // PR 1278 -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep {struct.s} | not grep "4 x i8] zeroinitializer" -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | not grep "i32 0, i32 2" +// RUN: %llvmgcc %s -S -O0 -o - | grep {struct.s} | not grep "4 x i8] zeroinitializer" +// RUN: %llvmgcc %s -S -O0 -o - | not grep "i32 0, i32 2" struct s { double d1; int s1; diff --git a/test/FrontendC/2007-05-11-str-const.c b/test/FrontendC/2007-05-11-str-const.c index 48deddbb019e..46a74c19e017 100644 --- a/test/FrontendC/2007-05-11-str-const.c +++ b/test/FrontendC/2007-05-11-str-const.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -g %s -o /dev/null +// RUN: %llvmgcc -S -g %s -o /dev/null static unsigned char out[]={0,1}; static const unsigned char str1[]="1"; diff --git a/test/FrontendC/2007-05-15-PaddingElement.c b/test/FrontendC/2007-05-15-PaddingElement.c index a218b3594d72..bad6a11dae81 100644 --- a/test/FrontendC/2007-05-15-PaddingElement.c +++ b/test/FrontendC/2007-05-15-PaddingElement.c @@ -1,6 +1,6 @@ // PR 1419 -// RUN: %llvmgcc -xc -O2 %s -c -o - | llvm-dis | grep "ret i32 1" +// RUN: %llvmgcc -xc -O2 %s -S -o - | grep "ret i32 1" struct A { short x; long long :0; diff --git a/test/FrontendC/2007-05-16-EmptyStruct.c b/test/FrontendC/2007-05-16-EmptyStruct.c index 23c0b1d6a3f6..7b2ab61bccaf 100644 --- a/test/FrontendC/2007-05-16-EmptyStruct.c +++ b/test/FrontendC/2007-05-16-EmptyStruct.c @@ -1,5 +1,5 @@ // PR 1417 -// RUN: %llvmgcc -xc %s -c -o - | llvm-dis | grep "struct.anon = type \{\}" +// RUN: %llvmgcc -xc %s -S -o - | grep "struct.anon = type \{\}" struct { } *X; diff --git a/test/FrontendC/2007-05-29-UnionCopy.c b/test/FrontendC/2007-05-29-UnionCopy.c index ded67d4d6b28..95ab388c842f 100644 --- a/test/FrontendC/2007-05-29-UnionCopy.c +++ b/test/FrontendC/2007-05-29-UnionCopy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -o - -emit-llvm %s | grep memcpy +// RUN: %llvmgcc -S -o - %s | grep memcpy // PR1421 struct A { diff --git a/test/FrontendC/2007-06-05-NoInlineAttribute.c b/test/FrontendC/2007-06-05-NoInlineAttribute.c index b11b3c779684..9543538fb1b9 100644 --- a/test/FrontendC/2007-06-05-NoInlineAttribute.c +++ b/test/FrontendC/2007-06-05-NoInlineAttribute.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -O2 -c -emit-llvm %s -o - | llvm-dis | grep call +// RUN: %llvmgcc -O2 -S %s -o - | grep call static int bar(int x, int y) __attribute__((noinline)); diff --git a/test/FrontendC/2007-06-15-AnnotateAttribute.c b/test/FrontendC/2007-06-15-AnnotateAttribute.c index 009911737036..115c3f73b90b 100644 --- a/test/FrontendC/2007-06-15-AnnotateAttribute.c +++ b/test/FrontendC/2007-06-15-AnnotateAttribute.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.global.annotations -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.var.annotation | count 3 +// RUN: %llvmgcc -S %s -o - | grep llvm.global.annotations +// RUN: %llvmgcc -S %s -o - | grep llvm.var.annotation | count 3 #include <stdio.h> diff --git a/test/FrontendC/2007-06-18-SextAttrAggregate.c b/test/FrontendC/2007-06-18-SextAttrAggregate.c index 2fcd72607a2a..c395db220dc6 100644 --- a/test/FrontendC/2007-06-18-SextAttrAggregate.c +++ b/test/FrontendC/2007-06-18-SextAttrAggregate.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -o - -S -emit-llvm -O3 | grep {i8 signext} +// RUN: %llvmgcc %s -o - -S -O3 | grep {i8 signext} // PR1513 struct s{ diff --git a/test/FrontendC/2007-07-29-RestrictPtrArg.c b/test/FrontendC/2007-07-29-RestrictPtrArg.c index 99eae39054b3..5925d972b269 100644 --- a/test/FrontendC/2007-07-29-RestrictPtrArg.c +++ b/test/FrontendC/2007-07-29-RestrictPtrArg.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep noalias +// RUN: %llvmgcc -S %s -o - | grep noalias void foo(int * __restrict myptr1, int * myptr2) { myptr1[0] = 0; diff --git a/test/FrontendC/2007-08-01-LoadStoreAlign.c b/test/FrontendC/2007-08-01-LoadStoreAlign.c index 75a82c14ad0f..5365c06c2579 100644 --- a/test/FrontendC/2007-08-01-LoadStoreAlign.c +++ b/test/FrontendC/2007-08-01-LoadStoreAlign.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep {align 1} | count 2 -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llc +// RUN: %llvmgcc -O3 -S -o - %s | grep {align 1} | count 2 +// RUN: %llvmgcc -O3 -S -o - %s | llc struct p { char a; diff --git a/test/FrontendC/2007-08-21-ComplexCst.c b/test/FrontendC/2007-08-21-ComplexCst.c index 7ddd87c08e48..ebdee14bba35 100644 --- a/test/FrontendC/2007-08-21-ComplexCst.c +++ b/test/FrontendC/2007-08-21-ComplexCst.c @@ -1,3 +1,3 @@ -// RUN: %llvmgcc -O2 -c %s -o /dev/null +// RUN: %llvmgcc -O2 -S %s -o /dev/null void f(_Complex float z); void g() { f(1.0i); } diff --git a/test/FrontendC/2007-09-05-ConstCtor.c b/test/FrontendC/2007-09-05-ConstCtor.c index 8e0e9945ffaa..adae4a69b103 100644 --- a/test/FrontendC/2007-09-05-ConstCtor.c +++ b/test/FrontendC/2007-09-05-ConstCtor.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -xc -Os -c %s -o /dev/null +// RUN: %llvmgcc -xc -Os -S %s -o /dev/null // PR1641 struct A { diff --git a/test/FrontendC/2007-09-20-GcrootAttribute.c b/test/FrontendC/2007-09-20-GcrootAttribute.c index 23cd37ff6a55..b67b474c4c1b 100644 --- a/test/FrontendC/2007-09-20-GcrootAttribute.c +++ b/test/FrontendC/2007-09-20-GcrootAttribute.c @@ -1,6 +1,6 @@ -// RUN: %llvmgcc -S -emit-llvm %s -o - | grep llvm.gcroot -// RUN: %llvmgcc -S -emit-llvm %s -o - | grep llvm.gcroot | count 6 -// RUN: %llvmgcc -S -emit-llvm %s -o - | llvm-as +// RUN: %llvmgcc -S %s -o - | grep llvm.gcroot +// RUN: %llvmgcc -S %s -o - | grep llvm.gcroot | count 6 +// RUN: %llvmgcc -S %s -o - | llvm-as typedef struct foo_s { diff --git a/test/FrontendC/2007-10-01-BuildArrayRef.c b/test/FrontendC/2007-10-01-BuildArrayRef.c index e9037552308a..e87a5b630540 100644 --- a/test/FrontendC/2007-10-01-BuildArrayRef.c +++ b/test/FrontendC/2007-10-01-BuildArrayRef.c @@ -1,8 +1,20 @@ -// RUN: not %llvmgcc -S %s -o /dev/null |& grep "error: assignment of read-only location" +// RUN: not %llvmgcc_only -c %s -o /dev/null |& FileCheck %s // PR 1603 -int func() +void func() { const int *arr; - arr[0] = 1; + arr[0] = 1; // CHECK: error: assignment of read-only location } +struct foo { + int bar; +}; +struct foo sfoo = { 0 }; + +int func2() +{ + const struct foo *fp; + fp = &sfoo; + fp[0].bar = 1; // CHECK: error: assignment of read-only member 'bar' + return sfoo.bar; +} diff --git a/test/FrontendC/2007-11-07-AlignedMemcpy.c b/test/FrontendC/2007-11-07-AlignedMemcpy.c index f1900bb646b4..eb9d22c62523 100644 --- a/test/FrontendC/2007-11-07-AlignedMemcpy.c +++ b/test/FrontendC/2007-11-07-AlignedMemcpy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null void bork() { int Qux[33] = {0}; } diff --git a/test/FrontendC/2007-11-27-SExtZExt.c b/test/FrontendC/2007-11-27-SExtZExt.c index 2b6cd6232d52..8ea4786af369 100644 --- a/test/FrontendC/2007-11-27-SExtZExt.c +++ b/test/FrontendC/2007-11-27-SExtZExt.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S %s -emit-llvm -o - | grep "signext" | count 4 +// RUN: %llvmgcc -S %s -o - | grep "signext" | count 4 signed char foo1() { return 1; } diff --git a/test/FrontendC/2008-01-25-ByValReadNone.c b/test/FrontendC/2008-01-25-ByValReadNone.c index 42e9c3626297..4cb1a6394eaa 100644 --- a/test/FrontendC/2008-01-25-ByValReadNone.c +++ b/test/FrontendC/2008-01-25-ByValReadNone.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | not grep readonly -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | not grep readnone +// RUN: %llvmgcc -O3 -S -o - %s | not grep readonly +// RUN: %llvmgcc -O3 -S -o - %s | not grep readnone // The struct being passed byval means that we cannot mark the diff --git a/test/FrontendC/2008-01-28-PragmaMark.c b/test/FrontendC/2008-01-28-PragmaMark.c index 0b3ac17df32a..6a4b5b52ff2f 100644 --- a/test/FrontendC/2008-01-28-PragmaMark.c +++ b/test/FrontendC/2008-01-28-PragmaMark.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -Werror -c %s -o /dev/null +// RUN: %llvmgcc -Werror -S %s -o /dev/null #pragma mark LLVM's world #ifdef DO_ERROR #error LLVM's world diff --git a/test/FrontendC/2008-03-03-CtorAttrType.c b/test/FrontendC/2008-03-03-CtorAttrType.c index dc0e47d811a4..96648f4ec5a6 100644 --- a/test/FrontendC/2008-03-03-CtorAttrType.c +++ b/test/FrontendC/2008-03-03-CtorAttrType.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.global_ctors +// RUN: %llvmgcc %s -S -o - | grep llvm.global_ctors int __attribute__((constructor)) foo(void) { return 0; } diff --git a/test/FrontendC/2008-03-05-syncPtr.c b/test/FrontendC/2008-03-05-syncPtr.c index 43e46717b279..7b271f7ee747 100644 --- a/test/FrontendC/2008-03-05-syncPtr.c +++ b/test/FrontendC/2008-03-05-syncPtr.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.atomic +// RUN: %llvmgcc %s -S -o - | grep llvm.atomic // XFAIL: sparc-sun-solaris2|arm // Feature currently implemented only for x86, alpha, powerpc. diff --git a/test/FrontendC/2008-05-19-AlwaysInline.c b/test/FrontendC/2008-05-19-AlwaysInline.c index 506f6cf9c509..8dcb57b1862e 100644 --- a/test/FrontendC/2008-05-19-AlwaysInline.c +++ b/test/FrontendC/2008-05-19-AlwaysInline.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -S -fno-unit-at-a-time -emit-llvm -O0 -o - | not grep sabrina -// RUN: %llvmgcc %s -S -funit-at-a-time -emit-llvm -O0 -o - | not grep sabrina +// RUN: %llvmgcc %s -S -fno-unit-at-a-time -O0 -o - | not grep sabrina +// RUN: %llvmgcc %s -S -funit-at-a-time -O0 -o - | not grep sabrina static inline int sabrina (void) __attribute__((always_inline)); static inline int sabrina (void) diff --git a/test/FrontendC/2008-08-07-AlignPadding1.c b/test/FrontendC/2008-08-07-AlignPadding1.c index 776b1052f135..6be9fe4ed3b5 100644 --- a/test/FrontendC/2008-08-07-AlignPadding1.c +++ b/test/FrontendC/2008-08-07-AlignPadding1.c @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O0 | grep {zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer} +/* RUN: %llvmgcc %s -S -o - -O0 | grep {zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer.*zeroinitializer} The FE must generate padding here both at the end of each PyG_Head and between array elements. Reduced from Python. */ diff --git a/test/FrontendC/2008-08-07-AlignPadding2.c b/test/FrontendC/2008-08-07-AlignPadding2.c index ea13a0a1bc67..51135ba633a2 100644 --- a/test/FrontendC/2008-08-07-AlignPadding2.c +++ b/test/FrontendC/2008-08-07-AlignPadding2.c @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O0 | grep zeroinitializer | count 1 +/* RUN: %llvmgcc %s -S -o - -O0 | grep zeroinitializer | count 1 The FE must not generate padding here between array elements. PR 2533. */ diff --git a/test/FrontendC/2008-10-30-ZeroPlacement.c b/test/FrontendC/2008-10-30-ZeroPlacement.c index ec4ea94a115f..d73442dca8b9 100644 --- a/test/FrontendC/2008-10-30-ZeroPlacement.c +++ b/test/FrontendC/2008-10-30-ZeroPlacement.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s +// RUN: %llvmgcc -S %s // PR2987 struct S2045 { diff --git a/test/FrontendC/2008-11-02-WeakAlias.c b/test/FrontendC/2008-11-02-WeakAlias.c index befafe455149..d10e57f5efe0 100644 --- a/test/FrontendC/2008-11-02-WeakAlias.c +++ b/test/FrontendC/2008-11-02-WeakAlias.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -emit-llvm -o - %s | grep weak +// RUN: %llvmgcc -S -o - %s | grep weak // PR2691 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); diff --git a/test/FrontendC/2008-11-08-InstCombineSelect.c b/test/FrontendC/2008-11-08-InstCombineSelect.c index 70c8d3a22486..b850d3ff6f25 100644 --- a/test/FrontendC/2008-11-08-InstCombineSelect.c +++ b/test/FrontendC/2008-11-08-InstCombineSelect.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O2 -o - +// RUN: %llvmgcc %s -S -O2 -o - // PR3028 int g_187; diff --git a/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c b/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c index fa5713e2482b..8af59d54f751 100644 --- a/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c +++ b/test/FrontendC/2008-11-11-AnnotateStructFieldAttribute.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -emit-llvm %s -o - | llvm-dis | grep llvm.ptr.annotation | count 3 +// RUN: %llvmgcc -S %s -o - | grep llvm.ptr.annotation | count 3 #include <stdio.h> diff --git a/test/FrontendC/2008-12-23-AsmIntPointerTie.c b/test/FrontendC/2008-12-23-AsmIntPointerTie.c index da2eda6628ed..57061422b8f2 100644 --- a/test/FrontendC/2008-12-23-AsmIntPointerTie.c +++ b/test/FrontendC/2008-12-23-AsmIntPointerTie.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - +// RUN: %llvmgcc %s -S -O1 -o - #include <stdint.h> diff --git a/test/FrontendC/2009-01-05-BlockInlining.c b/test/FrontendC/2009-01-05-BlockInlining.c index 9692d8f688ab..8fb6e54514a5 100644 --- a/test/FrontendC/2009-01-05-BlockInlining.c +++ b/test/FrontendC/2009-01-05-BlockInlining.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O2 -o %t.s +// RUN: %llvmgcc %s -S -O2 -o %t.s // RUN: grep {call i32 .*printf.*argc} %t.s | count 3 // RUN: not grep __block_holder_tmp %t.s // rdar://5865221 diff --git a/test/FrontendC/2009-03-13-dbg.c b/test/FrontendC/2009-03-13-dbg.c index aa13af41248c..46abd3a96382 100644 --- a/test/FrontendC/2009-03-13-dbg.c +++ b/test/FrontendC/2009-03-13-dbg.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -g -o /dev/null +// RUN: %llvmgcc %s -S -g -o /dev/null // XTARGET: darwin,linux // XFAIL: * void foo() {} diff --git a/test/FrontendC/2009-05-04-EnumInreg.c b/test/FrontendC/2009-05-04-EnumInreg.c index 6dbdb54db5f6..fb0c03e439e6 100644 --- a/test/FrontendC/2009-05-04-EnumInreg.c +++ b/test/FrontendC/2009-05-04-EnumInreg.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S -m32 -mregparm=3 %s -emit-llvm -o - | grep {inreg %action} +// RUN: %llvmgcc -S -m32 -mregparm=3 %s -o - | grep {inreg %action} // XFAIL: * // XTARGET: x86,i386,i686 // PR3967 diff --git a/test/FrontendC/2010-01-13-MemBarrier.c b/test/FrontendC/2010-01-13-MemBarrier.c index 8fcd5228781e..a540e59c6caa 100644 --- a/test/FrontendC/2010-01-13-MemBarrier.c +++ b/test/FrontendC/2010-01-13-MemBarrier.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // XFAIL: sparc // rdar://7536390 diff --git a/test/FrontendC/2010-05-18-asmsched.c b/test/FrontendC/2010-05-18-asmsched.c index 12e91405d10f..33b87703220c 100644 --- a/test/FrontendC/2010-05-18-asmsched.c +++ b/test/FrontendC/2010-05-18-asmsched.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -O3 -emit-llvm -o - | llc -march=x86-64 -mtriple=x86_64-apple-darwin | FileCheck %s +// RUN: %llvmgcc %s -S -O3 -o - | llc -march=x86-64 -mtriple=x86_64-apple-darwin | FileCheck %s // r9 used to be clobbered before its value was moved to r10. 7993104. void foo(int x, int y) { diff --git a/test/FrontendC/2010-05-26-AsmSideEffect.c b/test/FrontendC/2010-05-26-AsmSideEffect.c index c5f75799dd3b..acc38b783ba3 100644 --- a/test/FrontendC/2010-05-26-AsmSideEffect.c +++ b/test/FrontendC/2010-05-26-AsmSideEffect.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // Radar 8026855 int test (void *src) { diff --git a/test/FrontendC/2010-06-28-nowarn.c b/test/FrontendC/2010-06-28-nowarn.c index 9cfb6636fdef..3db8df10c189 100644 --- a/test/FrontendC/2010-06-28-nowarn.c +++ b/test/FrontendC/2010-06-28-nowarn.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -m32 -fasm-blocks -o /dev/null +// RUN: %llvmgcc %s -S -m32 -fasm-blocks -o /dev/null // This should not warn about unreferenced label. 7729514. // XFAIL: * // XTARGET: x86,i386,i686 diff --git a/test/FrontendC/2010-07-14-overconservative-align.c b/test/FrontendC/2010-07-14-overconservative-align.c index 1744ba84185d..c4a9caac6666 100644 --- a/test/FrontendC/2010-07-14-overconservative-align.c +++ b/test/FrontendC/2010-07-14-overconservative-align.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -emit-llvm -S -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // PR 5995 struct s { int word; diff --git a/test/FrontendC/2010-11-16-asmblock.c b/test/FrontendC/2010-11-16-asmblock.c new file mode 100644 index 000000000000..c2642235cfcc --- /dev/null +++ b/test/FrontendC/2010-11-16-asmblock.c @@ -0,0 +1,16 @@ +// RUN: %llvmgcc -S %s -fasm-blocks -o - | FileCheck %s +// XFAIL: * +// XTARGET: x86,i386,i686 +// 84282548 + +void foo() +{ +// CHECK: %0 = call i32 asm sideeffect "", "={ecx}"() nounwind +// CHECK: %asmtmp = call i32 asm sideeffect alignstack "sall $$3, $0", "={ecx},{ecx},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %0) nounwind +// CHECK: store i32 %asmtmp, i32* %"%ecx" + __asm { + sal ecx, 3; + add esi, ecx; + add edi, ecx; + } +} diff --git a/test/FrontendC/2010-12-01-CommonGlobal.c b/test/FrontendC/2010-12-01-CommonGlobal.c new file mode 100644 index 000000000000..3f6d7e885807 --- /dev/null +++ b/test/FrontendC/2010-12-01-CommonGlobal.c @@ -0,0 +1,7 @@ +// RUN: %llvmgcc -S %s -o - | llvm-as -o /dev/null +// Don't crash on a common-linkage constant global. +extern const int kABSourceTypeProperty; +int foo(void) { + return kABSourceTypeProperty; +} +const int kABSourceTypeProperty; diff --git a/test/FrontendC/arrayderef.c b/test/FrontendC/arrayderef.c new file mode 100644 index 000000000000..66c2e0ba4165 --- /dev/null +++ b/test/FrontendC/arrayderef.c @@ -0,0 +1,17 @@ +// RUN: %llvmgcc %s -S -O -o - | FileCheck %s +// The load here was getting lost because this code was close +// enough to the traditional (wrong) implementation of offsetof +// to confuse the gcc FE. 8629268. + +struct foo { + int x; + int *y; +}; + +struct foo Foo[1]; + +int * bar(unsigned int ix) { +// CHECK: load + return &Foo->y[ix]; +} + diff --git a/test/FrontendC/attribute_constructor.c b/test/FrontendC/attribute_constructor.c index b2f7c9b19fc0..da17a37e2606 100644 --- a/test/FrontendC/attribute_constructor.c +++ b/test/FrontendC/attribute_constructor.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -o - | llvm-dis | grep llvm.global_ctors +// RUN: %llvmgcc %s -S -o - | grep llvm.global_ctors void foo() __attribute__((constructor)); void foo() { diff --git a/test/FrontendC/block-copy.c b/test/FrontendC/block-copy.c index a53732e4f9ff..c088f2dc1955 100644 --- a/test/FrontendC/block-copy.c +++ b/test/FrontendC/block-copy.c @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc %s -S -o - -emit-llvm -O3 | grep {call.*memcpy} +/* RUN: %llvmgcc %s -S -o - -O3 | grep {call.*memcpy} This should compile into a memcpy from a global, not 128 stores. */ diff --git a/test/FrontendC/cstring-align.c b/test/FrontendC/cstring-align.c index 764126e02184..544c9f3d3fbb 100644 --- a/test/FrontendC/cstring-align.c +++ b/test/FrontendC/cstring-align.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -c -Os -emit-llvm -o - | llc -march=x86 -mtriple=i386-apple-darwin10 | FileCheck %s +// RUN: %llvmgcc %s -S -Os -o - | llc -march=x86 -mtriple=i386-apple-darwin10 | FileCheck %s extern void func(const char *, const char *); diff --git a/test/FrontendC/extern-weak.c b/test/FrontendC/extern-weak.c index 4729b048fbe0..73b59cc48c40 100644 --- a/test/FrontendC/extern-weak.c +++ b/test/FrontendC/extern-weak.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep extern_weak -// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llc +// RUN: %llvmgcc -O3 -S -o - %s | grep extern_weak +// RUN: %llvmgcc -O3 -S -o - %s | llc #if !defined(__linux__) && !defined(__FreeBSD__) && \ !defined(__OpenBSD__) && !defined(__CYGWIN__) && !defined(__DragonFly__) diff --git a/test/FrontendC/func-aligned.c b/test/FrontendC/func-aligned.c index 40149f49d8ec..477e82418aef 100644 --- a/test/FrontendC/func-aligned.c +++ b/test/FrontendC/func-aligned.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | FileCheck %s +// RUN: %llvmgcc %s -S -o - | FileCheck %s // rdar://7270273 void foo() __attribute__((aligned (64))); diff --git a/test/FrontendC/hidden-visibility.c b/test/FrontendC/hidden-visibility.c index fc2ae444b404..589bb53453f3 100644 --- a/test/FrontendC/hidden-visibility.c +++ b/test/FrontendC/hidden-visibility.c @@ -1,3 +1,3 @@ -// RUN: %llvmgcc %s -emit-llvm -S -o - | grep {hidden global} +// RUN: %llvmgcc %s -S -o - | grep {hidden unnamed_addr global} int X __attribute__ ((__visibility__ ("hidden"))) = 123; diff --git a/test/FrontendC/implicit-arg.c b/test/FrontendC/implicit-arg.c index 971245f3badc..a6cb8bce7ed6 100644 --- a/test/FrontendC/implicit-arg.c +++ b/test/FrontendC/implicit-arg.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - +// RUN: %llvmgcc %s -S -O0 -o - +// RUN: %llvmgcc %s -S -O1 -o - // rdar://6518089 static int bar(); diff --git a/test/FrontendC/libcalls-d.c b/test/FrontendC/libcalls-d.c index 126866ad6297..d92208d89edd 100644 --- a/test/FrontendC/libcalls-d.c +++ b/test/FrontendC/libcalls-d.c @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -fno-math-errno -emit-llvm -O0 -o - | grep {call.*exp2\\.f64} -// RUN: %llvmgcc %s -S -fmath-errno -emit-llvm -O0 -o - | grep {call.*exp2} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\.f64} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2} double exp2(double); diff --git a/test/FrontendC/libcalls-ld.c b/test/FrontendC/libcalls-ld.c index 6533eb88d9e5..cf71d19eaa35 100644 --- a/test/FrontendC/libcalls-ld.c +++ b/test/FrontendC/libcalls-ld.c @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -fno-math-errno -emit-llvm -O0 -o - | grep {call.*exp2\\..*f} -// RUN: %llvmgcc %s -S -fmath-errno -emit-llvm -O0 -o - | grep {call.*exp2l} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2l} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\..*f} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2l} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2l} // If this fails for you because your target doesn't support long double, // please xfail the test. diff --git a/test/FrontendC/libcalls.c b/test/FrontendC/libcalls.c index a2761dd5b004..60e22e7e690a 100644 --- a/test/FrontendC/libcalls.c +++ b/test/FrontendC/libcalls.c @@ -1,10 +1,10 @@ // llvm-gcc -O1+ should run simplify libcalls, O0 shouldn't // and -fno-builtins shouldn't. // -fno-math-errno should emit an llvm intrinsic, -fmath-errno should not. -// RUN: %llvmgcc %s -S -emit-llvm -fno-math-errno -O0 -o - | grep {call.*exp2\\.f32} -// RUN: %llvmgcc %s -S -emit-llvm -fmath-errno -O0 -o - | grep {call.*exp2f} -// RUN: %llvmgcc %s -S -emit-llvm -O1 -o - | grep {call.*ldexp} -// RUN: %llvmgcc %s -S -emit-llvm -O3 -fno-builtin -o - | grep {call.*exp2f} +// RUN: %llvmgcc %s -S -fno-math-errno -O0 -o - | grep {call.*exp2\\.f32} +// RUN: %llvmgcc %s -S -fmath-errno -O0 -o - | grep {call.*exp2f} +// RUN: %llvmgcc %s -S -O1 -o - | grep {call.*ldexp} +// RUN: %llvmgcc %s -S -O3 -fno-builtin -o - | grep {call.*exp2f} float exp2f(float); diff --git a/test/FrontendC/pr3518.c b/test/FrontendC/pr3518.c index 4c193c7739b2..112394a651b4 100644 --- a/test/FrontendC/pr3518.c +++ b/test/FrontendC/pr3518.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep {= internal global} | count 4 +// RUN: %llvmgcc %s -S -O0 -o - | grep {= internal unnamed_addr global} | count 4 // PR 3518 // Some of the objects were coming out as unintialized (external) before 3518 // was fixed. Internal names are different between llvm-gcc and clang so they diff --git a/test/FrontendC/pr4349.c b/test/FrontendC/pr4349.c index fbd7e56eba15..24acd9c950f9 100644 --- a/test/FrontendC/pr4349.c +++ b/test/FrontendC/pr4349.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | FileCheck %s +// RUN: %llvmgcc %s -S -O0 -o - | FileCheck %s // PR 4349 union reg @@ -16,22 +16,22 @@ struct svar { void *ptr; }; -// CHECK: @svars1 = global [1 x %struct.svar] [%struct.svar { i8* bitcast (%struct.cpu* @cpu to i8*) }] +// CHECK: @svars1 = unnamed_addr global [1 x %struct.svar] [%struct.svar { i8* bitcast (%struct.cpu* @cpu to i8*) }] struct svar svars1[] = { { &((cpu.pc).w[0]) } }; -// CHECK: @svars2 = global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x i8]* bitcast (%struct.cpu* @cpu to [2 x i8]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) }] +// CHECK: @svars2 = unnamed_addr global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x i8]* bitcast (%struct.cpu* @cpu to [2 x i8]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) }] struct svar svars2[] = { { &((cpu.pc).b[0][1]) } }; -// CHECK: @svars3 = global [1 x %struct.svar] [%struct.svar { i8* bitcast (i16* getelementptr ([2 x i16]* bitcast (%struct.cpu* @cpu to [2 x i16]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) to i8*) }] +// CHECK: @svars3 = unnamed_addr global [1 x %struct.svar] [%struct.svar { i8* bitcast (i16* getelementptr ([2 x i16]* bitcast (%struct.cpu* @cpu to [2 x i16]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1) to i8*) }] struct svar svars3[] = { { &((cpu.pc).w[1]) } }; -// CHECK: @svars4 = global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x [2 x i8]]* bitcast (%struct.cpu* @cpu to [2 x [2 x i8]]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1, i{{[0-9]+}} 1) }] +// CHECK: @svars4 = unnamed_addr global [1 x %struct.svar] [%struct.svar { i8* getelementptr ([2 x [2 x i8]]* bitcast (%struct.cpu* @cpu to [2 x [2 x i8]]*), i{{[0-9]+}} 0, i{{[0-9]+}} 1, i{{[0-9]+}} 1) }] struct svar svars4[] = { { &((cpu.pc).b[1][1]) } diff --git a/test/FrontendC/pr5406.c b/test/FrontendC/pr5406.c index 492bdafa7eda..0b1f277592fb 100644 --- a/test/FrontendC/pr5406.c +++ b/test/FrontendC/pr5406.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | FileCheck %s +// RUN: %llvmgcc %s -S -O0 -o - | FileCheck %s // PR 5406 // XFAIL: * diff --git a/test/FrontendC/ptr-rotate.c b/test/FrontendC/ptr-rotate.c index 56c21f46e7ae..36d9755dd674 100644 --- a/test/FrontendC/ptr-rotate.c +++ b/test/FrontendC/ptr-rotate.c @@ -1,5 +1,5 @@ -// RUN: %llvmgcc %s -c -m32 -o /dev/null -// RUN: %llvmgcc %s -c -O1 -m32 -emit-llvm -o - | llc -march=x86 -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN +// RUN: %llvmgcc %s -S -m32 -o /dev/null +// RUN: %llvmgcc %s -S -O1 -m32 -o - | llc -march=x86 -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN unsigned int func(void *A) { // DARWIN: roll $27 diff --git a/test/FrontendC/sret.c b/test/FrontendC/sret.c index 11ac5d6824e8..42666917a8df 100644 --- a/test/FrontendC/sret.c +++ b/test/FrontendC/sret.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 5 +// RUN: %llvmgcc %s -S -O0 -o - | grep sret | count 5 struct abc { long a; diff --git a/test/FrontendC/sret2.c b/test/FrontendC/sret2.c index 7b621f942fa9..0f35b1c2586f 100644 --- a/test/FrontendC/sret2.c +++ b/test/FrontendC/sret2.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -O0 -o - | grep sret | count 2 +// RUN: %llvmgcc %s -S -O0 -o - | grep sret | count 2 struct abc { long a; diff --git a/test/FrontendC/unaligned-memcpy.c b/test/FrontendC/unaligned-memcpy.c index 9e6ce07e367e..8fb84e4f5150 100644 --- a/test/FrontendC/unaligned-memcpy.c +++ b/test/FrontendC/unaligned-memcpy.c @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o - | llc +// RUN: %llvmgcc %s -S -o - | llc void bork() { char Qux[33] = {0}; diff --git a/test/FrontendFortran/2008-11-03-OptionOverride.f90 b/test/FrontendFortran/2008-11-03-OptionOverride.f90 index 316e722cd341..d65ba9b4736f 100644 --- a/test/FrontendFortran/2008-11-03-OptionOverride.f90 +++ b/test/FrontendFortran/2008-11-03-OptionOverride.f90 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s -march=k8 +! RUN: %llvmgcc -S %s -march=k8 ! XTARGET: x86 ! Note: this file intentionally left blank, the problem itself is in ! frontend initialization routines and march flag! diff --git a/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 b/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 index 870e99bd0866..ddd05c549496 100644 --- a/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 +++ b/test/FrontendFortran/2009-02-09-FloorDivExpr.f90 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s +! RUN: %llvmgcc -S %s ! PR2437 program main implicit none diff --git a/test/FrontendFortran/cpow.f90 b/test/FrontendFortran/cpow.f90 index 19ae3784c218..25156fd58971 100644 --- a/test/FrontendFortran/cpow.f90 +++ b/test/FrontendFortran/cpow.f90 @@ -1,4 +1,4 @@ -! RUN: %llvmgcc -c %s +! RUN: %llvmgcc -S %s ! PR2443 ! Program to test the power (**) operator diff --git a/test/FrontendObjC++/2007-10-03-MetadataPointers.mm b/test/FrontendObjC++/2007-10-03-MetadataPointers.mm index 5975e38f873d..2ab76c1db595 100644 --- a/test/FrontendObjC++/2007-10-03-MetadataPointers.mm +++ b/test/FrontendObjC++/2007-10-03-MetadataPointers.mm @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -w -x objective-c++ -c %s -o /dev/null +// RUN: %llvmgcc -w -x objective-c++ -S %s -o /dev/null @class NSImage; void bork() { diff --git a/test/FrontendObjC++/2010-08-02-NonPODObjectValue.mm b/test/FrontendObjC++/2010-08-02-NonPODObjectValue.mm index 298844e97b5d..da47ed0c1222 100644 --- a/test/FrontendObjC++/2010-08-02-NonPODObjectValue.mm +++ b/test/FrontendObjC++/2010-08-02-NonPODObjectValue.mm @@ -1,4 +1,4 @@ -// RUN: not %llvmgcc %s -S -emit-llvm -o - |& FileCheck %s +// RUN: not %llvmgcc %s -S -o - |& FileCheck %s // This tests for a specific diagnostic in LLVM-GCC. // Clang compiles this correctly with no diagnostic, // ergo this test will fail with a Clang-based front-end. diff --git a/test/FrontendObjC++/2010-08-04-Template.mm b/test/FrontendObjC++/2010-08-04-Template.mm index d0383406d7e2..2ebfd3e17cef 100644 --- a/test/FrontendObjC++/2010-08-04-Template.mm +++ b/test/FrontendObjC++/2010-08-04-Template.mm @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm +// RUN: %llvmgcc %s -S struct TRunSoon { template <class P1> static void Post() {} }; diff --git a/test/FrontendObjC++/2010-08-06-X.Y-syntax.mm b/test/FrontendObjC++/2010-08-06-X.Y-syntax.mm index b33d7307af49..986094c07235 100644 --- a/test/FrontendObjC++/2010-08-06-X.Y-syntax.mm +++ b/test/FrontendObjC++/2010-08-06-X.Y-syntax.mm @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm +// RUN: %llvmgcc %s -S struct TFENode { TFENode(const TFENode& inNode); }; diff --git a/test/FrontendObjC/2007-04-03-ObjcEH.m b/test/FrontendObjC/2007-04-03-ObjcEH.m index 353323d325f1..ae744c785009 100644 --- a/test/FrontendObjC/2007-04-03-ObjcEH.m +++ b/test/FrontendObjC/2007-04-03-ObjcEH.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null @interface B -(int)bar; diff --git a/test/FrontendObjC/2007-05-02-Strong.m b/test/FrontendObjC/2007-05-02-Strong.m index 3778fd29f436..34b41ad964f5 100644 --- a/test/FrontendObjC/2007-05-02-Strong.m +++ b/test/FrontendObjC/2007-05-02-Strong.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -fobjc-gc -o /dev/null +// RUN: %llvmgcc -S %s -fobjc-gc -o /dev/null typedef int NSInteger; typedef struct _NSRect { int origin; diff --git a/test/FrontendObjC/2007-09-25-EH.m b/test/FrontendObjC/2007-09-25-EH.m index 5fa9cbb85d82..d625584a6c54 100644 --- a/test/FrontendObjC/2007-09-25-EH.m +++ b/test/FrontendObjC/2007-09-25-EH.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c -w -m64 -mmacosx-version-min=10.5 %s -o /dev/null +// RUN: %llvmgcc -S -w -m64 -mmacosx-version-min=10.5 %s -o /dev/null // XFAIL: * // XTARGET: darwin @class NSDictionary, DSoBuffer, DSoDirectory, NSMutableArray; diff --git a/test/FrontendObjC/2007-10-18-ProDescriptor.m b/test/FrontendObjC/2007-10-18-ProDescriptor.m index e87a43ffc979..220fdd2c2329 100644 --- a/test/FrontendObjC/2007-10-18-ProDescriptor.m +++ b/test/FrontendObjC/2007-10-18-ProDescriptor.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -x objective-c -c %s -o /dev/null +// RUN: %llvmgcc -x objective-c -S %s -o /dev/null @protocol O @end @interface O < O > { diff --git a/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m b/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m index 866c3304887e..4bbe4407bed9 100644 --- a/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m +++ b/test/FrontendObjC/2007-10-23-GC-WriteBarrier.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -x objective-c -c %s -o /dev/null -fobjc-gc +// RUN: %llvmgcc -x objective-c -S %s -o /dev/null -fobjc-gc // rdar://5541393 typedef unsigned int NSUInteger; diff --git a/test/FrontendObjC/2008-10-3-EhValue.m b/test/FrontendObjC/2008-10-3-EhValue.m index a4c0cae075ad..c7aabe271eeb 100644 --- a/test/FrontendObjC/2008-10-3-EhValue.m +++ b/test/FrontendObjC/2008-10-3-EhValue.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -w -x objective-c -c %s -o /dev/null +// RUN: %llvmgcc -w -x objective-c -S %s -o /dev/null @interface Object { @public diff --git a/test/FrontendObjC/2008-11-12-Metadata.m b/test/FrontendObjC/2008-11-12-Metadata.m index 7e9f02853991..be8ee41e77ad 100644 --- a/test/FrontendObjC/2008-11-12-Metadata.m +++ b/test/FrontendObjC/2008-11-12-Metadata.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -x objective-c -m64 -c %s -o /dev/null +// RUN: %llvmgcc -x objective-c -m64 -S %s -o /dev/null @interface A @end diff --git a/test/FrontendObjC/2008-11-25-Blocks.m b/test/FrontendObjC/2008-11-25-Blocks.m index 258d70a54f0f..c5cd3d2a0b2f 100644 --- a/test/FrontendObjC/2008-11-25-Blocks.m +++ b/test/FrontendObjC/2008-11-25-Blocks.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -c %s -o /dev/null +// RUN: %llvmgcc -S %s -o /dev/null // rdar://6394879 @interface bork diff --git a/test/FrontendObjC/2009-02-05-VolatileProp.m b/test/FrontendObjC/2009-02-05-VolatileProp.m index 461f92b51d2c..1deef739bee2 100644 --- a/test/FrontendObjC/2009-02-05-VolatileProp.m +++ b/test/FrontendObjC/2009-02-05-VolatileProp.m @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc -w -x objective-c -c %s -o /dev/null -pedantic-errors +/* RUN: %llvmgcc -w -x objective-c -S %s -o /dev/null -pedantic-errors rdar://6551276 */ void foo(const unsigned short *); diff --git a/test/FrontendObjC/2009-04-14-AsmSection.m b/test/FrontendObjC/2009-04-14-AsmSection.m index de2cef00ff56..aefe08876716 100644 --- a/test/FrontendObjC/2009-04-14-AsmSection.m +++ b/test/FrontendObjC/2009-04-14-AsmSection.m @@ -1,4 +1,4 @@ -// RUN: %llvmgcc -S %s -fobjc-abi-version=2 -emit-llvm -o %t +// RUN: %llvmgcc -S %s -fobjc-abi-version=2 -o %t // RUN: grep {OBJC_CLASS_\\\$_A.*section.*__DATA, __objc_data.*align} %t // XTARGET: darwin diff --git a/test/FrontendObjC/2009-08-05-utf16.m b/test/FrontendObjC/2009-08-05-utf16.m index 2964ecfd4991..df3745c48700 100644 --- a/test/FrontendObjC/2009-08-05-utf16.m +++ b/test/FrontendObjC/2009-08-05-utf16.m @@ -1,4 +1,4 @@ -/* RUN: %llvmgcc -w -x objective-c -S %s -o - | grep {__utf16_string_1} | grep {internal constant} | grep {12 x i8} +/* RUN: %llvmgcc -w -x objective-c -S %s -o - | grep {__utf16_string_1} | grep {internal unnamed_addr constant} | grep {12 x i8} rdar://7095855 rdar://7115749 */ void *P = @"iPod™"; diff --git a/test/FrontendObjC/2010-02-11-fwritable-stringsBug.m b/test/FrontendObjC/2010-02-11-fwritable-stringsBug.m index 13e16312cf66..bb00f6a1e2c6 100644 --- a/test/FrontendObjC/2010-02-11-fwritable-stringsBug.m +++ b/test/FrontendObjC/2010-02-11-fwritable-stringsBug.m @@ -1,6 +1,6 @@ // RUN: %llvmgcc -x objective-c -fwritable-strings -S %s -o - | FileCheck %s -// CHECK: @.str = private constant -// CHECK: @.str1 = internal global +// CHECK: @.str = private unnamed_addr constant +// CHECK: @.str1 = internal unnamed_addr global // rdar://7634471 diff --git a/test/LLVMC/C++/dg.exp b/test/LLVMC/C++/dg.exp index fc852e30acf8..209345540c11 100644 --- a/test/LLVMC/C++/dg.exp +++ b/test/LLVMC/C++/dg.exp @@ -1,5 +1,5 @@ load_lib llvm.exp if [ llvm_gcc_supports c++ ] then { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{unk,ll,c,cpp}]] } diff --git a/test/LLVMC/C++/just-compile.cpp b/test/LLVMC/C++/just-compile.cpp new file mode 100644 index 000000000000..771c9822da69 --- /dev/null +++ b/test/LLVMC/C++/just-compile.cpp @@ -0,0 +1,10 @@ +// Test that the -c flag works. +// RUN: llvmc -c %s -o %t.o +// RUN: llvmc --linker=c++ %t.o -o %t +// RUN: %abs_tmp | grep hello +// XFAIL: vg +#include <iostream> + +int main() { + std::cout << "hello" << '\n'; +} diff --git a/test/LLVMC/C++/unknown_suffix.unk b/test/LLVMC/C++/unknown_suffix.unk new file mode 100644 index 000000000000..bf4aea286247 --- /dev/null +++ b/test/LLVMC/C++/unknown_suffix.unk @@ -0,0 +1,9 @@ +// Test that the -x option works for files with unknown suffixes. +// RUN: llvmc -x c++ %s -o %t +// RUN: %abs_tmp | grep hello +// XFAIL: vg +#include <iostream> + +int main() { + std::cout << "hello" << '\n'; +} diff --git a/test/LLVMC/C/emit-llvm-opt.c b/test/LLVMC/C/emit-llvm-opt.c new file mode 100644 index 000000000000..50710cf9dba2 --- /dev/null +++ b/test/LLVMC/C/emit-llvm-opt.c @@ -0,0 +1,9 @@ +// Check that -emit-llvm [-S] works with -opt. + +// RUN: llvmc -c -opt -emit-llvm -o - %s | llvm-dis | grep "@f0()" | count 1 +// RUN: llvmc -c -opt -emit-llvm -S -o - %s | grep "@f0()" | count 1 +// RUN: llvmc --dry-run -c -opt -emit-llvm %s |& grep "^opt" +// XFAIL: vg_leak + +int f0(void) { +} diff --git a/test/LLVMC/C/emit-llvm.c b/test/LLVMC/C/emit-llvm.c index 9844bc757cc6..56a1e30b2e42 100644 --- a/test/LLVMC/C/emit-llvm.c +++ b/test/LLVMC/C/emit-llvm.c @@ -1,4 +1,7 @@ +// Check that -emit-llvm [-S] works correctly. + // RUN: llvmc -c -emit-llvm -o - %s | llvm-dis | grep "@f0()" | count 1 +// RUN: llvmc -c -emit-llvm -S -o - %s | grep "@f0()" | count 1 // XFAIL: vg_leak int f0(void) { diff --git a/test/LLVMC/MultipleOutputLanguages.td b/test/LLVMC/MultipleOutputLanguages.td new file mode 100644 index 000000000000..ae0c92eefcf1 --- /dev/null +++ b/test/LLVMC/MultipleOutputLanguages.td @@ -0,0 +1,27 @@ +// Check that multiple output languages work. +// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t +// RUN: FileCheck -input-file %t %s +// RUN: %compile_cxx %t +// XFAIL: vg_leak + +include "llvm/CompilerDriver/Common.td" + +def dummy_tool : Tool<[ + (command "dummy_cmd"), + (in_language "dummy_lang"), + (out_language "another_dummy_lang", "yet_another_dummy_lang") +]>; + +def another_dummy_tool : Tool<[ + (command "another_dummy_cmd"), + (in_language "another_dummy_lang", "some_other_dummy_lang"), + (out_language "executable"), + (join) +]>; + +// CHECK: new SimpleEdge("dummy_tool") +// CHECK: new SimpleEdge("another_dummy_tool") +def DummyGraph : CompilationGraph<[ + (edge "root", "dummy_tool"), + (edge "dummy_tool", "another_dummy_tool") +]>; diff --git a/test/LLVMC/OptionPreprocessor.td b/test/LLVMC/OptionPreprocessor.td index 8019c42634f3..5fdc35a187eb 100644 --- a/test/LLVMC/OptionPreprocessor.td +++ b/test/LLVMC/OptionPreprocessor.td @@ -22,7 +22,7 @@ def Preprocess : OptionPreprocessor< // CHECK: foo = false; // CHECK: foo_p = ""; // CHECK: foo_l.clear(); - (and (switch_on "foo"), (any_switch_on ["bar", "baz"])), + (and (switch_on "foo"), (any_switch_on "bar", "baz")), [(warning "W1"), (unset_option "foo"), (unset_option "foo_p"), (unset_option "foo_l")], // CHECK: W2 @@ -34,7 +34,7 @@ def Preprocess : OptionPreprocessor< // CHECK: foo_l.push_back("qwert"); // CHECK: foo_l.push_back("yuiop"); // CHECK: foo_l.push_back("asdf"); - (and (switch_on ["foo", "bar"]), (any_empty ["foo_p", "bar_p"])), + (and (switch_on "foo", "bar"), (any_empty "foo_p", "bar_p")), [(warning "W2"), (set_option "foo"), (set_option "bar", true), (set_option "baz", false), @@ -44,8 +44,8 @@ def Preprocess : OptionPreprocessor< // CHECK: foo = true; // CHECK: bar = true; // CHECK: baz = true; - (and (empty ["foo_p", "bar_p"]), (any_not_empty ["baz_p"])), - [(warning "W3"), (set_option ["foo", "bar", "baz"])]) + (and (empty "foo_p", "bar_p"), (any_not_empty "baz_p")), + [(warning "W3"), (set_option "foo", "bar", "baz")]) >; // Shut up warnings... diff --git a/test/Linker/PR8300.ll b/test/Linker/PR8300.ll new file mode 100644 index 000000000000..f0fc1e7a5cc4 --- /dev/null +++ b/test/Linker/PR8300.ll @@ -0,0 +1,13 @@ +; RUN: echo {%foo2 = type \{ \[8 x i8\] \} \ +; RUN: declare void @zed(%foo2*) } > %t.ll +; RUN: llvm-link %t.ll %s -o %t.bc + +%foo = type { [8 x i8] } +%bar = type { [9 x i8] } + +@zed = alias bitcast (void (%bar*)* @xyz to void (%foo*)*) + +define void @xyz(%bar* %this) { +entry: + ret void +} diff --git a/test/Linker/available_externally_a.ll b/test/Linker/available_externally_a.ll new file mode 100644 index 000000000000..3ae4ce29140a --- /dev/null +++ b/test/Linker/available_externally_a.ll @@ -0,0 +1,5 @@ +; RUN: llvm-link %s %p/available_externally_b.ll -S -o - | FileCheck %s + +@foo = available_externally unnamed_addr constant i32 0 + +; CHECK: @foo = hidden unnamed_addr constant i32 0 diff --git a/test/Linker/available_externally_b.ll b/test/Linker/available_externally_b.ll new file mode 100644 index 000000000000..526981715a6e --- /dev/null +++ b/test/Linker/available_externally_b.ll @@ -0,0 +1,4 @@ +; This file is for use with available_externally_a.ll +; RUN: true + +@foo = hidden unnamed_addr constant i32 0 diff --git a/test/Linker/link-archive.ll b/test/Linker/link-archive.ll index 6696fcc68c37..9251b4e597ff 100644 --- a/test/Linker/link-archive.ll +++ b/test/Linker/link-archive.ll @@ -1,5 +1,6 @@ ; Test linking of a bc file to an archive via llvm-ld. ; PR1434 +; RUN: rm -f %t.bar.a %t.foo.a ; RUN: llvm-as %s -o %t.bar.bc ; RUN: echo {define i32* @foo(i32 %x) \{ ret i32* @baz \} \ ; RUN: @baz = external global i32 } | llvm-as -o %t.foo.bc diff --git a/test/Linker/linkmdnode.ll b/test/Linker/linkmdnode.ll index be7455056cd9..5f1158039fce 100644 --- a/test/Linker/linkmdnode.ll +++ b/test/Linker/linkmdnode.ll @@ -10,3 +10,4 @@ define void @foo() { %x = call i8 @llvm.something(metadata !21) ret void } + diff --git a/test/Linker/linkmdnode2.ll b/test/Linker/linkmdnode2.ll index 54a5a578b60b..a7d991a8a4f8 100644 --- a/test/Linker/linkmdnode2.ll +++ b/test/Linker/linkmdnode2.ll @@ -10,3 +10,13 @@ define void @foo1() { %x = call i8 @llvm.something(metadata !22) ret void } + + + +; PR9015 +define void @test() { + ret void, !abc !0 +} + +!0 = metadata !{metadata !0, i32 42 } + diff --git a/test/Linker/unnamed-addr1-a.ll b/test/Linker/unnamed-addr1-a.ll new file mode 100644 index 000000000000..1ddac9ccc028 --- /dev/null +++ b/test/Linker/unnamed-addr1-a.ll @@ -0,0 +1,27 @@ +; RUN: llvm-link %s %p/unnamed-addr1-b.ll -S -o - | sort | FileCheck %s + +; Only in this file +@a = common global i32 0 +; CHECK: @a = common global i32 0 +@b = common unnamed_addr global i32 0 +; CHECK: @b = common unnamed_addr global i32 0 + +; Other file has unnamed_addr definition +@c = common unnamed_addr global i32 0 +; CHECK: @c = common unnamed_addr global i32 0 +@d = external global i32 +; CHECK: @d = global i32 42 +@e = external unnamed_addr global i32 +; CHECK: @e = unnamed_addr global i32 42 +@f = weak global i32 42 +; CHECK: @f = global i32 42 + +; Other file has non-unnamed_addr definition +@g = common unnamed_addr global i32 0 +; CHECK: @g = common global i32 0 +@h = external global i32 +; CHECK: @h = global i32 42 +@i = external unnamed_addr global i32 +; CHECK: @i = global i32 42 +@j = weak global i32 42 +; CHECK: @j = global i32 42 diff --git a/test/Linker/unnamed-addr1-b.ll b/test/Linker/unnamed-addr1-b.ll new file mode 100644 index 000000000000..7d94dc1928c4 --- /dev/null +++ b/test/Linker/unnamed-addr1-b.ll @@ -0,0 +1,12 @@ +; This file is for use with unnamed-addr1-a.ll +; RUN: true + +@c = common unnamed_addr global i32 42 +@d = unnamed_addr global i32 42 +@e = unnamed_addr global i32 42 +@f = unnamed_addr global i32 42 + +@g = common global i32 42 +@h = global i32 42 +@i = global i32 42 +@j = global i32 42 diff --git a/test/MC/ARM/arm_fixups.s b/test/MC/ARM/arm_fixups.s new file mode 100644 index 000000000000..0dceb83c24ab --- /dev/null +++ b/test/MC/ARM/arm_fixups.s @@ -0,0 +1,7 @@ +// RUN: llvm-mc -triple arm-unknown-unknown %s --show-encoding > %t +// RUN: FileCheck < %t %s + +// CHECK: bl _printf @ encoding: [A,A,A,0xeb] +// CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbranch +bl _printf +
\ No newline at end of file diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s new file mode 100644 index 000000000000..fbec7891c801 --- /dev/null +++ b/test/MC/ARM/arm_instructions.s @@ -0,0 +1,284 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s + +@ CHECK: nop +@ CHECK: encoding: [0x00,0xf0,0x20,0xe3] + nop + +@ CHECK: nopeq +@ CHECK: encoding: [0x00,0xf0,0x20,0x03] + nopeq + +@ CHECK: trap +@ CHECK: encoding: [0xfe,0xde,0xff,0xe7] + trap + +@ CHECK: bx lr +@ CHECK: encoding: [0x1e,0xff,0x2f,0xe1] + bx lr + +@ CHECK: vqdmull.s32 q8, d17, d16 +@ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2] + vqdmull.s32 q8, d17, d16 + +@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] +@ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9] +@ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] +@ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9] + ldmia r2, {r1,r3-r6,sp} + ldmib r2, {r1,r3-r6,sp} + ldmda r2, {r1,r3-r6,sp} + ldmdb r2, {r1,r3-r6,sp} + +@ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8] +@ CHECK: stmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe9] +@ CHECK: stmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe8] +@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9] + stmia r2, {r1,r3-r6,sp} + stmib r2, {r1,r3-r6,sp} + stmda r2, {r1,r3-r6,sp} + stmdb r2, {r1,r3-r6,sp} + +@ CHECK: ldmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8] +@ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9] +@ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8] +@ CHECK: ldmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe9] + ldmia r2!, {r1,r3-r6,sp} + ldmib r2!, {r1,r3-r6,sp} + ldmda r2!, {r1,r3-r6,sp} + ldmdb r2!, {r1,r3-r6,sp} + +@ CHECK: stmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe8] +@ CHECK: stmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe9] +@ CHECK: stmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe8] +@ CHECK: stmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe9] + stmia r2!, {r1,r3-r6,sp} + stmib r2!, {r1,r3-r6,sp} + stmda r2!, {r1,r3-r6,sp} + stmdb r2!, {r1,r3-r6,sp} + +@ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0] + and r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0] + ands r1,r2,r3 + +@ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0] + eor r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: eors r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0] + eors r1,r2,r3 + +@ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0] + sub r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: subs r1, r2, r3 @ encoding: [0x03,0x10,0x52,0xe0] + subs r1,r2,r3 + +@ CHECK: add r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0] + add r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: adds r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe0] + adds r1,r2,r3 + +@ CHECK: adc r1, r2, r3 @ encoding: [0x03,0x10,0xa2,0xe0] + adc r1,r2,r3 + +@ CHECK: sbc r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe0] + sbc r1,r2,r3 + +@ CHECK: orr r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe1] + orr r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: orrs r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe1] + orrs r1,r2,r3 + +@ CHECK: bic r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1] + bic r1,r2,r3 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: bics r1, r2, r3 @ encoding: [0x03,0x10,0xd2,0xe1] + bics r1,r2,r3 + +@ CHECK: mov r1, r2 @ encoding: [0x02,0x10,0xa0,0xe1] + mov r1,r2 + +@ CHECK: mvn r1, r2 @ encoding: [0x02,0x10,0xe0,0xe1] + mvn r1,r2 + +@ FIXME: This is wrong, we are dropping the 's' for now. +@ CHECK-FIXME: mvns r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1] + mvns r1,r2 + +@ CHECK: rsb r1, r2, r3 @ encoding: [0x03,0x10,0x62,0xe0] + rsb r1,r2,r3 + +@ CHECK: rsc r1, r2, r3 @ encoding: [0x03,0x10,0xe2,0xe0] + rsc r1,r2,r3 + +@ FIXME: This is broken, CCOut operands don't work correctly when their presence +@ may depend on flags. +@ CHECK-FIXME:: mlas r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0xe0] +@ mlas r1,r2,r3,r4 + +@ CHECK: bfi r0, r0, #5, #7 @ encoding: [0x90,0x02,0xcb,0xe7] + bfi r0, r0, #5, #7 + +@ CHECK: bkpt #10 @ encoding: [0x7a,0x00,0x20,0xe1] + bkpt #10 + +@ CHECK: isb @ encoding: [0x6f,0xf0,0x7f,0xf5] + isb +@ CHECK: mrs r8, cpsr @ encoding: [0x00,0x80,0x0f,0xe1] + mrs r8, cpsr + +@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee] + mcr p7, #1, r5, c1, c1, #4 +@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee] + mrc p14, #0, r1, c1, c2, #4 +@ CHECK: mcrr p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x44,0xec] + mcrr p7, #1, r5, r4, c1 +@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec] + mrrc p7, #1, r5, r4, c1 + +@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe] + mcr2 p7, #1, r5, c1, c1, #4 +@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe] + mrc2 p14, #0, r1, c1, c2, #4 +@ CHECK: mcrr2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x44,0xfc] + mcrr2 p7, #1, r5, r4, c1 +@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc] + mrrc2 p7, #1, r5, r4, c1 + +@ CHECK: cdp p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xee] + cdp p7, #1, c1, c1, c1, #4 +@ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe] + cdp2 p7, #1, c1, c1, c1, #4 + +@ CHECK: clrex @ encoding: [0x1f,0xf0,0x7f,0xf5] + clrex + +@ CHECK: clz r9, r0 @ encoding: [0x10,0x9f,0x6f,0xe1] + clz r9, r0 + +@ CHECK: qadd r1, r2, r3 @ encoding: [0x52,0x10,0x03,0xe1] + qadd r1, r2, r3 + +@ CHECK: qsub r1, r2, r3 @ encoding: [0x52,0x10,0x23,0xe1] + qsub r1, r2, r3 + +@ CHECK: qdadd r1, r2, r3 @ encoding: [0x52,0x10,0x43,0xe1] + qdadd r1, r2, r3 + +@ CHECK: qdsub r1, r2, r3 @ encoding: [0x52,0x10,0x63,0xe1] + qdsub r1, r2, r3 + +@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3] + wfe + +@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3] + wfi + +@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3] + yield + +@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3] + nop + +@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] + dmb sy + +@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] + dmb st + +@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] + dmb ish + +@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] + dmb ishst + +@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5] + dmb nsh + +@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5] + dmb nshst + +@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5] + dmb osh + +@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5] + dmb oshst + +@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] + dsb sy + +@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] + dsb st + +@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] + dsb ish + +@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] + dsb ishst + +@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] + dsb nsh + +@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5] + dsb nshst + +@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5] + dsb osh + +@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] + dsb oshst + +@ CHECK: cpsie aif @ encoding: [0xc0,0x01,0x08,0xf1] + cpsie aif + +@ CHECK: cps #15 @ encoding: [0x0f,0x00,0x02,0xf1] + cps #15 + +@ CHECK: cpsie if, #10 @ encoding: [0xca,0x00,0x0a,0xf1] + cpsie if, #10 + +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] + msr apsr, r0 + +@ CHECK: msr cpsr_s, r0 @ encoding: [0x00,0xf0,0x24,0xe1] + msr apsr_g, r0 + +@ CHECK: msr cpsr_f, r0 @ encoding: [0x00,0xf0,0x28,0xe1] + msr apsr_nzcvq, r0 + +@ CHECK: msr cpsr_fs, r0 @ encoding: [0x00,0xf0,0x2c,0xe1] + msr apsr_nzcvqg, r0 + +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] + msr cpsr_fc, r0 + +@ CHECK: msr cpsr_c, r0 @ encoding: [0x00,0xf0,0x21,0xe1] + msr cpsr_c, r0 + +@ CHECK: msr cpsr_x, r0 @ encoding: [0x00,0xf0,0x22,0xe1] + msr cpsr_x, r0 + +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1] + msr cpsr_fc, r0 + +@ CHECK: msr cpsr_fsx, r0 @ encoding: [0x00,0xf0,0x2e,0xe1] + msr cpsr_fsx, r0 + +@ CHECK: msr spsr_fc, r0 @ encoding: [0x00,0xf0,0x69,0xe1] + msr spsr_fc, r0 + +@ CHECK: msr spsr_fsxc, r0 @ encoding: [0x00,0xf0,0x6f,0xe1] + msr spsr_fsxc, r0 + +@ CHECK: msr cpsr_fsxc, r0 @ encoding: [0x00,0xf0,0x2f,0xe1] + msr cpsr_fsxc, r0 + diff --git a/test/MC/ARM/arm_word_directive.s b/test/MC/ARM/arm_word_directive.s new file mode 100644 index 000000000000..e782479b6081 --- /dev/null +++ b/test/MC/ARM/arm_word_directive.s @@ -0,0 +1,6 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown %s | FileCheck %s + +@ CHECK: TEST0: +@ CHECK: .long 3 +TEST0: + .word 3 diff --git a/test/MC/AsmParser/ARM/dg.exp b/test/MC/ARM/dg.exp index 3ff359aab39b..055fa2507d3c 100644 --- a/test/MC/AsmParser/ARM/dg.exp +++ b/test/MC/ARM/dg.exp @@ -1,5 +1,5 @@ load_lib llvm.exp if { [llvm_supports_target ARM] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] } diff --git a/test/MC/ARM/elf-eflags-eabi.s b/test/MC/ARM/elf-eflags-eabi.s new file mode 100644 index 000000000000..ea89eacf74fb --- /dev/null +++ b/test/MC/ARM/elf-eflags-eabi.s @@ -0,0 +1,13 @@ +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - | \ +@ RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + .syntax unified + .text + .globl barf + .align 2 + .type barf,%function +barf: @ @barf +@ BB#0: @ %entry + b foo + +@@@ make sure the EF_ARM_EABIMASK comes out OK +@OBJ: 'e_flags', 0x05000000 diff --git a/test/MC/ARM/elf-movt.s b/test/MC/ARM/elf-movt.s new file mode 100644 index 000000000000..0fe7c50a3133 --- /dev/null +++ b/test/MC/ARM/elf-movt.s @@ -0,0 +1,39 @@ +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi | FileCheck -check-prefix=ASM %s +@ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - | \ +@ RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + .syntax unified + .text + .globl barf + .align 2 + .type barf,%function +barf: @ @barf +@ BB#0: @ %entry + movw r0, :lower16:GOT-(.LPC0_2+8) + movt r0, :upper16:GOT-(.LPC0_2+16) +.LPC0_2: +@ ASM: movw r0, :lower16:(GOT-(.LPC0_2+8)) +@ ASM-NEXT: movt r0, :upper16:(GOT-(.LPC0_2+16)) + +@@ make sure that the text section fixups are sane too +@ OBJ: '.text' +@ OBJ-NEXT: 'sh_type', 0x00000001 +@ OBJ-NEXT: 'sh_flags', 0x00000006 +@ OBJ-NEXT: 'sh_addr', 0x00000000 +@ OBJ-NEXT: 'sh_offset', 0x00000034 +@ OBJ-NEXT: 'sh_size', 0x00000008 +@ OBJ-NEXT: 'sh_link', 0x00000000 +@ OBJ-NEXT: 'sh_info', 0x00000000 +@ OBJ-NEXT: 'sh_addralign', 0x00000004 +@ OBJ-NEXT: 'sh_entsize', 0x00000000 +@ OBJ-NEXT: '_section_data', 'f00f0fe3 ff0f4fe3' + +@ OBJ: Relocation 0x00000000 +@ OBJ-NEXT: 'r_offset', 0x00000000 +@ OBJ-NEXT: 'r_sym' +@ OBJ-NEXT: 'r_type', 0x0000002d + +@ OBJ: Relocation 0x00000001 +@ OBJ-NEXT: 'r_offset', 0x00000004 +@ OBJ-NEXT: 'r_sym' +@ OBJ-NEXT: 'r_type', 0x0000002e + diff --git a/test/MC/ARM/elf-reloc-01.ll b/test/MC/ARM/elf-reloc-01.ll new file mode 100644 index 000000000000..6b83c95032cd --- /dev/null +++ b/test/MC/ARM/elf-reloc-01.ll @@ -0,0 +1,71 @@ +;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ +;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ +;; RUN: -filetype=obj %s -o - | \ +;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +;; FIXME: This file needs to be in .s form! +;; The args to llc are there to constrain the codegen only. +;; +;; Ensure no regression on ARM/gcc compatibility for +;; emitting explicit symbol relocs for nonexternal symbols +;; versus section symbol relocs (with offset) - +;; +;; Default llvm behavior is to emit as section symbol relocs nearly +;; everything that is not an undefined external. Unfortunately, this +;; diverges from what codesourcery ARM/gcc does! +;; +;; Tests that reloc to _MergedGlobals show up as explicit symbol reloc + + +target triple = "armv7-none-linux-gnueabi" + +@var_tls = thread_local global i32 1 +@var_tls_double = thread_local global double 1.000000e+00 +@var_static = internal global i32 1 +@var_static_double = internal global double 1.000000e+00 +@var_global = global i32 1 +@var_global_double = global double 1.000000e+00 + +declare i32 @mystrlen(i8* nocapture %s) nounwind + +declare void @myhextochar(i32 %n, i8* nocapture %buffer) + +declare void @__aeabi_read_tp() nounwind + +declare void @__nacl_read_tp() nounwind + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { +entry: + switch i32 %argc, label %bb3 [ + i32 555, label %bb + i32 6666, label %bb2 + ] + +bb: ; preds = %entry + volatile store i32 11, i32* @var_tls, align 4 + volatile store double 2.200000e+01, double* @var_tls_double, align 8 + volatile store i32 33, i32* @var_static, align 4 + volatile store double 4.400000e+01, double* @var_static_double, align 8 + volatile store i32 55, i32* @var_global, align 4 + volatile store double 6.600000e+01, double* @var_global_double, align 8 + br label %bb3 + +bb2: ; preds = %entry + ret i32 add (i32 add (i32 add (i32 ptrtoint (i32* @var_tls to i32), i32 add (i32 ptrtoint (i32* @var_static to i32), i32 ptrtoint (i32* @var_global to i32))), i32 ptrtoint (double* @var_tls_double to i32)), i32 add (i32 ptrtoint (double* @var_static_double to i32), i32 ptrtoint (double* @var_global_double to i32))) + +bb3: ; preds = %bb, %entry + tail call void @exit(i32 55) noreturn nounwind + unreachable +} + +declare void @exit(i32) noreturn nounwind + + +;; OBJ: Symbol 0x00000002 +;; OBJ-NEXT: '_MergedGlobals' +;; OBJ-NEXT: 'st_value', 0x00000010 + +;; OBJ: Relocation 0x00000001 +;; OBJ-NEXT: 'r_offset', +;; OBJ-NEXT: 'r_sym', 0x00000002 +;; OBJ-NEXT: 'r_type', 0x0000002b diff --git a/test/MC/ARM/elf-reloc-02.ll b/test/MC/ARM/elf-reloc-02.ll new file mode 100644 index 000000000000..132a47758dad --- /dev/null +++ b/test/MC/ARM/elf-reloc-02.ll @@ -0,0 +1,51 @@ +;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ +;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ +;; RUN: -filetype=obj %s -o - | \ +;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +;; FIXME: This file needs to be in .s form! +;; The args to llc are there to constrain the codegen only. +;; +;; Ensure no regression on ARM/gcc compatibility for +;; emitting explicit symbol relocs for nonexternal symbols +;; versus section symbol relocs (with offset) - +;; +;; Default llvm behavior is to emit as section symbol relocs nearly +;; everything that is not an undefined external. Unfortunately, this +;; diverges from what codesourcery ARM/gcc does! +;; +;; Tests that reloc to .L.str* show up as explicit symbols + +target triple = "armv7-none-linux-gnueabi" + +@.str = private constant [7 x i8] c"@null\0A\00", align 4 +@.str1 = private constant [8 x i8] c"@write\0A\00", align 4 +@.str2 = private constant [13 x i8] c"hello worldn\00", align 4 +@.str3 = private constant [7 x i8] c"@exit\0A\00", align 4 + +declare i32 @mystrlen(i8* nocapture %s) nounwind readonly + +declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind + +define i32 @main() nounwind { +entry: + %0 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 6) nounwind + %1 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([8 x i8]* @.str1, i32 0, i32 0), i32 7) nounwind + %2 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([13 x i8]* @.str2, i32 0, i32 0), i32 12) nounwind + %3 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([7 x i8]* @.str3, i32 0, i32 0), i32 6) nounwind + tail call void @exit(i32 55) noreturn nounwind + unreachable +} + +declare i32 @write(...) + +declare void @exit(i32) noreturn nounwind + + +;; OBJ: Symbol 0x00000002 +;; OBJ-NEXT: '.L.str' + +;; OBJ: Relocation 0x00000000 +;; OBJ-NEXT: 'r_offset', +;; OBJ-NEXT: 'r_sym', 0x00000002 +;; OBJ-NEXT: 'r_type', 0x0000002b diff --git a/test/MC/ARM/elf-reloc-03.ll b/test/MC/ARM/elf-reloc-03.ll new file mode 100644 index 000000000000..e052f39a615a --- /dev/null +++ b/test/MC/ARM/elf-reloc-03.ll @@ -0,0 +1,98 @@ +;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ +;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ +;; RUN: -filetype=obj %s -o - | \ +;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +;; FIXME: This file needs to be in .s form! +;; The args to llc are there to constrain the codegen only. +;; +;; Ensure no regression on ARM/gcc compatibility for +;; emitting explicit symbol relocs for nonexternal symbols +;; versus section symbol relocs (with offset) - +;; +;; Default llvm behavior is to emit as section symbol relocs nearly +;; everything that is not an undefined external. Unfortunately, this +;; diverges from what codesourcery ARM/gcc does! +;; +;; Verifies that internal constants appear as explict symbol relocs + + +target triple = "armv7-none-linux-gnueabi" + +@startval = global i32 5 +@vtable = internal constant [10 x i32 (...)*] [i32 (...)* bitcast (i32 ()* @foo0 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo1 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo2 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo3 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo4 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo5 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo6 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo7 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo8 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo9 to i32 (...)*)] + +declare i32 @mystrlen(i8* nocapture %s) nounwind readonly + +declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind + +define internal i32 @foo0() nounwind readnone { +entry: + ret i32 0 +} + +define internal i32 @foo1() nounwind readnone { +entry: + ret i32 1 +} + +define internal i32 @foo2() nounwind readnone { +entry: + ret i32 2 +} + +define internal i32 @foo3() nounwind readnone { +entry: + ret i32 3 +} + +define internal i32 @foo4() nounwind readnone { +entry: + ret i32 4 +} + +define internal i32 @foo5() nounwind readnone { +entry: + ret i32 55 +} + +define internal i32 @foo6() nounwind readnone { +entry: + ret i32 6 +} + +define internal i32 @foo7() nounwind readnone { +entry: + ret i32 7 +} + +define internal i32 @foo8() nounwind readnone { +entry: + ret i32 8 +} + +define internal i32 @foo9() nounwind readnone { +entry: + ret i32 9 +} + +define i32 @main() nounwind { +entry: + %0 = load i32* @startval, align 4 + %1 = getelementptr inbounds [10 x i32 (...)*]* @vtable, i32 0, i32 %0 + %2 = load i32 (...)** %1, align 4 + %3 = tail call i32 (...)* %2() nounwind + tail call void @exit(i32 %3) noreturn nounwind + unreachable +} + +declare void @exit(i32) noreturn nounwind + + +;; OBJ: Symbol 0x0000000c +;; OBJ-NEXT: 'vtable' + +;; OBJ: Relocation 0x00000001 +;; OBJ-NEXT: 'r_offset', +;; OBJ-NEXT: 'r_sym', 0x0000000c +;; OBJ-NEXT: 'r_type', 0x0000002b diff --git a/test/MC/ARM/hilo-16bit-relocations.s b/test/MC/ARM/hilo-16bit-relocations.s new file mode 100644 index 000000000000..7d6b4988dffd --- /dev/null +++ b/test/MC/ARM/hilo-16bit-relocations.s @@ -0,0 +1,20 @@ +@ RUN: llvm-mc %s -triple armv7-apple-darwin | FileCheck %s +@ RUN: llvm-mc %s -triple armv7-apple-darwin | FileCheck %s + +_t: + movw r0, :lower16:(L_foo$non_lazy_ptr - (L1 + 8)) + movt r0, :upper16:(L_foo$non_lazy_ptr - (L1 + 8)) +L1: + +@ CHECK: movw r0, :lower16:(L_foo$non_lazy_ptr-(L1+8)) +@ CHECK: movt r0, :upper16:(L_foo$non_lazy_ptr-(L1+8)) + + .comm _foo,4,2 + + .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers + .align 2 +L_foo$non_lazy_ptr: + .indirect_symbol _foo + .long 0 + +.subsections_via_symbols diff --git a/test/MC/ARM/neon-abs-encoding.s b/test/MC/ARM/neon-abs-encoding.s new file mode 100644 index 000000000000..398f2db039df --- /dev/null +++ b/test/MC/ARM/neon-abs-encoding.s @@ -0,0 +1,31 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xf3] + vabs.s8 d16, d16 +@ CHECK: vabs.s16 d16, d16 @ encoding: [0x20,0x03,0xf5,0xf3] + vabs.s16 d16, d16 +@ CHECK: vabs.s32 d16, d16 @ encoding: [0x20,0x03,0xf9,0xf3] + vabs.s32 d16, d16 +@ CHECK: vabs.f32 d16, d16 @ encoding: [0x20,0x07,0xf9,0xf3] + vabs.f32 d16, d16 +@ CHECK: vabs.s8 q8, q8 @ encoding: [0x60,0x03,0xf1,0xf3] + vabs.s8 q8, q8 +@ CHECK: vabs.s16 q8, q8 @ encoding: [0x60,0x03,0xf5,0xf3] + vabs.s16 q8, q8 +@ CHECK: vabs.s32 q8, q8 @ encoding: [0x60,0x03,0xf9,0xf3] + vabs.s32 q8, q8 +@ CHECK: vabs.f32 q8, q8 @ encoding: [0x60,0x07,0xf9,0xf3] + vabs.f32 q8, q8 + +@ CHECK: vqabs.s8 d16, d16 @ encoding: [0x20,0x07,0xf0,0xf3] + vqabs.s8 d16, d16 +@ CHECK: vqabs.s16 d16, d16 @ encoding: [0x20,0x07,0xf4,0xf3] + vqabs.s16 d16, d16 +@ CHECK: vqabs.s32 d16, d16 @ encoding: [0x20,0x07,0xf8,0xf3] + vqabs.s32 d16, d16 +@ CHECK: vqabs.s8 q8, q8 @ encoding: [0x60,0x07,0xf0,0xf3] + vqabs.s8 q8, q8 +@ CHECK: vqabs.s16 q8, q8 @ encoding: [0x60,0x07,0xf4,0xf3] + vqabs.s16 q8, q8 +@ CHECK: vqabs.s32 q8, q8 @ encoding: [0x60,0x07,0xf8,0xf3] + vqabs.s32 q8, q8 diff --git a/test/MC/ARM/neon-absdiff-encoding.s b/test/MC/ARM/neon-absdiff-encoding.s new file mode 100644 index 000000000000..f43ea6582a28 --- /dev/null +++ b/test/MC/ARM/neon-absdiff-encoding.s @@ -0,0 +1,82 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf2] + vabd.s8 d16, d16, d17 +@ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xf2] + vabd.s16 d16, d16, d17 +@ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf2] + vabd.s32 d16, d16, d17 +@ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xf3] + vabd.u8 d16, d16, d17 +@ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xf3] + vabd.u16 d16, d16, d17 + @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf3] + vabd.u32 d16, d16, d17 +@ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xf3] + vabd.f32 d16, d16, d17 +@ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xf2] + vabd.s8 q8, q8, q9 +@ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xf2] + vabd.s16 q8, q8, q9 +@ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xf2] + vabd.s32 q8, q8, q9 +@ CHECK: vabd.u8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xf3] + vabd.u8 q8, q8, q9 +@ CHECK: vabd.u16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xf3] + vabd.u16 q8, q8, q9 +@ CHECK: vabd.u32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xf3] + vabd.u32 q8, q8, q9 +@ CHECK: vabd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xf3] + vabd.f32 q8, q8, q9 + +@ CHECK: vabdl.s8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xf2] + vabdl.s8 q8, d16, d17 +@ CHECK: vabdl.s16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xf2] + vabdl.s16 q8, d16, d17 +@ CHECK: vabdl.s32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xf2] + vabdl.s32 q8, d16, d17 +@ CHECK: vabdl.u8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xf3] + vabdl.u8 q8, d16, d17 +@ CHECK: vabdl.u16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xf3] + vabdl.u16 q8, d16, d17 +@ CHECK: vabdl.u32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xf3] + vabdl.u32 q8, d16, d17 + +@ CHECK: vaba.s8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xf2] + vaba.s8 d16, d18, d17 +@ CHECK: vaba.s16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xf2] + vaba.s16 d16, d18, d17 +@ CHECK: vaba.s32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xf2] + vaba.s32 d16, d18, d17 +@ CHECK: vaba.u8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xf3] + vaba.u8 d16, d18, d17 +@ CHECK: vaba.u16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xf3] + vaba.u16 d16, d18, d17 +@ CHECK: vaba.u32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xf3] + vaba.u32 d16, d18, d17 +@ CHECK: vaba.s8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xf2] + vaba.s8 q9, q8, q10 +@ CHECK: vaba.s16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xf2] + vaba.s16 q9, q8, q10 +@ CHECK: vaba.s32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xf2] + vaba.s32 q9, q8, q10 +@ CHECK: vaba.u8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xf3] + vaba.u8 q9, q8, q10 +@ CHECK: vaba.u16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xf3] + vaba.u16 q9, q8, q10 +@ CHECK: vaba.u32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xf3] + vaba.u32 q9, q8, q10 + +@ CHECK: vabal.s8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xf2] + vabal.s8 q8, d19, d18 +@ CHECK: vabal.s16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xf2] + vabal.s16 q8, d19, d18 +@ CHECK: vabal.s32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xf2] + vabal.s32 q8, d19, d18 +@ CHECK: vabal.u8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xf3] + vabal.u8 q8, d19, d18 +@ CHECK: vabal.u16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xf3] + vabal.u16 q8, d19, d18 +@ CHECK: vabal.u32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xf3] + vabal.u32 q8, d19, d18 + diff --git a/test/MC/ARM/neon-add-encoding.s b/test/MC/ARM/neon-add-encoding.s new file mode 100644 index 000000000000..e425397b7901 --- /dev/null +++ b/test/MC/ARM/neon-add-encoding.s @@ -0,0 +1,137 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s + + +@ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf2] + vadd.i8 d16, d17, d16 +@ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf2] + vadd.i16 d16, d17, d16 +@ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xf2] + vadd.i64 d16, d17, d16 +@ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xf2] + vadd.i32 d16, d17, d16 +@ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf2] + vadd.f32 d16, d16, d17 +@ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x40,0xf2] + vadd.f32 q8, q8, q9 + +@ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xf2] + vaddl.s8 q8, d17, d16 +@ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xf2] + vaddl.s16 q8, d17, d16 +@ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xf2] + vaddl.s32 q8, d17, d16 +@ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xf3] + vaddl.u8 q8, d17, d16 +@ CHECK: vaddl.u16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xf3] + vaddl.u16 q8, d17, d16 +@ CHECK: vaddl.u32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xf3] + vaddl.u32 q8, d17, d16 + +@ CHECK: vaddw.s8 q8, q8, d18 @ encoding: [0xa2,0x01,0xc0,0xf2] + vaddw.s8 q8, q8, d18 +@ CHECK: vaddw.s16 q8, q8, d18 @ encoding: [0xa2,0x01,0xd0,0xf2] + vaddw.s16 q8, q8, d18 +@ CHECK: vaddw.s32 q8, q8, d18 @ encoding: [0xa2,0x01,0xe0,0xf2] + vaddw.s32 q8, q8, d18 +@ CHECK: vaddw.u8 q8, q8, d18 @ encoding: [0xa2,0x01,0xc0,0xf3] + vaddw.u8 q8, q8, d18 +@ CHECK: vaddw.u16 q8, q8, d18 @ encoding: [0xa2,0x01,0xd0,0xf3] + vaddw.u16 q8, q8, d18 +@ CHECK: vaddw.u32 q8, q8, d18 @ encoding: [0xa2,0x01,0xe0,0xf3] + vaddw.u32 q8, q8, d18 + +@ CHECK: vhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x00,0x40,0xf2] + vhadd.s8 d16, d16, d17 +@ CHECK: vhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x00,0x50,0xf2] + vhadd.s16 d16, d16, d17 +@ CHECK: vhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x00,0x60,0xf2] + vhadd.s32 d16, d16, d17 +@ CHECK: vhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x00,0x40,0xf3] + vhadd.u8 d16, d16, d17 +@ CHECK: vhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x00,0x50,0xf3] + vhadd.u16 d16, d16, d17 +@ CHECK: vhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x00,0x60,0xf3] + vhadd.u32 d16, d16, d17 +@ CHECK: vhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x00,0x40,0xf2] + vhadd.s8 q8, q8, q9 +@ CHECK: vhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x00,0x50,0xf2] + vhadd.s16 q8, q8, q9 +@ CHECK: vhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xf2] + vhadd.s32 q8, q8, q9 + @ CHECK: vhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x00,0x40,0xf3] + vhadd.u8 q8, q8, q9 +@ CHECK: vhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x00,0x50,0xf3] + vhadd.u16 q8, q8, q9 +@ CHECK: vhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xf3] + vhadd.u32 q8, q8, q9 + +@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf2] + vrhadd.s8 d16, d16, d17 +@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf2] + vrhadd.s16 d16, d16, d17 +@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf2] + vrhadd.s32 d16, d16, d17 +@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf3] + vrhadd.u8 d16, d16, d17 +@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf3] + vrhadd.u16 d16, d16, d17 +@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf3] + vrhadd.u32 d16, d16, d17 +@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf2] + vrhadd.s8 q8, q8, q9 +@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf2] + vrhadd.s16 q8, q8, q9 +@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf2] + vrhadd.s32 q8, q8, q9 +@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf3] + vrhadd.u8 q8, q8, q9 +@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf3] + vrhadd.u16 q8, q8, q9 +@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf3] + vrhadd.u32 q8, q8, q9 + +@ CHECK: vqadd.s8 d16, d16, d17 @ encoding: [0xb1,0x00,0x40,0xf2] + vqadd.s8 d16, d16, d17 +@ CHECK: vqadd.s16 d16, d16, d17 @ encoding: [0xb1,0x00,0x50,0xf2] + vqadd.s16 d16, d16, d17 +@ CHECK: vqadd.s32 d16, d16, d17 @ encoding: [0xb1,0x00,0x60,0xf2] + vqadd.s32 d16, d16, d17 +@ CHECK: vqadd.s64 d16, d16, d17 @ encoding: [0xb1,0x00,0x70,0xf2] + vqadd.s64 d16, d16, d17 +@ CHECK: vqadd.u8 d16, d16, d17 @ encoding: [0xb1,0x00,0x40,0xf3] + vqadd.u8 d16, d16, d17 +@ CHECK: vqadd.u16 d16, d16, d17 @ encoding: [0xb1,0x00,0x50,0xf3] + vqadd.u16 d16, d16, d17 +@ CHECK: vqadd.u32 d16, d16, d17 @ encoding: [0xb1,0x00,0x60,0xf3] + vqadd.u32 d16, d16, d17 +@ CHECK: vqadd.u64 d16, d16, d17 @ encoding: [0xb1,0x00,0x70,0xf3] + vqadd.u64 d16, d16, d17 +@ CHECK: vqadd.s8 q8, q8, q9 @ encoding: [0xf2,0x00,0x40,0xf2] + vqadd.s8 q8, q8, q9 +@ CHECK: vqadd.s16 q8, q8, q9 @ encoding: [0xf2,0x00,0x50,0xf2] + vqadd.s16 q8, q8, q9 +@ CHECK: vqadd.s32 q8, q8, q9 @ encoding: [0xf2,0x00,0x60,0xf2] + vqadd.s32 q8, q8, q9 +@ CHECK: vqadd.s64 q8, q8, q9 @ encoding: [0xf2,0x00,0x70,0xf2] + vqadd.s64 q8, q8, q9 +@ CHECK: vqadd.u8 q8, q8, q9 @ encoding: [0xf2,0x00,0x40,0xf3] + vqadd.u8 q8, q8, q9 +@ CHECK: vqadd.u16 q8, q8, q9 @ encoding: [0xf2,0x00,0x50,0xf3] + vqadd.u16 q8, q8, q9 +@ CHECK: vqadd.u32 q8, q8, q9 @ encoding: [0xf2,0x00,0x60,0xf3] + vqadd.u32 q8, q8, q9 +@ CHECK: vqadd.u64 q8, q8, q9 @ encoding: [0xf2,0x00,0x70,0xf3] + vqadd.u64 q8, q8, q9 + +@ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf2] + vaddhn.i16 d16, q8, q9 +@ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xf2] + vaddhn.i32 d16, q8, q9 +@ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf2] + vaddhn.i64 d16, q8, q9 +@ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xa2,0x04,0xc0,0xf3] + vraddhn.i16 d16, q8, q9 +@ CHECK: vraddhn.i32 d16, q8, q9 @ encoding: [0xa2,0x04,0xd0,0xf3] + vraddhn.i32 d16, q8, q9 +@ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf3] + vraddhn.i64 d16, q8, q9 diff --git a/test/MC/ARM/neon-bitcount-encoding.s b/test/MC/ARM/neon-bitcount-encoding.s new file mode 100644 index 000000000000..2c9518b32c1b --- /dev/null +++ b/test/MC/ARM/neon-bitcount-encoding.s @@ -0,0 +1,31 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xf3] + vcnt.8 d16, d16 +@ CHECK: vcnt.8 q8, q8 @ encoding: [0x60,0x05,0xf0,0xf3] + vcnt.8 q8, q8 +@ CHECK: vclz.i8 d16, d16 @ encoding: [0xa0,0x04,0xf0,0xf3] + vclz.i8 d16, d16 +@ CHECK: vclz.i16 d16, d16 @ encoding: [0xa0,0x04,0xf4,0xf3] + vclz.i16 d16, d16 +@ CHECK: vclz.i32 d16, d16 @ encoding: [0xa0,0x04,0xf8,0xf3] + vclz.i32 d16, d16 +@ CHECK: vclz.i8 q8, q8 @ encoding: [0xe0,0x04,0xf0,0xf3] + vclz.i8 q8, q8 +@ CHECK: vclz.i16 q8, q8 @ encoding: [0xe0,0x04,0xf4,0xf3] + vclz.i16 q8, q8 +@ CHECK: vclz.i32 q8, q8 @ encoding: [0xe0,0x04,0xf8,0xf3] + vclz.i32 q8, q8 +@ CHECK: vcls.s8 d16, d16 @ encoding: [0x20,0x04,0xf0,0xf3] + vcls.s8 d16, d16 +@ CHECK: vcls.s16 d16, d16 @ encoding: [0x20,0x04,0xf4,0xf3] + vcls.s16 d16, d16 +@ CHECK: vcls.s32 d16, d16 @ encoding: [0x20,0x04,0xf8,0xf3] + vcls.s32 d16, d16 +@ CHECK: vcls.s8 q8, q8 @ encoding: [0x60,0x04,0xf0,0xf3] + vcls.s8 q8, q8 +@ CHECK: vcls.s16 q8, q8 @ encoding: [0x60,0x04,0xf4,0xf3] + vcls.s16 q8, q8 +@ CHECK: vcls.s32 q8, q8 @ encoding: [0x60,0x04,0xf8,0xf3] + vcls.s32 q8, q8 + diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s new file mode 100644 index 000000000000..8710923c670d --- /dev/null +++ b/test/MC/ARM/neon-bitwise-encoding.s @@ -0,0 +1,47 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vand d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xf2] + vand d16, d17, d16 +@ CHECK: vand q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xf2] + vand q8, q8, q9 + +@ CHECK: veor d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xf3] + veor d16, d17, d16 +@ CHECK: veor q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xf3] + veor q8, q8, q9 + +@ CHECK: vorr d16, d17, d16 @ encoding: [0xb0,0x01,0x61,0xf2] + vorr d16, d17, d16 +@ CHECK: vorr q8, q8, q9 @ encoding: [0xf2,0x01,0x60,0xf2] + vorr q8, q8, q9 +@ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2] + vorr.i32 d16, #0x1000000 +@ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2] + vorr.i32 q8, #0x1000000 +@ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2] + vorr.i32 q8, #0x0 + +@ CHECK: vbic d16, d17, d16 @ encoding: [0xb0,0x01,0x51,0xf2] + vbic d16, d17, d16 +@ CHECK: vbic q8, q8, q9 @ encoding: [0xf2,0x01,0x50,0xf2] + vbic q8, q8, q9 +@ CHECK: vbic.i32 d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xf3] + vbic.i32 d16, #0xFF000000 +@ CHECK: vbic.i32 q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xf3] + vbic.i32 q8, #0xFF000000 + +@ CHECK: vorn d16, d17, d16 @ encoding: [0xb0,0x01,0x71,0xf2] + vorn d16, d17, d16 +@ CHECK: vorn q8, q8, q9 @ encoding: [0xf2,0x01,0x70,0xf2] + vorn q8, q8, q9 + +@ CHECK: vmvn d16, d16 @ encoding: [0xa0,0x05,0xf0,0xf3] + vmvn d16, d16 +@ CHECK: vmvn q8, q8 @ encoding: [0xe0,0x05,0xf0,0xf3] + vmvn q8, q8 + +@ CHECK: vbsl d18, d17, d16 @ encoding: [0xb0,0x21,0x51,0xf3] + vbsl d18, d17, d16 +@ CHECK: vbsl q8, q10, q9 @ encoding: [0xf2,0x01,0x54,0xf3] + vbsl q8, q10, q9 diff --git a/test/MC/ARM/neon-cmp-encoding.s b/test/MC/ARM/neon-cmp-encoding.s new file mode 100644 index 000000000000..6bfc549e9474 --- /dev/null +++ b/test/MC/ARM/neon-cmp-encoding.s @@ -0,0 +1,115 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ FIXME: We cannot currently test the following instructions, which are +@ currently marked as for-disassembly only in the .td files: +@ - VCEQz +@ - VCGEz, VCLEz +@ - VCGTz, VCLTz + +@ CHECK: vceq.i8 d16, d16, d17 @ encoding: [0xb1,0x08,0x40,0xf3] + vceq.i8 d16, d16, d17 +@ CHECK: vceq.i16 d16, d16, d17 @ encoding: [0xb1,0x08,0x50,0xf3] + vceq.i16 d16, d16, d17 +@ CHECK: vceq.i32 d16, d16, d17 @ encoding: [0xb1,0x08,0x60,0xf3] + vceq.i32 d16, d16, d17 +@ CHECK: vceq.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x40,0xf2] + vceq.f32 d16, d16, d17 +@ CHECK: vceq.i8 q8, q8, q9 @ encoding: [0xf2,0x08,0x40,0xf3] + vceq.i8 q8, q8, q9 +@ CHECK: vceq.i16 q8, q8, q9 @ encoding: [0xf2,0x08,0x50,0xf3] + vceq.i16 q8, q8, q9 +@ CHECK: vceq.i32 q8, q8, q9 @ encoding: [0xf2,0x08,0x60,0xf3] + vceq.i32 q8, q8, q9 +@ CHECK: vceq.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x40,0xf2] + vceq.f32 q8, q8, q9 + +@ CHECK: vcge.s8 d16, d16, d17 @ encoding: [0xb1,0x03,0x40,0xf2] + vcge.s8 d16, d16, d17 +@ CHECK: vcge.s16 d16, d16, d17 @ encoding: [0xb1,0x03,0x50,0xf2] + vcge.s16 d16, d16, d17 +@ CHECK: vcge.s32 d16, d16, d17 @ encoding: [0xb1,0x03,0x60,0xf2] + vcge.s32 d16, d16, d17 +@ CHECK: vcge.u8 d16, d16, d17 @ encoding: [0xb1,0x03,0x40,0xf3] + vcge.u8 d16, d16, d17 +@ CHECK: vcge.u16 d16, d16, d17 @ encoding: [0xb1,0x03,0x50,0xf3] + vcge.u16 d16, d16, d17 +@ CHECK: vcge.u32 d16, d16, d17 @ encoding: [0xb1,0x03,0x60,0xf3] + vcge.u32 d16, d16, d17 +@ CHECK: vcge.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x40,0xf3] + vcge.f32 d16, d16, d17 +@ CHECK: vcge.s8 q8, q8, q9 @ encoding: [0xf2,0x03,0x40,0xf2] + vcge.s8 q8, q8, q9 +@ CHECK: vcge.s16 q8, q8, q9 @ encoding: [0xf2,0x03,0x50,0xf2] + vcge.s16 q8, q8, q9 +@ CHECK: vcge.s32 q8, q8, q9 @ encoding: [0xf2,0x03,0x60,0xf2] + vcge.s32 q8, q8, q9 +@ CHECK: vcge.u8 q8, q8, q9 @ encoding: [0xf2,0x03,0x40,0xf3] + vcge.u8 q8, q8, q9 +@ CHECK: vcge.u16 q8, q8, q9 @ encoding: [0xf2,0x03,0x50,0xf3] + vcge.u16 q8, q8, q9 +@ CHECK: vcge.u32 q8, q8, q9 @ encoding: [0xf2,0x03,0x60,0xf3] + vcge.u32 q8, q8, q9 +@ CHECK: vcge.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x40,0xf3] + vcge.f32 q8, q8, q9 +@ CHECK: vacge.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x40,0xf3] + vacge.f32 d16, d16, d17 +@ CHECK: vacge.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x40,0xf3] + vacge.f32 q8, q8, q9 + +@ CHECK: vcgt.s8 d16, d16, d17 @ encoding: [0xa1,0x03,0x40,0xf2] + vcgt.s8 d16, d16, d17 +@ CHECK: vcgt.s16 d16, d16, d17 @ encoding: [0xa1,0x03,0x50,0xf2] + vcgt.s16 d16, d16, d17 +@ CHECK: vcgt.s32 d16, d16, d17 @ encoding: [0xa1,0x03,0x60,0xf2] + vcgt.s32 d16, d16, d17 +@ CHECK: vcgt.u8 d16, d16, d17 @ encoding: [0xa1,0x03,0x40,0xf3] + vcgt.u8 d16, d16, d17 +@ CHECK: vcgt.u16 d16, d16, d17 @ encoding: [0xa1,0x03,0x50,0xf3] + vcgt.u16 d16, d16, d17 +@ CHECK: vcgt.u32 d16, d16, d17 @ encoding: [0xa1,0x03,0x60,0xf3] + vcgt.u32 d16, d16, d17 +@ CHECK: vcgt.f32 d16, d16, d17 @ encoding: [0xa1,0x0e,0x60,0xf3] + vcgt.f32 d16, d16, d17 +@ CHECK: vcgt.s8 q8, q8, q9 @ encoding: [0xe2,0x03,0x40,0xf2] + vcgt.s8 q8, q8, q9 +@ CHECK: vcgt.s16 q8, q8, q9 @ encoding: [0xe2,0x03,0x50,0xf2] + vcgt.s16 q8, q8, q9 +@ CHECK: vcgt.s32 q8, q8, q9 @ encoding: [0xe2,0x03,0x60,0xf2] + vcgt.s32 q8, q8, q9 +@ CHECK: vcgt.u8 q8, q8, q9 @ encoding: [0xe2,0x03,0x40,0xf3] + vcgt.u8 q8, q8, q9 +@ CHECK: vcgt.u16 q8, q8, q9 @ encoding: [0xe2,0x03,0x50,0xf3] + vcgt.u16 q8, q8, q9 +@ CHECK: vcgt.u32 q8, q8, q9 @ encoding: [0xe2,0x03,0x60,0xf3] + vcgt.u32 q8, q8, q9 +@ CHECK: vcgt.f32 q8, q8, q9 @ encoding: [0xe2,0x0e,0x60,0xf3] + vcgt.f32 q8, q8, q9 +@ CHECK: vacgt.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x60,0xf3] + vacgt.f32 d16, d16, d17 +@ CHECK: vacgt.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x60,0xf3] + vacgt.f32 q8, q8, q9 + +@ CHECK: vtst.8 d16, d16, d17 @ encoding: [0xb1,0x08,0x40,0xf2] + vtst.8 d16, d16, d17 +@ CHECK: vtst.16 d16, d16, d17 @ encoding: [0xb1,0x08,0x50,0xf2] + vtst.16 d16, d16, d17 +@ CHECK: vtst.32 d16, d16, d17 @ encoding: [0xb1,0x08,0x60,0xf2] + vtst.32 d16, d16, d17 +@ CHECK: vtst.8 q8, q8, q9 @ encoding: [0xf2,0x08,0x40,0xf2] + vtst.8 q8, q8, q9 +@ CHECK: vtst.16 q8, q8, q9 @ encoding: [0xf2,0x08,0x50,0xf2] + vtst.16 q8, q8, q9 +@ CHECK: vtst.32 q8, q8, q9 @ encoding: [0xf2,0x08,0x60,0xf2] + vtst.32 q8, q8, q9 + +@ CHECK: vceq.i8 d16, d16, #0 @ encoding: [0x20,0x01,0xf1,0xf3] + vceq.i8 d16, d16, #0 +@ CHECK: vcge.s8 d16, d16, #0 @ encoding: [0xa0,0x00,0xf1,0xf3] + vcge.s8 d16, d16, #0 +@ CHECK: vcle.s8 d16, d16, #0 @ encoding: [0xa0,0x01,0xf1,0xf3] + vcle.s8 d16, d16, #0 +@ CHECK: vcgt.s8 d16, d16, #0 @ encoding: [0x20,0x00,0xf1,0xf3] + vcgt.s8 d16, d16, #0 +@ CHECK: vclt.s8 d16, d16, #0 @ encoding: [0x20,0x02,0xf1,0xf3] + vclt.s8 d16, d16, #0 diff --git a/test/MC/ARM/neon-convert-encoding.s b/test/MC/ARM/neon-convert-encoding.s new file mode 100644 index 000000000000..1733c5222bee --- /dev/null +++ b/test/MC/ARM/neon-convert-encoding.s @@ -0,0 +1,38 @@ +@ RUN: llvm-mc -mcpu=cortex-a9 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3] + vcvt.s32.f32 d16, d16 +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xf3] + vcvt.u32.f32 d16, d16 +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xf3] + vcvt.f32.s32 d16, d16 +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xf3] + vcvt.f32.u32 d16, d16 +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xf3] + vcvt.s32.f32 q8, q8 +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xe0,0x07,0xfb,0xf3] + vcvt.u32.f32 q8, q8 +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xf3] + vcvt.f32.s32 q8, q8 +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xe0,0x06,0xfb,0xf3] + vcvt.f32.u32 q8, q8 +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xf2] + vcvt.s32.f32 d16, d16, #1 +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xf3] + vcvt.u32.f32 d16, d16, #1 +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xf2] + vcvt.f32.s32 d16, d16, #1 +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xf3] + vcvt.f32.u32 d16, d16, #1 +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xf2] + vcvt.s32.f32 q8, q8, #1 +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xf3] + vcvt.u32.f32 q8, q8, #1 +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xf2] + vcvt.f32.s32 q8, q8, #1 +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xf3] + vcvt.f32.u32 q8, q8, #1 +@ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0x20,0x07,0xf6,0xf3] + vcvt.f32.f16 q8, d16 +@ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0x20,0x06,0xf6,0xf3] + vcvt.f16.f32 d16, q8 diff --git a/test/MC/ARM/neon-dup-encoding.s b/test/MC/ARM/neon-dup-encoding.s new file mode 100644 index 000000000000..0aebdce304a4 --- /dev/null +++ b/test/MC/ARM/neon-dup-encoding.s @@ -0,0 +1,27 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee] + vdup.8 d16, r0 +@ CHECK: vdup.16 d16, r0 @ encoding: [0xb0,0x0b,0x80,0xee] + vdup.16 d16, r0 +@ CHECK: vdup.32 d16, r0 @ encoding: [0x90,0x0b,0x80,0xee] + vdup.32 d16, r0 +@ CHECK: vdup.8 q8, r0 @ encoding: [0x90,0x0b,0xe0,0xee] + vdup.8 q8, r0 +@ CHECK: vdup.16 q8, r0 @ encoding: [0xb0,0x0b,0xa0,0xee] + vdup.16 q8, r0 +@ CHECK: vdup.32 q8, r0 @ encoding: [0x90,0x0b,0xa0,0xee] + vdup.32 q8, r0 +@ CHECK: vdup.8 d16, d16[1] @ encoding: [0x20,0x0c,0xf3,0xf3] + vdup.8 d16, d16[1] +@ CHECK: vdup.16 d16, d16[1] @ encoding: [0x20,0x0c,0xf6,0xf3] + vdup.16 d16, d16[1] +@ CHECK: vdup.32 d16, d16[1] @ encoding: [0x20,0x0c,0xfc,0xf3] + vdup.32 d16, d16[1] +@ CHECK: vdup.8 q8, d16[1] @ encoding: [0x60,0x0c,0xf3,0xf3] + vdup.8 q8, d16[1] +@ CHECK: vdup.16 q8, d16[1] @ encoding: [0x60,0x0c,0xf6,0xf3] + vdup.16 q8, d16[1] +@ CHECK: vdup.32 q8, d16[1] @ encoding: [0x60,0x0c,0xfc,0xf3] + vdup.32 q8, d16[1] diff --git a/test/MC/ARM/neon-minmax-encoding.s b/test/MC/ARM/neon-minmax-encoding.s new file mode 100644 index 000000000000..2d0d8c9b8aeb --- /dev/null +++ b/test/MC/ARM/neon-minmax-encoding.s @@ -0,0 +1,58 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf2] + vmin.s8 d16, d16, d17 +@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xf2] + vmin.s16 d16, d16, d17 +@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xf2] + vmin.s32 d16, d16, d17 +@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0xb1,0x06,0x40,0xf3] + vmin.u8 d16, d16, d17 +@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0xb1,0x06,0x50,0xf3] + vmin.u16 d16, d16, d17 +@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0xb1,0x06,0x60,0xf3] + vmin.u32 d16, d16, d17 +@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xf2] + vmin.f32 d16, d16, d17 +@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xf2] + vmin.s8 q8, q8, q9 +@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xf2] + vmin.s16 q8, q8, q9 +@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xf2] + vmin.s32 q8, q8, q9 +@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0xf2,0x06,0x40,0xf3] + vmin.u8 q8, q8, q9 +@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0xf2,0x06,0x50,0xf3] + vmin.u16 q8, q8, q9 +@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0xf2,0x06,0x60,0xf3] + vmin.u32 q8, q8, q9 +@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x60,0xf2] + vmin.f32 q8, q8, q9 +@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xf2] + vmax.s8 d16, d16, d17 +@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xf2] + vmax.s16 d16, d16, d17 +@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xf2] + vmax.s32 d16, d16, d17 +@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0xa1,0x06,0x40,0xf3] + vmax.u8 d16, d16, d17 +@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0xa1,0x06,0x50,0xf3] + vmax.u16 d16, d16, d17 +@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0xa1,0x06,0x60,0xf3] + vmax.u32 d16, d16, d17 +@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xf2] + vmax.f32 d16, d16, d17 +@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xf2] + vmax.s8 q8, q8, q9 +@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xf2] + vmax.s16 q8, q8, q9 +@ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xf2] + vmax.s32 q8, q8, q9 +@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0xe2,0x06,0x40,0xf3] + vmax.u8 q8, q8, q9 +@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0xe2,0x06,0x50,0xf3] + vmax.u16 q8, q8, q9 +@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xf3] + vmax.u32 q8, q8, q9 +@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0xe2,0x0f,0x40,0xf2] + vmax.f32 q8, q8, q9 diff --git a/test/MC/ARM/neon-mov-encoding.s b/test/MC/ARM/neon-mov-encoding.s new file mode 100644 index 000000000000..ca678d022df8 --- /dev/null +++ b/test/MC/ARM/neon-mov-encoding.s @@ -0,0 +1,117 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xf2] + vmov.i8 d16, #0x8 +@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xf2] + vmov.i16 d16, #0x10 +@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xf2] + vmov.i16 d16, #0x1000 +@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xf2] + vmov.i32 d16, #0x20 +@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xf2] + vmov.i32 d16, #0x2000 +@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xf2] + vmov.i32 d16, #0x200000 +@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2] + vmov.i32 d16, #0x20000000 +@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xf2] + vmov.i32 d16, #0x20FF +@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xf2] + vmov.i32 d16, #0x20FFFF +@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xf3] + vmov.i64 d16, #0xFF0000FF0000FFFF +@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0x58,0x0e,0xc0,0xf2] + vmov.i8 q8, #0x8 +@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xf2] + vmov.i16 q8, #0x10 +@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xf2] + vmov.i16 q8, #0x1000 +@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xf2] + vmov.i32 q8, #0x20 +@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xf2] + vmov.i32 q8, #0x2000 +@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xf2] + vmov.i32 q8, #0x200000 +@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xf2] + vmov.i32 q8, #0x20000000 +@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xf2] + vmov.i32 q8, #0x20FF +@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xf2] + vmov.i32 q8, #0x20FFFF +@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xf3] + vmov.i64 q8, #0xFF0000FF0000FFFF +@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xf2] + vmvn.i16 d16, #0x10 +@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xf2] + vmvn.i16 d16, #0x1000 +@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xf2] + vmvn.i32 d16, #0x20 +@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xf2] + vmvn.i32 d16, #0x2000 +@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xf2] + vmvn.i32 d16, #0x200000 +@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xf2] + vmvn.i32 d16, #0x20000000 +@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xf2] + vmvn.i32 d16, #0x20FF +@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xf2] + vmvn.i32 d16, #0x20FFFF +@ CHECK: vmovl.s8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xf2] + vmovl.s8 q8, d16 +@ CHECK: vmovl.s16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xf2] + vmovl.s16 q8, d16 +@ CHECK: vmovl.s32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xf2] + vmovl.s32 q8, d16 +@ CHECK: vmovl.u8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xf3] + vmovl.u8 q8, d16 +@ CHECK: vmovl.u16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xf3] + vmovl.u16 q8, d16 +@ CHECK: vmovl.u32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xf3] + vmovl.u32 q8, d16 +@ CHECK: vmovn.i16 d16, q8 @ encoding: [0x20,0x02,0xf2,0xf3] + vmovn.i16 d16, q8 +@ CHECK: vmovn.i32 d16, q8 @ encoding: [0x20,0x02,0xf6,0xf3] + vmovn.i32 d16, q8 +@ CHECK: vmovn.i64 d16, q8 @ encoding: [0x20,0x02,0xfa,0xf3] + vmovn.i64 d16, q8 +@ CHECK: vqmovn.s16 d16, q8 @ encoding: [0xa0,0x02,0xf2,0xf3] + vqmovn.s16 d16, q8 +@ CHECK: vqmovn.s32 d16, q8 @ encoding: [0xa0,0x02,0xf6,0xf3] + vqmovn.s32 d16, q8 +@ CHECK: vqmovn.s64 d16, q8 @ encoding: [0xa0,0x02,0xfa,0xf3] + vqmovn.s64 d16, q8 +@ CHECK: vqmovn.u16 d16, q8 @ encoding: [0xe0,0x02,0xf2,0xf3] + vqmovn.u16 d16, q8 +@ CHECK: vqmovn.u32 d16, q8 @ encoding: [0xe0,0x02,0xf6,0xf3] + vqmovn.u32 d16, q8 +@ CHECK: vqmovn.u64 d16, q8 @ encoding: [0xe0,0x02,0xfa,0xf3] + vqmovn.u64 d16, q8 +@ CHECK: vqmovun.s16 d16, q8 @ encoding: [0x60,0x02,0xf2,0xf3] + vqmovun.s16 d16, q8 +@ CHECK: vqmovun.s32 d16, q8 @ encoding: [0x60,0x02,0xf6,0xf3] + vqmovun.s32 d16, q8 +@ CHECK: vqmovun.s64 d16, q8 @ encoding: [0x60,0x02,0xfa,0xf3] + vqmovun.s64 d16, q8 +@ CHECK: vmov.s8 r0, d16[1] @ encoding: [0xb0,0x0b,0x50,0xee] + vmov.s8 r0, d16[1] +@ CHECK: vmov.s16 r0, d16[1] @ encoding: [0xf0,0x0b,0x10,0xee] + vmov.s16 r0, d16[1] +@ CHECK: vmov.u8 r0, d16[1] @ encoding: [0xb0,0x0b,0xd0,0xee] + vmov.u8 r0, d16[1] +@ CHECK: vmov.u16 r0, d16[1] @ encoding: [0xf0,0x0b,0x90,0xee] + vmov.u16 r0, d16[1] +@ CHECK: vmov.32 r0, d16[1] @ encoding: [0x90,0x0b,0x30,0xee] + vmov.32 r0, d16[1] +@ CHECK: vmov.8 d16[1], r1 @ encoding: [0xb0,0x1b,0x40,0xee] + vmov.8 d16[1], r1 +@ CHECK: vmov.16 d16[1], r1 @ encoding: [0xf0,0x1b,0x00,0xee] + vmov.16 d16[1], r1 +@ CHECK: vmov.32 d16[1], r1 @ encoding: [0x90,0x1b,0x20,0xee] + vmov.32 d16[1], r1 +@ CHECK: vmov.8 d18[1], r1 @ encoding: [0xb0,0x1b,0x42,0xee] + vmov.8 d18[1], r1 +@ CHECK: vmov.16 d18[1], r1 @ encoding: [0xf0,0x1b,0x02,0xee] + vmov.16 d18[1], r1 +@ CHECK: vmov.32 d18[1], r1 @ encoding: [0x90,0x1b,0x22,0xee] + vmov.32 d18[1], r1 diff --git a/test/MC/ARM/neon-mul-accum-encoding.s b/test/MC/ARM/neon-mul-accum-encoding.s new file mode 100644 index 000000000000..e269dea360f4 --- /dev/null +++ b/test/MC/ARM/neon-mul-accum-encoding.s @@ -0,0 +1,67 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vmla.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xf2] + vmla.i8 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xf2] + vmla.i16 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xf2] + vmla.i32 d16, d18, d17 +@ CHECK: vmla.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x42,0xf2] + vmla.f32 d16, d18, d17 +@ CHECK: vmla.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xf2] + vmla.i8 q9, q8, q10 +@ CHECK: vmla.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xf2] + vmla.i16 q9, q8, q10 +@ CHECK: vmla.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xf2] + vmla.i32 q9, q8, q10 +@ CHECK: vmla.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x40,0xf2] + vmla.f32 q9, q8, q10 +@ CHECK: vmlal.s8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xf2] + vmlal.s8 q8, d19, d18 +@ CHECK: vmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xf2] + vmlal.s16 q8, d19, d18 +@ CHECK: vmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xf2] + vmlal.s32 q8, d19, d18 +@ CHECK: vmlal.u8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xf3] + vmlal.u8 q8, d19, d18 +@ CHECK: vmlal.u16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xf3] + vmlal.u16 q8, d19, d18 +@ CHECK: vmlal.u32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xf3] + vmlal.u32 q8, d19, d18 +@ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xf2] + vqdmlal.s16 q8, d19, d18 +@ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xf2] + vqdmlal.s32 q8, d19, d18 +@ CHECK: vmls.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xf3] + vmls.i8 d16, d18, d17 +@ CHECK: vmls.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xf3] + vmls.i16 d16, d18, d17 +@ CHECK: vmls.i32 d16, d18, d17 @ encoding: [0xa1,0x09,0x62,0xf3] + vmls.i32 d16, d18, d17 +@ CHECK: vmls.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x62,0xf2] + vmls.f32 d16, d18, d17 +@ CHECK: vmls.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xf3] + vmls.i8 q9, q8, q10 +@ CHECK: vmls.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xf3] + vmls.i16 q9, q8, q10 +@ CHECK: vmls.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xf3] + vmls.i32 q9, q8, q10 +@ CHECK: vmls.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x60,0xf2] + vmls.f32 q9, q8, q10 +@ CHECK: vmlsl.s8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xf2] + vmlsl.s8 q8, d19, d18 +@ CHECK: vmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xf2] + vmlsl.s16 q8, d19, d18 +@ CHECK: vmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xf2] + vmlsl.s32 q8, d19, d18 +@ CHECK: vmlsl.u8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xf3] + vmlsl.u8 q8, d19, d18 +@ CHECK: vmlsl.u16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xf3] + vmlsl.u16 q8, d19, d18 +@ CHECK: vmlsl.u32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xf3] + vmlsl.u32 q8, d19, d18 +@ CHECK: vqdmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0b,0xd3,0xf2] + vqdmlsl.s16 q8, d19, d18 +@ CHECK: vqdmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0b,0xe3,0xf2] + vqdmlsl.s32 q8, d19, d18 diff --git a/test/MC/ARM/neon-mul-encoding.s b/test/MC/ARM/neon-mul-encoding.s new file mode 100644 index 000000000000..4ff192f6e557 --- /dev/null +++ b/test/MC/ARM/neon-mul-encoding.s @@ -0,0 +1,56 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf2] + vmul.i8 d16, d16, d17 +@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xf2] + vmul.i16 d16, d16, d17 +@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0xb1,0x09,0x60,0xf2] + vmul.i32 d16, d16, d17 +@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0xb1,0x0d,0x40,0xf3] + vmul.f32 d16, d16, d17 +@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf2] + vmul.i8 q8, q8, q9 +@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xf2] + vmul.i16 q8, q8, q9 +@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0xf2,0x09,0x60,0xf2] + vmul.i32 q8, q8, q9 +@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0xf2,0x0d,0x40,0xf3] + vmul.f32 q8, q8, q9 +@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf3] + vmul.p8 d16, d16, d17 +@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf3] + vmul.p8 q8, q8, q9 +@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf2] + vqdmulh.s16 d16, d16, d17 +@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf2] + vqdmulh.s32 d16, d16, d17 +@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf2] + vqdmulh.s16 q8, q8, q9 +@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf2] + vqdmulh.s32 q8, q8, q9 +@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf3] + vqrdmulh.s16 d16, d16, d17 +@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf3] + vqrdmulh.s32 d16, d16, d17 +@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf3] + vqrdmulh.s16 q8, q8, q9 +@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf3] + vqrdmulh.s32 q8, q8, q9 +@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xf2] + vmull.s8 q8, d16, d17 +@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xf2] + vmull.s16 q8, d16, d17 +@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xf2] + vmull.s32 q8, d16, d17 +@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xf3] + vmull.u8 q8, d16, d17 +@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xf3] + vmull.u16 q8, d16, d17 +@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xf3] + vmull.u32 q8, d16, d17 +@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xa1,0x0e,0xc0,0xf2] + vmull.p8 q8, d16, d17 +@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0d,0xd0,0xf2] + vqdmull.s16 q8, d16, d17 +@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0d,0xe0,0xf2] + vqdmull.s32 q8, d16, d17 diff --git a/test/MC/ARM/neon-neg-encoding.s b/test/MC/ARM/neon-neg-encoding.s new file mode 100644 index 000000000000..014bdb0a86d1 --- /dev/null +++ b/test/MC/ARM/neon-neg-encoding.s @@ -0,0 +1,30 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vneg.s8 d16, d16 @ encoding: [0xa0,0x03,0xf1,0xf3] + vneg.s8 d16, d16 +@ CHECK: vneg.s16 d16, d16 @ encoding: [0xa0,0x03,0xf5,0xf3] + vneg.s16 d16, d16 +@ CHECK: vneg.s32 d16, d16 @ encoding: [0xa0,0x03,0xf9,0xf3] + vneg.s32 d16, d16 +@ CHECK: vneg.f32 d16, d16 @ encoding: [0xa0,0x07,0xf9,0xf3] + vneg.f32 d16, d16 +@ CHECK: vneg.s8 q8, q8 @ encoding: [0xe0,0x03,0xf1,0xf3] + vneg.s8 q8, q8 +@ CHECK: vneg.s16 q8, q8 @ encoding: [0xe0,0x03,0xf5,0xf3] + vneg.s16 q8, q8 +@ CHECK: vneg.s32 q8, q8 @ encoding: [0xe0,0x03,0xf9,0xf3] + vneg.s32 q8, q8 +@ CHECK: vneg.f32 q8, q8 @ encoding: [0xe0,0x07,0xf9,0xf3] + vneg.f32 q8, q8 +@ CHECK: vqneg.s8 d16, d16 @ encoding: [0xa0,0x07,0xf0,0xf3] + vqneg.s8 d16, d16 +@ CHECK: vqneg.s16 d16, d16 @ encoding: [0xa0,0x07,0xf4,0xf3] + vqneg.s16 d16, d16 +@ CHECK: vqneg.s32 d16, d16 @ encoding: [0xa0,0x07,0xf8,0xf3] + vqneg.s32 d16, d16 +@ CHECK: vqneg.s8 q8, q8 @ encoding: [0xe0,0x07,0xf0,0xf3] + vqneg.s8 q8, q8 +@ CHECK: vqneg.s16 q8, q8 @ encoding: [0xe0,0x07,0xf4,0xf3] + vqneg.s16 q8, q8 +@ CHECK: vqneg.s32 q8, q8 @ encoding: [0xe0,0x07,0xf8,0xf3] + vqneg.s32 q8, q8 diff --git a/test/MC/ARM/neon-pairwise-encoding.s b/test/MC/ARM/neon-pairwise-encoding.s new file mode 100644 index 000000000000..65c47bd64aeb --- /dev/null +++ b/test/MC/ARM/neon-pairwise-encoding.s @@ -0,0 +1,86 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xf2] + vpadd.i8 d16, d17, d16 +@ CHECK: vpadd.i16 d16, d17, d16 @ encoding: [0xb0,0x0b,0x51,0xf2] + vpadd.i16 d16, d17, d16 +@ CHECK: vpadd.i32 d16, d17, d16 @ encoding: [0xb0,0x0b,0x61,0xf2] + vpadd.i32 d16, d17, d16 +@ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf3] + vpadd.f32 d16, d16, d17 +@ CHECK: vpaddl.s8 d16, d16 @ encoding: [0x20,0x02,0xf0,0xf3] + vpaddl.s8 d16, d16 +@ CHECK: vpaddl.s16 d16, d16 @ encoding: [0x20,0x02,0xf4,0xf3] + vpaddl.s16 d16, d16 +@ CHECK: vpaddl.s32 d16, d16 @ encoding: [0x20,0x02,0xf8,0xf3] + vpaddl.s32 d16, d16 +@ CHECK: vpaddl.u8 d16, d16 @ encoding: [0xa0,0x02,0xf0,0xf3] + vpaddl.u8 d16, d16 +@ CHECK: vpaddl.u16 d16, d16 @ encoding: [0xa0,0x02,0xf4,0xf3] + vpaddl.u16 d16, d16 +@ CHECK: vpaddl.u32 d16, d16 @ encoding: [0xa0,0x02,0xf8,0xf3] + vpaddl.u32 d16, d16 +@ CHECK: vpaddl.s8 q8, q8 @ encoding: [0x60,0x02,0xf0,0xf3] + vpaddl.s8 q8, q8 +@ CHECK: vpaddl.s16 q8, q8 @ encoding: [0x60,0x02,0xf4,0xf3] + vpaddl.s16 q8, q8 +@ CHECK: vpaddl.s32 q8, q8 @ encoding: [0x60,0x02,0xf8,0xf3] + vpaddl.s32 q8, q8 +@ CHECK: vpaddl.u8 q8, q8 @ encoding: [0xe0,0x02,0xf0,0xf3] + vpaddl.u8 q8, q8 +@ CHECK: vpaddl.u16 q8, q8 @ encoding: [0xe0,0x02,0xf4,0xf3] + vpaddl.u16 q8, q8 +@ CHECK: vpaddl.u32 q8, q8 @ encoding: [0xe0,0x02,0xf8,0xf3] + vpaddl.u32 q8, q8 +@ CHECK: vpadal.s8 d16, d17 @ encoding: [0x21,0x06,0xf0,0xf3] + vpadal.s8 d16, d17 +@ CHECK: vpadal.s16 d16, d17 @ encoding: [0x21,0x06,0xf4,0xf3] + vpadal.s16 d16, d17 +@ CHECK: vpadal.s32 d16, d17 @ encoding: [0x21,0x06,0xf8,0xf3] + vpadal.s32 d16, d17 +@ CHECK: vpadal.u8 d16, d17 @ encoding: [0xa1,0x06,0xf0,0xf3] + vpadal.u8 d16, d17 +@ CHECK: vpadal.u16 d16, d17 @ encoding: [0xa1,0x06,0xf4,0xf3] + vpadal.u16 d16, d17 +@ CHECK: vpadal.u32 d16, d17 @ encoding: [0xa1,0x06,0xf8,0xf3] + vpadal.u32 d16, d17 +@ CHECK: vpadal.s8 q9, q8 @ encoding: [0x60,0x26,0xf0,0xf3] + vpadal.s8 q9, q8 +@ CHECK: vpadal.s16 q9, q8 @ encoding: [0x60,0x26,0xf4,0xf3] + vpadal.s16 q9, q8 +@ CHECK: vpadal.s32 q9, q8 @ encoding: [0x60,0x26,0xf8,0xf3] + vpadal.s32 q9, q8 +@ CHECK: vpadal.u8 q9, q8 @ encoding: [0xe0,0x26,0xf0,0xf3] + vpadal.u8 q9, q8 +@ CHECK: vpadal.u16 q9, q8 @ encoding: [0xe0,0x26,0xf4,0xf3] + vpadal.u16 q9, q8 +@ CHECK: vpadal.u32 q9, q8 @ encoding: [0xe0,0x26,0xf8,0xf3] + vpadal.u32 q9, q8 +@ CHECK: vpmin.s8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xf2] + vpmin.s8 d16, d16, d17 +@ CHECK: vpmin.s16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xf2] + vpmin.s16 d16, d16, d17 +@ CHECK: vpmin.s32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xf2] + vpmin.s32 d16, d16, d17 +@ CHECK: vpmin.u8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xf3] + vpmin.u8 d16, d16, d17 +@ CHECK: vpmin.u16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xf3] + vpmin.u16 d16, d16, d17 +@ CHECK: vpmin.u32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xf3] + vpmin.u32 d16, d16, d17 +@ CHECK: vpmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xf3] + vpmin.f32 d16, d16, d17 +@ CHECK: vpmax.s8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xf2] + vpmax.s8 d16, d16, d17 +@ CHECK: vpmax.s16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xf2] + vpmax.s16 d16, d16, d17 +@ CHECK: vpmax.s32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xf2] + vpmax.s32 d16, d16, d17 +@ CHECK: vpmax.u8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xf3] + vpmax.u8 d16, d16, d17 +@ CHECK: vpmax.u16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xf3] + vpmax.u16 d16, d16, d17 +@ CHECK: vpmax.u32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xf3] + vpmax.u32 d16, d16, d17 +@ CHECK: vpmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xf3] + vpmax.f32 d16, d16, d17 diff --git a/test/MC/ARM/neon-reciprocal-encoding.s b/test/MC/ARM/neon-reciprocal-encoding.s new file mode 100644 index 000000000000..e12a47308765 --- /dev/null +++ b/test/MC/ARM/neon-reciprocal-encoding.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xf3] + vrecpe.u32 d16, d16 +@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0x60,0x04,0xfb,0xf3] + vrecpe.u32 q8, q8 +@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0x20,0x05,0xfb,0xf3] + vrecpe.f32 d16, d16 +@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0x60,0x05,0xfb,0xf3] + vrecpe.f32 q8, q8 +@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x40,0xf2] + vrecps.f32 d16, d16, d17 +@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x40,0xf2] + vrecps.f32 q8, q8, q9 +@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xa0,0x04,0xfb,0xf3] + vrsqrte.u32 d16, d16 +@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xe0,0x04,0xfb,0xf3] + vrsqrte.u32 q8, q8 +@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xa0,0x05,0xfb,0xf3] + vrsqrte.f32 d16, d16 +@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xe0,0x05,0xfb,0xf3] + vrsqrte.f32 q8, q8 +@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x60,0xf2] + vrsqrts.f32 d16, d16, d17 +@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x60,0xf2] + vrsqrts.f32 q8, q8, q9 diff --git a/test/MC/ARM/neon-reverse-encoding.s b/test/MC/ARM/neon-reverse-encoding.s new file mode 100644 index 000000000000..e33b9f3f2371 --- /dev/null +++ b/test/MC/ARM/neon-reverse-encoding.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xf3] + vrev64.8 d16, d16 +@ CHECK: vrev64.16 d16, d16 @ encoding: [0x20,0x00,0xf4,0xf3] + vrev64.16 d16, d16 +@ CHECK: vrev64.32 d16, d16 @ encoding: [0x20,0x00,0xf8,0xf3] + vrev64.32 d16, d16 +@ CHECK: vrev64.8 q8, q8 @ encoding: [0x60,0x00,0xf0,0xf3] + vrev64.8 q8, q8 +@ CHECK: vrev64.16 q8, q8 @ encoding: [0x60,0x00,0xf4,0xf3] + vrev64.16 q8, q8 +@ CHECK: vrev64.32 q8, q8 @ encoding: [0x60,0x00,0xf8,0xf3] + vrev64.32 q8, q8 +@ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xf3] + vrev32.8 d16, d16 +@ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xf3] + vrev32.16 d16, d16 +@ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xf3] + vrev32.8 q8, q8 +@ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xf3] + vrev32.16 q8, q8 +@ CHECK: vrev16.8 d16, d16 @ encoding: [0x20,0x01,0xf0,0xf3] + vrev16.8 d16, d16 +@ CHECK: vrev16.8 q8, q8 @ encoding: [0x60,0x01,0xf0,0xf3] + vrev16.8 q8, q8 diff --git a/test/MC/ARM/neon-satshift-encoding.s b/test/MC/ARM/neon-satshift-encoding.s new file mode 100644 index 000000000000..506f48a6e3c7 --- /dev/null +++ b/test/MC/ARM/neon-satshift-encoding.s @@ -0,0 +1,150 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xf2] + vqshl.s8 d16, d16, d17 +@ CHECK: vqshl.s16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xf2] + vqshl.s16 d16, d16, d17 +@ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xf2] + vqshl.s32 d16, d16, d17 +@ CHECK: vqshl.s64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xf2] + vqshl.s64 d16, d16, d17 +@ CHECK: vqshl.u8 d16, d16, d17 @ encoding: [0xb0,0x04,0x41,0xf3] + vqshl.u8 d16, d16, d17 +@ CHECK: vqshl.u16 d16, d16, d17 @ encoding: [0xb0,0x04,0x51,0xf3] + vqshl.u16 d16, d16, d17 +@ CHECK: vqshl.u32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xf3] + vqshl.u32 d16, d16, d17 +@ CHECK: vqshl.u64 d16, d16, d17 @ encoding: [0xb0,0x04,0x71,0xf3] + vqshl.u64 d16, d16, d17 +@ CHECK: vqshl.s8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xf2] + vqshl.s8 q8, q8, q9 +@ CHECK: vqshl.s16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xf2] + vqshl.s16 q8, q8, q9 +@ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xf2] + vqshl.s32 q8, q8, q9 +@ CHECK: vqshl.s64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xf2] + vqshl.s64 q8, q8, q9 +@ CHECK: vqshl.u8 q8, q8, q9 @ encoding: [0xf0,0x04,0x42,0xf3] + vqshl.u8 q8, q8, q9 +@ CHECK: vqshl.u16 q8, q8, q9 @ encoding: [0xf0,0x04,0x52,0xf3] + vqshl.u16 q8, q8, q9 +@ CHECK: vqshl.u32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xf3] + vqshl.u32 q8, q8, q9 +@ CHECK: vqshl.u64 q8, q8, q9 @ encoding: [0xf0,0x04,0x72,0xf3] + vqshl.u64 q8, q8, q9 +@ CHECK: vqshl.s8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xf2] + vqshl.s8 d16, d16, #7 +@ CHECK: vqshl.s16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xf2] + vqshl.s16 d16, d16, #15 +@ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xf2] + vqshl.s32 d16, d16, #31 +@ CHECK: vqshl.s64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xf2] + vqshl.s64 d16, d16, #63 +@ CHECK: vqshl.u8 d16, d16, #7 @ encoding: [0x30,0x07,0xcf,0xf3] + vqshl.u8 d16, d16, #7 +@ CHECK: vqshl.u16 d16, d16, #15 @ encoding: [0x30,0x07,0xdf,0xf3] + vqshl.u16 d16, d16, #15 +@ CHECK: vqshl.u32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xf3] + vqshl.u32 d16, d16, #31 +@ CHECK: vqshl.u64 d16, d16, #63 @ encoding: [0xb0,0x07,0xff,0xf3] + vqshl.u64 d16, d16, #63 +@ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0x30,0x06,0xcf,0xf3] + vqshlu.s8 d16, d16, #7 +@ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0x30,0x06,0xdf,0xf3] + vqshlu.s16 d16, d16, #15 +@ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xf3] + vqshlu.s32 d16, d16, #31 +@ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xb0,0x06,0xff,0xf3] + vqshlu.s64 d16, d16, #63 +@ CHECK: vqshl.s8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xf2] + vqshl.s8 q8, q8, #7 +@ CHECK: vqshl.s16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xf2] + vqshl.s16 q8, q8, #15 +@ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xf2] + vqshl.s32 q8, q8, #31 +@ CHECK: vqshl.s64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xf2] + vqshl.s64 q8, q8, #63 +@ CHECK: vqshl.u8 q8, q8, #7 @ encoding: [0x70,0x07,0xcf,0xf3] + vqshl.u8 q8, q8, #7 +@ CHECK: vqshl.u16 q8, q8, #15 @ encoding: [0x70,0x07,0xdf,0xf3] + vqshl.u16 q8, q8, #15 +@ CHECK: vqshl.u32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xf3] + vqshl.u32 q8, q8, #31 +@ CHECK: vqshl.u64 q8, q8, #63 @ encoding: [0xf0,0x07,0xff,0xf3] + vqshl.u64 q8, q8, #63 +@ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0x70,0x06,0xcf,0xf3] + vqshlu.s8 q8, q8, #7 +@ CHECK: vqshlu.s16 q8, q8, #15 @ encoding: [0x70,0x06,0xdf,0xf3] + vqshlu.s16 q8, q8, #15 +@ CHECK: vqshlu.s32 q8, q8, #31 @ encoding: [0x70,0x06,0xff,0xf3] + vqshlu.s32 q8, q8, #31 +@ CHECK: vqshlu.s64 q8, q8, #63 @ encoding: [0xf0,0x06,0xff,0xf3] + vqshlu.s64 q8, q8, #63 +@ CHECK: vqrshl.s8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xf2] + vqrshl.s8 d16, d16, d17 +@ CHECK: vqrshl.s16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xf2] + vqrshl.s16 d16, d16, d17 +@ CHECK: vqrshl.s32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xf2] + vqrshl.s32 d16, d16, d17 +@ CHECK: vqrshl.s64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xf2] + vqrshl.s64 d16, d16, d17 +@ CHECK: vqrshl.u8 d16, d16, d17 @ encoding: [0xb0,0x05,0x41,0xf3] + vqrshl.u8 d16, d16, d17 +@ CHECK: vqrshl.u16 d16, d16, d17 @ encoding: [0xb0,0x05,0x51,0xf3] + vqrshl.u16 d16, d16, d17 +@ CHECK: vqrshl.u32 d16, d16, d17 @ encoding: [0xb0,0x05,0x61,0xf3] + vqrshl.u32 d16, d16, d17 +@ CHECK: vqrshl.u64 d16, d16, d17 @ encoding: [0xb0,0x05,0x71,0xf3] + vqrshl.u64 d16, d16, d17 +@ CHECK: vqrshl.s8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xf2] + vqrshl.s8 q8, q8, q9 +@ CHECK: vqrshl.s16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xf2] + vqrshl.s16 q8, q8, q9 +@ CHECK: vqrshl.s32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xf2] + vqrshl.s32 q8, q8, q9 +@ CHECK: vqrshl.s64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xf2] + vqrshl.s64 q8, q8, q9 +@ CHECK: vqrshl.u8 q8, q8, q9 @ encoding: [0xf0,0x05,0x42,0xf3] + vqrshl.u8 q8, q8, q9 +@ CHECK: vqrshl.u16 q8, q8, q9 @ encoding: [0xf0,0x05,0x52,0xf3] + vqrshl.u16 q8, q8, q9 +@ CHECK: vqrshl.u32 q8, q8, q9 @ encoding: [0xf0,0x05,0x62,0xf3] + vqrshl.u32 q8, q8, q9 +@ CHECK: vqrshl.u64 q8, q8, q9 @ encoding: [0xf0,0x05,0x72,0xf3] + vqrshl.u64 q8, q8, q9 +@ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf2] + vqshrn.s16 d16, q8, #8 +@ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf2] + vqshrn.s32 d16, q8, #16 +@ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xf2] + vqshrn.s64 d16, q8, #32 +@ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf3] + vqshrn.u16 d16, q8, #8 +@ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf3] + vqshrn.u32 d16, q8, #16 +@ CHECK: vqshrn.u64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xf3] + vqshrn.u64 d16, q8, #32 +@ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf3] + vqshrun.s16 d16, q8, #8 +@ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf3] + vqshrun.s32 d16, q8, #16 +@ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf3] + vqshrun.s64 d16, q8, #32 +@ CHECK: vqrshrn.s16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xf2] + vqrshrn.s16 d16, q8, #8 +@ CHECK: vqrshrn.s32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xf2] + vqrshrn.s32 d16, q8, #16 +@ CHECK: vqrshrn.s64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xf2] + vqrshrn.s64 d16, q8, #32 +@ CHECK: vqrshrn.u16 d16, q8, #8 @ encoding: [0x70,0x09,0xc8,0xf3] + vqrshrn.u16 d16, q8, #8 +@ CHECK: vqrshrn.u32 d16, q8, #16 @ encoding: [0x70,0x09,0xd0,0xf3] + vqrshrn.u32 d16, q8, #16 +@ CHECK: vqrshrn.u64 d16, q8, #32 @ encoding: [0x70,0x09,0xe0,0xf3] + vqrshrn.u64 d16, q8, #32 +@ CHECK: vqrshrun.s16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf3] + vqrshrun.s16 d16, q8, #8 +@ CHECK: vqrshrun.s32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xf3] + vqrshrun.s32 d16, q8, #16 +@ CHECK: vqrshrun.s64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf3] + vqrshrun.s64 d16, q8, #32 diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s new file mode 100644 index 000000000000..4b4fa0876ccd --- /dev/null +++ b/test/MC/ARM/neon-shift-encoding.s @@ -0,0 +1,160 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xf3] + vshl.u8 d16, d17, d16 +@ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0xa1,0x04,0x50,0xf3] + vshl.u16 d16, d17, d16 +@ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0xa1,0x04,0x60,0xf3] + vshl.u32 d16, d17, d16 +@ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0xa1,0x04,0x70,0xf3] + vshl.u64 d16, d17, d16 +@ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xf2] + vshl.i8 d16, d16, #7 +@ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xf2] + vshl.i16 d16, d16, #15 +@ CHECK: vshl.i32 d16, d16, #31 @ encoding: [0x30,0x05,0xff,0xf2] + vshl.i32 d16, d16, #31 +@ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xb0,0x05,0xff,0xf2] + vshl.i64 d16, d16, #63 +@ CHECK: vshl.u8 q8, q9, q8 @ encoding: [0xe2,0x04,0x40,0xf3] + vshl.u8 q8, q9, q8 +@ CHECK: vshl.u16 q8, q9, q8 @ encoding: [0xe2,0x04,0x50,0xf3] + vshl.u16 q8, q9, q8 +@ CHECK: vshl.u32 q8, q9, q8 @ encoding: [0xe2,0x04,0x60,0xf3] + vshl.u32 q8, q9, q8 +@ CHECK: vshl.u64 q8, q9, q8 @ encoding: [0xe2,0x04,0x70,0xf3] + vshl.u64 q8, q9, q8 +@ CHECK: vshl.i8 q8, q8, #7 @ encoding: [0x70,0x05,0xcf,0xf2] + vshl.i8 q8, q8, #7 +@ CHECK: vshl.i16 q8, q8, #15 @ encoding: [0x70,0x05,0xdf,0xf2] + vshl.i16 q8, q8, #15 +@ CHECK: vshl.i32 q8, q8, #31 @ encoding: [0x70,0x05,0xff,0xf2] + vshl.i32 q8, q8, #31 +@ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xf0,0x05,0xff,0xf2] + vshl.i64 q8, q8, #63 +@ CHECK: vshr.u8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xf3] + vshr.u8 d16, d16, #8 +@ CHECK: vshr.u16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xf3] + vshr.u16 d16, d16, #16 +@ CHECK: vshr.u32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xf3] + vshr.u32 d16, d16, #32 +@ CHECK: vshr.u64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xf3] + vshr.u64 d16, d16, #64 +@ CHECK: vshr.u8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xf3] + vshr.u8 q8, q8, #8 +@ CHECK: vshr.u16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xf3] + vshr.u16 q8, q8, #16 +@ CHECK: vshr.u32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xf3] + vshr.u32 q8, q8, #32 +@ CHECK: vshr.u64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xf3] + vshr.u64 q8, q8, #64 +@ CHECK: vshr.s8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xf2] + vshr.s8 d16, d16, #8 +@ CHECK: vshr.s16 d16, d16, #16 @ encoding: [0x30,0x00,0xd0,0xf2] + vshr.s16 d16, d16, #16 +@ CHECK: vshr.s32 d16, d16, #32 @ encoding: [0x30,0x00,0xe0,0xf2] + vshr.s32 d16, d16, #32 +@ CHECK: vshr.s64 d16, d16, #64 @ encoding: [0xb0,0x00,0xc0,0xf2] + vshr.s64 d16, d16, #64 +@ CHECK: vshr.s8 q8, q8, #8 @ encoding: [0x70,0x00,0xc8,0xf2] + vshr.s8 q8, q8, #8 +@ CHECK: vshr.s16 q8, q8, #16 @ encoding: [0x70,0x00,0xd0,0xf2] + vshr.s16 q8, q8, #16 +@ CHECK: vshr.s32 q8, q8, #32 @ encoding: [0x70,0x00,0xe0,0xf2 + vshr.s32 q8, q8, #32 +@ CHECK: vshr.s64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xf2] + vshr.s64 q8, q8, #64 +@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2] + vshll.s8 q8, d16, #7 +@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf2] + vshll.s16 q8, d16, #15 +@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf2] + vshll.s32 q8, d16, #31 +@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf3] + vshll.u8 q8, d16, #7 +@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf3] + vshll.u16 q8, d16, #15 +@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf3] + vshll.u32 q8, d16, #31 +@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0x20,0x03,0xf2,0xf3] + vshll.i8 q8, d16, #8 +@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0x20,0x03,0xf6,0xf3] + vshll.i16 q8, d16, #16 +@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0x20,0x03,0xfa,0xf3] + vshll.i32 q8, d16, #32 +@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf2] + vshrn.i16 d16, q8, #8 +@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf2] + vshrn.i32 d16, q8, #16 +@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf2] + vshrn.i64 d16, q8, #32 +@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf2] + vrshl.s8 d16, d17, d16 +@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf2] + vrshl.s16 d16, d17, d16 +@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf2] + vrshl.s32 d16, d17, d16 +@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0 + vrshl.s64 d16, d17, d16 +@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf3] + vrshl.u8 d16, d17, d16 +@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf3] + vrshl.u16 d16, d17, d16 +@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf3] + vrshl.u32 d16, d17, d16 +@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xf3] + vrshl.u64 d16, d17, d16 +@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xf2] + vrshl.s8 q8, q9, q8 +@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xf2] + vrshl.s16 q8, q9, q8 +@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xf2] + vrshl.s32 q8, q9, q8 +@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xf2] + vrshl.s64 q8, q9, q8 +@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xf3] + vrshl.u8 q8, q9, q8 +@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xf3] + vrshl.u16 q8, q9, q8 +@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xf3] + vrshl.u32 q8, q9, q8 +@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xf3] + vrshl.u64 q8, q9, q8 +@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf2] + vrshr.s8 d16, d16, #8 +@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf2] + vrshr.s16 d16, d16, #16 +@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf2] + vrshr.s32 d16, d16, #32 +@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf2] + vrshr.s64 d16, d16, #64 +@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf3] + vrshr.u8 d16, d16, #8 +@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf3] + vrshr.u16 d16, d16, #16 +@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf3] + vrshr.u32 d16, d16, #32 +@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf3] + vrshr.u64 d16, d16, #64 +@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xf2] + vrshr.s8 q8, q8, #8 +@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xf2] + vrshr.s16 q8, q8, #16 +@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xf2] + vrshr.s32 q8, q8, #32 +@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf2] + vrshr.s64 q8, q8, #64 +@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xf3] + vrshr.u8 q8, q8, #8 +@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xf3] + vrshr.u16 q8, q8, #16 +@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xf3] + vrshr.u32 q8, q8, #32 +@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf3] + vrshr.u64 q8, q8, #64 +@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf2] + vrshrn.i16 d16, q8, #8 +@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xf2] + vrshrn.i32 d16, q8, #16 +@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf2] + vrshrn.i64 d16, q8, #32 diff --git a/test/MC/ARM/neon-shiftaccum-encoding.s b/test/MC/ARM/neon-shiftaccum-encoding.s new file mode 100644 index 000000000000..0dc630d395dc --- /dev/null +++ b/test/MC/ARM/neon-shiftaccum-encoding.s @@ -0,0 +1,98 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xf2] + vsra.s8 d17, d16, #8 +@ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xf2] + vsra.s16 d17, d16, #16 +@ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xf2] + vsra.s32 d17, d16, #32 +@ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xf2] + vsra.s64 d17, d16, #64 +@ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xf2] + vsra.s8 q8, q9, #8 +@ CHECK: vsra.s16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xf2] + vsra.s16 q8, q9, #16 +@ CHECK: vsra.s32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xf2] + vsra.s32 q8, q9, #32 +@ CHECK: vsra.s64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xf2] + vsra.s64 q8, q9, #64 +@ CHECK: vsra.u8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xf3] + vsra.u8 d17, d16, #8 +@ CHECK: vsra.u16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xf3] + vsra.u16 d17, d16, #16 +@ CHECK: vsra.u32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xf3] + vsra.u32 d17, d16, #32 +@ CHECK: vsra.u64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xf3] + vsra.u64 d17, d16, #64 +@ CHECK: vsra.u8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xf3] + vsra.u8 q8, q9, #8 +@ CHECK: vsra.u16 q8, q9, #16 @ encoding: [0x72,0x01,0xd0,0xf3] + vsra.u16 q8, q9, #16 +@ CHECK: vsra.u32 q8, q9, #32 @ encoding: [0x72,0x01,0xe0,0xf3] + vsra.u32 q8, q9, #32 +@ CHECK: vsra.u64 q8, q9, #64 @ encoding: [0xf2,0x01,0xc0,0xf3] + vsra.u64 q8, q9, #64 +@ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xf2] + vrsra.s8 d17, d16, #8 +@ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xf2] + vrsra.s16 d17, d16, #16 +@ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xf2] + vrsra.s32 d17, d16, #32 +@ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xf2] + vrsra.s64 d17, d16, #64 +@ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xf3] + vrsra.u8 d17, d16, #8 +@ CHECK: vrsra.u16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xf3] + vrsra.u16 d17, d16, #16 +@ CHECK: vrsra.u32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xf3] + vrsra.u32 d17, d16, #32 +@ CHECK: vrsra.u64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xf3] + vrsra.u64 d17, d16, #64 +@ CHECK: vrsra.s8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xf2] + vrsra.s8 q8, q9, #8 +@ CHECK: vrsra.s16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xf2] + vrsra.s16 q8, q9, #16 +@ CHECK: vrsra.s32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xf2] + vrsra.s32 q8, q9, #32 +@ CHECK: vrsra.s64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xf2] + vrsra.s64 q8, q9, #64 +@ CHECK: vrsra.u8 q8, q9, #8 @ encoding: [0x72,0x03,0xc8,0xf3] + vrsra.u8 q8, q9, #8 +@ CHECK: vrsra.u16 q8, q9, #16 @ encoding: [0x72,0x03,0xd0,0xf3] + vrsra.u16 q8, q9, #16 +@ CHECK: vrsra.u32 q8, q9, #32 @ encoding: [0x72,0x03,0xe0,0xf3] + vrsra.u32 q8, q9, #32 +@ CHECK: vrsra.u64 q8, q9, #64 @ encoding: [0xf2,0x03,0xc0,0xf3] + vrsra.u64 q8, q9, #64 +@ CHECK: vsli.8 d17, d16, #7 @ encoding: [0x30,0x15,0xcf,0xf3] + vsli.8 d17, d16, #7 +@ CHECK: vsli.16 d17, d16, #15 @ encoding: [0x30,0x15,0xdf,0xf3] + vsli.16 d17, d16, #15 +@ CHECK: vsli.32 d17, d16, #31 @ encoding: [0x30,0x15,0xff,0xf3] + vsli.32 d17, d16, #31 +@ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xb0,0x15,0xff,0xf3] + vsli.64 d17, d16, #63 +@ CHECK: vsli.8 q9, q8, #7 @ encoding: [0x70,0x25,0xcf,0xf3] + vsli.8 q9, q8, #7 +@ CHECK: vsli.16 q9, q8, #15 @ encoding: [0x70,0x25,0xdf,0xf3] + vsli.16 q9, q8, #15 +@ CHECK: vsli.32 q9, q8, #31 @ encoding: [0x70,0x25,0xff,0xf3] + vsli.32 q9, q8, #31 +@ CHECK: vsli.64 q9, q8, #63 @ encoding: [0xf0,0x25,0xff,0xf3] + vsli.64 q9, q8, #63 +@ CHECK: vsri.8 d17, d16, #8 @ encoding: [0x30,0x14,0xc8,0xf3] + vsri.8 d17, d16, #8 +@ CHECK: vsri.16 d17, d16, #16 @ encoding: [0x30,0x14,0xd0,0xf3] + vsri.16 d17, d16, #16 +@ CHECK: vsri.32 d17, d16, #32 @ encoding: [0x30,0x14,0xe0,0xf3] + vsri.32 d17, d16, #32 +@ CHECK: vsri.64 d17, d16, #64 @ encoding: [0xb0,0x14,0xc0,0xf3] + vsri.64 d17, d16, #64 +@ CHECK: vsri.8 q9, q8, #8 @ encoding: [0x70,0x24,0xc8,0xf3] + vsri.8 q9, q8, #8 +@ CHECK: vsri.16 q9, q8, #16 @ encoding: [0x70,0x24,0xd0,0xf3] + vsri.16 q9, q8, #16 +@ CHECK: vsri.32 q9, q8, #32 @ encoding: [0x70,0x24,0xe0,0xf3] + vsri.32 q9, q8, #32 +@ CHECK: vsri.64 q9, q8, #64 @ encoding: [0xf0,0x24,0xc0,0xf3] + vsri.64 q9, q8, #64 diff --git a/test/MC/ARM/neon-shuffle-encoding.s b/test/MC/ARM/neon-shuffle-encoding.s new file mode 100644 index 000000000000..ce7eb66a08a7 --- /dev/null +++ b/test/MC/ARM/neon-shuffle-encoding.s @@ -0,0 +1,46 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xa0,0x03,0xf1,0xf2] + vext.8 d16, d17, d16, #3 +@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xa0,0x05,0xf1,0xf2] + vext.8 d16, d17, d16, #5 +@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xe0,0x03,0xf2,0xf2] + vext.8 q8, q9, q8, #3 +@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xe0,0x07,0xf2,0xf2] + vext.8 q8, q9, q8, #7 +@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xa0,0x06,0xf1,0xf2] + vext.16 d16, d17, d16, #3 +@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xe0,0x0c,0xf2,0xf2] + vext.32 q8, q9, q8, #3 +@ CHECK: vtrn.8 d17, d16 @ encoding: [0xa0,0x10,0xf2,0xf3] + vtrn.8 d17, d16 +@ CHECK: vtrn.16 d17, d16 @ encoding: [0xa0,0x10,0xf6,0xf3] + vtrn.16 d17, d16 +@ CHECK: vtrn.32 d17, d16 @ encoding: [0xa0,0x10,0xfa,0xf3] + vtrn.32 d17, d16 +@ CHECK: vtrn.8 q9, q8 @ encoding: [0xe0,0x20,0xf2,0xf3] + vtrn.8 q9, q8 +@ CHECK: vtrn.16 q9, q8 @ encoding: [0xe0,0x20,0xf6,0xf3] + vtrn.16 q9, q8 +@ CHECK: vtrn.32 q9, q8 @ encoding: [0xe0,0x20,0xfa,0xf3] + vtrn.32 q9, q8 +@ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xf3] + vuzp.8 d17, d16 +@ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xf3] + vuzp.16 d17, d16 +@ CHECK: vuzp.8 q9, q8 @ encoding: [0x60,0x21,0xf2,0xf3] + vuzp.8 q9, q8 +@ CHECK: vuzp.16 q9, q8 @ encoding: [0x60,0x21,0xf6,0xf3] + vuzp.16 q9, q8 +@ CHECK: vuzp.32 q9, q8 @ encoding: [0x60,0x21,0xfa,0xf3] + vuzp.32 q9, q8 +@ CHECK: vzip.8 d17, d16 @ encoding: [0xa0,0x11,0xf2,0xf3] + vzip.8 d17, d16 +@ CHECK: vzip.16 d17, d16 @ encoding: [0xa0,0x11,0xf6,0xf3] + vzip.16 d17, d16 +@ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xf3] + vzip.8 q9, q8 +@ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xf3] + vzip.16 q9, q8 +@ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xf3] + vzip.32 q9, q8 diff --git a/test/MC/ARM/neon-sub-encoding.s b/test/MC/ARM/neon-sub-encoding.s new file mode 100644 index 000000000000..241a01ffd4d4 --- /dev/null +++ b/test/MC/ARM/neon-sub-encoding.s @@ -0,0 +1,108 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vsub.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf3] + vsub.i8 d16, d17, d16 +@ CHECK: vsub.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf3] + vsub.i16 d16, d17, d16 +@ CHECK: vsub.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xf3] + vsub.i32 d16, d17, d16 +@ CHECK: vsub.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xf3] + vsub.i64 d16, d17, d16 +@ CHECK: vsub.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xf2] + vsub.f32 d16, d16, d17 +@ CHECK: vsub.i8 q8, q8, q9 @ encoding: [0xe2,0x08,0x40,0xf3] + vsub.i8 q8, q8, q9 +@ CHECK: vsub.i16 q8, q8, q9 @ encoding: [0xe2,0x08,0x50,0xf3] + vsub.i16 q8, q8, q9 +@ CHECK: vsub.i32 q8, q8, q9 @ encoding: [0xe2,0x08,0x60,0xf3] + vsub.i32 q8, q8, q9 +@ CHECK: vsub.i64 q8, q8, q9 @ encoding: [0xe2,0x08,0x70,0xf3] + vsub.i64 q8, q8, q9 +@ CHECK: vsub.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xf2] + vsub.f32 q8, q8, q9 +@ CHECK: vsubl.s8 q8, d17, d16 @ encoding: [0xa0,0x02,0xc1,0xf2] + vsubl.s8 q8, d17, d16 +@ CHECK: vsubl.s16 q8, d17, d16 @ encoding: [0xa0,0x02,0xd1,0xf2] + vsubl.s16 q8, d17, d16 +@ CHECK: vsubl.s32 q8, d17, d16 @ encoding: [0xa0,0x02,0xe1,0xf2] + vsubl.s32 q8, d17, d16 +@ CHECK: vsubl.u8 q8, d17, d16 @ encoding: [0xa0,0x02,0xc1,0xf3] + vsubl.u8 q8, d17, d16 +@ CHECK: vsubl.u16 q8, d17, d16 @ encoding: [0xa0,0x02,0xd1,0xf3] + vsubl.u16 q8, d17, d16 +@ CHECK: vsubl.u32 q8, d17, d16 @ encoding: [0xa0,0x02,0xe1,0xf3] + vsubl.u32 q8, d17, d16 +@ CHECK: vsubw.s8 q8, q8, d18 @ encoding: [0xa2,0x03,0xc0,0xf2] + vsubw.s8 q8, q8, d18 +@ CHECK: vsubw.s16 q8, q8, d18 @ encoding: [0xa2,0x03,0xd0,0xf2] + vsubw.s16 q8, q8, d18 +@ CHECK: vsubw.s32 q8, q8, d18 @ encoding: [0xa2,0x03,0xe0,0xf2] + vsubw.s32 q8, q8, d18 +@ CHECK: vsubw.u8 q8, q8, d18 @ encoding: [0xa2,0x03,0xc0,0xf3] + vsubw.u8 q8, q8, d18 +@ CHECK: vsubw.u16 q8, q8, d18 @ encoding: [0xa2,0x03,0xd0,0xf3] + vsubw.u16 q8, q8, d18 +@ CHECK: vsubw.u32 q8, q8, d18 @ encoding: [0xa2,0x03,0xe0,0xf3] + vsubw.u32 q8, q8, d18 +@ CHECK: vhsub.s8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf2] + vhsub.s8 d16, d16, d17 +@ CHECK: vhsub.s16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf2] + vhsub.s16 d16, d16, d17 +@ CHECK: vhsub.s32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf2] + vhsub.s32 d16, d16, d17 +@ CHECK: vhsub.u8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf3] + vhsub.u8 d16, d16, d17 +@ CHECK: vhsub.u16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf3] + vhsub.u16 d16, d16, d17 +@ CHECK: vhsub.u32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf3] + vhsub.u32 d16, d16, d17 +@ CHECK: vhsub.s8 q8, q8, q9 @ encoding: [0xe2,0x02,0x40,0xf2] + vhsub.s8 q8, q8, q9 +@ CHECK: vhsub.s16 q8, q8, q9 @ encoding: [0xe2,0x02,0x50,0xf2] + vhsub.s16 q8, q8, q9 +@ CHECK: vhsub.s32 q8, q8, q9 @ encoding: [0xe2,0x02,0x60,0xf2] + vhsub.s32 q8, q8, q9 +@ CHECK: vqsub.s8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf2] + vqsub.s8 d16, d16, d17 +@ CHECK: vqsub.s16 d16, d16, d17 @ encoding: [0xb1,0x02,0x50,0xf2] + vqsub.s16 d16, d16, d17 +@ CHECK: vqsub.s32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf2] + vqsub.s32 d16, d16, d17 +@ CHECK: vqsub.s64 d16, d16, d17 @ encoding: [0xb1,0x02,0x70,0xf2] + vqsub.s64 d16, d16, d17 +@ CHECK: vqsub.u8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf3] + vqsub.u8 d16, d16, d17 +@ CHECK: vqsub.u16 d16, d16, d17 @ encoding: [0xb1,0x02,0x50,0xf3] + vqsub.u16 d16, d16, d17 +@ CHECK: vqsub.u32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf3] + vqsub.u32 d16, d16, d17 +@ CHECK: vqsub.u64 d16, d16, d17 @ encoding: [0xb1,0x02,0x70,0xf3] + vqsub.u64 d16, d16, d17 +@ CHECK: vqsub.s8 q8, q8, q9 @ encoding: [0xf2,0x02,0x40,0xf2] + vqsub.s8 q8, q8, q9 +@ CHECK: vqsub.s16 q8, q8, q9 @ encoding: [0xf2,0x02,0x50,0xf2] + vqsub.s16 q8, q8, q9 +@ CHECK: vqsub.s32 q8, q8, q9 @ encoding: [0xf2,0x02,0x60,0xf2] + vqsub.s32 q8, q8, q9 +@ CHECK: vqsub.s64 q8, q8, q9 @ encoding: [0xf2,0x02,0x70,0xf2] + vqsub.s64 q8, q8, q9 +@ CHECK: vqsub.u8 q8, q8, q9 @ encoding: [0xf2,0x02,0x40,0xf3] + vqsub.u8 q8, q8, q9 +@ CHECK: vqsub.u16 q8, q8, q9 @ encoding: [0xf2,0x02,0x50,0xf3] + vqsub.u16 q8, q8, q9 +@ CHECK: vqsub.u32 q8, q8, q9 @ encoding: [0xf2,0x02,0x60,0xf3] + vqsub.u32 q8, q8, q9 +@ CHECK: vqsub.u64 q8, q8, q9 @ encoding: [0xf2,0x02,0x70,0xf3] + vqsub.u64 q8, q8, q9 +@ CHECK: vsubhn.i16 d16, q8, q9 @ encoding: [0xa2,0x06,0xc0,0xf2] + vsubhn.i16 d16, q8, q9 +@ CHECK: vsubhn.i32 d16, q8, q9 @ encoding: [0xa2,0x06,0xd0,0xf2] + vsubhn.i32 d16, q8, q9 +@ CHECK: vsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf2] + vsubhn.i64 d16, q8, q9 +@ CHECK: vrsubhn.i16 d16, q8, q9 @ encoding: [0xa2,0x06,0xc0,0xf3] + vrsubhn.i16 d16, q8, q9 +@ CHECK: vrsubhn.i32 d16, q8, q9 @ encoding: [0xa2,0x06,0xd0,0xf3] + vrsubhn.i32 d16, q8, q9 +@ CHECK: vrsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf3] + vrsubhn.i64 d16, q8, q9 diff --git a/test/MC/ARM/neon-table-encoding.s b/test/MC/ARM/neon-table-encoding.s new file mode 100644 index 000000000000..7bf47c782f8a --- /dev/null +++ b/test/MC/ARM/neon-table-encoding.s @@ -0,0 +1,19 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vtbl.8 d16, {d17}, d16 @ encoding: [0xa0,0x08,0xf1,0xf3] + vtbl.8 d16, {d17}, d16 +@ CHECK: vtbl.8 d16, {d16, d17}, d18 @ encoding: [0xa2,0x09,0xf0,0xf3] + vtbl.8 d16, {d16, d17}, d18 +@ CHECK: vtbl.8 d16, {d16, d17, d18}, d20 @ encoding: [0xa4,0x0a,0xf0,0xf3] + vtbl.8 d16, {d16, d17, d18}, d20 +@ CHECK: vtbl.8 d16, {d16, d17, d18, d19}, d20 @ encoding: [0xa4,0x0b,0xf0,0xf3] + vtbl.8 d16, {d16, d17, d18, d19}, d20 +@ CHECK: vtbx.8 d18, {d16}, d17 @ encoding: [0xe1,0x28,0xf0,0xf3] + vtbx.8 d18, {d16}, d17 +@ CHECK: vtbx.8 d19, {d16, d17}, d18 @ encoding: [0xe2,0x39,0xf0,0xf3] + vtbx.8 d19, {d16, d17}, d18 +@ CHECK: vtbx.8 d20, {d16, d17, d18}, d21 @ encoding: [0xe5,0x4a,0xf0,0xf3] + vtbx.8 d20, {d16, d17, d18}, d21 +@ CHECK: vtbx.8 d20, {d16, d17, d18, d19}, d21 @ encoding: [0xe5,0x4b,0xf0,0xf3] + vtbx.8 d20, {d16, d17, d18, d19}, d21 diff --git a/test/MC/ARM/neon-vld-encoding.s b/test/MC/ARM/neon-vld-encoding.s new file mode 100644 index 000000000000..be55f47900c6 --- /dev/null +++ b/test/MC/ARM/neon-vld-encoding.s @@ -0,0 +1,110 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vld1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x60,0xf4] + vld1.8 {d16}, [r0, :64] +@ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x60,0xf4] + vld1.16 {d16}, [r0] +@ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x60,0xf4] + vld1.32 {d16}, [r0] +@ CHECK: vld1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x60,0xf4] + vld1.64 {d16}, [r0] +@ CHECK: vld1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x60,0xf4] + vld1.8 {d16, d17}, [r0, :64] +@ CHECK: vld1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x60,0xf4] + vld1.16 {d16, d17}, [r0, :128] +@ CHECK: vld1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x60,0xf4] + vld1.32 {d16, d17}, [r0] +@ CHECK: vld1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x60,0xf4] + vld1.64 {d16, d17}, [r0] + +@ CHECK: vld2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x60,0xf4] + vld2.8 {d16, d17}, [r0, :64] +@ CHECK: vld2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x60,0xf4] + vld2.16 {d16, d17}, [r0, :128] +@ CHECK: vld2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x60,0xf4] + vld2.32 {d16, d17}, [r0] +@ CHECK: vld2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x60,0xf4] + vld2.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vld2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x60,0xf4] + vld2.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vld2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x60,0xf4] + vld2.32 {d16, d17, d18, d19}, [r0, :256] + +@ CHECK: vld3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x60,0xf4] + vld3.8 {d16, d17, d18}, [r0, :64] +@ CHECK: vld3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x60,0xf4] + vld3.16 {d16, d17, d18}, [r0] +@ CHECK: vld3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x60,0xf4] + vld3.32 {d16, d17, d18}, [r0] +@ CHECK: vld3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x60,0xf4] + vld3.8 {d16, d18, d20}, [r0, :64]! +@ CHECK: vld3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x60,0xf4] + vld3.8 {d17, d19, d21}, [r0, :64]! +@ CHECK: vld3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x60,0xf4] + vld3.16 {d16, d18, d20}, [r0]! +@ CHECK: vld3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x60,0xf4] + vld3.16 {d17, d19, d21}, [r0]! +@ CHECK: vld3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x60,0xf4] + vld3.32 {d16, d18, d20}, [r0]! +@ CHECK: vld3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x60,0xf4] + vld3.32 {d17, d19, d21}, [r0]! + +@ CHECK: vld4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x60,0xf4] + vld4.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vld4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x60,0xf4] + vld4.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vld4.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x00,0x60,0xf4] + vld4.32 {d16, d17, d18, d19}, [r0, :256] +@ CHECK: vld4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x60,0xf4] + vld4.8 {d16, d18, d20, d22}, [r0, :256]! +@ CHECK: vld4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x60,0xf4] + vld4.8 {d17, d19, d21, d23}, [r0, :256]! +@ CHECK: vld4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x60,0xf4] + vld4.16 {d16, d18, d20, d22}, [r0]! +@ CHECK: vld4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x60,0xf4] + vld4.16 {d17, d19, d21, d23}, [r0]! +@ CHECK: vld4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x60,0xf4] + vld4.32 {d16, d18, d20, d22}, [r0]! +@ CHECK: vld4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x60,0xf4] + vld4.32 {d17, d19, d21, d23}, [r0]! + +@ CHECK: vld1.8 {d16[3]}, [r0] @ encoding: [0x6f,0x00,0xe0,0xf4] + vld1.8 {d16[3]}, [r0] +@ CHECK: vld1.16 {d16[2]}, [r0, :16] @ encoding: [0x9f,0x04,0xe0,0xf4] + vld1.16 {d16[2]}, [r0, :16] +@ CHECK: vld1.32 {d16[1]}, [r0, :32] @ encoding: [0xbf,0x08,0xe0,0xf4] + vld1.32 {d16[1]}, [r0, :32] + +@ CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xe0,0xf4] + vld2.8 {d16[1], d17[1]}, [r0, :16] +@ CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xe0,0xf4] + vld2.16 {d16[1], d17[1]}, [r0, :32] +@ CHECK: vld2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xe0,0xf4] + vld2.32 {d16[1], d17[1]}, [r0] +@ CHECK: vld2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xe0,0xf4] + vld2.16 {d17[1], d19[1]}, [r0] +@ CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xe0,0xf4] + vld2.32 {d17[0], d19[0]}, [r0, :64] + +@ CHECK: vld3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xe0,0xf4] + vld3.8 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x4f,0x06,0xe0,0xf4] + vld3.16 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x8f,0x0a,0xe0,0xf4] + vld3.32 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0] @ encoding: [0x6f,0x06,0xe0,0xf4] + vld3.16 {d16[1], d18[1], d20[1]}, [r0] +@ CHECK: vld3.32 {d17[1], d19[1], d21[1]}, [r0] @ encoding: [0xcf,0x1a,0xe0,0xf4] + vld3.32 {d17[1], d19[1], d21[1]}, [r0] + +@ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xe0,0xf4] + vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] +@ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xe0,0xf4] + vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +@ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xe0,0xf4] + vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +@ CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] @ encoding: [0x7f,0x07,0xe0,0xf4] + vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] +@ CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xe0,0xf4] + vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/test/MC/ARM/neon-vst-encoding.s b/test/MC/ARM/neon-vst-encoding.s new file mode 100644 index 000000000000..c595aa2d5a4d --- /dev/null +++ b/test/MC/ARM/neon-vst-encoding.s @@ -0,0 +1,101 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s +@ XFAIL: * + +@ CHECK: vst1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x40,0xf4] + vst1.8 {d16}, [r0, :64] +@ CHECK: vst1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x40,0xf4] + vst1.16 {d16}, [r0] +@ CHECK: vst1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x40,0xf4] + vst1.32 {d16}, [r0] +@ CHECK: vst1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x40,0xf4] + vst1.64 {d16}, [r0] +@ CHECK: vst1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x40,0xf4] + vst1.8 {d16, d17}, [r0, :64] +@ CHECK: vst1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x40,0xf4] + vst1.16 {d16, d17}, [r0, :128] +@ CHECK: vst1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x40,0xf4] + vst1.32 {d16, d17}, [r0] +@ CHECK: vst1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x40,0xf4] + vst1.64 {d16, d17}, [r0] + +@ CHECK: vst2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x40,0xf4] + vst2.8 {d16, d17}, [r0, :64] +@ CHECK: vst2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x40,0xf4] + vst2.16 {d16, d17}, [r0, :128] +@ CHECK: vst2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x40,0xf4] + vst2.32 {d16, d17}, [r0] +@ CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x40,0xf4] + vst2.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vst2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x40,0xf4] + vst2.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vst2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x40,0xf4] + vst2.32 {d16, d17, d18, d19}, [r0, :256] + +@ CHECK: vst3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x40,0xf4] + vst3.8 {d16, d17, d18}, [r0, :64] +@ CHECK: vst3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x40,0xf4] + vst3.16 {d16, d17, d18}, [r0] +@ CHECK: vst3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x40,0xf4] + vst3.32 {d16, d17, d18}, [r0] +@ CHECK: vst3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x40,0xf4] + vst3.8 {d16, d18, d20}, [r0, :64]! +@ CHECK: vst3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x40,0xf4] + vst3.8 {d17, d19, d21}, [r0, :64]! +@ CHECK: vst3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x40,0xf4] + vst3.16 {d16, d18, d20}, [r0]! +@ CHECK: vst3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x40,0xf4] + vst3.16 {d17, d19, d21}, [r0]! +@ CHECK: vst3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x40,0xf4] + vst3.32 {d16, d18, d20}, [r0]! +@ CHECK: vst3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x40,0xf4] + vst3.32 {d17, d19, d21}, [r0]! + +@ CHECK: vst4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x40,0xf4] + vst4.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vst4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x40,0xf4] + vst4.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vst4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x40,0xf4] + vst4.8 {d16, d18, d20, d22}, [r0, :256]! +@ CHECK: vst4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x40,0xf4] + vst4.8 {d17, d19, d21, d23}, [r0, :256]! +@ CHECK: vst4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x40,0xf4] + vst4.16 {d16, d18, d20, d22}, [r0]! +@ CHECK: vst4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x40,0xf4] + vst4.16 {d17, d19, d21, d23}, [r0]! +@ CHECK: vst4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x40,0xf4] + vst4.32 {d16, d18, d20, d22}, [r0]! +@ CHECK: vst4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x40,0xf4] + vst4.32 {d17, d19, d21, d23}, [r0]! + +@ CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xc0,0xf4] + vst2.8 {d16[1], d17[1]}, [r0, :16] +@ CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xc0,0xf4] + vst2.16 {d16[1], d17[1]}, [r0, :32] +@ CHECK: vst2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xc0,0xf4] + vst2.32 {d16[1], d17[1]}, [r0] +@ CHECK: vst2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xc0,0xf4] + vst2.16 {d17[1], d19[1]}, [r0] +@ CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xc0,0xf4] + vst2.32 {d17[0], d19[0]}, [r0, :64] + +@ CHECK: vst3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xc0,0xf4] + vst3.8 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x4f,0x06,0xc0,0xf4] + vst3.16 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x8f,0x0a,0xc0,0xf4] + vst3.32 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0] @ encoding: [0xaf,0x16,0xc0,0xf4] + vst3.16 {d17[2], d19[2], d21[2]}, [r0] +@ CHECK: vst3.32 {d16[0], d18[0], d20[0]}, [r0] @ encoding: [0x4f,0x0a,0xc0,0xf4] + vst3.32 {d16[0], d18[0], d20[0]}, [r0] + +@ CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xc0,0xf4] + vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] +@ CHECK: vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xc0,0xf4] + vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +@ CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xc0,0xf4] + vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +@ CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] @ encoding: [0xff,0x17,0xc0,0xf4] + vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] +@ CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xc0,0xf4] + vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/test/MC/ARM/neont2-abs-encoding.s b/test/MC/ARM/neont2-abs-encoding.s new file mode 100644 index 000000000000..5c8bc33d0f81 --- /dev/null +++ b/test/MC/ARM/neont2-abs-encoding.s @@ -0,0 +1,33 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vabs.s8 d16, d16 @ encoding: [0xf1,0xff,0x20,0x03] + vabs.s8 d16, d16 +@ CHECK: vabs.s16 d16, d16 @ encoding: [0xf5,0xff,0x20,0x03] + vabs.s16 d16, d16 +@ CHECK: vabs.s32 d16, d16 @ encoding: [0xf9,0xff,0x20,0x03] + vabs.s32 d16, d16 +@ CHECK: vabs.f32 d16, d16 @ encoding: [0xf9,0xff,0x20,0x07] + vabs.f32 d16, d16 +@ CHECK: vabs.s8 q8, q8 @ encoding: [0xf1,0xff,0x60,0x03] + vabs.s8 q8, q8 +@ CHECK: vabs.s16 q8, q8 @ encoding: [0xf5,0xff,0x60,0x03] + vabs.s16 q8, q8 +@ CHECK: vabs.s32 q8, q8 @ encoding: [0xf9,0xff,0x60,0x03] + vabs.s32 q8, q8 +@ CHECK: vabs.f32 q8, q8 @ encoding: [0xf9,0xff,0x60,0x07] + vabs.f32 q8, q8 + +@ CHECK: vqabs.s8 d16, d16 @ encoding: [0xf0,0xff,0x20,0x07] + vqabs.s8 d16, d16 +@ CHECK: vqabs.s16 d16, d16 @ encoding: [0xf4,0xff,0x20,0x07] + vqabs.s16 d16, d16 +@ CHECK: vqabs.s32 d16, d16 @ encoding: [0xf8,0xff,0x20,0x07] + vqabs.s32 d16, d16 +@ CHECK: vqabs.s8 q8, q8 @ encoding: [0xf0,0xff,0x60,0x07] + vqabs.s8 q8, q8 +@ CHECK: vqabs.s16 q8, q8 @ encoding: [0xf4,0xff,0x60,0x07] + vqabs.s16 q8, q8 +@ CHECK: vqabs.s32 q8, q8 @ encoding: [0xf8,0xff,0x60,0x07] + vqabs.s32 q8, q8 diff --git a/test/MC/ARM/neont2-absdiff-encoding.s b/test/MC/ARM/neont2-absdiff-encoding.s new file mode 100644 index 000000000000..2096357ce8ff --- /dev/null +++ b/test/MC/ARM/neont2-absdiff-encoding.s @@ -0,0 +1,86 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * +@ NOTE: This currently fails because the ASM parser doesn't parse vabal. + +.code 16 + +@ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xef] + vabd.s8 d16, d16, d17 +@ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xef] + vabd.s16 d16, d16, d17 +@ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xef] + vabd.s32 d16, d16, d17 +@ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xff] + vabd.u8 d16, d16, d17 +@ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xff] + vabd.u16 d16, d16, d17 + @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xff] + vabd.u32 d16, d16, d17 +@ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xff] + vabd.f32 d16, d16, d17 +@ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xef] + vabd.s8 q8, q8, q9 +@ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xef] + vabd.s16 q8, q8, q9 +@ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xef] + vabd.s32 q8, q8, q9 +@ CHECK: vabd.u8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xff] + vabd.u8 q8, q8, q9 +@ CHECK: vabd.u16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xff] + vabd.u16 q8, q8, q9 +@ CHECK: vabd.u32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xff] + vabd.u32 q8, q8, q9 +@ CHECK: vabd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xff] + vabd.f32 q8, q8, q9 + +@ CHECK: vabdl.s8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xef] + vabdl.s8 q8, d16, d17 +@ CHECK: vabdl.s16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xef] + vabdl.s16 q8, d16, d17 +@ CHECK: vabdl.s32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xef] + vabdl.s32 q8, d16, d17 +@ CHECK: vabdl.u8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xff] + vabdl.u8 q8, d16, d17 +@ CHECK: vabdl.u16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xff] + vabdl.u16 q8, d16, d17 +@ CHECK: vabdl.u32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xff] + vabdl.u32 q8, d16, d17 + +@ CHECK: vaba.s8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xef] + vaba.s8 d16, d18, d17 +@ CHECK: vaba.s16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xef] + vaba.s16 d16, d18, d17 +@ CHECK: vaba.s32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xef] + vaba.s32 d16, d18, d17 +@ CHECK: vaba.u8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xff] + vaba.u8 d16, d18, d17 +@ CHECK: vaba.u16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xff] + vaba.u16 d16, d18, d17 +@ CHECK: vaba.u32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xff] + vaba.u32 d16, d18, d17 +@ CHECK: vaba.s8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xef] + vaba.s8 q9, q8, q10 +@ CHECK: vaba.s16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xef] + vaba.s16 q9, q8, q10 +@ CHECK: vaba.s32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xef] + vaba.s32 q9, q8, q10 +@ CHECK: vaba.u8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xff] + vaba.u8 q9, q8, q10 +@ CHECK: vaba.u16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xff] + vaba.u16 q9, q8, q10 +@ CHECK: vaba.u32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xff] + vaba.u32 q9, q8, q10 + +@ CHECK: vabal.s8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xef] + vabal.s8 q8, d19, d18 +@ CHECK: vabal.s16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xef] + vabal.s16 q8, d19, d18 +@ CHECK: vabal.s32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xef] + vabal.s32 q8, d19, d18 +@ CHECK: vabal.u8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xff] + vabal.u8 q8, d19, d18 +@ CHECK: vabal.u16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xff] + vabal.u16 q8, d19, d18 +@ CHECK: vabal.u32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xff] + vabal.u32 q8, d19, d18 + diff --git a/test/MC/ARM/neont2-add-encoding.s b/test/MC/ARM/neont2-add-encoding.s new file mode 100644 index 000000000000..c384d76dbea2 --- /dev/null +++ b/test/MC/ARM/neont2-add-encoding.s @@ -0,0 +1,138 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0x41,0xef,0xa0,0x08] + vadd.i8 d16, d17, d16 +@ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0x51,0xef,0xa0,0x08] + vadd.i16 d16, d17, d16 +@ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0x71,0xef,0xa0,0x08] + vadd.i64 d16, d17, d16 +@ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0x61,0xef,0xa0,0x08] + vadd.i32 d16, d17, d16 +@ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x0d] + vadd.f32 d16, d16, d17 +@ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x0d] + vadd.f32 q8, q8, q9 + +@ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xc1,0xef,0xa0,0x00] + vaddl.s8 q8, d17, d16 +@ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xd1,0xef,0xa0,0x00] + vaddl.s16 q8, d17, d16 +@ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xe1,0xef,0xa0,0x00] + vaddl.s32 q8, d17, d16 +@ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xc1,0xff,0xa0,0x00] + vaddl.u8 q8, d17, d16 +@ CHECK: vaddl.u16 q8, d17, d16 @ encoding: [0xd1,0xff,0xa0,0x00] + vaddl.u16 q8, d17, d16 +@ CHECK: vaddl.u32 q8, d17, d16 @ encoding: [0xe1,0xff,0xa0,0x00] + vaddl.u32 q8, d17, d16 + +@ CHECK: vaddw.s8 q8, q8, d18 @ encoding: [0xc0,0xef,0xa2,0x01] + vaddw.s8 q8, q8, d18 +@ CHECK: vaddw.s16 q8, q8, d18 @ encoding: [0xd0,0xef,0xa2,0x01] + vaddw.s16 q8, q8, d18 +@ CHECK: vaddw.s32 q8, q8, d18 @ encoding: [0xe0,0xef,0xa2,0x01] + vaddw.s32 q8, q8, d18 +@ CHECK: vaddw.u8 q8, q8, d18 @ encoding: [0xc0,0xff,0xa2,0x01] + vaddw.u8 q8, q8, d18 +@ CHECK: vaddw.u16 q8, q8, d18 @ encoding: [0xd0,0xff,0xa2,0x01] + vaddw.u16 q8, q8, d18 +@ CHECK: vaddw.u32 q8, q8, d18 @ encoding: [0xe0,0xff,0xa2,0x01] + vaddw.u32 q8, q8, d18 + +@ CHECK: vhadd.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x00] + vhadd.s8 d16, d16, d17 +@ CHECK: vhadd.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x00] + vhadd.s16 d16, d16, d17 +@ CHECK: vhadd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x00] + vhadd.s32 d16, d16, d17 +@ CHECK: vhadd.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x00] + vhadd.u8 d16, d16, d17 +@ CHECK: vhadd.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x00] + vhadd.u16 d16, d16, d17 +@ CHECK: vhadd.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x00] + vhadd.u32 d16, d16, d17 +@ CHECK: vhadd.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x00] + vhadd.s8 q8, q8, q9 +@ CHECK: vhadd.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x00] + vhadd.s16 q8, q8, q9 +@ CHECK: vhadd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x00] + vhadd.s32 q8, q8, q9 + @ CHECK: vhadd.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xe2,0x00] + vhadd.u8 q8, q8, q9 +@ CHECK: vhadd.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x00] + vhadd.u16 q8, q8, q9 +@ CHECK: vhadd.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x00] + vhadd.u32 q8, q8, q9 + +@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x01] + vrhadd.s8 d16, d16, d17 +@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x01] + vrhadd.s16 d16, d16, d17 +@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x01] + vrhadd.s32 d16, d16, d17 +@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x01] + vrhadd.u8 d16, d16, d17 +@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x01] + vrhadd.u16 d16, d16, d17 +@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x01] + vrhadd.u32 d16, d16, d17 +@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x01] + vrhadd.s8 q8, q8, q9 +@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x01] + vrhadd.s16 q8, q8, q9 +@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x01] + vrhadd.s32 q8, q8, q9 +@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xe2,0x01] + vrhadd.u8 q8, q8, q9 +@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x01] + vrhadd.u16 q8, q8, q9 +@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x01] + vrhadd.u32 q8, q8, q9 + +@ CHECK: vqadd.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x00] + vqadd.s8 d16, d16, d17 +@ CHECK: vqadd.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x00] + vqadd.s16 d16, d16, d17 +@ CHECK: vqadd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x00] + vqadd.s32 d16, d16, d17 +@ CHECK: vqadd.s64 d16, d16, d17 @ encoding: [0x70,0xef,0xb1,0x00] + vqadd.s64 d16, d16, d17 +@ CHECK: vqadd.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x00] + vqadd.u8 d16, d16, d17 +@ CHECK: vqadd.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xb1,0x00] + vqadd.u16 d16, d16, d17 +@ CHECK: vqadd.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xb1,0x00] + vqadd.u32 d16, d16, d17 +@ CHECK: vqadd.u64 d16, d16, d17 @ encoding: [0x70,0xff,0xb1,0x00] + vqadd.u64 d16, d16, d17 +@ CHECK: vqadd.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x00] + vqadd.s8 q8, q8, q9 +@ CHECK: vqadd.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x00] + vqadd.s16 q8, q8, q9 +@ CHECK: vqadd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x00] + vqadd.s32 q8, q8, q9 +@ CHECK: vqadd.s64 q8, q8, q9 @ encoding: [0x70,0xef,0xf2,0x00] + vqadd.s64 q8, q8, q9 +@ CHECK: vqadd.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x00] + vqadd.u8 q8, q8, q9 +@ CHECK: vqadd.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xf2,0x00] + vqadd.u16 q8, q8, q9 +@ CHECK: vqadd.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xf2,0x00] + vqadd.u32 q8, q8, q9 +@ CHECK: vqadd.u64 q8, q8, q9 @ encoding: [0x70,0xff,0xf2,0x00] + vqadd.u64 q8, q8, q9 + +@ CHECK: vaddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xef,0xa2,0x04] + vaddhn.i16 d16, q8, q9 +@ CHECK: vaddhn.i32 d16, q8, q9 @ encoding: [0xd0,0xef,0xa2,0x04] + vaddhn.i32 d16, q8, q9 +@ CHECK: vaddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xef,0xa2,0x04] + vaddhn.i64 d16, q8, q9 +@ CHECK: vraddhn.i16 d16, q8, q9 @ encoding: [0xc0,0xff,0xa2,0x04] + vraddhn.i16 d16, q8, q9 +@ CHECK: vraddhn.i32 d16, q8, q9 @ encoding: [0xd0,0xff,0xa2,0x04] + vraddhn.i32 d16, q8, q9 +@ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xe0,0xff,0xa2,0x04] + vraddhn.i64 d16, q8, q9 diff --git a/test/MC/ARM/neont2-bitcount-encoding.s b/test/MC/ARM/neont2-bitcount-encoding.s new file mode 100644 index 000000000000..4280cbd4a44f --- /dev/null +++ b/test/MC/ARM/neont2-bitcount-encoding.s @@ -0,0 +1,34 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xff] + vcnt.8 d16, d16 +@ CHECK: vcnt.8 q8, q8 @ encoding: [0x60,0x05,0xf0,0xff] + vcnt.8 q8, q8 +@ CHECK: vclz.i8 d16, d16 @ encoding: [0xa0,0x04,0xf0,0xff] + vclz.i8 d16, d16 +@ CHECK: vclz.i16 d16, d16 @ encoding: [0xa0,0x04,0xf4,0xff] + vclz.i16 d16, d16 +@ CHECK: vclz.i32 d16, d16 @ encoding: [0xa0,0x04,0xf8,0xff] + vclz.i32 d16, d16 +@ CHECK: vclz.i8 q8, q8 @ encoding: [0xe0,0x04,0xf0,0xff] + vclz.i8 q8, q8 +@ CHECK: vclz.i16 q8, q8 @ encoding: [0xe0,0x04,0xf4,0xff] + vclz.i16 q8, q8 +@ CHECK: vclz.i32 q8, q8 @ encoding: [0xe0,0x04,0xf8,0xff] + vclz.i32 q8, q8 +@ CHECK: vcls.s8 d16, d16 @ encoding: [0x20,0x04,0xf0,0xff] + vcls.s8 d16, d16 +@ CHECK: vcls.s16 d16, d16 @ encoding: [0x20,0x04,0xf4,0xff] + vcls.s16 d16, d16 +@ CHECK: vcls.s32 d16, d16 @ encoding: [0x20,0x04,0xf8,0xff] + vcls.s32 d16, d16 +@ CHECK: vcls.s8 q8, q8 @ encoding: [0x60,0x04,0xf0,0xff] + vcls.s8 q8, q8 +@ CHECK: vcls.s16 q8, q8 @ encoding: [0x60,0x04,0xf4,0xff] + vcls.s16 q8, q8 +@ CHECK: vcls.s32 q8, q8 @ encoding: [0x60,0x04,0xf8,0xff] + vcls.s32 q8, q8 + diff --git a/test/MC/ARM/neont2-bitwise-encoding.s b/test/MC/ARM/neont2-bitwise-encoding.s new file mode 100644 index 000000000000..3acd7a8c9911 --- /dev/null +++ b/test/MC/ARM/neont2-bitwise-encoding.s @@ -0,0 +1,49 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vand d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xef] + vand d16, d17, d16 +@ CHECK: vand q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xef] + vand q8, q8, q9 + +@ CHECK: veor d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xff] + veor d16, d17, d16 +@ CHECK: veor q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xff] + veor q8, q8, q9 + +@ CHECK: vorr d16, d17, d16 @ encoding: [0xb0,0x01,0x61,0xef] + vorr d16, d17, d16 +@ CHECK: vorr q8, q8, q9 @ encoding: [0xf2,0x01,0x60,0xef] + vorr q8, q8, q9 +@ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xef] + vorr.i32 d16, #0x1000000 +@ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xef] + vorr.i32 q8, #0x1000000 +@ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xef] + vorr.i32 q8, #0x0 + +@ CHECK: vbic d16, d17, d16 @ encoding: [0xb0,0x01,0x51,0xef] + vbic d16, d17, d16 +@ CHECK: vbic q8, q8, q9 @ encoding: [0xf2,0x01,0x50,0xef] + vbic q8, q8, q9 +@ CHECK: vbic.i32 d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xff] + vbic.i32 d16, #0xFF000000 +@ CHECK: vbic.i32 q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xff] + vbic.i32 q8, #0xFF000000 + +@ CHECK: vorn d16, d17, d16 @ encoding: [0xb0,0x01,0x71,0xef] + vorn d16, d17, d16 +@ CHECK: vorn q8, q8, q9 @ encoding: [0xf2,0x01,0x70,0xef] + vorn q8, q8, q9 + +@ CHECK: vmvn d16, d16 @ encoding: [0xa0,0x05,0xf0,0xff] + vmvn d16, d16 +@ CHECK: vmvn q8, q8 @ encoding: [0xe0,0x05,0xf0,0xff] + vmvn q8, q8 + +@ CHECK: vbsl d18, d17, d16 @ encoding: [0xb0,0x21,0x51,0xff] + vbsl d18, d17, d16 +@ CHECK: vbsl q8, q10, q9 @ encoding: [0xf2,0x01,0x54,0xff] + vbsl q8, q10, q9 diff --git a/test/MC/ARM/neont2-cmp-encoding.s b/test/MC/ARM/neont2-cmp-encoding.s new file mode 100644 index 000000000000..1dbd42a3946c --- /dev/null +++ b/test/MC/ARM/neont2-cmp-encoding.s @@ -0,0 +1,36 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07] + vcvt.s32.f32 d16, d16 +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07] + vcvt.u32.f32 d16, d16 +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06] + vcvt.f32.s32 d16, d16 +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06] + vcvt.f32.u32 d16, d16 +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07] + vcvt.s32.f32 q8, q8 +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x07] + vcvt.u32.f32 q8, q8 +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06] + vcvt.f32.s32 q8, q8 +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x06] + vcvt.f32.u32 q8, q8 +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f] + vcvt.s32.f32 d16, d16, #1 +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0f] + vcvt.u32.f32 d16, d16, #1 +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0e] + vcvt.f32.s32 d16, d16, #1 +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0e] + vcvt.f32.u32 d16, d16, #1 +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0f] + vcvt.s32.f32 q8, q8, #1 +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0f] + vcvt.u32.f32 q8, q8, #1 +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0e] + vcvt.f32.s32 q8, q8, #1 +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0e] + vcvt.f32.u32 q8, q8, #1 diff --git a/test/MC/ARM/neont2-convert-encoding.s b/test/MC/ARM/neont2-convert-encoding.s new file mode 100644 index 000000000000..1df3b43f305f --- /dev/null +++ b/test/MC/ARM/neont2-convert-encoding.s @@ -0,0 +1,40 @@ +@ RUN: llvm-mc -mcpu=cortex-a9 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07] + vcvt.s32.f32 d16, d16 +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07] + vcvt.u32.f32 d16, d16 +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06] + vcvt.f32.s32 d16, d16 +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06] + vcvt.f32.u32 d16, d16 +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07] + vcvt.s32.f32 q8, q8 +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x07] + vcvt.u32.f32 q8, q8 +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06] + vcvt.f32.s32 q8, q8 +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x06] + vcvt.f32.u32 q8, q8 +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f] + vcvt.s32.f32 d16, d16, #1 +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0f] + vcvt.u32.f32 d16, d16, #1 +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0e] + vcvt.f32.s32 d16, d16, #1 +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0e] + vcvt.f32.u32 d16, d16, #1 +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0f] + vcvt.s32.f32 q8, q8, #1 +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0f] + vcvt.u32.f32 q8, q8, #1 +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0e] + vcvt.f32.s32 q8, q8, #1 +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0e] + vcvt.f32.u32 q8, q8, #1 +@ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0xf6,0xff,0x20,0x07] + vcvt.f32.f16 q8, d16 +@ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0xf6,0xff,0x20,0x06] + vcvt.f16.f32 d16, q8 diff --git a/test/MC/ARM/neont2-dup-encoding.s b/test/MC/ARM/neont2-dup-encoding.s new file mode 100644 index 000000000000..da6e78f56012 --- /dev/null +++ b/test/MC/ARM/neont2-dup-encoding.s @@ -0,0 +1,29 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee] + vdup.8 d16, r0 +@ CHECK: vdup.16 d16, r0 @ encoding: [0xb0,0x0b,0x80,0xee] + vdup.16 d16, r0 +@ CHECK: vdup.32 d16, r0 @ encoding: [0x90,0x0b,0x80,0xee] + vdup.32 d16, r0 +@ CHECK: vdup.8 q8, r0 @ encoding: [0x90,0x0b,0xe0,0xee] + vdup.8 q8, r0 +@ CHECK: vdup.16 q8, r0 @ encoding: [0xb0,0x0b,0xa0,0xee] + vdup.16 q8, r0 +@ CHECK: vdup.32 q8, r0 @ encoding: [0x90,0x0b,0xa0,0xee] + vdup.32 q8, r0 +@ CHECK: vdup.8 d16, d16[1] @ encoding: [0x20,0x0c,0xf3,0xff] + vdup.8 d16, d16[1] +@ CHECK: vdup.16 d16, d16[1] @ encoding: [0x20,0x0c,0xf6,0xff] + vdup.16 d16, d16[1] +@ CHECK: vdup.32 d16, d16[1] @ encoding: [0x20,0x0c,0xfc,0xff] + vdup.32 d16, d16[1] +@ CHECK: vdup.8 q8, d16[1] @ encoding: [0x60,0x0c,0xf3,0xff] + vdup.8 q8, d16[1] +@ CHECK: vdup.16 q8, d16[1] @ encoding: [0x60,0x0c,0xf6,0xff] + vdup.16 q8, d16[1] +@ CHECK: vdup.32 q8, d16[1] @ encoding: [0x60,0x0c,0xfc,0xff] + vdup.32 q8, d16[1] diff --git a/test/MC/ARM/neont2-minmax-encoding.s b/test/MC/ARM/neont2-minmax-encoding.s new file mode 100644 index 000000000000..7e86d45bb14a --- /dev/null +++ b/test/MC/ARM/neont2-minmax-encoding.s @@ -0,0 +1,60 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vmin.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x06] + vmin.s8 d16, d16, d17 +@ CHECK: vmin.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x06] + vmin.s16 d16, d16, d17 +@ CHECK: vmin.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x06] + vmin.s32 d16, d16, d17 +@ CHECK: vmin.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x06] + vmin.u8 d16, d16, d17 +@ CHECK: vmin.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xb1,0x06] + vmin.u16 d16, d16, d17 +@ CHECK: vmin.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xb1,0x06] + vmin.u32 d16, d16, d17 +@ CHECK: vmin.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0f] + vmin.f32 d16, d16, d17 +@ CHECK: vmin.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x06] + vmin.s8 q8, q8, q9 +@ CHECK: vmin.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x06] + vmin.s16 q8, q8, q9 +@ CHECK: vmin.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x06] + vmin.s32 q8, q8, q9 +@ CHECK: vmin.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x06] + vmin.u8 q8, q8, q9 +@ CHECK: vmin.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xf2,0x06] + vmin.u16 q8, q8, q9 +@ CHECK: vmin.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xf2,0x06] + vmin.u32 q8, q8, q9 +@ CHECK: vmin.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0f] + vmin.f32 q8, q8, q9 +@ CHECK: vmax.s8 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x06] + vmax.s8 d16, d16, d17 +@ CHECK: vmax.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x06] + vmax.s16 d16, d16, d17 +@ CHECK: vmax.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x06] + vmax.s32 d16, d16, d17 +@ CHECK: vmax.u8 d16, d16, d17 @ encoding: [0x40,0xff,0xa1,0x06] + vmax.u8 d16, d16, d17 +@ CHECK: vmax.u16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x06] + vmax.u16 d16, d16, d17 +@ CHECK: vmax.u32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x06] + vmax.u32 d16, d16, d17 +@ CHECK: vmax.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xa1,0x0f] + vmax.f32 d16, d16, d17 +@ CHECK: vmax.s8 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x06] + vmax.s8 q8, q8, q9 +@ CHECK: vmax.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x06] + vmax.s16 q8, q8, q9 +@ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x06] + vmax.s32 q8, q8, q9 +@ CHECK: vmax.u8 q8, q8, q9 @ encoding: [0x40,0xff,0xe2,0x06] + vmax.u8 q8, q8, q9 +@ CHECK: vmax.u16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x06] + vmax.u16 q8, q8, q9 +@ CHECK: vmax.u32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x06] + vmax.u32 q8, q8, q9 +@ CHECK: vmax.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xe2,0x0f] + vmax.f32 q8, q8, q9 diff --git a/test/MC/ARM/neont2-mov-encoding.s b/test/MC/ARM/neont2-mov-encoding.s new file mode 100644 index 000000000000..ababbb795729 --- /dev/null +++ b/test/MC/ARM/neont2-mov-encoding.s @@ -0,0 +1,119 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xef] + vmov.i8 d16, #0x8 +@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xef] + vmov.i16 d16, #0x10 +@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xef] + vmov.i16 d16, #0x1000 +@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xef] + vmov.i32 d16, #0x20 +@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xef] + vmov.i32 d16, #0x2000 +@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xef] + vmov.i32 d16, #0x200000 +@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xef] + vmov.i32 d16, #0x20000000 +@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xef] + vmov.i32 d16, #0x20FF +@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xef] + vmov.i32 d16, #0x20FFFF +@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xff] + vmov.i64 d16, #0xFF0000FF0000FFFF +@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0x58,0x0e,0xc0,0xef] + vmov.i8 q8, #0x8 +@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xef] + vmov.i16 q8, #0x10 +@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xef] + vmov.i16 q8, #0x1000 +@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xef] + vmov.i32 q8, #0x20 +@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xef] + vmov.i32 q8, #0x2000 +@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xef] + vmov.i32 q8, #0x200000 +@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xef] + vmov.i32 q8, #0x20000000 +@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xef] + vmov.i32 q8, #0x20FF +@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xef] + vmov.i32 q8, #0x20FFFF +@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xff] + vmov.i64 q8, #0xFF0000FF0000FFFF +@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xef] + vmvn.i16 d16, #0x10 +@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xef] + vmvn.i16 d16, #0x1000 +@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xef] + vmvn.i32 d16, #0x20 +@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xef] + vmvn.i32 d16, #0x2000 +@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xef] + vmvn.i32 d16, #0x200000 +@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xef] + vmvn.i32 d16, #0x20000000 +@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xef] + vmvn.i32 d16, #0x20FF +@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xef] + vmvn.i32 d16, #0x20FFFF +@ CHECK: vmovl.s8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xef] + vmovl.s8 q8, d16 +@ CHECK: vmovl.s16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xef] + vmovl.s16 q8, d16 +@ CHECK: vmovl.s32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xef] + vmovl.s32 q8, d16 +@ CHECK: vmovl.u8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xff] + vmovl.u8 q8, d16 +@ CHECK: vmovl.u16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xff] + vmovl.u16 q8, d16 +@ CHECK: vmovl.u32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xff] + vmovl.u32 q8, d16 +@ CHECK: vmovn.i16 d16, q8 @ encoding: [0x20,0x02,0xf2,0xff] + vmovn.i16 d16, q8 +@ CHECK: vmovn.i32 d16, q8 @ encoding: [0x20,0x02,0xf6,0xff] + vmovn.i32 d16, q8 +@ CHECK: vmovn.i64 d16, q8 @ encoding: [0x20,0x02,0xfa,0xff] + vmovn.i64 d16, q8 +@ CHECK: vqmovn.s16 d16, q8 @ encoding: [0xa0,0x02,0xf2,0xff] + vqmovn.s16 d16, q8 +@ CHECK: vqmovn.s32 d16, q8 @ encoding: [0xa0,0x02,0xf6,0xff] + vqmovn.s32 d16, q8 +@ CHECK: vqmovn.s64 d16, q8 @ encoding: [0xa0,0x02,0xfa,0xff] + vqmovn.s64 d16, q8 +@ CHECK: vqmovn.u16 d16, q8 @ encoding: [0xe0,0x02,0xf2,0xff] + vqmovn.u16 d16, q8 +@ CHECK: vqmovn.u32 d16, q8 @ encoding: [0xe0,0x02,0xf6,0xff] + vqmovn.u32 d16, q8 +@ CHECK: vqmovn.u64 d16, q8 @ encoding: [0xe0,0x02,0xfa,0xff] + vqmovn.u64 d16, q8 +@ CHECK: vqmovun.s16 d16, q8 @ encoding: [0x60,0x02,0xf2,0xff] + vqmovun.s16 d16, q8 +@ CHECK: vqmovun.s32 d16, q8 @ encoding: [0x60,0x02,0xf6,0xff] + vqmovun.s32 d16, q8 +@ CHECK: vqmovun.s64 d16, q8 @ encoding: [0x60,0x02,0xfa,0xff] + vqmovun.s64 d16, q8 +@ CHECK: vmov.s8 r0, d16[1] @ encoding: [0xb0,0x0b,0x50,0xee] + vmov.s8 r0, d16[1] +@ CHECK: vmov.s16 r0, d16[1] @ encoding: [0xf0,0x0b,0x10,0xee] + vmov.s16 r0, d16[1] +@ CHECK: vmov.u8 r0, d16[1] @ encoding: [0xb0,0x0b,0xd0,0xee] + vmov.u8 r0, d16[1] +@ CHECK: vmov.u16 r0, d16[1] @ encoding: [0xf0,0x0b,0x90,0xee] + vmov.u16 r0, d16[1] +@ CHECK: vmov.32 r0, d16[1] @ encoding: [0x90,0x0b,0x30,0xee] + vmov.32 r0, d16[1] +@ CHECK: vmov.8 d16[1], r1 @ encoding: [0xb0,0x1b,0x40,0xee] + vmov.8 d16[1], r1 +@ CHECK: vmov.16 d16[1], r1 @ encoding: [0xf0,0x1b,0x00,0xee] + vmov.16 d16[1], r1 +@ CHECK: vmov.32 d16[1], r1 @ encoding: [0x90,0x1b,0x20,0xee] + vmov.32 d16[1], r1 +@ CHECK: vmov.8 d18[1], r1 @ encoding: [0xb0,0x1b,0x42,0xee] + vmov.8 d18[1], r1 +@ CHECK: vmov.16 d18[1], r1 @ encoding: [0xf0,0x1b,0x02,0xee] + vmov.16 d18[1], r1 +@ CHECK: vmov.32 d18[1], r1 @ encoding: [0x90,0x1b,0x22,0xee] + vmov.32 d18[1], r1 diff --git a/test/MC/ARM/neont2-mul-accum-encoding.s b/test/MC/ARM/neont2-mul-accum-encoding.s new file mode 100644 index 000000000000..e21c67d2e8d6 --- /dev/null +++ b/test/MC/ARM/neont2-mul-accum-encoding.s @@ -0,0 +1,69 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vmla.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xef] + vmla.i8 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xef] + vmla.i16 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xef] + vmla.i32 d16, d18, d17 +@ CHECK: vmla.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x42,0xef] + vmla.f32 d16, d18, d17 +@ CHECK: vmla.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xef] + vmla.i8 q9, q8, q10 +@ CHECK: vmla.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xef] + vmla.i16 q9, q8, q10 +@ CHECK: vmla.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xef] + vmla.i32 q9, q8, q10 +@ CHECK: vmla.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x40,0xef] + vmla.f32 q9, q8, q10 +@ CHECK: vmlal.s8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xef] + vmlal.s8 q8, d19, d18 +@ CHECK: vmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xef] + vmlal.s16 q8, d19, d18 +@ CHECK: vmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xef] + vmlal.s32 q8, d19, d18 +@ CHECK: vmlal.u8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xff] + vmlal.u8 q8, d19, d18 +@ CHECK: vmlal.u16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xff] + vmlal.u16 q8, d19, d18 +@ CHECK: vmlal.u32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xff] + vmlal.u32 q8, d19, d18 +@ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xef] + vqdmlal.s16 q8, d19, d18 +@ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xef] + vqdmlal.s32 q8, d19, d18 +@ CHECK: vmls.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xff] + vmls.i8 d16, d18, d17 +@ CHECK: vmls.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xff] + vmls.i16 d16, d18, d17 +@ CHECK: vmls.i32 d16, d18, d17 @ encoding: [0xa1,0x09,0x62,0xff] + vmls.i32 d16, d18, d17 +@ CHECK: vmls.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x62,0xef] + vmls.f32 d16, d18, d17 +@ CHECK: vmls.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xff] + vmls.i8 q9, q8, q10 +@ CHECK: vmls.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xff] + vmls.i16 q9, q8, q10 +@ CHECK: vmls.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xff] + vmls.i32 q9, q8, q10 +@ CHECK: vmls.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x60,0xef] + vmls.f32 q9, q8, q10 +@ CHECK: vmlsl.s8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xef] + vmlsl.s8 q8, d19, d18 +@ CHECK: vmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xef] + vmlsl.s16 q8, d19, d18 +@ CHECK: vmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xef] + vmlsl.s32 q8, d19, d18 +@ CHECK: vmlsl.u8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xff] + vmlsl.u8 q8, d19, d18 +@ CHECK: vmlsl.u16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xff] + vmlsl.u16 q8, d19, d18 +@ CHECK: vmlsl.u32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xff] + vmlsl.u32 q8, d19, d18 +@ CHECK: vqdmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0b,0xd3,0xef] + vqdmlsl.s16 q8, d19, d18 +@ CHECK: vqdmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0b,0xe3,0xef] + vqdmlsl.s32 q8, d19, d18 diff --git a/test/MC/ARM/neont2-mul-encoding.s b/test/MC/ARM/neont2-mul-encoding.s new file mode 100644 index 000000000000..93ecabb50bb3 --- /dev/null +++ b/test/MC/ARM/neont2-mul-encoding.s @@ -0,0 +1,58 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x09] + vmul.i8 d16, d16, d17 +@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x09] + vmul.i16 d16, d16, d17 +@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09] + vmul.i32 d16, d16, d17 +@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x0d] + vmul.f32 d16, d16, d17 +@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x09] + vmul.i8 q8, q8, q9 +@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x09] + vmul.i16 q8, q8, q9 +@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x09] + vmul.i32 q8, q8, q9 +@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x0d] + vmul.f32 q8, q8, q9 +@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x09] + vmul.p8 d16, d16, d17 +@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x09] + vmul.p8 q8, q8, q9 +@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x0b] + vqdmulh.s16 d16, d16, d17 +@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0b] + vqdmulh.s32 d16, d16, d17 +@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x0b] + vqdmulh.s16 q8, q8, q9 +@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0b] + vqdmulh.s32 q8, q8, q9 +@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x0b] + vqrdmulh.s16 d16, d16, d17 +@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0b] + vqrdmulh.s32 d16, d16, d17 +@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x0b] + vqrdmulh.s16 q8, q8, q9 +@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x0b] + vqrdmulh.s32 q8, q8, q9 +@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0c] + vmull.s8 q8, d16, d17 +@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0c] + vmull.s16 q8, d16, d17 +@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0c] + vmull.s32 q8, d16, d17 +@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xc0,0xff,0xa1,0x0c] + vmull.u8 q8, d16, d17 +@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xd0,0xff,0xa1,0x0c] + vmull.u16 q8, d16, d17 +@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xe0,0xff,0xa1,0x0c] + vmull.u32 q8, d16, d17 +@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0e] + vmull.p8 q8, d16, d17 +@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0d] + vqdmull.s16 q8, d16, d17 +@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0d] + vqdmull.s32 q8, d16, d17 diff --git a/test/MC/ARM/neont2-neg-encoding.s b/test/MC/ARM/neont2-neg-encoding.s new file mode 100644 index 000000000000..21dab65cc968 --- /dev/null +++ b/test/MC/ARM/neont2-neg-encoding.s @@ -0,0 +1,32 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vneg.s8 d16, d16 @ encoding: [0xf1,0xff,0xa0,0x03] + vneg.s8 d16, d16 +@ CHECK: vneg.s16 d16, d16 @ encoding: [0xf5,0xff,0xa0,0x03] + vneg.s16 d16, d16 +@ CHECK: vneg.s32 d16, d16 @ encoding: [0xf9,0xff,0xa0,0x03] + vneg.s32 d16, d16 +@ CHECK: vneg.f32 d16, d16 @ encoding: [0xf9,0xff,0xa0,0x07] + vneg.f32 d16, d16 +@ CHECK: vneg.s8 q8, q8 @ encoding: [0xf1,0xff,0xe0,0x03] + vneg.s8 q8, q8 +@ CHECK: vneg.s16 q8, q8 @ encoding: [0xf5,0xff,0xe0,0x03] + vneg.s16 q8, q8 +@ CHECK: vneg.s32 q8, q8 @ encoding: [0xf9,0xff,0xe0,0x03] + vneg.s32 q8, q8 +@ CHECK: vneg.f32 q8, q8 @ encoding: [0xf9,0xff,0xe0,0x07] + vneg.f32 q8, q8 +@ CHECK: vqneg.s8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x07] + vqneg.s8 d16, d16 +@ CHECK: vqneg.s16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x07] + vqneg.s16 d16, d16 +@ CHECK: vqneg.s32 d16, d16 @ encoding: [0xf8,0xff,0xa0,0x07] + vqneg.s32 d16, d16 +@ CHECK: vqneg.s8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x07] + vqneg.s8 q8, q8 +@ CHECK: vqneg.s16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x07] + vqneg.s16 q8, q8 +@ CHECK: vqneg.s32 q8, q8 @ encoding: [0xf8,0xff,0xe0,0x07] + vqneg.s32 q8, q8 diff --git a/test/MC/ARM/neont2-pairwise-encoding.s b/test/MC/ARM/neont2-pairwise-encoding.s new file mode 100644 index 000000000000..ef9092214cf2 --- /dev/null +++ b/test/MC/ARM/neont2-pairwise-encoding.s @@ -0,0 +1,89 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xef] + vpadd.i8 d16, d17, d16 +@ CHECK: vpadd.i16 d16, d17, d16 @ encoding: [0xb0,0x0b,0x51,0xef] + vpadd.i16 d16, d17, d16 +@ CHECK: vpadd.i32 d16, d17, d16 @ encoding: [0xb0,0x0b,0x61,0xef] + vpadd.i32 d16, d17, d16 +@ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xff] + vpadd.f32 d16, d16, d17 +@ CHECK: vpaddl.s8 d16, d16 @ encoding: [0x20,0x02,0xf0,0xff] + vpaddl.s8 d16, d16 +@ CHECK: vpaddl.s16 d16, d16 @ encoding: [0x20,0x02,0xf4,0xff] + vpaddl.s16 d16, d16 +@ CHECK: vpaddl.s32 d16, d16 @ encoding: [0x20,0x02,0xf8,0xff] + vpaddl.s32 d16, d16 +@ CHECK: vpaddl.u8 d16, d16 @ encoding: [0xa0,0x02,0xf0,0xff] + vpaddl.u8 d16, d16 +@ CHECK: vpaddl.u16 d16, d16 @ encoding: [0xa0,0x02,0xf4,0xff] + vpaddl.u16 d16, d16 +@ CHECK: vpaddl.u32 d16, d16 @ encoding: [0xa0,0x02,0xf8,0xff] + vpaddl.u32 d16, d16 +@ CHECK: vpaddl.s8 q8, q8 @ encoding: [0x60,0x02,0xf0,0xff] + vpaddl.s8 q8, q8 +@ CHECK: vpaddl.s16 q8, q8 @ encoding: [0x60,0x02,0xf4,0xff] + vpaddl.s16 q8, q8 +@ CHECK: vpaddl.s32 q8, q8 @ encoding: [0x60,0x02,0xf8,0xff] + vpaddl.s32 q8, q8 +@ CHECK: vpaddl.u8 q8, q8 @ encoding: [0xe0,0x02,0xf0,0xff] + vpaddl.u8 q8, q8 +@ CHECK: vpaddl.u16 q8, q8 @ encoding: [0xe0,0x02,0xf4,0xff] + vpaddl.u16 q8, q8 +@ CHECK: vpaddl.u32 q8, q8 @ encoding: [0xe0,0x02,0xf8,0xff] + vpaddl.u32 q8, q8 +@ CHECK: vpadal.s8 d16, d17 @ encoding: [0x21,0x06,0xf0,0xff] + vpadal.s8 d16, d17 +@ CHECK: vpadal.s16 d16, d17 @ encoding: [0x21,0x06,0xf4,0xff] + vpadal.s16 d16, d17 +@ CHECK: vpadal.s32 d16, d17 @ encoding: [0x21,0x06,0xf8,0xff] + vpadal.s32 d16, d17 +@ CHECK: vpadal.u8 d16, d17 @ encoding: [0xa1,0x06,0xf0,0xff] + vpadal.u8 d16, d17 +@ CHECK: vpadal.u16 d16, d17 @ encoding: [0xa1,0x06,0xf4,0xff] + vpadal.u16 d16, d17 +@ CHECK: vpadal.u32 d16, d17 @ encoding: [0xa1,0x06,0xf8,0xff] + vpadal.u32 d16, d17 +@ CHECK: vpadal.s8 q9, q8 @ encoding: [0x60,0x26,0xf0,0xff] + vpadal.s8 q9, q8 +@ CHECK: vpadal.s16 q9, q8 @ encoding: [0x60,0x26,0xf4,0xff] + vpadal.s16 q9, q8 +@ CHECK: vpadal.s32 q9, q8 @ encoding: [0x60,0x26,0xf8,0xff] + vpadal.s32 q9, q8 +@ CHECK: vpadal.u8 q9, q8 @ encoding: [0xe0,0x26,0xf0,0xff] + vpadal.u8 q9, q8 +@ CHECK: vpadal.u16 q9, q8 @ encoding: [0xe0,0x26,0xf4,0xff] + vpadal.u16 q9, q8 +@ CHECK: vpadal.u32 q9, q8 @ encoding: [0xe0,0x26,0xf8,0xff] + vpadal.u32 q9, q8 +@ CHECK: vpmin.s8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xef] + vpmin.s8 d16, d16, d17 +@ CHECK: vpmin.s16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xef] + vpmin.s16 d16, d16, d17 +@ CHECK: vpmin.s32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xef] + vpmin.s32 d16, d16, d17 +@ CHECK: vpmin.u8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xff] + vpmin.u8 d16, d16, d17 +@ CHECK: vpmin.u16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xff] + vpmin.u16 d16, d16, d17 +@ CHECK: vpmin.u32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xff] + vpmin.u32 d16, d16, d17 +@ CHECK: vpmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xff] + vpmin.f32 d16, d16, d17 +@ CHECK: vpmax.s8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xef] + vpmax.s8 d16, d16, d17 +@ CHECK: vpmax.s16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xef] + vpmax.s16 d16, d16, d17 +@ CHECK: vpmax.s32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xef] + vpmax.s32 d16, d16, d17 +@ CHECK: vpmax.u8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xff] + vpmax.u8 d16, d16, d17 +@ CHECK: vpmax.u16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xff] + vpmax.u16 d16, d16, d17 +@ CHECK: vpmax.u32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xff] + vpmax.u32 d16, d16, d17 +@ CHECK: vpmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xff] + vpmax.f32 d16, d16, d17 diff --git a/test/MC/ARM/neont2-reciprocal-encoding.s b/test/MC/ARM/neont2-reciprocal-encoding.s new file mode 100644 index 000000000000..8ea77d78c339 --- /dev/null +++ b/test/MC/ARM/neont2-reciprocal-encoding.s @@ -0,0 +1,28 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vrecpe.u32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x04] + vrecpe.u32 d16, d16 +@ CHECK: vrecpe.u32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x04] + vrecpe.u32 q8, q8 +@ CHECK: vrecpe.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x05] + vrecpe.f32 d16, d16 +@ CHECK: vrecpe.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x05] + vrecpe.f32 q8, q8 +@ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x0f] + vrecps.f32 d16, d16, d17 +@ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x0f] + vrecps.f32 q8, q8, q9 +@ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x04] + vrsqrte.u32 d16, d16 +@ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x04] + vrsqrte.u32 q8, q8 +@ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x05] + vrsqrte.f32 d16, d16 +@ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x05] + vrsqrte.f32 q8, q8 +@ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x0f] + vrsqrts.f32 d16, d16, d17 +@ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x0f] + vrsqrts.f32 q8, q8, q9 diff --git a/test/MC/ARM/neont2-reverse-encoding.s b/test/MC/ARM/neont2-reverse-encoding.s new file mode 100644 index 000000000000..f37d72da11af --- /dev/null +++ b/test/MC/ARM/neont2-reverse-encoding.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vrev64.8 d16, d16 @ encoding: [0xf0,0xff,0x20,0x00] + vrev64.8 d16, d16 +@ CHECK: vrev64.16 d16, d16 @ encoding: [0xf4,0xff,0x20,0x00] + vrev64.16 d16, d16 +@ CHECK: vrev64.32 d16, d16 @ encoding: [0xf8,0xff,0x20,0x00] + vrev64.32 d16, d16 +@ CHECK: vrev64.8 q8, q8 @ encoding: [0xf0,0xff,0x60,0x00] + vrev64.8 q8, q8 +@ CHECK: vrev64.16 q8, q8 @ encoding: [0xf4,0xff,0x60,0x00] + vrev64.16 q8, q8 +@ CHECK: vrev64.32 q8, q8 @ encoding: [0xf8,0xff,0x60,0x00] + vrev64.32 q8, q8 +@ CHECK: vrev32.8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x00] + vrev32.8 d16, d16 +@ CHECK: vrev32.16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x00] + vrev32.16 d16, d16 +@ CHECK: vrev32.8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x00] + vrev32.8 q8, q8 +@ CHECK: vrev32.16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x00] + vrev32.16 q8, q8 +@ CHECK: vrev16.8 d16, d16 @ encoding: [0xf0,0xff,0x20,0x01] + vrev16.8 d16, d16 +@ CHECK: vrev16.8 q8, q8 @ encoding: [0xf0,0xff,0x60,0x01] + vrev16.8 q8, q8 diff --git a/test/MC/ARM/neont2-satshift-encoding.s b/test/MC/ARM/neont2-satshift-encoding.s new file mode 100644 index 000000000000..34e50f1e29e4 --- /dev/null +++ b/test/MC/ARM/neont2-satshift-encoding.s @@ -0,0 +1,152 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vqshl.s8 d16, d16, d17 @ encoding: [0x41,0xef,0xb0,0x04] + vqshl.s8 d16, d16, d17 +@ CHECK: vqshl.s16 d16, d16, d17 @ encoding: [0x51,0xef,0xb0,0x04] + vqshl.s16 d16, d16, d17 +@ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0x61,0xef,0xb0,0x04] + vqshl.s32 d16, d16, d17 +@ CHECK: vqshl.s64 d16, d16, d17 @ encoding: [0x71,0xef,0xb0,0x04] + vqshl.s64 d16, d16, d17 +@ CHECK: vqshl.u8 d16, d16, d17 @ encoding: [0x41,0xff,0xb0,0x04] + vqshl.u8 d16, d16, d17 +@ CHECK: vqshl.u16 d16, d16, d17 @ encoding: [0x51,0xff,0xb0,0x04] + vqshl.u16 d16, d16, d17 +@ CHECK: vqshl.u32 d16, d16, d17 @ encoding: [0x61,0xff,0xb0,0x04] + vqshl.u32 d16, d16, d17 +@ CHECK: vqshl.u64 d16, d16, d17 @ encoding: [0x71,0xff,0xb0,0x04] + vqshl.u64 d16, d16, d17 +@ CHECK: vqshl.s8 q8, q8, q9 @ encoding: [0x42,0xef,0xf0,0x04] + vqshl.s8 q8, q8, q9 +@ CHECK: vqshl.s16 q8, q8, q9 @ encoding: [0x52,0xef,0xf0,0x04] + vqshl.s16 q8, q8, q9 +@ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0x62,0xef,0xf0,0x04] + vqshl.s32 q8, q8, q9 +@ CHECK: vqshl.s64 q8, q8, q9 @ encoding: [0x72,0xef,0xf0,0x04] + vqshl.s64 q8, q8, q9 +@ CHECK: vqshl.u8 q8, q8, q9 @ encoding: [0x42,0xff,0xf0,0x04] + vqshl.u8 q8, q8, q9 +@ CHECK: vqshl.u16 q8, q8, q9 @ encoding: [0x52,0xff,0xf0,0x04] + vqshl.u16 q8, q8, q9 +@ CHECK: vqshl.u32 q8, q8, q9 @ encoding: [0x62,0xff,0xf0,0x04] + vqshl.u32 q8, q8, q9 +@ CHECK: vqshl.u64 q8, q8, q9 @ encoding: [0x72,0xff,0xf0,0x04] + vqshl.u64 q8, q8, q9 +@ CHECK: vqshl.s8 d16, d16, #7 @ encoding: [0xcf,0xef,0x30,0x07] + vqshl.s8 d16, d16, #7 +@ CHECK: vqshl.s16 d16, d16, #15 @ encoding: [0xdf,0xef,0x30,0x07] + vqshl.s16 d16, d16, #15 +@ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0xff,0xef,0x30,0x07] + vqshl.s32 d16, d16, #31 +@ CHECK: vqshl.s64 d16, d16, #63 @ encoding: [0xff,0xef,0xb0,0x07] + vqshl.s64 d16, d16, #63 +@ CHECK: vqshl.u8 d16, d16, #7 @ encoding: [0xcf,0xff,0x30,0x07] + vqshl.u8 d16, d16, #7 +@ CHECK: vqshl.u16 d16, d16, #15 @ encoding: [0xdf,0xff,0x30,0x07] + vqshl.u16 d16, d16, #15 +@ CHECK: vqshl.u32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x07] + vqshl.u32 d16, d16, #31 +@ CHECK: vqshl.u64 d16, d16, #63 @ encoding: [0xff,0xff,0xb0,0x07] + vqshl.u64 d16, d16, #63 +@ CHECK: vqshlu.s8 d16, d16, #7 @ encoding: [0xcf,0xff,0x30,0x06] + vqshlu.s8 d16, d16, #7 +@ CHECK: vqshlu.s16 d16, d16, #15 @ encoding: [0xdf,0xff,0x30,0x06] + vqshlu.s16 d16, d16, #15 +@ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x06] + vqshlu.s32 d16, d16, #31 +@ CHECK: vqshlu.s64 d16, d16, #63 @ encoding: [0xff,0xff,0xb0,0x06] + vqshlu.s64 d16, d16, #63 +@ CHECK: vqshl.s8 q8, q8, #7 @ encoding: [0xcf,0xef,0x70,0x07] + vqshl.s8 q8, q8, #7 +@ CHECK: vqshl.s16 q8, q8, #15 @ encoding: [0xdf,0xef,0x70,0x07] + vqshl.s16 q8, q8, #15 +@ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0xff,0xef,0x70,0x07] + vqshl.s32 q8, q8, #31 +@ CHECK: vqshl.s64 q8, q8, #63 @ encoding: [0xff,0xef,0xf0,0x07] + vqshl.s64 q8, q8, #63 +@ CHECK: vqshl.u8 q8, q8, #7 @ encoding: [0xcf,0xff,0x70,0x07] + vqshl.u8 q8, q8, #7 +@ CHECK: vqshl.u16 q8, q8, #15 @ encoding: [0xdf,0xff,0x70,0x07] + vqshl.u16 q8, q8, #15 +@ CHECK: vqshl.u32 q8, q8, #31 @ encoding: [0xff,0xff,0x70,0x07] + vqshl.u32 q8, q8, #31 +@ CHECK: vqshl.u64 q8, q8, #63 @ encoding: [0xff,0xff,0xf0,0x07] + vqshl.u64 q8, q8, #63 +@ CHECK: vqshlu.s8 q8, q8, #7 @ encoding: [0xcf,0xff,0x70,0x06] + vqshlu.s8 q8, q8, #7 +@ CHECK: vqshlu.s16 q8, q8, #15 @ encoding: [0xdf,0xff,0x70,0x06] + vqshlu.s16 q8, q8, #15 +@ CHECK: vqshlu.s32 q8, q8, #31 @ encoding: [0xff,0xff,0x70,0x06] + vqshlu.s32 q8, q8, #31 +@ CHECK: vqshlu.s64 q8, q8, #63 @ encoding: [0xff,0xff,0xf0,0x06] + vqshlu.s64 q8, q8, #63 +@ CHECK: vqrshl.s8 d16, d16, d17 @ encoding: [0x41,0xef,0xb0,0x05] + vqrshl.s8 d16, d16, d17 +@ CHECK: vqrshl.s16 d16, d16, d17 @ encoding: [0x51,0xef,0xb0,0x05] + vqrshl.s16 d16, d16, d17 +@ CHECK: vqrshl.s32 d16, d16, d17 @ encoding: [0x61,0xef,0xb0,0x05] + vqrshl.s32 d16, d16, d17 +@ CHECK: vqrshl.s64 d16, d16, d17 @ encoding: [0x71,0xef,0xb0,0x05] + vqrshl.s64 d16, d16, d17 +@ CHECK: vqrshl.u8 d16, d16, d17 @ encoding: [0x41,0xff,0xb0,0x05] + vqrshl.u8 d16, d16, d17 +@ CHECK: vqrshl.u16 d16, d16, d17 @ encoding: [0x51,0xff,0xb0,0x05] + vqrshl.u16 d16, d16, d17 +@ CHECK: vqrshl.u32 d16, d16, d17 @ encoding: [0x61,0xff,0xb0,0x05] + vqrshl.u32 d16, d16, d17 +@ CHECK: vqrshl.u64 d16, d16, d17 @ encoding: [0x71,0xff,0xb0,0x05] + vqrshl.u64 d16, d16, d17 +@ CHECK: vqrshl.s8 q8, q8, q9 @ encoding: [0x42,0xef,0xf0,0x05] + vqrshl.s8 q8, q8, q9 +@ CHECK: vqrshl.s16 q8, q8, q9 @ encoding: [0x52,0xef,0xf0,0x05] + vqrshl.s16 q8, q8, q9 +@ CHECK: vqrshl.s32 q8, q8, q9 @ encoding: [0x62,0xef,0xf0,0x05] + vqrshl.s32 q8, q8, q9 +@ CHECK: vqrshl.s64 q8, q8, q9 @ encoding: [0x72,0xef,0xf0,0x05] + vqrshl.s64 q8, q8, q9 +@ CHECK: vqrshl.u8 q8, q8, q9 @ encoding: [0x42,0xff,0xf0,0x05] + vqrshl.u8 q8, q8, q9 +@ CHECK: vqrshl.u16 q8, q8, q9 @ encoding: [0x52,0xff,0xf0,0x05] + vqrshl.u16 q8, q8, q9 +@ CHECK: vqrshl.u32 q8, q8, q9 @ encoding: [0x62,0xff,0xf0,0x05] + vqrshl.u32 q8, q8, q9 +@ CHECK: vqrshl.u64 q8, q8, q9 @ encoding: [0x72,0xff,0xf0,0x05] + vqrshl.u64 q8, q8, q9 +@ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0xc8,0xef,0x30,0x09] + vqshrn.s16 d16, q8, #8 +@ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0xd0,0xef,0x30,0x09] + vqshrn.s32 d16, q8, #16 +@ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x09] + vqshrn.s64 d16, q8, #32 +@ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x09] + vqshrn.u16 d16, q8, #8 +@ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x09] + vqshrn.u32 d16, q8, #16 +@ CHECK: vqshrn.u64 d16, q8, #32 @ encoding: [0xe0,0xff,0x30,0x09] + vqshrn.u64 d16, q8, #32 +@ CHECK: vqshrun.s16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x08] + vqshrun.s16 d16, q8, #8 +@ CHECK: vqshrun.s32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x08] + vqshrun.s32 d16, q8, #16 +@ CHECK: vqshrun.s64 d16, q8, #32 @ encoding: [0xe0,0xff,0x30,0x08] + vqshrun.s64 d16, q8, #32 +@ CHECK: vqrshrn.s16 d16, q8, #8 @ encoding: [0xc8,0xef,0x70,0x09] + vqrshrn.s16 d16, q8, #8 +@ CHECK: vqrshrn.s32 d16, q8, #16 @ encoding: [0xd0,0xef,0x70,0x09] + vqrshrn.s32 d16, q8, #16 +@ CHECK: vqrshrn.s64 d16, q8, #32 @ encoding: [0xe0,0xef,0x70,0x09] + vqrshrn.s64 d16, q8, #32 +@ CHECK: vqrshrn.u16 d16, q8, #8 @ encoding: [0xc8,0xff,0x70,0x09] + vqrshrn.u16 d16, q8, #8 +@ CHECK: vqrshrn.u32 d16, q8, #16 @ encoding: [0xd0,0xff,0x70,0x09] + vqrshrn.u32 d16, q8, #16 +@ CHECK: vqrshrn.u64 d16, q8, #32 @ encoding: [0xe0,0xff,0x70,0x09] + vqrshrn.u64 d16, q8, #32 +@ CHECK: vqrshrun.s16 d16, q8, #8 @ encoding: [0xc8,0xff,0x70,0x08] + vqrshrun.s16 d16, q8, #8 +@ CHECK: vqrshrun.s32 d16, q8, #16 @ encoding: [0xd0,0xff,0x70,0x08] + vqrshrun.s32 d16, q8, #16 +@ CHECK: vqrshrun.s64 d16, q8, #32 @ encoding: [0xe0,0xff,0x70,0x08] + vqrshrun.s64 d16, q8, #32 diff --git a/test/MC/ARM/neont2-shift-encoding.s b/test/MC/ARM/neont2-shift-encoding.s new file mode 100644 index 000000000000..d098f543c9cd --- /dev/null +++ b/test/MC/ARM/neont2-shift-encoding.s @@ -0,0 +1,162 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x04] + vshl.u8 d16, d17, d16 +@ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0x50,0xff,0xa1,0x04] + vshl.u16 d16, d17, d16 +@ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0x60,0xff,0xa1,0x04] + vshl.u32 d16, d17, d16 +@ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0x70,0xff,0xa1,0x04] + vshl.u64 d16, d17, d16 +@ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0xcf,0xef,0x30,0x05] + vshl.i8 d16, d16, #7 +@ CHECK: vshl.i16 d16, d16, #15 @ encoding: [0xdf,0xef,0x30,0x05] + vshl.i16 d16, d16, #15 +@ CHECK: vshl.i32 d16, d16, #31 @ encoding: [0xff,0xef,0x30,0x05] + vshl.i32 d16, d16, #31 +@ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xff,0xef,0xb0,0x05] + vshl.i64 d16, d16, #63 +@ CHECK: vshl.u8 q8, q9, q8 @ encoding: [0x40,0xff,0xe2,0x04] + vshl.u8 q8, q9, q8 +@ CHECK: vshl.u16 q8, q9, q8 @ encoding: [0x50,0xff,0xe2,0x04] + vshl.u16 q8, q9, q8 +@ CHECK: vshl.u32 q8, q9, q8 @ encoding: [0x60,0xff,0xe2,0x04] + vshl.u32 q8, q9, q8 +@ CHECK: vshl.u64 q8, q9, q8 @ encoding: [0x70,0xff,0xe2,0x04] + vshl.u64 q8, q9, q8 +@ CHECK: vshl.i8 q8, q8, #7 @ encoding: [0xcf,0xef,0x70,0x05] + vshl.i8 q8, q8, #7 +@ CHECK: vshl.i16 q8, q8, #15 @ encoding: [0xdf,0xef,0x70,0x05] + vshl.i16 q8, q8, #15 +@ CHECK: vshl.i32 q8, q8, #31 @ encoding: [0xff,0xef,0x70,0x05] + vshl.i32 q8, q8, #31 +@ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xff,0xef,0xf0,0x05] + vshl.i64 q8, q8, #63 +@ CHECK: vshr.u8 d16, d16, #8 @ encoding: [0xc8,0xff,0x30,0x00] + vshr.u8 d16, d16, #8 +@ CHECK: vshr.u16 d16, d16, #16 @ encoding: [0xd0,0xff,0x30,0x00] + vshr.u16 d16, d16, #16 +@ CHECK: vshr.u32 d16, d16, #32 @ encoding: [0xe0,0xff,0x30,0x00] + vshr.u32 d16, d16, #32 +@ CHECK: vshr.u64 d16, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x00] + vshr.u64 d16, d16, #64 +@ CHECK: vshr.u8 q8, q8, #8 @ encoding: [0xc8,0xff,0x70,0x00] + vshr.u8 q8, q8, #8 +@ CHECK: vshr.u16 q8, q8, #16 @ encoding: [0xd0,0xff,0x70,0x00] + vshr.u16 q8, q8, #16 +@ CHECK: vshr.u32 q8, q8, #32 @ encoding: [0xe0,0xff,0x70,0x00] + vshr.u32 q8, q8, #32 +@ CHECK: vshr.u64 q8, q8, #64 @ encoding: [0xc0,0xff,0xf0,0x00] + vshr.u64 q8, q8, #64 +@ CHECK: vshr.s8 d16, d16, #8 @ encoding: [0xc8,0xef,0x30,0x00] + vshr.s8 d16, d16, #8 +@ CHECK: vshr.s16 d16, d16, #16 @ encoding: [0xd0,0xef,0x30,0x00] + vshr.s16 d16, d16, #16 +@ CHECK: vshr.s32 d16, d16, #32 @ encoding: [0xe0,0xef,0x30,0x00] + vshr.s32 d16, d16, #32 +@ CHECK: vshr.s64 d16, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x00] + vshr.s64 d16, d16, #64 +@ CHECK: vshr.s8 q8, q8, #8 @ encoding: [0xc8,0xef,0x70,0x00] + vshr.s8 q8, q8, #8 +@ CHECK: vshr.s16 q8, q8, #16 @ encoding: [0xd0,0xef,0x70,0x00] + vshr.s16 q8, q8, #16 +@ CHECK: vshr.s32 q8, q8, #32 @ encoding: [0xe0,0xef,0x70,0x00] + vshr.s32 q8, q8, #32 +@ CHECK: vshr.s64 q8, q8, #64 @ encoding: [0xc0,0xef,0xf0,0x00] + vshr.s64 q8, q8, #64 +@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0xcf,0xef,0x30,0x0a] + vshll.s8 q8, d16, #7 +@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0xdf,0xef,0x30,0x0a] + vshll.s16 q8, d16, #15 +@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0xff,0xef,0x30,0x0a] + vshll.s32 q8, d16, #31 +@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0xcf,0xff,0x30,0x0a] + vshll.u8 q8, d16, #7 +@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0xdf,0xff,0x30,0x0a] + vshll.u16 q8, d16, #15 +@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0xff,0xff,0x30,0x0a] + vshll.u32 q8, d16, #31 +@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0xf2,0xff,0x20,0x03] + vshll.i8 q8, d16, #8 +@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0xf6,0xff,0x20,0x03] + vshll.i16 q8, d16, #16 +@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0xfa,0xff,0x20,0x03] + vshll.i32 q8, d16, #32 +@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0xc8,0xef,0x30,0x08] + vshrn.i16 d16, q8, #8 +@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0xd0,0xef,0x30,0x08] + vshrn.i32 d16, q8, #16 +@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x08] + vshrn.i64 d16, q8, #32 +@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0x40,0xef,0xa1,0x05] + vrshl.s8 d16, d17, d16 +@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0x50,0xef,0xa1,0x05] + vrshl.s16 d16, d17, d16 +@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0x60,0xef,0xa1,0x05] + vrshl.s32 d16, d17, d16 +@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0x70,0xef,0xa1,0x05] + vrshl.s64 d16, d17, d16 +@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x05] + vrshl.u8 d16, d17, d16 +@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0x50,0xff,0xa1,0x05] + vrshl.u16 d16, d17, d16 +@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0x60,0xff,0xa1,0x05] + vrshl.u32 d16, d17, d16 +@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0x70,0xff,0xa1,0x05] + vrshl.u64 d16, d17, d16 +@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0x40,0xef,0xe2,0x05] + vrshl.s8 q8, q9, q8 +@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0x50,0xef,0xe2,0x05] + vrshl.s16 q8, q9, q8 +@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0x60,0xef,0xe2,0x05] + vrshl.s32 q8, q9, q8 +@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0x70,0xef,0xe2,0x05] + vrshl.s64 q8, q9, q8 +@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0x40,0xff,0xe2,0x05] + vrshl.u8 q8, q9, q8 +@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0x50,0xff,0xe2,0x05] + vrshl.u16 q8, q9, q8 +@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0x60,0xff,0xe2,0x05] + vrshl.u32 q8, q9, q8 +@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0x70,0xff,0xe2,0x05] + vrshl.u64 q8, q9, q8 +@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0xc8,0xef,0x30,0x02] + vrshr.s8 d16, d16, #8 +@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0xd0,0xef,0x30,0x02] + vrshr.s16 d16, d16, #16 +@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0xe0,0xef,0x30,0x02] + vrshr.s32 d16, d16, #32 +@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x02] + vrshr.s64 d16, d16, #64 +@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0xc8,0xff,0x30,0x02] + vrshr.u8 d16, d16, #8 +@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0xd0,0xff,0x30,0x02] + vrshr.u16 d16, d16, #16 +@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0xe0,0xff,0x30,0x02] + vrshr.u32 d16, d16, #32 +@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x02] + vrshr.u64 d16, d16, #64 +@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0xc8,0xef,0x70,0x02] + vrshr.s8 q8, q8, #8 +@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0xd0,0xef,0x70,0x02] + vrshr.s16 q8, q8, #16 +@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0xe0,0xef,0x70,0x02] + vrshr.s32 q8, q8, #32 +@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xc0,0xef,0xf0,0x02] + vrshr.s64 q8, q8, #64 +@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0xc8,0xff,0x70,0x02] + vrshr.u8 q8, q8, #8 +@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0xd0,0xff,0x70,0x02] + vrshr.u16 q8, q8, #16 +@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0xe0,0xff,0x70,0x02] + vrshr.u32 q8, q8, #32 +@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xc0,0xff,0xf0,0x02] + vrshr.u64 q8, q8, #64 +@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0xc8,0xef,0x70,0x08] + vrshrn.i16 d16, q8, #8 +@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0xd0,0xef,0x70,0x08] + vrshrn.i32 d16, q8, #16 +@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x70,0x08] + vrshrn.i64 d16, q8, #32 diff --git a/test/MC/ARM/neont2-shiftaccum-encoding.s b/test/MC/ARM/neont2-shiftaccum-encoding.s new file mode 100644 index 000000000000..a3a18fcee87e --- /dev/null +++ b/test/MC/ARM/neont2-shiftaccum-encoding.s @@ -0,0 +1,100 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0xc8,0xef,0x30,0x11] + vsra.s8 d17, d16, #8 +@ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0xd0,0xef,0x30,0x11] + vsra.s16 d17, d16, #16 +@ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0xe0,0xef,0x30,0x11] + vsra.s32 d17, d16, #32 +@ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x11] + vsra.s64 d17, d16, #64 +@ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0xc8,0xef,0x72,0x01] + vsra.s8 q8, q9, #8 +@ CHECK: vsra.s16 q8, q9, #16 @ encoding: [0xd0,0xef,0x72,0x01] + vsra.s16 q8, q9, #16 +@ CHECK: vsra.s32 q8, q9, #32 @ encoding: [0xe0,0xef,0x72,0x01] + vsra.s32 q8, q9, #32 +@ CHECK: vsra.s64 q8, q9, #64 @ encoding: [0xc0,0xef,0xf2,0x01] + vsra.s64 q8, q9, #64 +@ CHECK: vsra.u8 d17, d16, #8 @ encoding: [0xc8,0xff,0x30,0x11] + vsra.u8 d17, d16, #8 +@ CHECK: vsra.u16 d17, d16, #16 @ encoding: [0xd0,0xff,0x30,0x11] + vsra.u16 d17, d16, #16 +@ CHECK: vsra.u32 d17, d16, #32 @ encoding: [0xe0,0xff,0x30,0x11] + vsra.u32 d17, d16, #32 +@ CHECK: vsra.u64 d17, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x11] + vsra.u64 d17, d16, #64 +@ CHECK: vsra.u8 q8, q9, #8 @ encoding: [0xc8,0xff,0x72,0x01] + vsra.u8 q8, q9, #8 +@ CHECK: vsra.u16 q8, q9, #16 @ encoding: [0xd0,0xff,0x72,0x01] + vsra.u16 q8, q9, #16 +@ CHECK: vsra.u32 q8, q9, #32 @ encoding: [0xe0,0xff,0x72,0x01] + vsra.u32 q8, q9, #32 +@ CHECK: vsra.u64 q8, q9, #64 @ encoding: [0xc0,0xff,0xf2,0x01] + vsra.u64 q8, q9, #64 +@ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0xc8,0xef,0x30,0x13] + vrsra.s8 d17, d16, #8 +@ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0xd0,0xef,0x30,0x13] + vrsra.s16 d17, d16, #16 +@ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0xe0,0xef,0x30,0x13] + vrsra.s32 d17, d16, #32 +@ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x13] + vrsra.s64 d17, d16, #64 +@ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0xc8,0xff,0x30,0x13] + vrsra.u8 d17, d16, #8 +@ CHECK: vrsra.u16 d17, d16, #16 @ encoding: [0xd0,0xff,0x30,0x13] + vrsra.u16 d17, d16, #16 +@ CHECK: vrsra.u32 d17, d16, #32 @ encoding: [0xe0,0xff,0x30,0x13] + vrsra.u32 d17, d16, #32 +@ CHECK: vrsra.u64 d17, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x13] + vrsra.u64 d17, d16, #64 +@ CHECK: vrsra.s8 q8, q9, #8 @ encoding: [0xc8,0xef,0x72,0x03] + vrsra.s8 q8, q9, #8 +@ CHECK: vrsra.s16 q8, q9, #16 @ encoding: [0xd0,0xef,0x72,0x03] + vrsra.s16 q8, q9, #16 +@ CHECK: vrsra.s32 q8, q9, #32 @ encoding: [0xe0,0xef,0x72,0x03] + vrsra.s32 q8, q9, #32 +@ CHECK: vrsra.s64 q8, q9, #64 @ encoding: [0xc0,0xef,0xf2,0x03] + vrsra.s64 q8, q9, #64 +@ CHECK: vrsra.u8 q8, q9, #8 @ encoding: [0xc8,0xff,0x72,0x03] + vrsra.u8 q8, q9, #8 +@ CHECK: vrsra.u16 q8, q9, #16 @ encoding: [0xd0,0xff,0x72,0x03] + vrsra.u16 q8, q9, #16 +@ CHECK: vrsra.u32 q8, q9, #32 @ encoding: [0xe0,0xff,0x72,0x03] + vrsra.u32 q8, q9, #32 +@ CHECK: vrsra.u64 q8, q9, #64 @ encoding: [0xc0,0xff,0xf2,0x03] + vrsra.u64 q8, q9, #64 +@ CHECK: vsli.8 d17, d16, #7 @ encoding: [0xcf,0xff,0x30,0x15] + vsli.8 d17, d16, #7 +@ CHECK: vsli.16 d17, d16, #15 @ encoding: [0xdf,0xff,0x30,0x15] + vsli.16 d17, d16, #15 +@ CHECK: vsli.32 d17, d16, #31 @ encoding: [0xff,0xff,0x30,0x15] + vsli.32 d17, d16, #31 +@ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xff,0xff,0xb0,0x15] + vsli.64 d17, d16, #63 +@ CHECK: vsli.8 q9, q8, #7 @ encoding: [0xcf,0xff,0x70,0x25] + vsli.8 q9, q8, #7 +@ CHECK: vsli.16 q9, q8, #15 @ encoding: [0xdf,0xff,0x70,0x25] + vsli.16 q9, q8, #15 +@ CHECK: vsli.32 q9, q8, #31 @ encoding: [0xff,0xff,0x70,0x25] + vsli.32 q9, q8, #31 +@ CHECK: vsli.64 q9, q8, #63 @ encoding: [0xff,0xff,0xf0,0x25] + vsli.64 q9, q8, #63 +@ CHECK: vsri.8 d17, d16, #8 @ encoding: [0xc8,0xff,0x30,0x14] + vsri.8 d17, d16, #8 +@ CHECK: vsri.16 d17, d16, #16 @ encoding: [0xd0,0xff,0x30,0x14] + vsri.16 d17, d16, #16 +@ CHECK: vsri.32 d17, d16, #32 @ encoding: [0xe0,0xff,0x30,0x14] + vsri.32 d17, d16, #32 +@ CHECK: vsri.64 d17, d16, #64 @ encoding: [0xc0,0xff,0xb0,0x14] + vsri.64 d17, d16, #64 +@ CHECK: vsri.8 q9, q8, #8 @ encoding: [0xc8,0xff,0x70,0x24] + vsri.8 q9, q8, #8 +@ CHECK: vsri.16 q9, q8, #16 @ encoding: [0xd0,0xff,0x70,0x24] + vsri.16 q9, q8, #16 +@ CHECK: vsri.32 q9, q8, #32 @ encoding: [0xe0,0xff,0x70,0x24] + vsri.32 q9, q8, #32 +@ CHECK: vsri.64 q9, q8, #64 @ encoding: [0xc0,0xff,0xf0,0x24] + vsri.64 q9, q8, #64 diff --git a/test/MC/ARM/neont2-shuffle-encoding.s b/test/MC/ARM/neont2-shuffle-encoding.s new file mode 100644 index 000000000000..f471a2b54178 --- /dev/null +++ b/test/MC/ARM/neont2-shuffle-encoding.s @@ -0,0 +1,48 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xf1,0xef,0xa0,0x03] + vext.8 d16, d17, d16, #3 +@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xf1,0xef,0xa0,0x05] + vext.8 d16, d17, d16, #5 +@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xf2,0xef,0xe0,0x03] + vext.8 q8, q9, q8, #3 +@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xf2,0xef,0xe0,0x07] + vext.8 q8, q9, q8, #7 +@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xf1,0xef,0xa0,0x06] + vext.16 d16, d17, d16, #3 +@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xf2,0xef,0xe0,0x0c] + vext.32 q8, q9, q8, #3 +@ CHECK: vtrn.8 d17, d16 @ encoding: [0xf2,0xff,0xa0,0x10] + vtrn.8 d17, d16 +@ CHECK: vtrn.16 d17, d16 @ encoding: [0xf6,0xff,0xa0,0x10] + vtrn.16 d17, d16 +@ CHECK: vtrn.32 d17, d16 @ encoding: [0xfa,0xff,0xa0,0x10] + vtrn.32 d17, d16 +@ CHECK: vtrn.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x20] + vtrn.8 q9, q8 +@ CHECK: vtrn.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x20] + vtrn.16 q9, q8 +@ CHECK: vtrn.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x20] + vtrn.32 q9, q8 +@ CHECK: vuzp.8 d17, d16 @ encoding: [0xf2,0xff,0x20,0x11] + vuzp.8 d17, d16 +@ CHECK: vuzp.16 d17, d16 @ encoding: [0xf6,0xff,0x20,0x11] + vuzp.16 d17, d16 +@ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21] + vuzp.8 q9, q8 +@ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21] + vuzp.16 q9, q8 +@ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21] + vuzp.32 q9, q8 +@ CHECK: vzip.8 d17, d16 @ encoding: [0xf2,0xff,0xa0,0x11] + vzip.8 d17, d16 +@ CHECK: vzip.16 d17, d16 @ encoding: [0xf6,0xff,0xa0,0x11] + vzip.16 d17, d16 +@ CHECK: vzip.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x21] + vzip.8 q9, q8 +@ CHECK: vzip.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x21] + vzip.16 q9, q8 +@ CHECK: vzip.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x21] + vzip.32 q9, q8 diff --git a/test/MC/ARM/neont2-sub-encoding.s b/test/MC/ARM/neont2-sub-encoding.s new file mode 100644 index 000000000000..fa9d145df92c --- /dev/null +++ b/test/MC/ARM/neont2-sub-encoding.s @@ -0,0 +1,46 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s + +@ CHECK: vext.8 d16, d17, d16, #3 @ encoding: [0xf1,0xef,0xa0,0x03] + vext.8 d16, d17, d16, #3 +@ CHECK: vext.8 d16, d17, d16, #5 @ encoding: [0xf1,0xef,0xa0,0x05] + vext.8 d16, d17, d16, #5 +@ CHECK: vext.8 q8, q9, q8, #3 @ encoding: [0xf2,0xef,0xe0,0x03] + vext.8 q8, q9, q8, #3 +@ CHECK: vext.8 q8, q9, q8, #7 @ encoding: [0xf2,0xef,0xe0,0x07] + vext.8 q8, q9, q8, #7 +@ CHECK: vext.16 d16, d17, d16, #3 @ encoding: [0xf1,0xef,0xa0,0x06] + vext.16 d16, d17, d16, #3 +@ CHECK: vext.32 q8, q9, q8, #3 @ encoding: [0xf2,0xef,0xe0,0x0c] + vext.32 q8, q9, q8, #3 +@ CHECK: vtrn.8 d17, d16 @ encoding: [0xf2,0xff,0xa0,0x10] + vtrn.8 d17, d16 +@ CHECK: vtrn.16 d17, d16 @ encoding: [0xf6,0xff,0xa0,0x10] + vtrn.16 d17, d16 +@ CHECK: vtrn.32 d17, d16 @ encoding: [0xfa,0xff,0xa0,0x10] + vtrn.32 d17, d16 +@ CHECK: vtrn.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x20] + vtrn.8 q9, q8 +@ CHECK: vtrn.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x20] + vtrn.16 q9, q8 +@ CHECK: vtrn.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x20] + vtrn.32 q9, q8 +@ CHECK: vuzp.8 d17, d16 @ encoding: [0xf2,0xff,0x20,0x11] + vuzp.8 d17, d16 +@ CHECK: vuzp.16 d17, d16 @ encoding: [0xf6,0xff,0x20,0x11] + vuzp.16 d17, d16 +@ CHECK: vuzp.8 q9, q8 @ encoding: [0xf2,0xff,0x60,0x21] + vuzp.8 q9, q8 +@ CHECK: vuzp.16 q9, q8 @ encoding: [0xf6,0xff,0x60,0x21] + vuzp.16 q9, q8 +@ CHECK: vuzp.32 q9, q8 @ encoding: [0xfa,0xff,0x60,0x21] + vuzp.32 q9, q8 +@ CHECK: vzip.8 d17, d16 @ encoding: [0xf2,0xff,0xa0,0x11] + vzip.8 d17, d16 +@ CHECK: vzip.16 d17, d16 @ encoding: [0xf6,0xff,0xa0,0x11] + vzip.16 d17, d16 +@ CHECK: vzip.8 q9, q8 @ encoding: [0xf2,0xff,0xe0,0x21] + vzip.8 q9, q8 +@ CHECK: vzip.16 q9, q8 @ encoding: [0xf6,0xff,0xe0,0x21] + vzip.16 q9, q8 +@ CHECK: vzip.32 q9, q8 @ encoding: [0xfa,0xff,0xe0,0x21] + vzip.32 q9, q8 diff --git a/test/MC/ARM/neont2-table-encoding.s b/test/MC/ARM/neont2-table-encoding.s new file mode 100644 index 000000000000..46fb9345fbb6 --- /dev/null +++ b/test/MC/ARM/neont2-table-encoding.s @@ -0,0 +1,21 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vtbl.8 d16, {d17}, d16 @ encoding: [0xa0,0x08,0xf1,0xff] + vtbl.8 d16, {d17}, d16 +@ CHECK: vtbl.8 d16, {d16, d17}, d18 @ encoding: [0xa2,0x09,0xf0,0xff] + vtbl.8 d16, {d16, d17}, d18 +@ CHECK: vtbl.8 d16, {d16, d17, d18}, d20 @ encoding: [0xa4,0x0a,0xf0,0xff] + vtbl.8 d16, {d16, d17, d18}, d20 +@ CHECK: vtbl.8 d16, {d16, d17, d18, d19}, d20 @ encoding: [0xa4,0x0b,0xf0,0xff] + vtbl.8 d16, {d16, d17, d18, d19}, d20 +@ CHECK: vtbx.8 d18, {d16}, d17 @ encoding: [0xe1,0x28,0xf0,0xff] + vtbx.8 d18, {d16}, d17 +@ CHECK: vtbx.8 d19, {d16, d17}, d18 @ encoding: [0xe2,0x39,0xf0,0xff] + vtbx.8 d19, {d16, d17}, d18 +@ CHECK: vtbx.8 d20, {d16, d17, d18}, d21 @ encoding: [0xe5,0x4a,0xf0,0xff] + vtbx.8 d20, {d16, d17, d18}, d21 +@ CHECK: vtbx.8 d20, {d16, d17, d18, d19}, d21 @ encoding: [0xe5,0x4b,0xf0,0xff] + vtbx.8 d20, {d16, d17, d18, d19}, d21 diff --git a/test/MC/ARM/neont2-vld-encoding.s b/test/MC/ARM/neont2-vld-encoding.s new file mode 100644 index 000000000000..031205a5cc8a --- /dev/null +++ b/test/MC/ARM/neont2-vld-encoding.s @@ -0,0 +1,112 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vld1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x60,0xf9] + vld1.8 {d16}, [r0, :64] +@ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x60,0xf9] + vld1.16 {d16}, [r0] +@ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x60,0xf9] + vld1.32 {d16}, [r0] +@ CHECK: vld1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x60,0xf9] + vld1.64 {d16}, [r0] +@ CHECK: vld1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x60,0xf9] + vld1.8 {d16, d17}, [r0, :64] +@ CHECK: vld1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x60,0xf9] + vld1.16 {d16, d17}, [r0, :128] +@ CHECK: vld1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x60,0xf9] + vld1.32 {d16, d17}, [r0] +@ CHECK: vld1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x60,0xf9] + vld1.64 {d16, d17}, [r0] + +@ CHECK: vld2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x60,0xf9] + vld2.8 {d16, d17}, [r0, :64] +@ CHECK: vld2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x60,0xf9] + vld2.16 {d16, d17}, [r0, :128] +@ CHECK: vld2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x60,0xf9] + vld2.32 {d16, d17}, [r0] +@ CHECK: vld2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x60,0xf9] + vld2.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vld2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x60,0xf9] + vld2.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vld2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x60,0xf9] + vld2.32 {d16, d17, d18, d19}, [r0, :256] + +@ CHECK: vld3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x60,0xf9] + vld3.8 {d16, d17, d18}, [r0, :64] +@ CHECK: vld3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x60,0xf9] + vld3.16 {d16, d17, d18}, [r0] +@ CHECK: vld3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x60,0xf9] + vld3.32 {d16, d17, d18}, [r0] +@ CHECK: vld3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x60,0xf9] + vld3.8 {d16, d18, d20}, [r0, :64]! +@ CHECK: vld3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x60,0xf9] + vld3.8 {d17, d19, d21}, [r0, :64]! +@ CHECK: vld3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x60,0xf9] + vld3.16 {d16, d18, d20}, [r0]! +@ CHECK: vld3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x60,0xf9] + vld3.16 {d17, d19, d21}, [r0]! +@ CHECK: vld3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x60,0xf9] + vld3.32 {d16, d18, d20}, [r0]! +@ CHECK: vld3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x60,0xf9] + vld3.32 {d17, d19, d21}, [r0]! + +@ CHECK: vld4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x60,0xf9] + vld4.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vld4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x60,0xf9] + vld4.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vld4.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x00,0x60,0xf9] + vld4.32 {d16, d17, d18, d19}, [r0, :256] +@ CHECK: vld4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x60,0xf9] + vld4.8 {d16, d18, d20, d22}, [r0, :256]! +@ CHECK: vld4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x60,0xf9] + vld4.8 {d17, d19, d21, d23}, [r0, :256]! +@ CHECK: vld4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x60,0xf9] + vld4.16 {d16, d18, d20, d22}, [r0]! +@ CHECK: vld4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x60,0xf9] + vld4.16 {d17, d19, d21, d23}, [r0]! +@ CHECK: vld4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x60,0xf9] + vld4.32 {d16, d18, d20, d22}, [r0]! +@ CHECK: vld4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x60,0xf9] + vld4.32 {d17, d19, d21, d23}, [r0]! + +@ CHECK: vld1.8 {d16[3]}, [r0] @ encoding: [0x6f,0x00,0xe0,0xf9] + vld1.8 {d16[3]}, [r0] +@ CHECK: vld1.16 {d16[2]}, [r0, :16] @ encoding: [0x9f,0x04,0xe0,0xf9] + vld1.16 {d16[2]}, [r0, :16] +@ CHECK: vld1.32 {d16[1]}, [r0, :32] @ encoding: [0xbf,0x08,0xe0,0xf9] + vld1.32 {d16[1]}, [r0, :32] + +@ CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xe0,0xf9] + vld2.8 {d16[1], d17[1]}, [r0, :16] +@ CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xe0,0xf9] + vld2.16 {d16[1], d17[1]}, [r0, :32] +@ CHECK: vld2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xe0,0xf9] + vld2.32 {d16[1], d17[1]}, [r0] +@ CHECK: vld2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xe0,0xf9] + vld2.16 {d17[1], d19[1]}, [r0] +@ CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xe0,0xf9] + vld2.32 {d17[0], d19[0]}, [r0, :64] + +@ CHECK: vld3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xe0,0xf9] + vld3.8 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x4f,0x06,0xe0,0xf9] + vld3.16 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x8f,0x0a,0xe0,0xf9] + vld3.32 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0] @ encoding: [0x6f,0x06,0xe0,0xf9] + vld3.16 {d16[1], d18[1], d20[1]}, [r0] +@ CHECK: vld3.32 {d17[1], d19[1], d21[1]}, [r0] @ encoding: [0xcf,0x1a,0xe0,0xf9] + vld3.32 {d17[1], d19[1], d21[1]}, [r0] + +@ CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xe0,0xf9] + vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] +@ CHECK: vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xe0,0xf9] + vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +@ CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xe0,0xf9] + vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +@ CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] @ encoding: [0x7f,0x07,0xe0,0xf9] + vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64] +@ CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xe0,0xf9] + vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/test/MC/ARM/neont2-vst-encoding.s b/test/MC/ARM/neont2-vst-encoding.s new file mode 100644 index 000000000000..1722f12a00f6 --- /dev/null +++ b/test/MC/ARM/neont2-vst-encoding.s @@ -0,0 +1,103 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vst1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x40,0xf9] + vst1.8 {d16}, [r0, :64] +@ CHECK: vst1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x40,0xf9] + vst1.16 {d16}, [r0] +@ CHECK: vst1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x40,0xf9] + vst1.32 {d16}, [r0] +@ CHECK: vst1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x40,0xf9] + vst1.64 {d16}, [r0] +@ CHECK: vst1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x40,0xf9] + vst1.8 {d16, d17}, [r0, :64] +@ CHECK: vst1.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x0a,0x40,0xf9] + vst1.16 {d16, d17}, [r0, :128] +@ CHECK: vst1.32 {d16, d17}, [r0] @ encoding: [0x8f,0x0a,0x40,0xf9] + vst1.32 {d16, d17}, [r0] +@ CHECK: vst1.64 {d16, d17}, [r0] @ encoding: [0xcf,0x0a,0x40,0xf9] + vst1.64 {d16, d17}, [r0] + +@ CHECK: vst2.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x08,0x40,0xf9] + vst2.8 {d16, d17}, [r0, :64] +@ CHECK: vst2.16 {d16, d17}, [r0, :128] @ encoding: [0x6f,0x08,0x40,0xf9] + vst2.16 {d16, d17}, [r0, :128] +@ CHECK: vst2.32 {d16, d17}, [r0] @ encoding: [0x8f,0x08,0x40,0xf9] + vst2.32 {d16, d17}, [r0] +@ CHECK: vst2.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x03,0x40,0xf9] + vst2.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vst2.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x03,0x40,0xf9] + vst2.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vst2.32 {d16, d17, d18, d19}, [r0, :256] @ encoding: [0xbf,0x03,0x40,0xf9] + vst2.32 {d16, d17, d18, d19}, [r0, :256] + +@ CHECK: vst3.8 {d16, d17, d18}, [r0, :64] @ encoding: [0x1f,0x04,0x40,0xf9] + vst3.8 {d16, d17, d18}, [r0, :64] +@ CHECK: vst3.16 {d16, d17, d18}, [r0] @ encoding: [0x4f,0x04,0x40,0xf9] + vst3.16 {d16, d17, d18}, [r0] +@ CHECK: vst3.32 {d16, d17, d18}, [r0] @ encoding: [0x8f,0x04,0x40,0xf9] + vst3.32 {d16, d17, d18}, [r0] +@ CHECK: vst3.8 {d16, d18, d20}, [r0, :64]! @ encoding: [0x1d,0x05,0x40,0xf9] + vst3.8 {d16, d18, d20}, [r0, :64]! +@ CHECK: vst3.8 {d17, d19, d21}, [r0, :64]! @ encoding: [0x1d,0x15,0x40,0xf9] + vst3.8 {d17, d19, d21}, [r0, :64]! +@ CHECK: vst3.16 {d16, d18, d20}, [r0]! @ encoding: [0x4d,0x05,0x40,0xf9] + vst3.16 {d16, d18, d20}, [r0]! +@ CHECK: vst3.16 {d17, d19, d21}, [r0]! @ encoding: [0x4d,0x15,0x40,0xf9] + vst3.16 {d17, d19, d21}, [r0]! +@ CHECK: vst3.32 {d16, d18, d20}, [r0]! @ encoding: [0x8d,0x05,0x40,0xf9] + vst3.32 {d16, d18, d20}, [r0]! +@ CHECK: vst3.32 {d17, d19, d21}, [r0]! @ encoding: [0x8d,0x15,0x40,0xf9] + vst3.32 {d17, d19, d21}, [r0]! + +@ CHECK: vst4.8 {d16, d17, d18, d19}, [r0, :64] @ encoding: [0x1f,0x00,0x40,0xf9] + vst4.8 {d16, d17, d18, d19}, [r0, :64] +@ CHECK: vst4.16 {d16, d17, d18, d19}, [r0, :128] @ encoding: [0x6f,0x00,0x40,0xf9] + vst4.16 {d16, d17, d18, d19}, [r0, :128] +@ CHECK: vst4.8 {d16, d18, d20, d22}, [r0, :256]! @ encoding: [0x3d,0x01,0x40,0xf9] + vst4.8 {d16, d18, d20, d22}, [r0, :256]! +@ CHECK: vst4.8 {d17, d19, d21, d23}, [r0, :256]! @ encoding: [0x3d,0x11,0x40,0xf9] + vst4.8 {d17, d19, d21, d23}, [r0, :256]! +@ CHECK: vst4.16 {d16, d18, d20, d22}, [r0]! @ encoding: [0x4d,0x01,0x40,0xf9] + vst4.16 {d16, d18, d20, d22}, [r0]! +@ CHECK: vst4.16 {d17, d19, d21, d23}, [r0]! @ encoding: [0x4d,0x11,0x40,0xf9] + vst4.16 {d17, d19, d21, d23}, [r0]! +@ CHECK: vst4.32 {d16, d18, d20, d22}, [r0]! @ encoding: [0x8d,0x01,0x40,0xf9] + vst4.32 {d16, d18, d20, d22}, [r0]! +@ CHECK: vst4.32 {d17, d19, d21, d23}, [r0]! @ encoding: [0x8d,0x11,0x40,0xf9] + vst4.32 {d17, d19, d21, d23}, [r0]! + +@ CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16] @ encoding: [0x3f,0x01,0xc0,0xf9] + vst2.8 {d16[1], d17[1]}, [r0, :16] +@ CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32] @ encoding: [0x5f,0x05,0xc0,0xf9] + vst2.16 {d16[1], d17[1]}, [r0, :32] +@ CHECK: vst2.32 {d16[1], d17[1]}, [r0] @ encoding: [0x8f,0x09,0xc0,0xf9] + vst2.32 {d16[1], d17[1]}, [r0] +@ CHECK: vst2.16 {d17[1], d19[1]}, [r0] @ encoding: [0x6f,0x15,0xc0,0xf9] + vst2.16 {d17[1], d19[1]}, [r0] +@ CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64] @ encoding: [0x5f,0x19,0xc0,0xf9] + vst2.32 {d17[0], d19[0]}, [r0, :64] + +@ CHECK: vst3.8 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x2f,0x02,0xc0,0xf9] + vst3.8 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x4f,0x06,0xc0,0xf9] + vst3.16 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.32 {d16[1], d17[1], d18[1]}, [r0] @ encoding: [0x8f,0x0a,0xc0,0xf9] + vst3.32 {d16[1], d17[1], d18[1]}, [r0] +@ CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0] @ encoding: [0xaf,0x16,0xc0,0xf9] + vst3.16 {d17[2], d19[2], d21[2]}, [r0] +@ CHECK: vst3.32 {d16[0], d18[0], d20[0]}, [r0] @ encoding: [0x4f,0x0a,0xc0,0xf9] + vst3.32 {d16[0], d18[0], d20[0]}, [r0] + +@ CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] @ encoding: [0x3f,0x03,0xc0,0xf9] + vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32] +@ CHECK: vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] @ encoding: [0x4f,0x07,0xc0,0xf9] + vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] +@ CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] @ encoding: [0xaf,0x0b,0xc0,0xf9] + vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128] +@ CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] @ encoding: [0xff,0x17,0xc0,0xf9] + vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64] +@ CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] @ encoding: [0x4f,0x1b,0xc0,0xf9] + vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] diff --git a/test/MC/ARM/prefetch.ll b/test/MC/ARM/prefetch.ll new file mode 100644 index 000000000000..674b8f323f04 --- /dev/null +++ b/test/MC/ARM/prefetch.ll @@ -0,0 +1,58 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin -mattr=+v7a,+mp -show-mc-encoding | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+v7a -show-mc-encoding | FileCheck %s -check-prefix=T2 +; rdar://8924681 + +define void @t1(i8* %ptr) nounwind { +entry: +; ARM: t1: +; ARM: pldw [r0] @ encoding: [0x00,0xf0,0x90,0xf5] +; ARM: pld [r0] @ encoding: [0x00,0xf0,0xd0,0xf5] + +; T2: t1: +; T2: pld [r0] @ encoding: [0x90,0xf8,0x00,0xf0] + tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) + ret void +} + +define void @t2(i8* %ptr) nounwind { +entry: +; ARM: t2: +; ARM: pld [r0, #1023] @ encoding: [0xff,0xf3,0xd0,0xf5] + +; T2: t2: +; T2: pld [r0, #1023] @ encoding: [0x90,0xf8,0xff,0xf3] + %tmp = getelementptr i8* %ptr, i32 1023 + tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 ) + ret void +} + +define void @t3(i32 %base, i32 %offset) nounwind { +entry: +; ARM: t3: +; ARM: pld [r0, r1, lsr #2] @ encoding: [0x21,0xf1,0xd0,0xf7] + +; T2: t3: +; T2: pld [r0, r1] @ encoding: [0x10,0xf8,0x01,0xf0] + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +define void @t4(i32 %base, i32 %offset) nounwind { +entry: +; ARM: t4: +; ARM: pld [r0, r1, lsl #2] @ encoding: [0x01,0xf1,0xd0,0xf7] + +; T2: t4: +; T2: pld [r0, r1, lsl #2] @ encoding: [0x10,0xf8,0x21,0xf0] + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + ret void +} + +declare void @llvm.prefetch(i8*, i32, i32) nounwind diff --git a/test/MC/ARM/reg-list.s b/test/MC/ARM/reg-list.s new file mode 100644 index 000000000000..4dd392e83791 --- /dev/null +++ b/test/MC/ARM/reg-list.s @@ -0,0 +1,8 @@ +@ RUN: llvm-mc -triple thumb-apple-darwin10 -show-encoding < %s 2> %t | FileCheck %s +@ RUN: FileCheck --check-prefix=CHECK-WARNINGS < %t %s + + push {r7, lr} +@ CHECK-WARNINGS: register not in ascending order in register list + + push {lr, r7} +@ CHECK: push {lr, r7} diff --git a/test/MC/ARM/simple-encoding.ll b/test/MC/ARM/simple-encoding.ll new file mode 100644 index 000000000000..0877e8e30c6f --- /dev/null +++ b/test/MC/ARM/simple-encoding.ll @@ -0,0 +1,237 @@ +;RUN: llc -mtriple=armv7-apple-darwin -show-mc-encoding < %s | FileCheck %s + + +;FIXME: Once the ARM integrated assembler is up and going, these sorts of tests +; should run on .s source files rather than using llc to generate the +; assembly. There's also a large number of instruction encodings the +; compiler never generates, so we need the integrated assembler to be +; able to test those at all. + +declare void @llvm.trap() nounwind +declare i32 @llvm.ctlz.i32(i32) + +define i32 @foo(i32 %a, i32 %b) { +; CHECK: foo +; CHECK: trap @ encoding: [0xfe,0xde,0xff,0xe7] +; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] + + tail call void @llvm.trap() + ret i32 undef +} + +define i32 @f2(i32 %a, i32 %b) { +; CHECK: f2 +; CHECK: add r0, r1, r0 @ encoding: [0x00,0x00,0x81,0xe0] +; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] + %add = add nsw i32 %b, %a + ret i32 %add +} + + +define i32 @f3(i32 %a, i32 %b) { +; CHECK: f3 +; CHECK: add r0, r0, r1, lsl #3 @ encoding: [0x81,0x01,0x80,0xe0] +; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] + %mul = shl i32 %b, 3 + %add = add nsw i32 %mul, %a + ret i32 %add +} + +define i32 @f4(i32 %a, i32 %b) { +; CHECK: f4 +; CHECK: add r0, r0, #254, 28 @ encoding: [0xfe,0x0e,0x80,0xe2] +; CHECK: @ 4064 +; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] + %add = add nsw i32 %a, 4064 + ret i32 %add +} + +define i32 @f5(i32 %a, i32 %b, i32 %c) { +; CHECK: f5 +; CHECK: cmp r0, r1 @ encoding: [0x01,0x00,0x50,0xe1] +; CHECK: mov r0, r2 @ encoding: [0x02,0x00,0xa0,0xe1] +; CHECK: movgt r0, r1 @ encoding: [0x01,0x00,0xa0,0xc1] + %cmp = icmp sgt i32 %a, %b + %retval.0 = select i1 %cmp, i32 %b, i32 %c + ret i32 %retval.0 +} + +define i64 @f6(i64 %a, i64 %b, i64 %c) { +; CHECK: f6 +; CHECK: adds r0, r2, r0 @ encoding: [0x00,0x00,0x92,0xe0] +; CHECK: adc r1, r3, r1 @ encoding: [0x01,0x10,0xa3,0xe0] + %add = add nsw i64 %b, %a + ret i64 %add +} + +define i32 @f7(i32 %a, i32 %b) { +; CHECK: f7 +; CHECK: uxtab r0, r0, r1 @ encoding: [0x71,0x00,0xe0,0xe6] + %and = and i32 %b, 255 + %add = add i32 %and, %a + ret i32 %add +} + +define i32 @f8(i32 %a) { +; CHECK: f8 +; CHECK: movt r0, #42405 @ encoding: [0xa5,0x05,0x4a,0xe3] + %and = and i32 %a, 65535 + %or = or i32 %and, -1515913216 + ret i32 %or +} + +define i32 @f9() { +; CHECK: f9 +; CHECK: movw r0, #42405 @ encoding: [0xa5,0x05,0x0a,0xe3] + ret i32 42405 +} + +define i64 @f10(i64 %a) { +; CHECK: f10 +; CHECK: asrs r1, r1, #1 @ encoding: [0xc1,0x10,0xb0,0xe1] +; CHECK: rrx r0, r0 @ encoding: [0x60,0x00,0xa0,0xe1] + %shr = ashr i64 %a, 1 + ret i64 %shr +} + +define i32 @f11([1 x i32] %A.coerce0, [1 x i32] %B.coerce0) { +; CHECK: f11 +; CHECK: ubfx r1, r1, #8, #5 @ encoding: [0x51,0x14,0xe4,0xe7] +; CHECK: sbfx r0, r0, #13, #7 @ encoding: [0xd0,0x06,0xa6,0xe7] + %tmp1 = extractvalue [1 x i32] %A.coerce0, 0 + %tmp2 = extractvalue [1 x i32] %B.coerce0, 0 + %tmp3 = shl i32 %tmp1, 12 + %bf.val.sext = ashr i32 %tmp3, 25 + %tmp4 = lshr i32 %tmp2, 8 + %bf.clear2 = and i32 %tmp4, 31 + %mul = mul nsw i32 %bf.val.sext, %bf.clear2 + ret i32 %mul +} + +define i32 @f12(i32 %a) { +; CHECK: f12: +; CHECK: bfc r0, #4, #20 @ encoding: [0x1f,0x02,0xd7,0xe7] + %tmp = and i32 %a, 4278190095 + ret i32 %tmp +} + +define i64 @f13() { +; CHECK: f13: +; CHECK: mvn r0, #0 @ encoding: [0x00,0x00,0xe0,0xe3] +; CHECK: mvn r1, #2, 2 @ encoding: [0x02,0x11,0xe0,0xe3] + ret i64 9223372036854775807 +} + +define i32 @f14(i32 %x, i32 %y) { +; CHECK: f14: +; CHECK: smmul r0, r1, r0 @ encoding: [0x11,0xf0,0x50,0xe7] + %tmp = sext i32 %x to i64 + %tmp1 = sext i32 %y to i64 + %tmp2 = mul i64 %tmp1, %tmp + %tmp3 = lshr i64 %tmp2, 32 + %tmp3.upgrd.1 = trunc i64 %tmp3 to i32 + ret i32 %tmp3.upgrd.1 +} + +define i32 @f15(i32 %x, i32 %y) { +; CHECK: f15: +; CHECK: umull r1, r0, r1, r0 @ encoding: [0x91,0x10,0x80,0xe0] + %tmp = zext i32 %x to i64 + %tmp1 = zext i32 %y to i64 + %tmp2 = mul i64 %tmp1, %tmp + %tmp3 = lshr i64 %tmp2, 32 + %tmp3.upgrd.2 = trunc i64 %tmp3 to i32 + ret i32 %tmp3.upgrd.2 +} + +define i32 @f16(i16 %x, i32 %y) { +; CHECK: f16: +; CHECK: smulbt r0, r0, r1 @ encoding: [0xc0,0x01,0x60,0xe1] + %tmp1 = add i16 %x, 2 + %tmp2 = sext i16 %tmp1 to i32 + %tmp3 = ashr i32 %y, 16 + %tmp4 = mul i32 %tmp2, %tmp3 + ret i32 %tmp4 +} + +define i32 @f17(i32 %x, i32 %y) { +; CHECK: f17: +; CHECK: smultt r0, r1, r0 @ encoding: [0xe1,0x00,0x60,0xe1] + %tmp1 = ashr i32 %x, 16 + %tmp3 = ashr i32 %y, 16 + %tmp4 = mul i32 %tmp3, %tmp1 + ret i32 %tmp4 +} + +define i32 @f18(i32 %a, i16 %x, i32 %y) { +; CHECK: f18: +; CHECK: smlabt r0, r1, r2, r0 @ encoding: [0xc1,0x02,0x00,0xe1] + %tmp = sext i16 %x to i32 + %tmp2 = ashr i32 %y, 16 + %tmp3 = mul i32 %tmp2, %tmp + %tmp5 = add i32 %tmp3, %a + ret i32 %tmp5 +} + +define i32 @f19(i32 %x) { +; CHECK: f19 +; CHECK: clz r0, r0 @ encoding: [0x10,0x0f,0x6f,0xe1] + %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x ) + ret i32 %tmp.1 +} + +define i32 @f20(i32 %X) { +; CHECK: f20 +; CHECK: rev16 r0, r0 @ encoding: [0xb0,0x0f,0xbf,0xe6] + %tmp1 = lshr i32 %X, 8 + %X15 = bitcast i32 %X to i32 + %tmp4 = shl i32 %X15, 8 + %tmp2 = and i32 %tmp1, 16711680 + %tmp5 = and i32 %tmp4, -16777216 + %tmp9 = and i32 %tmp1, 255 + %tmp13 = and i32 %tmp4, 65280 + %tmp6 = or i32 %tmp5, %tmp2 + %tmp10 = or i32 %tmp6, %tmp13 + %tmp14 = or i32 %tmp10, %tmp9 + ret i32 %tmp14 +} + +define i32 @f21(i32 %X) { +; CHECK: f21 +; CHECK: revsh r0, r0 @ encoding: [0xb0,0x0f,0xff,0xe6] + %tmp1 = lshr i32 %X, 8 + %tmp1.upgrd.1 = trunc i32 %tmp1 to i16 + %tmp3 = trunc i32 %X to i16 + %tmp2 = and i16 %tmp1.upgrd.1, 255 + %tmp4 = shl i16 %tmp3, 8 + %tmp5 = or i16 %tmp2, %tmp4 + %tmp5.upgrd.2 = sext i16 %tmp5 to i32 + ret i32 %tmp5.upgrd.2 +} + +define i32 @f22(i32 %X, i32 %Y) { +; CHECK: f22 +; CHECK: pkhtb r0, r0, r1, asr #22 @ encoding: [0x51,0x0b,0x80,0xe6] + %tmp1 = and i32 %X, -65536 + %tmp2 = lshr i32 %Y, 22 + %tmp3 = or i32 %tmp2, %tmp1 + ret i32 %tmp3 +} + +define i32 @f23(i32 %X, i32 %Y) { +; CHECK: f23 +; CHECK: pkhbt r0, r0, r1, lsl #18 @ encoding: [0x11,0x09,0x80,0xe6] + %tmp1 = and i32 %X, 65535 + %tmp2 = shl i32 %Y, 18 + %tmp3 = or i32 %tmp1, %tmp2 + ret i32 %tmp3 +} + +define void @f24(i32 %a) { +; CHECK: f24 +; CHECK: cmp r0, #1, 16 @ encoding: [0x01,0x08,0x50,0xe3] + %b = icmp ugt i32 %a, 65536 + br i1 %b, label %r, label %r +r: + ret void +} diff --git a/test/MC/ARM/simple-fp-encoding.s b/test/MC/ARM/simple-fp-encoding.s new file mode 100644 index 000000000000..891738085a2d --- /dev/null +++ b/test/MC/ARM/simple-fp-encoding.s @@ -0,0 +1,236 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s + +@ CHECK: vadd.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x71,0xee] + vadd.f64 d16, d17, d16 + +@ CHECK: vadd.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x30,0xee] + vadd.f32 s0, s1, s0 + +@ CHECK: vsub.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x71,0xee] + vsub.f64 d16, d17, d16 + +@ CHECK: vsub.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x30,0xee] + vsub.f32 s0, s1, s0 + +@ CHECK: vdiv.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0xc1,0xee] + vdiv.f64 d16, d17, d16 + +@ CHECK: vdiv.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x80,0xee] + vdiv.f32 s0, s1, s0 + +@ CHECK: vmul.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x61,0xee] + vmul.f64 d16, d17, d16 + +@ CHECK: vmul.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x20,0xee] + vmul.f32 s0, s1, s0 + +@ CHECK: vnmul.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x61,0xee] + vnmul.f64 d16, d17, d16 + +@ CHECK: vnmul.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x20,0xee] + vnmul.f32 s0, s1, s0 + +@ CHECK: vcmpe.f64 d17, d16 @ encoding: [0xe0,0x1b,0xf4,0xee] + vcmpe.f64 d17, d16 + +@ CHECK: vcmpe.f32 s1, s0 @ encoding: [0xc0,0x0a,0xf4,0xee] + vcmpe.f32 s1, s0 + +@ FIXME: vcmpe.f64 d16, #0 @ encoding: [0xc0,0x0b,0xf5,0xee] +@ vcmpe.f64 d16, #0 + +@ FIXME: vcmpe.f32 s0, #0 @ encoding: [0xc0,0x0a,0xb5,0xee] +@ vcmpe.f32 s0, #0 + +@ CHECK: vabs.f64 d16, d16 @ encoding: [0xe0,0x0b,0xf0,0xee] + vabs.f64 d16, d16 + +@ CHECK: vabs.f32 s0, s0 @ encoding: [0xc0,0x0a,0xb0,0xee] + vabs.f32 s0, s0 + +@ CHECK: vcvt.f32.f64 s0, d16 @ encoding: [0xe0,0x0b,0xb7,0xee] + vcvt.f32.f64 s0, d16 + +@ CHECK: vcvt.f64.f32 d16, s0 @ encoding: [0xc0,0x0a,0xf7,0xee] + vcvt.f64.f32 d16, s0 + +@ CHECK: vneg.f64 d16, d16 @ encoding: [0x60,0x0b,0xf1,0xee] + vneg.f64 d16, d16 + +@ CHECK: vneg.f32 s0, s0 @ encoding: [0x40,0x0a,0xb1,0xee] + vneg.f32 s0, s0 + +@ CHECK: vsqrt.f64 d16, d16 @ encoding: [0xe0,0x0b,0xf1,0xee] + vsqrt.f64 d16, d16 + +@ CHECK: vsqrt.f32 s0, s0 @ encoding: [0xc0,0x0a,0xb1,0xee] + vsqrt.f32 s0, s0 + +@ CHECK: vcvt.f64.s32 d16, s0 @ encoding: [0xc0,0x0b,0xf8,0xee] + vcvt.f64.s32 d16, s0 + +@ CHECK: vcvt.f32.s32 s0, s0 @ encoding: [0xc0,0x0a,0xb8,0xee] + vcvt.f32.s32 s0, s0 + +@ CHECK: vcvt.f64.u32 d16, s0 @ encoding: [0x40,0x0b,0xf8,0xee] + vcvt.f64.u32 d16, s0 + +@ CHECK: vcvt.f32.u32 s0, s0 @ encoding: [0x40,0x0a,0xb8,0xee] + vcvt.f32.u32 s0, s0 + +@ CHECK: vcvt.s32.f64 s0, d16 @ encoding: [0xe0,0x0b,0xbd,0xee] + vcvt.s32.f64 s0, d16 + +@ CHECK: vcvt.s32.f32 s0, s0 @ encoding: [0xc0,0x0a,0xbd,0xee] + vcvt.s32.f32 s0, s0 + +@ CHECK: vcvt.u32.f64 s0, d16 @ encoding: [0xe0,0x0b,0xbc,0xee] + vcvt.u32.f64 s0, d16 + +@ CHECK: vcvt.u32.f32 s0, s0 @ encoding: [0xc0,0x0a,0xbc,0xee] + vcvt.u32.f32 s0, s0 + +@ CHECK: vmla.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0x42,0xee] + vmla.f64 d16, d18, d17 + +@ CHECK: vmla.f32 s1, s2, s0 @ encoding: [0x00,0x0a,0x41,0xee] + vmla.f32 s1, s2, s0 + +@ CHECK: vmls.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0x42,0xee] + vmls.f64 d16, d18, d17 + +@ CHECK: vmls.f32 s1, s2, s0 @ encoding: [0x40,0x0a,0x41,0xee] + vmls.f32 s1, s2, s0 + +@ CHECK: vnmla.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0x52,0xee] + vnmla.f64 d16, d18, d17 + +@ CHECK: vnmla.f32 s1, s2, s0 @ encoding: [0x40,0x0a,0x51,0xee] + vnmla.f32 s1, s2, s0 + +@ CHECK: vnmls.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0x52,0xee] + vnmls.f64 d16, d18, d17 + +@ CHECK: vnmls.f32 s1, s2, s0 @ encoding: [0x00,0x0a,0x51,0xee] + vnmls.f32 s1, s2, s0 + +@ FIXME: vmrs apsr_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee] +@ vmrs apsr_nzcv, fpscr + +@ CHECK: vnegne.f64 d16, d16 @ encoding: [0x60,0x0b,0xf1,0x1e] + vnegne.f64 d16, d16 + +@ CHECK: vmovne s0, r0 @ encoding: [0x10,0x0a,0x00,0x1e] +@ CHECK: vmoveq s0, r1 @ encoding: [0x10,0x1a,0x00,0x0e] + vmovne s0, r0 + vmoveq s0, r1 + +@ CHECK: vmrs r0, fpscr @ encoding: [0x10,0x0a,0xf1,0xee] + vmrs r0, fpscr +@ CHECK: vmrs r0, fpexc @ encoding: [0x10,0x0a,0xf8,0xee] + vmrs r0, fpexc +@ CHECK: vmrs r0, fpsid @ encoding: [0x10,0x0a,0xf0,0xee] + vmrs r0, fpsid + +@ CHECK: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee] + vmsr fpscr, r0 +@ CHECK: vmsr fpexc, r0 @ encoding: [0x10,0x0a,0xe8,0xee] + vmsr fpexc, r0 +@ CHECK: vmsr fpsid, r0 @ encoding: [0x10,0x0a,0xe0,0xee] + vmsr fpsid, r0 + +@ FIXME: vmov.f64 d16, #3.000000e+00 @ encoding: [0x08,0x0b,0xf0,0xee] +@ vmov.f64 d16, #3.000000e+00 + +@ FIXME: vmov.f32 s0, #3.000000e+00 @ encoding: [0x08,0x0a,0xb0,0xee] +@ vmov.f32 s0, #3.000000e+00 + +@ CHECK: vmov s0, r0 @ encoding: [0x10,0x0a,0x00,0xee] +@ CHECK: vmov s1, r1 @ encoding: [0x90,0x1a,0x00,0xee] +@ CHECK: vmov s2, r2 @ encoding: [0x10,0x2a,0x01,0xee] +@ CHECK: vmov s3, r3 @ encoding: [0x90,0x3a,0x01,0xee] + vmov s0, r0 + vmov s1, r1 + vmov s2, r2 + vmov s3, r3 + +@ CHECK: vmov r0, s0 @ encoding: [0x10,0x0a,0x10,0xee] +@ CHECK: vmov r1, s1 @ encoding: [0x90,0x1a,0x10,0xee] +@ CHECK: vmov r2, s2 @ encoding: [0x10,0x2a,0x11,0xee] +@ CHECK: vmov r3, s3 @ encoding: [0x90,0x3a,0x11,0xee] + vmov r0, s0 + vmov r1, s1 + vmov r2, s2 + vmov r3, s3 + +@ CHECK: vmov r0, r1, d16 @ encoding: [0x30,0x0b,0x51,0xec] + vmov r0, r1, d16 + +@ CHECK: vldr.64 d17, [r0] @ encoding: [0x00,0x1b,0xd0,0xed] + vldr.64 d17, [r0] + +@ CHECK: vldr.64 d1, [r2, #32] @ encoding: [0x08,0x1b,0x92,0xed] +@ CHECK: vldr.64 d1, [r2, #-32] @ encoding: [0x08,0x1b,0x12,0xed] + vldr.64 d1, [r2, #32] + vldr.64 d1, [r2, #-32] + +@ CHECK: vldr.64 d2, [r3] @ encoding: [0x00,0x2b,0x93,0xed] + vldr.64 d2, [r3] + +@ CHECK: vldr.64 d3, [pc] @ encoding: [0x00,0x3b,0x9f,0xed] +@ CHECK: vldr.64 d3, [pc] @ encoding: [0x00,0x3b,0x9f,0xed] +@ CHECK: vldr.64 d3, [pc] @ encoding: [0x00,0x3b,0x9f,0xed] + vldr.64 d3, [pc] + vldr.64 d3, [pc,#0] + vldr.64 d3, [pc,#-0] + +@ CHECK: vldr.32 s13, [r0] @ encoding: [0x00,0x6a,0xd0,0xed] + vldr.32 s13, [r0] + +@ CHECK: vldr.32 s1, [r2, #32] @ encoding: [0x08,0x0a,0xd2,0xed] +@ CHECK: vldr.32 s1, [r2, #-32] @ encoding: [0x08,0x0a,0x52,0xed] + vldr.32 s1, [r2, #32] + vldr.32 s1, [r2, #-32] + +@ CHECK: vldr.32 s2, [r3] @ encoding: [0x00,0x1a,0x93,0xed] + vldr.32 s2, [r3] + +@ CHECK: vldr.32 s5, [pc] @ encoding: [0x00,0x2a,0xdf,0xed] +@ CHECK: vldr.32 s5, [pc] @ encoding: [0x00,0x2a,0xdf,0xed] +@ CHECK: vldr.32 s5, [pc] @ encoding: [0x00,0x2a,0xdf,0xed] + vldr.32 s5, [pc] + vldr.32 s5, [pc,#0] + vldr.32 s5, [pc,#-0] + +@ CHECK: vstr.64 d4, [r1] @ encoding: [0x00,0x4b,0x81,0xed] +@ CHECK: vstr.64 d4, [r1, #24] @ encoding: [0x06,0x4b,0x81,0xed] +@ CHECK: vstr.64 d4, [r1, #-24] @ encoding: [0x06,0x4b,0x01,0xed] + vstr.64 d4, [r1] + vstr.64 d4, [r1, #24] + vstr.64 d4, [r1, #-24] + +@ CHECK: vstr.32 s4, [r1] @ encoding: [0x00,0x2a,0x81,0xed] +@ CHECK: vstr.32 s4, [r1, #24] @ encoding: [0x06,0x2a,0x81,0xed] +@ CHECK: vstr.32 s4, [r1, #-24] @ encoding: [0x06,0x2a,0x01,0xed] + vstr.32 s4, [r1] + vstr.32 s4, [r1, #24] + vstr.32 s4, [r1, #-24] + +@ CHECK: vldmia r1, {d2, d3, d4, d5, d6, d7} @ encoding: [0x0c,0x2b,0x91,0xec] +@ CHECK: vldmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x91,0xec] + vldmia r1, {d2,d3-d6,d7} + vldmia r1, {s2,s3-s6,s7} + +@ CHECK: vstmia r1, {d2, d3, d4, d5, d6, d7} @ encoding: [0x0c,0x2b,0x81,0xec] +@ CHECK: vstmia r1, {s2, s3, s4, s5, s6, s7} @ encoding: [0x06,0x1a,0x81,0xec] + vstmia r1, {d2,d3-d6,d7} + vstmia r1, {s2,s3-s6,s7} + +@ CHECK: vcvtr.s32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbd,0xee] +@ CHECK: vcvtr.s32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbd,0xee] +@ CHECK: vcvtr.u32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbc,0xee] +@ CHECK: vcvtr.u32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbc,0xee] + vcvtr.s32.f64 s0, d0 + vcvtr.s32.f32 s0, s1 + vcvtr.u32.f64 s0, d0 + vcvtr.u32.f32 s0, s1 diff --git a/test/MC/ARM/thumb.s b/test/MC/ARM/thumb.s new file mode 100644 index 000000000000..342a390d81ac --- /dev/null +++ b/test/MC/ARM/thumb.s @@ -0,0 +1,70 @@ +@ RUN: llvm-mc -triple thumbv6-apple-darwin -show-encoding < %s | FileCheck %s + .code 16 + +@ CHECK: cmp r1, r2 @ encoding: [0x91,0x42] + cmp r1, r2 + +@ CHECK: pop {r1, r2, r4} @ encoding: [0x16,0xbc] + pop {r1, r2, r4} + +@ CHECK: trap @ encoding: [0xfe,0xde] + trap + +@ CHECK: blx r9 @ encoding: [0xc8,0x47] + blx r9 + +@ CHECK: rev r2, r3 @ encoding: [0x1a,0xba] +@ CHECK: rev16 r3, r4 @ encoding: [0x63,0xba] +@ CHECK: revsh r5, r6 @ encoding: [0xf5,0xba] + rev r2, r3 + rev16 r3, r4 + revsh r5, r6 + +@ CHECK: sxtb r2, r3 @ encoding: [0x5a,0xb2] +@ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2] + sxtb r2, r3 + sxth r2, r3 + +@ CHECK: tst r4, r5 @ encoding: [0x2c,0x42] + tst r4, r5 + +@ CHECK: uxtb r3, r6 @ encoding: [0xf3,0xb2] +@ CHECK: uxth r3, r6 @ encoding: [0xb3,0xb2] + uxtb r3, r6 + uxth r3, r6 + +@ CHECK: ldr r3, [r1, r2] @ encoding: [0x8b,0x58] + ldr r3, [r1, r2] + +@ CHECK: bkpt #2 @ encoding: [0x02,0xbe] + bkpt #2 + +@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xee,0x91,0x57] + mcr p7, #1, r5, c1, c1, #4 + +@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e] + mrc p14, #0, r1, c1, c2, #4 + +@ CHECK: mcrr p7, #1, r5, r4, c1 @ encoding: [0x44,0xec,0x11,0x57] + mcrr p7, #1, r5, r4, c1 + +@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57] + mrrc p7, #1, r5, r4, c1 + +@ CHECK: cdp p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xee,0x81,0x17] + cdp p7, #1, c1, c1, c1, #4 + +@ CHECK: nop @ encoding: [0x00,0xbf] + nop + +@ CHECK: yield @ encoding: [0x10,0xbf] + yield + +@ CHECK: wfe @ encoding: [0x20,0xbf] + wfe + +@ CHECK: wfi @ encoding: [0x30,0xbf] + wfi + +@ CHECK: cpsie aif @ encoding: [0x67,0xb6] + cpsie aif diff --git a/test/MC/ARM/thumb2.s b/test/MC/ARM/thumb2.s new file mode 100644 index 000000000000..cd093119e58a --- /dev/null +++ b/test/MC/ARM/thumb2.s @@ -0,0 +1,286 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ XFAIL: * +.code 16 + +@ CHECK: adc r1, r1, #171 @ encoding: [0xab,0x01,0x41,0xf1] + adc r1, r1, #171 +@ CHECK: adc r1, r1, #1179666 @ encoding: [0x12,0x11,0x41,0xf1] + adc r1, r1, #1179666 +@ CHECK: adc r1, r1, #872428544 @ encoding: [0x34,0x21,0x41,0xf1] + adc r1, r1, #872428544 +@ CHECK: adc r1, r1, #1448498774 @ encoding: [0x56,0x31,0x41,0xf1] + adc r1, r1, #1448498774 +@ CHECK: adc r1, r1, #66846720 @ encoding: [0x7f,0x71,0x41,0xf1] + adc r1, r1, #66846720 + +@ CHECK: mvn r0, #187 @ encoding: [0xbb,0x00,0x6f,0xf0] + mvn r0, #187 +@ CHECK: mvn r0, #11141290 @ encoding: [0xaa,0x10,0x6f,0xf0] + mvn r0, #11141290 +@ CHECK: mvn r0, #-872363008 @ encoding: [0xcc,0x20,0x6f,0xf0] + mvn r0, #-872363008 +@ CHECK: mvn r0, #1114112 @ encoding: [0x88,0x10,0x6f,0xf4] + mvn r0, #1114112 + +@ CHECK: cmp.w r0, #11141290 @ encoding: [0xaa,0x1f,0xb0,0xf1] + cmp.w r0, #11141290 +@ CHECK: cmp.w r0, #-872363008 @ encoding: [0xcc,0x2f,0xb0,0xf1] + cmp.w r0, #-872363008 +@ CHECK: cmp.w r0, #-572662307 @ encoding: [0xdd,0x3f,0xb0,0xf1] + cmp.w r0, #-572662307 +@ CHECK: cmp.w r0, #1114112 @ encoding: [0x88,0x1f,0xb0,0xf5] + cmp.w r0, #1114112 +@ CHECK: cmp.w r0, r1, lsl #5 @ encoding: [0x41,0x1f,0xb0,0xeb] + cmp.w r0, r1, lsl #5 + +@ CHECK: sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] + sxtab r0, r1, r0 @ encoding: [0x80,0xf0,0x41,0xfa] + +@ CHECK: movw r0, #65535 @ encoding: [0xff,0x70,0x4f,0xf6] + movw r0, #65535 +@ CHECK: movw r1, #43777 @ encoding: [0x01,0x31,0x4a,0xf6] + movw r1, #43777 +@ CHECK: movt r1, #427 @ encoding: [0xab,0x11,0xc0,0xf2] + movt r1, #427 +@ CHECK: movw r1, #43792 @ encoding: [0x10,0x31,0x4a,0xf6] + movw r1, #43792 +@ CHECK: movt r1, #4267 @ encoding: [0xab,0x01,0xc0,0xf2] + movt r1, #4267 +@ CHECK: mov.w r0, #66846720 @ encoding: [0x7f,0x70,0x4f,0xf0] + mov.w r0, #66846720 + +@ CHECK: rrx r0, r0 @ encoding: [0x30,0x00,0x4f,0xea] + rrx r0, r0 + +@ CHECK: bfc r0, #4, #20 @ encoding: [0x17,0x10,0x6f,0xf3] + bfc r0, #4, #20 +@ CHECK: bfc r0, #0, #23 @ encoding: [0x16,0x00,0x6f,0xf3] + bfc r0, #0, #23 +@ CHECK: bfc r0, #12, #20 @ encoding: [0x1f,0x30,0x6f,0xf3] + bfc r0, #12, #20 + +@ CHECK: sbfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0x40,0xf3] + sbfx r0, r0, #7, #11 +@ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3] + ubfx r0, r0, #7, #11 + +@ CHECK: mla r0, r0, r1, r2 @ encoding: [0x01,0x20,0x00,0xfb] + mla r0, r0, r1, r2 +@ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb] + mls r0, r0, r1, r2 + +@ CHECK: smlabt r0, r1, r2, r0 @ encoding: [0x12,0x00,0x11,0xfb] + smlabt r0, r1, r2, r0 + +@ CHECK: clz r0, r0 @ encoding: [0x80,0xf0,0xb0,0xfa] + clz r0, r0 + +@ CHECK: pkhbt r0, r0, r1, lsl #16 @ encoding: [0x01,0x40,0xc0,0xea] + pkhbt r0, r0, r1, lsl #16 +@ CHECK: pkhbt r0, r0, r1, lsl #12 @ encoding: [0x01,0x30,0xc0,0xea] + pkhbt r0, r0, r1, lsl #16 +@ CHECK: pkhbt r0, r0, r1, lsl #18 @ encoding: [0x81,0x40,0xc0,0xea] + pkhbt r0, r0, r1, lsl #18 +@ CHECK: pkhbt r0, r0, r1 @ encoding: [0x01,0x00,0xc0,0xea] + pkhbt r0, r0, r1 +@ CHECK: pkhtb r0, r0, r1, asr #16 @ encoding: [0x21,0x40,0xc0,0xea] + pkhtb r0, r0, r1, asr #16 +@ CHECK: pkhtb r0, r0, r1, asr #12 @ encoding: [0x21,0x30,0xc0,0xea] + pkhtb r0, r0, r1, asr #12 +@ CHECK: pkhtb r0, r0, r1, asr #18 @ encoding: [0xa1,0x40,0xc0,0xea] + pkhtb r0, r0, r1, asr #18 +@ CHECK: pkhtb r0, r0, r1, asr #22 @ encoding: [0xa1,0x50,0xc0,0xea] + pkhtb r0, r0, r1, asr #22 + +@ CHECK: str.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0xc1,0xf8] + str.w r0, [r1, #4092] +@ CHECK: str r0, [r1, #-128] @ encoding: [0x80,0x0c,0x41,0xf8] + str r0, [r1, #-128] +@ CHECK: str.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x41,0xf8 + str.w r0, [r1, r2, lsl #2] + +@ CHECK: ldr.w r0, [r0, #4092] @ encoding: [0xfc,0x0f,0xd0,0xf8] + ldr.w r0, [r0, #4092] +@ CHECK: ldr r0, [r0, #-128] @ encoding: [0x80,0x0c,0x50,0xf8] + ldr r0, [r0, #-128] +@ CHECK: ldr.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x50,0xf8] + ldr.w r0, [r0, r1, lsl #2] + +@ CHECK: str r1, [r0, #16]! @ encoding: [0x10,0x1f,0x40,0xf8] + str r1, [r0, #16]! +@ CHECK: strh r1, [r0, #8]! @ encoding: [0x08,0x1f,0x20,0xf8] + strh r1, [r0, #8]! +@ CHECK: strh r2, [r0], #-4 @ encoding: [0x04,0x29,0x20,0xf8] + strh r2, [r0], #-4 +@ CHECK: str r2, [r0], #-4 @ encoding: [0x04,0x29,0x40,0xf8] + str r2, [r0], #-4 + +@ CHECK: ldr r2, [r0, #16]! @ encoding: [0x10,0x2f,0x50,0xf8] + ldr r2, [r0, #16]! +@ CHECK: ldr r2, [r0, #-64]! @ encoding: [0x40,0x2d,0x50,0xf8] + ldr r2, [r0, #-64]! +@ CHECK: ldrsb r2, [r0, #4]! @ encoding: [0x04,0x2f,0x10,0xf9] + ldrsb r2, [r0, #4]! + +@ CHECK: strb.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0x81,0xf8] + strb.w r0, [r1, #4092] +@ CHECK: strb r0, [r1, #-128] @ encoding: [0x80,0x0c,0x01,0xf8] + strb r0, [r1, #-128] +@ CHECK: strb.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x01,0xf8] + strb.w r0, [r1, r2, lsl #2] +@ CHECK: strh.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0xa1,0xf8] + strh.w r0, [r1, #4092] +@ CHECK: strh r0, [r1, #-128] @ encoding: [0x80,0x0c,0x21,0xf8] + strh r0, [r1, #-128] +@ CHECK: strh r0, [r1, #-128] @ encoding: [0x80,0x0c,0x21,0xf8] + strh r0, [r1, #-128] +@ CHECK: strh.w r0, [r1, r2, lsl #2] @ encoding: [0x22,0x00,0x21,0xf8] + strh.w r0, [r1, r2, lsl #2] + +@ CHECK: ldrb r0, [r0, #-1] @ encoding: [0x01,0x0c,0x10,0xf8] + ldrb r0, [r0, #-1] +@ CHECK: ldrb r0, [r0, #-128] @ encoding: [0x80,0x0c,0x10,0xf8] + ldrb r0, [r0, #-128] +@ CHECK: ldrb.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x10,0xf8] + ldrb.w r0, [r0, r1, lsl #2] +@ CHECK: ldrh.w r0, [r0, #2046] @ encoding: [0xfe,0x07,0xb0,0xf8] + ldrh.w r0, [r0, #2046] +@ CHECK: ldrh r0, [r0, #-128] @ encoding: [0x80,0x0c,0x30,0xf8] + ldrh r0, [r0, #-128] +@ CHECK: ldrh.w r0, [r0, r1, lsl #2] @ encoding: [0x21,0x00,0x30,0xf8] + ldrh.w r0, [r0, r1, lsl #2] +@ CHECK: ldrsb.w r0, [r0] @ encoding: [0x00,0x00,0x90,0xf9] + ldrsb.w r0, [r0] +@ CHECK: ldrsh.w r0, [r0] @ encoding: [0x00,0x00,0xb0,0xf9] + ldrsh.w r0, [r0] +@ CHECK: bfi r0, r0, #5, #7 @ encoding: [0x60,0xf3,0x4b,0x10] + bfi r0, r0, #5, #7 +@ CHECK: isb @ encoding: [0xbf,0xf3,0x6f,0x8f] + isb +@ CHECK: mrs r0, cpsr @ encoding: [0xef,0xf3,0x00,0x80] + mrs r0, cpsr +@ CHECK: vmrs r0, fpscr @ encoding: [0xf1,0xee,0x10,0x0a] + vmrs r0, fpscr +@ CHECK: vmrs r0, fpexc @ encoding: [0xf8,0xee,0x10,0x0a] + vmrs r0, fpexc +@ CHECK: vmrs r0, fpsid @ encoding: [0xf0,0xee,0x10,0x0a] + vmrs r0, fpsid + +@ CHECK: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] + vmsr fpscr, r0 +@ CHECK: vmsr fpexc, r0 @ encoding: [0xe8,0xee,0x10,0x0a] + vmsr fpexc, r0 +@ CHECK: vmsr fpsid, r0 @ encoding: [0xe0,0xee,0x10,0x0a] + vmsr fpsid, r0 + +@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57] + mcr2 p7, #1, r5, c1, c1, #4 + +@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e] + mrc2 p14, #0, r1, c1, c2, #4 + +@ CHECK: mcrr2 p7, #1, r5, r4, c1 @ encoding: [0x44,0xfc,0x11,0x57] + mcrr2 p7, #1, r5, r4, c1 + +@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57] + mrrc2 p7, #1, r5, r4, c1 + +@ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xfe,0x81,0x17] + cdp2 p7, #1, c1, c1, c1, #4 + +@ CHECK: clrex @ encoding: [0xbf,0xf3,0x2f,0x8f] + clrex + +@ CHECK: clz r9, r0 @ encoding: [0xb0,0xfa,0x80,0xf9] + clz r9, r0 + +@ CHECK: qadd r1, r2, r3 @ encoding: [0x83,0xfa,0x82,0xf1] + qadd r1, r2, r3 + +@ CHECK: qsub r1, r2, r3 @ encoding: [0x83,0xfa,0xa2,0xf1] + qsub r1, r2, r3 + +@ CHECK: qdadd r1, r2, r3 @ encoding: [0x83,0xfa,0x92,0xf1] + qdadd r1, r2, r3 + +@ CHECK: qdsub r1, r2, r3 @ encoding: [0x83,0xfa,0xb2,0xf1] + qdsub r1, r2, r3 + +@ CHECK: nop.w @ encoding: [0xaf,0xf3,0x00,0x80] + nop.w + +@ CHECK: yield.w @ encoding: [0xaf,0xf3,0x01,0x80] + yield.w + +@ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80] + wfe.w + +@ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80] + wfi.w + +@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f] + dmb sy +@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f] + dmb st +@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] + dmb ish +@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f] + dmb ishst +@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f] + dmb nsh +@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f] + dmb nshst +@ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f] + dmb osh +@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f] + dmb oshst + +@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f] + dsb sy +@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f] + dsb st +@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] + dsb ish +@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f] + dsb ishst +@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f] + dsb nsh +@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f] + dsb nshst +@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f] + dsb osh +@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f] + dsb oshst + +@ CHECK: cpsie.w aif @ encoding: [0xaf,0xf3,0xe0,0x84] + cpsie.w aif +@ CHECK: cps #15 @ encoding: [0xaf,0xf3,0x0f,0x81] + cps #15 +@ CHECK: cpsie.w if, #10 @ encoding: [0xaf,0xf3,0x6a,0x85] + cpsie.w if, #10 + +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] + msr apsr, r0 +@ CHECK: msr cpsr_s, r0 @ encoding: [0x80,0xf3,0x00,0x84] + msr apsr_g, r0 +@ CHECK: msr cpsr_f, r0 @ encoding: [0x80,0xf3,0x00,0x88] + msr apsr_nzcvq, r0 +@ CHECK: msr cpsr_fs, r0 @ encoding: [0x80,0xf3,0x00,0x8c] + msr apsr_nzcvqg, r0 +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] + msr cpsr_fc, r0 +@ CHECK: msr cpsr_c, r0 @ encoding: [0x80,0xf3,0x00,0x81] + msr cpsr_c, r0 +@ CHECK: msr cpsr_x, r0 @ encoding: [0x80,0xf3,0x00,0x82] + msr cpsr_x, r0 +@ CHECK: msr cpsr_fc, r0 @ encoding: [0x80,0xf3,0x00,0x89] + msr cpsr_fc, r0 +@ CHECK: msr cpsr_fsx, r0 @ encoding: [0x80,0xf3,0x00,0x8e] + msr cpsr_fsx, r0 +@ CHECK: msr spsr_fc, r0 @ encoding: [0x90,0xf3,0x00,0x89] + msr spsr_fc, r0 +@ CHECK: msr spsr_fsxc, r0 @ encoding: [0x90,0xf3,0x00,0x8f] + msr spsr_fsxc, r0 +@ CHECK: msr cpsr_fsxc, r0 @ encoding: [0x80,0xf3,0x00,0x8f] + msr cpsr_fsxc, r0 + diff --git a/test/MC/ARM/thumb2_instructions.s b/test/MC/ARM/thumb2_instructions.s new file mode 100644 index 000000000000..71cd4aea2f85 --- /dev/null +++ b/test/MC/ARM/thumb2_instructions.s @@ -0,0 +1,12 @@ +@ RUN: llvm-mc -triple thumbv7-unknown-unknown -show-encoding %s > %t +@ RUN: FileCheck < %t %s + + .syntax unified + .text + +@ FIXME: This is not the correct instruction representation, but at least we are +@ parsing the ldr to something. +@ +@ CHECK: ldr r0, [r7, #258] + ldr r0, [r7, #-8] + diff --git a/test/MC/AsmParser/ARM/arm_instructions.s b/test/MC/AsmParser/ARM/arm_instructions.s deleted file mode 100644 index 8632cb0cefd8..000000000000 --- a/test/MC/AsmParser/ARM/arm_instructions.s +++ /dev/null @@ -1,8 +0,0 @@ -@ RUN: llvm-mc -triple arm-unknown-unknown %s | FileCheck %s - -@ CHECK: nop - nop - -@ CHECK: nopeq - nopeq - diff --git a/test/MC/AsmParser/ARM/arm_word_directive.s b/test/MC/AsmParser/ARM/arm_word_directive.s deleted file mode 100644 index 78336913169f..000000000000 --- a/test/MC/AsmParser/ARM/arm_word_directive.s +++ /dev/null @@ -1,6 +0,0 @@ -@ RUN: llvm-mc -triple arm-unknown-unknown %s | FileCheck %s - -@ CHECK: TEST0: -@ CHECK: .long 3 -TEST0: - .word 3 diff --git a/test/MC/AsmParser/ELF/dg.exp b/test/MC/AsmParser/ELF/dg.exp deleted file mode 100644 index ca6aefe9c53d..000000000000 --- a/test/MC/AsmParser/ELF/dg.exp +++ /dev/null @@ -1,6 +0,0 @@ -load_lib llvm.exp - -if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{s}]] -} - diff --git a/test/MC/AsmParser/X86/x86_32-avx-clmul-encoding.s b/test/MC/AsmParser/X86/x86_32-avx-clmul-encoding.s deleted file mode 100644 index 47bf980894d0..000000000000 --- a/test/MC/AsmParser/X86/x86_32-avx-clmul-encoding.s +++ /dev/null @@ -1,42 +0,0 @@ -// RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck %s - -// CHECK: vpclmulqdq $17, %xmm2, %xmm5, %xmm1 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x11] - vpclmulhqhqdq %xmm2, %xmm5, %xmm1 - -// CHECK: vpclmulqdq $17, (%eax), %xmm5, %xmm3 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x11] - vpclmulhqhqdq (%eax), %xmm5, %xmm3 - -// CHECK: vpclmulqdq $1, %xmm2, %xmm5, %xmm1 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x01] - vpclmulhqlqdq %xmm2, %xmm5, %xmm1 - -// CHECK: vpclmulqdq $1, (%eax), %xmm5, %xmm3 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x01] - vpclmulhqlqdq (%eax), %xmm5, %xmm3 - -// CHECK: vpclmulqdq $16, %xmm2, %xmm5, %xmm1 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x10] - vpclmullqhqdq %xmm2, %xmm5, %xmm1 - -// CHECK: vpclmulqdq $16, (%eax), %xmm5, %xmm3 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x10] - vpclmullqhqdq (%eax), %xmm5, %xmm3 - -// CHECK: vpclmulqdq $0, %xmm2, %xmm5, %xmm1 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x00] - vpclmullqlqdq %xmm2, %xmm5, %xmm1 - -// CHECK: vpclmulqdq $0, (%eax), %xmm5, %xmm3 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x00] - vpclmullqlqdq (%eax), %xmm5, %xmm3 - -// CHECK: vpclmulqdq $17, %xmm2, %xmm5, %xmm1 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x11] - vpclmulqdq $17, %xmm2, %xmm5, %xmm1 - -// CHECK: vpclmulqdq $17, (%eax), %xmm5, %xmm3 -// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x11] - vpclmulqdq $17, (%eax), %xmm5, %xmm3 - diff --git a/test/MC/AsmParser/X86/x86_32-bit.s b/test/MC/AsmParser/X86/x86_32-bit.s deleted file mode 100644 index ca0b26bef62a..000000000000 --- a/test/MC/AsmParser/X86/x86_32-bit.s +++ /dev/null @@ -1,1631 +0,0 @@ -// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s -// XFAIL: * - -// CHECK: movb $127, 3735928559(%ebx,%ecx,8) - movb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movw $31438, 3735928559(%ebx,%ecx,8) - movw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movl $2063514302, 3735928559(%ebx,%ecx,8) - movl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movl $324478056, 3735928559(%ebx,%ecx,8) - movl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movsbl 3735928559(%ebx,%ecx,8), %ecx - movsbl 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: movswl 3735928559(%ebx,%ecx,8), %ecx - movswl 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: movzbl 3735928559(%ebx,%ecx,8), %ecx # NOREX - movzbl 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: movzwl 3735928559(%ebx,%ecx,8), %ecx - movzwl 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: pushl 3735928559(%ebx,%ecx,8) - pushl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: popl 3735928559(%ebx,%ecx,8) - popl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: lahf - lahf - -// CHECK: sahf - sahf - -// CHECK: addb $254, 3735928559(%ebx,%ecx,8) - addb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addb $127, 3735928559(%ebx,%ecx,8) - addb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addw $31438, 3735928559(%ebx,%ecx,8) - addw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addl $2063514302, 3735928559(%ebx,%ecx,8) - addl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addl $324478056, 3735928559(%ebx,%ecx,8) - addl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: incl 3735928559(%ebx,%ecx,8) - incl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subb $254, 3735928559(%ebx,%ecx,8) - subb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subb $127, 3735928559(%ebx,%ecx,8) - subb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subw $31438, 3735928559(%ebx,%ecx,8) - subw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subl $2063514302, 3735928559(%ebx,%ecx,8) - subl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subl $324478056, 3735928559(%ebx,%ecx,8) - subl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: decl 3735928559(%ebx,%ecx,8) - decl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sbbw $31438, 3735928559(%ebx,%ecx,8) - sbbw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sbbl $2063514302, 3735928559(%ebx,%ecx,8) - sbbl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sbbl $324478056, 3735928559(%ebx,%ecx,8) - sbbl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpb $254, 3735928559(%ebx,%ecx,8) - cmpb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpb $127, 3735928559(%ebx,%ecx,8) - cmpb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpw $31438, 3735928559(%ebx,%ecx,8) - cmpw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpl $2063514302, 3735928559(%ebx,%ecx,8) - cmpl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpl $324478056, 3735928559(%ebx,%ecx,8) - cmpl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: testb $127, 3735928559(%ebx,%ecx,8) - testb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: testw $31438, 3735928559(%ebx,%ecx,8) - testw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: testl $2063514302, 3735928559(%ebx,%ecx,8) - testl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: testl $324478056, 3735928559(%ebx,%ecx,8) - testl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andb $254, 3735928559(%ebx,%ecx,8) - andb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andb $127, 3735928559(%ebx,%ecx,8) - andb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andw $31438, 3735928559(%ebx,%ecx,8) - andw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andl $2063514302, 3735928559(%ebx,%ecx,8) - andl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andl $324478056, 3735928559(%ebx,%ecx,8) - andl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orb $254, 3735928559(%ebx,%ecx,8) - orb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orb $127, 3735928559(%ebx,%ecx,8) - orb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orw $31438, 3735928559(%ebx,%ecx,8) - orw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orl $2063514302, 3735928559(%ebx,%ecx,8) - orl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orl $324478056, 3735928559(%ebx,%ecx,8) - orl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorb $254, 3735928559(%ebx,%ecx,8) - xorb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorb $127, 3735928559(%ebx,%ecx,8) - xorb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorw $31438, 3735928559(%ebx,%ecx,8) - xorw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorl $2063514302, 3735928559(%ebx,%ecx,8) - xorl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorl $324478056, 3735928559(%ebx,%ecx,8) - xorl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcb $254, 3735928559(%ebx,%ecx,8) - adcb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcb $127, 3735928559(%ebx,%ecx,8) - adcb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcw $31438, 3735928559(%ebx,%ecx,8) - adcw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcl $2063514302, 3735928559(%ebx,%ecx,8) - adcl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcl $324478056, 3735928559(%ebx,%ecx,8) - adcl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: negl 3735928559(%ebx,%ecx,8) - negl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: notl 3735928559(%ebx,%ecx,8) - notl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cbtw - cbtw - -// CHECK: cwtl - cwtl - -// CHECK: cwtd - cwtd - -// CHECK: cltd - cltd - -// CHECK: mull 3735928559(%ebx,%ecx,8) - mull 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: imull 3735928559(%ebx,%ecx,8) - imull 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: divl 3735928559(%ebx,%ecx,8) - divl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: idivl 3735928559(%ebx,%ecx,8) - idivl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: roll $0, 3735928559(%ebx,%ecx,8) - roll $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rolb $127, 3735928559(%ebx,%ecx,8) - rolb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: roll 3735928559(%ebx,%ecx,8) - roll 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rorl $0, 3735928559(%ebx,%ecx,8) - rorl $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rorb $127, 3735928559(%ebx,%ecx,8) - rorb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rorl 3735928559(%ebx,%ecx,8) - rorl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shll $0, 3735928559(%ebx,%ecx,8) - shll $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shlb $127, 3735928559(%ebx,%ecx,8) - shlb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shll 3735928559(%ebx,%ecx,8) - shll 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shrl $0, 3735928559(%ebx,%ecx,8) - shrl $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shrb $127, 3735928559(%ebx,%ecx,8) - shrb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shrl 3735928559(%ebx,%ecx,8) - shrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sarl $0, 3735928559(%ebx,%ecx,8) - sarl $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sarb $127, 3735928559(%ebx,%ecx,8) - sarb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sarl 3735928559(%ebx,%ecx,8) - sarl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: call *%ecx - call *%ecx - -// CHECK: call *3735928559(%ebx,%ecx,8) - call *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: call *3735928559(%ebx,%ecx,8) - call *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: jmp *3735928559(%ebx,%ecx,8) # TAILCALL - jmp *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: jmp *3735928559(%ebx,%ecx,8) # TAILCALL - jmp *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: ljmpl *3735928559(%ebx,%ecx,8) - ljmpl *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: lret - lret - -// CHECK: leave - leave - -// CHECK: seto %bl - seto %bl - -// CHECK: seto 3735928559(%ebx,%ecx,8) - seto 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setno %bl - setno %bl - -// CHECK: setno 3735928559(%ebx,%ecx,8) - setno 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setb %bl - setb %bl - -// CHECK: setb 3735928559(%ebx,%ecx,8) - setb 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setae %bl - setae %bl - -// CHECK: setae 3735928559(%ebx,%ecx,8) - setae 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sete %bl - sete %bl - -// CHECK: sete 3735928559(%ebx,%ecx,8) - sete 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setne %bl - setne %bl - -// CHECK: setne 3735928559(%ebx,%ecx,8) - setne 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setbe %bl - setbe %bl - -// CHECK: setbe 3735928559(%ebx,%ecx,8) - setbe 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: seta %bl - seta %bl - -// CHECK: seta 3735928559(%ebx,%ecx,8) - seta 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sets %bl - sets %bl - -// CHECK: sets 3735928559(%ebx,%ecx,8) - sets 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setns %bl - setns %bl - -// CHECK: setns 3735928559(%ebx,%ecx,8) - setns 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setp %bl - setp %bl - -// CHECK: setp 3735928559(%ebx,%ecx,8) - setp 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setnp %bl - setnp %bl - -// CHECK: setnp 3735928559(%ebx,%ecx,8) - setnp 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setl %bl - setl %bl - -// CHECK: setl 3735928559(%ebx,%ecx,8) - setl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setge %bl - setge %bl - -// CHECK: setge 3735928559(%ebx,%ecx,8) - setge 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setle %bl - setle %bl - -// CHECK: setle 3735928559(%ebx,%ecx,8) - setle 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setg %bl - setg %bl - -// CHECK: setg 3735928559(%ebx,%ecx,8) - setg 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: nopl 3735928559(%ebx,%ecx,8) - nopl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: nop - nop - -// CHECK: fldl 3735928559(%ebx,%ecx,8) - fldl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fildl 3735928559(%ebx,%ecx,8) - fildl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fildll 3735928559(%ebx,%ecx,8) - fildll 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fldt 3735928559(%ebx,%ecx,8) - fldt 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fbld 3735928559(%ebx,%ecx,8) - fbld 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fstl 3735928559(%ebx,%ecx,8) - fstl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fistl 3735928559(%ebx,%ecx,8) - fistl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fstpl 3735928559(%ebx,%ecx,8) - fstpl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fistpl 3735928559(%ebx,%ecx,8) - fistpl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fistpll 3735928559(%ebx,%ecx,8) - fistpll 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fstpt 3735928559(%ebx,%ecx,8) - fstpt 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fbstp 3735928559(%ebx,%ecx,8) - fbstp 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: ficoml 3735928559(%ebx,%ecx,8) - ficoml 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: ficompl 3735928559(%ebx,%ecx,8) - ficompl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fucompp - fucompp - -// CHECK: ftst - ftst - -// CHECK: fld1 - fld1 - -// CHECK: fldz - fldz - -// CHECK: faddl 3735928559(%ebx,%ecx,8) - faddl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fiaddl 3735928559(%ebx,%ecx,8) - fiaddl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fsubl 3735928559(%ebx,%ecx,8) - fsubl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fisubl 3735928559(%ebx,%ecx,8) - fisubl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fsubrl 3735928559(%ebx,%ecx,8) - fsubrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fisubrl 3735928559(%ebx,%ecx,8) - fisubrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fmull 3735928559(%ebx,%ecx,8) - fmull 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fimull 3735928559(%ebx,%ecx,8) - fimull 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fdivl 3735928559(%ebx,%ecx,8) - fdivl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fidivl 3735928559(%ebx,%ecx,8) - fidivl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fdivrl 3735928559(%ebx,%ecx,8) - fdivrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fidivrl 3735928559(%ebx,%ecx,8) - fidivrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fsqrt - fsqrt - -// CHECK: fsin - fsin - -// CHECK: fcos - fcos - -// CHECK: fchs - fchs - -// CHECK: fabs - fabs - -// CHECK: fldcw 3735928559(%ebx,%ecx,8) - fldcw 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fnstcw 3735928559(%ebx,%ecx,8) - fnstcw 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rdtsc - rdtsc - -// CHECK: sysenter - sysenter - -// CHECK: sysexit - sysexit - -// CHECK: ud2 - ud2 - -// CHECK: movnti %ecx, 3735928559(%ebx,%ecx,8) - movnti %ecx,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: clflush 3735928559(%ebx,%ecx,8) - clflush 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: emms - emms - -// CHECK: movd %ecx, %mm3 - movd %ecx,%mm3 - -// CHECK: movd 3735928559(%ebx,%ecx,8), %mm3 - movd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: movd %ecx, %xmm5 - movd %ecx,%xmm5 - -// CHECK: movd 3735928559(%ebx,%ecx,8), %xmm5 - movd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movd %xmm5, %ecx - movd %xmm5,%ecx - -// CHECK: movd %xmm5, 3735928559(%ebx,%ecx,8) - movd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movq 3735928559(%ebx,%ecx,8), %mm3 - movq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: movq %mm3, %mm3 - movq %mm3,%mm3 - -// CHECK: movq %mm3, %mm3 - movq %mm3,%mm3 - -// CHECK: movq %xmm5, %xmm5 - movq %xmm5,%xmm5 - -// CHECK: movq %xmm5, %xmm5 - movq %xmm5,%xmm5 - -// CHECK: packssdw %mm3, %mm3 - packssdw %mm3,%mm3 - -// CHECK: packssdw %xmm5, %xmm5 - packssdw %xmm5,%xmm5 - -// CHECK: packsswb %mm3, %mm3 - packsswb %mm3,%mm3 - -// CHECK: packsswb %xmm5, %xmm5 - packsswb %xmm5,%xmm5 - -// CHECK: packuswb %mm3, %mm3 - packuswb %mm3,%mm3 - -// CHECK: packuswb %xmm5, %xmm5 - packuswb %xmm5,%xmm5 - -// CHECK: paddb %mm3, %mm3 - paddb %mm3,%mm3 - -// CHECK: paddb %xmm5, %xmm5 - paddb %xmm5,%xmm5 - -// CHECK: paddw %mm3, %mm3 - paddw %mm3,%mm3 - -// CHECK: paddw %xmm5, %xmm5 - paddw %xmm5,%xmm5 - -// CHECK: paddd %mm3, %mm3 - paddd %mm3,%mm3 - -// CHECK: paddd %xmm5, %xmm5 - paddd %xmm5,%xmm5 - -// CHECK: paddq %mm3, %mm3 - paddq %mm3,%mm3 - -// CHECK: paddq %xmm5, %xmm5 - paddq %xmm5,%xmm5 - -// CHECK: paddsb %mm3, %mm3 - paddsb %mm3,%mm3 - -// CHECK: paddsb %xmm5, %xmm5 - paddsb %xmm5,%xmm5 - -// CHECK: paddsw %mm3, %mm3 - paddsw %mm3,%mm3 - -// CHECK: paddsw %xmm5, %xmm5 - paddsw %xmm5,%xmm5 - -// CHECK: paddusb %mm3, %mm3 - paddusb %mm3,%mm3 - -// CHECK: paddusb %xmm5, %xmm5 - paddusb %xmm5,%xmm5 - -// CHECK: paddusw %mm3, %mm3 - paddusw %mm3,%mm3 - -// CHECK: paddusw %xmm5, %xmm5 - paddusw %xmm5,%xmm5 - -// CHECK: pand %mm3, %mm3 - pand %mm3,%mm3 - -// CHECK: pand %xmm5, %xmm5 - pand %xmm5,%xmm5 - -// CHECK: pandn %mm3, %mm3 - pandn %mm3,%mm3 - -// CHECK: pandn %xmm5, %xmm5 - pandn %xmm5,%xmm5 - -// CHECK: pcmpeqb %mm3, %mm3 - pcmpeqb %mm3,%mm3 - -// CHECK: pcmpeqb %xmm5, %xmm5 - pcmpeqb %xmm5,%xmm5 - -// CHECK: pcmpeqw %mm3, %mm3 - pcmpeqw %mm3,%mm3 - -// CHECK: pcmpeqw %xmm5, %xmm5 - pcmpeqw %xmm5,%xmm5 - -// CHECK: pcmpeqd %mm3, %mm3 - pcmpeqd %mm3,%mm3 - -// CHECK: pcmpeqd %xmm5, %xmm5 - pcmpeqd %xmm5,%xmm5 - -// CHECK: pcmpgtb %mm3, %mm3 - pcmpgtb %mm3,%mm3 - -// CHECK: pcmpgtb %xmm5, %xmm5 - pcmpgtb %xmm5,%xmm5 - -// CHECK: pcmpgtw %mm3, %mm3 - pcmpgtw %mm3,%mm3 - -// CHECK: pcmpgtw %xmm5, %xmm5 - pcmpgtw %xmm5,%xmm5 - -// CHECK: pcmpgtd %mm3, %mm3 - pcmpgtd %mm3,%mm3 - -// CHECK: pcmpgtd %xmm5, %xmm5 - pcmpgtd %xmm5,%xmm5 - -// CHECK: pmaddwd %mm3, %mm3 - pmaddwd %mm3,%mm3 - -// CHECK: pmaddwd %xmm5, %xmm5 - pmaddwd %xmm5,%xmm5 - -// CHECK: pmulhw %mm3, %mm3 - pmulhw %mm3,%mm3 - -// CHECK: pmulhw %xmm5, %xmm5 - pmulhw %xmm5,%xmm5 - -// CHECK: pmullw %mm3, %mm3 - pmullw %mm3,%mm3 - -// CHECK: pmullw %xmm5, %xmm5 - pmullw %xmm5,%xmm5 - -// CHECK: por %mm3, %mm3 - por %mm3,%mm3 - -// CHECK: por %xmm5, %xmm5 - por %xmm5,%xmm5 - -// CHECK: psllw %mm3, %mm3 - psllw %mm3,%mm3 - -// CHECK: psllw %xmm5, %xmm5 - psllw %xmm5,%xmm5 - -// CHECK: psllw $127, %mm3 - psllw $0x7f,%mm3 - -// CHECK: psllw $127, %xmm5 - psllw $0x7f,%xmm5 - -// CHECK: pslld %mm3, %mm3 - pslld %mm3,%mm3 - -// CHECK: pslld %xmm5, %xmm5 - pslld %xmm5,%xmm5 - -// CHECK: pslld $127, %mm3 - pslld $0x7f,%mm3 - -// CHECK: pslld $127, %xmm5 - pslld $0x7f,%xmm5 - -// CHECK: psllq %mm3, %mm3 - psllq %mm3,%mm3 - -// CHECK: psllq %xmm5, %xmm5 - psllq %xmm5,%xmm5 - -// CHECK: psllq $127, %mm3 - psllq $0x7f,%mm3 - -// CHECK: psllq $127, %xmm5 - psllq $0x7f,%xmm5 - -// CHECK: psraw %mm3, %mm3 - psraw %mm3,%mm3 - -// CHECK: psraw %xmm5, %xmm5 - psraw %xmm5,%xmm5 - -// CHECK: psraw $127, %mm3 - psraw $0x7f,%mm3 - -// CHECK: psraw $127, %xmm5 - psraw $0x7f,%xmm5 - -// CHECK: psrad %mm3, %mm3 - psrad %mm3,%mm3 - -// CHECK: psrad %xmm5, %xmm5 - psrad %xmm5,%xmm5 - -// CHECK: psrad $127, %mm3 - psrad $0x7f,%mm3 - -// CHECK: psrad $127, %xmm5 - psrad $0x7f,%xmm5 - -// CHECK: psrlw %mm3, %mm3 - psrlw %mm3,%mm3 - -// CHECK: psrlw %xmm5, %xmm5 - psrlw %xmm5,%xmm5 - -// CHECK: psrlw $127, %mm3 - psrlw $0x7f,%mm3 - -// CHECK: psrlw $127, %xmm5 - psrlw $0x7f,%xmm5 - -// CHECK: psrld %mm3, %mm3 - psrld %mm3,%mm3 - -// CHECK: psrld %xmm5, %xmm5 - psrld %xmm5,%xmm5 - -// CHECK: psrld $127, %mm3 - psrld $0x7f,%mm3 - -// CHECK: psrld $127, %xmm5 - psrld $0x7f,%xmm5 - -// CHECK: psrlq %mm3, %mm3 - psrlq %mm3,%mm3 - -// CHECK: psrlq %xmm5, %xmm5 - psrlq %xmm5,%xmm5 - -// CHECK: psrlq $127, %mm3 - psrlq $0x7f,%mm3 - -// CHECK: psrlq $127, %xmm5 - psrlq $0x7f,%xmm5 - -// CHECK: psubb %mm3, %mm3 - psubb %mm3,%mm3 - -// CHECK: psubb %xmm5, %xmm5 - psubb %xmm5,%xmm5 - -// CHECK: psubw %mm3, %mm3 - psubw %mm3,%mm3 - -// CHECK: psubw %xmm5, %xmm5 - psubw %xmm5,%xmm5 - -// CHECK: psubd %mm3, %mm3 - psubd %mm3,%mm3 - -// CHECK: psubd %xmm5, %xmm5 - psubd %xmm5,%xmm5 - -// CHECK: psubq %mm3, %mm3 - psubq %mm3,%mm3 - -// CHECK: psubq %xmm5, %xmm5 - psubq %xmm5,%xmm5 - -// CHECK: psubsb %mm3, %mm3 - psubsb %mm3,%mm3 - -// CHECK: psubsb %xmm5, %xmm5 - psubsb %xmm5,%xmm5 - -// CHECK: psubsw %mm3, %mm3 - psubsw %mm3,%mm3 - -// CHECK: psubsw %xmm5, %xmm5 - psubsw %xmm5,%xmm5 - -// CHECK: psubusb %mm3, %mm3 - psubusb %mm3,%mm3 - -// CHECK: psubusb %xmm5, %xmm5 - psubusb %xmm5,%xmm5 - -// CHECK: psubusw %mm3, %mm3 - psubusw %mm3,%mm3 - -// CHECK: psubusw %xmm5, %xmm5 - psubusw %xmm5,%xmm5 - -// CHECK: punpckhbw %mm3, %mm3 - punpckhbw %mm3,%mm3 - -// CHECK: punpckhbw %xmm5, %xmm5 - punpckhbw %xmm5,%xmm5 - -// CHECK: punpckhwd %mm3, %mm3 - punpckhwd %mm3,%mm3 - -// CHECK: punpckhwd %xmm5, %xmm5 - punpckhwd %xmm5,%xmm5 - -// CHECK: punpckhdq %mm3, %mm3 - punpckhdq %mm3,%mm3 - -// CHECK: punpckhdq %xmm5, %xmm5 - punpckhdq %xmm5,%xmm5 - -// CHECK: punpcklbw %mm3, %mm3 - punpcklbw %mm3,%mm3 - -// CHECK: punpcklbw %xmm5, %xmm5 - punpcklbw %xmm5,%xmm5 - -// CHECK: punpcklwd %mm3, %mm3 - punpcklwd %mm3,%mm3 - -// CHECK: punpcklwd %xmm5, %xmm5 - punpcklwd %xmm5,%xmm5 - -// CHECK: punpckldq %mm3, %mm3 - punpckldq %mm3,%mm3 - -// CHECK: punpckldq %xmm5, %xmm5 - punpckldq %xmm5,%xmm5 - -// CHECK: pxor %mm3, %mm3 - pxor %mm3,%mm3 - -// CHECK: pxor %xmm5, %xmm5 - pxor %xmm5,%xmm5 - -// CHECK: addps %xmm5, %xmm5 - addps %xmm5,%xmm5 - -// CHECK: addss %xmm5, %xmm5 - addss %xmm5,%xmm5 - -// CHECK: andnps %xmm5, %xmm5 - andnps %xmm5,%xmm5 - -// CHECK: andps %xmm5, %xmm5 - andps %xmm5,%xmm5 - -// CHECK: cvtpi2ps 3735928559(%ebx,%ecx,8), %xmm5 - cvtpi2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtpi2ps %mm3, %xmm5 - cvtpi2ps %mm3,%xmm5 - -// CHECK: cvtps2pi 3735928559(%ebx,%ecx,8), %mm3 - cvtps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: cvtps2pi %xmm5, %mm3 - cvtps2pi %xmm5,%mm3 - -// CHECK: cvtsi2ss %ecx, %xmm5 - cvtsi2ss %ecx,%xmm5 - -// CHECK: cvtsi2ss 3735928559(%ebx,%ecx,8), %xmm5 - cvtsi2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvttps2pi 3735928559(%ebx,%ecx,8), %mm3 - cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: cvttps2pi %xmm5, %mm3 - cvttps2pi %xmm5,%mm3 - -// CHECK: cvttss2si 3735928559(%ebx,%ecx,8), %ecx - cvttss2si 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: cvttss2si %xmm5, %ecx - cvttss2si %xmm5,%ecx - -// CHECK: divps %xmm5, %xmm5 - divps %xmm5,%xmm5 - -// CHECK: divss %xmm5, %xmm5 - divss %xmm5,%xmm5 - -// CHECK: ldmxcsr 3735928559(%ebx,%ecx,8) - ldmxcsr 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: maskmovq %mm3, %mm3 - maskmovq %mm3,%mm3 - -// CHECK: maxps %xmm5, %xmm5 - maxps %xmm5,%xmm5 - -// CHECK: maxss %xmm5, %xmm5 - maxss %xmm5,%xmm5 - -// CHECK: minps %xmm5, %xmm5 - minps %xmm5,%xmm5 - -// CHECK: minss %xmm5, %xmm5 - minss %xmm5,%xmm5 - -// CHECK: movaps 3735928559(%ebx,%ecx,8), %xmm5 - movaps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movaps %xmm5, %xmm5 - movaps %xmm5,%xmm5 - -// CHECK: movaps %xmm5, 3735928559(%ebx,%ecx,8) - movaps %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movaps %xmm5, %xmm5 - movaps %xmm5,%xmm5 - -// CHECK: movhlps %xmm5, %xmm5 - movhlps %xmm5,%xmm5 - -// CHECK: movhps %xmm5, 3735928559(%ebx,%ecx,8) - movhps %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movlhps %xmm5, %xmm5 - movlhps %xmm5,%xmm5 - -// CHECK: movlps %xmm5, 3735928559(%ebx,%ecx,8) - movlps %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movmskps %xmm5, %ecx - movmskps %xmm5,%ecx - -// CHECK: movntps %xmm5, 3735928559(%ebx,%ecx,8) - movntps %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movntq %mm3, 3735928559(%ebx,%ecx,8) - movntq %mm3,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movntdq %xmm5, 3735928559(%ebx,%ecx,8) - movntdq %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movss 3735928559(%ebx,%ecx,8), %xmm5 - movss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movss %xmm5, %xmm5 - movss %xmm5,%xmm5 - -// CHECK: movss %xmm5, 3735928559(%ebx,%ecx,8) - movss %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movss %xmm5, %xmm5 - movss %xmm5,%xmm5 - -// CHECK: movups 3735928559(%ebx,%ecx,8), %xmm5 - movups 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movups %xmm5, %xmm5 - movups %xmm5,%xmm5 - -// CHECK: movups %xmm5, 3735928559(%ebx,%ecx,8) - movups %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movups %xmm5, %xmm5 - movups %xmm5,%xmm5 - -// CHECK: mulps %xmm5, %xmm5 - mulps %xmm5,%xmm5 - -// CHECK: mulss %xmm5, %xmm5 - mulss %xmm5,%xmm5 - -// CHECK: orps %xmm5, %xmm5 - orps %xmm5,%xmm5 - -// CHECK: pavgb %mm3, %mm3 - pavgb %mm3,%mm3 - -// CHECK: pavgb %xmm5, %xmm5 - pavgb %xmm5,%xmm5 - -// CHECK: pavgw %mm3, %mm3 - pavgw %mm3,%mm3 - -// CHECK: pavgw %xmm5, %xmm5 - pavgw %xmm5,%xmm5 - -// CHECK: pmaxsw %mm3, %mm3 - pmaxsw %mm3,%mm3 - -// CHECK: pmaxsw %xmm5, %xmm5 - pmaxsw %xmm5,%xmm5 - -// CHECK: pmaxub %mm3, %mm3 - pmaxub %mm3,%mm3 - -// CHECK: pmaxub %xmm5, %xmm5 - pmaxub %xmm5,%xmm5 - -// CHECK: pminsw %mm3, %mm3 - pminsw %mm3,%mm3 - -// CHECK: pminsw %xmm5, %xmm5 - pminsw %xmm5,%xmm5 - -// CHECK: pminub %mm3, %mm3 - pminub %mm3,%mm3 - -// CHECK: pminub %xmm5, %xmm5 - pminub %xmm5,%xmm5 - -// CHECK: pmovmskb %mm3, %ecx - pmovmskb %mm3,%ecx - -// CHECK: pmovmskb %xmm5, %ecx - pmovmskb %xmm5,%ecx - -// CHECK: pmulhuw %mm3, %mm3 - pmulhuw %mm3,%mm3 - -// CHECK: pmulhuw %xmm5, %xmm5 - pmulhuw %xmm5,%xmm5 - -// CHECK: prefetchnta 3735928559(%ebx,%ecx,8) - prefetchnta 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: prefetcht0 3735928559(%ebx,%ecx,8) - prefetcht0 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: prefetcht1 3735928559(%ebx,%ecx,8) - prefetcht1 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: prefetcht2 3735928559(%ebx,%ecx,8) - prefetcht2 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: psadbw %mm3, %mm3 - psadbw %mm3,%mm3 - -// CHECK: psadbw %xmm5, %xmm5 - psadbw %xmm5,%xmm5 - -// CHECK: rcpps 3735928559(%ebx,%ecx,8), %xmm5 - rcpps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: rcpps %xmm5, %xmm5 - rcpps %xmm5,%xmm5 - -// CHECK: rcpss 3735928559(%ebx,%ecx,8), %xmm5 - rcpss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: rcpss %xmm5, %xmm5 - rcpss %xmm5,%xmm5 - -// CHECK: rsqrtps 3735928559(%ebx,%ecx,8), %xmm5 - rsqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: rsqrtps %xmm5, %xmm5 - rsqrtps %xmm5,%xmm5 - -// CHECK: rsqrtss 3735928559(%ebx,%ecx,8), %xmm5 - rsqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: rsqrtss %xmm5, %xmm5 - rsqrtss %xmm5,%xmm5 - -// CHECK: sqrtps 3735928559(%ebx,%ecx,8), %xmm5 - sqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: sqrtps %xmm5, %xmm5 - sqrtps %xmm5,%xmm5 - -// CHECK: sqrtss 3735928559(%ebx,%ecx,8), %xmm5 - sqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: sqrtss %xmm5, %xmm5 - sqrtss %xmm5,%xmm5 - -// CHECK: stmxcsr 3735928559(%ebx,%ecx,8) - stmxcsr 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subps %xmm5, %xmm5 - subps %xmm5,%xmm5 - -// CHECK: subss %xmm5, %xmm5 - subss %xmm5,%xmm5 - -// CHECK: ucomiss 3735928559(%ebx,%ecx,8), %xmm5 - ucomiss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: ucomiss %xmm5, %xmm5 - ucomiss %xmm5,%xmm5 - -// CHECK: unpckhps %xmm5, %xmm5 - unpckhps %xmm5,%xmm5 - -// CHECK: unpcklps %xmm5, %xmm5 - unpcklps %xmm5,%xmm5 - -// CHECK: xorps %xmm5, %xmm5 - xorps %xmm5,%xmm5 - -// CHECK: addpd %xmm5, %xmm5 - addpd %xmm5,%xmm5 - -// CHECK: addsd %xmm5, %xmm5 - addsd %xmm5,%xmm5 - -// CHECK: andnpd %xmm5, %xmm5 - andnpd %xmm5,%xmm5 - -// CHECK: andpd %xmm5, %xmm5 - andpd %xmm5,%xmm5 - -// CHECK: comisd 3735928559(%ebx,%ecx,8), %xmm5 - comisd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: comisd %xmm5, %xmm5 - comisd %xmm5,%xmm5 - -// CHECK: cvtpi2pd 3735928559(%ebx,%ecx,8), %xmm5 - cvtpi2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtpi2pd %mm3, %xmm5 - cvtpi2pd %mm3,%xmm5 - -// CHECK: cvtsi2sd %ecx, %xmm5 - cvtsi2sd %ecx,%xmm5 - -// CHECK: cvtsi2sd 3735928559(%ebx,%ecx,8), %xmm5 - cvtsi2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: divpd %xmm5, %xmm5 - divpd %xmm5,%xmm5 - -// CHECK: divsd %xmm5, %xmm5 - divsd %xmm5,%xmm5 - -// CHECK: maxpd %xmm5, %xmm5 - maxpd %xmm5,%xmm5 - -// CHECK: maxsd %xmm5, %xmm5 - maxsd %xmm5,%xmm5 - -// CHECK: minpd %xmm5, %xmm5 - minpd %xmm5,%xmm5 - -// CHECK: minsd %xmm5, %xmm5 - minsd %xmm5,%xmm5 - -// CHECK: movapd 3735928559(%ebx,%ecx,8), %xmm5 - movapd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movapd %xmm5, %xmm5 - movapd %xmm5,%xmm5 - -// CHECK: movapd %xmm5, 3735928559(%ebx,%ecx,8) - movapd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movapd %xmm5, %xmm5 - movapd %xmm5,%xmm5 - -// CHECK: movhpd %xmm5, 3735928559(%ebx,%ecx,8) - movhpd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movlpd %xmm5, 3735928559(%ebx,%ecx,8) - movlpd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movmskpd %xmm5, %ecx - movmskpd %xmm5,%ecx - -// CHECK: movntpd %xmm5, 3735928559(%ebx,%ecx,8) - movntpd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movsd 3735928559(%ebx,%ecx,8), %xmm5 - movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movsd %xmm5, %xmm5 - movsd %xmm5,%xmm5 - -// CHECK: movsd %xmm5, 3735928559(%ebx,%ecx,8) - movsd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movsd %xmm5, %xmm5 - movsd %xmm5,%xmm5 - -// CHECK: movupd 3735928559(%ebx,%ecx,8), %xmm5 - movupd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movupd %xmm5, %xmm5 - movupd %xmm5,%xmm5 - -// CHECK: movupd %xmm5, 3735928559(%ebx,%ecx,8) - movupd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movupd %xmm5, %xmm5 - movupd %xmm5,%xmm5 - -// CHECK: mulpd %xmm5, %xmm5 - mulpd %xmm5,%xmm5 - -// CHECK: mulsd %xmm5, %xmm5 - mulsd %xmm5,%xmm5 - -// CHECK: orpd %xmm5, %xmm5 - orpd %xmm5,%xmm5 - -// CHECK: sqrtpd 3735928559(%ebx,%ecx,8), %xmm5 - sqrtpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: sqrtpd %xmm5, %xmm5 - sqrtpd %xmm5,%xmm5 - -// CHECK: sqrtsd 3735928559(%ebx,%ecx,8), %xmm5 - sqrtsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: sqrtsd %xmm5, %xmm5 - sqrtsd %xmm5,%xmm5 - -// CHECK: subpd %xmm5, %xmm5 - subpd %xmm5,%xmm5 - -// CHECK: subsd %xmm5, %xmm5 - subsd %xmm5,%xmm5 - -// CHECK: ucomisd 3735928559(%ebx,%ecx,8), %xmm5 - ucomisd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: ucomisd %xmm5, %xmm5 - ucomisd %xmm5,%xmm5 - -// CHECK: unpckhpd %xmm5, %xmm5 - unpckhpd %xmm5,%xmm5 - -// CHECK: unpcklpd %xmm5, %xmm5 - unpcklpd %xmm5,%xmm5 - -// CHECK: xorpd %xmm5, %xmm5 - xorpd %xmm5,%xmm5 - -// CHECK: cvtdq2pd 3735928559(%ebx,%ecx,8), %xmm5 - cvtdq2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtdq2pd %xmm5, %xmm5 - cvtdq2pd %xmm5,%xmm5 - -// CHECK: cvtpd2dq 3735928559(%ebx,%ecx,8), %xmm5 - cvtpd2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtpd2dq %xmm5, %xmm5 - cvtpd2dq %xmm5,%xmm5 - -// CHECK: cvtdq2ps 3735928559(%ebx,%ecx,8), %xmm5 - cvtdq2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtdq2ps %xmm5, %xmm5 - cvtdq2ps %xmm5,%xmm5 - -// CHECK: cvtpd2pi 3735928559(%ebx,%ecx,8), %mm3 - cvtpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: cvtpd2pi %xmm5, %mm3 - cvtpd2pi %xmm5,%mm3 - -// CHECK: cvtps2dq 3735928559(%ebx,%ecx,8), %xmm5 - cvtps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtps2dq %xmm5, %xmm5 - cvtps2dq %xmm5,%xmm5 - -// CHECK: cvtsd2ss 3735928559(%ebx,%ecx,8), %xmm5 - cvtsd2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtsd2ss %xmm5, %xmm5 - cvtsd2ss %xmm5,%xmm5 - -// CHECK: cvtss2sd 3735928559(%ebx,%ecx,8), %xmm5 - cvtss2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtss2sd %xmm5, %xmm5 - cvtss2sd %xmm5,%xmm5 - -// CHECK: cvttpd2pi 3735928559(%ebx,%ecx,8), %mm3 - cvttpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: cvttpd2pi %xmm5, %mm3 - cvttpd2pi %xmm5,%mm3 - -// CHECK: cvttsd2si 3735928559(%ebx,%ecx,8), %ecx - cvttsd2si 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: cvttsd2si %xmm5, %ecx - cvttsd2si %xmm5,%ecx - -// CHECK: maskmovdqu %xmm5, %xmm5 - maskmovdqu %xmm5,%xmm5 - -// CHECK: movdqa 3735928559(%ebx,%ecx,8), %xmm5 - movdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movdqa %xmm5, %xmm5 - movdqa %xmm5,%xmm5 - -// CHECK: movdqa %xmm5, 3735928559(%ebx,%ecx,8) - movdqa %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movdqa %xmm5, %xmm5 - movdqa %xmm5,%xmm5 - -// CHECK: movdqu 3735928559(%ebx,%ecx,8), %xmm5 - movdqu 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movdqu %xmm5, 3735928559(%ebx,%ecx,8) - movdqu %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movdq2q %xmm5, %mm3 - movdq2q %xmm5,%mm3 - -// CHECK: movq2dq %mm3, %xmm5 - movq2dq %mm3,%xmm5 - -// CHECK: pmuludq %mm3, %mm3 - pmuludq %mm3,%mm3 - -// CHECK: pmuludq %xmm5, %xmm5 - pmuludq %xmm5,%xmm5 - -// CHECK: pslldq $127, %xmm5 - pslldq $0x7f,%xmm5 - -// CHECK: psrldq $127, %xmm5 - psrldq $0x7f,%xmm5 - -// CHECK: punpckhqdq %xmm5, %xmm5 - punpckhqdq %xmm5,%xmm5 - -// CHECK: punpcklqdq %xmm5, %xmm5 - punpcklqdq %xmm5,%xmm5 - -// CHECK: addsubpd %xmm5, %xmm5 - addsubpd %xmm5,%xmm5 - -// CHECK: addsubps %xmm5, %xmm5 - addsubps %xmm5,%xmm5 - -// CHECK: haddpd %xmm5, %xmm5 - haddpd %xmm5,%xmm5 - -// CHECK: haddps %xmm5, %xmm5 - haddps %xmm5,%xmm5 - -// CHECK: hsubpd %xmm5, %xmm5 - hsubpd %xmm5,%xmm5 - -// CHECK: hsubps %xmm5, %xmm5 - hsubps %xmm5,%xmm5 - -// CHECK: lddqu 3735928559(%ebx,%ecx,8), %xmm5 - lddqu 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movddup 3735928559(%ebx,%ecx,8), %xmm5 - movddup 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movddup %xmm5, %xmm5 - movddup %xmm5,%xmm5 - -// CHECK: movshdup 3735928559(%ebx,%ecx,8), %xmm5 - movshdup 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movshdup %xmm5, %xmm5 - movshdup %xmm5,%xmm5 - -// CHECK: movsldup 3735928559(%ebx,%ecx,8), %xmm5 - movsldup 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movsldup %xmm5, %xmm5 - movsldup %xmm5,%xmm5 - -// CHECK: phaddw %mm3, %mm3 - phaddw %mm3,%mm3 - -// CHECK: phaddw %xmm5, %xmm5 - phaddw %xmm5,%xmm5 - -// CHECK: phaddd %mm3, %mm3 - phaddd %mm3,%mm3 - -// CHECK: phaddd %xmm5, %xmm5 - phaddd %xmm5,%xmm5 - -// CHECK: phaddsw %mm3, %mm3 - phaddsw %mm3,%mm3 - -// CHECK: phaddsw %xmm5, %xmm5 - phaddsw %xmm5,%xmm5 - -// CHECK: phsubw %mm3, %mm3 - phsubw %mm3,%mm3 - -// CHECK: phsubw %xmm5, %xmm5 - phsubw %xmm5,%xmm5 - -// CHECK: phsubd %mm3, %mm3 - phsubd %mm3,%mm3 - -// CHECK: phsubd %xmm5, %xmm5 - phsubd %xmm5,%xmm5 - -// CHECK: phsubsw %mm3, %mm3 - phsubsw %mm3,%mm3 - -// CHECK: phsubsw %xmm5, %xmm5 - phsubsw %xmm5,%xmm5 - -// CHECK: pmaddubsw %mm3, %mm3 - pmaddubsw %mm3,%mm3 - -// CHECK: pmaddubsw %xmm5, %xmm5 - pmaddubsw %xmm5,%xmm5 - -// CHECK: pmulhrsw %mm3, %mm3 - pmulhrsw %mm3,%mm3 - -// CHECK: pmulhrsw %xmm5, %xmm5 - pmulhrsw %xmm5,%xmm5 - -// CHECK: pshufb %mm3, %mm3 - pshufb %mm3,%mm3 - -// CHECK: pshufb %xmm5, %xmm5 - pshufb %xmm5,%xmm5 - -// CHECK: psignb %mm3, %mm3 - psignb %mm3,%mm3 - -// CHECK: psignb %xmm5, %xmm5 - psignb %xmm5,%xmm5 - -// CHECK: psignw %mm3, %mm3 - psignw %mm3,%mm3 - -// CHECK: psignw %xmm5, %xmm5 - psignw %xmm5,%xmm5 - -// CHECK: psignd %mm3, %mm3 - psignd %mm3,%mm3 - -// CHECK: psignd %xmm5, %xmm5 - psignd %xmm5,%xmm5 - -// CHECK: pabsb 3735928559(%ebx,%ecx,8), %mm3 - pabsb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pabsb %mm3, %mm3 - pabsb %mm3,%mm3 - -// CHECK: pabsb 3735928559(%ebx,%ecx,8), %xmm5 - pabsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pabsb %xmm5, %xmm5 - pabsb %xmm5,%xmm5 - -// CHECK: pabsw 3735928559(%ebx,%ecx,8), %mm3 - pabsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pabsw %mm3, %mm3 - pabsw %mm3,%mm3 - -// CHECK: pabsw 3735928559(%ebx,%ecx,8), %xmm5 - pabsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pabsw %xmm5, %xmm5 - pabsw %xmm5,%xmm5 - -// CHECK: pabsd 3735928559(%ebx,%ecx,8), %mm3 - pabsd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pabsd %mm3, %mm3 - pabsd %mm3,%mm3 - -// CHECK: pabsd 3735928559(%ebx,%ecx,8), %xmm5 - pabsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pabsd %xmm5, %xmm5 - pabsd %xmm5,%xmm5 - -// CHECK: femms - femms - -// CHECK: packusdw %xmm5, %xmm5 - packusdw %xmm5,%xmm5 - -// CHECK: pcmpeqq %xmm5, %xmm5 - pcmpeqq %xmm5,%xmm5 - -// CHECK: phminposuw 3735928559(%ebx,%ecx,8), %xmm5 - phminposuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: phminposuw %xmm5, %xmm5 - phminposuw %xmm5,%xmm5 - -// CHECK: pmaxsb %xmm5, %xmm5 - pmaxsb %xmm5,%xmm5 - -// CHECK: pmaxsd %xmm5, %xmm5 - pmaxsd %xmm5,%xmm5 - -// CHECK: pmaxud %xmm5, %xmm5 - pmaxud %xmm5,%xmm5 - -// CHECK: pmaxuw %xmm5, %xmm5 - pmaxuw %xmm5,%xmm5 - -// CHECK: pminsb %xmm5, %xmm5 - pminsb %xmm5,%xmm5 - -// CHECK: pminsd %xmm5, %xmm5 - pminsd %xmm5,%xmm5 - -// CHECK: pminud %xmm5, %xmm5 - pminud %xmm5,%xmm5 - -// CHECK: pminuw %xmm5, %xmm5 - pminuw %xmm5,%xmm5 - -// CHECK: pmovsxbw 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxbw %xmm5, %xmm5 - pmovsxbw %xmm5,%xmm5 - -// CHECK: pmovsxbd 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxbd %xmm5, %xmm5 - pmovsxbd %xmm5,%xmm5 - -// CHECK: pmovsxbq 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxbq %xmm5, %xmm5 - pmovsxbq %xmm5,%xmm5 - -// CHECK: pmovsxwd 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxwd %xmm5, %xmm5 - pmovsxwd %xmm5,%xmm5 - -// CHECK: pmovsxwq 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxwq %xmm5, %xmm5 - pmovsxwq %xmm5,%xmm5 - -// CHECK: pmovsxdq 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxdq %xmm5, %xmm5 - pmovsxdq %xmm5,%xmm5 - -// CHECK: pmovzxbw 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxbw %xmm5, %xmm5 - pmovzxbw %xmm5,%xmm5 - -// CHECK: pmovzxbd 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxbd %xmm5, %xmm5 - pmovzxbd %xmm5,%xmm5 - -// CHECK: pmovzxbq 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxbq %xmm5, %xmm5 - pmovzxbq %xmm5,%xmm5 - -// CHECK: pmovzxwd 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxwd %xmm5, %xmm5 - pmovzxwd %xmm5,%xmm5 - -// CHECK: pmovzxwq 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxwq %xmm5, %xmm5 - pmovzxwq %xmm5,%xmm5 - -// CHECK: pmovzxdq 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxdq %xmm5, %xmm5 - pmovzxdq %xmm5,%xmm5 - -// CHECK: pmuldq %xmm5, %xmm5 - pmuldq %xmm5,%xmm5 - -// CHECK: pmulld %xmm5, %xmm5 - pmulld %xmm5,%xmm5 - -// CHECK: ptest 3735928559(%ebx,%ecx,8), %xmm5 - ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: ptest %xmm5, %xmm5 - ptest %xmm5,%xmm5 - -// CHECK: pcmpgtq %xmm5, %xmm5 - pcmpgtq %xmm5,%xmm5 diff --git a/test/MC/AsmParser/X86/x86_32-bit_cat.s b/test/MC/AsmParser/X86/x86_32-bit_cat.s deleted file mode 100644 index 9002c604887b..000000000000 --- a/test/MC/AsmParser/X86/x86_32-bit_cat.s +++ /dev/null @@ -1,7862 +0,0 @@ -// This is the current set of tests that can pass though llvm-mc as it were a -// logical cat(1) and then reassemble to the same instruction. All of these -// will not yet encode correctly. The subset that will encode correctly are in -// the file x86_32-encoding.s (and other tests that encode are in x86_32-bit.s). - -// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s -// XFAIL: * - - -// CHECK: movb $127, 3735928559(%ebx,%ecx,8) - movb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movb $127, 69 - movb $0x7f,0x45 - -// CHECK: movb $127, 32493 - movb $0x7f,0x7eed - -// CHECK: movb $127, 3133065982 - movb $0x7f,0xbabecafe - -// CHECK: movb $127, 305419896 - movb $0x7f,0x12345678 - -// CHECK: movw $31438, 3735928559(%ebx,%ecx,8) - movw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movw $31438, 69 - movw $0x7ace,0x45 - -// CHECK: movw $31438, 32493 - movw $0x7ace,0x7eed - -// CHECK: movw $31438, 3133065982 - movw $0x7ace,0xbabecafe - -// CHECK: movw $31438, 305419896 - movw $0x7ace,0x12345678 - -// CHECK: movl $2063514302, 3735928559(%ebx,%ecx,8) - movl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movl $2063514302, 69 - movl $0x7afebabe,0x45 - -// CHECK: movl $2063514302, 32493 - movl $0x7afebabe,0x7eed - -// CHECK: movl $2063514302, 3133065982 - movl $0x7afebabe,0xbabecafe - -// CHECK: movl $2063514302, 305419896 - movl $0x7afebabe,0x12345678 - -// CHECK: movl $324478056, 3735928559(%ebx,%ecx,8) - movl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movl $324478056, 69 - movl $0x13572468,0x45 - -// CHECK: movl $324478056, 32493 - movl $0x13572468,0x7eed - -// CHECK: movl $324478056, 3133065982 - movl $0x13572468,0xbabecafe - -// CHECK: movl $324478056, 305419896 - movl $0x13572468,0x12345678 - -// CHECK: movsbl 3735928559(%ebx,%ecx,8), %ecx - movsbl 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: movsbl 69, %ecx - movsbl 0x45,%ecx - -// CHECK: movsbl 32493, %ecx - movsbl 0x7eed,%ecx - -// CHECK: movsbl 3133065982, %ecx - movsbl 0xbabecafe,%ecx - -// CHECK: movsbl 305419896, %ecx - movsbl 0x12345678,%ecx - -// CHECK: movsbw 3735928559(%ebx,%ecx,8), %bx - movsbw 0xdeadbeef(%ebx,%ecx,8),%bx - -// CHECK: movsbw 69, %bx - movsbw 0x45,%bx - -// CHECK: movsbw 32493, %bx - movsbw 0x7eed,%bx - -// CHECK: movsbw 3133065982, %bx - movsbw 0xbabecafe,%bx - -// CHECK: movsbw 305419896, %bx - movsbw 0x12345678,%bx - -// CHECK: movswl 3735928559(%ebx,%ecx,8), %ecx - movswl 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: movswl 69, %ecx - movswl 0x45,%ecx - -// CHECK: movswl 32493, %ecx - movswl 0x7eed,%ecx - -// CHECK: movswl 3133065982, %ecx - movswl 0xbabecafe,%ecx - -// CHECK: movswl 305419896, %ecx - movswl 0x12345678,%ecx - -// CHECK: movzbl 3735928559(%ebx,%ecx,8), %ecx # NOREX - movzbl 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: movzbl 69, %ecx # NOREX - movzbl 0x45,%ecx - -// CHECK: movzbl 32493, %ecx # NOREX - movzbl 0x7eed,%ecx - -// CHECK: movzbl 3133065982, %ecx # NOREX - movzbl 0xbabecafe,%ecx - -// CHECK: movzbl 305419896, %ecx # NOREX - movzbl 0x12345678,%ecx - -// CHECK: movzbw 3735928559(%ebx,%ecx,8), %bx - movzbw 0xdeadbeef(%ebx,%ecx,8),%bx - -// CHECK: movzbw 69, %bx - movzbw 0x45,%bx - -// CHECK: movzbw 32493, %bx - movzbw 0x7eed,%bx - -// CHECK: movzbw 3133065982, %bx - movzbw 0xbabecafe,%bx - -// CHECK: movzbw 305419896, %bx - movzbw 0x12345678,%bx - -// CHECK: movzwl 3735928559(%ebx,%ecx,8), %ecx - movzwl 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: movzwl 69, %ecx - movzwl 0x45,%ecx - -// CHECK: movzwl 32493, %ecx - movzwl 0x7eed,%ecx - -// CHECK: movzwl 3133065982, %ecx - movzwl 0xbabecafe,%ecx - -// CHECK: movzwl 305419896, %ecx - movzwl 0x12345678,%ecx - -// CHECK: pushw 32493 - pushw 0x7eed - -// CHECK: popw 32493 - popw 0x7eed - -// CHECK: pushf - pushfl - -// CHECK: pushfl - pushfl - -// CHECK: popf - popfl - -// CHECK: popfl - popfl - -// CHECK: clc - clc - -// CHECK: cld - cld - -// CHECK: cli - cli - -// CHECK: clts - clts - -// CHECK: cmc - cmc - -// CHECK: lahf - lahf - -// CHECK: sahf - sahf - -// CHECK: stc - stc - -// CHECK: std - std - -// CHECK: sti - sti - -// CHECK: addb $254, 3735928559(%ebx,%ecx,8) - addb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addb $254, 69 - addb $0xfe,0x45 - -// CHECK: addb $254, 32493 - addb $0xfe,0x7eed - -// CHECK: addb $254, 3133065982 - addb $0xfe,0xbabecafe - -// CHECK: addb $254, 305419896 - addb $0xfe,0x12345678 - -// CHECK: addb $127, 3735928559(%ebx,%ecx,8) - addb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addb $127, 69 - addb $0x7f,0x45 - -// CHECK: addb $127, 32493 - addb $0x7f,0x7eed - -// CHECK: addb $127, 3133065982 - addb $0x7f,0xbabecafe - -// CHECK: addb $127, 305419896 - addb $0x7f,0x12345678 - -// CHECK: addw $31438, 3735928559(%ebx,%ecx,8) - addw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addw $31438, 69 - addw $0x7ace,0x45 - -// CHECK: addw $31438, 32493 - addw $0x7ace,0x7eed - -// CHECK: addw $31438, 3133065982 - addw $0x7ace,0xbabecafe - -// CHECK: addw $31438, 305419896 - addw $0x7ace,0x12345678 - -// CHECK: addl $2063514302, 3735928559(%ebx,%ecx,8) - addl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addl $2063514302, 69 - addl $0x7afebabe,0x45 - -// CHECK: addl $2063514302, 32493 - addl $0x7afebabe,0x7eed - -// CHECK: addl $2063514302, 3133065982 - addl $0x7afebabe,0xbabecafe - -// CHECK: addl $2063514302, 305419896 - addl $0x7afebabe,0x12345678 - -// CHECK: addl $324478056, 3735928559(%ebx,%ecx,8) - addl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: addl $324478056, 69 - addl $0x13572468,0x45 - -// CHECK: addl $324478056, 32493 - addl $0x13572468,0x7eed - -// CHECK: addl $324478056, 3133065982 - addl $0x13572468,0xbabecafe - -// CHECK: addl $324478056, 305419896 - addl $0x13572468,0x12345678 - -// CHECK: incl 3735928559(%ebx,%ecx,8) - incl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: incw 32493 - incw 0x7eed - -// CHECK: incl 3133065982 - incl 0xbabecafe - -// CHECK: incl 305419896 - incl 0x12345678 - -// CHECK: subb $254, 3735928559(%ebx,%ecx,8) - subb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subb $254, 69 - subb $0xfe,0x45 - -// CHECK: subb $254, 32493 - subb $0xfe,0x7eed - -// CHECK: subb $254, 3133065982 - subb $0xfe,0xbabecafe - -// CHECK: subb $254, 305419896 - subb $0xfe,0x12345678 - -// CHECK: subb $127, 3735928559(%ebx,%ecx,8) - subb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subb $127, 69 - subb $0x7f,0x45 - -// CHECK: subb $127, 32493 - subb $0x7f,0x7eed - -// CHECK: subb $127, 3133065982 - subb $0x7f,0xbabecafe - -// CHECK: subb $127, 305419896 - subb $0x7f,0x12345678 - -// CHECK: subw $31438, 3735928559(%ebx,%ecx,8) - subw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subw $31438, 69 - subw $0x7ace,0x45 - -// CHECK: subw $31438, 32493 - subw $0x7ace,0x7eed - -// CHECK: subw $31438, 3133065982 - subw $0x7ace,0xbabecafe - -// CHECK: subw $31438, 305419896 - subw $0x7ace,0x12345678 - -// CHECK: subl $2063514302, 3735928559(%ebx,%ecx,8) - subl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subl $2063514302, 69 - subl $0x7afebabe,0x45 - -// CHECK: subl $2063514302, 32493 - subl $0x7afebabe,0x7eed - -// CHECK: subl $2063514302, 3133065982 - subl $0x7afebabe,0xbabecafe - -// CHECK: subl $2063514302, 305419896 - subl $0x7afebabe,0x12345678 - -// CHECK: subl $324478056, 3735928559(%ebx,%ecx,8) - subl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: subl $324478056, 69 - subl $0x13572468,0x45 - -// CHECK: subl $324478056, 32493 - subl $0x13572468,0x7eed - -// CHECK: subl $324478056, 3133065982 - subl $0x13572468,0xbabecafe - -// CHECK: subl $324478056, 305419896 - subl $0x13572468,0x12345678 - -// CHECK: decl 3735928559(%ebx,%ecx,8) - decl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: decw 32493 - decw 0x7eed - -// CHECK: decl 3133065982 - decl 0xbabecafe - -// CHECK: decl 305419896 - decl 0x12345678 - -// CHECK: sbbb $254, 3735928559(%ebx,%ecx,8) - sbbb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sbbb $254, 69 - sbbb $0xfe,0x45 - -// CHECK: sbbb $254, 32493 - sbbb $0xfe,0x7eed - -// CHECK: sbbb $254, 3133065982 - sbbb $0xfe,0xbabecafe - -// CHECK: sbbb $254, 305419896 - sbbb $0xfe,0x12345678 - -// CHECK: sbbb $127, 3735928559(%ebx,%ecx,8) - sbbb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sbbb $127, 69 - sbbb $0x7f,0x45 - -// CHECK: sbbb $127, 32493 - sbbb $0x7f,0x7eed - -// CHECK: sbbb $127, 3133065982 - sbbb $0x7f,0xbabecafe - -// CHECK: sbbb $127, 305419896 - sbbb $0x7f,0x12345678 - -// CHECK: sbbw $31438, 3735928559(%ebx,%ecx,8) - sbbw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sbbw $31438, 69 - sbbw $0x7ace,0x45 - -// CHECK: sbbw $31438, 32493 - sbbw $0x7ace,0x7eed - -// CHECK: sbbw $31438, 3133065982 - sbbw $0x7ace,0xbabecafe - -// CHECK: sbbw $31438, 305419896 - sbbw $0x7ace,0x12345678 - -// CHECK: sbbl $2063514302, 3735928559(%ebx,%ecx,8) - sbbl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sbbl $2063514302, 69 - sbbl $0x7afebabe,0x45 - -// CHECK: sbbl $2063514302, 32493 - sbbl $0x7afebabe,0x7eed - -// CHECK: sbbl $2063514302, 3133065982 - sbbl $0x7afebabe,0xbabecafe - -// CHECK: sbbl $2063514302, 305419896 - sbbl $0x7afebabe,0x12345678 - -// CHECK: sbbl $324478056, 3735928559(%ebx,%ecx,8) - sbbl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sbbl $324478056, 69 - sbbl $0x13572468,0x45 - -// CHECK: sbbl $324478056, 32493 - sbbl $0x13572468,0x7eed - -// CHECK: sbbl $324478056, 3133065982 - sbbl $0x13572468,0xbabecafe - -// CHECK: sbbl $324478056, 305419896 - sbbl $0x13572468,0x12345678 - -// CHECK: cmpb $254, 3735928559(%ebx,%ecx,8) - cmpb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpb $254, 69 - cmpb $0xfe,0x45 - -// CHECK: cmpb $254, 32493 - cmpb $0xfe,0x7eed - -// CHECK: cmpb $254, 3133065982 - cmpb $0xfe,0xbabecafe - -// CHECK: cmpb $254, 305419896 - cmpb $0xfe,0x12345678 - -// CHECK: cmpb $127, 3735928559(%ebx,%ecx,8) - cmpb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpb $127, 69 - cmpb $0x7f,0x45 - -// CHECK: cmpb $127, 32493 - cmpb $0x7f,0x7eed - -// CHECK: cmpb $127, 3133065982 - cmpb $0x7f,0xbabecafe - -// CHECK: cmpb $127, 305419896 - cmpb $0x7f,0x12345678 - -// CHECK: cmpw $31438, 3735928559(%ebx,%ecx,8) - cmpw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpw $31438, 69 - cmpw $0x7ace,0x45 - -// CHECK: cmpw $31438, 32493 - cmpw $0x7ace,0x7eed - -// CHECK: cmpw $31438, 3133065982 - cmpw $0x7ace,0xbabecafe - -// CHECK: cmpw $31438, 305419896 - cmpw $0x7ace,0x12345678 - -// CHECK: cmpl $2063514302, 3735928559(%ebx,%ecx,8) - cmpl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpl $2063514302, 69 - cmpl $0x7afebabe,0x45 - -// CHECK: cmpl $2063514302, 32493 - cmpl $0x7afebabe,0x7eed - -// CHECK: cmpl $2063514302, 3133065982 - cmpl $0x7afebabe,0xbabecafe - -// CHECK: cmpl $2063514302, 305419896 - cmpl $0x7afebabe,0x12345678 - -// CHECK: cmpl $324478056, 3735928559(%ebx,%ecx,8) - cmpl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpl $324478056, 69 - cmpl $0x13572468,0x45 - -// CHECK: cmpl $324478056, 32493 - cmpl $0x13572468,0x7eed - -// CHECK: cmpl $324478056, 3133065982 - cmpl $0x13572468,0xbabecafe - -// CHECK: cmpl $324478056, 305419896 - cmpl $0x13572468,0x12345678 - -// CHECK: testb $127, 3735928559(%ebx,%ecx,8) - testb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: testb $127, 69 - testb $0x7f,0x45 - -// CHECK: testb $127, 32493 - testb $0x7f,0x7eed - -// CHECK: testb $127, 3133065982 - testb $0x7f,0xbabecafe - -// CHECK: testb $127, 305419896 - testb $0x7f,0x12345678 - -// CHECK: testw $31438, 3735928559(%ebx,%ecx,8) - testw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: testw $31438, 69 - testw $0x7ace,0x45 - -// CHECK: testw $31438, 32493 - testw $0x7ace,0x7eed - -// CHECK: testw $31438, 3133065982 - testw $0x7ace,0xbabecafe - -// CHECK: testw $31438, 305419896 - testw $0x7ace,0x12345678 - -// CHECK: testl $2063514302, 3735928559(%ebx,%ecx,8) - testl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: testl $2063514302, 69 - testl $0x7afebabe,0x45 - -// CHECK: testl $2063514302, 32493 - testl $0x7afebabe,0x7eed - -// CHECK: testl $2063514302, 3133065982 - testl $0x7afebabe,0xbabecafe - -// CHECK: testl $2063514302, 305419896 - testl $0x7afebabe,0x12345678 - -// CHECK: testl $324478056, 3735928559(%ebx,%ecx,8) - testl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: testl $324478056, 69 - testl $0x13572468,0x45 - -// CHECK: testl $324478056, 32493 - testl $0x13572468,0x7eed - -// CHECK: testl $324478056, 3133065982 - testl $0x13572468,0xbabecafe - -// CHECK: testl $324478056, 305419896 - testl $0x13572468,0x12345678 - -// CHECK: andb $254, 3735928559(%ebx,%ecx,8) - andb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andb $254, 69 - andb $0xfe,0x45 - -// CHECK: andb $254, 32493 - andb $0xfe,0x7eed - -// CHECK: andb $254, 3133065982 - andb $0xfe,0xbabecafe - -// CHECK: andb $254, 305419896 - andb $0xfe,0x12345678 - -// CHECK: andb $127, 3735928559(%ebx,%ecx,8) - andb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andb $127, 69 - andb $0x7f,0x45 - -// CHECK: andb $127, 32493 - andb $0x7f,0x7eed - -// CHECK: andb $127, 3133065982 - andb $0x7f,0xbabecafe - -// CHECK: andb $127, 305419896 - andb $0x7f,0x12345678 - -// CHECK: andw $31438, 3735928559(%ebx,%ecx,8) - andw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andw $31438, 69 - andw $0x7ace,0x45 - -// CHECK: andw $31438, 32493 - andw $0x7ace,0x7eed - -// CHECK: andw $31438, 3133065982 - andw $0x7ace,0xbabecafe - -// CHECK: andw $31438, 305419896 - andw $0x7ace,0x12345678 - -// CHECK: andl $2063514302, 3735928559(%ebx,%ecx,8) - andl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andl $2063514302, 69 - andl $0x7afebabe,0x45 - -// CHECK: andl $2063514302, 32493 - andl $0x7afebabe,0x7eed - -// CHECK: andl $2063514302, 3133065982 - andl $0x7afebabe,0xbabecafe - -// CHECK: andl $2063514302, 305419896 - andl $0x7afebabe,0x12345678 - -// CHECK: andl $324478056, 3735928559(%ebx,%ecx,8) - andl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: andl $324478056, 69 - andl $0x13572468,0x45 - -// CHECK: andl $324478056, 32493 - andl $0x13572468,0x7eed - -// CHECK: andl $324478056, 3133065982 - andl $0x13572468,0xbabecafe - -// CHECK: andl $324478056, 305419896 - andl $0x13572468,0x12345678 - -// CHECK: orb $254, 3735928559(%ebx,%ecx,8) - orb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orb $254, 69 - orb $0xfe,0x45 - -// CHECK: orb $254, 32493 - orb $0xfe,0x7eed - -// CHECK: orb $254, 3133065982 - orb $0xfe,0xbabecafe - -// CHECK: orb $254, 305419896 - orb $0xfe,0x12345678 - -// CHECK: orb $127, 3735928559(%ebx,%ecx,8) - orb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orb $127, 69 - orb $0x7f,0x45 - -// CHECK: orb $127, 32493 - orb $0x7f,0x7eed - -// CHECK: orb $127, 3133065982 - orb $0x7f,0xbabecafe - -// CHECK: orb $127, 305419896 - orb $0x7f,0x12345678 - -// CHECK: orw $31438, 3735928559(%ebx,%ecx,8) - orw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orw $31438, 69 - orw $0x7ace,0x45 - -// CHECK: orw $31438, 32493 - orw $0x7ace,0x7eed - -// CHECK: orw $31438, 3133065982 - orw $0x7ace,0xbabecafe - -// CHECK: orw $31438, 305419896 - orw $0x7ace,0x12345678 - -// CHECK: orl $2063514302, 3735928559(%ebx,%ecx,8) - orl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orl $2063514302, 69 - orl $0x7afebabe,0x45 - -// CHECK: orl $2063514302, 32493 - orl $0x7afebabe,0x7eed - -// CHECK: orl $2063514302, 3133065982 - orl $0x7afebabe,0xbabecafe - -// CHECK: orl $2063514302, 305419896 - orl $0x7afebabe,0x12345678 - -// CHECK: orl $324478056, 3735928559(%ebx,%ecx,8) - orl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: orl $324478056, 69 - orl $0x13572468,0x45 - -// CHECK: orl $324478056, 32493 - orl $0x13572468,0x7eed - -// CHECK: orl $324478056, 3133065982 - orl $0x13572468,0xbabecafe - -// CHECK: orl $324478056, 305419896 - orl $0x13572468,0x12345678 - -// CHECK: xorb $254, 3735928559(%ebx,%ecx,8) - xorb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorb $254, 69 - xorb $0xfe,0x45 - -// CHECK: xorb $254, 32493 - xorb $0xfe,0x7eed - -// CHECK: xorb $254, 3133065982 - xorb $0xfe,0xbabecafe - -// CHECK: xorb $254, 305419896 - xorb $0xfe,0x12345678 - -// CHECK: xorb $127, 3735928559(%ebx,%ecx,8) - xorb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorb $127, 69 - xorb $0x7f,0x45 - -// CHECK: xorb $127, 32493 - xorb $0x7f,0x7eed - -// CHECK: xorb $127, 3133065982 - xorb $0x7f,0xbabecafe - -// CHECK: xorb $127, 305419896 - xorb $0x7f,0x12345678 - -// CHECK: xorw $31438, 3735928559(%ebx,%ecx,8) - xorw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorw $31438, 69 - xorw $0x7ace,0x45 - -// CHECK: xorw $31438, 32493 - xorw $0x7ace,0x7eed - -// CHECK: xorw $31438, 3133065982 - xorw $0x7ace,0xbabecafe - -// CHECK: xorw $31438, 305419896 - xorw $0x7ace,0x12345678 - -// CHECK: xorl $2063514302, 3735928559(%ebx,%ecx,8) - xorl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorl $2063514302, 69 - xorl $0x7afebabe,0x45 - -// CHECK: xorl $2063514302, 32493 - xorl $0x7afebabe,0x7eed - -// CHECK: xorl $2063514302, 3133065982 - xorl $0x7afebabe,0xbabecafe - -// CHECK: xorl $2063514302, 305419896 - xorl $0x7afebabe,0x12345678 - -// CHECK: xorl $324478056, 3735928559(%ebx,%ecx,8) - xorl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: xorl $324478056, 69 - xorl $0x13572468,0x45 - -// CHECK: xorl $324478056, 32493 - xorl $0x13572468,0x7eed - -// CHECK: xorl $324478056, 3133065982 - xorl $0x13572468,0xbabecafe - -// CHECK: xorl $324478056, 305419896 - xorl $0x13572468,0x12345678 - -// CHECK: adcb $254, 3735928559(%ebx,%ecx,8) - adcb $0xfe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcb $254, 69 - adcb $0xfe,0x45 - -// CHECK: adcb $254, 32493 - adcb $0xfe,0x7eed - -// CHECK: adcb $254, 3133065982 - adcb $0xfe,0xbabecafe - -// CHECK: adcb $254, 305419896 - adcb $0xfe,0x12345678 - -// CHECK: adcb $127, 3735928559(%ebx,%ecx,8) - adcb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcb $127, 69 - adcb $0x7f,0x45 - -// CHECK: adcb $127, 32493 - adcb $0x7f,0x7eed - -// CHECK: adcb $127, 3133065982 - adcb $0x7f,0xbabecafe - -// CHECK: adcb $127, 305419896 - adcb $0x7f,0x12345678 - -// CHECK: adcw $31438, 3735928559(%ebx,%ecx,8) - adcw $0x7ace,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcw $31438, 69 - adcw $0x7ace,0x45 - -// CHECK: adcw $31438, 32493 - adcw $0x7ace,0x7eed - -// CHECK: adcw $31438, 3133065982 - adcw $0x7ace,0xbabecafe - -// CHECK: adcw $31438, 305419896 - adcw $0x7ace,0x12345678 - -// CHECK: adcl $2063514302, 3735928559(%ebx,%ecx,8) - adcl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcl $2063514302, 69 - adcl $0x7afebabe,0x45 - -// CHECK: adcl $2063514302, 32493 - adcl $0x7afebabe,0x7eed - -// CHECK: adcl $2063514302, 3133065982 - adcl $0x7afebabe,0xbabecafe - -// CHECK: adcl $2063514302, 305419896 - adcl $0x7afebabe,0x12345678 - -// CHECK: adcl $324478056, 3735928559(%ebx,%ecx,8) - adcl $0x13572468,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: adcl $324478056, 69 - adcl $0x13572468,0x45 - -// CHECK: adcl $324478056, 32493 - adcl $0x13572468,0x7eed - -// CHECK: adcl $324478056, 3133065982 - adcl $0x13572468,0xbabecafe - -// CHECK: adcl $324478056, 305419896 - adcl $0x13572468,0x12345678 - -// CHECK: negl 3735928559(%ebx,%ecx,8) - negl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: negw 32493 - negw 0x7eed - -// CHECK: negl 3133065982 - negl 0xbabecafe - -// CHECK: negl 305419896 - negl 0x12345678 - -// CHECK: notl 3735928559(%ebx,%ecx,8) - notl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: notw 32493 - notw 0x7eed - -// CHECK: notl 3133065982 - notl 0xbabecafe - -// CHECK: notl 305419896 - notl 0x12345678 - -// CHECK: cbtw - cbtw - -// CHECK: cwtl - cwtl - -// CHECK: cwtd - cwtd - -// CHECK: cltd - cltd - -// CHECK: mull 3735928559(%ebx,%ecx,8) - mull 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: mulw 32493 - mulw 0x7eed - -// CHECK: mull 3133065982 - mull 0xbabecafe - -// CHECK: mull 305419896 - mull 0x12345678 - -// CHECK: imull 3735928559(%ebx,%ecx,8) - imull 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: imulw 32493 - imulw 0x7eed - -// CHECK: imull 3133065982 - imull 0xbabecafe - -// CHECK: imull 305419896 - imull 0x12345678 - -// CHECK: divl 3735928559(%ebx,%ecx,8) - divl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: divw 32493 - divw 0x7eed - -// CHECK: divl 3133065982 - divl 0xbabecafe - -// CHECK: divl 305419896 - divl 0x12345678 - -// CHECK: idivl 3735928559(%ebx,%ecx,8) - idivl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: idivw 32493 - idivw 0x7eed - -// CHECK: idivl 3133065982 - idivl 0xbabecafe - -// CHECK: idivl 305419896 - idivl 0x12345678 - -// CHECK: roll $0, 3735928559(%ebx,%ecx,8) - roll $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: roll $0, 69 - roll $0,0x45 - -// CHECK: roll $0, 32493 - roll $0,0x7eed - -// CHECK: roll $0, 3133065982 - roll $0,0xbabecafe - -// CHECK: roll $0, 305419896 - roll $0,0x12345678 - -// CHECK: rolb $127, 3735928559(%ebx,%ecx,8) - rolb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rolb $127, 69 - rolb $0x7f,0x45 - -// CHECK: rolb $127, 32493 - rolb $0x7f,0x7eed - -// CHECK: rolb $127, 3133065982 - rolb $0x7f,0xbabecafe - -// CHECK: rolb $127, 305419896 - rolb $0x7f,0x12345678 - -// CHECK: roll 3735928559(%ebx,%ecx,8) - roll 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rolw 32493 - rolw 0x7eed - -// CHECK: roll 3133065982 - roll 0xbabecafe - -// CHECK: roll 305419896 - roll 0x12345678 - -// CHECK: rorl $0, 3735928559(%ebx,%ecx,8) - rorl $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rorl $0, 69 - rorl $0,0x45 - -// CHECK: rorl $0, 32493 - rorl $0,0x7eed - -// CHECK: rorl $0, 3133065982 - rorl $0,0xbabecafe - -// CHECK: rorl $0, 305419896 - rorl $0,0x12345678 - -// CHECK: rorb $127, 3735928559(%ebx,%ecx,8) - rorb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rorb $127, 69 - rorb $0x7f,0x45 - -// CHECK: rorb $127, 32493 - rorb $0x7f,0x7eed - -// CHECK: rorb $127, 3133065982 - rorb $0x7f,0xbabecafe - -// CHECK: rorb $127, 305419896 - rorb $0x7f,0x12345678 - -// CHECK: rorl 3735928559(%ebx,%ecx,8) - rorl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rorw 32493 - rorw 0x7eed - -// CHECK: rorl 3133065982 - rorl 0xbabecafe - -// CHECK: rorl 305419896 - rorl 0x12345678 - -// CHECK: rcll $0, 3735928559(%ebx,%ecx,8) - rcll $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rcll $0, 69 - rcll $0,0x45 - -// CHECK: rcll $0, 32493 - rcll $0,0x7eed - -// CHECK: rcll $0, 3133065982 - rcll $0,0xbabecafe - -// CHECK: rcll $0, 305419896 - rcll $0,0x12345678 - -// CHECK: rclb $127, 3735928559(%ebx,%ecx,8) - rclb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rclb $127, 69 - rclb $0x7f,0x45 - -// CHECK: rclb $127, 32493 - rclb $0x7f,0x7eed - -// CHECK: rclb $127, 3133065982 - rclb $0x7f,0xbabecafe - -// CHECK: rclb $127, 305419896 - rclb $0x7f,0x12345678 - -// CHECK: rcrl $0, 3735928559(%ebx,%ecx,8) - rcrl $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rcrl $0, 69 - rcrl $0,0x45 - -// CHECK: rcrl $0, 32493 - rcrl $0,0x7eed - -// CHECK: rcrl $0, 3133065982 - rcrl $0,0xbabecafe - -// CHECK: rcrl $0, 305419896 - rcrl $0,0x12345678 - -// CHECK: rcrb $127, 3735928559(%ebx,%ecx,8) - rcrb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: rcrb $127, 69 - rcrb $0x7f,0x45 - -// CHECK: rcrb $127, 32493 - rcrb $0x7f,0x7eed - -// CHECK: rcrb $127, 3133065982 - rcrb $0x7f,0xbabecafe - -// CHECK: rcrb $127, 305419896 - rcrb $0x7f,0x12345678 - -// CHECK: shll $0, 3735928559(%ebx,%ecx,8) - sall $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shll $0, 69 - sall $0,0x45 - -// CHECK: shll $0, 32493 - sall $0,0x7eed - -// CHECK: shll $0, 3133065982 - sall $0,0xbabecafe - -// CHECK: shll $0, 305419896 - sall $0,0x12345678 - -// CHECK: shlb $127, 3735928559(%ebx,%ecx,8) - salb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shlb $127, 69 - salb $0x7f,0x45 - -// CHECK: shlb $127, 32493 - salb $0x7f,0x7eed - -// CHECK: shlb $127, 3133065982 - salb $0x7f,0xbabecafe - -// CHECK: shlb $127, 305419896 - salb $0x7f,0x12345678 - -// CHECK: shll 3735928559(%ebx,%ecx,8) - sall 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shlw 32493 - salw 0x7eed - -// CHECK: shll 3133065982 - sall 0xbabecafe - -// CHECK: shll 305419896 - sall 0x12345678 - -// CHECK: shll $0, 3735928559(%ebx,%ecx,8) - shll $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shll $0, 69 - shll $0,0x45 - -// CHECK: shll $0, 32493 - shll $0,0x7eed - -// CHECK: shll $0, 3133065982 - shll $0,0xbabecafe - -// CHECK: shll $0, 305419896 - shll $0,0x12345678 - -// CHECK: shlb $127, 3735928559(%ebx,%ecx,8) - shlb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shlb $127, 69 - shlb $0x7f,0x45 - -// CHECK: shlb $127, 32493 - shlb $0x7f,0x7eed - -// CHECK: shlb $127, 3133065982 - shlb $0x7f,0xbabecafe - -// CHECK: shlb $127, 305419896 - shlb $0x7f,0x12345678 - -// CHECK: shll 3735928559(%ebx,%ecx,8) - shll 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shlw 32493 - shlw 0x7eed - -// CHECK: shll 3133065982 - shll 0xbabecafe - -// CHECK: shll 305419896 - shll 0x12345678 - -// CHECK: shrl $0, 3735928559(%ebx,%ecx,8) - shrl $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shrl $0, 69 - shrl $0,0x45 - -// CHECK: shrl $0, 32493 - shrl $0,0x7eed - -// CHECK: shrl $0, 3133065982 - shrl $0,0xbabecafe - -// CHECK: shrl $0, 305419896 - shrl $0,0x12345678 - -// CHECK: shrb $127, 3735928559(%ebx,%ecx,8) - shrb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shrb $127, 69 - shrb $0x7f,0x45 - -// CHECK: shrb $127, 32493 - shrb $0x7f,0x7eed - -// CHECK: shrb $127, 3133065982 - shrb $0x7f,0xbabecafe - -// CHECK: shrb $127, 305419896 - shrb $0x7f,0x12345678 - -// CHECK: shrl 3735928559(%ebx,%ecx,8) - shrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: shrw 32493 - shrw 0x7eed - -// CHECK: shrl 3133065982 - shrl 0xbabecafe - -// CHECK: shrl 305419896 - shrl 0x12345678 - -// CHECK: sarl $0, 3735928559(%ebx,%ecx,8) - sarl $0,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sarl $0, 69 - sarl $0,0x45 - -// CHECK: sarl $0, 32493 - sarl $0,0x7eed - -// CHECK: sarl $0, 3133065982 - sarl $0,0xbabecafe - -// CHECK: sarl $0, 305419896 - sarl $0,0x12345678 - -// CHECK: sarb $127, 3735928559(%ebx,%ecx,8) - sarb $0x7f,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sarb $127, 69 - sarb $0x7f,0x45 - -// CHECK: sarb $127, 32493 - sarb $0x7f,0x7eed - -// CHECK: sarb $127, 3133065982 - sarb $0x7f,0xbabecafe - -// CHECK: sarb $127, 305419896 - sarb $0x7f,0x12345678 - -// CHECK: sarl 3735928559(%ebx,%ecx,8) - sarl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sarw 32493 - sarw 0x7eed - -// CHECK: sarl 3133065982 - sarl 0xbabecafe - -// CHECK: sarl 305419896 - sarl 0x12345678 - -// CHECK: call 3133065982 - call 0xbabecafe - -// CHECK: call *3735928559(%ebx,%ecx,8) - call *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: call 3133065982 - call 0xbabecafe - -// CHECK: call 305419896 - call 0x12345678 - -// CHECK: call *3135175374 - call *0xbadeface - -// CHECK: call *3735928559(%ebx,%ecx,8) - call *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: call 32493 - call 0x7eed - -// CHECK: call 3133065982 - call 0xbabecafe - -// CHECK: call 305419896 - call 0x12345678 - -// CHECK: call *3135175374 - call *0xbadeface - -// CHECK: lcallw *32493 - lcallw *0x7eed - -// CHECK: jmp 32493 - jmp 0x7eed - -// CHECK: jmp 3133065982 - jmp 0xbabecafe - -// CHECK: jmp 305419896 - jmp 0x12345678 - -// CHECK: jmp -77129852792157442 - jmp 0xfeedfacebabecafe - -// CHECK: jmp *3735928559(%ebx,%ecx,8) - jmp *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: jmp 32493 - jmp 0x7eed - -// CHECK: jmp 3133065982 - jmp 0xbabecafe - -// CHECK: jmp 305419896 - jmp 0x12345678 - -// CHECK: jmp *3135175374 - jmp *0xbadeface - -// CHECK: jmp *3735928559(%ebx,%ecx,8) - jmp *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: jmp 32493 - jmp 0x7eed - -// CHECK: jmp 3133065982 - jmp 0xbabecafe - -// CHECK: jmp 305419896 - jmp 0x12345678 - -// CHECK: jmp *3135175374 - jmp *0xbadeface - -// CHECK: ljmpl *3735928559(%ebx,%ecx,8) - ljmpl *0xdeadbeef(%ebx,%ecx,8) - -// CHECK: ljmpw *32493 - ljmpw *0x7eed - -// CHECK: ljmpl *3133065982 - ljmpl *0xbabecafe - -// CHECK: ljmpl *305419896 - ljmpl *0x12345678 - -// CHECK: ret - ret - -// CHECK: lret - lret - -// CHECK: enter $31438, $127 - enter $0x7ace,$0x7f - -// CHECK: leave - leave - -// CHECK: jo 32493 - jo 0x7eed - -// CHECK: jo 3133065982 - jo 0xbabecafe - -// CHECK: jo 305419896 - jo 0x12345678 - -// CHECK: jo -77129852792157442 - jo 0xfeedfacebabecafe - -// CHECK: jno 32493 - jno 0x7eed - -// CHECK: jno 3133065982 - jno 0xbabecafe - -// CHECK: jno 305419896 - jno 0x12345678 - -// CHECK: jno -77129852792157442 - jno 0xfeedfacebabecafe - -// CHECK: jb 32493 - jb 0x7eed - -// CHECK: jb 3133065982 - jb 0xbabecafe - -// CHECK: jb 305419896 - jb 0x12345678 - -// CHECK: jb -77129852792157442 - jb 0xfeedfacebabecafe - -// CHECK: jae 32493 - jae 0x7eed - -// CHECK: jae 3133065982 - jae 0xbabecafe - -// CHECK: jae 305419896 - jae 0x12345678 - -// CHECK: jae -77129852792157442 - jae 0xfeedfacebabecafe - -// CHECK: je 32493 - je 0x7eed - -// CHECK: je 3133065982 - je 0xbabecafe - -// CHECK: je 305419896 - je 0x12345678 - -// CHECK: je -77129852792157442 - je 0xfeedfacebabecafe - -// CHECK: jne 32493 - jne 0x7eed - -// CHECK: jne 3133065982 - jne 0xbabecafe - -// CHECK: jne 305419896 - jne 0x12345678 - -// CHECK: jne -77129852792157442 - jne 0xfeedfacebabecafe - -// CHECK: jbe 32493 - jbe 0x7eed - -// CHECK: jbe 3133065982 - jbe 0xbabecafe - -// CHECK: jbe 305419896 - jbe 0x12345678 - -// CHECK: jbe -77129852792157442 - jbe 0xfeedfacebabecafe - -// CHECK: ja 32493 - ja 0x7eed - -// CHECK: ja 3133065982 - ja 0xbabecafe - -// CHECK: ja 305419896 - ja 0x12345678 - -// CHECK: ja -77129852792157442 - ja 0xfeedfacebabecafe - -// CHECK: js 32493 - js 0x7eed - -// CHECK: js 3133065982 - js 0xbabecafe - -// CHECK: js 305419896 - js 0x12345678 - -// CHECK: js -77129852792157442 - js 0xfeedfacebabecafe - -// CHECK: jns 32493 - jns 0x7eed - -// CHECK: jns 3133065982 - jns 0xbabecafe - -// CHECK: jns 305419896 - jns 0x12345678 - -// CHECK: jns -77129852792157442 - jns 0xfeedfacebabecafe - -// CHECK: jp 32493 - jp 0x7eed - -// CHECK: jp 3133065982 - jp 0xbabecafe - -// CHECK: jp 305419896 - jp 0x12345678 - -// CHECK: jp -77129852792157442 - jp 0xfeedfacebabecafe - -// CHECK: jnp 32493 - jnp 0x7eed - -// CHECK: jnp 3133065982 - jnp 0xbabecafe - -// CHECK: jnp 305419896 - jnp 0x12345678 - -// CHECK: jnp -77129852792157442 - jnp 0xfeedfacebabecafe - -// CHECK: jl 32493 - jl 0x7eed - -// CHECK: jl 3133065982 - jl 0xbabecafe - -// CHECK: jl 305419896 - jl 0x12345678 - -// CHECK: jl -77129852792157442 - jl 0xfeedfacebabecafe - -// CHECK: jge 32493 - jge 0x7eed - -// CHECK: jge 3133065982 - jge 0xbabecafe - -// CHECK: jge 305419896 - jge 0x12345678 - -// CHECK: jge -77129852792157442 - jge 0xfeedfacebabecafe - -// CHECK: jle 32493 - jle 0x7eed - -// CHECK: jle 3133065982 - jle 0xbabecafe - -// CHECK: jle 305419896 - jle 0x12345678 - -// CHECK: jle -77129852792157442 - jle 0xfeedfacebabecafe - -// CHECK: jg 32493 - jg 0x7eed - -// CHECK: jg 3133065982 - jg 0xbabecafe - -// CHECK: jg 305419896 - jg 0x12345678 - -// CHECK: jg -77129852792157442 - jg 0xfeedfacebabecafe - -// CHECK: seto %bl - seto %bl - -// CHECK: seto 3735928559(%ebx,%ecx,8) - seto 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: seto 32493 - seto 0x7eed - -// CHECK: seto 3133065982 - seto 0xbabecafe - -// CHECK: seto 305419896 - seto 0x12345678 - -// CHECK: setno %bl - setno %bl - -// CHECK: setno 3735928559(%ebx,%ecx,8) - setno 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setno 32493 - setno 0x7eed - -// CHECK: setno 3133065982 - setno 0xbabecafe - -// CHECK: setno 305419896 - setno 0x12345678 - -// CHECK: setb %bl - setb %bl - -// CHECK: setb 3735928559(%ebx,%ecx,8) - setb 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setb 32493 - setb 0x7eed - -// CHECK: setb 3133065982 - setb 0xbabecafe - -// CHECK: setb 305419896 - setb 0x12345678 - -// CHECK: setae %bl - setae %bl - -// CHECK: setae 3735928559(%ebx,%ecx,8) - setae 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setae 32493 - setae 0x7eed - -// CHECK: setae 3133065982 - setae 0xbabecafe - -// CHECK: setae 305419896 - setae 0x12345678 - -// CHECK: sete %bl - sete %bl - -// CHECK: sete 3735928559(%ebx,%ecx,8) - sete 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sete 32493 - sete 0x7eed - -// CHECK: sete 3133065982 - sete 0xbabecafe - -// CHECK: sete 305419896 - sete 0x12345678 - -// CHECK: setne %bl - setne %bl - -// CHECK: setne 3735928559(%ebx,%ecx,8) - setne 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setne 32493 - setne 0x7eed - -// CHECK: setne 3133065982 - setne 0xbabecafe - -// CHECK: setne 305419896 - setne 0x12345678 - -// CHECK: setbe %bl - setbe %bl - -// CHECK: setbe 3735928559(%ebx,%ecx,8) - setbe 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setbe 32493 - setbe 0x7eed - -// CHECK: setbe 3133065982 - setbe 0xbabecafe - -// CHECK: setbe 305419896 - setbe 0x12345678 - -// CHECK: seta %bl - seta %bl - -// CHECK: seta 3735928559(%ebx,%ecx,8) - seta 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: seta 32493 - seta 0x7eed - -// CHECK: seta 3133065982 - seta 0xbabecafe - -// CHECK: seta 305419896 - seta 0x12345678 - -// CHECK: sets %bl - sets %bl - -// CHECK: sets 3735928559(%ebx,%ecx,8) - sets 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: sets 32493 - sets 0x7eed - -// CHECK: sets 3133065982 - sets 0xbabecafe - -// CHECK: sets 305419896 - sets 0x12345678 - -// CHECK: setns %bl - setns %bl - -// CHECK: setns 3735928559(%ebx,%ecx,8) - setns 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setns 32493 - setns 0x7eed - -// CHECK: setns 3133065982 - setns 0xbabecafe - -// CHECK: setns 305419896 - setns 0x12345678 - -// CHECK: setp %bl - setp %bl - -// CHECK: setp 3735928559(%ebx,%ecx,8) - setp 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setp 32493 - setp 0x7eed - -// CHECK: setp 3133065982 - setp 0xbabecafe - -// CHECK: setp 305419896 - setp 0x12345678 - -// CHECK: setnp %bl - setnp %bl - -// CHECK: setnp 3735928559(%ebx,%ecx,8) - setnp 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setnp 32493 - setnp 0x7eed - -// CHECK: setnp 3133065982 - setnp 0xbabecafe - -// CHECK: setnp 305419896 - setnp 0x12345678 - -// CHECK: setl %bl - setl %bl - -// CHECK: setl 3735928559(%ebx,%ecx,8) - setl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setl 32493 - setl 0x7eed - -// CHECK: setl 3133065982 - setl 0xbabecafe - -// CHECK: setl 305419896 - setl 0x12345678 - -// CHECK: setge %bl - setge %bl - -// CHECK: setge 3735928559(%ebx,%ecx,8) - setge 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setge 32493 - setge 0x7eed - -// CHECK: setge 3133065982 - setge 0xbabecafe - -// CHECK: setge 305419896 - setge 0x12345678 - -// CHECK: setle %bl - setle %bl - -// CHECK: setle 3735928559(%ebx,%ecx,8) - setle 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setle 32493 - setle 0x7eed - -// CHECK: setle 3133065982 - setle 0xbabecafe - -// CHECK: setle 305419896 - setle 0x12345678 - -// CHECK: setg %bl - setg %bl - -// CHECK: setg 3735928559(%ebx,%ecx,8) - setg 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: setg 32493 - setg 0x7eed - -// CHECK: setg 3133065982 - setg 0xbabecafe - -// CHECK: setg 305419896 - setg 0x12345678 - -// CHECK: int $127 - int $0x7f - -// CHECK: rsm - rsm - -// CHECK: hlt - hlt - -// CHECK: nopl 3735928559(%ebx,%ecx,8) - nopl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: nopw 32493 - nopw 0x7eed - -// CHECK: nopl 3133065982 - nopl 0xbabecafe - -// CHECK: nopl 305419896 - nopl 0x12345678 - -// CHECK: nop - nop - -// CHECK: lldtw 32493 - lldtw 0x7eed - -// CHECK: lmsww 32493 - lmsww 0x7eed - -// CHECK: ltrw 32493 - ltrw 0x7eed - -// CHECK: sldtw 32493 - sldtw 0x7eed - -// CHECK: smsww 32493 - smsww 0x7eed - -// CHECK: strw 32493 - strw 0x7eed - -// CHECK: verr %bx - verr %bx - -// CHECK: verr 3735928559(%ebx,%ecx,8) - verr 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: verr 3133065982 - verr 0xbabecafe - -// CHECK: verr 305419896 - verr 0x12345678 - -// CHECK: verw %bx - verw %bx - -// CHECK: verw 3735928559(%ebx,%ecx,8) - verw 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: verw 3133065982 - verw 0xbabecafe - -// CHECK: verw 305419896 - verw 0x12345678 - -// CHECK: fld %st(2) - fld %st(2) - -// CHECK: fldl 3735928559(%ebx,%ecx,8) - fldl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fldl 3133065982 - fldl 0xbabecafe - -// CHECK: fldl 305419896 - fldl 0x12345678 - -// CHECK: fld %st(2) - fld %st(2) - -// CHECK: fildl 3735928559(%ebx,%ecx,8) - fildl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fildl 3133065982 - fildl 0xbabecafe - -// CHECK: fildl 305419896 - fildl 0x12345678 - -// CHECK: fildll 3735928559(%ebx,%ecx,8) - fildll 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fildll 32493 - fildll 0x7eed - -// CHECK: fildll 3133065982 - fildll 0xbabecafe - -// CHECK: fildll 305419896 - fildll 0x12345678 - -// CHECK: fldt 3735928559(%ebx,%ecx,8) - fldt 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fldt 32493 - fldt 0x7eed - -// CHECK: fldt 3133065982 - fldt 0xbabecafe - -// CHECK: fldt 305419896 - fldt 0x12345678 - -// CHECK: fbld 3735928559(%ebx,%ecx,8) - fbld 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fbld 32493 - fbld 0x7eed - -// CHECK: fbld 3133065982 - fbld 0xbabecafe - -// CHECK: fbld 305419896 - fbld 0x12345678 - -// CHECK: fst %st(2) - fst %st(2) - -// CHECK: fstl 3735928559(%ebx,%ecx,8) - fstl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fstl 3133065982 - fstl 0xbabecafe - -// CHECK: fstl 305419896 - fstl 0x12345678 - -// CHECK: fst %st(2) - fst %st(2) - -// CHECK: fistl 3735928559(%ebx,%ecx,8) - fistl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fistl 3133065982 - fistl 0xbabecafe - -// CHECK: fistl 305419896 - fistl 0x12345678 - -// CHECK: fstp %st(2) - fstp %st(2) - -// CHECK: fstpl 3735928559(%ebx,%ecx,8) - fstpl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fstpl 3133065982 - fstpl 0xbabecafe - -// CHECK: fstpl 305419896 - fstpl 0x12345678 - -// CHECK: fstp %st(2) - fstp %st(2) - -// CHECK: fistpl 3735928559(%ebx,%ecx,8) - fistpl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fistpl 3133065982 - fistpl 0xbabecafe - -// CHECK: fistpl 305419896 - fistpl 0x12345678 - -// CHECK: fistpll 3735928559(%ebx,%ecx,8) - fistpll 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fistpll 32493 - fistpll 0x7eed - -// CHECK: fistpll 3133065982 - fistpll 0xbabecafe - -// CHECK: fistpll 305419896 - fistpll 0x12345678 - -// CHECK: fstpt 3735928559(%ebx,%ecx,8) - fstpt 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fstpt 32493 - fstpt 0x7eed - -// CHECK: fstpt 3133065982 - fstpt 0xbabecafe - -// CHECK: fstpt 305419896 - fstpt 0x12345678 - -// CHECK: fbstp 3735928559(%ebx,%ecx,8) - fbstp 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fbstp 32493 - fbstp 0x7eed - -// CHECK: fbstp 3133065982 - fbstp 0xbabecafe - -// CHECK: fbstp 305419896 - fbstp 0x12345678 - -// CHECK: fxch %st(2) - fxch %st(2) - -// CHECK: fcom %st(2) - fcom %st(2) - -// CHECK: fcoml 3735928559(%ebx,%ecx,8) - fcoml 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fcoml 3133065982 - fcoml 0xbabecafe - -// CHECK: fcoml 305419896 - fcoml 0x12345678 - -// CHECK: fcom %st(2) - fcom %st(2) - -// CHECK: ficoml 3735928559(%ebx,%ecx,8) - ficoml 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: ficoml 3133065982 - ficoml 0xbabecafe - -// CHECK: ficoml 305419896 - ficoml 0x12345678 - -// CHECK: fcomp %st(2) - fcomp %st(2) - -// CHECK: fcompl 3735928559(%ebx,%ecx,8) - fcompl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fcompl 3133065982 - fcompl 0xbabecafe - -// CHECK: fcompl 305419896 - fcompl 0x12345678 - -// CHECK: fcomp %st(2) - fcomp %st(2) - -// CHECK: ficompl 3735928559(%ebx,%ecx,8) - ficompl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: ficompl 3133065982 - ficompl 0xbabecafe - -// CHECK: ficompl 305419896 - ficompl 0x12345678 - -// CHECK: fcompp - fcompp - -// CHECK: fucom %st(2) - fucom %st(2) - -// CHECK: fucomp %st(2) - fucomp %st(2) - -// CHECK: fucompp - fucompp - -// CHECK: ftst - ftst - -// CHECK: fxam - fxam - -// CHECK: fld1 - fld1 - -// CHECK: fldl2t - fldl2t - -// CHECK: fldl2e - fldl2e - -// CHECK: fldpi - fldpi - -// CHECK: fldlg2 - fldlg2 - -// CHECK: fldln2 - fldln2 - -// CHECK: fldz - fldz - -// CHECK: fadd %st(2) - fadd %st(2) - -// CHECK: faddl 3735928559(%ebx,%ecx,8) - faddl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: faddl 3133065982 - faddl 0xbabecafe - -// CHECK: faddl 305419896 - faddl 0x12345678 - -// CHECK: fiaddl 3735928559(%ebx,%ecx,8) - fiaddl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fiaddl 3133065982 - fiaddl 0xbabecafe - -// CHECK: fiaddl 305419896 - fiaddl 0x12345678 - -// CHECK: faddp %st(2) - faddp %st(2) - -// CHECK: fsub %st(2) - fsub %st(2) - -// CHECK: fsubl 3735928559(%ebx,%ecx,8) - fsubl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fsubl 3133065982 - fsubl 0xbabecafe - -// CHECK: fsubl 305419896 - fsubl 0x12345678 - -// CHECK: fisubl 3735928559(%ebx,%ecx,8) - fisubl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fisubl 3133065982 - fisubl 0xbabecafe - -// CHECK: fisubl 305419896 - fisubl 0x12345678 - -// CHECK: fsubp %st(2) - fsubp %st(2) - -// CHECK: fsubr %st(2) - fsubr %st(2) - -// CHECK: fsubrl 3735928559(%ebx,%ecx,8) - fsubrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fsubrl 3133065982 - fsubrl 0xbabecafe - -// CHECK: fsubrl 305419896 - fsubrl 0x12345678 - -// CHECK: fisubrl 3735928559(%ebx,%ecx,8) - fisubrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fisubrl 3133065982 - fisubrl 0xbabecafe - -// CHECK: fisubrl 305419896 - fisubrl 0x12345678 - -// CHECK: fsubrp %st(2) - fsubrp %st(2) - -// CHECK: fmul %st(2) - fmul %st(2) - -// CHECK: fmull 3735928559(%ebx,%ecx,8) - fmull 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fmull 3133065982 - fmull 0xbabecafe - -// CHECK: fmull 305419896 - fmull 0x12345678 - -// CHECK: fimull 3735928559(%ebx,%ecx,8) - fimull 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fimull 3133065982 - fimull 0xbabecafe - -// CHECK: fimull 305419896 - fimull 0x12345678 - -// CHECK: fmulp %st(2) - fmulp %st(2) - -// CHECK: fdiv %st(2) - fdiv %st(2) - -// CHECK: fdivl 3735928559(%ebx,%ecx,8) - fdivl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fdivl 3133065982 - fdivl 0xbabecafe - -// CHECK: fdivl 305419896 - fdivl 0x12345678 - -// CHECK: fidivl 3735928559(%ebx,%ecx,8) - fidivl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fidivl 3133065982 - fidivl 0xbabecafe - -// CHECK: fidivl 305419896 - fidivl 0x12345678 - -// CHECK: fdivp %st(2) - fdivp %st(2) - -// CHECK: fdivr %st(2) - fdivr %st(2) - -// CHECK: fdivrl 3735928559(%ebx,%ecx,8) - fdivrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fdivrl 3133065982 - fdivrl 0xbabecafe - -// CHECK: fdivrl 305419896 - fdivrl 0x12345678 - -// CHECK: fidivrl 3735928559(%ebx,%ecx,8) - fidivrl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fidivrl 3133065982 - fidivrl 0xbabecafe - -// CHECK: fidivrl 305419896 - fidivrl 0x12345678 - -// CHECK: fdivrp %st(2) - fdivrp %st(2) - -// CHECK: f2xm1 - f2xm1 - -// CHECK: fyl2x - fyl2x - -// CHECK: fptan - fptan - -// CHECK: fpatan - fpatan - -// CHECK: fxtract - fxtract - -// CHECK: fprem1 - fprem1 - -// CHECK: fdecstp - fdecstp - -// CHECK: fincstp - fincstp - -// CHECK: fprem - fprem - -// CHECK: fyl2xp1 - fyl2xp1 - -// CHECK: fsqrt - fsqrt - -// CHECK: fsincos - fsincos - -// CHECK: frndint - frndint - -// CHECK: fscale - fscale - -// CHECK: fsin - fsin - -// CHECK: fcos - fcos - -// CHECK: fchs - fchs - -// CHECK: fabs - fabs - -// CHECK: fninit - fninit - -// CHECK: fldcw 3735928559(%ebx,%ecx,8) - fldcw 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fldcw 3133065982 - fldcw 0xbabecafe - -// CHECK: fldcw 305419896 - fldcw 0x12345678 - -// CHECK: fnstcw 3735928559(%ebx,%ecx,8) - fnstcw 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fnstcw 3133065982 - fnstcw 0xbabecafe - -// CHECK: fnstcw 305419896 - fnstcw 0x12345678 - -// CHECK: fnstsw 3735928559(%ebx,%ecx,8) - fnstsw 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fnstsw 3133065982 - fnstsw 0xbabecafe - -// CHECK: fnstsw 305419896 - fnstsw 0x12345678 - -// CHECK: fnclex - fnclex - -// CHECK: fnstenv 32493 - fnstenv 0x7eed - -// CHECK: fldenv 32493 - fldenv 0x7eed - -// CHECK: fnsave 32493 - fnsave 0x7eed - -// CHECK: frstor 32493 - frstor 0x7eed - -// CHECK: ffree %st(2) - ffree %st(2) - -// CHECK: fnop - fnop - -// CHECK: invd - invd - -// CHECK: wbinvd - wbinvd - -// CHECK: cpuid - cpuid - -// CHECK: wrmsr - wrmsr - -// CHECK: rdtsc - rdtsc - -// CHECK: rdmsr - rdmsr - -// CHECK: cmpxchg8b 3735928559(%ebx,%ecx,8) - cmpxchg8b 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: cmpxchg8b 32493 - cmpxchg8b 0x7eed - -// CHECK: cmpxchg8b 3133065982 - cmpxchg8b 0xbabecafe - -// CHECK: cmpxchg8b 305419896 - cmpxchg8b 0x12345678 - -// CHECK: sysenter - sysenter - -// CHECK: sysexit - sysexit - -// CHECK: fxsave 3735928559(%ebx,%ecx,8) - fxsave 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fxsave 32493 - fxsave 0x7eed - -// CHECK: fxsave 3133065982 - fxsave 0xbabecafe - -// CHECK: fxsave 305419896 - fxsave 0x12345678 - -// CHECK: fxrstor 3735928559(%ebx,%ecx,8) - fxrstor 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fxrstor 32493 - fxrstor 0x7eed - -// CHECK: fxrstor 3133065982 - fxrstor 0xbabecafe - -// CHECK: fxrstor 305419896 - fxrstor 0x12345678 - -// CHECK: rdpmc - rdpmc - -// CHECK: ud2 - ud2 - -// CHECK: fcmovb %st(2), %st(0) - fcmovb %st(2),%st - -// CHECK: fcmove %st(2), %st(0) - fcmove %st(2),%st - -// CHECK: fcmovbe %st(2), %st(0) - fcmovbe %st(2),%st - -// CHECK: fcmovu %st(2), %st(0) - fcmovu %st(2),%st - -// CHECK: fcmovnb %st(2), %st(0) - fcmovnb %st(2),%st - -// CHECK: fcmovne %st(2), %st(0) - fcmovne %st(2),%st - -// CHECK: fcmovnbe %st(2), %st(0) - fcmovnbe %st(2),%st - -// CHECK: fcmovnu %st(2), %st(0) - fcmovnu %st(2),%st - -// CHECK: fcomi %st(2), %st(0) - fcomi %st(2),%st - -// CHECK: fucomi %st(2), %st(0) - fucomi %st(2),%st - -// CHECK: fcomip %st(2), %st(0) - fcomip %st(2),%st - -// CHECK: fucomip %st(2), %st(0) - fucomip %st(2),%st - -// CHECK: movnti %ecx, 3735928559(%ebx,%ecx,8) - movnti %ecx,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movnti %ecx, 69 - movnti %ecx,0x45 - -// CHECK: movnti %ecx, 32493 - movnti %ecx,0x7eed - -// CHECK: movnti %ecx, 3133065982 - movnti %ecx,0xbabecafe - -// CHECK: movnti %ecx, 305419896 - movnti %ecx,0x12345678 - -// CHECK: clflush 3735928559(%ebx,%ecx,8) - clflush 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: clflush 32493 - clflush 0x7eed - -// CHECK: clflush 3133065982 - clflush 0xbabecafe - -// CHECK: clflush 305419896 - clflush 0x12345678 - -// CHECK: pause - pause - -// CHECK: sfence - sfence - -// CHECK: lfence - lfence - -// CHECK: mfence - mfence - -// CHECK: emms - emms - -// CHECK: movd %ecx, %mm3 - movd %ecx,%mm3 - -// CHECK: movd 3735928559(%ebx,%ecx,8), %mm3 - movd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: movd 69, %mm3 - movd 0x45,%mm3 - -// CHECK: movd 32493, %mm3 - movd 0x7eed,%mm3 - -// CHECK: movd 3133065982, %mm3 - movd 0xbabecafe,%mm3 - -// CHECK: movd 305419896, %mm3 - movd 0x12345678,%mm3 - -// CHECK: movd %mm3, %ecx - movd %mm3,%ecx - -// CHECK: movd %mm3, 3735928559(%ebx,%ecx,8) - movd %mm3,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movd %mm3, 69 - movd %mm3,0x45 - -// CHECK: movd %mm3, 32493 - movd %mm3,0x7eed - -// CHECK: movd %mm3, 3133065982 - movd %mm3,0xbabecafe - -// CHECK: movd %mm3, 305419896 - movd %mm3,0x12345678 - -// CHECK: movd %ecx, %xmm5 - movd %ecx,%xmm5 - -// CHECK: movd 3735928559(%ebx,%ecx,8), %xmm5 - movd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movd 69, %xmm5 - movd 0x45,%xmm5 - -// CHECK: movd 32493, %xmm5 - movd 0x7eed,%xmm5 - -// CHECK: movd 3133065982, %xmm5 - movd 0xbabecafe,%xmm5 - -// CHECK: movd 305419896, %xmm5 - movd 0x12345678,%xmm5 - -// CHECK: movd %xmm5, %ecx - movd %xmm5,%ecx - -// CHECK: movd %xmm5, 3735928559(%ebx,%ecx,8) - movd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movd %xmm5, 69 - movd %xmm5,0x45 - -// CHECK: movd %xmm5, 32493 - movd %xmm5,0x7eed - -// CHECK: movd %xmm5, 3133065982 - movd %xmm5,0xbabecafe - -// CHECK: movd %xmm5, 305419896 - movd %xmm5,0x12345678 - -// CHECK: movq 3735928559(%ebx,%ecx,8), %mm3 - movq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: movq 69, %mm3 - movq 0x45,%mm3 - -// CHECK: movq 32493, %mm3 - movq 0x7eed,%mm3 - -// CHECK: movq 3133065982, %mm3 - movq 0xbabecafe,%mm3 - -// CHECK: movq 305419896, %mm3 - movq 0x12345678,%mm3 - -// CHECK: movq %mm3, %mm3 - movq %mm3,%mm3 - -// CHECK: movq %mm3, 3735928559(%ebx,%ecx,8) - movq %mm3,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movq %mm3, 69 - movq %mm3,0x45 - -// CHECK: movq %mm3, 32493 - movq %mm3,0x7eed - -// CHECK: movq %mm3, 3133065982 - movq %mm3,0xbabecafe - -// CHECK: movq %mm3, 305419896 - movq %mm3,0x12345678 - -// CHECK: movq %mm3, %mm3 - movq %mm3,%mm3 - -// CHECK: movq 3735928559(%ebx,%ecx,8), %xmm5 - movq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movq 69, %xmm5 - movq 0x45,%xmm5 - -// CHECK: movq 32493, %xmm5 - movq 0x7eed,%xmm5 - -// CHECK: movq 3133065982, %xmm5 - movq 0xbabecafe,%xmm5 - -// CHECK: movq 305419896, %xmm5 - movq 0x12345678,%xmm5 - -// CHECK: movq %xmm5, %xmm5 - movq %xmm5,%xmm5 - -// CHECK: movq %xmm5, 3735928559(%ebx,%ecx,8) - movq %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movq %xmm5, 69 - movq %xmm5,0x45 - -// CHECK: movq %xmm5, 32493 - movq %xmm5,0x7eed - -// CHECK: movq %xmm5, 3133065982 - movq %xmm5,0xbabecafe - -// CHECK: movq %xmm5, 305419896 - movq %xmm5,0x12345678 - -// CHECK: movq %xmm5, %xmm5 - movq %xmm5,%xmm5 - -// CHECK: packssdw 3735928559(%ebx,%ecx,8), %mm3 - packssdw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: packssdw 69, %mm3 - packssdw 0x45,%mm3 - -// CHECK: packssdw 32493, %mm3 - packssdw 0x7eed,%mm3 - -// CHECK: packssdw 3133065982, %mm3 - packssdw 0xbabecafe,%mm3 - -// CHECK: packssdw 305419896, %mm3 - packssdw 0x12345678,%mm3 - -// CHECK: packssdw %mm3, %mm3 - packssdw %mm3,%mm3 - -// CHECK: packssdw 3735928559(%ebx,%ecx,8), %xmm5 - packssdw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: packssdw 69, %xmm5 - packssdw 0x45,%xmm5 - -// CHECK: packssdw 32493, %xmm5 - packssdw 0x7eed,%xmm5 - -// CHECK: packssdw 3133065982, %xmm5 - packssdw 0xbabecafe,%xmm5 - -// CHECK: packssdw 305419896, %xmm5 - packssdw 0x12345678,%xmm5 - -// CHECK: packssdw %xmm5, %xmm5 - packssdw %xmm5,%xmm5 - -// CHECK: packsswb 3735928559(%ebx,%ecx,8), %mm3 - packsswb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: packsswb 69, %mm3 - packsswb 0x45,%mm3 - -// CHECK: packsswb 32493, %mm3 - packsswb 0x7eed,%mm3 - -// CHECK: packsswb 3133065982, %mm3 - packsswb 0xbabecafe,%mm3 - -// CHECK: packsswb 305419896, %mm3 - packsswb 0x12345678,%mm3 - -// CHECK: packsswb %mm3, %mm3 - packsswb %mm3,%mm3 - -// CHECK: packsswb 3735928559(%ebx,%ecx,8), %xmm5 - packsswb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: packsswb 69, %xmm5 - packsswb 0x45,%xmm5 - -// CHECK: packsswb 32493, %xmm5 - packsswb 0x7eed,%xmm5 - -// CHECK: packsswb 3133065982, %xmm5 - packsswb 0xbabecafe,%xmm5 - -// CHECK: packsswb 305419896, %xmm5 - packsswb 0x12345678,%xmm5 - -// CHECK: packsswb %xmm5, %xmm5 - packsswb %xmm5,%xmm5 - -// CHECK: packuswb 3735928559(%ebx,%ecx,8), %mm3 - packuswb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: packuswb 69, %mm3 - packuswb 0x45,%mm3 - -// CHECK: packuswb 32493, %mm3 - packuswb 0x7eed,%mm3 - -// CHECK: packuswb 3133065982, %mm3 - packuswb 0xbabecafe,%mm3 - -// CHECK: packuswb 305419896, %mm3 - packuswb 0x12345678,%mm3 - -// CHECK: packuswb %mm3, %mm3 - packuswb %mm3,%mm3 - -// CHECK: packuswb 3735928559(%ebx,%ecx,8), %xmm5 - packuswb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: packuswb 69, %xmm5 - packuswb 0x45,%xmm5 - -// CHECK: packuswb 32493, %xmm5 - packuswb 0x7eed,%xmm5 - -// CHECK: packuswb 3133065982, %xmm5 - packuswb 0xbabecafe,%xmm5 - -// CHECK: packuswb 305419896, %xmm5 - packuswb 0x12345678,%xmm5 - -// CHECK: packuswb %xmm5, %xmm5 - packuswb %xmm5,%xmm5 - -// CHECK: paddb 3735928559(%ebx,%ecx,8), %mm3 - paddb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: paddb 69, %mm3 - paddb 0x45,%mm3 - -// CHECK: paddb 32493, %mm3 - paddb 0x7eed,%mm3 - -// CHECK: paddb 3133065982, %mm3 - paddb 0xbabecafe,%mm3 - -// CHECK: paddb 305419896, %mm3 - paddb 0x12345678,%mm3 - -// CHECK: paddb %mm3, %mm3 - paddb %mm3,%mm3 - -// CHECK: paddb 3735928559(%ebx,%ecx,8), %xmm5 - paddb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: paddb 69, %xmm5 - paddb 0x45,%xmm5 - -// CHECK: paddb 32493, %xmm5 - paddb 0x7eed,%xmm5 - -// CHECK: paddb 3133065982, %xmm5 - paddb 0xbabecafe,%xmm5 - -// CHECK: paddb 305419896, %xmm5 - paddb 0x12345678,%xmm5 - -// CHECK: paddb %xmm5, %xmm5 - paddb %xmm5,%xmm5 - -// CHECK: paddw 3735928559(%ebx,%ecx,8), %mm3 - paddw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: paddw 69, %mm3 - paddw 0x45,%mm3 - -// CHECK: paddw 32493, %mm3 - paddw 0x7eed,%mm3 - -// CHECK: paddw 3133065982, %mm3 - paddw 0xbabecafe,%mm3 - -// CHECK: paddw 305419896, %mm3 - paddw 0x12345678,%mm3 - -// CHECK: paddw %mm3, %mm3 - paddw %mm3,%mm3 - -// CHECK: paddw 3735928559(%ebx,%ecx,8), %xmm5 - paddw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: paddw 69, %xmm5 - paddw 0x45,%xmm5 - -// CHECK: paddw 32493, %xmm5 - paddw 0x7eed,%xmm5 - -// CHECK: paddw 3133065982, %xmm5 - paddw 0xbabecafe,%xmm5 - -// CHECK: paddw 305419896, %xmm5 - paddw 0x12345678,%xmm5 - -// CHECK: paddw %xmm5, %xmm5 - paddw %xmm5,%xmm5 - -// CHECK: paddd 3735928559(%ebx,%ecx,8), %mm3 - paddd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: paddd 69, %mm3 - paddd 0x45,%mm3 - -// CHECK: paddd 32493, %mm3 - paddd 0x7eed,%mm3 - -// CHECK: paddd 3133065982, %mm3 - paddd 0xbabecafe,%mm3 - -// CHECK: paddd 305419896, %mm3 - paddd 0x12345678,%mm3 - -// CHECK: paddd %mm3, %mm3 - paddd %mm3,%mm3 - -// CHECK: paddd 3735928559(%ebx,%ecx,8), %xmm5 - paddd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: paddd 69, %xmm5 - paddd 0x45,%xmm5 - -// CHECK: paddd 32493, %xmm5 - paddd 0x7eed,%xmm5 - -// CHECK: paddd 3133065982, %xmm5 - paddd 0xbabecafe,%xmm5 - -// CHECK: paddd 305419896, %xmm5 - paddd 0x12345678,%xmm5 - -// CHECK: paddd %xmm5, %xmm5 - paddd %xmm5,%xmm5 - -// CHECK: paddq 3735928559(%ebx,%ecx,8), %mm3 - paddq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: paddq 69, %mm3 - paddq 0x45,%mm3 - -// CHECK: paddq 32493, %mm3 - paddq 0x7eed,%mm3 - -// CHECK: paddq 3133065982, %mm3 - paddq 0xbabecafe,%mm3 - -// CHECK: paddq 305419896, %mm3 - paddq 0x12345678,%mm3 - -// CHECK: paddq %mm3, %mm3 - paddq %mm3,%mm3 - -// CHECK: paddq 3735928559(%ebx,%ecx,8), %xmm5 - paddq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: paddq 69, %xmm5 - paddq 0x45,%xmm5 - -// CHECK: paddq 32493, %xmm5 - paddq 0x7eed,%xmm5 - -// CHECK: paddq 3133065982, %xmm5 - paddq 0xbabecafe,%xmm5 - -// CHECK: paddq 305419896, %xmm5 - paddq 0x12345678,%xmm5 - -// CHECK: paddq %xmm5, %xmm5 - paddq %xmm5,%xmm5 - -// CHECK: paddsb 3735928559(%ebx,%ecx,8), %mm3 - paddsb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: paddsb 69, %mm3 - paddsb 0x45,%mm3 - -// CHECK: paddsb 32493, %mm3 - paddsb 0x7eed,%mm3 - -// CHECK: paddsb 3133065982, %mm3 - paddsb 0xbabecafe,%mm3 - -// CHECK: paddsb 305419896, %mm3 - paddsb 0x12345678,%mm3 - -// CHECK: paddsb %mm3, %mm3 - paddsb %mm3,%mm3 - -// CHECK: paddsb 3735928559(%ebx,%ecx,8), %xmm5 - paddsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: paddsb 69, %xmm5 - paddsb 0x45,%xmm5 - -// CHECK: paddsb 32493, %xmm5 - paddsb 0x7eed,%xmm5 - -// CHECK: paddsb 3133065982, %xmm5 - paddsb 0xbabecafe,%xmm5 - -// CHECK: paddsb 305419896, %xmm5 - paddsb 0x12345678,%xmm5 - -// CHECK: paddsb %xmm5, %xmm5 - paddsb %xmm5,%xmm5 - -// CHECK: paddsw 3735928559(%ebx,%ecx,8), %mm3 - paddsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: paddsw 69, %mm3 - paddsw 0x45,%mm3 - -// CHECK: paddsw 32493, %mm3 - paddsw 0x7eed,%mm3 - -// CHECK: paddsw 3133065982, %mm3 - paddsw 0xbabecafe,%mm3 - -// CHECK: paddsw 305419896, %mm3 - paddsw 0x12345678,%mm3 - -// CHECK: paddsw %mm3, %mm3 - paddsw %mm3,%mm3 - -// CHECK: paddsw 3735928559(%ebx,%ecx,8), %xmm5 - paddsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: paddsw 69, %xmm5 - paddsw 0x45,%xmm5 - -// CHECK: paddsw 32493, %xmm5 - paddsw 0x7eed,%xmm5 - -// CHECK: paddsw 3133065982, %xmm5 - paddsw 0xbabecafe,%xmm5 - -// CHECK: paddsw 305419896, %xmm5 - paddsw 0x12345678,%xmm5 - -// CHECK: paddsw %xmm5, %xmm5 - paddsw %xmm5,%xmm5 - -// CHECK: paddusb 3735928559(%ebx,%ecx,8), %mm3 - paddusb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: paddusb 69, %mm3 - paddusb 0x45,%mm3 - -// CHECK: paddusb 32493, %mm3 - paddusb 0x7eed,%mm3 - -// CHECK: paddusb 3133065982, %mm3 - paddusb 0xbabecafe,%mm3 - -// CHECK: paddusb 305419896, %mm3 - paddusb 0x12345678,%mm3 - -// CHECK: paddusb %mm3, %mm3 - paddusb %mm3,%mm3 - -// CHECK: paddusb 3735928559(%ebx,%ecx,8), %xmm5 - paddusb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: paddusb 69, %xmm5 - paddusb 0x45,%xmm5 - -// CHECK: paddusb 32493, %xmm5 - paddusb 0x7eed,%xmm5 - -// CHECK: paddusb 3133065982, %xmm5 - paddusb 0xbabecafe,%xmm5 - -// CHECK: paddusb 305419896, %xmm5 - paddusb 0x12345678,%xmm5 - -// CHECK: paddusb %xmm5, %xmm5 - paddusb %xmm5,%xmm5 - -// CHECK: paddusw 3735928559(%ebx,%ecx,8), %mm3 - paddusw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: paddusw 69, %mm3 - paddusw 0x45,%mm3 - -// CHECK: paddusw 32493, %mm3 - paddusw 0x7eed,%mm3 - -// CHECK: paddusw 3133065982, %mm3 - paddusw 0xbabecafe,%mm3 - -// CHECK: paddusw 305419896, %mm3 - paddusw 0x12345678,%mm3 - -// CHECK: paddusw %mm3, %mm3 - paddusw %mm3,%mm3 - -// CHECK: paddusw 3735928559(%ebx,%ecx,8), %xmm5 - paddusw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: paddusw 69, %xmm5 - paddusw 0x45,%xmm5 - -// CHECK: paddusw 32493, %xmm5 - paddusw 0x7eed,%xmm5 - -// CHECK: paddusw 3133065982, %xmm5 - paddusw 0xbabecafe,%xmm5 - -// CHECK: paddusw 305419896, %xmm5 - paddusw 0x12345678,%xmm5 - -// CHECK: paddusw %xmm5, %xmm5 - paddusw %xmm5,%xmm5 - -// CHECK: pand 3735928559(%ebx,%ecx,8), %mm3 - pand 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pand 69, %mm3 - pand 0x45,%mm3 - -// CHECK: pand 32493, %mm3 - pand 0x7eed,%mm3 - -// CHECK: pand 3133065982, %mm3 - pand 0xbabecafe,%mm3 - -// CHECK: pand 305419896, %mm3 - pand 0x12345678,%mm3 - -// CHECK: pand %mm3, %mm3 - pand %mm3,%mm3 - -// CHECK: pand 3735928559(%ebx,%ecx,8), %xmm5 - pand 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pand 69, %xmm5 - pand 0x45,%xmm5 - -// CHECK: pand 32493, %xmm5 - pand 0x7eed,%xmm5 - -// CHECK: pand 3133065982, %xmm5 - pand 0xbabecafe,%xmm5 - -// CHECK: pand 305419896, %xmm5 - pand 0x12345678,%xmm5 - -// CHECK: pand %xmm5, %xmm5 - pand %xmm5,%xmm5 - -// CHECK: pandn 3735928559(%ebx,%ecx,8), %mm3 - pandn 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pandn 69, %mm3 - pandn 0x45,%mm3 - -// CHECK: pandn 32493, %mm3 - pandn 0x7eed,%mm3 - -// CHECK: pandn 3133065982, %mm3 - pandn 0xbabecafe,%mm3 - -// CHECK: pandn 305419896, %mm3 - pandn 0x12345678,%mm3 - -// CHECK: pandn %mm3, %mm3 - pandn %mm3,%mm3 - -// CHECK: pandn 3735928559(%ebx,%ecx,8), %xmm5 - pandn 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pandn 69, %xmm5 - pandn 0x45,%xmm5 - -// CHECK: pandn 32493, %xmm5 - pandn 0x7eed,%xmm5 - -// CHECK: pandn 3133065982, %xmm5 - pandn 0xbabecafe,%xmm5 - -// CHECK: pandn 305419896, %xmm5 - pandn 0x12345678,%xmm5 - -// CHECK: pandn %xmm5, %xmm5 - pandn %xmm5,%xmm5 - -// CHECK: pcmpeqb 3735928559(%ebx,%ecx,8), %mm3 - pcmpeqb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pcmpeqb 69, %mm3 - pcmpeqb 0x45,%mm3 - -// CHECK: pcmpeqb 32493, %mm3 - pcmpeqb 0x7eed,%mm3 - -// CHECK: pcmpeqb 3133065982, %mm3 - pcmpeqb 0xbabecafe,%mm3 - -// CHECK: pcmpeqb 305419896, %mm3 - pcmpeqb 0x12345678,%mm3 - -// CHECK: pcmpeqb %mm3, %mm3 - pcmpeqb %mm3,%mm3 - -// CHECK: pcmpeqb 3735928559(%ebx,%ecx,8), %xmm5 - pcmpeqb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pcmpeqb 69, %xmm5 - pcmpeqb 0x45,%xmm5 - -// CHECK: pcmpeqb 32493, %xmm5 - pcmpeqb 0x7eed,%xmm5 - -// CHECK: pcmpeqb 3133065982, %xmm5 - pcmpeqb 0xbabecafe,%xmm5 - -// CHECK: pcmpeqb 305419896, %xmm5 - pcmpeqb 0x12345678,%xmm5 - -// CHECK: pcmpeqb %xmm5, %xmm5 - pcmpeqb %xmm5,%xmm5 - -// CHECK: pcmpeqw 3735928559(%ebx,%ecx,8), %mm3 - pcmpeqw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pcmpeqw 69, %mm3 - pcmpeqw 0x45,%mm3 - -// CHECK: pcmpeqw 32493, %mm3 - pcmpeqw 0x7eed,%mm3 - -// CHECK: pcmpeqw 3133065982, %mm3 - pcmpeqw 0xbabecafe,%mm3 - -// CHECK: pcmpeqw 305419896, %mm3 - pcmpeqw 0x12345678,%mm3 - -// CHECK: pcmpeqw %mm3, %mm3 - pcmpeqw %mm3,%mm3 - -// CHECK: pcmpeqw 3735928559(%ebx,%ecx,8), %xmm5 - pcmpeqw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pcmpeqw 69, %xmm5 - pcmpeqw 0x45,%xmm5 - -// CHECK: pcmpeqw 32493, %xmm5 - pcmpeqw 0x7eed,%xmm5 - -// CHECK: pcmpeqw 3133065982, %xmm5 - pcmpeqw 0xbabecafe,%xmm5 - -// CHECK: pcmpeqw 305419896, %xmm5 - pcmpeqw 0x12345678,%xmm5 - -// CHECK: pcmpeqw %xmm5, %xmm5 - pcmpeqw %xmm5,%xmm5 - -// CHECK: pcmpeqd 3735928559(%ebx,%ecx,8), %mm3 - pcmpeqd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pcmpeqd 69, %mm3 - pcmpeqd 0x45,%mm3 - -// CHECK: pcmpeqd 32493, %mm3 - pcmpeqd 0x7eed,%mm3 - -// CHECK: pcmpeqd 3133065982, %mm3 - pcmpeqd 0xbabecafe,%mm3 - -// CHECK: pcmpeqd 305419896, %mm3 - pcmpeqd 0x12345678,%mm3 - -// CHECK: pcmpeqd %mm3, %mm3 - pcmpeqd %mm3,%mm3 - -// CHECK: pcmpeqd 3735928559(%ebx,%ecx,8), %xmm5 - pcmpeqd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pcmpeqd 69, %xmm5 - pcmpeqd 0x45,%xmm5 - -// CHECK: pcmpeqd 32493, %xmm5 - pcmpeqd 0x7eed,%xmm5 - -// CHECK: pcmpeqd 3133065982, %xmm5 - pcmpeqd 0xbabecafe,%xmm5 - -// CHECK: pcmpeqd 305419896, %xmm5 - pcmpeqd 0x12345678,%xmm5 - -// CHECK: pcmpeqd %xmm5, %xmm5 - pcmpeqd %xmm5,%xmm5 - -// CHECK: pcmpgtb 3735928559(%ebx,%ecx,8), %mm3 - pcmpgtb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pcmpgtb 69, %mm3 - pcmpgtb 0x45,%mm3 - -// CHECK: pcmpgtb 32493, %mm3 - pcmpgtb 0x7eed,%mm3 - -// CHECK: pcmpgtb 3133065982, %mm3 - pcmpgtb 0xbabecafe,%mm3 - -// CHECK: pcmpgtb 305419896, %mm3 - pcmpgtb 0x12345678,%mm3 - -// CHECK: pcmpgtb %mm3, %mm3 - pcmpgtb %mm3,%mm3 - -// CHECK: pcmpgtb 3735928559(%ebx,%ecx,8), %xmm5 - pcmpgtb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pcmpgtb 69, %xmm5 - pcmpgtb 0x45,%xmm5 - -// CHECK: pcmpgtb 32493, %xmm5 - pcmpgtb 0x7eed,%xmm5 - -// CHECK: pcmpgtb 3133065982, %xmm5 - pcmpgtb 0xbabecafe,%xmm5 - -// CHECK: pcmpgtb 305419896, %xmm5 - pcmpgtb 0x12345678,%xmm5 - -// CHECK: pcmpgtb %xmm5, %xmm5 - pcmpgtb %xmm5,%xmm5 - -// CHECK: pcmpgtw 3735928559(%ebx,%ecx,8), %mm3 - pcmpgtw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pcmpgtw 69, %mm3 - pcmpgtw 0x45,%mm3 - -// CHECK: pcmpgtw 32493, %mm3 - pcmpgtw 0x7eed,%mm3 - -// CHECK: pcmpgtw 3133065982, %mm3 - pcmpgtw 0xbabecafe,%mm3 - -// CHECK: pcmpgtw 305419896, %mm3 - pcmpgtw 0x12345678,%mm3 - -// CHECK: pcmpgtw %mm3, %mm3 - pcmpgtw %mm3,%mm3 - -// CHECK: pcmpgtw 3735928559(%ebx,%ecx,8), %xmm5 - pcmpgtw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pcmpgtw 69, %xmm5 - pcmpgtw 0x45,%xmm5 - -// CHECK: pcmpgtw 32493, %xmm5 - pcmpgtw 0x7eed,%xmm5 - -// CHECK: pcmpgtw 3133065982, %xmm5 - pcmpgtw 0xbabecafe,%xmm5 - -// CHECK: pcmpgtw 305419896, %xmm5 - pcmpgtw 0x12345678,%xmm5 - -// CHECK: pcmpgtw %xmm5, %xmm5 - pcmpgtw %xmm5,%xmm5 - -// CHECK: pcmpgtd 3735928559(%ebx,%ecx,8), %mm3 - pcmpgtd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pcmpgtd 69, %mm3 - pcmpgtd 0x45,%mm3 - -// CHECK: pcmpgtd 32493, %mm3 - pcmpgtd 0x7eed,%mm3 - -// CHECK: pcmpgtd 3133065982, %mm3 - pcmpgtd 0xbabecafe,%mm3 - -// CHECK: pcmpgtd 305419896, %mm3 - pcmpgtd 0x12345678,%mm3 - -// CHECK: pcmpgtd %mm3, %mm3 - pcmpgtd %mm3,%mm3 - -// CHECK: pcmpgtd 3735928559(%ebx,%ecx,8), %xmm5 - pcmpgtd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pcmpgtd 69, %xmm5 - pcmpgtd 0x45,%xmm5 - -// CHECK: pcmpgtd 32493, %xmm5 - pcmpgtd 0x7eed,%xmm5 - -// CHECK: pcmpgtd 3133065982, %xmm5 - pcmpgtd 0xbabecafe,%xmm5 - -// CHECK: pcmpgtd 305419896, %xmm5 - pcmpgtd 0x12345678,%xmm5 - -// CHECK: pcmpgtd %xmm5, %xmm5 - pcmpgtd %xmm5,%xmm5 - -// CHECK: pmaddwd 3735928559(%ebx,%ecx,8), %mm3 - pmaddwd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmaddwd 69, %mm3 - pmaddwd 0x45,%mm3 - -// CHECK: pmaddwd 32493, %mm3 - pmaddwd 0x7eed,%mm3 - -// CHECK: pmaddwd 3133065982, %mm3 - pmaddwd 0xbabecafe,%mm3 - -// CHECK: pmaddwd 305419896, %mm3 - pmaddwd 0x12345678,%mm3 - -// CHECK: pmaddwd %mm3, %mm3 - pmaddwd %mm3,%mm3 - -// CHECK: pmaddwd 3735928559(%ebx,%ecx,8), %xmm5 - pmaddwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmaddwd 69, %xmm5 - pmaddwd 0x45,%xmm5 - -// CHECK: pmaddwd 32493, %xmm5 - pmaddwd 0x7eed,%xmm5 - -// CHECK: pmaddwd 3133065982, %xmm5 - pmaddwd 0xbabecafe,%xmm5 - -// CHECK: pmaddwd 305419896, %xmm5 - pmaddwd 0x12345678,%xmm5 - -// CHECK: pmaddwd %xmm5, %xmm5 - pmaddwd %xmm5,%xmm5 - -// CHECK: pmulhw 3735928559(%ebx,%ecx,8), %mm3 - pmulhw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmulhw 69, %mm3 - pmulhw 0x45,%mm3 - -// CHECK: pmulhw 32493, %mm3 - pmulhw 0x7eed,%mm3 - -// CHECK: pmulhw 3133065982, %mm3 - pmulhw 0xbabecafe,%mm3 - -// CHECK: pmulhw 305419896, %mm3 - pmulhw 0x12345678,%mm3 - -// CHECK: pmulhw %mm3, %mm3 - pmulhw %mm3,%mm3 - -// CHECK: pmulhw 3735928559(%ebx,%ecx,8), %xmm5 - pmulhw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmulhw 69, %xmm5 - pmulhw 0x45,%xmm5 - -// CHECK: pmulhw 32493, %xmm5 - pmulhw 0x7eed,%xmm5 - -// CHECK: pmulhw 3133065982, %xmm5 - pmulhw 0xbabecafe,%xmm5 - -// CHECK: pmulhw 305419896, %xmm5 - pmulhw 0x12345678,%xmm5 - -// CHECK: pmulhw %xmm5, %xmm5 - pmulhw %xmm5,%xmm5 - -// CHECK: pmullw 3735928559(%ebx,%ecx,8), %mm3 - pmullw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmullw 69, %mm3 - pmullw 0x45,%mm3 - -// CHECK: pmullw 32493, %mm3 - pmullw 0x7eed,%mm3 - -// CHECK: pmullw 3133065982, %mm3 - pmullw 0xbabecafe,%mm3 - -// CHECK: pmullw 305419896, %mm3 - pmullw 0x12345678,%mm3 - -// CHECK: pmullw %mm3, %mm3 - pmullw %mm3,%mm3 - -// CHECK: pmullw 3735928559(%ebx,%ecx,8), %xmm5 - pmullw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmullw 69, %xmm5 - pmullw 0x45,%xmm5 - -// CHECK: pmullw 32493, %xmm5 - pmullw 0x7eed,%xmm5 - -// CHECK: pmullw 3133065982, %xmm5 - pmullw 0xbabecafe,%xmm5 - -// CHECK: pmullw 305419896, %xmm5 - pmullw 0x12345678,%xmm5 - -// CHECK: pmullw %xmm5, %xmm5 - pmullw %xmm5,%xmm5 - -// CHECK: por 3735928559(%ebx,%ecx,8), %mm3 - por 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: por 69, %mm3 - por 0x45,%mm3 - -// CHECK: por 32493, %mm3 - por 0x7eed,%mm3 - -// CHECK: por 3133065982, %mm3 - por 0xbabecafe,%mm3 - -// CHECK: por 305419896, %mm3 - por 0x12345678,%mm3 - -// CHECK: por %mm3, %mm3 - por %mm3,%mm3 - -// CHECK: por 3735928559(%ebx,%ecx,8), %xmm5 - por 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: por 69, %xmm5 - por 0x45,%xmm5 - -// CHECK: por 32493, %xmm5 - por 0x7eed,%xmm5 - -// CHECK: por 3133065982, %xmm5 - por 0xbabecafe,%xmm5 - -// CHECK: por 305419896, %xmm5 - por 0x12345678,%xmm5 - -// CHECK: por %xmm5, %xmm5 - por %xmm5,%xmm5 - -// CHECK: psllw 3735928559(%ebx,%ecx,8), %mm3 - psllw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psllw 69, %mm3 - psllw 0x45,%mm3 - -// CHECK: psllw 32493, %mm3 - psllw 0x7eed,%mm3 - -// CHECK: psllw 3133065982, %mm3 - psllw 0xbabecafe,%mm3 - -// CHECK: psllw 305419896, %mm3 - psllw 0x12345678,%mm3 - -// CHECK: psllw %mm3, %mm3 - psllw %mm3,%mm3 - -// CHECK: psllw 3735928559(%ebx,%ecx,8), %xmm5 - psllw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psllw 69, %xmm5 - psllw 0x45,%xmm5 - -// CHECK: psllw 32493, %xmm5 - psllw 0x7eed,%xmm5 - -// CHECK: psllw 3133065982, %xmm5 - psllw 0xbabecafe,%xmm5 - -// CHECK: psllw 305419896, %xmm5 - psllw 0x12345678,%xmm5 - -// CHECK: psllw %xmm5, %xmm5 - psllw %xmm5,%xmm5 - -// CHECK: psllw $127, %mm3 - psllw $0x7f,%mm3 - -// CHECK: psllw $127, %xmm5 - psllw $0x7f,%xmm5 - -// CHECK: pslld 3735928559(%ebx,%ecx,8), %mm3 - pslld 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pslld 69, %mm3 - pslld 0x45,%mm3 - -// CHECK: pslld 32493, %mm3 - pslld 0x7eed,%mm3 - -// CHECK: pslld 3133065982, %mm3 - pslld 0xbabecafe,%mm3 - -// CHECK: pslld 305419896, %mm3 - pslld 0x12345678,%mm3 - -// CHECK: pslld %mm3, %mm3 - pslld %mm3,%mm3 - -// CHECK: pslld 3735928559(%ebx,%ecx,8), %xmm5 - pslld 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pslld 69, %xmm5 - pslld 0x45,%xmm5 - -// CHECK: pslld 32493, %xmm5 - pslld 0x7eed,%xmm5 - -// CHECK: pslld 3133065982, %xmm5 - pslld 0xbabecafe,%xmm5 - -// CHECK: pslld 305419896, %xmm5 - pslld 0x12345678,%xmm5 - -// CHECK: pslld %xmm5, %xmm5 - pslld %xmm5,%xmm5 - -// CHECK: pslld $127, %mm3 - pslld $0x7f,%mm3 - -// CHECK: pslld $127, %xmm5 - pslld $0x7f,%xmm5 - -// CHECK: psllq 3735928559(%ebx,%ecx,8), %mm3 - psllq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psllq 69, %mm3 - psllq 0x45,%mm3 - -// CHECK: psllq 32493, %mm3 - psllq 0x7eed,%mm3 - -// CHECK: psllq 3133065982, %mm3 - psllq 0xbabecafe,%mm3 - -// CHECK: psllq 305419896, %mm3 - psllq 0x12345678,%mm3 - -// CHECK: psllq %mm3, %mm3 - psllq %mm3,%mm3 - -// CHECK: psllq 3735928559(%ebx,%ecx,8), %xmm5 - psllq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psllq 69, %xmm5 - psllq 0x45,%xmm5 - -// CHECK: psllq 32493, %xmm5 - psllq 0x7eed,%xmm5 - -// CHECK: psllq 3133065982, %xmm5 - psllq 0xbabecafe,%xmm5 - -// CHECK: psllq 305419896, %xmm5 - psllq 0x12345678,%xmm5 - -// CHECK: psllq %xmm5, %xmm5 - psllq %xmm5,%xmm5 - -// CHECK: psllq $127, %mm3 - psllq $0x7f,%mm3 - -// CHECK: psllq $127, %xmm5 - psllq $0x7f,%xmm5 - -// CHECK: psraw 3735928559(%ebx,%ecx,8), %mm3 - psraw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psraw 69, %mm3 - psraw 0x45,%mm3 - -// CHECK: psraw 32493, %mm3 - psraw 0x7eed,%mm3 - -// CHECK: psraw 3133065982, %mm3 - psraw 0xbabecafe,%mm3 - -// CHECK: psraw 305419896, %mm3 - psraw 0x12345678,%mm3 - -// CHECK: psraw %mm3, %mm3 - psraw %mm3,%mm3 - -// CHECK: psraw 3735928559(%ebx,%ecx,8), %xmm5 - psraw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psraw 69, %xmm5 - psraw 0x45,%xmm5 - -// CHECK: psraw 32493, %xmm5 - psraw 0x7eed,%xmm5 - -// CHECK: psraw 3133065982, %xmm5 - psraw 0xbabecafe,%xmm5 - -// CHECK: psraw 305419896, %xmm5 - psraw 0x12345678,%xmm5 - -// CHECK: psraw %xmm5, %xmm5 - psraw %xmm5,%xmm5 - -// CHECK: psraw $127, %mm3 - psraw $0x7f,%mm3 - -// CHECK: psraw $127, %xmm5 - psraw $0x7f,%xmm5 - -// CHECK: psrad 3735928559(%ebx,%ecx,8), %mm3 - psrad 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psrad 69, %mm3 - psrad 0x45,%mm3 - -// CHECK: psrad 32493, %mm3 - psrad 0x7eed,%mm3 - -// CHECK: psrad 3133065982, %mm3 - psrad 0xbabecafe,%mm3 - -// CHECK: psrad 305419896, %mm3 - psrad 0x12345678,%mm3 - -// CHECK: psrad %mm3, %mm3 - psrad %mm3,%mm3 - -// CHECK: psrad 3735928559(%ebx,%ecx,8), %xmm5 - psrad 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psrad 69, %xmm5 - psrad 0x45,%xmm5 - -// CHECK: psrad 32493, %xmm5 - psrad 0x7eed,%xmm5 - -// CHECK: psrad 3133065982, %xmm5 - psrad 0xbabecafe,%xmm5 - -// CHECK: psrad 305419896, %xmm5 - psrad 0x12345678,%xmm5 - -// CHECK: psrad %xmm5, %xmm5 - psrad %xmm5,%xmm5 - -// CHECK: psrad $127, %mm3 - psrad $0x7f,%mm3 - -// CHECK: psrad $127, %xmm5 - psrad $0x7f,%xmm5 - -// CHECK: psrlw 3735928559(%ebx,%ecx,8), %mm3 - psrlw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psrlw 69, %mm3 - psrlw 0x45,%mm3 - -// CHECK: psrlw 32493, %mm3 - psrlw 0x7eed,%mm3 - -// CHECK: psrlw 3133065982, %mm3 - psrlw 0xbabecafe,%mm3 - -// CHECK: psrlw 305419896, %mm3 - psrlw 0x12345678,%mm3 - -// CHECK: psrlw %mm3, %mm3 - psrlw %mm3,%mm3 - -// CHECK: psrlw 3735928559(%ebx,%ecx,8), %xmm5 - psrlw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psrlw 69, %xmm5 - psrlw 0x45,%xmm5 - -// CHECK: psrlw 32493, %xmm5 - psrlw 0x7eed,%xmm5 - -// CHECK: psrlw 3133065982, %xmm5 - psrlw 0xbabecafe,%xmm5 - -// CHECK: psrlw 305419896, %xmm5 - psrlw 0x12345678,%xmm5 - -// CHECK: psrlw %xmm5, %xmm5 - psrlw %xmm5,%xmm5 - -// CHECK: psrlw $127, %mm3 - psrlw $0x7f,%mm3 - -// CHECK: psrlw $127, %xmm5 - psrlw $0x7f,%xmm5 - -// CHECK: psrld 3735928559(%ebx,%ecx,8), %mm3 - psrld 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psrld 69, %mm3 - psrld 0x45,%mm3 - -// CHECK: psrld 32493, %mm3 - psrld 0x7eed,%mm3 - -// CHECK: psrld 3133065982, %mm3 - psrld 0xbabecafe,%mm3 - -// CHECK: psrld 305419896, %mm3 - psrld 0x12345678,%mm3 - -// CHECK: psrld %mm3, %mm3 - psrld %mm3,%mm3 - -// CHECK: psrld 3735928559(%ebx,%ecx,8), %xmm5 - psrld 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psrld 69, %xmm5 - psrld 0x45,%xmm5 - -// CHECK: psrld 32493, %xmm5 - psrld 0x7eed,%xmm5 - -// CHECK: psrld 3133065982, %xmm5 - psrld 0xbabecafe,%xmm5 - -// CHECK: psrld 305419896, %xmm5 - psrld 0x12345678,%xmm5 - -// CHECK: psrld %xmm5, %xmm5 - psrld %xmm5,%xmm5 - -// CHECK: psrld $127, %mm3 - psrld $0x7f,%mm3 - -// CHECK: psrld $127, %xmm5 - psrld $0x7f,%xmm5 - -// CHECK: psrlq 3735928559(%ebx,%ecx,8), %mm3 - psrlq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psrlq 69, %mm3 - psrlq 0x45,%mm3 - -// CHECK: psrlq 32493, %mm3 - psrlq 0x7eed,%mm3 - -// CHECK: psrlq 3133065982, %mm3 - psrlq 0xbabecafe,%mm3 - -// CHECK: psrlq 305419896, %mm3 - psrlq 0x12345678,%mm3 - -// CHECK: psrlq %mm3, %mm3 - psrlq %mm3,%mm3 - -// CHECK: psrlq 3735928559(%ebx,%ecx,8), %xmm5 - psrlq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psrlq 69, %xmm5 - psrlq 0x45,%xmm5 - -// CHECK: psrlq 32493, %xmm5 - psrlq 0x7eed,%xmm5 - -// CHECK: psrlq 3133065982, %xmm5 - psrlq 0xbabecafe,%xmm5 - -// CHECK: psrlq 305419896, %xmm5 - psrlq 0x12345678,%xmm5 - -// CHECK: psrlq %xmm5, %xmm5 - psrlq %xmm5,%xmm5 - -// CHECK: psrlq $127, %mm3 - psrlq $0x7f,%mm3 - -// CHECK: psrlq $127, %xmm5 - psrlq $0x7f,%xmm5 - -// CHECK: psubb 3735928559(%ebx,%ecx,8), %mm3 - psubb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psubb 69, %mm3 - psubb 0x45,%mm3 - -// CHECK: psubb 32493, %mm3 - psubb 0x7eed,%mm3 - -// CHECK: psubb 3133065982, %mm3 - psubb 0xbabecafe,%mm3 - -// CHECK: psubb 305419896, %mm3 - psubb 0x12345678,%mm3 - -// CHECK: psubb %mm3, %mm3 - psubb %mm3,%mm3 - -// CHECK: psubb 3735928559(%ebx,%ecx,8), %xmm5 - psubb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psubb 69, %xmm5 - psubb 0x45,%xmm5 - -// CHECK: psubb 32493, %xmm5 - psubb 0x7eed,%xmm5 - -// CHECK: psubb 3133065982, %xmm5 - psubb 0xbabecafe,%xmm5 - -// CHECK: psubb 305419896, %xmm5 - psubb 0x12345678,%xmm5 - -// CHECK: psubb %xmm5, %xmm5 - psubb %xmm5,%xmm5 - -// CHECK: psubw 3735928559(%ebx,%ecx,8), %mm3 - psubw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psubw 69, %mm3 - psubw 0x45,%mm3 - -// CHECK: psubw 32493, %mm3 - psubw 0x7eed,%mm3 - -// CHECK: psubw 3133065982, %mm3 - psubw 0xbabecafe,%mm3 - -// CHECK: psubw 305419896, %mm3 - psubw 0x12345678,%mm3 - -// CHECK: psubw %mm3, %mm3 - psubw %mm3,%mm3 - -// CHECK: psubw 3735928559(%ebx,%ecx,8), %xmm5 - psubw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psubw 69, %xmm5 - psubw 0x45,%xmm5 - -// CHECK: psubw 32493, %xmm5 - psubw 0x7eed,%xmm5 - -// CHECK: psubw 3133065982, %xmm5 - psubw 0xbabecafe,%xmm5 - -// CHECK: psubw 305419896, %xmm5 - psubw 0x12345678,%xmm5 - -// CHECK: psubw %xmm5, %xmm5 - psubw %xmm5,%xmm5 - -// CHECK: psubd 3735928559(%ebx,%ecx,8), %mm3 - psubd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psubd 69, %mm3 - psubd 0x45,%mm3 - -// CHECK: psubd 32493, %mm3 - psubd 0x7eed,%mm3 - -// CHECK: psubd 3133065982, %mm3 - psubd 0xbabecafe,%mm3 - -// CHECK: psubd 305419896, %mm3 - psubd 0x12345678,%mm3 - -// CHECK: psubd %mm3, %mm3 - psubd %mm3,%mm3 - -// CHECK: psubd 3735928559(%ebx,%ecx,8), %xmm5 - psubd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psubd 69, %xmm5 - psubd 0x45,%xmm5 - -// CHECK: psubd 32493, %xmm5 - psubd 0x7eed,%xmm5 - -// CHECK: psubd 3133065982, %xmm5 - psubd 0xbabecafe,%xmm5 - -// CHECK: psubd 305419896, %xmm5 - psubd 0x12345678,%xmm5 - -// CHECK: psubd %xmm5, %xmm5 - psubd %xmm5,%xmm5 - -// CHECK: psubq 3735928559(%ebx,%ecx,8), %mm3 - psubq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psubq 69, %mm3 - psubq 0x45,%mm3 - -// CHECK: psubq 32493, %mm3 - psubq 0x7eed,%mm3 - -// CHECK: psubq 3133065982, %mm3 - psubq 0xbabecafe,%mm3 - -// CHECK: psubq 305419896, %mm3 - psubq 0x12345678,%mm3 - -// CHECK: psubq %mm3, %mm3 - psubq %mm3,%mm3 - -// CHECK: psubq 3735928559(%ebx,%ecx,8), %xmm5 - psubq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psubq 69, %xmm5 - psubq 0x45,%xmm5 - -// CHECK: psubq 32493, %xmm5 - psubq 0x7eed,%xmm5 - -// CHECK: psubq 3133065982, %xmm5 - psubq 0xbabecafe,%xmm5 - -// CHECK: psubq 305419896, %xmm5 - psubq 0x12345678,%xmm5 - -// CHECK: psubq %xmm5, %xmm5 - psubq %xmm5,%xmm5 - -// CHECK: psubsb 3735928559(%ebx,%ecx,8), %mm3 - psubsb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psubsb 69, %mm3 - psubsb 0x45,%mm3 - -// CHECK: psubsb 32493, %mm3 - psubsb 0x7eed,%mm3 - -// CHECK: psubsb 3133065982, %mm3 - psubsb 0xbabecafe,%mm3 - -// CHECK: psubsb 305419896, %mm3 - psubsb 0x12345678,%mm3 - -// CHECK: psubsb %mm3, %mm3 - psubsb %mm3,%mm3 - -// CHECK: psubsb 3735928559(%ebx,%ecx,8), %xmm5 - psubsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psubsb 69, %xmm5 - psubsb 0x45,%xmm5 - -// CHECK: psubsb 32493, %xmm5 - psubsb 0x7eed,%xmm5 - -// CHECK: psubsb 3133065982, %xmm5 - psubsb 0xbabecafe,%xmm5 - -// CHECK: psubsb 305419896, %xmm5 - psubsb 0x12345678,%xmm5 - -// CHECK: psubsb %xmm5, %xmm5 - psubsb %xmm5,%xmm5 - -// CHECK: psubsw 3735928559(%ebx,%ecx,8), %mm3 - psubsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psubsw 69, %mm3 - psubsw 0x45,%mm3 - -// CHECK: psubsw 32493, %mm3 - psubsw 0x7eed,%mm3 - -// CHECK: psubsw 3133065982, %mm3 - psubsw 0xbabecafe,%mm3 - -// CHECK: psubsw 305419896, %mm3 - psubsw 0x12345678,%mm3 - -// CHECK: psubsw %mm3, %mm3 - psubsw %mm3,%mm3 - -// CHECK: psubsw 3735928559(%ebx,%ecx,8), %xmm5 - psubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psubsw 69, %xmm5 - psubsw 0x45,%xmm5 - -// CHECK: psubsw 32493, %xmm5 - psubsw 0x7eed,%xmm5 - -// CHECK: psubsw 3133065982, %xmm5 - psubsw 0xbabecafe,%xmm5 - -// CHECK: psubsw 305419896, %xmm5 - psubsw 0x12345678,%xmm5 - -// CHECK: psubsw %xmm5, %xmm5 - psubsw %xmm5,%xmm5 - -// CHECK: psubusb 3735928559(%ebx,%ecx,8), %mm3 - psubusb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psubusb 69, %mm3 - psubusb 0x45,%mm3 - -// CHECK: psubusb 32493, %mm3 - psubusb 0x7eed,%mm3 - -// CHECK: psubusb 3133065982, %mm3 - psubusb 0xbabecafe,%mm3 - -// CHECK: psubusb 305419896, %mm3 - psubusb 0x12345678,%mm3 - -// CHECK: psubusb %mm3, %mm3 - psubusb %mm3,%mm3 - -// CHECK: psubusb 3735928559(%ebx,%ecx,8), %xmm5 - psubusb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psubusb 69, %xmm5 - psubusb 0x45,%xmm5 - -// CHECK: psubusb 32493, %xmm5 - psubusb 0x7eed,%xmm5 - -// CHECK: psubusb 3133065982, %xmm5 - psubusb 0xbabecafe,%xmm5 - -// CHECK: psubusb 305419896, %xmm5 - psubusb 0x12345678,%xmm5 - -// CHECK: psubusb %xmm5, %xmm5 - psubusb %xmm5,%xmm5 - -// CHECK: psubusw 3735928559(%ebx,%ecx,8), %mm3 - psubusw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psubusw 69, %mm3 - psubusw 0x45,%mm3 - -// CHECK: psubusw 32493, %mm3 - psubusw 0x7eed,%mm3 - -// CHECK: psubusw 3133065982, %mm3 - psubusw 0xbabecafe,%mm3 - -// CHECK: psubusw 305419896, %mm3 - psubusw 0x12345678,%mm3 - -// CHECK: psubusw %mm3, %mm3 - psubusw %mm3,%mm3 - -// CHECK: psubusw 3735928559(%ebx,%ecx,8), %xmm5 - psubusw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psubusw 69, %xmm5 - psubusw 0x45,%xmm5 - -// CHECK: psubusw 32493, %xmm5 - psubusw 0x7eed,%xmm5 - -// CHECK: psubusw 3133065982, %xmm5 - psubusw 0xbabecafe,%xmm5 - -// CHECK: psubusw 305419896, %xmm5 - psubusw 0x12345678,%xmm5 - -// CHECK: psubusw %xmm5, %xmm5 - psubusw %xmm5,%xmm5 - -// CHECK: punpckhbw 3735928559(%ebx,%ecx,8), %mm3 - punpckhbw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: punpckhbw 69, %mm3 - punpckhbw 0x45,%mm3 - -// CHECK: punpckhbw 32493, %mm3 - punpckhbw 0x7eed,%mm3 - -// CHECK: punpckhbw 3133065982, %mm3 - punpckhbw 0xbabecafe,%mm3 - -// CHECK: punpckhbw 305419896, %mm3 - punpckhbw 0x12345678,%mm3 - -// CHECK: punpckhbw %mm3, %mm3 - punpckhbw %mm3,%mm3 - -// CHECK: punpckhbw 3735928559(%ebx,%ecx,8), %xmm5 - punpckhbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: punpckhbw 69, %xmm5 - punpckhbw 0x45,%xmm5 - -// CHECK: punpckhbw 32493, %xmm5 - punpckhbw 0x7eed,%xmm5 - -// CHECK: punpckhbw 3133065982, %xmm5 - punpckhbw 0xbabecafe,%xmm5 - -// CHECK: punpckhbw 305419896, %xmm5 - punpckhbw 0x12345678,%xmm5 - -// CHECK: punpckhbw %xmm5, %xmm5 - punpckhbw %xmm5,%xmm5 - -// CHECK: punpckhwd 3735928559(%ebx,%ecx,8), %mm3 - punpckhwd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: punpckhwd 69, %mm3 - punpckhwd 0x45,%mm3 - -// CHECK: punpckhwd 32493, %mm3 - punpckhwd 0x7eed,%mm3 - -// CHECK: punpckhwd 3133065982, %mm3 - punpckhwd 0xbabecafe,%mm3 - -// CHECK: punpckhwd 305419896, %mm3 - punpckhwd 0x12345678,%mm3 - -// CHECK: punpckhwd %mm3, %mm3 - punpckhwd %mm3,%mm3 - -// CHECK: punpckhwd 3735928559(%ebx,%ecx,8), %xmm5 - punpckhwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: punpckhwd 69, %xmm5 - punpckhwd 0x45,%xmm5 - -// CHECK: punpckhwd 32493, %xmm5 - punpckhwd 0x7eed,%xmm5 - -// CHECK: punpckhwd 3133065982, %xmm5 - punpckhwd 0xbabecafe,%xmm5 - -// CHECK: punpckhwd 305419896, %xmm5 - punpckhwd 0x12345678,%xmm5 - -// CHECK: punpckhwd %xmm5, %xmm5 - punpckhwd %xmm5,%xmm5 - -// CHECK: punpckhdq 3735928559(%ebx,%ecx,8), %mm3 - punpckhdq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: punpckhdq 69, %mm3 - punpckhdq 0x45,%mm3 - -// CHECK: punpckhdq 32493, %mm3 - punpckhdq 0x7eed,%mm3 - -// CHECK: punpckhdq 3133065982, %mm3 - punpckhdq 0xbabecafe,%mm3 - -// CHECK: punpckhdq 305419896, %mm3 - punpckhdq 0x12345678,%mm3 - -// CHECK: punpckhdq %mm3, %mm3 - punpckhdq %mm3,%mm3 - -// CHECK: punpckhdq 3735928559(%ebx,%ecx,8), %xmm5 - punpckhdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: punpckhdq 69, %xmm5 - punpckhdq 0x45,%xmm5 - -// CHECK: punpckhdq 32493, %xmm5 - punpckhdq 0x7eed,%xmm5 - -// CHECK: punpckhdq 3133065982, %xmm5 - punpckhdq 0xbabecafe,%xmm5 - -// CHECK: punpckhdq 305419896, %xmm5 - punpckhdq 0x12345678,%xmm5 - -// CHECK: punpckhdq %xmm5, %xmm5 - punpckhdq %xmm5,%xmm5 - -// CHECK: punpcklbw 3735928559(%ebx,%ecx,8), %mm3 - punpcklbw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: punpcklbw 69, %mm3 - punpcklbw 0x45,%mm3 - -// CHECK: punpcklbw 32493, %mm3 - punpcklbw 0x7eed,%mm3 - -// CHECK: punpcklbw 3133065982, %mm3 - punpcklbw 0xbabecafe,%mm3 - -// CHECK: punpcklbw 305419896, %mm3 - punpcklbw 0x12345678,%mm3 - -// CHECK: punpcklbw %mm3, %mm3 - punpcklbw %mm3,%mm3 - -// CHECK: punpcklbw 3735928559(%ebx,%ecx,8), %xmm5 - punpcklbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: punpcklbw 69, %xmm5 - punpcklbw 0x45,%xmm5 - -// CHECK: punpcklbw 32493, %xmm5 - punpcklbw 0x7eed,%xmm5 - -// CHECK: punpcklbw 3133065982, %xmm5 - punpcklbw 0xbabecafe,%xmm5 - -// CHECK: punpcklbw 305419896, %xmm5 - punpcklbw 0x12345678,%xmm5 - -// CHECK: punpcklbw %xmm5, %xmm5 - punpcklbw %xmm5,%xmm5 - -// CHECK: punpcklwd 3735928559(%ebx,%ecx,8), %mm3 - punpcklwd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: punpcklwd 69, %mm3 - punpcklwd 0x45,%mm3 - -// CHECK: punpcklwd 32493, %mm3 - punpcklwd 0x7eed,%mm3 - -// CHECK: punpcklwd 3133065982, %mm3 - punpcklwd 0xbabecafe,%mm3 - -// CHECK: punpcklwd 305419896, %mm3 - punpcklwd 0x12345678,%mm3 - -// CHECK: punpcklwd %mm3, %mm3 - punpcklwd %mm3,%mm3 - -// CHECK: punpcklwd 3735928559(%ebx,%ecx,8), %xmm5 - punpcklwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: punpcklwd 69, %xmm5 - punpcklwd 0x45,%xmm5 - -// CHECK: punpcklwd 32493, %xmm5 - punpcklwd 0x7eed,%xmm5 - -// CHECK: punpcklwd 3133065982, %xmm5 - punpcklwd 0xbabecafe,%xmm5 - -// CHECK: punpcklwd 305419896, %xmm5 - punpcklwd 0x12345678,%xmm5 - -// CHECK: punpcklwd %xmm5, %xmm5 - punpcklwd %xmm5,%xmm5 - -// CHECK: punpckldq 3735928559(%ebx,%ecx,8), %mm3 - punpckldq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: punpckldq 69, %mm3 - punpckldq 0x45,%mm3 - -// CHECK: punpckldq 32493, %mm3 - punpckldq 0x7eed,%mm3 - -// CHECK: punpckldq 3133065982, %mm3 - punpckldq 0xbabecafe,%mm3 - -// CHECK: punpckldq 305419896, %mm3 - punpckldq 0x12345678,%mm3 - -// CHECK: punpckldq %mm3, %mm3 - punpckldq %mm3,%mm3 - -// CHECK: punpckldq 3735928559(%ebx,%ecx,8), %xmm5 - punpckldq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: punpckldq 69, %xmm5 - punpckldq 0x45,%xmm5 - -// CHECK: punpckldq 32493, %xmm5 - punpckldq 0x7eed,%xmm5 - -// CHECK: punpckldq 3133065982, %xmm5 - punpckldq 0xbabecafe,%xmm5 - -// CHECK: punpckldq 305419896, %xmm5 - punpckldq 0x12345678,%xmm5 - -// CHECK: punpckldq %xmm5, %xmm5 - punpckldq %xmm5,%xmm5 - -// CHECK: pxor 3735928559(%ebx,%ecx,8), %mm3 - pxor 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pxor 69, %mm3 - pxor 0x45,%mm3 - -// CHECK: pxor 32493, %mm3 - pxor 0x7eed,%mm3 - -// CHECK: pxor 3133065982, %mm3 - pxor 0xbabecafe,%mm3 - -// CHECK: pxor 305419896, %mm3 - pxor 0x12345678,%mm3 - -// CHECK: pxor %mm3, %mm3 - pxor %mm3,%mm3 - -// CHECK: pxor 3735928559(%ebx,%ecx,8), %xmm5 - pxor 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pxor 69, %xmm5 - pxor 0x45,%xmm5 - -// CHECK: pxor 32493, %xmm5 - pxor 0x7eed,%xmm5 - -// CHECK: pxor 3133065982, %xmm5 - pxor 0xbabecafe,%xmm5 - -// CHECK: pxor 305419896, %xmm5 - pxor 0x12345678,%xmm5 - -// CHECK: pxor %xmm5, %xmm5 - pxor %xmm5,%xmm5 - -// CHECK: addps 3735928559(%ebx,%ecx,8), %xmm5 - addps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: addps 69, %xmm5 - addps 0x45,%xmm5 - -// CHECK: addps 32493, %xmm5 - addps 0x7eed,%xmm5 - -// CHECK: addps 3133065982, %xmm5 - addps 0xbabecafe,%xmm5 - -// CHECK: addps 305419896, %xmm5 - addps 0x12345678,%xmm5 - -// CHECK: addps %xmm5, %xmm5 - addps %xmm5,%xmm5 - -// CHECK: addss 3735928559(%ebx,%ecx,8), %xmm5 - addss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: addss 69, %xmm5 - addss 0x45,%xmm5 - -// CHECK: addss 32493, %xmm5 - addss 0x7eed,%xmm5 - -// CHECK: addss 3133065982, %xmm5 - addss 0xbabecafe,%xmm5 - -// CHECK: addss 305419896, %xmm5 - addss 0x12345678,%xmm5 - -// CHECK: addss %xmm5, %xmm5 - addss %xmm5,%xmm5 - -// CHECK: andnps 3735928559(%ebx,%ecx,8), %xmm5 - andnps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: andnps 69, %xmm5 - andnps 0x45,%xmm5 - -// CHECK: andnps 32493, %xmm5 - andnps 0x7eed,%xmm5 - -// CHECK: andnps 3133065982, %xmm5 - andnps 0xbabecafe,%xmm5 - -// CHECK: andnps 305419896, %xmm5 - andnps 0x12345678,%xmm5 - -// CHECK: andnps %xmm5, %xmm5 - andnps %xmm5,%xmm5 - -// CHECK: andps 3735928559(%ebx,%ecx,8), %xmm5 - andps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: andps 69, %xmm5 - andps 0x45,%xmm5 - -// CHECK: andps 32493, %xmm5 - andps 0x7eed,%xmm5 - -// CHECK: andps 3133065982, %xmm5 - andps 0xbabecafe,%xmm5 - -// CHECK: andps 305419896, %xmm5 - andps 0x12345678,%xmm5 - -// CHECK: andps %xmm5, %xmm5 - andps %xmm5,%xmm5 - -// CHECK: comiss 3735928559(%ebx,%ecx,8), %xmm5 - comiss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: comiss 69, %xmm5 - comiss 0x45,%xmm5 - -// CHECK: comiss 32493, %xmm5 - comiss 0x7eed,%xmm5 - -// CHECK: comiss 3133065982, %xmm5 - comiss 0xbabecafe,%xmm5 - -// CHECK: comiss 305419896, %xmm5 - comiss 0x12345678,%xmm5 - -// CHECK: comiss %xmm5, %xmm5 - comiss %xmm5,%xmm5 - -// CHECK: cvtpi2ps 3735928559(%ebx,%ecx,8), %xmm5 - cvtpi2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtpi2ps 69, %xmm5 - cvtpi2ps 0x45,%xmm5 - -// CHECK: cvtpi2ps 32493, %xmm5 - cvtpi2ps 0x7eed,%xmm5 - -// CHECK: cvtpi2ps 3133065982, %xmm5 - cvtpi2ps 0xbabecafe,%xmm5 - -// CHECK: cvtpi2ps 305419896, %xmm5 - cvtpi2ps 0x12345678,%xmm5 - -// CHECK: cvtpi2ps %mm3, %xmm5 - cvtpi2ps %mm3,%xmm5 - -// CHECK: cvtps2pi 3735928559(%ebx,%ecx,8), %mm3 - cvtps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: cvtps2pi 69, %mm3 - cvtps2pi 0x45,%mm3 - -// CHECK: cvtps2pi 32493, %mm3 - cvtps2pi 0x7eed,%mm3 - -// CHECK: cvtps2pi 3133065982, %mm3 - cvtps2pi 0xbabecafe,%mm3 - -// CHECK: cvtps2pi 305419896, %mm3 - cvtps2pi 0x12345678,%mm3 - -// CHECK: cvtps2pi %xmm5, %mm3 - cvtps2pi %xmm5,%mm3 - -// CHECK: cvtsi2ss %ecx, %xmm5 - cvtsi2ss %ecx,%xmm5 - -// CHECK: cvtsi2ss 3735928559(%ebx,%ecx,8), %xmm5 - cvtsi2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtsi2ss 69, %xmm5 - cvtsi2ss 0x45,%xmm5 - -// CHECK: cvtsi2ss 32493, %xmm5 - cvtsi2ss 0x7eed,%xmm5 - -// CHECK: cvtsi2ss 3133065982, %xmm5 - cvtsi2ss 0xbabecafe,%xmm5 - -// CHECK: cvtsi2ss 305419896, %xmm5 - cvtsi2ss 0x12345678,%xmm5 - -// CHECK: cvttps2pi 3735928559(%ebx,%ecx,8), %mm3 - cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: cvttps2pi 69, %mm3 - cvttps2pi 0x45,%mm3 - -// CHECK: cvttps2pi 32493, %mm3 - cvttps2pi 0x7eed,%mm3 - -// CHECK: cvttps2pi 3133065982, %mm3 - cvttps2pi 0xbabecafe,%mm3 - -// CHECK: cvttps2pi 305419896, %mm3 - cvttps2pi 0x12345678,%mm3 - -// CHECK: cvttps2pi %xmm5, %mm3 - cvttps2pi %xmm5,%mm3 - -// CHECK: cvttss2si 3735928559(%ebx,%ecx,8), %ecx - cvttss2si 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: cvttss2si 69, %ecx - cvttss2si 0x45,%ecx - -// CHECK: cvttss2si 32493, %ecx - cvttss2si 0x7eed,%ecx - -// CHECK: cvttss2si 3133065982, %ecx - cvttss2si 0xbabecafe,%ecx - -// CHECK: cvttss2si 305419896, %ecx - cvttss2si 0x12345678,%ecx - -// CHECK: cvttss2si %xmm5, %ecx - cvttss2si %xmm5,%ecx - -// CHECK: divps 3735928559(%ebx,%ecx,8), %xmm5 - divps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: divps 69, %xmm5 - divps 0x45,%xmm5 - -// CHECK: divps 32493, %xmm5 - divps 0x7eed,%xmm5 - -// CHECK: divps 3133065982, %xmm5 - divps 0xbabecafe,%xmm5 - -// CHECK: divps 305419896, %xmm5 - divps 0x12345678,%xmm5 - -// CHECK: divps %xmm5, %xmm5 - divps %xmm5,%xmm5 - -// CHECK: divss 3735928559(%ebx,%ecx,8), %xmm5 - divss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: divss 69, %xmm5 - divss 0x45,%xmm5 - -// CHECK: divss 32493, %xmm5 - divss 0x7eed,%xmm5 - -// CHECK: divss 3133065982, %xmm5 - divss 0xbabecafe,%xmm5 - -// CHECK: divss 305419896, %xmm5 - divss 0x12345678,%xmm5 - -// CHECK: divss %xmm5, %xmm5 - divss %xmm5,%xmm5 - -// CHECK: ldmxcsr 3735928559(%ebx,%ecx,8) - ldmxcsr 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: ldmxcsr 32493 - ldmxcsr 0x7eed - -// CHECK: ldmxcsr 3133065982 - ldmxcsr 0xbabecafe - -// CHECK: ldmxcsr 305419896 - ldmxcsr 0x12345678 - -// CHECK: maskmovq %mm3, %mm3 - maskmovq %mm3,%mm3 - -// CHECK: maxps 3735928559(%ebx,%ecx,8), %xmm5 - maxps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: maxps 69, %xmm5 - maxps 0x45,%xmm5 - -// CHECK: maxps 32493, %xmm5 - maxps 0x7eed,%xmm5 - -// CHECK: maxps 3133065982, %xmm5 - maxps 0xbabecafe,%xmm5 - -// CHECK: maxps 305419896, %xmm5 - maxps 0x12345678,%xmm5 - -// CHECK: maxps %xmm5, %xmm5 - maxps %xmm5,%xmm5 - -// CHECK: maxss 3735928559(%ebx,%ecx,8), %xmm5 - maxss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: maxss 69, %xmm5 - maxss 0x45,%xmm5 - -// CHECK: maxss 32493, %xmm5 - maxss 0x7eed,%xmm5 - -// CHECK: maxss 3133065982, %xmm5 - maxss 0xbabecafe,%xmm5 - -// CHECK: maxss 305419896, %xmm5 - maxss 0x12345678,%xmm5 - -// CHECK: maxss %xmm5, %xmm5 - maxss %xmm5,%xmm5 - -// CHECK: minps 3735928559(%ebx,%ecx,8), %xmm5 - minps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: minps 69, %xmm5 - minps 0x45,%xmm5 - -// CHECK: minps 32493, %xmm5 - minps 0x7eed,%xmm5 - -// CHECK: minps 3133065982, %xmm5 - minps 0xbabecafe,%xmm5 - -// CHECK: minps 305419896, %xmm5 - minps 0x12345678,%xmm5 - -// CHECK: minps %xmm5, %xmm5 - minps %xmm5,%xmm5 - -// CHECK: minss 3735928559(%ebx,%ecx,8), %xmm5 - minss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: minss 69, %xmm5 - minss 0x45,%xmm5 - -// CHECK: minss 32493, %xmm5 - minss 0x7eed,%xmm5 - -// CHECK: minss 3133065982, %xmm5 - minss 0xbabecafe,%xmm5 - -// CHECK: minss 305419896, %xmm5 - minss 0x12345678,%xmm5 - -// CHECK: minss %xmm5, %xmm5 - minss %xmm5,%xmm5 - -// CHECK: movaps 3735928559(%ebx,%ecx,8), %xmm5 - movaps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movaps 69, %xmm5 - movaps 0x45,%xmm5 - -// CHECK: movaps 32493, %xmm5 - movaps 0x7eed,%xmm5 - -// CHECK: movaps 3133065982, %xmm5 - movaps 0xbabecafe,%xmm5 - -// CHECK: movaps 305419896, %xmm5 - movaps 0x12345678,%xmm5 - -// CHECK: movaps %xmm5, %xmm5 - movaps %xmm5,%xmm5 - -// CHECK: movaps %xmm5, 3735928559(%ebx,%ecx,8) - movaps %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movaps %xmm5, 69 - movaps %xmm5,0x45 - -// CHECK: movaps %xmm5, 32493 - movaps %xmm5,0x7eed - -// CHECK: movaps %xmm5, 3133065982 - movaps %xmm5,0xbabecafe - -// CHECK: movaps %xmm5, 305419896 - movaps %xmm5,0x12345678 - -// CHECK: movaps %xmm5, %xmm5 - movaps %xmm5,%xmm5 - -// CHECK: movhlps %xmm5, %xmm5 - movhlps %xmm5,%xmm5 - -// CHECK: movhps 3735928559(%ebx,%ecx,8), %xmm5 - movhps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movhps 69, %xmm5 - movhps 0x45,%xmm5 - -// CHECK: movhps 32493, %xmm5 - movhps 0x7eed,%xmm5 - -// CHECK: movhps 3133065982, %xmm5 - movhps 0xbabecafe,%xmm5 - -// CHECK: movhps 305419896, %xmm5 - movhps 0x12345678,%xmm5 - -// CHECK: movhps %xmm5, 3735928559(%ebx,%ecx,8) - movhps %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movhps %xmm5, 69 - movhps %xmm5,0x45 - -// CHECK: movhps %xmm5, 32493 - movhps %xmm5,0x7eed - -// CHECK: movhps %xmm5, 3133065982 - movhps %xmm5,0xbabecafe - -// CHECK: movhps %xmm5, 305419896 - movhps %xmm5,0x12345678 - -// CHECK: movlhps %xmm5, %xmm5 - movlhps %xmm5,%xmm5 - -// CHECK: movlps 3735928559(%ebx,%ecx,8), %xmm5 - movlps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movlps 69, %xmm5 - movlps 0x45,%xmm5 - -// CHECK: movlps 32493, %xmm5 - movlps 0x7eed,%xmm5 - -// CHECK: movlps 3133065982, %xmm5 - movlps 0xbabecafe,%xmm5 - -// CHECK: movlps 305419896, %xmm5 - movlps 0x12345678,%xmm5 - -// CHECK: movlps %xmm5, 3735928559(%ebx,%ecx,8) - movlps %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movlps %xmm5, 69 - movlps %xmm5,0x45 - -// CHECK: movlps %xmm5, 32493 - movlps %xmm5,0x7eed - -// CHECK: movlps %xmm5, 3133065982 - movlps %xmm5,0xbabecafe - -// CHECK: movlps %xmm5, 305419896 - movlps %xmm5,0x12345678 - -// CHECK: movmskps %xmm5, %ecx - movmskps %xmm5,%ecx - -// CHECK: movntps %xmm5, 3735928559(%ebx,%ecx,8) - movntps %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movntps %xmm5, 69 - movntps %xmm5,0x45 - -// CHECK: movntps %xmm5, 32493 - movntps %xmm5,0x7eed - -// CHECK: movntps %xmm5, 3133065982 - movntps %xmm5,0xbabecafe - -// CHECK: movntps %xmm5, 305419896 - movntps %xmm5,0x12345678 - -// CHECK: movntq %mm3, 3735928559(%ebx,%ecx,8) - movntq %mm3,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movntq %mm3, 69 - movntq %mm3,0x45 - -// CHECK: movntq %mm3, 32493 - movntq %mm3,0x7eed - -// CHECK: movntq %mm3, 3133065982 - movntq %mm3,0xbabecafe - -// CHECK: movntq %mm3, 305419896 - movntq %mm3,0x12345678 - -// CHECK: movntdq %xmm5, 3735928559(%ebx,%ecx,8) - movntdq %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movntdq %xmm5, 69 - movntdq %xmm5,0x45 - -// CHECK: movntdq %xmm5, 32493 - movntdq %xmm5,0x7eed - -// CHECK: movntdq %xmm5, 3133065982 - movntdq %xmm5,0xbabecafe - -// CHECK: movntdq %xmm5, 305419896 - movntdq %xmm5,0x12345678 - -// CHECK: movss 3735928559(%ebx,%ecx,8), %xmm5 - movss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movss 69, %xmm5 - movss 0x45,%xmm5 - -// CHECK: movss 32493, %xmm5 - movss 0x7eed,%xmm5 - -// CHECK: movss 3133065982, %xmm5 - movss 0xbabecafe,%xmm5 - -// CHECK: movss 305419896, %xmm5 - movss 0x12345678,%xmm5 - -// CHECK: movss %xmm5, %xmm5 - movss %xmm5,%xmm5 - -// CHECK: movss %xmm5, 3735928559(%ebx,%ecx,8) - movss %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movss %xmm5, 69 - movss %xmm5,0x45 - -// CHECK: movss %xmm5, 32493 - movss %xmm5,0x7eed - -// CHECK: movss %xmm5, 3133065982 - movss %xmm5,0xbabecafe - -// CHECK: movss %xmm5, 305419896 - movss %xmm5,0x12345678 - -// CHECK: movss %xmm5, %xmm5 - movss %xmm5,%xmm5 - -// CHECK: movups 3735928559(%ebx,%ecx,8), %xmm5 - movups 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movups 69, %xmm5 - movups 0x45,%xmm5 - -// CHECK: movups 32493, %xmm5 - movups 0x7eed,%xmm5 - -// CHECK: movups 3133065982, %xmm5 - movups 0xbabecafe,%xmm5 - -// CHECK: movups 305419896, %xmm5 - movups 0x12345678,%xmm5 - -// CHECK: movups %xmm5, %xmm5 - movups %xmm5,%xmm5 - -// CHECK: movups %xmm5, 3735928559(%ebx,%ecx,8) - movups %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movups %xmm5, 69 - movups %xmm5,0x45 - -// CHECK: movups %xmm5, 32493 - movups %xmm5,0x7eed - -// CHECK: movups %xmm5, 3133065982 - movups %xmm5,0xbabecafe - -// CHECK: movups %xmm5, 305419896 - movups %xmm5,0x12345678 - -// CHECK: movups %xmm5, %xmm5 - movups %xmm5,%xmm5 - -// CHECK: mulps 3735928559(%ebx,%ecx,8), %xmm5 - mulps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: mulps 69, %xmm5 - mulps 0x45,%xmm5 - -// CHECK: mulps 32493, %xmm5 - mulps 0x7eed,%xmm5 - -// CHECK: mulps 3133065982, %xmm5 - mulps 0xbabecafe,%xmm5 - -// CHECK: mulps 305419896, %xmm5 - mulps 0x12345678,%xmm5 - -// CHECK: mulps %xmm5, %xmm5 - mulps %xmm5,%xmm5 - -// CHECK: mulss 3735928559(%ebx,%ecx,8), %xmm5 - mulss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: mulss 69, %xmm5 - mulss 0x45,%xmm5 - -// CHECK: mulss 32493, %xmm5 - mulss 0x7eed,%xmm5 - -// CHECK: mulss 3133065982, %xmm5 - mulss 0xbabecafe,%xmm5 - -// CHECK: mulss 305419896, %xmm5 - mulss 0x12345678,%xmm5 - -// CHECK: mulss %xmm5, %xmm5 - mulss %xmm5,%xmm5 - -// CHECK: orps 3735928559(%ebx,%ecx,8), %xmm5 - orps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: orps 69, %xmm5 - orps 0x45,%xmm5 - -// CHECK: orps 32493, %xmm5 - orps 0x7eed,%xmm5 - -// CHECK: orps 3133065982, %xmm5 - orps 0xbabecafe,%xmm5 - -// CHECK: orps 305419896, %xmm5 - orps 0x12345678,%xmm5 - -// CHECK: orps %xmm5, %xmm5 - orps %xmm5,%xmm5 - -// CHECK: pavgb 3735928559(%ebx,%ecx,8), %mm3 - pavgb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pavgb 69, %mm3 - pavgb 0x45,%mm3 - -// CHECK: pavgb 32493, %mm3 - pavgb 0x7eed,%mm3 - -// CHECK: pavgb 3133065982, %mm3 - pavgb 0xbabecafe,%mm3 - -// CHECK: pavgb 305419896, %mm3 - pavgb 0x12345678,%mm3 - -// CHECK: pavgb %mm3, %mm3 - pavgb %mm3,%mm3 - -// CHECK: pavgb 3735928559(%ebx,%ecx,8), %xmm5 - pavgb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pavgb 69, %xmm5 - pavgb 0x45,%xmm5 - -// CHECK: pavgb 32493, %xmm5 - pavgb 0x7eed,%xmm5 - -// CHECK: pavgb 3133065982, %xmm5 - pavgb 0xbabecafe,%xmm5 - -// CHECK: pavgb 305419896, %xmm5 - pavgb 0x12345678,%xmm5 - -// CHECK: pavgb %xmm5, %xmm5 - pavgb %xmm5,%xmm5 - -// CHECK: pavgw 3735928559(%ebx,%ecx,8), %mm3 - pavgw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pavgw 69, %mm3 - pavgw 0x45,%mm3 - -// CHECK: pavgw 32493, %mm3 - pavgw 0x7eed,%mm3 - -// CHECK: pavgw 3133065982, %mm3 - pavgw 0xbabecafe,%mm3 - -// CHECK: pavgw 305419896, %mm3 - pavgw 0x12345678,%mm3 - -// CHECK: pavgw %mm3, %mm3 - pavgw %mm3,%mm3 - -// CHECK: pavgw 3735928559(%ebx,%ecx,8), %xmm5 - pavgw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pavgw 69, %xmm5 - pavgw 0x45,%xmm5 - -// CHECK: pavgw 32493, %xmm5 - pavgw 0x7eed,%xmm5 - -// CHECK: pavgw 3133065982, %xmm5 - pavgw 0xbabecafe,%xmm5 - -// CHECK: pavgw 305419896, %xmm5 - pavgw 0x12345678,%xmm5 - -// CHECK: pavgw %xmm5, %xmm5 - pavgw %xmm5,%xmm5 - -// CHECK: pmaxsw 3735928559(%ebx,%ecx,8), %mm3 - pmaxsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmaxsw 69, %mm3 - pmaxsw 0x45,%mm3 - -// CHECK: pmaxsw 32493, %mm3 - pmaxsw 0x7eed,%mm3 - -// CHECK: pmaxsw 3133065982, %mm3 - pmaxsw 0xbabecafe,%mm3 - -// CHECK: pmaxsw 305419896, %mm3 - pmaxsw 0x12345678,%mm3 - -// CHECK: pmaxsw %mm3, %mm3 - pmaxsw %mm3,%mm3 - -// CHECK: pmaxsw 3735928559(%ebx,%ecx,8), %xmm5 - pmaxsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmaxsw 69, %xmm5 - pmaxsw 0x45,%xmm5 - -// CHECK: pmaxsw 32493, %xmm5 - pmaxsw 0x7eed,%xmm5 - -// CHECK: pmaxsw 3133065982, %xmm5 - pmaxsw 0xbabecafe,%xmm5 - -// CHECK: pmaxsw 305419896, %xmm5 - pmaxsw 0x12345678,%xmm5 - -// CHECK: pmaxsw %xmm5, %xmm5 - pmaxsw %xmm5,%xmm5 - -// CHECK: pmaxub 3735928559(%ebx,%ecx,8), %mm3 - pmaxub 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmaxub 69, %mm3 - pmaxub 0x45,%mm3 - -// CHECK: pmaxub 32493, %mm3 - pmaxub 0x7eed,%mm3 - -// CHECK: pmaxub 3133065982, %mm3 - pmaxub 0xbabecafe,%mm3 - -// CHECK: pmaxub 305419896, %mm3 - pmaxub 0x12345678,%mm3 - -// CHECK: pmaxub %mm3, %mm3 - pmaxub %mm3,%mm3 - -// CHECK: pmaxub 3735928559(%ebx,%ecx,8), %xmm5 - pmaxub 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmaxub 69, %xmm5 - pmaxub 0x45,%xmm5 - -// CHECK: pmaxub 32493, %xmm5 - pmaxub 0x7eed,%xmm5 - -// CHECK: pmaxub 3133065982, %xmm5 - pmaxub 0xbabecafe,%xmm5 - -// CHECK: pmaxub 305419896, %xmm5 - pmaxub 0x12345678,%xmm5 - -// CHECK: pmaxub %xmm5, %xmm5 - pmaxub %xmm5,%xmm5 - -// CHECK: pminsw 3735928559(%ebx,%ecx,8), %mm3 - pminsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pminsw 69, %mm3 - pminsw 0x45,%mm3 - -// CHECK: pminsw 32493, %mm3 - pminsw 0x7eed,%mm3 - -// CHECK: pminsw 3133065982, %mm3 - pminsw 0xbabecafe,%mm3 - -// CHECK: pminsw 305419896, %mm3 - pminsw 0x12345678,%mm3 - -// CHECK: pminsw %mm3, %mm3 - pminsw %mm3,%mm3 - -// CHECK: pminsw 3735928559(%ebx,%ecx,8), %xmm5 - pminsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pminsw 69, %xmm5 - pminsw 0x45,%xmm5 - -// CHECK: pminsw 32493, %xmm5 - pminsw 0x7eed,%xmm5 - -// CHECK: pminsw 3133065982, %xmm5 - pminsw 0xbabecafe,%xmm5 - -// CHECK: pminsw 305419896, %xmm5 - pminsw 0x12345678,%xmm5 - -// CHECK: pminsw %xmm5, %xmm5 - pminsw %xmm5,%xmm5 - -// CHECK: pminub 3735928559(%ebx,%ecx,8), %mm3 - pminub 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pminub 69, %mm3 - pminub 0x45,%mm3 - -// CHECK: pminub 32493, %mm3 - pminub 0x7eed,%mm3 - -// CHECK: pminub 3133065982, %mm3 - pminub 0xbabecafe,%mm3 - -// CHECK: pminub 305419896, %mm3 - pminub 0x12345678,%mm3 - -// CHECK: pminub %mm3, %mm3 - pminub %mm3,%mm3 - -// CHECK: pminub 3735928559(%ebx,%ecx,8), %xmm5 - pminub 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pminub 69, %xmm5 - pminub 0x45,%xmm5 - -// CHECK: pminub 32493, %xmm5 - pminub 0x7eed,%xmm5 - -// CHECK: pminub 3133065982, %xmm5 - pminub 0xbabecafe,%xmm5 - -// CHECK: pminub 305419896, %xmm5 - pminub 0x12345678,%xmm5 - -// CHECK: pminub %xmm5, %xmm5 - pminub %xmm5,%xmm5 - -// CHECK: pmovmskb %mm3, %ecx - pmovmskb %mm3,%ecx - -// CHECK: pmovmskb %xmm5, %ecx - pmovmskb %xmm5,%ecx - -// CHECK: pmulhuw 3735928559(%ebx,%ecx,8), %mm3 - pmulhuw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmulhuw 69, %mm3 - pmulhuw 0x45,%mm3 - -// CHECK: pmulhuw 32493, %mm3 - pmulhuw 0x7eed,%mm3 - -// CHECK: pmulhuw 3133065982, %mm3 - pmulhuw 0xbabecafe,%mm3 - -// CHECK: pmulhuw 305419896, %mm3 - pmulhuw 0x12345678,%mm3 - -// CHECK: pmulhuw %mm3, %mm3 - pmulhuw %mm3,%mm3 - -// CHECK: pmulhuw 3735928559(%ebx,%ecx,8), %xmm5 - pmulhuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmulhuw 69, %xmm5 - pmulhuw 0x45,%xmm5 - -// CHECK: pmulhuw 32493, %xmm5 - pmulhuw 0x7eed,%xmm5 - -// CHECK: pmulhuw 3133065982, %xmm5 - pmulhuw 0xbabecafe,%xmm5 - -// CHECK: pmulhuw 305419896, %xmm5 - pmulhuw 0x12345678,%xmm5 - -// CHECK: pmulhuw %xmm5, %xmm5 - pmulhuw %xmm5,%xmm5 - -// CHECK: prefetchnta 3735928559(%ebx,%ecx,8) - prefetchnta 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: prefetchnta 32493 - prefetchnta 0x7eed - -// CHECK: prefetchnta 3133065982 - prefetchnta 0xbabecafe - -// CHECK: prefetchnta 305419896 - prefetchnta 0x12345678 - -// CHECK: prefetcht0 3735928559(%ebx,%ecx,8) - prefetcht0 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: prefetcht0 32493 - prefetcht0 0x7eed - -// CHECK: prefetcht0 3133065982 - prefetcht0 0xbabecafe - -// CHECK: prefetcht0 305419896 - prefetcht0 0x12345678 - -// CHECK: prefetcht1 3735928559(%ebx,%ecx,8) - prefetcht1 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: prefetcht1 32493 - prefetcht1 0x7eed - -// CHECK: prefetcht1 3133065982 - prefetcht1 0xbabecafe - -// CHECK: prefetcht1 305419896 - prefetcht1 0x12345678 - -// CHECK: prefetcht2 3735928559(%ebx,%ecx,8) - prefetcht2 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: prefetcht2 32493 - prefetcht2 0x7eed - -// CHECK: prefetcht2 3133065982 - prefetcht2 0xbabecafe - -// CHECK: prefetcht2 305419896 - prefetcht2 0x12345678 - -// CHECK: psadbw 3735928559(%ebx,%ecx,8), %mm3 - psadbw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psadbw 69, %mm3 - psadbw 0x45,%mm3 - -// CHECK: psadbw 32493, %mm3 - psadbw 0x7eed,%mm3 - -// CHECK: psadbw 3133065982, %mm3 - psadbw 0xbabecafe,%mm3 - -// CHECK: psadbw 305419896, %mm3 - psadbw 0x12345678,%mm3 - -// CHECK: psadbw %mm3, %mm3 - psadbw %mm3,%mm3 - -// CHECK: psadbw 3735928559(%ebx,%ecx,8), %xmm5 - psadbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psadbw 69, %xmm5 - psadbw 0x45,%xmm5 - -// CHECK: psadbw 32493, %xmm5 - psadbw 0x7eed,%xmm5 - -// CHECK: psadbw 3133065982, %xmm5 - psadbw 0xbabecafe,%xmm5 - -// CHECK: psadbw 305419896, %xmm5 - psadbw 0x12345678,%xmm5 - -// CHECK: psadbw %xmm5, %xmm5 - psadbw %xmm5,%xmm5 - -// CHECK: rcpps 3735928559(%ebx,%ecx,8), %xmm5 - rcpps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: rcpps 69, %xmm5 - rcpps 0x45,%xmm5 - -// CHECK: rcpps 32493, %xmm5 - rcpps 0x7eed,%xmm5 - -// CHECK: rcpps 3133065982, %xmm5 - rcpps 0xbabecafe,%xmm5 - -// CHECK: rcpps 305419896, %xmm5 - rcpps 0x12345678,%xmm5 - -// CHECK: rcpps %xmm5, %xmm5 - rcpps %xmm5,%xmm5 - -// CHECK: rcpss 3735928559(%ebx,%ecx,8), %xmm5 - rcpss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: rcpss 69, %xmm5 - rcpss 0x45,%xmm5 - -// CHECK: rcpss 32493, %xmm5 - rcpss 0x7eed,%xmm5 - -// CHECK: rcpss 3133065982, %xmm5 - rcpss 0xbabecafe,%xmm5 - -// CHECK: rcpss 305419896, %xmm5 - rcpss 0x12345678,%xmm5 - -// CHECK: rcpss %xmm5, %xmm5 - rcpss %xmm5,%xmm5 - -// CHECK: rsqrtps 3735928559(%ebx,%ecx,8), %xmm5 - rsqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: rsqrtps 69, %xmm5 - rsqrtps 0x45,%xmm5 - -// CHECK: rsqrtps 32493, %xmm5 - rsqrtps 0x7eed,%xmm5 - -// CHECK: rsqrtps 3133065982, %xmm5 - rsqrtps 0xbabecafe,%xmm5 - -// CHECK: rsqrtps 305419896, %xmm5 - rsqrtps 0x12345678,%xmm5 - -// CHECK: rsqrtps %xmm5, %xmm5 - rsqrtps %xmm5,%xmm5 - -// CHECK: rsqrtss 3735928559(%ebx,%ecx,8), %xmm5 - rsqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: rsqrtss 69, %xmm5 - rsqrtss 0x45,%xmm5 - -// CHECK: rsqrtss 32493, %xmm5 - rsqrtss 0x7eed,%xmm5 - -// CHECK: rsqrtss 3133065982, %xmm5 - rsqrtss 0xbabecafe,%xmm5 - -// CHECK: rsqrtss 305419896, %xmm5 - rsqrtss 0x12345678,%xmm5 - -// CHECK: rsqrtss %xmm5, %xmm5 - rsqrtss %xmm5,%xmm5 - -// CHECK: sfence - sfence - -// CHECK: sqrtps 3735928559(%ebx,%ecx,8), %xmm5 - sqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: sqrtps 69, %xmm5 - sqrtps 0x45,%xmm5 - -// CHECK: sqrtps 32493, %xmm5 - sqrtps 0x7eed,%xmm5 - -// CHECK: sqrtps 3133065982, %xmm5 - sqrtps 0xbabecafe,%xmm5 - -// CHECK: sqrtps 305419896, %xmm5 - sqrtps 0x12345678,%xmm5 - -// CHECK: sqrtps %xmm5, %xmm5 - sqrtps %xmm5,%xmm5 - -// CHECK: sqrtss 3735928559(%ebx,%ecx,8), %xmm5 - sqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: sqrtss 69, %xmm5 - sqrtss 0x45,%xmm5 - -// CHECK: sqrtss 32493, %xmm5 - sqrtss 0x7eed,%xmm5 - -// CHECK: sqrtss 3133065982, %xmm5 - sqrtss 0xbabecafe,%xmm5 - -// CHECK: sqrtss 305419896, %xmm5 - sqrtss 0x12345678,%xmm5 - -// CHECK: sqrtss %xmm5, %xmm5 - sqrtss %xmm5,%xmm5 - -// CHECK: stmxcsr 3735928559(%ebx,%ecx,8) - stmxcsr 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: stmxcsr 32493 - stmxcsr 0x7eed - -// CHECK: stmxcsr 3133065982 - stmxcsr 0xbabecafe - -// CHECK: stmxcsr 305419896 - stmxcsr 0x12345678 - -// CHECK: subps 3735928559(%ebx,%ecx,8), %xmm5 - subps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: subps 69, %xmm5 - subps 0x45,%xmm5 - -// CHECK: subps 32493, %xmm5 - subps 0x7eed,%xmm5 - -// CHECK: subps 3133065982, %xmm5 - subps 0xbabecafe,%xmm5 - -// CHECK: subps 305419896, %xmm5 - subps 0x12345678,%xmm5 - -// CHECK: subps %xmm5, %xmm5 - subps %xmm5,%xmm5 - -// CHECK: subss 3735928559(%ebx,%ecx,8), %xmm5 - subss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: subss 69, %xmm5 - subss 0x45,%xmm5 - -// CHECK: subss 32493, %xmm5 - subss 0x7eed,%xmm5 - -// CHECK: subss 3133065982, %xmm5 - subss 0xbabecafe,%xmm5 - -// CHECK: subss 305419896, %xmm5 - subss 0x12345678,%xmm5 - -// CHECK: subss %xmm5, %xmm5 - subss %xmm5,%xmm5 - -// CHECK: ucomiss 3735928559(%ebx,%ecx,8), %xmm5 - ucomiss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: ucomiss 69, %xmm5 - ucomiss 0x45,%xmm5 - -// CHECK: ucomiss 32493, %xmm5 - ucomiss 0x7eed,%xmm5 - -// CHECK: ucomiss 3133065982, %xmm5 - ucomiss 0xbabecafe,%xmm5 - -// CHECK: ucomiss 305419896, %xmm5 - ucomiss 0x12345678,%xmm5 - -// CHECK: ucomiss %xmm5, %xmm5 - ucomiss %xmm5,%xmm5 - -// CHECK: unpckhps 3735928559(%ebx,%ecx,8), %xmm5 - unpckhps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: unpckhps 69, %xmm5 - unpckhps 0x45,%xmm5 - -// CHECK: unpckhps 32493, %xmm5 - unpckhps 0x7eed,%xmm5 - -// CHECK: unpckhps 3133065982, %xmm5 - unpckhps 0xbabecafe,%xmm5 - -// CHECK: unpckhps 305419896, %xmm5 - unpckhps 0x12345678,%xmm5 - -// CHECK: unpckhps %xmm5, %xmm5 - unpckhps %xmm5,%xmm5 - -// CHECK: unpcklps 3735928559(%ebx,%ecx,8), %xmm5 - unpcklps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: unpcklps 69, %xmm5 - unpcklps 0x45,%xmm5 - -// CHECK: unpcklps 32493, %xmm5 - unpcklps 0x7eed,%xmm5 - -// CHECK: unpcklps 3133065982, %xmm5 - unpcklps 0xbabecafe,%xmm5 - -// CHECK: unpcklps 305419896, %xmm5 - unpcklps 0x12345678,%xmm5 - -// CHECK: unpcklps %xmm5, %xmm5 - unpcklps %xmm5,%xmm5 - -// CHECK: xorps 3735928559(%ebx,%ecx,8), %xmm5 - xorps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: xorps 69, %xmm5 - xorps 0x45,%xmm5 - -// CHECK: xorps 32493, %xmm5 - xorps 0x7eed,%xmm5 - -// CHECK: xorps 3133065982, %xmm5 - xorps 0xbabecafe,%xmm5 - -// CHECK: xorps 305419896, %xmm5 - xorps 0x12345678,%xmm5 - -// CHECK: xorps %xmm5, %xmm5 - xorps %xmm5,%xmm5 - -// CHECK: addpd 3735928559(%ebx,%ecx,8), %xmm5 - addpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: addpd 69, %xmm5 - addpd 0x45,%xmm5 - -// CHECK: addpd 32493, %xmm5 - addpd 0x7eed,%xmm5 - -// CHECK: addpd 3133065982, %xmm5 - addpd 0xbabecafe,%xmm5 - -// CHECK: addpd 305419896, %xmm5 - addpd 0x12345678,%xmm5 - -// CHECK: addpd %xmm5, %xmm5 - addpd %xmm5,%xmm5 - -// CHECK: addsd 3735928559(%ebx,%ecx,8), %xmm5 - addsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: addsd 69, %xmm5 - addsd 0x45,%xmm5 - -// CHECK: addsd 32493, %xmm5 - addsd 0x7eed,%xmm5 - -// CHECK: addsd 3133065982, %xmm5 - addsd 0xbabecafe,%xmm5 - -// CHECK: addsd 305419896, %xmm5 - addsd 0x12345678,%xmm5 - -// CHECK: addsd %xmm5, %xmm5 - addsd %xmm5,%xmm5 - -// CHECK: andnpd 3735928559(%ebx,%ecx,8), %xmm5 - andnpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: andnpd 69, %xmm5 - andnpd 0x45,%xmm5 - -// CHECK: andnpd 32493, %xmm5 - andnpd 0x7eed,%xmm5 - -// CHECK: andnpd 3133065982, %xmm5 - andnpd 0xbabecafe,%xmm5 - -// CHECK: andnpd 305419896, %xmm5 - andnpd 0x12345678,%xmm5 - -// CHECK: andnpd %xmm5, %xmm5 - andnpd %xmm5,%xmm5 - -// CHECK: andpd 3735928559(%ebx,%ecx,8), %xmm5 - andpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: andpd 69, %xmm5 - andpd 0x45,%xmm5 - -// CHECK: andpd 32493, %xmm5 - andpd 0x7eed,%xmm5 - -// CHECK: andpd 3133065982, %xmm5 - andpd 0xbabecafe,%xmm5 - -// CHECK: andpd 305419896, %xmm5 - andpd 0x12345678,%xmm5 - -// CHECK: andpd %xmm5, %xmm5 - andpd %xmm5,%xmm5 - -// CHECK: comisd 3735928559(%ebx,%ecx,8), %xmm5 - comisd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: comisd 69, %xmm5 - comisd 0x45,%xmm5 - -// CHECK: comisd 32493, %xmm5 - comisd 0x7eed,%xmm5 - -// CHECK: comisd 3133065982, %xmm5 - comisd 0xbabecafe,%xmm5 - -// CHECK: comisd 305419896, %xmm5 - comisd 0x12345678,%xmm5 - -// CHECK: comisd %xmm5, %xmm5 - comisd %xmm5,%xmm5 - -// CHECK: cvtpi2pd 3735928559(%ebx,%ecx,8), %xmm5 - cvtpi2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtpi2pd 69, %xmm5 - cvtpi2pd 0x45,%xmm5 - -// CHECK: cvtpi2pd 32493, %xmm5 - cvtpi2pd 0x7eed,%xmm5 - -// CHECK: cvtpi2pd 3133065982, %xmm5 - cvtpi2pd 0xbabecafe,%xmm5 - -// CHECK: cvtpi2pd 305419896, %xmm5 - cvtpi2pd 0x12345678,%xmm5 - -// CHECK: cvtpi2pd %mm3, %xmm5 - cvtpi2pd %mm3,%xmm5 - -// CHECK: cvtsi2sd %ecx, %xmm5 - cvtsi2sd %ecx,%xmm5 - -// CHECK: cvtsi2sd 3735928559(%ebx,%ecx,8), %xmm5 - cvtsi2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtsi2sd 69, %xmm5 - cvtsi2sd 0x45,%xmm5 - -// CHECK: cvtsi2sd 32493, %xmm5 - cvtsi2sd 0x7eed,%xmm5 - -// CHECK: cvtsi2sd 3133065982, %xmm5 - cvtsi2sd 0xbabecafe,%xmm5 - -// CHECK: cvtsi2sd 305419896, %xmm5 - cvtsi2sd 0x12345678,%xmm5 - -// CHECK: divpd 3735928559(%ebx,%ecx,8), %xmm5 - divpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: divpd 69, %xmm5 - divpd 0x45,%xmm5 - -// CHECK: divpd 32493, %xmm5 - divpd 0x7eed,%xmm5 - -// CHECK: divpd 3133065982, %xmm5 - divpd 0xbabecafe,%xmm5 - -// CHECK: divpd 305419896, %xmm5 - divpd 0x12345678,%xmm5 - -// CHECK: divpd %xmm5, %xmm5 - divpd %xmm5,%xmm5 - -// CHECK: divsd 3735928559(%ebx,%ecx,8), %xmm5 - divsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: divsd 69, %xmm5 - divsd 0x45,%xmm5 - -// CHECK: divsd 32493, %xmm5 - divsd 0x7eed,%xmm5 - -// CHECK: divsd 3133065982, %xmm5 - divsd 0xbabecafe,%xmm5 - -// CHECK: divsd 305419896, %xmm5 - divsd 0x12345678,%xmm5 - -// CHECK: divsd %xmm5, %xmm5 - divsd %xmm5,%xmm5 - -// CHECK: maxpd 3735928559(%ebx,%ecx,8), %xmm5 - maxpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: maxpd 69, %xmm5 - maxpd 0x45,%xmm5 - -// CHECK: maxpd 32493, %xmm5 - maxpd 0x7eed,%xmm5 - -// CHECK: maxpd 3133065982, %xmm5 - maxpd 0xbabecafe,%xmm5 - -// CHECK: maxpd 305419896, %xmm5 - maxpd 0x12345678,%xmm5 - -// CHECK: maxpd %xmm5, %xmm5 - maxpd %xmm5,%xmm5 - -// CHECK: maxsd 3735928559(%ebx,%ecx,8), %xmm5 - maxsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: maxsd 69, %xmm5 - maxsd 0x45,%xmm5 - -// CHECK: maxsd 32493, %xmm5 - maxsd 0x7eed,%xmm5 - -// CHECK: maxsd 3133065982, %xmm5 - maxsd 0xbabecafe,%xmm5 - -// CHECK: maxsd 305419896, %xmm5 - maxsd 0x12345678,%xmm5 - -// CHECK: maxsd %xmm5, %xmm5 - maxsd %xmm5,%xmm5 - -// CHECK: minpd 3735928559(%ebx,%ecx,8), %xmm5 - minpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: minpd 69, %xmm5 - minpd 0x45,%xmm5 - -// CHECK: minpd 32493, %xmm5 - minpd 0x7eed,%xmm5 - -// CHECK: minpd 3133065982, %xmm5 - minpd 0xbabecafe,%xmm5 - -// CHECK: minpd 305419896, %xmm5 - minpd 0x12345678,%xmm5 - -// CHECK: minpd %xmm5, %xmm5 - minpd %xmm5,%xmm5 - -// CHECK: minsd 3735928559(%ebx,%ecx,8), %xmm5 - minsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: minsd 69, %xmm5 - minsd 0x45,%xmm5 - -// CHECK: minsd 32493, %xmm5 - minsd 0x7eed,%xmm5 - -// CHECK: minsd 3133065982, %xmm5 - minsd 0xbabecafe,%xmm5 - -// CHECK: minsd 305419896, %xmm5 - minsd 0x12345678,%xmm5 - -// CHECK: minsd %xmm5, %xmm5 - minsd %xmm5,%xmm5 - -// CHECK: movapd 3735928559(%ebx,%ecx,8), %xmm5 - movapd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movapd 69, %xmm5 - movapd 0x45,%xmm5 - -// CHECK: movapd 32493, %xmm5 - movapd 0x7eed,%xmm5 - -// CHECK: movapd 3133065982, %xmm5 - movapd 0xbabecafe,%xmm5 - -// CHECK: movapd 305419896, %xmm5 - movapd 0x12345678,%xmm5 - -// CHECK: movapd %xmm5, %xmm5 - movapd %xmm5,%xmm5 - -// CHECK: movapd %xmm5, 3735928559(%ebx,%ecx,8) - movapd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movapd %xmm5, 69 - movapd %xmm5,0x45 - -// CHECK: movapd %xmm5, 32493 - movapd %xmm5,0x7eed - -// CHECK: movapd %xmm5, 3133065982 - movapd %xmm5,0xbabecafe - -// CHECK: movapd %xmm5, 305419896 - movapd %xmm5,0x12345678 - -// CHECK: movapd %xmm5, %xmm5 - movapd %xmm5,%xmm5 - -// CHECK: movhpd 3735928559(%ebx,%ecx,8), %xmm5 - movhpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movhpd 69, %xmm5 - movhpd 0x45,%xmm5 - -// CHECK: movhpd 32493, %xmm5 - movhpd 0x7eed,%xmm5 - -// CHECK: movhpd 3133065982, %xmm5 - movhpd 0xbabecafe,%xmm5 - -// CHECK: movhpd 305419896, %xmm5 - movhpd 0x12345678,%xmm5 - -// CHECK: movhpd %xmm5, 3735928559(%ebx,%ecx,8) - movhpd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movhpd %xmm5, 69 - movhpd %xmm5,0x45 - -// CHECK: movhpd %xmm5, 32493 - movhpd %xmm5,0x7eed - -// CHECK: movhpd %xmm5, 3133065982 - movhpd %xmm5,0xbabecafe - -// CHECK: movhpd %xmm5, 305419896 - movhpd %xmm5,0x12345678 - -// CHECK: movlpd 3735928559(%ebx,%ecx,8), %xmm5 - movlpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movlpd 69, %xmm5 - movlpd 0x45,%xmm5 - -// CHECK: movlpd 32493, %xmm5 - movlpd 0x7eed,%xmm5 - -// CHECK: movlpd 3133065982, %xmm5 - movlpd 0xbabecafe,%xmm5 - -// CHECK: movlpd 305419896, %xmm5 - movlpd 0x12345678,%xmm5 - -// CHECK: movlpd %xmm5, 3735928559(%ebx,%ecx,8) - movlpd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movlpd %xmm5, 69 - movlpd %xmm5,0x45 - -// CHECK: movlpd %xmm5, 32493 - movlpd %xmm5,0x7eed - -// CHECK: movlpd %xmm5, 3133065982 - movlpd %xmm5,0xbabecafe - -// CHECK: movlpd %xmm5, 305419896 - movlpd %xmm5,0x12345678 - -// CHECK: movmskpd %xmm5, %ecx - movmskpd %xmm5,%ecx - -// CHECK: movntpd %xmm5, 3735928559(%ebx,%ecx,8) - movntpd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movntpd %xmm5, 69 - movntpd %xmm5,0x45 - -// CHECK: movntpd %xmm5, 32493 - movntpd %xmm5,0x7eed - -// CHECK: movntpd %xmm5, 3133065982 - movntpd %xmm5,0xbabecafe - -// CHECK: movntpd %xmm5, 305419896 - movntpd %xmm5,0x12345678 - -// CHECK: movsd 3735928559(%ebx,%ecx,8), %xmm5 - movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movsd 69, %xmm5 - movsd 0x45,%xmm5 - -// CHECK: movsd 32493, %xmm5 - movsd 0x7eed,%xmm5 - -// CHECK: movsd 3133065982, %xmm5 - movsd 0xbabecafe,%xmm5 - -// CHECK: movsd 305419896, %xmm5 - movsd 0x12345678,%xmm5 - -// CHECK: movsd %xmm5, %xmm5 - movsd %xmm5,%xmm5 - -// CHECK: movsd %xmm5, 3735928559(%ebx,%ecx,8) - movsd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movsd %xmm5, 69 - movsd %xmm5,0x45 - -// CHECK: movsd %xmm5, 32493 - movsd %xmm5,0x7eed - -// CHECK: movsd %xmm5, 3133065982 - movsd %xmm5,0xbabecafe - -// CHECK: movsd %xmm5, 305419896 - movsd %xmm5,0x12345678 - -// CHECK: movsd %xmm5, %xmm5 - movsd %xmm5,%xmm5 - -// CHECK: movupd 3735928559(%ebx,%ecx,8), %xmm5 - movupd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movupd 69, %xmm5 - movupd 0x45,%xmm5 - -// CHECK: movupd 32493, %xmm5 - movupd 0x7eed,%xmm5 - -// CHECK: movupd 3133065982, %xmm5 - movupd 0xbabecafe,%xmm5 - -// CHECK: movupd 305419896, %xmm5 - movupd 0x12345678,%xmm5 - -// CHECK: movupd %xmm5, %xmm5 - movupd %xmm5,%xmm5 - -// CHECK: movupd %xmm5, 3735928559(%ebx,%ecx,8) - movupd %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movupd %xmm5, 69 - movupd %xmm5,0x45 - -// CHECK: movupd %xmm5, 32493 - movupd %xmm5,0x7eed - -// CHECK: movupd %xmm5, 3133065982 - movupd %xmm5,0xbabecafe - -// CHECK: movupd %xmm5, 305419896 - movupd %xmm5,0x12345678 - -// CHECK: movupd %xmm5, %xmm5 - movupd %xmm5,%xmm5 - -// CHECK: mulpd 3735928559(%ebx,%ecx,8), %xmm5 - mulpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: mulpd 69, %xmm5 - mulpd 0x45,%xmm5 - -// CHECK: mulpd 32493, %xmm5 - mulpd 0x7eed,%xmm5 - -// CHECK: mulpd 3133065982, %xmm5 - mulpd 0xbabecafe,%xmm5 - -// CHECK: mulpd 305419896, %xmm5 - mulpd 0x12345678,%xmm5 - -// CHECK: mulpd %xmm5, %xmm5 - mulpd %xmm5,%xmm5 - -// CHECK: mulsd 3735928559(%ebx,%ecx,8), %xmm5 - mulsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: mulsd 69, %xmm5 - mulsd 0x45,%xmm5 - -// CHECK: mulsd 32493, %xmm5 - mulsd 0x7eed,%xmm5 - -// CHECK: mulsd 3133065982, %xmm5 - mulsd 0xbabecafe,%xmm5 - -// CHECK: mulsd 305419896, %xmm5 - mulsd 0x12345678,%xmm5 - -// CHECK: mulsd %xmm5, %xmm5 - mulsd %xmm5,%xmm5 - -// CHECK: orpd 3735928559(%ebx,%ecx,8), %xmm5 - orpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: orpd 69, %xmm5 - orpd 0x45,%xmm5 - -// CHECK: orpd 32493, %xmm5 - orpd 0x7eed,%xmm5 - -// CHECK: orpd 3133065982, %xmm5 - orpd 0xbabecafe,%xmm5 - -// CHECK: orpd 305419896, %xmm5 - orpd 0x12345678,%xmm5 - -// CHECK: orpd %xmm5, %xmm5 - orpd %xmm5,%xmm5 - -// CHECK: sqrtpd 3735928559(%ebx,%ecx,8), %xmm5 - sqrtpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: sqrtpd 69, %xmm5 - sqrtpd 0x45,%xmm5 - -// CHECK: sqrtpd 32493, %xmm5 - sqrtpd 0x7eed,%xmm5 - -// CHECK: sqrtpd 3133065982, %xmm5 - sqrtpd 0xbabecafe,%xmm5 - -// CHECK: sqrtpd 305419896, %xmm5 - sqrtpd 0x12345678,%xmm5 - -// CHECK: sqrtpd %xmm5, %xmm5 - sqrtpd %xmm5,%xmm5 - -// CHECK: sqrtsd 3735928559(%ebx,%ecx,8), %xmm5 - sqrtsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: sqrtsd 69, %xmm5 - sqrtsd 0x45,%xmm5 - -// CHECK: sqrtsd 32493, %xmm5 - sqrtsd 0x7eed,%xmm5 - -// CHECK: sqrtsd 3133065982, %xmm5 - sqrtsd 0xbabecafe,%xmm5 - -// CHECK: sqrtsd 305419896, %xmm5 - sqrtsd 0x12345678,%xmm5 - -// CHECK: sqrtsd %xmm5, %xmm5 - sqrtsd %xmm5,%xmm5 - -// CHECK: subpd 3735928559(%ebx,%ecx,8), %xmm5 - subpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: subpd 69, %xmm5 - subpd 0x45,%xmm5 - -// CHECK: subpd 32493, %xmm5 - subpd 0x7eed,%xmm5 - -// CHECK: subpd 3133065982, %xmm5 - subpd 0xbabecafe,%xmm5 - -// CHECK: subpd 305419896, %xmm5 - subpd 0x12345678,%xmm5 - -// CHECK: subpd %xmm5, %xmm5 - subpd %xmm5,%xmm5 - -// CHECK: subsd 3735928559(%ebx,%ecx,8), %xmm5 - subsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: subsd 69, %xmm5 - subsd 0x45,%xmm5 - -// CHECK: subsd 32493, %xmm5 - subsd 0x7eed,%xmm5 - -// CHECK: subsd 3133065982, %xmm5 - subsd 0xbabecafe,%xmm5 - -// CHECK: subsd 305419896, %xmm5 - subsd 0x12345678,%xmm5 - -// CHECK: subsd %xmm5, %xmm5 - subsd %xmm5,%xmm5 - -// CHECK: ucomisd 3735928559(%ebx,%ecx,8), %xmm5 - ucomisd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: ucomisd 69, %xmm5 - ucomisd 0x45,%xmm5 - -// CHECK: ucomisd 32493, %xmm5 - ucomisd 0x7eed,%xmm5 - -// CHECK: ucomisd 3133065982, %xmm5 - ucomisd 0xbabecafe,%xmm5 - -// CHECK: ucomisd 305419896, %xmm5 - ucomisd 0x12345678,%xmm5 - -// CHECK: ucomisd %xmm5, %xmm5 - ucomisd %xmm5,%xmm5 - -// CHECK: unpckhpd 3735928559(%ebx,%ecx,8), %xmm5 - unpckhpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: unpckhpd 69, %xmm5 - unpckhpd 0x45,%xmm5 - -// CHECK: unpckhpd 32493, %xmm5 - unpckhpd 0x7eed,%xmm5 - -// CHECK: unpckhpd 3133065982, %xmm5 - unpckhpd 0xbabecafe,%xmm5 - -// CHECK: unpckhpd 305419896, %xmm5 - unpckhpd 0x12345678,%xmm5 - -// CHECK: unpckhpd %xmm5, %xmm5 - unpckhpd %xmm5,%xmm5 - -// CHECK: unpcklpd 3735928559(%ebx,%ecx,8), %xmm5 - unpcklpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: unpcklpd 69, %xmm5 - unpcklpd 0x45,%xmm5 - -// CHECK: unpcklpd 32493, %xmm5 - unpcklpd 0x7eed,%xmm5 - -// CHECK: unpcklpd 3133065982, %xmm5 - unpcklpd 0xbabecafe,%xmm5 - -// CHECK: unpcklpd 305419896, %xmm5 - unpcklpd 0x12345678,%xmm5 - -// CHECK: unpcklpd %xmm5, %xmm5 - unpcklpd %xmm5,%xmm5 - -// CHECK: xorpd 3735928559(%ebx,%ecx,8), %xmm5 - xorpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: xorpd 69, %xmm5 - xorpd 0x45,%xmm5 - -// CHECK: xorpd 32493, %xmm5 - xorpd 0x7eed,%xmm5 - -// CHECK: xorpd 3133065982, %xmm5 - xorpd 0xbabecafe,%xmm5 - -// CHECK: xorpd 305419896, %xmm5 - xorpd 0x12345678,%xmm5 - -// CHECK: xorpd %xmm5, %xmm5 - xorpd %xmm5,%xmm5 - -// CHECK: cvtdq2pd 3735928559(%ebx,%ecx,8), %xmm5 - cvtdq2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtdq2pd 69, %xmm5 - cvtdq2pd 0x45,%xmm5 - -// CHECK: cvtdq2pd 32493, %xmm5 - cvtdq2pd 0x7eed,%xmm5 - -// CHECK: cvtdq2pd 3133065982, %xmm5 - cvtdq2pd 0xbabecafe,%xmm5 - -// CHECK: cvtdq2pd 305419896, %xmm5 - cvtdq2pd 0x12345678,%xmm5 - -// CHECK: cvtdq2pd %xmm5, %xmm5 - cvtdq2pd %xmm5,%xmm5 - -// CHECK: cvtpd2dq 3735928559(%ebx,%ecx,8), %xmm5 - cvtpd2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtpd2dq 69, %xmm5 - cvtpd2dq 0x45,%xmm5 - -// CHECK: cvtpd2dq 32493, %xmm5 - cvtpd2dq 0x7eed,%xmm5 - -// CHECK: cvtpd2dq 3133065982, %xmm5 - cvtpd2dq 0xbabecafe,%xmm5 - -// CHECK: cvtpd2dq 305419896, %xmm5 - cvtpd2dq 0x12345678,%xmm5 - -// CHECK: cvtpd2dq %xmm5, %xmm5 - cvtpd2dq %xmm5,%xmm5 - -// CHECK: cvtdq2ps 3735928559(%ebx,%ecx,8), %xmm5 - cvtdq2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtdq2ps 69, %xmm5 - cvtdq2ps 0x45,%xmm5 - -// CHECK: cvtdq2ps 32493, %xmm5 - cvtdq2ps 0x7eed,%xmm5 - -// CHECK: cvtdq2ps 3133065982, %xmm5 - cvtdq2ps 0xbabecafe,%xmm5 - -// CHECK: cvtdq2ps 305419896, %xmm5 - cvtdq2ps 0x12345678,%xmm5 - -// CHECK: cvtdq2ps %xmm5, %xmm5 - cvtdq2ps %xmm5,%xmm5 - -// CHECK: cvtpd2pi 3735928559(%ebx,%ecx,8), %mm3 - cvtpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: cvtpd2pi 69, %mm3 - cvtpd2pi 0x45,%mm3 - -// CHECK: cvtpd2pi 32493, %mm3 - cvtpd2pi 0x7eed,%mm3 - -// CHECK: cvtpd2pi 3133065982, %mm3 - cvtpd2pi 0xbabecafe,%mm3 - -// CHECK: cvtpd2pi 305419896, %mm3 - cvtpd2pi 0x12345678,%mm3 - -// CHECK: cvtpd2pi %xmm5, %mm3 - cvtpd2pi %xmm5,%mm3 - -// CHECK: cvtpd2ps 3735928559(%ebx,%ecx,8), %xmm5 - cvtpd2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtpd2ps 69, %xmm5 - cvtpd2ps 0x45,%xmm5 - -// CHECK: cvtpd2ps 32493, %xmm5 - cvtpd2ps 0x7eed,%xmm5 - -// CHECK: cvtpd2ps 3133065982, %xmm5 - cvtpd2ps 0xbabecafe,%xmm5 - -// CHECK: cvtpd2ps 305419896, %xmm5 - cvtpd2ps 0x12345678,%xmm5 - -// CHECK: cvtpd2ps %xmm5, %xmm5 - cvtpd2ps %xmm5,%xmm5 - -// CHECK: cvtps2pd 3735928559(%ebx,%ecx,8), %xmm5 - cvtps2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtps2pd 69, %xmm5 - cvtps2pd 0x45,%xmm5 - -// CHECK: cvtps2pd 32493, %xmm5 - cvtps2pd 0x7eed,%xmm5 - -// CHECK: cvtps2pd 3133065982, %xmm5 - cvtps2pd 0xbabecafe,%xmm5 - -// CHECK: cvtps2pd 305419896, %xmm5 - cvtps2pd 0x12345678,%xmm5 - -// CHECK: cvtps2pd %xmm5, %xmm5 - cvtps2pd %xmm5,%xmm5 - -// CHECK: cvtps2dq 3735928559(%ebx,%ecx,8), %xmm5 - cvtps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtps2dq 69, %xmm5 - cvtps2dq 0x45,%xmm5 - -// CHECK: cvtps2dq 32493, %xmm5 - cvtps2dq 0x7eed,%xmm5 - -// CHECK: cvtps2dq 3133065982, %xmm5 - cvtps2dq 0xbabecafe,%xmm5 - -// CHECK: cvtps2dq 305419896, %xmm5 - cvtps2dq 0x12345678,%xmm5 - -// CHECK: cvtps2dq %xmm5, %xmm5 - cvtps2dq %xmm5,%xmm5 - -// CHECK: cvtsd2ss 3735928559(%ebx,%ecx,8), %xmm5 - cvtsd2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtsd2ss 69, %xmm5 - cvtsd2ss 0x45,%xmm5 - -// CHECK: cvtsd2ss 32493, %xmm5 - cvtsd2ss 0x7eed,%xmm5 - -// CHECK: cvtsd2ss 3133065982, %xmm5 - cvtsd2ss 0xbabecafe,%xmm5 - -// CHECK: cvtsd2ss 305419896, %xmm5 - cvtsd2ss 0x12345678,%xmm5 - -// CHECK: cvtsd2ss %xmm5, %xmm5 - cvtsd2ss %xmm5,%xmm5 - -// CHECK: cvtss2sd 3735928559(%ebx,%ecx,8), %xmm5 - cvtss2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvtss2sd 69, %xmm5 - cvtss2sd 0x45,%xmm5 - -// CHECK: cvtss2sd 32493, %xmm5 - cvtss2sd 0x7eed,%xmm5 - -// CHECK: cvtss2sd 3133065982, %xmm5 - cvtss2sd 0xbabecafe,%xmm5 - -// CHECK: cvtss2sd 305419896, %xmm5 - cvtss2sd 0x12345678,%xmm5 - -// CHECK: cvtss2sd %xmm5, %xmm5 - cvtss2sd %xmm5,%xmm5 - -// CHECK: cvttpd2pi 3735928559(%ebx,%ecx,8), %mm3 - cvttpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: cvttpd2pi 69, %mm3 - cvttpd2pi 0x45,%mm3 - -// CHECK: cvttpd2pi 32493, %mm3 - cvttpd2pi 0x7eed,%mm3 - -// CHECK: cvttpd2pi 3133065982, %mm3 - cvttpd2pi 0xbabecafe,%mm3 - -// CHECK: cvttpd2pi 305419896, %mm3 - cvttpd2pi 0x12345678,%mm3 - -// CHECK: cvttpd2pi %xmm5, %mm3 - cvttpd2pi %xmm5,%mm3 - -// CHECK: cvttsd2si 3735928559(%ebx,%ecx,8), %ecx - cvttsd2si 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: cvttsd2si 69, %ecx - cvttsd2si 0x45,%ecx - -// CHECK: cvttsd2si 32493, %ecx - cvttsd2si 0x7eed,%ecx - -// CHECK: cvttsd2si 3133065982, %ecx - cvttsd2si 0xbabecafe,%ecx - -// CHECK: cvttsd2si 305419896, %ecx - cvttsd2si 0x12345678,%ecx - -// CHECK: cvttsd2si %xmm5, %ecx - cvttsd2si %xmm5,%ecx - -// CHECK: cvttps2dq 3735928559(%ebx,%ecx,8), %xmm5 - cvttps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: cvttps2dq 69, %xmm5 - cvttps2dq 0x45,%xmm5 - -// CHECK: cvttps2dq 32493, %xmm5 - cvttps2dq 0x7eed,%xmm5 - -// CHECK: cvttps2dq 3133065982, %xmm5 - cvttps2dq 0xbabecafe,%xmm5 - -// CHECK: cvttps2dq 305419896, %xmm5 - cvttps2dq 0x12345678,%xmm5 - -// CHECK: cvttps2dq %xmm5, %xmm5 - cvttps2dq %xmm5,%xmm5 - -// CHECK: maskmovdqu %xmm5, %xmm5 - maskmovdqu %xmm5,%xmm5 - -// CHECK: movdqa 3735928559(%ebx,%ecx,8), %xmm5 - movdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movdqa 69, %xmm5 - movdqa 0x45,%xmm5 - -// CHECK: movdqa 32493, %xmm5 - movdqa 0x7eed,%xmm5 - -// CHECK: movdqa 3133065982, %xmm5 - movdqa 0xbabecafe,%xmm5 - -// CHECK: movdqa 305419896, %xmm5 - movdqa 0x12345678,%xmm5 - -// CHECK: movdqa %xmm5, %xmm5 - movdqa %xmm5,%xmm5 - -// CHECK: movdqa %xmm5, 3735928559(%ebx,%ecx,8) - movdqa %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movdqa %xmm5, 69 - movdqa %xmm5,0x45 - -// CHECK: movdqa %xmm5, 32493 - movdqa %xmm5,0x7eed - -// CHECK: movdqa %xmm5, 3133065982 - movdqa %xmm5,0xbabecafe - -// CHECK: movdqa %xmm5, 305419896 - movdqa %xmm5,0x12345678 - -// CHECK: movdqa %xmm5, %xmm5 - movdqa %xmm5,%xmm5 - -// CHECK: movdqu 3735928559(%ebx,%ecx,8), %xmm5 - movdqu 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movdqu 69, %xmm5 - movdqu 0x45,%xmm5 - -// CHECK: movdqu 32493, %xmm5 - movdqu 0x7eed,%xmm5 - -// CHECK: movdqu 3133065982, %xmm5 - movdqu 0xbabecafe,%xmm5 - -// CHECK: movdqu 305419896, %xmm5 - movdqu 0x12345678,%xmm5 - -// CHECK: movdqu %xmm5, 3735928559(%ebx,%ecx,8) - movdqu %xmm5,0xdeadbeef(%ebx,%ecx,8) - -// CHECK: movdqu %xmm5, 69 - movdqu %xmm5,0x45 - -// CHECK: movdqu %xmm5, 32493 - movdqu %xmm5,0x7eed - -// CHECK: movdqu %xmm5, 3133065982 - movdqu %xmm5,0xbabecafe - -// CHECK: movdqu %xmm5, 305419896 - movdqu %xmm5,0x12345678 - -// CHECK: movdq2q %xmm5, %mm3 - movdq2q %xmm5,%mm3 - -// CHECK: movq2dq %mm3, %xmm5 - movq2dq %mm3,%xmm5 - -// CHECK: pmuludq 3735928559(%ebx,%ecx,8), %mm3 - pmuludq 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmuludq 69, %mm3 - pmuludq 0x45,%mm3 - -// CHECK: pmuludq 32493, %mm3 - pmuludq 0x7eed,%mm3 - -// CHECK: pmuludq 3133065982, %mm3 - pmuludq 0xbabecafe,%mm3 - -// CHECK: pmuludq 305419896, %mm3 - pmuludq 0x12345678,%mm3 - -// CHECK: pmuludq %mm3, %mm3 - pmuludq %mm3,%mm3 - -// CHECK: pmuludq 3735928559(%ebx,%ecx,8), %xmm5 - pmuludq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmuludq 69, %xmm5 - pmuludq 0x45,%xmm5 - -// CHECK: pmuludq 32493, %xmm5 - pmuludq 0x7eed,%xmm5 - -// CHECK: pmuludq 3133065982, %xmm5 - pmuludq 0xbabecafe,%xmm5 - -// CHECK: pmuludq 305419896, %xmm5 - pmuludq 0x12345678,%xmm5 - -// CHECK: pmuludq %xmm5, %xmm5 - pmuludq %xmm5,%xmm5 - -// CHECK: pslldq $127, %xmm5 - pslldq $0x7f,%xmm5 - -// CHECK: psrldq $127, %xmm5 - psrldq $0x7f,%xmm5 - -// CHECK: punpckhqdq 3735928559(%ebx,%ecx,8), %xmm5 - punpckhqdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: punpckhqdq 69, %xmm5 - punpckhqdq 0x45,%xmm5 - -// CHECK: punpckhqdq 32493, %xmm5 - punpckhqdq 0x7eed,%xmm5 - -// CHECK: punpckhqdq 3133065982, %xmm5 - punpckhqdq 0xbabecafe,%xmm5 - -// CHECK: punpckhqdq 305419896, %xmm5 - punpckhqdq 0x12345678,%xmm5 - -// CHECK: punpckhqdq %xmm5, %xmm5 - punpckhqdq %xmm5,%xmm5 - -// CHECK: punpcklqdq 3735928559(%ebx,%ecx,8), %xmm5 - punpcklqdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: punpcklqdq 69, %xmm5 - punpcklqdq 0x45,%xmm5 - -// CHECK: punpcklqdq 32493, %xmm5 - punpcklqdq 0x7eed,%xmm5 - -// CHECK: punpcklqdq 3133065982, %xmm5 - punpcklqdq 0xbabecafe,%xmm5 - -// CHECK: punpcklqdq 305419896, %xmm5 - punpcklqdq 0x12345678,%xmm5 - -// CHECK: punpcklqdq %xmm5, %xmm5 - punpcklqdq %xmm5,%xmm5 - -// CHECK: addsubpd 3735928559(%ebx,%ecx,8), %xmm5 - addsubpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: addsubpd 69, %xmm5 - addsubpd 0x45,%xmm5 - -// CHECK: addsubpd 32493, %xmm5 - addsubpd 0x7eed,%xmm5 - -// CHECK: addsubpd 3133065982, %xmm5 - addsubpd 0xbabecafe,%xmm5 - -// CHECK: addsubpd 305419896, %xmm5 - addsubpd 0x12345678,%xmm5 - -// CHECK: addsubpd %xmm5, %xmm5 - addsubpd %xmm5,%xmm5 - -// CHECK: addsubps 3735928559(%ebx,%ecx,8), %xmm5 - addsubps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: addsubps 69, %xmm5 - addsubps 0x45,%xmm5 - -// CHECK: addsubps 32493, %xmm5 - addsubps 0x7eed,%xmm5 - -// CHECK: addsubps 3133065982, %xmm5 - addsubps 0xbabecafe,%xmm5 - -// CHECK: addsubps 305419896, %xmm5 - addsubps 0x12345678,%xmm5 - -// CHECK: addsubps %xmm5, %xmm5 - addsubps %xmm5,%xmm5 - -// CHECK: fisttpl 3735928559(%ebx,%ecx,8) - fisttpl 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: fisttpl 3133065982 - fisttpl 0xbabecafe - -// CHECK: fisttpl 305419896 - fisttpl 0x12345678 - -// CHECK: haddpd 3735928559(%ebx,%ecx,8), %xmm5 - haddpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: haddpd 69, %xmm5 - haddpd 0x45,%xmm5 - -// CHECK: haddpd 32493, %xmm5 - haddpd 0x7eed,%xmm5 - -// CHECK: haddpd 3133065982, %xmm5 - haddpd 0xbabecafe,%xmm5 - -// CHECK: haddpd 305419896, %xmm5 - haddpd 0x12345678,%xmm5 - -// CHECK: haddpd %xmm5, %xmm5 - haddpd %xmm5,%xmm5 - -// CHECK: haddps 3735928559(%ebx,%ecx,8), %xmm5 - haddps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: haddps 69, %xmm5 - haddps 0x45,%xmm5 - -// CHECK: haddps 32493, %xmm5 - haddps 0x7eed,%xmm5 - -// CHECK: haddps 3133065982, %xmm5 - haddps 0xbabecafe,%xmm5 - -// CHECK: haddps 305419896, %xmm5 - haddps 0x12345678,%xmm5 - -// CHECK: haddps %xmm5, %xmm5 - haddps %xmm5,%xmm5 - -// CHECK: hsubpd 3735928559(%ebx,%ecx,8), %xmm5 - hsubpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: hsubpd 69, %xmm5 - hsubpd 0x45,%xmm5 - -// CHECK: hsubpd 32493, %xmm5 - hsubpd 0x7eed,%xmm5 - -// CHECK: hsubpd 3133065982, %xmm5 - hsubpd 0xbabecafe,%xmm5 - -// CHECK: hsubpd 305419896, %xmm5 - hsubpd 0x12345678,%xmm5 - -// CHECK: hsubpd %xmm5, %xmm5 - hsubpd %xmm5,%xmm5 - -// CHECK: hsubps 3735928559(%ebx,%ecx,8), %xmm5 - hsubps 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: hsubps 69, %xmm5 - hsubps 0x45,%xmm5 - -// CHECK: hsubps 32493, %xmm5 - hsubps 0x7eed,%xmm5 - -// CHECK: hsubps 3133065982, %xmm5 - hsubps 0xbabecafe,%xmm5 - -// CHECK: hsubps 305419896, %xmm5 - hsubps 0x12345678,%xmm5 - -// CHECK: hsubps %xmm5, %xmm5 - hsubps %xmm5,%xmm5 - -// CHECK: lddqu 3735928559(%ebx,%ecx,8), %xmm5 - lddqu 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: lddqu 69, %xmm5 - lddqu 0x45,%xmm5 - -// CHECK: lddqu 32493, %xmm5 - lddqu 0x7eed,%xmm5 - -// CHECK: lddqu 3133065982, %xmm5 - lddqu 0xbabecafe,%xmm5 - -// CHECK: lddqu 305419896, %xmm5 - lddqu 0x12345678,%xmm5 - -// CHECK: monitor - monitor - -// CHECK: movddup 3735928559(%ebx,%ecx,8), %xmm5 - movddup 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movddup 69, %xmm5 - movddup 0x45,%xmm5 - -// CHECK: movddup 32493, %xmm5 - movddup 0x7eed,%xmm5 - -// CHECK: movddup 3133065982, %xmm5 - movddup 0xbabecafe,%xmm5 - -// CHECK: movddup 305419896, %xmm5 - movddup 0x12345678,%xmm5 - -// CHECK: movddup %xmm5, %xmm5 - movddup %xmm5,%xmm5 - -// CHECK: movshdup 3735928559(%ebx,%ecx,8), %xmm5 - movshdup 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movshdup 69, %xmm5 - movshdup 0x45,%xmm5 - -// CHECK: movshdup 32493, %xmm5 - movshdup 0x7eed,%xmm5 - -// CHECK: movshdup 3133065982, %xmm5 - movshdup 0xbabecafe,%xmm5 - -// CHECK: movshdup 305419896, %xmm5 - movshdup 0x12345678,%xmm5 - -// CHECK: movshdup %xmm5, %xmm5 - movshdup %xmm5,%xmm5 - -// CHECK: movsldup 3735928559(%ebx,%ecx,8), %xmm5 - movsldup 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movsldup 69, %xmm5 - movsldup 0x45,%xmm5 - -// CHECK: movsldup 32493, %xmm5 - movsldup 0x7eed,%xmm5 - -// CHECK: movsldup 3133065982, %xmm5 - movsldup 0xbabecafe,%xmm5 - -// CHECK: movsldup 305419896, %xmm5 - movsldup 0x12345678,%xmm5 - -// CHECK: movsldup %xmm5, %xmm5 - movsldup %xmm5,%xmm5 - -// CHECK: mwait - mwait - -// CHECK: vmcall - vmcall - -// CHECK: vmclear 3735928559(%ebx,%ecx,8) - vmclear 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: vmclear 32493 - vmclear 0x7eed - -// CHECK: vmclear 3133065982 - vmclear 0xbabecafe - -// CHECK: vmclear 305419896 - vmclear 0x12345678 - -// CHECK: vmlaunch - vmlaunch - -// CHECK: vmresume - vmresume - -// CHECK: vmptrld 3735928559(%ebx,%ecx,8) - vmptrld 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: vmptrld 32493 - vmptrld 0x7eed - -// CHECK: vmptrld 3133065982 - vmptrld 0xbabecafe - -// CHECK: vmptrld 305419896 - vmptrld 0x12345678 - -// CHECK: vmptrst 3735928559(%ebx,%ecx,8) - vmptrst 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: vmptrst 32493 - vmptrst 0x7eed - -// CHECK: vmptrst 3133065982 - vmptrst 0xbabecafe - -// CHECK: vmptrst 305419896 - vmptrst 0x12345678 - -// CHECK: vmxoff - vmxoff - -// CHECK: vmxon 3735928559(%ebx,%ecx,8) - vmxon 0xdeadbeef(%ebx,%ecx,8) - -// CHECK: vmxon 32493 - vmxon 0x7eed - -// CHECK: vmxon 3133065982 - vmxon 0xbabecafe - -// CHECK: vmxon 305419896 - vmxon 0x12345678 - -// CHECK: phaddw 3735928559(%ebx,%ecx,8), %mm3 - phaddw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: phaddw 69, %mm3 - phaddw 0x45,%mm3 - -// CHECK: phaddw 32493, %mm3 - phaddw 0x7eed,%mm3 - -// CHECK: phaddw 3133065982, %mm3 - phaddw 0xbabecafe,%mm3 - -// CHECK: phaddw 305419896, %mm3 - phaddw 0x12345678,%mm3 - -// CHECK: phaddw %mm3, %mm3 - phaddw %mm3,%mm3 - -// CHECK: phaddw 3735928559(%ebx,%ecx,8), %xmm5 - phaddw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: phaddw 69, %xmm5 - phaddw 0x45,%xmm5 - -// CHECK: phaddw 32493, %xmm5 - phaddw 0x7eed,%xmm5 - -// CHECK: phaddw 3133065982, %xmm5 - phaddw 0xbabecafe,%xmm5 - -// CHECK: phaddw 305419896, %xmm5 - phaddw 0x12345678,%xmm5 - -// CHECK: phaddw %xmm5, %xmm5 - phaddw %xmm5,%xmm5 - -// CHECK: phaddd 3735928559(%ebx,%ecx,8), %mm3 - phaddd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: phaddd 69, %mm3 - phaddd 0x45,%mm3 - -// CHECK: phaddd 32493, %mm3 - phaddd 0x7eed,%mm3 - -// CHECK: phaddd 3133065982, %mm3 - phaddd 0xbabecafe,%mm3 - -// CHECK: phaddd 305419896, %mm3 - phaddd 0x12345678,%mm3 - -// CHECK: phaddd %mm3, %mm3 - phaddd %mm3,%mm3 - -// CHECK: phaddd 3735928559(%ebx,%ecx,8), %xmm5 - phaddd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: phaddd 69, %xmm5 - phaddd 0x45,%xmm5 - -// CHECK: phaddd 32493, %xmm5 - phaddd 0x7eed,%xmm5 - -// CHECK: phaddd 3133065982, %xmm5 - phaddd 0xbabecafe,%xmm5 - -// CHECK: phaddd 305419896, %xmm5 - phaddd 0x12345678,%xmm5 - -// CHECK: phaddd %xmm5, %xmm5 - phaddd %xmm5,%xmm5 - -// CHECK: phaddsw 3735928559(%ebx,%ecx,8), %mm3 - phaddsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: phaddsw 69, %mm3 - phaddsw 0x45,%mm3 - -// CHECK: phaddsw 32493, %mm3 - phaddsw 0x7eed,%mm3 - -// CHECK: phaddsw 3133065982, %mm3 - phaddsw 0xbabecafe,%mm3 - -// CHECK: phaddsw 305419896, %mm3 - phaddsw 0x12345678,%mm3 - -// CHECK: phaddsw %mm3, %mm3 - phaddsw %mm3,%mm3 - -// CHECK: phaddsw 3735928559(%ebx,%ecx,8), %xmm5 - phaddsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: phaddsw 69, %xmm5 - phaddsw 0x45,%xmm5 - -// CHECK: phaddsw 32493, %xmm5 - phaddsw 0x7eed,%xmm5 - -// CHECK: phaddsw 3133065982, %xmm5 - phaddsw 0xbabecafe,%xmm5 - -// CHECK: phaddsw 305419896, %xmm5 - phaddsw 0x12345678,%xmm5 - -// CHECK: phaddsw %xmm5, %xmm5 - phaddsw %xmm5,%xmm5 - -// CHECK: phsubw 3735928559(%ebx,%ecx,8), %mm3 - phsubw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: phsubw 69, %mm3 - phsubw 0x45,%mm3 - -// CHECK: phsubw 32493, %mm3 - phsubw 0x7eed,%mm3 - -// CHECK: phsubw 3133065982, %mm3 - phsubw 0xbabecafe,%mm3 - -// CHECK: phsubw 305419896, %mm3 - phsubw 0x12345678,%mm3 - -// CHECK: phsubw %mm3, %mm3 - phsubw %mm3,%mm3 - -// CHECK: phsubw 3735928559(%ebx,%ecx,8), %xmm5 - phsubw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: phsubw 69, %xmm5 - phsubw 0x45,%xmm5 - -// CHECK: phsubw 32493, %xmm5 - phsubw 0x7eed,%xmm5 - -// CHECK: phsubw 3133065982, %xmm5 - phsubw 0xbabecafe,%xmm5 - -// CHECK: phsubw 305419896, %xmm5 - phsubw 0x12345678,%xmm5 - -// CHECK: phsubw %xmm5, %xmm5 - phsubw %xmm5,%xmm5 - -// CHECK: phsubd 3735928559(%ebx,%ecx,8), %mm3 - phsubd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: phsubd 69, %mm3 - phsubd 0x45,%mm3 - -// CHECK: phsubd 32493, %mm3 - phsubd 0x7eed,%mm3 - -// CHECK: phsubd 3133065982, %mm3 - phsubd 0xbabecafe,%mm3 - -// CHECK: phsubd 305419896, %mm3 - phsubd 0x12345678,%mm3 - -// CHECK: phsubd %mm3, %mm3 - phsubd %mm3,%mm3 - -// CHECK: phsubd 3735928559(%ebx,%ecx,8), %xmm5 - phsubd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: phsubd 69, %xmm5 - phsubd 0x45,%xmm5 - -// CHECK: phsubd 32493, %xmm5 - phsubd 0x7eed,%xmm5 - -// CHECK: phsubd 3133065982, %xmm5 - phsubd 0xbabecafe,%xmm5 - -// CHECK: phsubd 305419896, %xmm5 - phsubd 0x12345678,%xmm5 - -// CHECK: phsubd %xmm5, %xmm5 - phsubd %xmm5,%xmm5 - -// CHECK: phsubsw 3735928559(%ebx,%ecx,8), %mm3 - phsubsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: phsubsw 69, %mm3 - phsubsw 0x45,%mm3 - -// CHECK: phsubsw 32493, %mm3 - phsubsw 0x7eed,%mm3 - -// CHECK: phsubsw 3133065982, %mm3 - phsubsw 0xbabecafe,%mm3 - -// CHECK: phsubsw 305419896, %mm3 - phsubsw 0x12345678,%mm3 - -// CHECK: phsubsw %mm3, %mm3 - phsubsw %mm3,%mm3 - -// CHECK: phsubsw 3735928559(%ebx,%ecx,8), %xmm5 - phsubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: phsubsw 69, %xmm5 - phsubsw 0x45,%xmm5 - -// CHECK: phsubsw 32493, %xmm5 - phsubsw 0x7eed,%xmm5 - -// CHECK: phsubsw 3133065982, %xmm5 - phsubsw 0xbabecafe,%xmm5 - -// CHECK: phsubsw 305419896, %xmm5 - phsubsw 0x12345678,%xmm5 - -// CHECK: phsubsw %xmm5, %xmm5 - phsubsw %xmm5,%xmm5 - -// CHECK: pmaddubsw 3735928559(%ebx,%ecx,8), %mm3 - pmaddubsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmaddubsw 69, %mm3 - pmaddubsw 0x45,%mm3 - -// CHECK: pmaddubsw 32493, %mm3 - pmaddubsw 0x7eed,%mm3 - -// CHECK: pmaddubsw 3133065982, %mm3 - pmaddubsw 0xbabecafe,%mm3 - -// CHECK: pmaddubsw 305419896, %mm3 - pmaddubsw 0x12345678,%mm3 - -// CHECK: pmaddubsw %mm3, %mm3 - pmaddubsw %mm3,%mm3 - -// CHECK: pmaddubsw 3735928559(%ebx,%ecx,8), %xmm5 - pmaddubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmaddubsw 69, %xmm5 - pmaddubsw 0x45,%xmm5 - -// CHECK: pmaddubsw 32493, %xmm5 - pmaddubsw 0x7eed,%xmm5 - -// CHECK: pmaddubsw 3133065982, %xmm5 - pmaddubsw 0xbabecafe,%xmm5 - -// CHECK: pmaddubsw 305419896, %xmm5 - pmaddubsw 0x12345678,%xmm5 - -// CHECK: pmaddubsw %xmm5, %xmm5 - pmaddubsw %xmm5,%xmm5 - -// CHECK: pmulhrsw 3735928559(%ebx,%ecx,8), %mm3 - pmulhrsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pmulhrsw 69, %mm3 - pmulhrsw 0x45,%mm3 - -// CHECK: pmulhrsw 32493, %mm3 - pmulhrsw 0x7eed,%mm3 - -// CHECK: pmulhrsw 3133065982, %mm3 - pmulhrsw 0xbabecafe,%mm3 - -// CHECK: pmulhrsw 305419896, %mm3 - pmulhrsw 0x12345678,%mm3 - -// CHECK: pmulhrsw %mm3, %mm3 - pmulhrsw %mm3,%mm3 - -// CHECK: pmulhrsw 3735928559(%ebx,%ecx,8), %xmm5 - pmulhrsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmulhrsw 69, %xmm5 - pmulhrsw 0x45,%xmm5 - -// CHECK: pmulhrsw 32493, %xmm5 - pmulhrsw 0x7eed,%xmm5 - -// CHECK: pmulhrsw 3133065982, %xmm5 - pmulhrsw 0xbabecafe,%xmm5 - -// CHECK: pmulhrsw 305419896, %xmm5 - pmulhrsw 0x12345678,%xmm5 - -// CHECK: pmulhrsw %xmm5, %xmm5 - pmulhrsw %xmm5,%xmm5 - -// CHECK: pshufb 3735928559(%ebx,%ecx,8), %mm3 - pshufb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pshufb 69, %mm3 - pshufb 0x45,%mm3 - -// CHECK: pshufb 32493, %mm3 - pshufb 0x7eed,%mm3 - -// CHECK: pshufb 3133065982, %mm3 - pshufb 0xbabecafe,%mm3 - -// CHECK: pshufb 305419896, %mm3 - pshufb 0x12345678,%mm3 - -// CHECK: pshufb %mm3, %mm3 - pshufb %mm3,%mm3 - -// CHECK: pshufb 3735928559(%ebx,%ecx,8), %xmm5 - pshufb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pshufb 69, %xmm5 - pshufb 0x45,%xmm5 - -// CHECK: pshufb 32493, %xmm5 - pshufb 0x7eed,%xmm5 - -// CHECK: pshufb 3133065982, %xmm5 - pshufb 0xbabecafe,%xmm5 - -// CHECK: pshufb 305419896, %xmm5 - pshufb 0x12345678,%xmm5 - -// CHECK: pshufb %xmm5, %xmm5 - pshufb %xmm5,%xmm5 - -// CHECK: psignb 3735928559(%ebx,%ecx,8), %mm3 - psignb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psignb 69, %mm3 - psignb 0x45,%mm3 - -// CHECK: psignb 32493, %mm3 - psignb 0x7eed,%mm3 - -// CHECK: psignb 3133065982, %mm3 - psignb 0xbabecafe,%mm3 - -// CHECK: psignb 305419896, %mm3 - psignb 0x12345678,%mm3 - -// CHECK: psignb %mm3, %mm3 - psignb %mm3,%mm3 - -// CHECK: psignb 3735928559(%ebx,%ecx,8), %xmm5 - psignb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psignb 69, %xmm5 - psignb 0x45,%xmm5 - -// CHECK: psignb 32493, %xmm5 - psignb 0x7eed,%xmm5 - -// CHECK: psignb 3133065982, %xmm5 - psignb 0xbabecafe,%xmm5 - -// CHECK: psignb 305419896, %xmm5 - psignb 0x12345678,%xmm5 - -// CHECK: psignb %xmm5, %xmm5 - psignb %xmm5,%xmm5 - -// CHECK: psignw 3735928559(%ebx,%ecx,8), %mm3 - psignw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psignw 69, %mm3 - psignw 0x45,%mm3 - -// CHECK: psignw 32493, %mm3 - psignw 0x7eed,%mm3 - -// CHECK: psignw 3133065982, %mm3 - psignw 0xbabecafe,%mm3 - -// CHECK: psignw 305419896, %mm3 - psignw 0x12345678,%mm3 - -// CHECK: psignw %mm3, %mm3 - psignw %mm3,%mm3 - -// CHECK: psignw 3735928559(%ebx,%ecx,8), %xmm5 - psignw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psignw 69, %xmm5 - psignw 0x45,%xmm5 - -// CHECK: psignw 32493, %xmm5 - psignw 0x7eed,%xmm5 - -// CHECK: psignw 3133065982, %xmm5 - psignw 0xbabecafe,%xmm5 - -// CHECK: psignw 305419896, %xmm5 - psignw 0x12345678,%xmm5 - -// CHECK: psignw %xmm5, %xmm5 - psignw %xmm5,%xmm5 - -// CHECK: psignd 3735928559(%ebx,%ecx,8), %mm3 - psignd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: psignd 69, %mm3 - psignd 0x45,%mm3 - -// CHECK: psignd 32493, %mm3 - psignd 0x7eed,%mm3 - -// CHECK: psignd 3133065982, %mm3 - psignd 0xbabecafe,%mm3 - -// CHECK: psignd 305419896, %mm3 - psignd 0x12345678,%mm3 - -// CHECK: psignd %mm3, %mm3 - psignd %mm3,%mm3 - -// CHECK: psignd 3735928559(%ebx,%ecx,8), %xmm5 - psignd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: psignd 69, %xmm5 - psignd 0x45,%xmm5 - -// CHECK: psignd 32493, %xmm5 - psignd 0x7eed,%xmm5 - -// CHECK: psignd 3133065982, %xmm5 - psignd 0xbabecafe,%xmm5 - -// CHECK: psignd 305419896, %xmm5 - psignd 0x12345678,%xmm5 - -// CHECK: psignd %xmm5, %xmm5 - psignd %xmm5,%xmm5 - -// CHECK: pabsb 3735928559(%ebx,%ecx,8), %mm3 - pabsb 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pabsb 69, %mm3 - pabsb 0x45,%mm3 - -// CHECK: pabsb 32493, %mm3 - pabsb 0x7eed,%mm3 - -// CHECK: pabsb 3133065982, %mm3 - pabsb 0xbabecafe,%mm3 - -// CHECK: pabsb 305419896, %mm3 - pabsb 0x12345678,%mm3 - -// CHECK: pabsb %mm3, %mm3 - pabsb %mm3,%mm3 - -// CHECK: pabsb 3735928559(%ebx,%ecx,8), %xmm5 - pabsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pabsb 69, %xmm5 - pabsb 0x45,%xmm5 - -// CHECK: pabsb 32493, %xmm5 - pabsb 0x7eed,%xmm5 - -// CHECK: pabsb 3133065982, %xmm5 - pabsb 0xbabecafe,%xmm5 - -// CHECK: pabsb 305419896, %xmm5 - pabsb 0x12345678,%xmm5 - -// CHECK: pabsb %xmm5, %xmm5 - pabsb %xmm5,%xmm5 - -// CHECK: pabsw 3735928559(%ebx,%ecx,8), %mm3 - pabsw 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pabsw 69, %mm3 - pabsw 0x45,%mm3 - -// CHECK: pabsw 32493, %mm3 - pabsw 0x7eed,%mm3 - -// CHECK: pabsw 3133065982, %mm3 - pabsw 0xbabecafe,%mm3 - -// CHECK: pabsw 305419896, %mm3 - pabsw 0x12345678,%mm3 - -// CHECK: pabsw %mm3, %mm3 - pabsw %mm3,%mm3 - -// CHECK: pabsw 3735928559(%ebx,%ecx,8), %xmm5 - pabsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pabsw 69, %xmm5 - pabsw 0x45,%xmm5 - -// CHECK: pabsw 32493, %xmm5 - pabsw 0x7eed,%xmm5 - -// CHECK: pabsw 3133065982, %xmm5 - pabsw 0xbabecafe,%xmm5 - -// CHECK: pabsw 305419896, %xmm5 - pabsw 0x12345678,%xmm5 - -// CHECK: pabsw %xmm5, %xmm5 - pabsw %xmm5,%xmm5 - -// CHECK: pabsd 3735928559(%ebx,%ecx,8), %mm3 - pabsd 0xdeadbeef(%ebx,%ecx,8),%mm3 - -// CHECK: pabsd 69, %mm3 - pabsd 0x45,%mm3 - -// CHECK: pabsd 32493, %mm3 - pabsd 0x7eed,%mm3 - -// CHECK: pabsd 3133065982, %mm3 - pabsd 0xbabecafe,%mm3 - -// CHECK: pabsd 305419896, %mm3 - pabsd 0x12345678,%mm3 - -// CHECK: pabsd %mm3, %mm3 - pabsd %mm3,%mm3 - -// CHECK: pabsd 3735928559(%ebx,%ecx,8), %xmm5 - pabsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pabsd 69, %xmm5 - pabsd 0x45,%xmm5 - -// CHECK: pabsd 32493, %xmm5 - pabsd 0x7eed,%xmm5 - -// CHECK: pabsd 3133065982, %xmm5 - pabsd 0xbabecafe,%xmm5 - -// CHECK: pabsd 305419896, %xmm5 - pabsd 0x12345678,%xmm5 - -// CHECK: pabsd %xmm5, %xmm5 - pabsd %xmm5,%xmm5 - -// CHECK: femms - femms - -// CHECK: movntdqa 3735928559(%ebx,%ecx,8), %xmm5 - movntdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: movntdqa 69, %xmm5 - movntdqa 0x45,%xmm5 - -// CHECK: movntdqa 32493, %xmm5 - movntdqa 0x7eed,%xmm5 - -// CHECK: movntdqa 3133065982, %xmm5 - movntdqa 0xbabecafe,%xmm5 - -// CHECK: movntdqa 305419896, %xmm5 - movntdqa 0x12345678,%xmm5 - -// CHECK: packusdw 3735928559(%ebx,%ecx,8), %xmm5 - packusdw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: packusdw 69, %xmm5 - packusdw 0x45,%xmm5 - -// CHECK: packusdw 32493, %xmm5 - packusdw 0x7eed,%xmm5 - -// CHECK: packusdw 3133065982, %xmm5 - packusdw 0xbabecafe,%xmm5 - -// CHECK: packusdw 305419896, %xmm5 - packusdw 0x12345678,%xmm5 - -// CHECK: packusdw %xmm5, %xmm5 - packusdw %xmm5,%xmm5 - -// CHECK: pcmpeqq 3735928559(%ebx,%ecx,8), %xmm5 - pcmpeqq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pcmpeqq 69, %xmm5 - pcmpeqq 0x45,%xmm5 - -// CHECK: pcmpeqq 32493, %xmm5 - pcmpeqq 0x7eed,%xmm5 - -// CHECK: pcmpeqq 3133065982, %xmm5 - pcmpeqq 0xbabecafe,%xmm5 - -// CHECK: pcmpeqq 305419896, %xmm5 - pcmpeqq 0x12345678,%xmm5 - -// CHECK: pcmpeqq %xmm5, %xmm5 - pcmpeqq %xmm5,%xmm5 - -// CHECK: phminposuw 3735928559(%ebx,%ecx,8), %xmm5 - phminposuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: phminposuw 69, %xmm5 - phminposuw 0x45,%xmm5 - -// CHECK: phminposuw 32493, %xmm5 - phminposuw 0x7eed,%xmm5 - -// CHECK: phminposuw 3133065982, %xmm5 - phminposuw 0xbabecafe,%xmm5 - -// CHECK: phminposuw 305419896, %xmm5 - phminposuw 0x12345678,%xmm5 - -// CHECK: phminposuw %xmm5, %xmm5 - phminposuw %xmm5,%xmm5 - -// CHECK: pmaxsb 3735928559(%ebx,%ecx,8), %xmm5 - pmaxsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmaxsb 69, %xmm5 - pmaxsb 0x45,%xmm5 - -// CHECK: pmaxsb 32493, %xmm5 - pmaxsb 0x7eed,%xmm5 - -// CHECK: pmaxsb 3133065982, %xmm5 - pmaxsb 0xbabecafe,%xmm5 - -// CHECK: pmaxsb 305419896, %xmm5 - pmaxsb 0x12345678,%xmm5 - -// CHECK: pmaxsb %xmm5, %xmm5 - pmaxsb %xmm5,%xmm5 - -// CHECK: pmaxsd 3735928559(%ebx,%ecx,8), %xmm5 - pmaxsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmaxsd 69, %xmm5 - pmaxsd 0x45,%xmm5 - -// CHECK: pmaxsd 32493, %xmm5 - pmaxsd 0x7eed,%xmm5 - -// CHECK: pmaxsd 3133065982, %xmm5 - pmaxsd 0xbabecafe,%xmm5 - -// CHECK: pmaxsd 305419896, %xmm5 - pmaxsd 0x12345678,%xmm5 - -// CHECK: pmaxsd %xmm5, %xmm5 - pmaxsd %xmm5,%xmm5 - -// CHECK: pmaxud 3735928559(%ebx,%ecx,8), %xmm5 - pmaxud 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmaxud 69, %xmm5 - pmaxud 0x45,%xmm5 - -// CHECK: pmaxud 32493, %xmm5 - pmaxud 0x7eed,%xmm5 - -// CHECK: pmaxud 3133065982, %xmm5 - pmaxud 0xbabecafe,%xmm5 - -// CHECK: pmaxud 305419896, %xmm5 - pmaxud 0x12345678,%xmm5 - -// CHECK: pmaxud %xmm5, %xmm5 - pmaxud %xmm5,%xmm5 - -// CHECK: pmaxuw 3735928559(%ebx,%ecx,8), %xmm5 - pmaxuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmaxuw 69, %xmm5 - pmaxuw 0x45,%xmm5 - -// CHECK: pmaxuw 32493, %xmm5 - pmaxuw 0x7eed,%xmm5 - -// CHECK: pmaxuw 3133065982, %xmm5 - pmaxuw 0xbabecafe,%xmm5 - -// CHECK: pmaxuw 305419896, %xmm5 - pmaxuw 0x12345678,%xmm5 - -// CHECK: pmaxuw %xmm5, %xmm5 - pmaxuw %xmm5,%xmm5 - -// CHECK: pminsb 3735928559(%ebx,%ecx,8), %xmm5 - pminsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pminsb 69, %xmm5 - pminsb 0x45,%xmm5 - -// CHECK: pminsb 32493, %xmm5 - pminsb 0x7eed,%xmm5 - -// CHECK: pminsb 3133065982, %xmm5 - pminsb 0xbabecafe,%xmm5 - -// CHECK: pminsb 305419896, %xmm5 - pminsb 0x12345678,%xmm5 - -// CHECK: pminsb %xmm5, %xmm5 - pminsb %xmm5,%xmm5 - -// CHECK: pminsd 3735928559(%ebx,%ecx,8), %xmm5 - pminsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pminsd 69, %xmm5 - pminsd 0x45,%xmm5 - -// CHECK: pminsd 32493, %xmm5 - pminsd 0x7eed,%xmm5 - -// CHECK: pminsd 3133065982, %xmm5 - pminsd 0xbabecafe,%xmm5 - -// CHECK: pminsd 305419896, %xmm5 - pminsd 0x12345678,%xmm5 - -// CHECK: pminsd %xmm5, %xmm5 - pminsd %xmm5,%xmm5 - -// CHECK: pminud 3735928559(%ebx,%ecx,8), %xmm5 - pminud 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pminud 69, %xmm5 - pminud 0x45,%xmm5 - -// CHECK: pminud 32493, %xmm5 - pminud 0x7eed,%xmm5 - -// CHECK: pminud 3133065982, %xmm5 - pminud 0xbabecafe,%xmm5 - -// CHECK: pminud 305419896, %xmm5 - pminud 0x12345678,%xmm5 - -// CHECK: pminud %xmm5, %xmm5 - pminud %xmm5,%xmm5 - -// CHECK: pminuw 3735928559(%ebx,%ecx,8), %xmm5 - pminuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pminuw 69, %xmm5 - pminuw 0x45,%xmm5 - -// CHECK: pminuw 32493, %xmm5 - pminuw 0x7eed,%xmm5 - -// CHECK: pminuw 3133065982, %xmm5 - pminuw 0xbabecafe,%xmm5 - -// CHECK: pminuw 305419896, %xmm5 - pminuw 0x12345678,%xmm5 - -// CHECK: pminuw %xmm5, %xmm5 - pminuw %xmm5,%xmm5 - -// CHECK: pmovsxbw 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxbw 69, %xmm5 - pmovsxbw 0x45,%xmm5 - -// CHECK: pmovsxbw 32493, %xmm5 - pmovsxbw 0x7eed,%xmm5 - -// CHECK: pmovsxbw 3133065982, %xmm5 - pmovsxbw 0xbabecafe,%xmm5 - -// CHECK: pmovsxbw 305419896, %xmm5 - pmovsxbw 0x12345678,%xmm5 - -// CHECK: pmovsxbw %xmm5, %xmm5 - pmovsxbw %xmm5,%xmm5 - -// CHECK: pmovsxbd 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxbd 69, %xmm5 - pmovsxbd 0x45,%xmm5 - -// CHECK: pmovsxbd 32493, %xmm5 - pmovsxbd 0x7eed,%xmm5 - -// CHECK: pmovsxbd 3133065982, %xmm5 - pmovsxbd 0xbabecafe,%xmm5 - -// CHECK: pmovsxbd 305419896, %xmm5 - pmovsxbd 0x12345678,%xmm5 - -// CHECK: pmovsxbd %xmm5, %xmm5 - pmovsxbd %xmm5,%xmm5 - -// CHECK: pmovsxbq 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxbq 69, %xmm5 - pmovsxbq 0x45,%xmm5 - -// CHECK: pmovsxbq 32493, %xmm5 - pmovsxbq 0x7eed,%xmm5 - -// CHECK: pmovsxbq 3133065982, %xmm5 - pmovsxbq 0xbabecafe,%xmm5 - -// CHECK: pmovsxbq 305419896, %xmm5 - pmovsxbq 0x12345678,%xmm5 - -// CHECK: pmovsxbq %xmm5, %xmm5 - pmovsxbq %xmm5,%xmm5 - -// CHECK: pmovsxwd 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxwd 69, %xmm5 - pmovsxwd 0x45,%xmm5 - -// CHECK: pmovsxwd 32493, %xmm5 - pmovsxwd 0x7eed,%xmm5 - -// CHECK: pmovsxwd 3133065982, %xmm5 - pmovsxwd 0xbabecafe,%xmm5 - -// CHECK: pmovsxwd 305419896, %xmm5 - pmovsxwd 0x12345678,%xmm5 - -// CHECK: pmovsxwd %xmm5, %xmm5 - pmovsxwd %xmm5,%xmm5 - -// CHECK: pmovsxwq 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxwq 69, %xmm5 - pmovsxwq 0x45,%xmm5 - -// CHECK: pmovsxwq 32493, %xmm5 - pmovsxwq 0x7eed,%xmm5 - -// CHECK: pmovsxwq 3133065982, %xmm5 - pmovsxwq 0xbabecafe,%xmm5 - -// CHECK: pmovsxwq 305419896, %xmm5 - pmovsxwq 0x12345678,%xmm5 - -// CHECK: pmovsxwq %xmm5, %xmm5 - pmovsxwq %xmm5,%xmm5 - -// CHECK: pmovsxdq 3735928559(%ebx,%ecx,8), %xmm5 - pmovsxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovsxdq 69, %xmm5 - pmovsxdq 0x45,%xmm5 - -// CHECK: pmovsxdq 32493, %xmm5 - pmovsxdq 0x7eed,%xmm5 - -// CHECK: pmovsxdq 3133065982, %xmm5 - pmovsxdq 0xbabecafe,%xmm5 - -// CHECK: pmovsxdq 305419896, %xmm5 - pmovsxdq 0x12345678,%xmm5 - -// CHECK: pmovsxdq %xmm5, %xmm5 - pmovsxdq %xmm5,%xmm5 - -// CHECK: pmovzxbw 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxbw 69, %xmm5 - pmovzxbw 0x45,%xmm5 - -// CHECK: pmovzxbw 32493, %xmm5 - pmovzxbw 0x7eed,%xmm5 - -// CHECK: pmovzxbw 3133065982, %xmm5 - pmovzxbw 0xbabecafe,%xmm5 - -// CHECK: pmovzxbw 305419896, %xmm5 - pmovzxbw 0x12345678,%xmm5 - -// CHECK: pmovzxbw %xmm5, %xmm5 - pmovzxbw %xmm5,%xmm5 - -// CHECK: pmovzxbd 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxbd 69, %xmm5 - pmovzxbd 0x45,%xmm5 - -// CHECK: pmovzxbd 32493, %xmm5 - pmovzxbd 0x7eed,%xmm5 - -// CHECK: pmovzxbd 3133065982, %xmm5 - pmovzxbd 0xbabecafe,%xmm5 - -// CHECK: pmovzxbd 305419896, %xmm5 - pmovzxbd 0x12345678,%xmm5 - -// CHECK: pmovzxbd %xmm5, %xmm5 - pmovzxbd %xmm5,%xmm5 - -// CHECK: pmovzxbq 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxbq 69, %xmm5 - pmovzxbq 0x45,%xmm5 - -// CHECK: pmovzxbq 32493, %xmm5 - pmovzxbq 0x7eed,%xmm5 - -// CHECK: pmovzxbq 3133065982, %xmm5 - pmovzxbq 0xbabecafe,%xmm5 - -// CHECK: pmovzxbq 305419896, %xmm5 - pmovzxbq 0x12345678,%xmm5 - -// CHECK: pmovzxbq %xmm5, %xmm5 - pmovzxbq %xmm5,%xmm5 - -// CHECK: pmovzxwd 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxwd 69, %xmm5 - pmovzxwd 0x45,%xmm5 - -// CHECK: pmovzxwd 32493, %xmm5 - pmovzxwd 0x7eed,%xmm5 - -// CHECK: pmovzxwd 3133065982, %xmm5 - pmovzxwd 0xbabecafe,%xmm5 - -// CHECK: pmovzxwd 305419896, %xmm5 - pmovzxwd 0x12345678,%xmm5 - -// CHECK: pmovzxwd %xmm5, %xmm5 - pmovzxwd %xmm5,%xmm5 - -// CHECK: pmovzxwq 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxwq 69, %xmm5 - pmovzxwq 0x45,%xmm5 - -// CHECK: pmovzxwq 32493, %xmm5 - pmovzxwq 0x7eed,%xmm5 - -// CHECK: pmovzxwq 3133065982, %xmm5 - pmovzxwq 0xbabecafe,%xmm5 - -// CHECK: pmovzxwq 305419896, %xmm5 - pmovzxwq 0x12345678,%xmm5 - -// CHECK: pmovzxwq %xmm5, %xmm5 - pmovzxwq %xmm5,%xmm5 - -// CHECK: pmovzxdq 3735928559(%ebx,%ecx,8), %xmm5 - pmovzxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmovzxdq 69, %xmm5 - pmovzxdq 0x45,%xmm5 - -// CHECK: pmovzxdq 32493, %xmm5 - pmovzxdq 0x7eed,%xmm5 - -// CHECK: pmovzxdq 3133065982, %xmm5 - pmovzxdq 0xbabecafe,%xmm5 - -// CHECK: pmovzxdq 305419896, %xmm5 - pmovzxdq 0x12345678,%xmm5 - -// CHECK: pmovzxdq %xmm5, %xmm5 - pmovzxdq %xmm5,%xmm5 - -// CHECK: pmuldq 3735928559(%ebx,%ecx,8), %xmm5 - pmuldq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmuldq 69, %xmm5 - pmuldq 0x45,%xmm5 - -// CHECK: pmuldq 32493, %xmm5 - pmuldq 0x7eed,%xmm5 - -// CHECK: pmuldq 3133065982, %xmm5 - pmuldq 0xbabecafe,%xmm5 - -// CHECK: pmuldq 305419896, %xmm5 - pmuldq 0x12345678,%xmm5 - -// CHECK: pmuldq %xmm5, %xmm5 - pmuldq %xmm5,%xmm5 - -// CHECK: pmulld 3735928559(%ebx,%ecx,8), %xmm5 - pmulld 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pmulld 69, %xmm5 - pmulld 0x45,%xmm5 - -// CHECK: pmulld 32493, %xmm5 - pmulld 0x7eed,%xmm5 - -// CHECK: pmulld 3133065982, %xmm5 - pmulld 0xbabecafe,%xmm5 - -// CHECK: pmulld 305419896, %xmm5 - pmulld 0x12345678,%xmm5 - -// CHECK: pmulld %xmm5, %xmm5 - pmulld %xmm5,%xmm5 - -// CHECK: ptest 3735928559(%ebx,%ecx,8), %xmm5 - ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: ptest 69, %xmm5 - ptest 0x45,%xmm5 - -// CHECK: ptest 32493, %xmm5 - ptest 0x7eed,%xmm5 - -// CHECK: ptest 3133065982, %xmm5 - ptest 0xbabecafe,%xmm5 - -// CHECK: ptest 305419896, %xmm5 - ptest 0x12345678,%xmm5 - -// CHECK: ptest %xmm5, %xmm5 - ptest %xmm5,%xmm5 - -// CHECK: crc32b %bl, %eax - crc32b %bl, %eax - -// CHECK: crc32b 4(%ebx), %eax - crc32b 4(%ebx), %eax - -// CHECK: crc32w %bx, %eax - crc32w %bx, %eax - -// CHECK: crc32w 4(%ebx), %eax - crc32w 4(%ebx), %eax - -// CHECK: crc32l %ebx, %eax - crc32l %ebx, %eax - -// CHECK: crc32l 4(%ebx), %eax - crc32l 4(%ebx), %eax - -// CHECK: crc32l 3735928559(%ebx,%ecx,8), %ecx - crc32l 0xdeadbeef(%ebx,%ecx,8),%ecx - -// CHECK: crc32l 69, %ecx - crc32l 0x45,%ecx - -// CHECK: crc32l 32493, %ecx - crc32l 0x7eed,%ecx - -// CHECK: crc32l 3133065982, %ecx - crc32l 0xbabecafe,%ecx - -// CHECK: crc32l %ecx, %ecx - crc32l %ecx,%ecx - -// CHECK: pcmpgtq 3735928559(%ebx,%ecx,8), %xmm5 - pcmpgtq 0xdeadbeef(%ebx,%ecx,8),%xmm5 - -// CHECK: pcmpgtq 69, %xmm5 - pcmpgtq 0x45,%xmm5 - -// CHECK: pcmpgtq 32493, %xmm5 - pcmpgtq 0x7eed,%xmm5 - -// CHECK: pcmpgtq 3133065982, %xmm5 - pcmpgtq 0xbabecafe,%xmm5 - -// CHECK: pcmpgtq 305419896, %xmm5 - pcmpgtq 0x12345678,%xmm5 - -// CHECK: pcmpgtq %xmm5, %xmm5 - pcmpgtq %xmm5,%xmm5 - -// CHECK: aesimc %xmm0, %xmm1 - aesimc %xmm0,%xmm1 - -// CHECK: aesimc (%eax), %xmm1 - aesimc (%eax),%xmm1 - -// CHECK: aesenc %xmm1, %xmm2 - aesenc %xmm1,%xmm2 - -// CHECK: aesenc 4(%ebx), %xmm2 - aesenc 4(%ebx),%xmm2 - -// CHECK: aesenclast %xmm3, %xmm4 - aesenclast %xmm3,%xmm4 - -// CHECK: aesenclast 4(%edx,%edi), %xmm4 - aesenclast 4(%edx,%edi),%xmm4 - -// CHECK: aesdec %xmm5, %xmm6 - aesdec %xmm5,%xmm6 - -// CHECK: aesdec 4(%ecx,%eax,8), %xmm6 - aesdec 4(%ecx,%eax,8),%xmm6 - -// CHECK: aesdeclast %xmm7, %xmm0 - aesdeclast %xmm7,%xmm0 - -// CHECK: aesdeclast 3405691582, %xmm0 - aesdeclast 0xcafebabe,%xmm0 - -// CHECK: aeskeygenassist $125, %xmm1, %xmm2 - aeskeygenassist $125, %xmm1, %xmm2 - -// CHECK: aeskeygenassist $125, (%edx,%eax,4), %xmm2 - aeskeygenassist $125, (%edx,%eax,4), %xmm2 diff --git a/test/MC/AsmParser/X86/x86_32-mismatched-add.s b/test/MC/AsmParser/X86/x86_32-mismatched-add.s deleted file mode 100644 index 0840c65ca95a..000000000000 --- a/test/MC/AsmParser/X86/x86_32-mismatched-add.s +++ /dev/null @@ -1,8 +0,0 @@ -// RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck %s -// XFAIL: * - -// CHECK: addl $4294967295, %eax # encoding: [0x83,0xc0,0xff] - addl $0xFFFFFFFF, %eax - -// CHECK: addl $65535, %eax # encoding: [0x66,0x83,0xc0,0xff] - addw $0xFFFF, %ax diff --git a/test/MC/AsmParser/X86/x86_64-incl_decl.s b/test/MC/AsmParser/X86/x86_64-incl_decl.s deleted file mode 100644 index 51315f83f2cc..000000000000 --- a/test/MC/AsmParser/X86/x86_64-incl_decl.s +++ /dev/null @@ -1,26 +0,0 @@ -// RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck --check-prefix=CHECK-X86_32 %s -// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck --check-prefix=CHECK-X86_64 %s - -# CHECK-X86_32: incb %al # encoding: [0xfe,0xc0] -# CHECK-X86_64: incb %al # encoding: [0xfe,0xc0] - incb %al - -# CHECK-X86_32: incw %ax # encoding: [0x66,0x40] -# CHECK-X86_64: incw %ax # encoding: [0x66,0xff,0xc0] - incw %ax - -# CHECK-X86_32: incl %eax # encoding: [0x40] -# CHECK-X86_64: incl %eax # encoding: [0xff,0xc0] - incl %eax - -# CHECK-X86_32: decb %al # encoding: [0xfe,0xc8] -# CHECK-X86_64: decb %al # encoding: [0xfe,0xc8] - decb %al - -# CHECK-X86_32: decw %ax # encoding: [0x66,0x48] -# CHECK-X86_64: decw %ax # encoding: [0x66,0xff,0xc8] - decw %ax - -# CHECK-X86_32: decl %eax # encoding: [0x48] -# CHECK-X86_64: decl %eax # encoding: [0xff,0xc8] - decl %eax diff --git a/test/MC/AsmParser/X86/x86_64-new-encoder.s b/test/MC/AsmParser/X86/x86_64-new-encoder.s deleted file mode 100644 index 9f94d8404f42..000000000000 --- a/test/MC/AsmParser/X86/x86_64-new-encoder.s +++ /dev/null @@ -1,159 +0,0 @@ -// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s - -movl foo(%rip), %eax -// CHECK: movl foo(%rip), %eax -// CHECK: encoding: [0x8b,0x05,A,A,A,A] -// CHECK: fixup A - offset: 2, value: foo-4, kind: reloc_riprel_4byte - -movb $12, foo(%rip) -// CHECK: movb $12, foo(%rip) -// CHECK: encoding: [0xc6,0x05,A,A,A,A,0x0c] -// CHECK: fixup A - offset: 2, value: foo-5, kind: reloc_riprel_4byte - -movw $12, foo(%rip) -// CHECK: movw $12, foo(%rip) -// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,0x0c,0x00] -// CHECK: fixup A - offset: 3, value: foo-6, kind: reloc_riprel_4byte - -movl $12, foo(%rip) -// CHECK: movl $12, foo(%rip) -// CHECK: encoding: [0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00] -// CHECK: fixup A - offset: 2, value: foo-8, kind: reloc_riprel_4byte - -movq $12, foo(%rip) -// CHECK: movq $12, foo(%rip) -// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00] -// CHECK: fixup A - offset: 3, value: foo-8, kind: reloc_riprel_4byte - -// CHECK: addq $-424, %rax -// CHECK: encoding: [0x48,0x05,0x58,0xfe,0xff,0xff] -addq $-424, %rax - - -// CHECK: movq _foo@GOTPCREL(%rip), %rax -// CHECK: encoding: [0x48,0x8b,0x05,A,A,A,A] -// CHECK: fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load -movq _foo@GOTPCREL(%rip), %rax - -// CHECK: movq _foo@GOTPCREL(%rip), %r14 -// CHECK: encoding: [0x4c,0x8b,0x35,A,A,A,A] -// CHECK: fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load -movq _foo@GOTPCREL(%rip), %r14 - - -// CHECK: movq (%r13,%rax,8), %r13 -// CHECK: encoding: [0x4d,0x8b,0x6c,0xc5,0x00] -movq 0x00(%r13,%rax,8),%r13 - -// CHECK: testq %rax, %rbx -// CHECK: encoding: [0x48,0x85,0xd8] -testq %rax, %rbx - -// CHECK: cmpq %rbx, %r14 -// CHECK: encoding: [0x49,0x39,0xde] - cmpq %rbx, %r14 - -// rdar://7947167 - -movsq -// CHECK: movsq -// CHECK: encoding: [0x48,0xa5] - -movsl -// CHECK: movsl -// CHECK: encoding: [0xa5] - -stosq -// CHECK: stosq -// CHECK: encoding: [0x48,0xab] -stosl -// CHECK: stosl -// CHECK: encoding: [0xab] - - -// Not moffset forms of moves, they are x86-32 only! rdar://7947184 -movb 0, %al // CHECK: movb 0, %al # encoding: [0x8a,0x04,0x25,0x00,0x00,0x00,0x00] -movw 0, %ax // CHECK: movw 0, %ax # encoding: [0x66,0x8b,0x04,0x25,0x00,0x00,0x00,0x00] -movl 0, %eax // CHECK: movl 0, %eax # encoding: [0x8b,0x04,0x25,0x00,0x00,0x00,0x00] - -// CHECK: pushfq # encoding: [0x9c] - pushf -// CHECK: pushfq # encoding: [0x9c] - pushfq -// CHECK: popfq # encoding: [0x9d] - popf -// CHECK: popfq # encoding: [0x9d] - popfq - -// CHECK: movabsq $-281474976710654, %rax -// CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff] - movabsq $0xFFFF000000000002, %rax - -// CHECK: movq $-281474976710654, %rax -// CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff] - movq $0xFFFF000000000002, %rax - -// CHECK: movq $-65536, %rax -// CHECK: encoding: [0x48,0xc7,0xc0,0x00,0x00,0xff,0xff] - movq $0xFFFFFFFFFFFF0000, %rax - -// CHECK: movq $-256, %rax -// CHECK: encoding: [0x48,0xc7,0xc0,0x00,0xff,0xff,0xff] - movq $0xFFFFFFFFFFFFFF00, %rax - -// CHECK: movq $10, %rax -// CHECK: encoding: [0x48,0xc7,0xc0,0x0a,0x00,0x00,0x00] - movq $10, %rax - -// rdar://8014869 -// -// CHECK: ret -// CHECK: encoding: [0xc3] - retq - -// CHECK: sete %al -// CHECK: encoding: [0x0f,0x94,0xc0] - setz %al - -// CHECK: setne %al -// CHECK: encoding: [0x0f,0x95,0xc0] - setnz %al - -// CHECK: je 0 -// CHECK: encoding: [0x74,A] - jz 0 - -// CHECK: jne -// CHECK: encoding: [0x75,A] - jnz 0 - -// rdar://8017515 -btq $0x01,%rdx -// CHECK: btq $1, %rdx -// CHECK: encoding: [0x48,0x0f,0xba,0xe2,0x01] - -//rdar://8017633 -// CHECK: movzbl %al, %esi -// CHECK: encoding: [0x0f,0xb6,0xf0] - movzx %al, %esi - -// CHECK: movzbq %al, %rsi -// CHECK: encoding: [0x48,0x0f,0xb6,0xf0] - movzx %al, %rsi - -// CHECK: movzbq (%rsp), %rsi -// CHECK: encoding: [0x48,0x0f,0xb6,0x34,0x24] - movzx 0(%rsp), %rsi - - -// rdar://7873482 -// CHECK: [0x65,0x8b,0x04,0x25,0x7c,0x00,0x00,0x00] - movl %gs:124, %eax - -// CHECK: jmpq *8(%rax) -// CHECK: encoding: [0xff,0x60,0x08] - jmp *8(%rax) - -// CHECK: btq $61, -216(%rbp) -// CHECK: encoding: [0x48,0x0f,0xba,0xa5,0x28,0xff,0xff,0xff,0x3d] - btq $61, -216(%rbp) diff --git a/test/MC/AsmParser/X86/x86_64-operands.s b/test/MC/AsmParser/X86/x86_64-operands.s deleted file mode 100644 index 88f1a64cc42f..000000000000 --- a/test/MC/AsmParser/X86/x86_64-operands.s +++ /dev/null @@ -1,15 +0,0 @@ -// RUN: llvm-mc -triple x86_64-unknown-unknown %s | FileCheck %s - -# CHECK: callq a - callq a - -# CHECK: leaq -40(%rbp), %r15 - leaq -40(%rbp), %r15 - - - -// rdar://8013734 - Alias dr6=db6 -mov %dr6, %rax -mov %db6, %rax -# CHECK: movq %dr6, %rax -# CHECK: movq %dr6, %rax diff --git a/test/MC/AsmParser/X86/x86_64-suffix-matching.s b/test/MC/AsmParser/X86/x86_64-suffix-matching.s deleted file mode 100644 index 0ae6fe502d1c..000000000000 --- a/test/MC/AsmParser/X86/x86_64-suffix-matching.s +++ /dev/null @@ -1,10 +0,0 @@ -// RUN: llvm-mc -triple x86_64 -o - %s | FileCheck %s - -// CHECK: addl $0, %eax - add $0, %eax -// CHECK: addb $255, %al - add $0xFF, %al -// CHECK: orq %rax, %rdx - or %rax, %rdx -// CHECK: shlq $3, %rax - shl $3, %rax diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s deleted file mode 100644 index a82d2a1c0d41..000000000000 --- a/test/MC/AsmParser/X86/x86_instructions.s +++ /dev/null @@ -1,175 +0,0 @@ -// RUN: llvm-mc -triple x86_64-unknown-unknown %s > %t 2> %t.err -// RUN: FileCheck < %t %s -// RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s - -// CHECK: subb %al, %al - subb %al, %al - -// CHECK: addl $24, %eax - addl $24, %eax - -// CHECK: movl %eax, 10(%ebp) - movl %eax, 10(%ebp) -// CHECK: movl %eax, 10(%ebp,%ebx) - movl %eax, 10(%ebp, %ebx) -// CHECK: movl %eax, 10(%ebp,%ebx,4) - movl %eax, 10(%ebp, %ebx, 4) -// CHECK: movl %eax, 10(,%ebx,4) - movl %eax, 10(, %ebx, 4) - -// CHECK: movl 0, %eax - movl 0, %eax -// CHECK: movl $0, %eax - movl $0, %eax - -// CHECK: ret - ret - -// FIXME: Check that this matches SUB32ri8 -// CHECK: subl $1, %eax - subl $1, %eax - -// FIXME: Check that this matches SUB32ri8 -// CHECK: subl $-1, %eax - subl $-1, %eax - -// FIXME: Check that this matches SUB32ri -// CHECK: subl $256, %eax - subl $256, %eax - -// FIXME: Check that this matches XOR64ri8 -// CHECK: xorq $1, %rax - xorq $1, %rax - -// FIXME: Check that this matches XOR64ri32 -// CHECK: xorq $256, %rax - xorq $256, %rax - -// FIXME: Check that this matches SUB8rr -// CHECK: subb %al, %bl - subb %al, %bl - -// FIXME: Check that this matches SUB16rr -// CHECK: subw %ax, %bx - subw %ax, %bx - -// FIXME: Check that this matches SUB32rr -// CHECK: subl %eax, %ebx - subl %eax, %ebx - -// FIXME: Check that this matches the correct instruction. -// CHECK: callq *%rax - call *%rax - -// FIXME: Check that this matches the correct instruction. -// CHECK: shldl %cl, %eax, %ebx - shldl %cl, %eax, %ebx - -// CHECK: shll $2, %eax - shll $2, %eax - -// CHECK: shll $2, %eax - sall $2, %eax - -// CHECK: rep -// CHECK: insb - rep;insb - -// CHECK: rep -// CHECK: outsb - rep;outsb - -// CHECK: rep -// CHECK: movsb - rep;movsb - -// CHECK: rep -// CHECK: lodsb - rep;lodsb - -// CHECK: rep -// CHECK: stosb - rep;stosb - -// NOTE: repz and repe have the same opcode as rep -// CHECK: rep -// CHECK: cmpsb - repz;cmpsb - -// NOTE: repnz has the same opcode as repne -// CHECK: repne -// CHECK: cmpsb - repnz;cmpsb - -// NOTE: repe and repz have the same opcode as rep -// CHECK: rep -// CHECK: scasb - repe;scasb - -// CHECK: repne -// CHECK: scasb - repne;scasb - -// CHECK: lock -// CHECK: cmpxchgb %al, (%ebx) - lock;cmpxchgb %al, 0(%ebx) - -// CHECK: cs -// CHECK: movb (%eax), %al - cs;movb 0(%eax), %al - -// CHECK: ss -// CHECK: movb (%eax), %al - ss;movb 0(%eax), %al - -// CHECK: ds -// CHECK: movb (%eax), %al - ds;movb 0(%eax), %al - -// CHECK: es -// CHECK: movb (%eax), %al - es;movb 0(%eax), %al - -// CHECK: fs -// CHECK: movb (%eax), %al - fs;movb 0(%eax), %al - -// CHECK: gs -// CHECK: movb (%eax), %al - gs;movb 0(%eax), %al - -// CHECK: fadd %st(0) -// CHECK: fadd %st(1) -// CHECK: fadd %st(7) - -fadd %st(0) -fadd %st(1) -fadd %st(7) - -// CHECK: leal 0, %eax - leal 0, %eax - -// rdar://7986634 - Insensitivity on opcodes. -// CHECK: int3 -INT3 - - -// Allow scale factor without index register. -// CHECK: movaps %xmm3, (%esi) -// CHECK-STDERR: warning: scale factor without index register is ignored -movaps %xmm3, (%esi, 2) - -// CHECK: imull $12, %eax, %eax -imul $12, %eax - -// CHECK: imull %ecx, %eax -imull %ecx, %eax - -// PR8114 -// CHECK: outb %al, %dx -// CHECK: outw %ax, %dx -// CHECK: outl %eax, %dx - -out %al, (%dx) -out %ax, (%dx) -outl %eax, (%dx) diff --git a/test/MC/AsmParser/dash-n.s b/test/MC/AsmParser/dash-n.s new file mode 100644 index 000000000000..b6243a4a01d0 --- /dev/null +++ b/test/MC/AsmParser/dash-n.s @@ -0,0 +1,7 @@ +// RUN: not llvm-mc -n -triple i386-unknown-unknown %s 2> %t +// RUN: FileCheck < %t %s + +.globl a +// CHECK: error: expected section directive before assembly directive +.long 0 + diff --git a/test/MC/AsmParser/directive_abort.s b/test/MC/AsmParser/directive_abort.s index 1fd1f6e44a32..86e6267a7a1e 100644 --- a/test/MC/AsmParser/directive_abort.s +++ b/test/MC/AsmParser/directive_abort.s @@ -1,4 +1,4 @@ -# RUN: llvm-mc -triple i386-unknown-unknown %s 2> %t +# RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t # RUN: FileCheck -input-file %t %s # CHECK: error: .abort 'please stop assembing' diff --git a/test/MC/AsmParser/directive_ascii.s b/test/MC/AsmParser/directive_ascii.s index 5bfc1e9d6eac..a7ba7bbd5da1 100644 --- a/test/MC/AsmParser/directive_ascii.s +++ b/test/MC/AsmParser/directive_ascii.s @@ -32,3 +32,10 @@ TEST4: TEST5: .ascii "\b\f\n\r\t\\\"" +# CHECK: TEST6: +# CHECK: .byte 66 +# CHECK: .byte 0 +# CHECK: .byte 67 +# CHECK: .byte 0 +TEST6: + .string "B", "C" diff --git a/test/MC/AsmParser/directive_loc.s b/test/MC/AsmParser/directive_loc.s index b122fdc2cf29..164d42a3fa7c 100644 --- a/test/MC/AsmParser/directive_loc.s +++ b/test/MC/AsmParser/directive_loc.s @@ -5,4 +5,4 @@ .loc 1 .loc 1 2 .loc 1 2 3 - + .loc 1 2 discriminator 1 diff --git a/test/MC/AsmParser/directive_set.s b/test/MC/AsmParser/directive_set.s index f1fc30a85df1..69abce0db2ff 100644 --- a/test/MC/AsmParser/directive_set.s +++ b/test/MC/AsmParser/directive_set.s @@ -5,3 +5,8 @@ TEST0: .set a, 0 +# CHECK: TEST1: +# CHECK: a = 0 +TEST1: + .equ a, 0 + diff --git a/test/MC/AsmParser/directive_values.s b/test/MC/AsmParser/directive_values.s index c7617a337e02..98259bdb29d5 100644 --- a/test/MC/AsmParser/directive_values.s +++ b/test/MC/AsmParser/directive_values.s @@ -36,3 +36,23 @@ TEST4: # CHECK: .quad 1075 +TEST5: + .value 8 +# CHECK: TEST5: +# CHECK: .short 8 + +TEST6: + .byte 'c' + .byte '\'' + .byte '\\' + .byte '\#' + .byte '\t' + .byte '\n' + +# CHECK: TEST6 +# CHECK: .byte 99 +# CHECK: .byte 39 +# CHECK: .byte 92 +# CHECK: .byte 35 +# CHECK: .byte 9 +# CHECK: .byte 10 diff --git a/test/MC/AsmParser/equ.s b/test/MC/AsmParser/equ.s new file mode 100644 index 000000000000..568f58fa1298 --- /dev/null +++ b/test/MC/AsmParser/equ.s @@ -0,0 +1,9 @@ +// RUN: not llvm-mc -n -triple i386-unknown-unknown %s 2> %t +// RUN: FileCheck < %t %s + +.equ a, 0 +.set a, 1 +.equ a, 2 +.equiv a, 3 +// CHECK: error: redefinition of 'a' + diff --git a/test/MC/AsmParser/expr_symbol_modifiers.s b/test/MC/AsmParser/expr_symbol_modifiers.s new file mode 100644 index 000000000000..7371c97cbdf4 --- /dev/null +++ b/test/MC/AsmParser/expr_symbol_modifiers.s @@ -0,0 +1,14 @@ +// RUN: not llvm-mc -triple x86_64-unknown-unknown %s > %t 2> %t.err +// RUN: FileCheck < %t %s +// RUN: FileCheck -check-prefix=CHECK-STDERR < %t.err %s + +// CHECK: .long 1 +.long 1 +// CHECK-STDERR: invalid modifier 'GOTPCREL' (no symbols present) +.long 10 + 4@GOTPCREL +// CHECK: .long a@GOTPCREL+4 +.long a + 4@GOTPCREL +// CHECK: .long a@GOTPCREL+b@GOTPCREL +.long (a + b)@GOTPCREL +// CHECK: .long (10+b@GOTPCREL)+4 +.long 10 + b + 4@GOTPCREL diff --git a/test/MC/AsmParser/exprs.s b/test/MC/AsmParser/exprs.s index 350360ce684e..0861922b603c 100644 --- a/test/MC/AsmParser/exprs.s +++ b/test/MC/AsmParser/exprs.s @@ -1,47 +1,54 @@ -// FIXME: For now this test just checks that llvm-mc -triple i386-unknown-unknown works. Once we have .macro, -// .if, and .abort we can write a better test (without resorting to miles of -// greps). - // RUN: llvm-mc -triple i386-unknown-unknown %s > %t +.macro check_expr + .if ($0) != ($1) + .abort Unexpected $0 != $1. + .endif +.endmacro + .text g: h: j: k: .data - .byte !1 + 2 - .byte !0 - .byte ~0 - .byte -1 - .byte +1 - .byte 1 + 2 - .byte 1 & 3 - .byte 4 / 2 - .byte 4 / -2 - .byte 1 == 1 - .byte 1 == 0 - .byte 1 > 0 - .byte 1 >= 1 - .byte 1 < 2 - .byte 1 <= 1 - .byte 4 % 3 - .byte 2 * 2 - .byte 2 != 2 - .byte 2 <> 2 - .byte 1 | 2 - .byte 1 << 1 - .byte 2 >> 1 - .byte ~0 >> 1 - .byte 3 - 2 - .byte 1 ^ 3 - .byte 1 && 2 - .byte 3 && 0 - .byte 1 || 2 - .byte 0 || 0 - + check_expr !1 + 2, 2 + check_expr !0, 1 + check_expr ~0, -1 + check_expr -1, ~0 + check_expr +1, 1 + check_expr 1 + 2, 3 + check_expr 1 & 3, 1 + check_expr 4 / 2, 2 + check_expr 4 / -2, -2 + check_expr 1 == 1, 1 + check_expr 1 == 0, 0 + check_expr 1 > 0, 1 + check_expr 1 >= 1, 1 + check_expr 1 < 2, 1 + check_expr 1 <= 1, 1 + check_expr 4 % 3, 1 + check_expr 2 * 2, 4 + check_expr 2 != 2, 0 + check_expr 2 <> 2, 0 + check_expr 1 | 2, 3 + check_expr 1 << 1, 2 + check_expr 2 >> 1, 1 + check_expr (~0 >> 1), -1 + check_expr [~0 >> 1], -1 + check_expr 4 * [4 + (3 + [2 * 2] + 1)], 48 + check_expr 3 - 2, 1 + check_expr 1 ^ 3, 2 + check_expr 1 && 2, 1 + check_expr 3 && 0, 0 + check_expr 0 && 1, 0 + check_expr 1 || 2, 1 + check_expr 0 || 1, 1 + check_expr 0 || 0, 0 + check_expr 1 + 2 < 3 + 4, 1 + .set c, 10 - .byte c + 1 + check_expr c + 1, 11 d = e + 10 .long d diff --git a/test/MC/AsmParser/floating-literals.s b/test/MC/AsmParser/floating-literals.s new file mode 100644 index 000000000000..bd122a8cf0e3 --- /dev/null +++ b/test/MC/AsmParser/floating-literals.s @@ -0,0 +1,35 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK: .long 1067412619 +# CHECK: .long 1075000115 +# CHECK: .long 1077936128 +# CHECK: .long 1082549862 +.single 1.2455, +2.3, 3, + 4.2 + +# CHECK: .long 1067928519 +.float 1.307 + +# CHECK: .quad 4617315517961601024 +# CHECK: .quad 4597526701198935065 +# CHECK: .quad -4600933674317040845 +.double 5, .232, -11.1 + +# CHECK: .quad 0 +.double 0.0 + +# CHECK: .quad -4570379565595099136 +.double -1.2e3 +# CHECK: .quad -4690170861623122860 +.double -1.2e-5 +# CHECK: .quad -4465782973978902528 +.double -1.2e+10 +# CHECK: .quad 4681608360884174848 +.double 1e5 +# CHECK: .quad 4681608360884174848 +.double 1.e5 +# CHECK: .quad 4611686018427387904 +.double 2. + +// APFloat should reject these with an error, not crash: +//.double -1.2e+ +//.double -1.2e diff --git a/test/MC/AsmParser/full_line_comment.s b/test/MC/AsmParser/full_line_comment.s new file mode 100644 index 000000000000..4c9198634830 --- /dev/null +++ b/test/MC/AsmParser/full_line_comment.s @@ -0,0 +1,8 @@ +// RUN: llvm-mc -triple arm-apple-darwin10 %s | FileCheck %s +# this is a full line comment starting at column 1 + # this starting at column 2 + + .data +// CHECK: .long 0 +.long 0 +# .long 1 this line is commented out diff --git a/test/MC/AsmParser/ifdef.s b/test/MC/AsmParser/ifdef.s new file mode 100644 index 000000000000..98bff6525b2b --- /dev/null +++ b/test/MC/AsmParser/ifdef.s @@ -0,0 +1,29 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifdef undefined + .byte 0 +.else + .byte 1 +.endif + +defined: + +# CHECK: .byte 1 +# CHECK-NOT: .byte 0 +.ifdef defined + .byte 1 +.else + .byte 0 +.endif + + movl %eax, undefined + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifdef undefined + .byte 0 +.else + .byte 1 +.endif diff --git a/test/MC/AsmParser/ifndef.s b/test/MC/AsmParser/ifndef.s new file mode 100644 index 000000000000..d9c9c5457a70 --- /dev/null +++ b/test/MC/AsmParser/ifndef.s @@ -0,0 +1,29 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK: .byte 1 +# CHECK-NOT: byte 0 +.ifndef undefined + .byte 1 +.else + .byte 0 +.endif + +defined: + +# CHECK-NOT: byte 0 +# CHECK: .byte 1 +.ifndef defined + .byte 0 +.else + .byte 1 +.endif + + movl %eax, undefined + +# CHECK: .byte 1 +# CHECK-NOT: byte 0 +.ifndef undefined + .byte 1 +.else + .byte 0 +.endif diff --git a/test/MC/AsmParser/paren.s b/test/MC/AsmParser/paren.s new file mode 100644 index 000000000000..702e309ddeeb --- /dev/null +++ b/test/MC/AsmParser/paren.s @@ -0,0 +1,8 @@ +// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t1 > %t2 +// RUN: FileCheck < %t1 %s + +// CHECK: error: expected ']' in brackets expression +.size x, [.-x) + +// CHECK: error: expected ')' in parentheses expression +.size y, (.-y] diff --git a/test/MC/AsmParser/rename.s b/test/MC/AsmParser/rename.s new file mode 100644 index 000000000000..64ca51538128 --- /dev/null +++ b/test/MC/AsmParser/rename.s @@ -0,0 +1,10 @@ +// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + + .size bar, . - bar +.Ltmp0: + .size foo, .Ltmp0 - foo + +// CHECK: .Ltmp0: +// CHECK: .size bar, .Ltmp0-bar +// CHECK: .Ltmp01 +// CHECK: .size foo, .Ltmp01-foo diff --git a/test/MC/AsmParser/section.s b/test/MC/AsmParser/section.s new file mode 100644 index 000000000000..414fc6d5397f --- /dev/null +++ b/test/MC/AsmParser/section.s @@ -0,0 +1,107 @@ +# RUN: llvm-mc -triple i386-pc-linux-gnu -filetype=obj -o %t %s +# RUN: elf-dump --dump-section-data < %t | FileCheck %s +.section test1 +.byte 1 +.section test2 +.byte 2 +.previous +.byte 1 +.section test2 +.byte 2 +.previous +.byte 1 +.section test1 +.byte 1 +.previous +.byte 1 +.section test2 +.byte 2 +.pushsection test3 +.byte 3 +.pushsection test4 +.byte 4 +.pushsection test5 +.byte 5 +.popsection +.byte 4 +.popsection +.byte 3 +.popsection +.byte 2 +.pushsection test3 +.byte 3 +.pushsection test4 +.byte 4 +.previous +.byte 3 +.popsection +.byte 3 +.previous +.byte 2 +.section test1 +.byte 1 +.popsection +.byte 2 +.previous +.byte 1 +.previous +# CHECK: (('sh_name', 0x00000012) # 'test1' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x00000034) +# CHECK-NEXT: ('sh_size', 0x00000007) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '01010101 010101') +# CHECK-NEXT: ), +# CHECK: (('sh_name', 0x00000018) # 'test2' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x0000003b) +# CHECK-NEXT: ('sh_size', 0x00000006) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '02020202 0202') +# CHECK-NEXT: ), +# CHECK: (('sh_name', 0x0000001e) # 'test3' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x00000041) +# CHECK-NEXT: ('sh_size', 0x00000005) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '03030303 03') +# CHECK-NEXT: ), +# CHECK: (('sh_name', 0x00000024) # 'test4' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x00000046) +# CHECK-NEXT: ('sh_size', 0x00000003) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '040404') +# CHECK-NEXT: ), +# CHECK: (('sh_name', 0x0000002a) # 'test5' +# CHECK-NEXT: ('sh_type', 0x00000001) +# CHECK-NEXT: ('sh_flags', 0x00000000) +# CHECK-NEXT: ('sh_addr', 0x00000000) +# CHECK-NEXT: ('sh_offset', 0x00000049) +# CHECK-NEXT: ('sh_size', 0x00000001) +# CHECK-NEXT: ('sh_link', 0x00000000) +# CHECK-NEXT: ('sh_info', 0x00000000) +# CHECK-NEXT: ('sh_addralign', 0x00000001) +# CHECK-NEXT: ('sh_entsize', 0x00000000) +# CHECK-NEXT: ('_section_data', '05') +# CHECK-NEXT: ), diff --git a/test/MC/COFF/align-nops.s b/test/MC/COFF/align-nops.s new file mode 100644 index 000000000000..2971ec67798e --- /dev/null +++ b/test/MC/COFF/align-nops.s @@ -0,0 +1,50 @@ +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s -o - | coff-dump.py | FileCheck %s + +// Test that we get optimal nops in text + .text +f0: + .long 0 + .align 8, 0x90 + .long 0 + .align 8 + +// But not in another section + .data + .long 0 + .align 8, 0x90 + .long 0 + .align 8 + +//CHECK: Name = .text +//CHECK-NEXT: VirtualSize +//CHECK-NEXT: VirtualAddress +//CHECK-NEXT: SizeOfRawData = 16 +//CHECK-NEXT: PointerToRawData +//CHECK-NEXT: PointerToRelocations +//CHECK-NEXT: PointerToLineNumbers +//CHECK-NEXT: NumberOfRelocations +//CHECK-NEXT: NumberOfLineNumbers +//CHECK-NEXT: Charateristics = 0x60400020 +//CHECK-NEXT: IMAGE_SCN_CNT_CODE +//CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES +//CHECK-NEXT: IMAGE_SCN_MEM_EXECUTE +//CHECK-NEXT: IMAGE_SCN_MEM_READ +//CHECK-NEXT: SectionData = +//CHECK-NEXT: 00 00 00 00 0F 1F 40 00 - 00 00 00 00 0F 1F 40 00 + +//CHECK: Name = .data +//CHECK-NEXT: VirtualSize +//CHECK-NEXT: VirtualAddress +//CHECK-NEXT: SizeOfRawData = 16 +//CHECK-NEXT: PointerToRawData +//CHECK-NEXT: PointerToRelocations +//CHECK-NEXT: PointerToLineNumbers +//CHECK-NEXT: NumberOfRelocations +//CHECK-NEXT: NumberOfLineNumbers +//CHECK-NEXT: Charateristics = 0xC0400040 +//CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA +//CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES +//CHECK-NEXT: IMAGE_SCN_MEM_READ +//CHECK-NEXT: IMAGE_SCN_MEM_WRITE +//CHECK-NEXT: SectionData = +//CHECK-NEXT: 00 00 00 00 90 90 90 90 - 00 00 00 00 00 00 00 00 diff --git a/test/MC/COFF/basic-coff.ll b/test/MC/COFF/basic-coff.ll deleted file mode 100644 index 1e67db0e5c42..000000000000 --- a/test/MC/COFF/basic-coff.ll +++ /dev/null @@ -1,136 +0,0 @@ -; This test checks that the COFF object emitter works for the most basic -; programs. - -; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o %t -; RUN: coff-dump.py %abs_tmp | FileCheck %s -; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o %t - -@.str = private constant [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1] - -define i32 @main() nounwind { -entry: - %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0)) nounwind ; <i32> [#uses=0] - ret i32 0 -} - -declare i32 @printf(i8* nocapture, ...) nounwind - -; CHECK: { -; CHECK: MachineType = IMAGE_FILE_MACHINE_I386 (0x14C) -; CHECK: NumberOfSections = 2 -; CHECK: TimeDateStamp = {{[0-9]+}} -; CHECK: PointerToSymbolTable = 0x99 -; CHECK: NumberOfSymbols = 7 -; CHECK: SizeOfOptionalHeader = 0 -; CHECK: Characteristics = 0x0 -; CHECK: Sections = [ -; CHECK: 0 = { -; CHECK: Name = .text -; CHECK: VirtualSize = 0 -; CHECK: VirtualAddress = 0 -; CHECK: SizeOfRawData = 21 -; CHECK: PointerToRawData = 0x64 -; CHECK: PointerToRelocations = 0x79 -; CHECK: PointerToLineNumbers = 0x0 -; CHECK: NumberOfRelocations = 2 -; CHECK: NumberOfLineNumbers = 0 -; CHECK: Charateristics = 0x60500020 -; CHECK: IMAGE_SCN_CNT_CODE -; CHECK: IMAGE_SCN_ALIGN_16BYTES -; CHECK: IMAGE_SCN_MEM_EXECUTE -; CHECK: IMAGE_SCN_MEM_READ -; CHECK: SectionData = -; CHECK: 83 EC 04 C7 04 24 00 00 - 00 00 E8 00 00 00 00 31 |.....$.........1| -; CHECK: C0 83 C4 04 C3 |.....| -; CHECK: Relocations = [ -; CHECK: 0 = { -; CHECK: VirtualAddress = 0x6 -; CHECK: SymbolTableIndex = 5 -; CHECK: Type = IMAGE_REL_I386_DIR32 (6) -; CHECK: SymbolName = _main -; CHECK: } -; CHECK: 1 = { -; CHECK: VirtualAddress = 0xB -; CHECK: SymbolTableIndex = 6 -; CHECK: Type = IMAGE_REL_I386_REL32 (20) -; CHECK: SymbolName = L_.str -; CHECK: } -; CHECK: ] -; CHECK: } -; CHECK: 1 = { -; CHECK: Name = .data -; CHECK: VirtualSize = 0 -; CHECK: VirtualAddress = 0 -; CHECK: SizeOfRawData = 12 -; CHECK: PointerToRawData = 0x8D -; CHECK: PointerToRelocations = 0x0 -; CHECK: PointerToLineNumbers = 0x0 -; CHECK: NumberOfRelocations = 0 -; CHECK: NumberOfLineNumbers = 0 -; CHECK: Charateristics = 0xC0100040 -; CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA -; CHECK: IMAGE_SCN_ALIGN_1BYTES -; CHECK: IMAGE_SCN_MEM_READ -; CHECK: IMAGE_SCN_MEM_WRITE -; CHECK: SectionData = -; CHECK: 48 65 6C 6C 6F 20 57 6F - 72 6C 64 00 |Hello World.| -; CHECK: Relocations = None -; CHECK: } -; CHECK: ] -; CHECK: Symbols = [ -; CHECK: 0 = { -; CHECK: Name = .text -; CHECK: Value = 0 -; CHECK: SectionNumber = 1 -; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -; CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3) -; CHECK: NumberOfAuxSymbols = 1 -; CHECK: AuxillaryData = -; CHECK: 15 00 00 00 02 00 00 00 - 00 00 00 00 01 00 00 00 |................| -; CHECK: 00 00 |..| -; CHECK: } -; CHECK: 1 = { -; CHECK: Name = .data -; CHECK: Value = 0 -; CHECK: SectionNumber = 2 -; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -; CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3) -; CHECK: NumberOfAuxSymbols = 1 -; CHECK: AuxillaryData = -; CHECK: 0C 00 00 00 00 00 00 00 - 00 00 00 00 02 00 00 00 |................| -; CHECK: 00 00 |..| -; CHECK: } -; CHECK: 2 = { -; CHECK: Name = _main -; CHECK: Value = 0 -; CHECK: SectionNumber = 1 -; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -; CHECK: ComplexType = IMAGE_SYM_DTYPE_FUNCTION (2) -; CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2) -; CHECK: NumberOfAuxSymbols = 0 -; CHECK: AuxillaryData = -; CHECK: } -; CHECK: 3 = { -; CHECK: Name = L_.str -; CHECK: Value = 0 -; CHECK: SectionNumber = 2 -; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -; CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3) -; CHECK: NumberOfAuxSymbols = 0 -; CHECK: AuxillaryData = -; CHECK: } -; CHECK: 4 = { -; CHECK: Name = _printf -; CHECK: Value = 0 -; CHECK: SectionNumber = 0 -; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -; CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2) -; CHECK: NumberOfAuxSymbols = 0 -; CHECK: AuxillaryData = -; CHECK: } -; CHECK: ] -; CHECK: } diff --git a/test/MC/COFF/basic-coff.s b/test/MC/COFF/basic-coff.s new file mode 100644 index 000000000000..0c8658258ed4 --- /dev/null +++ b/test/MC/COFF/basic-coff.s @@ -0,0 +1,133 @@ +// This test checks that the COFF object emitter works for the most basic
+// programs.
+
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s
+// I WOULD RUN, BUT THIS FAILS: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s
+
+.def _main;
+ .scl 2;
+ .type 32;
+ .endef
+ .text
+ .globl _main
+ .align 16, 0x90
+_main: # @main
+# BB#0: # %entry
+ subl $4, %esp
+ movl $L_.str, (%esp)
+ calll _printf
+ xorl %eax, %eax
+ addl $4, %esp
+ ret
+
+ .data
+L_.str: # @.str
+ .asciz "Hello World"
+
+// CHECK: {
+// CHECK: MachineType = IMAGE_FILE_MACHINE_I386 (0x14C)
+// CHECK: NumberOfSections = 2
+// CHECK: TimeDateStamp = {{[0-9]+}}
+// CHECK: PointerToSymbolTable = 0x{{[0-9A-F]+}}
+// CHECK: NumberOfSymbols = 6
+// CHECK: SizeOfOptionalHeader = 0
+// CHECK: Characteristics = 0x0
+// CHECK: Sections = [
+// CHECK: 1 = {
+// CHECK: Name = .text
+// CHECK: VirtualSize = 0
+// CHECK: VirtualAddress = 0
+// CHECK: SizeOfRawData = {{[0-9]+}}
+// CHECK: PointerToRawData = 0x{{[0-9A-F]+}}
+// CHECK: PointerToRelocations = 0x{{[0-9A-F]+}}
+// CHECK: PointerToLineNumbers = 0x0
+// CHECK: NumberOfRelocations = 2
+// CHECK: NumberOfLineNumbers = 0
+// CHECK: Charateristics = 0x60500020
+// CHECK: IMAGE_SCN_CNT_CODE
+// CHECK: IMAGE_SCN_ALIGN_16BYTES
+// CHECK: IMAGE_SCN_MEM_EXECUTE
+// CHECK: IMAGE_SCN_MEM_READ
+// CHECK: SectionData =
+// CHECK: Relocations = [
+// CHECK: 0 = {
+// CHECK: VirtualAddress = 0x{{[0-9A-F]+}}
+// CHECK: SymbolTableIndex = 2
+// CHECK: Type = IMAGE_REL_I386_DIR32 (6)
+// CHECK: SymbolName = .data
+// CHECK: }
+// CHECK: 1 = {
+// CHECK: VirtualAddress = 0x{{[0-9A-F]+}}
+// CHECK: SymbolTableIndex = 5
+// CHECK: Type = IMAGE_REL_I386_REL32 (20)
+// CHECK: SymbolName = _printf
+// CHECK: }
+// CHECK: ]
+// CHECK: }
+// CHECK: 2 = {
+// CHECK: Name = .data
+// CHECK: VirtualSize = 0
+// CHECK: VirtualAddress = 0
+// CHECK: SizeOfRawData = {{[0-9]+}}
+// CHECK: PointerToRawData = 0x{{[0-9A-F]+}}
+// CHECK: PointerToRelocations = 0x0
+// CHECK: PointerToLineNumbers = 0x0
+// CHECK: NumberOfRelocations = 0
+// CHECK: NumberOfLineNumbers = 0
+// CHECK: Charateristics = 0xC0300040
+// CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA
+// CHECK: IMAGE_SCN_ALIGN_4BYTES
+// CHECK: IMAGE_SCN_MEM_READ
+// CHECK: IMAGE_SCN_MEM_WRITE
+// CHECK: SectionData =
+// CHECK: 48 65 6C 6C 6F 20 57 6F - 72 6C 64 00 |Hello World.|
+// CHECK: Relocations = None
+// CHECK: }
+// CHECK: ]
+// CHECK: Symbols = [
+// CHECK: 0 = {
+// CHECK: Name = .text
+// CHECK: Value = 0
+// CHECK: SectionNumber = 1
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
+// CHECK: NumberOfAuxSymbols = 1
+// CHECK: AuxillaryData =
+// CHECK: 15 00 00 00 02 00 00 00 - 00 00 00 00 01 00 00 00 |................|
+// CHECK: 00 00 |..|
+// CHECK: }
+// CHECK: 2 = {
+// CHECK: Name = .data
+// CHECK: Value = 0
+// CHECK: SectionNumber = 2
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
+// CHECK: NumberOfAuxSymbols = 1
+// CHECK: AuxillaryData =
+// CHECK: 0C 00 00 00 00 00 00 00 - 00 00 00 00 02 00 00 00 |................|
+// CHECK: 00 00 |..|
+// CHECK: }
+// CHECK: 4 = {
+// CHECK: Name = _main
+// CHECK: Value = 0
+// CHECK: SectionNumber = 1
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_FUNCTION (2)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
+// CHECK: NumberOfAuxSymbols = 0
+// CHECK: AuxillaryData =
+// CHECK: }
+// CHECK: 5 = {
+// CHECK: Name = _printf
+// CHECK: Value = 0
+// CHECK: SectionNumber = 0
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
+// CHECK: NumberOfAuxSymbols = 0
+// CHECK: AuxillaryData =
+// CHECK: }
+// CHECK: ]
+// CHECK: }
diff --git a/test/MC/COFF/bss.s b/test/MC/COFF/bss.s new file mode 100644 index 000000000000..f44225b5a336 --- /dev/null +++ b/test/MC/COFF/bss.s @@ -0,0 +1,15 @@ +// The purpose of this test is to verify that bss sections are emited correctly.
+
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | coff-dump.py | FileCheck %s
+
+ .bss
+ .globl _g0
+ .align 4
+_g0:
+ .long 0
+
+// CHECK: Name = .bss
+// CHECK-NEXT: VirtualSize = 0
+// CHECK-NEXT: VirtualAddress = 0
+// CHECK-NEXT: SizeOfRawData = 4
diff --git a/test/MC/COFF/dg.exp b/test/MC/COFF/dg.exp index 7b7bd4e73807..d46d700975e5 100644 --- a/test/MC/COFF/dg.exp +++ b/test/MC/COFF/dg.exp @@ -1,5 +1,5 @@ load_lib llvm.exp if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll}]] + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,s}]] } diff --git a/test/MC/COFF/module-asm.ll b/test/MC/COFF/module-asm.ll new file mode 100644 index 000000000000..9c6d00d2f503 --- /dev/null +++ b/test/MC/COFF/module-asm.ll @@ -0,0 +1,26 @@ +; The purpose of this test is to verify that various module level assembly +; constructs work. + +; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o - | coff-dump.py | FileCheck %s +; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o - | coff-dump.py | FileCheck %s + +module asm ".text" +module asm "_foo:" +module asm " ret" + +; CHECK: Name = .text +; CHECK-NEXT: VirtualSize = 0 +; CHECK-NEXT: VirtualAddress = 0 +; CHECK-NEXT: SizeOfRawData = {{[0-9]+}} +; CHECK-NEXT: PointerToRawData = 0x{{[0-9A-F]+}} +; CHECK-NEXT: PointerToRelocations = 0x{{[0-9A-F]+}} +; CHECK-NEXT: PointerToLineNumbers = 0x0 +; CHECK-NEXT: NumberOfRelocations = 0 +; CHECK-NEXT: NumberOfLineNumbers = 0 +; CHECK-NEXT: Charateristics = 0x60300020 +; CHECK-NEXT: IMAGE_SCN_CNT_CODE +; CHECK-NEXT: IMAGE_SCN_ALIGN_4BYTES +; CHECK-NEXT: IMAGE_SCN_MEM_EXECUTE +; CHECK-NEXT: IMAGE_SCN_MEM_READ +; CHECK-NEXT: SectionData = +; CHECK-NEXT: C3 diff --git a/test/MC/COFF/simple-fixups.s b/test/MC/COFF/simple-fixups.s new file mode 100644 index 000000000000..f86f4a9ff9e4 --- /dev/null +++ b/test/MC/COFF/simple-fixups.s @@ -0,0 +1,50 @@ +// The purpose of this test is to verify that we do not produce unneeded
+// relocations when symbols are in the same section and we know their offset.
+
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s
+// I WOULD RUN, BUT THIS FAILS: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | coff-dump.py | FileCheck %s
+
+ .def _foo;
+ .scl 2;
+ .type 32;
+ .endef
+ .text
+ .globl _foo
+ .align 16, 0x90
+_foo: # @foo
+# BB#0: # %e
+ .align 16, 0x90
+LBB0_1: # %i
+ # =>This Inner Loop Header: Depth=1
+ jmp LBB0_1
+
+ .def _bar;
+ .scl 2;
+ .type 32;
+ .endef
+ .globl _bar
+ .align 16, 0x90
+_bar: # @bar
+# BB#0: # %e
+ .align 16, 0x90
+LBB1_1: # %i
+ # =>This Inner Loop Header: Depth=1
+ jmp LBB1_1
+
+ .def _baz;
+ .scl 2;
+ .type 32;
+ .endef
+ .globl _baz
+ .align 16, 0x90
+_baz: # @baz
+# BB#0: # %e
+ subl $4, %esp
+Ltmp0:
+ calll _baz
+ addl $4, %esp
+ ret
+
+// CHECK: Sections = [
+// CHECK-NOT: NumberOfRelocations = {{[^0]}}
+// CHECK: Symbols = [
diff --git a/test/MC/COFF/switch-relocations.ll b/test/MC/COFF/switch-relocations.ll index 300c10732ec6..faf185fb7299 100644 --- a/test/MC/COFF/switch-relocations.ll +++ b/test/MC/COFF/switch-relocations.ll @@ -3,6 +3,9 @@ ; This test case was reduced from Lua/lapi.c. +; This test has yet to be converted to assembly becase llvm-mc cannot read +; x86-64 COFF code yet. + ; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o %t ; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o %t diff --git a/test/MC/COFF/symbol-alias.s b/test/MC/COFF/symbol-alias.s new file mode 100644 index 000000000000..ede6b53c4511 --- /dev/null +++ b/test/MC/COFF/symbol-alias.s @@ -0,0 +1,62 @@ +// The purpose of this test is to verify that symbol aliases
+// (@foo = alias <type> @bar) generate the correct entries in the symbol table.
+// They should be identical except for the name.
+
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | coff-dump.py | FileCheck %s
+
+ .def _foo;
+ .scl 2;
+ .type 32;
+ .endef
+ .text
+ .globl _foo
+ .align 16, 0x90
+_foo: # @foo
+# BB#0: # %entry
+ ret
+
+ .data
+ .globl _bar # @bar
+ .align 4
+_bar:
+ .long 0 # 0x0
+
+
+ .globl _foo_alias
+_foo_alias = _foo
+ .globl _bar_alias
+_bar_alias = _bar
+
+// CHECK: Name = {{_?}}foo
+// CHECK-NEXT: Value = [[FOO_VALUE:.*$]]
+// CHECK-NEXT: SectionNumber = [[FOO_SECTION_NUMBER:.*$]]
+// CHECK-NEXT: SimpleType = [[FOO_SIMPLE_TYPE:.*$]]
+// CHECK-NEXT: ComplexType = [[FOO_COMPLEX_TYPE:.*$]]
+// CHECK-NEXT: StorageClass = [[FOO_STORAGE_CLASS:.*$]]
+// CHECK-NEXT: NumberOfAuxSymbols = [[FOO_NUMBER_OF_AUX_SYMBOLS:.*$]]
+
+// CHECK: Name = {{_?}}bar
+// CHECK-NEXT: Value = [[BAR_VALUE:.*$]]
+// CHECK-NEXT: SectionNumber = [[BAR_SECTION_NUMBER:.*$]]
+// CHECK-NEXT: SimpleType = [[BAR_SIMPLE_TYPE:.*$]]
+// CHECK-NEXT: ComplexType = [[BAR_COMPLEX_TYPE:.*$]]
+// CHECK-NEXT: StorageClass = [[BAR_STORAGE_CLASS:.*$]]
+// CHECK-NEXT: NumberOfAuxSymbols = [[BAR_NUMBER_OF_AUX_SYMBOLS:.*$]]
+
+// CHECK: Name = {{_?}}foo_alias
+// CHECK-NEXT: Value = [[FOO_VALUE]]
+// CHECK-NEXT: SectionNumber = [[FOO_SECTION_NUMBER]]
+// CHECK-NEXT: SimpleType = [[FOO_SIMPLE_TYPE]]
+// CHECK-NEXT: ComplexType = [[FOO_COMPLEX_TYPE]]
+// CHECK-NEXT: StorageClass = [[FOO_STORAGE_CLASS]]
+// CHECK-NEXT: NumberOfAuxSymbols = [[FOO_NUMBER_OF_AUX_SYMBOLS]]
+
+// CHECK: Name = {{_?}}bar_alias
+// CHECK-NEXT: Value = [[BAR_VALUE]]
+// CHECK-NEXT: SectionNumber = [[BAR_SECTION_NUMBER]]
+// CHECK-NEXT: SimpleType = [[BAR_SIMPLE_TYPE]]
+// CHECK-NEXT: ComplexType = [[BAR_COMPLEX_TYPE]]
+// CHECK-NEXT: StorageClass = [[BAR_STORAGE_CLASS]]
+// CHECK-NEXT: NumberOfAuxSymbols = [[BAR_NUMBER_OF_AUX_SYMBOLS]]
+
diff --git a/test/MC/COFF/symbol-fragment-offset.ll b/test/MC/COFF/symbol-fragment-offset.ll deleted file mode 100644 index af7ace19d59f..000000000000 --- a/test/MC/COFF/symbol-fragment-offset.ll +++ /dev/null @@ -1,182 +0,0 @@ -; The purpose of this test is to see if the COFF object writer is emitting the
-; proper relocations for multiple pieces of data in a single data fragment.
-
-; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o %t
-; RUN: coff-dump.py %abs_tmp | FileCheck %s
-; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o %t
-
-@.str = private constant [7 x i8] c"Hello \00" ; <[7 x i8]*> [#uses=1]
-@str = internal constant [7 x i8] c"World!\00" ; <[7 x i8]*> [#uses=1]
-
-define i32 @main() nounwind {
-entry:
- %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0)) nounwind ; <i32> [#uses=0]
- %puts = tail call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @str, i32 0, i32 0)) ; <i32> [#uses=0]
- ret i32 0
-}
-
-declare i32 @printf(i8* nocapture, ...) nounwind
-
-declare i32 @puts(i8* nocapture) nounwind
-
-; CHECK: {
-; CHECK: MachineType = IMAGE_FILE_MACHINE_I386 (0x14C)
-; CHECK: NumberOfSections = 2
-; CHECK: TimeDateStamp = {{[0-9]+}}
-; CHECK: PointerToSymbolTable = 0xBB
-; CHECK: NumberOfSymbols = 9
-; CHECK: SizeOfOptionalHeader = 0
-; CHECK: Characteristics = 0x0
-; CHECK: Sections = [
-; CHECK: 0 = {
-; CHECK: Name = .text
-; CHECK: VirtualSize = 0
-; CHECK: VirtualAddress = 0
-; CHECK: SizeOfRawData = 33
-; CHECK: PointerToRawData = 0x64
-; CHECK: PointerToRelocations = 0x85
-; CHECK: PointerToLineNumbers = 0x0
-; CHECK: NumberOfRelocations = 4
-; CHECK: NumberOfLineNumbers = 0
-; CHECK: Charateristics = 0x60500020
-; CHECK: IMAGE_SCN_CNT_CODE
-; CHECK: IMAGE_SCN_ALIGN_16BYTES
-; CHECK: IMAGE_SCN_MEM_EXECUTE
-; CHECK: IMAGE_SCN_MEM_READ
-; CHECK: SectionData =
-; CHECK: 83 EC 04 C7 04 24 00 00 - 00 00 E8 00 00 00 00 C7 |.....$..........|
-; CHECK: 04 24 00 00 00 00 E8 00 - 00 00 00 31 C0 83 C4 04 |.$.........1....|
-; CHECK: C3 |.|
-
-; CHECK: Relocations = [
-; CHECK: 0 = {
-; CHECK: VirtualAddress = 0x6
-; CHECK: SymbolTableIndex = 5
-; CHECK: Type = IMAGE_REL_I386_DIR32 (6)
-; CHECK: SymbolName = _main
-; CHECK: }
-; CHECK: 1 = {
-; CHECK: VirtualAddress = 0xB
-; CHECK: SymbolTableIndex = 6
-; CHECK: Type = IMAGE_REL_I386_REL32 (20)
-; CHECK: SymbolName = L_.str
-; CHECK: }
-; CHECK: 2 = {
-; CHECK: VirtualAddress = 0x12
-; CHECK: SymbolTableIndex = 7
-; CHECK: Type = IMAGE_REL_I386_DIR32 (6)
-; CHECK: SymbolName = _printf
-; CHECK: }
-; CHECK: 3 = {
-; CHECK: VirtualAddress = 0x17
-; CHECK: SymbolTableIndex = 8
-; CHECK: Type = IMAGE_REL_I386_REL32 (20)
-; CHECK: SymbolName = _str
-; CHECK: }
-; CHECK: ]
-; CHECK: }
-; CHECK: 1 = {
-; CHECK: Name = .data
-; CHECK: VirtualSize = 0
-; CHECK: VirtualAddress = 0
-; CHECK: SizeOfRawData = 14
-; CHECK: PointerToRawData = 0xAD
-; CHECK: PointerToRelocations = 0x0
-; CHECK: PointerToLineNumbers = 0x0
-; CHECK: NumberOfRelocations = 0
-; CHECK: NumberOfLineNumbers = 0
-; CHECK: Charateristics = 0xC0100040
-; CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA
-; CHECK: IMAGE_SCN_ALIGN_1BYTES
-; CHECK: IMAGE_SCN_MEM_READ
-; CHECK: IMAGE_SCN_MEM_WRITE
-; CHECK: SectionData =
-; CHECK: 48 65 6C 6C 6F 20 00 57 - 6F 72 6C 64 21 00 |Hello .World!.|
-
-; CHECK: Relocations = None
-; CHECK: }
-; CHECK: ]
-; CHECK: Symbols = [
-; CHECK: 0 = {
-; CHECK: Name = .text
-; CHECK: Value = 0
-; CHECK: SectionNumber = 1
-; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
-; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
-; CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
-; CHECK: NumberOfAuxSymbols = 1
-; CHECK: AuxillaryData =
-; CHECK: 21 00 00 00 04 00 00 00 - 00 00 00 00 01 00 00 00 |!...............|
-; CHECK: 00 00 |..|
-
-; CHECK: }
-; CHECK: 1 = {
-; CHECK: Name = .data
-; CHECK: Value = 0
-; CHECK: SectionNumber = 2
-; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
-; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
-; CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
-; CHECK: NumberOfAuxSymbols = 1
-; CHECK: AuxillaryData =
-; CHECK: 0E 00 00 00 00 00 00 00 - 00 00 00 00 02 00 00 00 |................|
-; CHECK: 00 00 |..|
-
-; CHECK: }
-; CHECK: 2 = {
-; CHECK: Name = _main
-; CHECK: Value = 0
-; CHECK: SectionNumber = 1
-; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
-; CHECK: ComplexType = IMAGE_SYM_DTYPE_FUNCTION (2)
-; CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
-; CHECK: NumberOfAuxSymbols = 0
-; CHECK: AuxillaryData =
-
-; CHECK: }
-; CHECK: 3 = {
-; CHECK: Name = L_.str
-; CHECK: Value = 0
-; CHECK: SectionNumber = 2
-; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
-; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
-; CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
-; CHECK: NumberOfAuxSymbols = 0
-; CHECK: AuxillaryData =
-
-; CHECK: }
-; CHECK: 4 = {
-; CHECK: Name = _printf
-; CHECK: Value = 0
-; CHECK: SectionNumber = 0
-; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
-; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
-; CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
-; CHECK: NumberOfAuxSymbols = 0
-; CHECK: AuxillaryData =
-
-; CHECK: }
-; CHECK: 5 = {
-; CHECK: Name = _str
-; CHECK: Value = 7
-; CHECK: SectionNumber = 2
-; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
-; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
-; CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
-; CHECK: NumberOfAuxSymbols = 0
-; CHECK: AuxillaryData =
-
-; CHECK: }
-; CHECK: 6 = {
-; CHECK: Name = _puts
-; CHECK: Value = 0
-; CHECK: SectionNumber = 0
-; CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
-; CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
-; CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
-; CHECK: NumberOfAuxSymbols = 0
-; CHECK: AuxillaryData =
-
-; CHECK: }
-; CHECK: ]
-; CHECK: }
diff --git a/test/MC/COFF/symbol-fragment-offset.s b/test/MC/COFF/symbol-fragment-offset.s new file mode 100644 index 000000000000..c314ac20f4db --- /dev/null +++ b/test/MC/COFF/symbol-fragment-offset.s @@ -0,0 +1,187 @@ +// The purpose of this test is to see if the COFF object writer is emitting the
+// proper relocations for multiple pieces of data in a single data fragment.
+
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s
+// I WOULD RUN, BUT THIS FAILS: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s
+
+.def _main;
+ .scl 2;
+ .type 32;
+ .endef
+ .text
+ .globl _main
+ .align 16, 0x90
+_main: # @main
+# BB#0: # %entry
+ subl $4, %esp
+ movl $L_.str0, (%esp)
+ calll _printf
+ movl $L_.str1, (%esp)
+ calll _puts
+ movl $L_.str2, (%esp)
+ calll _puts
+ xorl %eax, %eax
+ addl $4, %esp
+ ret
+
+ .data
+L_.str0: # @.str0
+ .asciz "Hello "
+
+L_.str1: # @.str1
+ .asciz "World!"
+
+ .align 16 # @.str2
+L_.str2:
+ .asciz "I'm The Last Line."
+
+// CHECK: {
+// CHECK: MachineType = IMAGE_FILE_MACHINE_I386 (0x14C)
+// CHECK: NumberOfSections = 2
+// CHECK: TimeDateStamp = {{[0-9]+}}
+// CHECK: PointerToSymbolTable = 0x{{[0-9A-F]+}}
+// CHECK: NumberOfSymbols = 7
+// CHECK: SizeOfOptionalHeader = 0
+// CHECK: Characteristics = 0x0
+// CHECK: Sections = [
+// CHECK: 1 = {
+// CHECK: Name = .text
+// CHECK: VirtualSize = 0
+// CHECK: VirtualAddress = 0
+// CHECK: SizeOfRawData = {{[0-9]+}}
+// CHECK: PointerToRawData = 0x{{[0-9A-F]+}}
+// CHECK: PointerToRelocations = 0x{{[0-9A-F]+}}
+// CHECK: PointerToLineNumbers = 0x0
+// CHECK: NumberOfRelocations = 6
+// CHECK: NumberOfLineNumbers = 0
+// CHECK: Charateristics = 0x60500020
+// CHECK: IMAGE_SCN_CNT_CODE
+// CHECK: IMAGE_SCN_ALIGN_16BYTES
+// CHECK: IMAGE_SCN_MEM_EXECUTE
+// CHECK: IMAGE_SCN_MEM_READ
+// CHECK: SectionData =
+// CHECK: 83 EC 04 C7 04 24 00 00 - 00 00 E8 00 00 00 00 C7 |.....$..........|
+// CHECK: 04 24 07 00 00 00 E8 00 - 00 00 00 C7 04 24 10 00 |.$...........$..|
+// CHECK: 00 00 E8 00 00 00 00 31 - C0 83 C4 04 C3 |.......1.....|
+// CHECK: Relocations = [
+// CHECK: 0 = {
+// CHECK: VirtualAddress = 0x6
+// CHECK: SymbolTableIndex = 2
+// CHECK: Type = IMAGE_REL_I386_DIR32 (6)
+// CHECK: SymbolName = .data
+// CHECK: }
+// CHECK: 1 = {
+// CHECK: VirtualAddress = 0xB
+// CHECK: SymbolTableIndex = 5
+// CHECK: Type = IMAGE_REL_I386_REL32 (20)
+// CHECK: SymbolName = _printf
+// CHECK: }
+// CHECK: 2 = {
+// CHECK: VirtualAddress = 0x12
+// CHECK: SymbolTableIndex = 2
+// CHECK: Type = IMAGE_REL_I386_DIR32 (6)
+// CHECK: SymbolName = .data
+// CHECK: }
+// CHECK: 3 = {
+// CHECK: VirtualAddress = 0x17
+// CHECK: SymbolTableIndex = 6
+// CHECK: Type = IMAGE_REL_I386_REL32 (20)
+// CHECK: SymbolName = _puts
+// CHECK: }
+// CHECK: 4 = {
+// CHECK: VirtualAddress = 0x1E
+// CHECK: SymbolTableIndex = 2
+// CHECK: Type = IMAGE_REL_I386_DIR32 (6)
+// CHECK: SymbolName = .data
+// CHECK: }
+// CHECK: 5 = {
+// CHECK: VirtualAddress = 0x23
+// CHECK: SymbolTableIndex = 6
+// CHECK: Type = IMAGE_REL_I386_REL32 (20)
+// CHECK: SymbolName = _puts
+// CHECK: }
+// CHECK: ]
+// CHECK: }
+// CHECK: 2 = {
+// CHECK: Name = .data
+// CHECK: VirtualSize = 0
+// CHECK: VirtualAddress = 0
+// CHECK: SizeOfRawData = {{[0-9]+}}
+// CHECK: PointerToRawData = 0x{{[0-9A-F]+}}
+// CHECK: PointerToRelocations = 0x0
+// CHECK: PointerToLineNumbers = 0x0
+// CHECK: NumberOfRelocations = 0
+// CHECK: NumberOfLineNumbers = 0
+// CHECK: Charateristics = 0xC0500040
+// CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA
+// CHECK: IMAGE_SCN_ALIGN_16BYTES
+// CHECK: IMAGE_SCN_MEM_READ
+// CHECK: IMAGE_SCN_MEM_WRITE
+// CHECK: SectionData =
+// CHECK: 48 65 6C 6C 6F 20 00 57 - 6F 72 6C 64 21 00 00 00 |Hello .World!...|
+// CHECK: 49 27 6D 20 54 68 65 20 - 4C 61 73 74 20 4C 69 6E |I'm The Last Lin|
+// CHECK: 65 2E 00 |e..|
+// CHECK: Relocations = None
+// CHECK: }
+// CHECK: ]
+// CHECK: Symbols = [
+// CHECK: 0 = {
+// CHECK: Name = .text
+// CHECK: Value = 0
+// CHECK: SectionNumber = 1
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
+// CHECK: NumberOfAuxSymbols = 1
+// CHECK: AuxillaryData =
+// CHECK: 2D 00 00 00 06 00 00 00 - 00 00 00 00 01 00 00 00 |-...............|
+// CHECK: 00 00 |..|
+
+// CHECK: }
+// CHECK: 2 = {
+// CHECK: Name = .data
+// CHECK: Value = 0
+// CHECK: SectionNumber = 2
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3)
+// CHECK: NumberOfAuxSymbols = 1
+// CHECK: AuxillaryData =
+// CHECK: 23 00 00 00 00 00 00 00 - 00 00 00 00 02 00 00 00 |#...............|
+// CHECK: 00 00 |..|
+
+// CHECK: }
+// CHECK: 4 = {
+// CHECK: Name = _main
+// CHECK: Value = 0
+// CHECK: SectionNumber = 1
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_FUNCTION (2)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
+// CHECK: NumberOfAuxSymbols = 0
+// CHECK: AuxillaryData =
+
+// CHECK: 5 = {
+// CHECK: Name = _printf
+// CHECK: Value = 0
+// CHECK: SectionNumber = 0
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
+// CHECK: NumberOfAuxSymbols = 0
+// CHECK: AuxillaryData =
+
+// CHECK: }
+// CHECK: 6 = {
+// CHECK: Name = _puts
+// CHECK: Value = 0
+// CHECK: SectionNumber = 0
+// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
+// CHECK: NumberOfAuxSymbols = 0
+// CHECK: AuxillaryData =
+
+// CHECK: }
+// CHECK: ]
+// CHECK: }
diff --git a/test/MC/COFF/weak.s b/test/MC/COFF/weak.s new file mode 100644 index 000000000000..a240d7152c76 --- /dev/null +++ b/test/MC/COFF/weak.s @@ -0,0 +1,51 @@ +// This tests that default-null weak symbols (a GNU extension) are created
+// properly via the .weak directive.
+
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 < %s | coff-dump.py | FileCheck %s
+
+ .def _main;
+ .scl 2;
+ .type 32;
+ .endef
+ .text
+ .globl _main
+ .align 16, 0x90
+_main: # @main
+# BB#0: # %entry
+ subl $4, %esp
+ movl $_test_weak, %eax
+ testl %eax, %eax
+ je LBB0_2
+# BB#1: # %if.then
+ calll _test_weak
+ movl $1, %eax
+ addl $4, %esp
+ ret
+LBB0_2: # %return
+ xorl %eax, %eax
+ addl $4, %esp
+ ret
+
+ .weak _test_weak
+
+// CHECK: Symbols = [
+
+// CHECK: Name = _test_weak
+// CHECK-NEXT: Value = 0
+// CHECK-NEXT: SectionNumber = 0
+// CHECK-NEXT: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK-NEXT: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK-NEXT: StorageClass = IMAGE_SYM_CLASS_WEAK_EXTERNAL (105)
+// CHECK-NEXT: NumberOfAuxSymbols = 1
+// CHECK-NEXT: AuxillaryData =
+// CHECK-NEXT: 05 00 00 00 02 00 00 00 - 00 00 00 00 00 00 00 00 |................|
+// CHECK-NEXT: 00 00 |..|
+
+// CHECK: Name = .weak._test_weak.default
+// CHECK-NEXT: Value = 0
+// CHECK-NEXT: SectionNumber = 65535
+// CHECK-NEXT: SimpleType = IMAGE_SYM_TYPE_NULL (0)
+// CHECK-NEXT: ComplexType = IMAGE_SYM_DTYPE_NULL (0)
+// CHECK-NEXT: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2)
+// CHECK-NEXT: NumberOfAuxSymbols = 0
+// CHECK-NEXT: AuxillaryData =
diff --git a/test/MC/Disassembler/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt index 0b4c2978fe3d..0f6aeb7052b9 100644 --- a/test/MC/Disassembler/arm-tests.txt +++ b/test/MC/Disassembler/ARM/arm-tests.txt @@ -9,6 +9,9 @@ # CHECK: bfi r8, r0, #16, #1 0x10 0x88 0xd0 0xe7 +# CHECK: mov pc, lr +0x0e 0xf0 0xa0 0xe1 + # CHECK: cmn r0, #1 0x01 0x00 0x70 0xe3 @@ -45,13 +48,13 @@ # CHECK: lsls r0, r2, #31 0x82 0x0f 0xb0 0xe1 -# CHECK: mcr2 p0, #0, r2, cr1, cr0, #7 +# CHECK: mcr2 p0, #0, r2, c1, c0, #7 0xf0 0x20 0x01 0xfe # CHECK: movt r8, #65535 0xff 0x8f 0x4f 0xe3 -# CHECK: mvnpls r7, #245, 2 +# CHECK: mvnspl r7, #245, 2 0xf5 0x71 0xf0 0x53 # CHECK-NOT: orr r7, r8, r7, rrx #0 @@ -81,8 +84,8 @@ # CHECK: rsbeq r0, r2, r0 0x00 0x00 0x62 0x00 -# CHECK-NOT: rsceqs r0, r0, r1, lsl #0 -# CHECK: rsceqs r0, r0, r1 +# CHECK-NOT: rscseq r0, r0, r1, lsl #0 +# CHECK: rscseq r0, r0, r1 0x01 0x00 0xf0 0x00 # CHECK: sbcs r0, pc, #1 @@ -109,3 +112,21 @@ # CHECK: usat r8, #0, r10, asr #32 0x5a 0x80 0xe0 0xe6 + +# CHECK: setend be +0x00 0x02 0x01 0xf1 + +# CHECK: setend le +0x00 0x00 0x01 0xf1 + +# CHECK: cpsie aif +0xc0 0x01 0x08 0xf1 + +# CHECK: cps #15 +0x0f 0x00 0x02 0xf1 + +# CHECK: cpsie if, #10 +0xca 0x00 0x0a 0xf1 + +# CHECK: msr cpsr_fc, r0 +0x00 0xf0 0x29 0xe1 diff --git a/test/MC/Disassembler/dg.exp b/test/MC/Disassembler/ARM/dg.exp index fc2f17a6fbaa..fc2f17a6fbaa 100644 --- a/test/MC/Disassembler/dg.exp +++ b/test/MC/Disassembler/ARM/dg.exp diff --git a/test/MC/Disassembler/neon-tests.txt b/test/MC/Disassembler/ARM/neon-tests.txt index 826ff2272efa..eb9adb7b6c2f 100644 --- a/test/MC/Disassembler/neon-tests.txt +++ b/test/MC/Disassembler/ARM/neon-tests.txt @@ -9,10 +9,12 @@ # CHECK: vdup.32 q3, d1[0] 0x41 0x6c 0xb4 0xf3 -# VLD1q8_UPD (with ${dst:dregpair} operand) # CHECK: vld1.8 {d17, d18}, [r6], r5 0x05 0x1a 0x66 0xf4 +# CHECK: vld1.8 {d17, d18, d19}, [r6], r5 +0x05 0x16 0x66 0xf4 + # CHECK: vld4.8 {d0, d1, d2, d3}, [r2], r7 0x07 0x00 0x22 0xf4 @@ -49,3 +51,11 @@ # CHECK: vtbx.8 d18, {d4, d5, d6}, d7 0x47 0x2a 0xf4 0xf3 +# CHECK: vmov.f32 s0, #5.000000e-01 +0x00 0x0a 0xb6 0xee + +# CHECK: vmov.f32 s0, #1.328125e-01 +0x01 0x0a 0xb4 0xee + +# CHECK: vmov.f64 d0, #5.000000e-01 +0x00 0x0b 0xb6 0xee diff --git a/test/MC/Disassembler/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt index 06d12fed87fb..6dab1237a118 100644 --- a/test/MC/Disassembler/thumb-tests.txt +++ b/test/MC/Disassembler/ARM/thumb-tests.txt @@ -46,10 +46,10 @@ # CHECK: pkhbt r2, r4, r6 0xc4 0xea 0x06 0x02 -# CHECK: pop {r2, r4, r6, r8, r10, r12} +# CHECK: pop.w {r2, r4, r6, r8, r10, r12} 0xbd 0xe8 0x54 0x15 -# CHECK: push {r2, r4, r6, r8, r10, r12} +# CHECK: push.w {r2, r4, r6, r8, r10, r12} 0x2d 0xe9 0x54 0x15 # CHECK: rsbs r0, r0, #0 @@ -63,7 +63,7 @@ # CHECK: ssat r0, #17, r12 0x0c 0xf3 0x10 0x00 -# CHECK: strd r0, [r7, #64] +# CHECK: strd r0, r1, [r7, #64] 0xc7 0xe9 0x10 0x01 # CHECK: sub sp, #60 @@ -103,3 +103,18 @@ # IT block end # CHECK: rsbs r1, r2, #0 0x51 0x42 + +# CHECK: cpsid.w f +0xaf 0xf3 0x20 0x86 + +# CHECK: cps #15 +0xaf 0xf3 0x0f 0x81 + +# CHECK: cpsie.w if, #10 +0xaf 0xf3 0x6a 0x85 + +# CHECK: cpsie aif +0x67 0xb6 + +# CHECK: msr cpsr_fc, r0 +0x80 0xf3 0x00 0x89 diff --git a/test/MC/Disassembler/MBlaze/dg.exp b/test/MC/Disassembler/MBlaze/dg.exp new file mode 100644 index 000000000000..0be99a34235d --- /dev/null +++ b/test/MC/Disassembler/MBlaze/dg.exp @@ -0,0 +1,6 @@ +load_lib llvm.exp + +if { [llvm_supports_target MBlaze] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]] +} + diff --git a/test/MC/Disassembler/MBlaze/mblaze_branch.txt b/test/MC/Disassembler/MBlaze/mblaze_branch.txt new file mode 100644 index 000000000000..5f4051712fa6 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_branch.txt @@ -0,0 +1,119 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Branch instructions +################################################################################ + +# CHECK: beq r2, r3 +0x9c 0x02 0x18 0x00 + +# CHECK: bge r2, r3 +0x9c 0xa2 0x18 0x00 + +# CHECK: bgt r2, r3 +0x9c 0x82 0x18 0x00 + +# CHECK: ble r2, r3 +0x9c 0x62 0x18 0x00 + +# CHECK: blt r2, r3 +0x9c 0x42 0x18 0x00 + +# CHECK: bne r2, r3 +0x9c 0x22 0x18 0x00 + +# CHECK: beqd r2, r3 +0x9e 0x02 0x18 0x00 + +# CHECK: bged r2, r3 +0x9e 0xa2 0x18 0x00 + +# CHECK: bgtd r2, r3 +0x9e 0x82 0x18 0x00 + +# CHECK: bled r2, r3 +0x9e 0x62 0x18 0x00 + +# CHECK: bltd r2, r3 +0x9e 0x42 0x18 0x00 + +# CHECK: bned r2, r3 +0x9e 0x22 0x18 0x00 + +# CHECK: br r3 +0x98 0x00 0x18 0x00 + +# CHECK: bra r3 +0x98 0x08 0x18 0x00 + +# CHECK: brd r3 +0x98 0x10 0x18 0x00 + +# CHECK: brad r3 +0x98 0x18 0x18 0x00 + +# CHECK: brld r15, r3 +0x99 0xf4 0x18 0x00 + +# CHECK: brald r15, r3 +0x99 0xfc 0x18 0x00 + +# CHECK: brk r15, r3 +0x99 0xec 0x18 0x00 + +# CHECK: beqi r2, 0 +0xbc 0x02 0x00 0x00 + +# CHECK: bgei r2, 0 +0xbc 0xa2 0x00 0x00 + +# CHECK: bgti r2, 0 +0xbc 0x82 0x00 0x00 + + # CHECK: blei r2, 0 +0xbc 0x62 0x00 0x00 + +# CHECK: blti r2, 0 +0xbc 0x42 0x00 0x00 + +# CHECK: bnei r2, 0 +0xbc 0x22 0x00 0x00 + +# CHECK: beqid r2, 0 +0xbe 0x02 0x00 0x00 + +# CHECK: bgeid r2, 0 +0xbe 0xa2 0x00 0x00 + +# CHECK: bgtid r2, 0 +0xbe 0x82 0x00 0x00 + +# CHECK: bleid r2, 0 +0xbe 0x62 0x00 0x00 + +# CHECK: bltid r2, 0 +0xbe 0x42 0x00 0x00 + +# CHECK: bneid r2, 0 +0xbe 0x22 0x00 0x00 + +# CHECK: bri 0 +0xb8 0x00 0x00 0x00 + +# CHECK: brai 0 +0xb8 0x08 0x00 0x00 + +# CHECK: brid 0 +0xb8 0x10 0x00 0x00 + +# CHECK: braid 0 +0xb8 0x18 0x00 0x00 + +# CHECK: brlid r15, 0 +0xb9 0xf4 0x00 0x00 + +# CHECK: bralid r15, 0 +0xb9 0xfc 0x00 0x00 + +# CHECK: brki r15, 0 +0xb9 0xec 0x00 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_fpu.txt b/test/MC/Disassembler/MBlaze/mblaze_fpu.txt new file mode 100644 index 000000000000..0fb7abcdea54 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_fpu.txt @@ -0,0 +1,47 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# FPU instructions +################################################################################ + +# CHECK: fadd r0, r1, r2 +0x58 0x01 0x10 0x00 + +# CHECK: frsub r0, r1, r2 +0x58 0x01 0x10 0x80 + +# CHECK: fmul r0, r1, r2 +0x58 0x01 0x11 0x00 + +# CHECK: fdiv r0, r1, r2 +0x58 0x01 0x11 0x80 + +# CHECK: fsqrt r0, r1 +0x58 0x01 0x03 0x80 + +# CHECK: fint r0, r1 +0x58 0x01 0x03 0x00 + +# CHECK: flt r0, r1 +0x58 0x01 0x02 0x80 + +# CHECK: fcmp.un r0, r1, r2 +0x58 0x01 0x12 0x00 + +# CHECK: fcmp.lt r0, r1, r2 +0x58 0x01 0x12 0x10 + +# CHECK: fcmp.eq r0, r1, r2 +0x58 0x01 0x12 0x20 + +# CHECK: fcmp.le r0, r1, r2 +0x58 0x01 0x12 0x30 + +# CHECK: fcmp.gt r0, r1, r2 +0x58 0x01 0x12 0x40 + +# CHECK: fcmp.ne r0, r1, r2 +0x58 0x01 0x12 0x50 + +# CHECK: fcmp.ge r0, r1, r2 +0x58 0x01 0x12 0x60 diff --git a/test/MC/Disassembler/MBlaze/mblaze_fsl.txt b/test/MC/Disassembler/MBlaze/mblaze_fsl.txt new file mode 100644 index 000000000000..a12b3b486e60 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_fsl.txt @@ -0,0 +1,338 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# FSL instructions +################################################################################ + +# CHECK: get r0, rfsl0 +0x6c 0x00 0x00 0x00 + +# CHECK: nget r0, rfsl0 +0x6c 0x00 0x40 0x00 + +# CHECK: cget r0, rfsl0 +0x6c 0x00 0x20 0x00 + +# CHECK: ncget r0, rfsl0 +0x6c 0x00 0x60 0x00 + +# CHECK: tget r0, rfsl0 +0x6c 0x00 0x10 0x00 + +# CHECK: tnget r0, rfsl0 +0x6c 0x00 0x50 0x00 + +# CHECK: tcget r0, rfsl0 +0x6c 0x00 0x30 0x00 + +# CHECK: tncget r0, rfsl0 +0x6c 0x00 0x70 0x00 + +# CHECK: aget r0, rfsl0 +0x6c 0x00 0x08 0x00 + +# CHECK: naget r0, rfsl0 +0x6c 0x00 0x48 0x00 + +# CHECK: caget r0, rfsl0 +0x6c 0x00 0x28 0x00 + +# CHECK: ncaget r0, rfsl0 +0x6c 0x00 0x68 0x00 + +# CHECK: taget r0, rfsl0 +0x6c 0x00 0x18 0x00 + +# CHECK: tnaget r0, rfsl0 +0x6c 0x00 0x58 0x00 + +# CHECK: tcaget r0, rfsl0 +0x6c 0x00 0x38 0x00 + +# CHECK: tncaget r0, rfsl0 +0x6c 0x00 0x78 0x00 + +# CHECK: eget r0, rfsl0 +0x6c 0x00 0x04 0x00 + +# CHECK: neget r0, rfsl0 +0x6c 0x00 0x44 0x00 + +# CHECK: ecget r0, rfsl0 +0x6c 0x00 0x24 0x00 + +# CHECK: necget r0, rfsl0 +0x6c 0x00 0x64 0x00 + +# CHECK: teget r0, rfsl0 +0x6c 0x00 0x14 0x00 + +# CHECK: tneget r0, rfsl0 +0x6c 0x00 0x54 0x00 + +# CHECK: tecget r0, rfsl0 +0x6c 0x00 0x34 0x00 + +# CHECK: tnecget r0, rfsl0 +0x6c 0x00 0x74 0x00 + +# CHECK: eaget r0, rfsl0 +0x6c 0x00 0x0c 0x00 + +# CHECK: neaget r0, rfsl0 +0x6c 0x00 0x4c 0x00 + +# CHECK: ecaget r0, rfsl0 +0x6c 0x00 0x2c 0x00 + +# CHECK: necaget r0, rfsl0 +0x6c 0x00 0x6c 0x00 + +# CHECK: teaget r0, rfsl0 +0x6c 0x00 0x1c 0x00 + +# CHECK: tneaget r0, rfsl0 +0x6c 0x00 0x5c 0x00 + +# CHECK: tecaget r0, rfsl0 +0x6c 0x00 0x3c 0x00 + +# CHECK: tnecaget r0, rfsl0 +0x6c 0x00 0x7c 0x00 + +# CHECK: getd r0, r1 +0x4c 0x00 0x08 0x00 + +# CHECK: ngetd r0, r1 +0x4c 0x00 0x0a 0x00 + +# CHECK: cgetd r0, r1 +0x4c 0x00 0x09 0x00 + +# CHECK: ncgetd r0, r1 +0x4c 0x00 0x0b 0x00 + +# CHECK: tgetd r0, r1 +0x4c 0x00 0x08 0x80 + +# CHECK: tngetd r0, r1 +0x4c 0x00 0x0a 0x80 + +# CHECK: tcgetd r0, r1 +0x4c 0x00 0x09 0x80 + +# CHECK: tncgetd r0, r1 +0x4c 0x00 0x0b 0x80 + +# CHECK: agetd r0, r1 +0x4c 0x00 0x08 0x40 + +# CHECK: nagetd r0, r1 +0x4c 0x00 0x0a 0x40 + +# CHECK: cagetd r0, r1 +0x4c 0x00 0x09 0x40 + +# CHECK: ncagetd r0, r1 +0x4c 0x00 0x0b 0x40 + +# CHECK: tagetd r0, r1 +0x4c 0x00 0x08 0xc0 + +# CHECK: tnagetd r0, r1 +0x4c 0x00 0x0a 0xc0 + +# CHECK: tcagetd r0, r1 +0x4c 0x00 0x09 0xc0 + +# CHECK: tncagetd r0, r1 +0x4c 0x00 0x0b 0xc0 + +# CHECK: egetd r0, r1 +0x4c 0x00 0x08 0x20 + +# CHECK: negetd r0, r1 +0x4c 0x00 0x0a 0x20 + +# CHECK: ecgetd r0, r1 +0x4c 0x00 0x09 0x20 + +# CHECK: necgetd r0, r1 +0x4c 0x00 0x0b 0x20 + +# CHECK: tegetd r0, r1 +0x4c 0x00 0x08 0xa0 + +# CHECK: tnegetd r0, r1 +0x4c 0x00 0x0a 0xa0 + +# CHECK: tecgetd r0, r1 +0x4c 0x00 0x09 0xa0 + +# CHECK: tnecgetd r0, r1 +0x4c 0x00 0x0b 0xa0 + +# CHECK: eagetd r0, r1 +0x4c 0x00 0x08 0x60 + +# CHECK: neagetd r0, r1 +0x4c 0x00 0x0a 0x60 + +# CHECK: ecagetd r0, r1 +0x4c 0x00 0x09 0x60 + +# CHECK: necagetd r0, r1 +0x4c 0x00 0x0b 0x60 + +# CHECK: teagetd r0, r1 +0x4c 0x00 0x08 0xe0 + +# CHECK: tneagetd r0, r1 +0x4c 0x00 0x0a 0xe0 + +# CHECK: tecagetd r0, r1 +0x4c 0x00 0x09 0xe0 + +# CHECK: tnecagetd r0, r1 +0x4c 0x00 0x0b 0xe0 + +# CHECK: put r0, rfsl0 +0x6c 0x00 0x80 0x00 + +# CHECK: aput r0, rfsl0 +0x6c 0x00 0x88 0x00 + +# CHECK: cput r0, rfsl0 +0x6c 0x00 0xa0 0x00 + +# CHECK: caput r0, rfsl0 +0x6c 0x00 0xa8 0x00 + +# CHECK: nput r0, rfsl0 +0x6c 0x00 0xc0 0x00 + +# CHECK: naput r0, rfsl0 +0x6c 0x00 0xc8 0x00 + +# CHECK: ncput r0, rfsl0 +0x6c 0x00 0xe0 0x00 + +# CHECK: ncaput r0, rfsl0 +0x6c 0x00 0xe8 0x00 + +# CHECK: tput rfsl0 +0x6c 0x00 0x90 0x00 + +# CHECK: taput rfsl0 +0x6c 0x00 0x98 0x00 + +# CHECK: tcput rfsl0 +0x6c 0x00 0xb0 0x00 + +# CHECK: tcaput rfsl0 +0x6c 0x00 0xb8 0x00 + +# CHECK: tnput rfsl0 +0x6c 0x00 0xd0 0x00 + +# CHECK: tnaput rfsl0 +0x6c 0x00 0xd8 0x00 + +# CHECK: tncput rfsl0 +0x6c 0x00 0xf0 0x00 + +# CHECK: tncaput rfsl0 +0x6c 0x00 0xf8 0x00 + +# CHECK: putd r0, r1 +0x4c 0x00 0x0c 0x00 + +# CHECK: aputd r0, r1 +0x4c 0x00 0x0c 0x40 + +# CHECK: cputd r0, r1 +0x4c 0x00 0x0d 0x00 + +# CHECK: caputd r0, r1 +0x4c 0x00 0x0d 0x40 + +# CHECK: nputd r0, r1 +0x4c 0x00 0x0e 0x00 + +# CHECK: naputd r0, r1 +0x4c 0x00 0x0e 0x40 + +# CHECK: ncputd r0, r1 +0x4c 0x00 0x0f 0x00 + +# CHECK: ncaputd r0, r1 +0x4c 0x00 0x0f 0x40 + +# CHECK: tputd r1 +0x4c 0x00 0x0c 0x80 + +# CHECK: taputd r1 +0x4c 0x00 0x0c 0xc0 + +# CHECK: tcputd r1 +0x4c 0x00 0x0d 0x80 + +# CHECK: tcaputd r1 +0x4c 0x00 0x0d 0xc0 + +# CHECK: tnputd r1 +0x4c 0x00 0x0e 0x80 + +# CHECK: tnaputd r1 +0x4c 0x00 0x0e 0xc0 + +# CHECK: tncputd r1 +0x4c 0x00 0x0f 0x80 + +# CHECK: tncaputd r1 +0x4c 0x00 0x0f 0xc0 + +# CHECK: get r0, rfsl1 +0x6c 0x00 0x00 0x01 + +# CHECK: get r0, rfsl2 +0x6c 0x00 0x00 0x02 + +# CHECK: get r0, rfsl3 +0x6c 0x00 0x00 0x03 + +# CHECK: get r0, rfsl4 +0x6c 0x00 0x00 0x04 + +# CHECK: get r0, rfsl5 +0x6c 0x00 0x00 0x05 + +# CHECK: get r0, rfsl6 +0x6c 0x00 0x00 0x06 + +# CHECK: get r0, rfsl7 +0x6c 0x00 0x00 0x07 + +# CHECK: get r0, rfsl8 +0x6c 0x00 0x00 0x08 + +# CHECK: get r0, rfsl9 +0x6c 0x00 0x00 0x09 + +# CHECK: get r0, rfsl10 +0x6c 0x00 0x00 0x0a + +# CHECK: get r0, rfsl11 +0x6c 0x00 0x00 0x0b + +# CHECK: get r0, rfsl12 +0x6c 0x00 0x00 0x0c + +# CHECK: get r0, rfsl13 +0x6c 0x00 0x00 0x0d + +# CHECK: get r0, rfsl14 +0x6c 0x00 0x00 0x0e + +# CHECK: get r0, rfsl15 +0x6c 0x00 0x00 0x0f diff --git a/test/MC/Disassembler/MBlaze/mblaze_imm.txt b/test/MC/Disassembler/MBlaze/mblaze_imm.txt new file mode 100644 index 000000000000..3833ea85d779 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_imm.txt @@ -0,0 +1,121 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# IMM instruction processing +################################################################################ + +# CHECK: addi r0, r0, 0 +0x20 0x00 0x00 0x00 + +# CHECK: addi r0, r0, 1 +0x20 0x00 0x00 0x01 + +# CHECK: addi r0, r0, 2 +0x20 0x00 0x00 0x02 + +# CHECK: addi r0, r0, 4 +0x20 0x00 0x00 0x04 + +# CHECK: addi r0, r0, 8 +0x20 0x00 0x00 0x08 + +# CHECK: addi r0, r0, 16 +0x20 0x00 0x00 0x10 + +# CHECK: addi r0, r0, 32 +0x20 0x00 0x00 0x20 + +# CHECK: addi r0, r0, 64 +0x20 0x00 0x00 0x40 + +# CHECK: addi r0, r0, 128 +0x20 0x00 0x00 0x80 + +# CHECK: addi r0, r0, 256 +0x20 0x00 0x01 0x00 + +# CHECK: addi r0, r0, 512 +0x20 0x00 0x02 0x00 + +# CHECK: addi r0, r0, 1024 +0x20 0x00 0x04 0x00 + +# CHECK: addi r0, r0, 2048 +0x20 0x00 0x08 0x00 + +# CHECK: addi r0, r0, 4096 +0x20 0x00 0x10 0x00 + +# CHECK: addi r0, r0, 8192 +0x20 0x00 0x20 0x00 + +# CHECK: addi r0, r0, 16384 +0x20 0x00 0x40 0x00 + +# CHECK: imm 0 +# CHECK: addi r0, r0, -32768 +0xb0 0x00 0x00 0x00 0x20 0x00 0x80 0x00 + +# CHECK: imm 1 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x01 0x20 0x00 0x00 0x00 + +# CHECK: imm 2 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x02 0x20 0x00 0x00 0x00 + +# CHECK: imm 4 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x04 0x20 0x00 0x00 0x00 + +# CHECK: imm 8 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x08 0x20 0x00 0x00 0x00 + +# CHECK: imm 16 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x10 0x20 0x00 0x00 0x00 + +# CHECK: imm 32 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x20 0x20 0x00 0x00 0x00 + +# CHECK: imm 64 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x40 0x20 0x00 0x00 0x00 + +# CHECK: imm 128 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x00 0x80 0x20 0x00 0x00 0x00 + +# CHECK: imm 256 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x01 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 512 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x02 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 1024 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x04 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 2048 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x08 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 4096 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x10 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 8192 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x20 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm 16384 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x40 0x00 0x20 0x00 0x00 0x00 + +# CHECK: imm -32768 +# CHECK: addi r0, r0, 0 +0xb0 0x00 0x80 0x00 0x20 0x00 0x00 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_memory.txt b/test/MC/Disassembler/MBlaze/mblaze_memory.txt new file mode 100644 index 000000000000..584d61c47dcf --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_memory.txt @@ -0,0 +1,65 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Memory instructions +################################################################################ + +# CHECK: lbu r1, r2, r3 +0xc0 0x22 0x18 0x00 + +# CHECK: lbur r1, r2, r3 +0xc0 0x22 0x1a 0x00 + +# CHECK: lbui r1, r2, 28 +0xe0 0x22 0x00 0x1c + +# CHECK: lhu r1, r2, r3 +0xc4 0x22 0x18 0x00 + +# CHECK: lhur r1, r2, r3 +0xc4 0x22 0x1a 0x00 + +# CHECK: lhui r1, r2, 28 +0xe4 0x22 0x00 0x1c + +# CHECK: lw r1, r2, r3 +0xc8 0x22 0x18 0x00 + +# CHECK: lwr r1, r2, r3 +0xc8 0x22 0x1a 0x00 + +# CHECK: lwi r1, r2, 28 +0xe8 0x22 0x00 0x1c + +# CHECK: lwx r1, r2, r3 +0xc8 0x22 0x1c 0x00 + +# CHECK: sb r1, r2, r3 +0xd0 0x22 0x18 0x00 + +# CHECK: sbr r1, r2, r3 +0xd0 0x22 0x1a 0x00 + +# CHECK: sbi r1, r2, 28 +0xf0 0x22 0x00 0x1c + +# CHECK: sh r1, r2, r3 +0xd4 0x22 0x18 0x00 + +# CHECK: shr r1, r2, r3 +0xd4 0x22 0x1a 0x00 + +# CHECK: shi r1, r2, 28 +0xf4 0x22 0x00 0x1c + +# CHECK: sw r1, r2, r3 +0xd8 0x22 0x18 0x00 + +# CHECK: swr r1, r2, r3 +0xd8 0x22 0x1a 0x00 + +# CHECK: swi r1, r2, 28 +0xf8 0x22 0x00 0x1c + +# CHECK: swx r1, r2, r3 +0xd8 0x22 0x1c 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_operands.txt b/test/MC/Disassembler/MBlaze/mblaze_operands.txt new file mode 100644 index 000000000000..f0304b12bd7b --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_operands.txt @@ -0,0 +1,197 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Operands disassembly +################################################################################ + +# CHECK: add r0, r0, r0 +0x00 0x00 0x00 0x00 + +# CHECK: add r1, r1, r1 +0x00 0x21 0x08 0x00 + +# CHECK: add r2, r2, r2 +0x00 0x42 0x10 0x00 + +# CHECK: add r3, r3, r3 +0x00 0x63 0x18 0x00 + +# CHECK: add r4, r4, r4 +0x00 0x84 0x20 0x00 + +# CHECK: add r5, r5, r5 +0x00 0xa5 0x28 0x00 + +# CHECK: add r6, r6, r6 +0x00 0xc6 0x30 0x00 + +# CHECK: add r7, r7, r7 +0x00 0xe7 0x38 0x00 + +# CHECK: add r8, r8, r8 +0x01 0x08 0x40 0x00 + +# CHECK: add r9, r9, r9 +0x01 0x29 0x48 0x00 + +# CHECK: add r10, r10, r10 +0x01 0x4a 0x50 0x00 + +# CHECK: add r11, r11, r11 +0x01 0x6b 0x58 0x00 + +# CHECK: add r12, r12, r12 +0x01 0x8c 0x60 0x00 + +# CHECK: add r13, r13, r13 +0x01 0xad 0x68 0x00 + +# CHECK: add r14, r14, r14 +0x01 0xce 0x70 0x00 + +# CHECK: add r15, r15, r15 +0x01 0xef 0x78 0x00 + +# CHECK: add r16, r16, r16 +0x02 0x10 0x80 0x00 + +# CHECK: add r17, r17, r17 +0x02 0x31 0x88 0x00 + +# CHECK: add r18, r18, r18 +0x02 0x52 0x90 0x00 + +# CHECK: add r19, r19, r19 +0x02 0x73 0x98 0x00 + +# CHECK: add r20, r20, r20 +0x02 0x94 0xa0 0x00 + +# CHECK: add r21, r21, r21 +0x02 0xb5 0xa8 0x00 + +# CHECK: add r22, r22, r22 +0x02 0xd6 0xb0 0x00 + +# CHECK: add r23, r23, r23 +0x02 0xf7 0xb8 0x00 + +# CHECK: add r24, r24, r24 +0x03 0x18 0xc0 0x00 + +# CHECK: add r25, r25, r25 +0x03 0x39 0xc8 0x00 + +# CHECK: add r26, r26, r26 +0x03 0x5a 0xd0 0x00 + +# CHECK: add r27, r27, r27 +0x03 0x7b 0xd8 0x00 + +# CHECK: add r28, r28, r28 +0x03 0x9c 0xe0 0x00 + +# CHECK: add r29, r29, r29 +0x03 0xbd 0xe8 0x00 + +# CHECK: add r30, r30, r30 +0x03 0xde 0xf0 0x00 + +# CHECK: add r31, r31, r31 +0x03 0xff 0xf8 0x00 + +# CHECK: addi r0, r0, 0 +0x20 0x00 0x00 0x00 + +# CHECK: addi r0, r0, 1 +0x20 0x00 0x00 0x01 + +# CHECK: addi r0, r0, 2 +0x20 0x00 0x00 0x02 + +# CHECK: addi r0, r0, 4 +0x20 0x00 0x00 0x04 + +# CHECK: addi r0, r0, 8 +0x20 0x00 0x00 0x08 + +# CHECK: addi r0, r0, 16 +0x20 0x00 0x00 0x10 + +# CHECK: addi r0, r0, 32 +0x20 0x00 0x00 0x20 + +# CHECK: addi r0, r0, 64 +0x20 0x00 0x00 0x40 + +# CHECK: addi r0, r0, 128 +0x20 0x00 0x00 0x80 + +# CHECK: addi r0, r0, 256 +0x20 0x00 0x01 0x00 + +# CHECK: addi r0, r0, 512 +0x20 0x00 0x02 0x00 + +# CHECK: addi r0, r0, 1024 +0x20 0x00 0x04 0x00 + +# CHECK: addi r0, r0, 2048 +0x20 0x00 0x08 0x00 + +# CHECK: addi r0, r0, 4096 +0x20 0x00 0x10 0x00 + +# CHECK: addi r0, r0, 8192 +0x20 0x00 0x20 0x00 + +# CHECK: addi r0, r0, 16384 +0x20 0x00 0x40 0x00 + +# CHECK: addi r0, r0, -1 +0x20 0x00 0xff 0xff + +# CHECK: addi r0, r0, -2 +0x20 0x00 0xff 0xfe + +# CHECK: addi r0, r0, -4 +0x20 0x00 0xff 0xfc + +# CHECK: addi r0, r0, -8 +0x20 0x00 0xff 0xf8 + +# CHECK: addi r0, r0, -16 +0x20 0x00 0xff 0xf0 + +# CHECK: addi r0, r0, -32 +0x20 0x00 0xff 0xe0 + +# CHECK: addi r0, r0, -64 +0x20 0x00 0xff 0xc0 + +# CHECK: addi r0, r0, -128 +0x20 0x00 0xff 0x80 + +# CHECK: addi r0, r0, -256 +0x20 0x00 0xff 0x00 + +# CHECK: addi r0, r0, -512 +0x20 0x00 0xfe 0x00 + +# CHECK: addi r0, r0, -1024 +0x20 0x00 0xfc 0x00 + +# CHECK: addi r0, r0, -2048 +0x20 0x00 0xf8 0x00 + +# CHECK: addi r0, r0, -4096 +0x20 0x00 0xf0 0x00 + +# CHECK: addi r0, r0, -8192 +0x20 0x00 0xe0 0x00 + +# CHECK: addi r0, r0, -16384 +0x20 0x00 0xc0 0x00 + +# CHECK: addi r0, r0, -32768 +0x20 0x00 0x80 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_pattern.txt b/test/MC/Disassembler/MBlaze/mblaze_pattern.txt new file mode 100644 index 000000000000..1268378fa0f8 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_pattern.txt @@ -0,0 +1,14 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Pattern instructions +################################################################################ + +# CHECK: pcmpbf r0, r1, r2 +0x80 0x01 0x14 0x00 + +# CHECK: pcmpne r0, r1, r2 +0x8c 0x01 0x14 0x00 + +# CHECK: pcmpeq r0, r1, r2 +0x88 0x01 0x14 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_shift.txt b/test/MC/Disassembler/MBlaze/mblaze_shift.txt new file mode 100644 index 000000000000..2783ffcb3e72 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_shift.txt @@ -0,0 +1,29 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Shift instructions +################################################################################ + +# CHECK: bsrl r1, r2, r3 +0x44 0x22 0x18 0x00 + +# CHECK: bsra r1, r2, r3 +0x44 0x22 0x1a 0x00 + +# CHECK: bsll r1, r2, r3 +0x44 0x22 0x1c 0x00 + +# CHECK: bsrli r1, r2, 0 +0x64 0x22 0x00 0x00 + +# CHECK: bsrai r1, r2, 0 +0x64 0x22 0x02 0x00 + +# CHECK: bslli r1, r2, 0 +0x64 0x22 0x04 0x00 + +# CHECK: sra r1, r2 +0x90 0x22 0x00 0x01 + +# CHECK: srl r1, r2 +0x90 0x22 0x00 0x41 diff --git a/test/MC/Disassembler/MBlaze/mblaze_special.txt b/test/MC/Disassembler/MBlaze/mblaze_special.txt new file mode 100644 index 000000000000..a808cc9ccfb3 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_special.txt @@ -0,0 +1,105 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# Special instructions +################################################################################ + +# CHECK: mfs r0, rpc +0x94 0x00 0x80 0x00 + +# CHECK: msrclr r0, 0 +0x94 0x11 0x00 0x00 + +# CHECK: msrset r0, 0 +0x94 0x10 0x00 0x00 + +# CHECK: mts rpc, r0 +0x94 0x00 0xc0 0x00 + +# CHECK: wdc r0, r1 +0x90 0x00 0x08 0x64 + +# CHECK: wdc.clear r0, r1 +0x90 0x00 0x08 0x66 + +# CHECK: wdc.flush r0, r1 +0x90 0x00 0x08 0x74 + +# CHECK: wic r0, r1 +0x90 0x00 0x08 0x68 + +################################################################################ +# Special registers +################################################################################ + +# CHECK: mfs r1, rpc +0x94 0x20 0x80 0x00 + +# CHECK: mfs r1, rmsr +0x94 0x20 0x80 0x01 + +# CHECK: mfs r1, rear +0x94 0x20 0x80 0x03 + +# CHECK: mfs r1, resr +0x94 0x20 0x80 0x05 + +# CHECK: mfs r1, rfsr +0x94 0x20 0x80 0x07 + +# CHECK: mfs r1, rbtr +0x94 0x20 0x80 0x0b + +# CHECK: mfs r1, redr +0x94 0x20 0x80 0x0d + +# CHECK: mfs r1, rpid +0x94 0x20 0x90 0x00 + +# CHECK: mfs r1, rzpr +0x94 0x20 0x90 0x01 + +# CHECK: mfs r1, rtlbx +0x94 0x20 0x90 0x02 + +# CHECK: mfs r1, rtlbhi +0x94 0x20 0x90 0x04 + +# CHECK: mfs r1, rtlblo +0x94 0x20 0x90 0x03 + +# CHECK: mfs r1, rpvr0 +0x94 0x20 0xa0 0x00 + +# CHECK: mfs r1, rpvr1 +0x94 0x20 0xa0 0x01 + +# CHECK: mfs r1, rpvr2 +0x94 0x20 0xa0 0x02 + +# CHECK: mfs r1, rpvr3 +0x94 0x20 0xa0 0x03 + +# CHECK: mfs r1, rpvr4 +0x94 0x20 0xa0 0x04 + +# CHECK: mfs r1, rpvr5 +0x94 0x20 0xa0 0x05 + +# CHECK: mfs r1, rpvr6 +0x94 0x20 0xa0 0x06 + +# CHECK: mfs r1, rpvr7 +0x94 0x20 0xa0 0x07 + +# CHECK: mfs r1, rpvr8 +0x94 0x20 0xa0 0x08 + +# CHECK: mfs r1, rpvr9 +0x94 0x20 0xa0 0x09 + +# CHECK: mfs r1, rpvr10 +0x94 0x20 0xa0 0x0a + +# CHECK: mfs r1, rpvr11 +0x94 0x20 0xa0 0x0b diff --git a/test/MC/Disassembler/MBlaze/mblaze_typea.txt b/test/MC/Disassembler/MBlaze/mblaze_typea.txt new file mode 100644 index 000000000000..ce99950548bb --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_typea.txt @@ -0,0 +1,74 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# TYPE A instructions +################################################################################ + +# CHECK: add r1, r2, r3 +0x00 0x22 0x18 0x00 + +# CHECK: addc r1, r2, r3 +0x08 0x22 0x18 0x00 + +# CHECK: addk r1, r2, r3 +0x10 0x22 0x18 0x00 + +# CHECK: addkc r1, r2, r3 +0x18 0x22 0x18 0x00 + +# CHECK: and r1, r2, r3 +0x84 0x22 0x18 0x00 + +# CHECK: andn r1, r2, r3 +0x8c 0x22 0x18 0x00 + +# CHECK: cmp r1, r2, r3 +0x14 0x22 0x18 0x01 + +# CHECK: cmpu r1, r2, r3 +0x14 0x22 0x18 0x03 + +# CHECK: idiv r1, r2, r3 +0x48 0x22 0x18 0x00 + +# CHECK: idivu r1, r2, r3 +0x48 0x22 0x18 0x02 + +# CHECK: mul r1, r2, r3 +0x40 0x22 0x18 0x00 + +# CHECK: mulh r1, r2, r3 +0x40 0x22 0x18 0x01 + +# CHECK: mulhu r1, r2, r3 +0x40 0x22 0x18 0x03 + +# CHECK: mulhsu r1, r2, r3 +0x40 0x22 0x18 0x02 + +# CHECK: or r1, r2, r3 +0x80 0x22 0x18 0x00 + +# CHECK: rsub r1, r2, r3 +0x04 0x22 0x18 0x00 + +# CHECK: rsubc r1, r2, r3 +0x0c 0x22 0x18 0x00 + +# CHECK: rsubk r1, r2, r3 +0x14 0x22 0x18 0x00 + +# CHECK: rsubkc r1, r2, r3 +0x1c 0x22 0x18 0x00 + +# CHECK: sext16 r1, r2 +0x90 0x22 0x00 0x61 + +# CHECK: sext8 r1, r2 +0x90 0x22 0x00 0x60 + +# CHECK: xor r1, r2, r3 +0x88 0x22 0x18 0x00 + +# CHECK: or r0, r0, r0 +0x80 0x00 0x00 0x00 diff --git a/test/MC/Disassembler/MBlaze/mblaze_typeb.txt b/test/MC/Disassembler/MBlaze/mblaze_typeb.txt new file mode 100644 index 000000000000..99782ac2c159 --- /dev/null +++ b/test/MC/Disassembler/MBlaze/mblaze_typeb.txt @@ -0,0 +1,56 @@ +# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s + +################################################################################ +# TYPE B instructions +################################################################################ + +# CHECK: addi r1, r2, 15 +0x20 0x22 0x00 0x0f + +# CHECK: addic r1, r2, 15 +0x28 0x22 0x00 0x0f + +# CHECK: addik r1, r2, 15 +0x30 0x22 0x00 0x0f + +# CHECK: addikc r1, r2, 15 +0x38 0x22 0x00 0x0f + +# CHECK: andi r1, r2, 15 +0xa4 0x22 0x00 0x0f + +# CHECK: andni r1, r2, 15 +0xac 0x22 0x00 0x0f + +# CHECK: muli r1, r2, 15 +0x60 0x22 0x00 0x0f + +# CHECK: ori r1, r2, 15 +0xa0 0x22 0x00 0x0f + +# CHECK: rsubi r1, r2, 15 +0x24 0x22 0x00 0x0f + +# CHECK: rsubic r1, r2, 15 +0x2c 0x22 0x00 0x0f + +# CHECK: rsubik r1, r2, 15 +0x34 0x22 0x00 0x0f + +# CHECK: rsubikc r1, r2, 15 +0x3c 0x22 0x00 0x0f + +# CHECK: rtbd r15, 15 +0xb6 0x4f 0x00 0x0f + +# CHECK: rted r15, 15 +0xb6 0x8f 0x00 0x0f + +# CHECK: rtid r15, 15 +0xb6 0x2f 0x00 0x0f + +# CHECK: rtsd r15, 15 +0xb6 0x0f 0x00 0x0f + +# CHECK: xori r1, r2, 15 +0xa8 0x22 0x00 0x0f diff --git a/test/MC/Disassembler/X86/dg.exp b/test/MC/Disassembler/X86/dg.exp new file mode 100644 index 000000000000..a4d0e7c718c8 --- /dev/null +++ b/test/MC/Disassembler/X86/dg.exp @@ -0,0 +1,6 @@ +load_lib llvm.exp + +if { [llvm_supports_target X86] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]] +} + diff --git a/test/MC/Disassembler/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index dcc3763b7b7d..13a19d2ca4c3 100644 --- a/test/MC/Disassembler/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -59,4 +59,10 @@ 0x0f 0x20 0xc1 # CHECK: leal 4(%rsp), %ecx -0x8d 0x4c 0x24 0x04
\ No newline at end of file +0x8d 0x4c 0x24 0x04 + +# CHECK: enter $1, $2 +0xc8 0x01 0x00 0x02 + +# CHECK: movw $47416, -66(%rbp) +0x66 0xc7 0x45 0xbe 0x38 0xb9 diff --git a/test/MC/Disassembler/X86/truncated-input.txt b/test/MC/Disassembler/X86/truncated-input.txt new file mode 100644 index 000000000000..34cf0382a74c --- /dev/null +++ b/test/MC/Disassembler/X86/truncated-input.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 |& FileCheck %s + +# CHECK: warning +0x00 diff --git a/test/MC/ELF/abs.s b/test/MC/ELF/abs.s new file mode 100644 index 000000000000..c598b11e291d --- /dev/null +++ b/test/MC/ELF/abs.s @@ -0,0 +1,16 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that zed will be an ABS symbol + +.Lfoo: +.Lbar: + zed = .Lfoo - .Lbar + +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000001) # 'zed' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x0000fff1) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) diff --git a/test/MC/ELF/alias-reloc.s b/test/MC/ELF/alias-reloc.s new file mode 100644 index 000000000000..c908c12404d5 --- /dev/null +++ b/test/MC/ELF/alias-reloc.s @@ -0,0 +1,52 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that this produces a R_X86_64_PLT32 with bar. + + .globl foo +foo: +bar = foo + .section zed, "", @progbits + call bar@PLT + + +// Test that this produres a relocation with bar2 + + .weak foo2 +foo2: + .weak bar2 + .set bar2,foo2 + .quad bar2 + +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000005) # 'bar' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + +// CHECK: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x0000000e) # 'bar2' +// CHECK-NEXT: ('st_bind', 0x00000002) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) +// CHECK-NEXT: ('st_value', 0x0000000000000005) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + +// CHECK: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000001) +// CHECK-NEXT: ('r_sym', 0x00000001) +// CHECK-NEXT: ('r_type', 0x00000004) +// CHECK-NEXT: ('r_addend', 0xfffffffc) +// CHECK-NEXT: ), + +// CHECK: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000005) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/alias.s b/test/MC/ELF/alias.s new file mode 100644 index 000000000000..42d54bc431dc --- /dev/null +++ b/test/MC/ELF/alias.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +foo: +bar = foo + + .globl foo2 +foo2 = bar2 + +foo3: + .globl bar3 +bar3 = foo3 + +// Test that bar4 is also a function + .type foo4,@function +foo4: +bar4 = foo4 + + .long foo2 +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000005) # 'bar' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x0000001d) # 'bar4' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000002) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000003 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x0000000e) # 'foo3' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000018) # 'foo4' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000002) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x00000013) # 'bar3' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK: # Symbol 0x0000000a +// CHECK-NEXT: (('st_name', 0x00000009) # 'bar2' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) diff --git a/test/MC/ELF/align-bss.s b/test/MC/ELF/align-bss.s new file mode 100644 index 000000000000..4f73a29f8e2d --- /dev/null +++ b/test/MC/ELF/align-bss.s @@ -0,0 +1,17 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the bss section is correctly aligned + + .local foo + .comm foo,2048,16 + +// CHECK: ('sh_name', 0x0000000d) # '.bss' +// CHECK-NEXT: ('sh_type', 0x00000008) +// CHECK-NEXT: ('sh_flags', 0x00000003) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000800) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000010) +// CHECK-NEXT: ('sh_entsize', 0x00000000) diff --git a/test/MC/ELF/align-nops.s b/test/MC/ELF/align-nops.s new file mode 100644 index 000000000000..28d4b895f5d9 --- /dev/null +++ b/test/MC/ELF/align-nops.s @@ -0,0 +1,40 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we get optimal nops in text + .text +f0: + .long 0 + .align 8, 0x00000090 + .long 0 + .align 8 + +// But not in another section + .data + .long 0 + .align 8, 0x00000090 + .long 0 + .align 8 + +// CHECK: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', 0x00000010) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '00000000 0f1f4000 00000000 0f1f4000') + +// CHECK: (('sh_name', 0x00000007) # '.data' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000003) +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', 0x00000010) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '00000000 90909090 00000000 00000000') diff --git a/test/MC/ELF/align-size.s b/test/MC/ELF/align-size.s new file mode 100644 index 000000000000..85331d7ae915 --- /dev/null +++ b/test/MC/ELF/align-size.s @@ -0,0 +1,13 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the alignment does contribute to the size of the section. + + .zero 4 + .align 8 + +// CHECK: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000008) diff --git a/test/MC/ELF/align-text.s b/test/MC/ELF/align-text.s new file mode 100644 index 000000000000..1d2dacb3a067 --- /dev/null +++ b/test/MC/ELF/align-text.s @@ -0,0 +1,19 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the .text directive doesn't cause alignment. + + .zero 1 + .text + .zero 1 + +// CHECK: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000002) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/align.s b/test/MC/ELF/align.s new file mode 100644 index 000000000000..c3912a7c67b0 --- /dev/null +++ b/test/MC/ELF/align.s @@ -0,0 +1,32 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the alignment of rodata doesn't force a alignment of the +// previous section (.bss) + + nop + .section .rodata,"a",@progbits + .align 8 + +// CHECK: # Section 0x00000003 +// CHECK-NEXT: (('sh_name', 0x0000000d) # '.bss' +// CHECK-NEXT: ('sh_type', 0x00000008) +// CHECK-NEXT: ('sh_flags', 0x00000003) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000044) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.rodata' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) diff --git a/test/MC/ELF/bad-section.s b/test/MC/ELF/bad-section.s new file mode 100644 index 000000000000..73d89ce765a4 --- /dev/null +++ b/test/MC/ELF/bad-section.s @@ -0,0 +1,9 @@ +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o /dev/null 2>%t +// RUN: FileCheck --input-file=%t %s + +// CHECK: error: unexpected token in directive +// CHECK: .section "foo"-bar + +// test that we don't accept this, as gas doesn't. + +.section "foo"-bar diff --git a/test/MC/ELF/basic-elf-32.s b/test/MC/ELF/basic-elf-32.s new file mode 100644 index 000000000000..fa97da44d422 --- /dev/null +++ b/test/MC/ELF/basic-elf-32.s @@ -0,0 +1,78 @@ +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .text + .globl main + .align 16, 0x90 + .type main,@function +main: # @main +# BB#0: + subl $4, %esp + movl $.L.str1, (%esp) + calll puts + movl $.L.str2, (%esp) + calll puts + xorl %eax, %eax + addl $4, %esp + ret +.Ltmp0: + .size main, .Ltmp0-main + + .type .L.str1,@object # @.str1 + .section .rodata.str1.1,"aMS",@progbits,1 +.L.str1: + .asciz "Hello" + .size .L.str1, 6 + + .type .L.str2,@object # @.str2 +.L.str2: + .asciz "World!" + .size .L.str2, 7 + + .section .note.GNU-stack,"",@progbits + +// CHECK: ('e_indent[EI_CLASS]', 0x00000001) +// CHECK: ('e_indent[EI_DATA]', 0x00000001) +// CHECK: ('e_indent[EI_VERSION]', 0x00000001) +// CHECK: ('_sections', [ +// CHECK: # Section 0 +// CHECK: (('sh_name', 0x00000000) # '' + +// CHECK: # '.text' + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: # 'main' +// CHECK: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000002) + +// CHECK: # 'puts' +// CHECK: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) + +// CHECK: # '.rel.text' + +// CHECK: ('_relocations', [ +// CHECK: # Relocation 0x00000000 +// CHECK: (('r_offset', 0x00000006) +// CHECK: ('r_type', 0x00000001) +// CHECK: ), +// CHECK: # Relocation 0x00000001 +// CHECK: (('r_offset', 0x0000000b) +// CHECK: ('r_type', 0x00000002) +// CHECK: ), +// CHECK: # Relocation 0x00000002 +// CHECK: (('r_offset', 0x00000012) +// CHECK: ('r_type', 0x00000001) +// CHECK: ), +// CHECK: # Relocation 0x00000003 +// CHECK: (('r_offset', 0x00000017) +// CHECK: ('r_type', 0x00000002) +// CHECK: ), +// CHECK: ]) diff --git a/test/MC/ELF/basic-elf-64.s b/test/MC/ELF/basic-elf-64.s new file mode 100644 index 000000000000..7fc40b790ff8 --- /dev/null +++ b/test/MC/ELF/basic-elf-64.s @@ -0,0 +1,82 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .text + .globl main + .align 16, 0x90 + .type main,@function +main: # @main +# BB#0: + subq $8, %rsp + movl $.L.str1, %edi + callq puts + movl $.L.str2, %edi + callq puts + xorl %eax, %eax + addq $8, %rsp + ret +.Ltmp0: + .size main, .Ltmp0-main + + .type .L.str1,@object # @.str1 + .section .rodata.str1.1,"aMS",@progbits,1 +.L.str1: + .asciz "Hello" + .size .L.str1, 6 + + .type .L.str2,@object # @.str2 +.L.str2: + .asciz "World!" + .size .L.str2, 7 + + .section .note.GNU-stack,"",@progbits + +// CHECK: ('e_indent[EI_CLASS]', 0x00000002) +// CHECK: ('e_indent[EI_DATA]', 0x00000001) +// CHECK: ('e_indent[EI_VERSION]', 0x00000001) +// CHECK: ('_sections', [ +// CHECK: # Section 0 +// CHECK: (('sh_name', 0x00000000) # '' + +// CHECK: # '.text' + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) + +// CHECK: # 'main' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000002) + +// CHECK: # 'puts' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) + +// CHECK: # '.rela.text' + +// CHECK: ('_relocations', [ +// CHECK: # Relocation 0x00000000 +// CHECK: (('r_offset', 0x00000005) +// CHECK: ('r_type', 0x0000000a) +// CHECK: ('r_addend', 0x00000000) +// CHECK: ), +// CHECK: # Relocation 0x00000001 +// CHECK: (('r_offset', 0x0000000a) +// CHECK: ('r_type', 0x00000002) +// CHECK: ('r_addend', 0xfffffffc) +// CHECK: ), +// CHECK: # Relocation 0x00000002 +// CHECK: (('r_offset', 0x0000000f) +// CHECK: ('r_type', 0x0000000a) +// CHECK: ('r_addend', 0x00000006) +// CHECK: ), +// CHECK: # Relocation 0x00000003 +// CHECK: (('r_offset', 0x00000014) +// CHECK: ('r_type', 0x00000002) +// CHECK: ('r_addend', 0xfffffffc) +// CHECK: ), +// CHECK: ]) diff --git a/test/MC/ELF/call-abs.s b/test/MC/ELF/call-abs.s new file mode 100644 index 000000000000..885c2d19bad2 --- /dev/null +++ b/test/MC/ELF/call-abs.s @@ -0,0 +1,24 @@ +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .text + .globl f + .type f,@function +f: # @f +# BB#0: # %entry + subl $4, %esp + calll 42 + incl %eax + addl $4, %esp + ret +.Ltmp0: + .size f, .Ltmp0-f + + .section .note.GNU-stack,"",@progbits + +// CHECK: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000004) +// CHECK-NEXT: ('r_sym', 0x00000000) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/ELF/cfi-advance-loc2.s b/test/MC/ELF/cfi-advance-loc2.s new file mode 100644 index 000000000000..3ffdd6cf0288 --- /dev/null +++ b/test/MC/ELF/cfi-advance-loc2.s @@ -0,0 +1,45 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// test that this produces a correctly encoded cfi_advance_loc2 + +f: + .cfi_startproc + nop + .zero 255, 0x90 + .cfi_def_cfa_offset 8 + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000148) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 01010000 00030001 0e080000') +// CHECK-NEXT: ), + + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000258) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-def-cfa-offset.s b/test/MC/ELF/cfi-def-cfa-offset.s new file mode 100644 index 000000000000..efefb8789dce --- /dev/null +++ b/test/MC/ELF/cfi-def-cfa-offset.s @@ -0,0 +1,46 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + subq $8, %rsp + .cfi_def_cfa_offset 16 + nop + addq $8, %rsp + .cfi_def_cfa_offset 8 + ret + .cfi_endproc + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 0a000000 00440e10 450e0800') +// CHECK-NEXT: ), + +// CHECK: # Section 0x00000008 +// CHECK-NEXT: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000160) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-def-cfa-register.s b/test/MC/ELF/cfi-def-cfa-register.s new file mode 100644 index 000000000000..3df20218a273 --- /dev/null +++ b/test/MC/ELF/cfi-def-cfa-register.s @@ -0,0 +1,41 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_def_cfa_register 6 + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410d06 00000000') +// CHECK-NEXT: ), + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000158) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-def-cfa.s b/test/MC/ELF/cfi-def-cfa.s new file mode 100644 index 000000000000..1ad427b310c3 --- /dev/null +++ b/test/MC/ELF/cfi-def-cfa.s @@ -0,0 +1,42 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_def_cfa 7, 8 + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410c07 08000000') +// CHECK-NEXT: ), + + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000158) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-offset.s b/test/MC/ELF/cfi-offset.s new file mode 100644 index 000000000000..2f7e7976fa57 --- /dev/null +++ b/test/MC/ELF/cfi-offset.s @@ -0,0 +1,42 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_offset %ebp, -16 + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00418602 00000000') +// CHECK-NEXT: ), + + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000158) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-remember.s b/test/MC/ELF/cfi-remember.s new file mode 100644 index 000000000000..b5b380368f06 --- /dev/null +++ b/test/MC/ELF/cfi-remember.s @@ -0,0 +1,45 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f: + .cfi_startproc + nop + .cfi_remember_state + nop + .cfi_restore_state + nop + .cfi_endproc + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 03000000 00410a41 0b000000') +// CHECK-NEXT: ), + +// CHECK: # Section 0x00000008 +// CHECK-NEXT: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000158) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi-zero-addr-delta.s b/test/MC/ELF/cfi-zero-addr-delta.s new file mode 100644 index 000000000000..5585e296da54 --- /dev/null +++ b/test/MC/ELF/cfi-zero-addr-delta.s @@ -0,0 +1,48 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we don't produce a DW_CFA_advance_loc 0 + +f: + .cfi_startproc + nop + .cfi_def_cfa_offset 16 + nop + .cfi_remember_state + .cfi_def_cfa_offset 8 + nop + .cfi_restore_state + nop + .cfi_endproc + +// CHECK: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000048) +// CHECK-NEXT: ('sh_size', 0x00000038) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 1c000000 1c000000 00000000 04000000 00410e10 410a0e08 410b0000 00000000') +// CHECK-NEXT: ), + +// CHECK: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000160) +// CHECK-NEXT: ('sh_size', 0x00000018) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/cfi.s b/test/MC/ELF/cfi.s new file mode 100644 index 000000000000..93fd2e792238 --- /dev/null +++ b/test/MC/ELF/cfi.s @@ -0,0 +1,674 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +f1: + .cfi_startproc + .cfi_lsda 0x3, bar + nop + .cfi_endproc + +f2: + .cfi_startproc + .cfi_personality 0x00, foo + .cfi_lsda 0x3, bar + nop + .cfi_endproc + +f3: + .cfi_startproc + .cfi_lsda 0x3, bar + nop + .cfi_endproc + +f4: + .cfi_startproc + .cfi_personality 0x00, foo + .cfi_lsda 0x2, bar + nop + .cfi_endproc + +f5: + .cfi_startproc + .cfi_personality 0x02, foo + nop + .cfi_endproc + +f6: + .cfi_startproc + .cfi_personality 0x03, foo + nop + .cfi_endproc + +f7: + .cfi_startproc + .cfi_personality 0x04, foo + nop + .cfi_endproc + +f8: + .cfi_startproc + .cfi_personality 0x0a, foo + nop + .cfi_endproc + +f9: + .cfi_startproc + .cfi_personality 0x0b, foo + nop + .cfi_endproc + +f10: + .cfi_startproc + .cfi_personality 0x0c, foo + nop + .cfi_endproc + +f11: + .cfi_startproc + .cfi_personality 0x08, foo + nop + .cfi_endproc + +f12: + .cfi_startproc + .cfi_personality 0x10, foo + nop + .cfi_endproc + +f13: + .cfi_startproc + .cfi_personality 0x12, foo + nop + .cfi_endproc + +f14: + .cfi_startproc + .cfi_personality 0x13, foo + nop + .cfi_endproc + +f15: + .cfi_startproc + .cfi_personality 0x14, foo + nop + .cfi_endproc + +f16: + .cfi_startproc + .cfi_personality 0x1a, foo + nop + .cfi_endproc + +f17: + .cfi_startproc + .cfi_personality 0x1b, foo + nop + .cfi_endproc + +f18: + .cfi_startproc + .cfi_personality 0x1c, foo + nop + .cfi_endproc + +f19: + .cfi_startproc + .cfi_personality 0x18, foo + nop + .cfi_endproc + +f20: + .cfi_startproc + .cfi_personality 0x80, foo + nop + .cfi_endproc + +f21: + .cfi_startproc + .cfi_personality 0x82, foo + nop + .cfi_endproc + +f22: + .cfi_startproc + .cfi_personality 0x83, foo + nop + .cfi_endproc + +f23: + .cfi_startproc + .cfi_personality 0x84, foo + nop + .cfi_endproc + +f24: + .cfi_startproc + .cfi_personality 0x8a, foo + nop + .cfi_endproc + +f25: + .cfi_startproc + .cfi_personality 0x8b, foo + nop + .cfi_endproc + +f26: + .cfi_startproc + .cfi_personality 0x8c, foo + nop + .cfi_endproc + +f27: + .cfi_startproc + .cfi_personality 0x88, foo + nop + .cfi_endproc + +f28: + .cfi_startproc + .cfi_personality 0x90, foo + nop + .cfi_endproc + +f29: + .cfi_startproc + .cfi_personality 0x92, foo + nop + .cfi_endproc + +f30: + .cfi_startproc + .cfi_personality 0x93, foo + nop + .cfi_endproc + +f31: + .cfi_startproc + .cfi_personality 0x94, foo + nop + .cfi_endproc + +f32: + .cfi_startproc + .cfi_personality 0x9a, foo + nop + .cfi_endproc + +f33: + .cfi_startproc + .cfi_personality 0x9b, foo + nop + .cfi_endproc + +f34: + .cfi_startproc + .cfi_personality 0x9c, foo + nop + .cfi_endproc + +f36: + .cfi_startproc + .cfi_personality 0x98, foo + nop + .cfi_endproc + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000068) +// CHECK-NEXT: ('sh_size', 0x000006c8) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '14000000 00000000 017a4c52 00017810 02031b0c 07089001 14000000 1c000000 00000000 01000000 04000000 00000000 20000000 00000000 017a504c 52000178 100b0000 00000000 00000003 1b0c0708 90010000 14000000 28000000 00000000 01000000 04000000 00000000 14000000 70000000 00000000 01000000 04000000 00000000 20000000 00000000 017a504c 52000178 100b0000 00000000 00000002 1b0c0708 90010000 10000000 28000000 00000000 01000000 02000000 18000000 00000000 017a5052 00017810 04020000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06030000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a040000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 040a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 060b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a0c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a080000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a100000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04120000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06130000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a140000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 041a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 061b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a1c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a180000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a800000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04820000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06830000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a840000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 048a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 068b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a8c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a880000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a900000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04920000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06930000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a940000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 049a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 069b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a9c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a980000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000') +// CHECK-NEXT: ), + +// CHECK: # Section 0x00000008 +// CHECK-NEXT: (('sh_name', 0x00000036) # '.rela.eh_frame' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000bf8) +// CHECK-NEXT: ('sh_size', 0x000006c0) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000029) +// CHECK-NEXT: ('r_sym', 0x00000028) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000002 +// CHECK-NEXT: (('r_offset', 0x00000043) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000003 +// CHECK-NEXT: (('r_offset', 0x0000005c) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000001) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000004 +// CHECK-NEXT: (('r_offset', 0x00000065) +// CHECK-NEXT: ('r_sym', 0x00000028) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000005 +// CHECK-NEXT: (('r_offset', 0x00000074) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000002) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000006 +// CHECK-NEXT: (('r_offset', 0x0000007d) +// CHECK-NEXT: ('r_sym', 0x00000028) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000007 +// CHECK-NEXT: (('r_offset', 0x00000097) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000008 +// CHECK-NEXT: (('r_offset', 0x000000b0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000003) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000009 +// CHECK-NEXT: (('r_offset', 0x000000b9) +// CHECK-NEXT: ('r_sym', 0x00000028) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000a +// CHECK-NEXT: (('r_offset', 0x000000ce) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000b +// CHECK-NEXT: (('r_offset', 0x000000e0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000004) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000c +// CHECK-NEXT: (('r_offset', 0x000000fe) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000d +// CHECK-NEXT: (('r_offset', 0x00000110) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000005) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000e +// CHECK-NEXT: (('r_offset', 0x0000012e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000000f +// CHECK-NEXT: (('r_offset', 0x00000144) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000006) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000010 +// CHECK-NEXT: (('r_offset', 0x00000162) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000011 +// CHECK-NEXT: (('r_offset', 0x00000174) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000007) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000012 +// CHECK-NEXT: (('r_offset', 0x00000192) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000013 +// CHECK-NEXT: (('r_offset', 0x000001a4) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000008) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000014 +// CHECK-NEXT: (('r_offset', 0x000001c2) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000015 +// CHECK-NEXT: (('r_offset', 0x000001d8) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000009) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000016 +// CHECK-NEXT: (('r_offset', 0x000001f6) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000017 +// CHECK-NEXT: (('r_offset', 0x0000020c) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000a) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000018 +// CHECK-NEXT: (('r_offset', 0x0000022a) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000019 +// CHECK-NEXT: (('r_offset', 0x00000240) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000b) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001a +// CHECK-NEXT: (('r_offset', 0x0000025e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000d) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001b +// CHECK-NEXT: (('r_offset', 0x00000270) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000c) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001c +// CHECK-NEXT: (('r_offset', 0x0000028e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001d +// CHECK-NEXT: (('r_offset', 0x000002a0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000d) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001e +// CHECK-NEXT: (('r_offset', 0x000002be) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000001f +// CHECK-NEXT: (('r_offset', 0x000002d4) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000e) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000020 +// CHECK-NEXT: (('r_offset', 0x000002f2) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000d) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000021 +// CHECK-NEXT: (('r_offset', 0x00000304) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000000f) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000022 +// CHECK-NEXT: (('r_offset', 0x00000322) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000023 +// CHECK-NEXT: (('r_offset', 0x00000334) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000010) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000024 +// CHECK-NEXT: (('r_offset', 0x00000352) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000025 +// CHECK-NEXT: (('r_offset', 0x00000368) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000011) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000026 +// CHECK-NEXT: (('r_offset', 0x00000386) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000027 +// CHECK-NEXT: (('r_offset', 0x0000039c) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000012) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000028 +// CHECK-NEXT: (('r_offset', 0x000003ba) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000029 +// CHECK-NEXT: (('r_offset', 0x000003d0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000013) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002a +// CHECK-NEXT: (('r_offset', 0x000003ee) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002b +// CHECK-NEXT: (('r_offset', 0x00000400) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000014) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002c +// CHECK-NEXT: (('r_offset', 0x0000041e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002d +// CHECK-NEXT: (('r_offset', 0x00000430) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000015) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002e +// CHECK-NEXT: (('r_offset', 0x0000044e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000002f +// CHECK-NEXT: (('r_offset', 0x00000464) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000016) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000030 +// CHECK-NEXT: (('r_offset', 0x00000482) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000c) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000031 +// CHECK-NEXT: (('r_offset', 0x00000494) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000017) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000032 +// CHECK-NEXT: (('r_offset', 0x000004b2) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000033 +// CHECK-NEXT: (('r_offset', 0x000004c4) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000018) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000034 +// CHECK-NEXT: (('r_offset', 0x000004e2) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000035 +// CHECK-NEXT: (('r_offset', 0x000004f8) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000019) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000036 +// CHECK-NEXT: (('r_offset', 0x00000516) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000037 +// CHECK-NEXT: (('r_offset', 0x0000052c) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001a) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000038 +// CHECK-NEXT: (('r_offset', 0x0000054a) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000039 +// CHECK-NEXT: (('r_offset', 0x00000560) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001b) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003a +// CHECK-NEXT: (('r_offset', 0x0000057e) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000d) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003b +// CHECK-NEXT: (('r_offset', 0x00000590) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001c) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003c +// CHECK-NEXT: (('r_offset', 0x000005ae) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003d +// CHECK-NEXT: (('r_offset', 0x000005c0) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001d) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003e +// CHECK-NEXT: (('r_offset', 0x000005de) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x0000003f +// CHECK-NEXT: (('r_offset', 0x000005f4) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001e) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000040 +// CHECK-NEXT: (('r_offset', 0x00000612) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x0000000d) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000041 +// CHECK-NEXT: (('r_offset', 0x00000624) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000001f) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000042 +// CHECK-NEXT: (('r_offset', 0x00000642) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000043 +// CHECK-NEXT: (('r_offset', 0x00000654) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000020) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000044 +// CHECK-NEXT: (('r_offset', 0x00000672) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000045 +// CHECK-NEXT: (('r_offset', 0x00000688) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000021) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000046 +// CHECK-NEXT: (('r_offset', 0x000006a6) +// CHECK-NEXT: ('r_sym', 0x00000029) +// CHECK-NEXT: ('r_type', 0x00000018) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000047 +// CHECK-NEXT: (('r_offset', 0x000006bc) +// CHECK-NEXT: ('r_sym', 0x00000024) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000022) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/comdat.s b/test/MC/ELF/comdat.s new file mode 100644 index 000000000000..0f1164e82068 --- /dev/null +++ b/test/MC/ELF/comdat.s @@ -0,0 +1,86 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that we produce the group sections and that they are a the beginning +// of the file. + +// CHECK: # Section 0x00000001 +// CHECK-NEXT: (('sh_name', 0x00000026) # '.group' +// CHECK-NEXT: ('sh_type', 0x00000011) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x0000000c) +// CHECK-NEXT: ('sh_link', 0x0000000c) +// CHECK-NEXT: ('sh_info', 0x00000001) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000004) +// CHECK-NEXT: ), +// CHECK-NEXT: # Section 0x00000002 +// CHECK-NEXT: (('sh_name', 0x00000026) # '.group' +// CHECK-NEXT: ('sh_type', 0x00000011) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x0000004c) +// CHECK-NEXT: ('sh_size', 0x00000008) +// CHECK-NEXT: ('sh_link', 0x0000000c) +// CHECK-NEXT: ('sh_info', 0x00000002) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000004) +// CHECK-NEXT: ), +// CHECK-NEXT: # Section 0x00000003 +// CHECK-NEXT: (('sh_name', 0x00000026) # '.group' +// CHECK-NEXT: ('sh_type', 0x00000011) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000054) +// CHECK-NEXT: ('sh_size', 0x00000008) +// CHECK-NEXT: ('sh_link', 0x0000000c) +// CHECK-NEXT: ('sh_info', 0x0000000d) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000004) +// CHECK-NEXT: ), + +// Test that g1 and g2 are local, but g3 is an undefined global. + +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000001) # 'g1' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000007) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x00000004) # 'g2' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000002) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + +// CHECK: # Symbol 0x0000000d +// CHECK-NEXT: (('st_name', 0x00000007) # 'g3' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + + + .section .foo,"axG",@progbits,g1,comdat +g1: + nop + + .section .bar,"axG",@progbits,g1,comdat + nop + + .section .zed,"axG",@progbits,g2,comdat + nop + + .section .baz,"axG",@progbits,g3,comdat + .long g3 diff --git a/test/MC/ELF/common.s b/test/MC/ELF/common.s new file mode 100644 index 000000000000..16b677b9e880 --- /dev/null +++ b/test/MC/ELF/common.s @@ -0,0 +1,88 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + + + .text + +// Test that this produces a regular local symbol. + .type common1,@object + .local common1 + .comm common1,1,1 + +// CHECK: ('st_name', 0x00000001) # 'common1' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000001) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000001) + + +// Same as common1, but with directives in a different order. + .local common2 + .type common2,@object + .comm common2,1,1 + +// CHECK: ('st_name', 0x00000009) # 'common2' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000001) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', +// CHECK-NEXT: ('st_value', 0x0000000000000001) +// CHECK-NEXT: ('st_size', 0x0000000000000001) + + .local common6 + .comm common6,8,16 + +// CHECK: # Symbol 0x00000003 +// CHECK-NEXT: (('st_name', 0x00000011) # 'common6' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000001) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000003) +// CHECK-NEXT: ('st_value', 0x0000000000000010) +// CHECK-NEXT: ('st_size', 0x0000000000000008) +// CHECK-NEXT: ), + +// Test that without an explicit .local we produce a global. + .type common3,@object + .comm common3,4,4 + +// CHECK: ('st_name', 0x00000019) # 'common3' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000001) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x0000fff2) +// CHECK-NEXT: ('st_value', 0x0000000000000004) +// CHECK-NEXT: ('st_size', 0x0000000000000004) + + +// Test that without an explicit .local we produce a global, even if the first +// occurrence is not in a directive. + .globl foo + .type foo,@function +foo: + movsbl common4+3(%rip), %eax + + + .type common4,@object + .comm common4,40,16 + +// CHECK: ('st_name', 0x00000025) # 'common4' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000001) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x0000fff2) +// CHECK-NEXT: ('st_value', 0x0000000000000010) +// CHECK-NEXT: ('st_size', 0x0000000000000028) + + .comm common5,4,4 + +// CHECK: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x0000002d) # 'common5' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000001) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x0000fff2) +// CHECK-NEXT: ('st_value', 0x0000000000000004) +// CHECK-NEXT: ('st_size', 0x0000000000000004) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/common2.s b/test/MC/ELF/common2.s new file mode 100644 index 000000000000..b54cdfe143fb --- /dev/null +++ b/test/MC/ELF/common2.s @@ -0,0 +1,21 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the common symbols are placed at the end of .bss. In this example +// it causes .bss to have size 9 instead of 8. + + .local vimvardict + .comm vimvardict,1,8 + .bss + .zero 1 + .align 8 + +// CHECK: (('sh_name', 0x0000000d) # '.bss' +// CHECK-NEXT: ('sh_type', +// CHECK-NEXT: ('sh_flags' +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', 0x00000009) +// CHECK-NEXT: ('sh_link', +// CHECK-NEXT: ('sh_info', +// CHECK-NEXT: ('sh_addralign', +// CHECK-NEXT: ('sh_entsize', diff --git a/test/MC/ELF/debug-line.s b/test/MC/ELF/debug-line.s new file mode 100644 index 000000000000..2979ca28f1ec --- /dev/null +++ b/test/MC/ELF/debug-line.s @@ -0,0 +1,22 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that .debug_line is populated. + +// CHECK: (('sh_name', 0x00000012) # '.debug_line' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000044) +// CHECK-NEXT: ('sh_size', 0x00000037) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '33000000 02001c00 00000101 fb0e0d00 01010101 00000001 00000100 666f6f2e 63000000 00000009 02000000 00000000 00150204 000101') + + .section .debug_line,"",@progbits + .text + + .file 1 "foo.c" + .loc 1 4 0 + subq $8, %rsp diff --git a/test/MC/ELF/debug-loc.s b/test/MC/ELF/debug-loc.s new file mode 100644 index 000000000000..36ae485ef062 --- /dev/null +++ b/test/MC/ELF/debug-loc.s @@ -0,0 +1,32 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that we don't regress on the size of the line info section. We used +// to handle negative line diffs incorrectly which manifested as very +// large integers being passed to DW_LNS_advance_line. + +// FIXME: This size is the same as gnu as, but we can probably do a bit better. +// FIXME2: We need a debug_line dumper so that we can test the actual contents. + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.debug_line' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000044) +// CHECK-NEXT: ('sh_size', 0x0000003d) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), + + .section .debug_line,"",@progbits + .text +foo: + .file 1 "Driver.ii" + .loc 1 2 0 + nop + .loc 1 4 0 + nop + .loc 1 3 0 + nop diff --git a/test/MC/ELF/dg.exp b/test/MC/ELF/dg.exp index 7b7bd4e73807..d46d700975e5 100644 --- a/test/MC/ELF/dg.exp +++ b/test/MC/ELF/dg.exp @@ -1,5 +1,5 @@ load_lib llvm.exp if { [llvm_supports_target X86] } { - RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll}]] + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,s}]] } diff --git a/test/MC/ELF/diff.s b/test/MC/ELF/diff.s new file mode 100644 index 000000000000..1879a39e8b9a --- /dev/null +++ b/test/MC/ELF/diff.s @@ -0,0 +1,15 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .global zed +foo: + nop +bar: + nop +zed: + mov zed+(bar-foo), %eax + +// CHECK: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000005) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x0000000b) +// CHECK-NEXT: ('r_addend', 0x00000001) diff --git a/test/MC/ELF/diff2.s b/test/MC/ELF/diff2.s new file mode 100644 index 000000000000..4a9fbd1d83a7 --- /dev/null +++ b/test/MC/ELF/diff2.s @@ -0,0 +1,13 @@ +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s 2> %t +// RUN: FileCheck -input-file %t %s + +.global zed + .data +foo: + .text + nop +bar: + nop +zed: +// CHECK: expected relocatable expression + mov zed+(bar-foo), %eax diff --git a/test/MC/AsmParser/ELF/directive_previous.s b/test/MC/ELF/elf_directive_previous.s index 5db1eac03d39..5db1eac03d39 100644 --- a/test/MC/AsmParser/ELF/directive_previous.s +++ b/test/MC/ELF/elf_directive_previous.s diff --git a/test/MC/AsmParser/ELF/directive_section.s b/test/MC/ELF/elf_directive_section.s index 9531c026e674..9531c026e674 100644 --- a/test/MC/AsmParser/ELF/directive_section.s +++ b/test/MC/ELF/elf_directive_section.s diff --git a/test/MC/ELF/empty-dwarf-lines.s b/test/MC/ELF/empty-dwarf-lines.s new file mode 100644 index 000000000000..0f791ae2aa3e --- /dev/null +++ b/test/MC/ELF/empty-dwarf-lines.s @@ -0,0 +1,21 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the dwarf debug_line section contains no line directives. + + .file 1 "test.c" + .globl c +c: + .asciz "hi\n" + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.debug_line' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000044) +// CHECK-NEXT: ('sh_size', 0x00000027) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/empty.s b/test/MC/ELF/empty.s new file mode 100644 index 000000000000..e351936b901f --- /dev/null +++ b/test/MC/ELF/empty.s @@ -0,0 +1,70 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that like gnu as we create text, data and bss by default. Also test +// that shstrtab, symtab and strtab are listed in that order. + +// CHECK: ('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) + +// CHECK: ('sh_name', 0x00000007) # '.data' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000003) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) + +// CHECK: ('sh_name', 0x0000000d) # '.bss' +// CHECK-NEXT: ('sh_type', 0x00000008) +// CHECK-NEXT: ('sh_flags', 0x00000003) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) + +// CHECK: ('sh_name', 0x00000012) # '.shstrtab' +// CHECK-NEXT: ('sh_type', 0x00000003) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x0000002c) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) + +// CHECK: ('sh_name', 0x0000001c) # '.symtab' +// CHECK-NEXT: ('sh_type', 0x00000002) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', 0x00000060) +// CHECK-NEXT: ('sh_link', 0x00000006) +// CHECK-NEXT: ('sh_info', 0x00000004) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) + +// CHECK: ('sh_name', 0x00000024) # '.strtab' +// CHECK-NEXT: ('sh_type', 0x00000003) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', 0x00000001) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) diff --git a/test/MC/ELF/entsize.ll b/test/MC/ELF/entsize.ll new file mode 100644 index 000000000000..21179dfda9a3 --- /dev/null +++ b/test/MC/ELF/entsize.ll @@ -0,0 +1,44 @@ +; RUN: llc -filetype=obj -mtriple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck -check-prefix=64 %s + +; Test that constant mergeable strings have sh_entsize set. + +@.str1 = private unnamed_addr constant [6 x i8] c"tring\00" +@.str2 = private unnamed_addr constant [7 x i8] c"String\00" +@.c8a = private unnamed_addr constant [1 x i64] [i64 42] +@.c8b = private unnamed_addr constant [1 x i64] [i64 42] + +define i32 @main() nounwind { + %1 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) + %2 = call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @.str2, i32 0, i32 0)) + call void @foo(i64* getelementptr inbounds ([1 x i64]* @.c8a, i32 0, i32 0)) + call void @foo(i64* getelementptr inbounds ([1 x i64]* @.c8b, i32 0, i32 0)) + ret i32 0 +} + +declare i32 @puts(i8* nocapture) nounwind +declare void @foo(i64* nocapture) nounwind + +;;;;; + +; 64: (('sh_name', 0x00000012) # '.rodata.str1.1' +; 64-NEXT: ('sh_type', 0x00000001) +; 64-NEXT: ('sh_flags', 0x00000032) +; 64-NEXT: ('sh_addr', +; 64-NEXT: ('sh_offset', +; 64-NEXT: ('sh_size', 0x0000000d) +; 64-NEXT: ('sh_link', +; 64-NEXT: ('sh_info', +; 64-NEXT: ('sh_addralign', 0x00000001) +; 64-NEXT: ('sh_entsize', 0x00000001) + +; 64: (('sh_name', 0x00000021) # '.rodata.cst8' +; 64-NEXT: ('sh_type', 0x00000001) +; 64-NEXT: ('sh_flags', 0x00000012) +; 64-NEXT: ('sh_addr', +; 64-NEXT: ('sh_offset', +; 64-NEXT: ('sh_size', 0x00000010) +; 64-NEXT: ('sh_link', +; 64-NEXT: ('sh_info', +; 64-NEXT: ('sh_addralign', 0x00000008) +; 64-NEXT: ('sh_entsize', 0x00000008) + diff --git a/test/MC/ELF/entsize.s b/test/MC/ELF/entsize.s new file mode 100644 index 000000000000..e8eb62eb2ea5 --- /dev/null +++ b/test/MC/ELF/entsize.s @@ -0,0 +1,69 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that mergeable constants have sh_entsize set. + +// 1 byte strings + .section .rodata.str1.1,"aMS",@progbits,1 + + .type .L.str1,@object # @.str1 +.L.str1: + .asciz "tring" + .size .L.str1, 6 + + .type .L.str2,@object # @.str2 +.L.str2: + .asciz "String" + .size .L.str2, 7 + +// 2 byte strings + .section .rodata.str2.1,"aMS",@progbits,2 + .type .L.str3,@object # @.str3 +.L.str3: + .asciz "L\000o\000n\000g\000" + .size .L.str3, 9 + + .type .L.str4,@object # @.str4 +.L.str4: + .asciz "o\000n\000g\000" + .size .L.str4, 7 + + // 8 byte constants + .section .rodata.cst8,"aM",@progbits,8 + .quad 42 + .quad 42 + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: ('sh_name', 0x00000012) # '.rodata.str1.1' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000032) +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', 0x0000000d) +// CHECK-NEXT: ('sh_link', +// CHECK-NEXT: ('sh_info', +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000001) + +// CHECK: # Section 0x00000005 +// CHECK-NEXT: ('sh_name', 0x00000021) # '.rodata.str2.1' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000032) +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', 0x00000010) +// CHECK-NEXT: ('sh_link', +// CHECK-NEXT: ('sh_info', +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000002) + +// CHECK: # Section 0x00000006 +// CHECK-NEXT: ('sh_name', 0x00000030) # '.rodata.cst8 +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000012) +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', 0x00000010) +// CHECK-NEXT: ('sh_link', +// CHECK-NEXT: ('sh_info', +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000008) diff --git a/test/MC/ELF/file.s b/test/MC/ELF/file.s new file mode 100644 index 000000000000..d8ccbe6e5aee --- /dev/null +++ b/test/MC/ELF/file.s @@ -0,0 +1,23 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the STT_FILE symbol precedes the other local symbols. + +.file "foo" +foa: +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000004) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x0000fff1) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x00000005) # 'foa' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) diff --git a/test/MC/ELF/global-offset.s b/test/MC/ELF/global-offset.s new file mode 100644 index 000000000000..aa6328760d44 --- /dev/null +++ b/test/MC/ELF/global-offset.s @@ -0,0 +1,18 @@ +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// We test that _GLOBAL_OFFSET_TABLE_ will account for the two bytes at the +// start of the addl. + + addl $_GLOBAL_OFFSET_TABLE_, %ebx + +// CHECK: ('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', +// CHECK-NEXT: ('sh_flags', +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset', +// CHECK-NEXT: ('sh_size', +// CHECK-NEXT: ('sh_link', +// CHECK-NEXT: ('sh_info', +// CHECK-NEXT: ('sh_addralign', +// CHECK-NEXT: ('sh_entsize', +// CHECK-NEXT: ('_section_data', '81c30200 0000') diff --git a/test/MC/ELF/got.s b/test/MC/ELF/got.s new file mode 100644 index 000000000000..798150e0f5f9 --- /dev/null +++ b/test/MC/ELF/got.s @@ -0,0 +1,25 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that this produces a R_X86_64_GOT32 and that we have an undefined +// reference to _GLOBAL_OFFSET_TABLE_. + + movl foo@GOT, %eax + movl foo@GOTPCREL(%rip), %eax + +// CHECK: (('st_name', 0x00000005) # '_GLOBAL_OFFSET_TABLE_' +// CHECK-NEXT: ('st_bind', 0x00000001) + +// CHECK: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', +// CHECK-NEXT: ('r_type', 0x00000003) +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', +// CHECK-NEXT: ('r_type', 0x00000009) +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/ELF/ident.s b/test/MC/ELF/ident.s new file mode 100644 index 000000000000..f79458f34501 --- /dev/null +++ b/test/MC/ELF/ident.s @@ -0,0 +1,17 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// CHECK: (('sh_name', 0x00000012) # '.comment' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000030) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x0000000d) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000001) +// CHECK-NEXT: ('_section_data', '00666f6f 00626172 007a6564 00') + + .ident "foo" + .ident "bar" + .ident "zed" diff --git a/test/MC/ELF/invalid-symver.s b/test/MC/ELF/invalid-symver.s new file mode 100644 index 000000000000..3c4f8c084b94 --- /dev/null +++ b/test/MC/ELF/invalid-symver.s @@ -0,0 +1,7 @@ +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t 2> %t.out +// RUN: FileCheck --input-file=%t.out %s + +// CHECK: A @@ version cannot be undefined + + .symver undefined, foo@@bar + .long undefined diff --git a/test/MC/ELF/leb128.s b/test/MC/ELF/leb128.s new file mode 100644 index 000000000000..e5f31f4834dd --- /dev/null +++ b/test/MC/ELF/leb128.s @@ -0,0 +1,19 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + + .sleb128 .Lfoo - .Lbar +.Lfoo: + .uleb128 .Lbar - .Lfoo + .fill 126, 1, 0x90 +.Lbar: + +// CHECK: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000081) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '817f7f90 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90') diff --git a/test/MC/ELF/local-reloc.s b/test/MC/ELF/local-reloc.s new file mode 100644 index 000000000000..c2b477188cb2 --- /dev/null +++ b/test/MC/ELF/local-reloc.s @@ -0,0 +1,31 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that relocations with local symbols are represented as relocations +// with the section. They should be equivalent, but gas behaves like this. + + movl foo, %r14d +foo: + +// Section number 1 is .text +// CHECK: # Section 0x00000001 +// CHECK-next: (('sh_name', 0x00000001) # '.text' + +// Symbol number 2 is section number 1 +// CHECK: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) + +// Relocation refers to symbol number 2 +// CHECK: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/ELF/merge.s b/test/MC/ELF/merge.s new file mode 100644 index 000000000000..ec0222890071 --- /dev/null +++ b/test/MC/ELF/merge.s @@ -0,0 +1,97 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that PIC relocations with local symbols in a mergeable section are done +// with a reference to the symbol. Not sure if this is a linker limitation, +// but this matches the behavior of gas. + +// Non-PIC relocations with 0 offset don't use the symbol. + + + movsd .Lfoo(%rip), %xmm1 + movl $.Lfoo, %edi + movl $.Lfoo+2, %edi + jmp foo@PLT + movq foo@GOTPCREL, %rax + movq zed, %rax + + .section .sec1,"aM",@progbits,16 +.Lfoo: +zed: + .global zed + + .section bar,"ax",@progbits +foo: + +// Section 4 is "sec1" +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.sec1' + +// Symbol number 1 is .Lfoo +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000001) # '.Lfoo' + +// Symbol number 2 is foo +// CHECK: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x00000007) # 'foo' + +// Symbol number 6 is section 4 +// CHECK: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) + +// Symbol number 8 is zed +// CHECK: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x0000000b) # 'zed' + +// Relocation 0 refers to symbol 1 +// CHECK: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', 0x00000001) +// CHECK-NEXT: ('r_type', 0x00000002 +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), + +// Relocation 1 refers to symbol 6 +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), + +// Relocation 2 refers to symbol 1 +// CHECK-NEXT: # Relocation 0x00000002 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', 0x00000001) +// CHECK-NEXT: ('r_type', 0x0000000a +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), + +// Relocation 3 refers to symbol 2 +// CHECK-NEXT: # Relocation 0x00000003 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000004 +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), + +// Relocation 4 refers to symbol 2 +// CHECK-NEXT: # Relocation 0x00000004 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x00000009 +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), + +// Relocation 5 refers to symbol 8 +// CHECK-NEXT: # Relocation 0x00000005 +// CHECK-NEXT: (('r_offset', 0x00000023) +// CHECK-NEXT: ('r_sym', 0x00000008) +// CHECK-NEXT: ('r_type', 0x0000000b) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/ELF/n_bytes.s b/test/MC/ELF/n_bytes.s new file mode 100644 index 000000000000..59d67bfa71f5 --- /dev/null +++ b/test/MC/ELF/n_bytes.s @@ -0,0 +1,20 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + + .2byte 42, 1, 2, 3 + .4byte 42, 1, 2, 3 + .8byte 42, 1, 2, 3 + .int 42, 1, 2, 3 + +// CHECK: # Section 0x00000001 +// CHECK-NEXT: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000048) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', '2a000100 02000300 2a000000 01000000 02000000 03000000 2a000000 00000000 01000000 00000000 02000000 00000000 03000000 00000000 2a000000 01000000 02000000 03000000') +// CHECK-NEXT: ), diff --git a/test/MC/ELF/no-fixup.s b/test/MC/ELF/no-fixup.s new file mode 100644 index 000000000000..6e719bcc8c11 --- /dev/null +++ b/test/MC/ELF/no-fixup.s @@ -0,0 +1,16 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t -stats 2>%t.out +// RUN: FileCheck --input-file=%t.out %s + +// Test that we create no fixups for this file since "a" and "b" are in the +// same fragment. + +// CHECK: assembler - Number of assembler layout and relaxation steps +// CHECK-NEXT: assembler - Number of emitted assembler fragments +// CHECK-NEXT: assembler - Number of emitted object file bytes +// CHECK-NEXT: assembler - Number of fragment layouts +// CHECK-NEXT: mcexpr - Number of MCExpr evaluations + +a: + nop +b: + .long b - a diff --git a/test/MC/ELF/noexec.s b/test/MC/ELF/noexec.s new file mode 100644 index 000000000000..87b6f3aa85b8 --- /dev/null +++ b/test/MC/ELF/noexec.s @@ -0,0 +1,24 @@ +// RUN: llvm-mc -mc-no-exec-stack -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// CHECK: # Section 0x00000004 +// CHECK-NEXT: (('sh_name', 0x00000012) # '.note.GNU-stack' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), + +// CHECK: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/norelocation.s b/test/MC/ELF/norelocation.s new file mode 100644 index 000000000000..0a0efe1ed6d6 --- /dev/null +++ b/test/MC/ELF/norelocation.s @@ -0,0 +1,18 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + + call bar +bar: + +// CHECK: ('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000005) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', 'e8000000 00') +// CHECK-NOT: .rela.text +// CHECK: shstrtab diff --git a/test/MC/ELF/pic-diff.s b/test/MC/ELF/pic-diff.s new file mode 100644 index 000000000000..d1fc909dba8a --- /dev/null +++ b/test/MC/ELF/pic-diff.s @@ -0,0 +1,29 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// CHECK: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000005) # 'baz' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + +// CHECK: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x0000000c) +// CHECK-NEXT: ('r_sym', 0x00000005) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000008) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) + +.zero 4 +.data + +.zero 1 +.align 4 +foo: +.zero 8 +.long baz - foo diff --git a/test/MC/ELF/plt.s b/test/MC/ELF/plt.s new file mode 100644 index 000000000000..7d0073c400d6 --- /dev/null +++ b/test/MC/ELF/plt.s @@ -0,0 +1,14 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that this produces a R_X86_64_PLT32. + + jmp foo@PLT + +// CHECK: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', +// CHECK-NEXT: ('r_type', 0x00000004) +// CHECK-NEXT: ('r_addend', +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/ELF/relax-arith.s b/test/MC/ELF/relax-arith.s new file mode 100644 index 000000000000..3236b41e532c --- /dev/null +++ b/test/MC/ELF/relax-arith.s @@ -0,0 +1,75 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we correctly relax these instructions into versions that use +// 16 or 32 bit immediate values. + +bar: +// CHECK: 'imul' +// CHECK: ('_section_data', '6669db00 0066691c 25000000 00000069 db000000 00691c25 00000000 00000000 4869db00 00000048 691c2500 00000000 000000') + .section imul + imul $foo, %bx, %bx + imul $foo, bar, %bx + imul $foo, %ebx, %ebx + imul $foo, bar, %ebx + imul $foo, %rbx, %rbx + imul $foo, bar, %rbx + +// CHECK: and' +// CHECK:('_section_data', '6681e300 00668124 25000000 00000081 e3000000 00812425 00000000 00000000 4881e300 00000048 81242500 00000000 000000') + .section and + and $foo, %bx + andw $foo, bar + and $foo, %ebx + andl $foo, bar + and $foo, %rbx + andq $foo, bar + +// CHECK: 'or' +// CHECK: ('_section_data', '6681cb00 0066810c 25000000 00000081 cb000000 00810c25 00000000 00000000 4881cb00 00000048 810c2500 00000000 000000') + .section or + or $foo, %bx + orw $foo, bar + or $foo, %ebx + orl $foo, bar + or $foo, %rbx + orq $foo, bar + +// CHECK: 'xor' +// CHECK: ('_section_data', '6681f300 00668134 25000000 00000081 f3000000 00813425 00000000 00000000 4881f300 00000048 81342500 00000000 000000') + .section xor + xor $foo, %bx + xorw $foo, bar + xor $foo, %ebx + xorl $foo, bar + xor $foo, %rbx + xorq $foo, bar + +// CHECK: 'add' +// CHECK: ('_section_data', '6681c300 00668104 25000000 00000081 c3000000 00810425 00000000 00000000 4881c300 00000048 81042500 00000000 000000') + .section add + add $foo, %bx + addw $foo, bar + add $foo, %ebx + addl $foo, bar + add $foo, %rbx + addq $foo, bar + +// CHECK: 'sub' +// CHECK: ('_section_data', '6681eb00 0066812c 25000000 00000081 eb000000 00812c25 00000000 00000000 4881eb00 00000048 812c2500 00000000 000000') + .section sub + sub $foo, %bx + subw $foo, bar + sub $foo, %ebx + subl $foo, bar + sub $foo, %rbx + subq $foo, bar + +// CHECK: 'cmp' +// CHECK: ('_section_data', '6681fb00 0066813c 25000000 00000081 fb000000 00813c25 00000000 00000000 4881fb00 00000048 813c2500 00000000 000000') + .section cmp + cmp $foo, %bx + cmpw $foo, bar + cmp $foo, %ebx + cmpl $foo, bar + cmp $foo, %rbx + cmpq $foo, bar diff --git a/test/MC/ELF/relax-crash.s b/test/MC/ELF/relax-crash.s new file mode 100644 index 000000000000..442825db81a2 --- /dev/null +++ b/test/MC/ELF/relax-crash.s @@ -0,0 +1,11 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t + +// This is a test that we don't crash. We used to do so by going in a infinite +// recursion trying to compute the size of a MCDwarfLineAddrFragment. + + .section .debug_line,"",@progbits + .text + .file 1 "Disassembler.ii" + .section foo + .loc 1 1 0 + ret diff --git a/test/MC/ELF/relax.s b/test/MC/ELF/relax.s new file mode 100644 index 000000000000..2c0e285db597 --- /dev/null +++ b/test/MC/ELF/relax.s @@ -0,0 +1,27 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we do not relax these. + +bar: +.globl foo +foo: + .set zed,foo + + jmp bar + jmp foo + jmp zed + +// CHECK: ('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000006) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ('_section_data', 'ebfeebfc ebfa') + +// CHECK: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000005) # 'foo' diff --git a/test/MC/ELF/relocation-386.s b/test/MC/ELF/relocation-386.s new file mode 100644 index 000000000000..f106f89b7083 --- /dev/null +++ b/test/MC/ELF/relocation-386.s @@ -0,0 +1,226 @@ +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that we produce the correct relocation types and that the relocations +// correctly point to the section or the symbol. + +// Section 3 is bss +// CHECK: # Section 0x00000003 +// CHECK-NEXT: (('sh_name', 0x0000000d) # '.bss' + +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000005) # '.Lfoo' + +// Symbol 4 is zed +// CHECK: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000035) # 'zed' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) + +// Symbol 7 is section 3 +// CHECK: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000003) + +// CHECK: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000002) +// CHECK-NEXT: ('r_sym', 0x00000001) +// CHECK-NEXT: ('r_type', 0x00000009) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', +// CHECK-NEXT: ('r_type', 0x00000004) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000002 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ), + +// Relocation 3 (bar3@GOTOFF) is done with symbol 7 (bss) +// CHECK-NEXT: # Relocation 0x00000003 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', 0x00000007 +// CHECK-NEXT: ('r_type', +// CHECK-NEXT: ), + +// Relocation 4 (bar2@GOT) is of type R_386_GOT32 +// CHECK-NEXT: # Relocation 0x00000004 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', +// CHECK-NEXT: ('r_type', 0x00000003 +// CHECK-NEXT: ), + +// Relocation 5 (foo@TLSGD) is of type R_386_TLS_GD +// CHECK-NEXT: # Relocation 0x00000005 +// CHECK-NEXT: (('r_offset', 0x00000020) +// CHECK-NEXT: ('r_sym', 0x0000000d) +// CHECK-NEXT: ('r_type', 0x00000012) +// CHECK-NEXT: ), + +// Relocation 6 ($foo@TPOFF) is of type R_386_TLS_LE_32 +// CHECK-NEXT: # Relocation 0x00000006 +// CHECK-NEXT: (('r_offset', 0x00000025) +// CHECK-NEXT: ('r_sym', 0x0000000d) +// CHECK-NEXT: ('r_type', 0x00000022) +// CHECK-NEXT: ), + +// Relocation 7 (foo@INDNTPOFF) is of type R_386_TLS_IE +// CHECK-NEXT: # Relocation 0x00000007 +// CHECK-NEXT: (('r_offset', 0x0000002b) +// CHECK-NEXT: ('r_sym', 0x0000000d) +// CHECK-NEXT: ('r_type', 0x0000000f) +// CHECK-NEXT: ), + +// Relocation 8 (foo@NTPOFF) is of type R_386_TLS_LE +// CHECK-NEXT: # Relocation 0x00000008 +// CHECK-NEXT: (('r_offset', 0x00000031) +// CHECK-NEXT: ('r_sym', 0x0000000d) +// CHECK-NEXT: ('r_type', 0x00000011) +// CHECK-NEXT: ), + +// Relocation 9 (foo@GOTNTPOFF) is of type R_386_TLS_GOTIE +// CHECK-NEXT: # Relocation 0x00000009 +// CHECK-NEXT: (('r_offset', 0x00000037) +// CHECK-NEXT: ('r_sym', 0x0000000d) +// CHECK-NEXT: ('r_type', 0x00000010) +// CHECK-NEXT: ), + +// Relocation 10 (foo@TLSLDM) is of type R_386_TLS_LDM +// CHECK-NEXT: # Relocation 0x0000000a +// CHECK-NEXT: (('r_offset', 0x0000003d) +// CHECK-NEXT: ('r_sym', 0x0000000d) +// CHECK-NEXT: ('r_type', 0x00000013) +// CHECK-NEXT: ), + +// Relocation 11 (foo@DTPOFF) is of type R_386_TLS_LDO_32 +// CHECK-NEXT: # Relocation 0x0000000b +// CHECK-NEXT: (('r_offset', 0x00000043) +// CHECK-NEXT: ('r_sym', 0x0000000d) +// CHECK-NEXT: ('r_type', 0x00000020) +// CHECK-NEXT: ), +// Relocation 12 (calll 4096) is of type R_386_PC32 +// CHECK-NEXT: # Relocation 0x0000000c +// CHECK-NEXT: (('r_offset', 0x00000048) +// CHECK-NEXT: ('r_sym', 0x00000000) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ), +// Relocation 13 (zed@GOT) is of type R_386_GOT32 and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000d +// CHECK-NEXT: (('r_offset', 0x0000004e) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000003) +// CHECK-NEXT: ), +// Relocation 14 (zed@GOTOFF) is of type R_386_GOTOFF and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000e +// CHECK-NEXT: (('r_offset', 0x00000054) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000009) +// CHECK-NEXT: ), +// Relocation 15 (zed@INDNTPOFF) is of type R_386_TLS_IE and uses the symbol +// CHECK-NEXT: # Relocation 0x0000000f +// CHECK-NEXT: (('r_offset', 0x0000005a) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x0000000f) +// CHECK-NEXT: ), +// Relocation 16 (zed@NTPOFF) is of type R_386_TLS_LE and uses the symbol +// CHECK-NEXT: # Relocation 0x00000010 +// CHECK-NEXT: (('r_offset', 0x00000060) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000011) +// CHECK-NEXT: ), +// Relocation 17 (zed@GOTNTPOFF) is of type R_386_TLS_GOTIE and uses the symbol +// CHECK-NEXT: # Relocation 0x00000011 +// CHECK-NEXT: (('r_offset', 0x00000066) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000010) +// CHECK-NEXT: ), +// Relocation 18 (zed@PLT) is of type R_386_PLT32 and uses the symbol +// CHECK-NEXT: # Relocation 0x00000012 +// CHECK-NEXT: (('r_offset', 0x0000006b) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000004) +// CHECK-NEXT: ), +// Relocation 19 (zed@TLSGD) is of type R_386_TLS_GD and uses the symbol +// CHECK-NEXT: # Relocation 0x00000013 +// CHECK-NEXT: (('r_offset', 0x00000071) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000012) +// CHECK-NEXT: ), +// Relocation 20 (zed@TLSLDM) is of type R_386_TLS_LDM and uses the symbol +// CHECK-NEXT: # Relocation 0x00000014 +// CHECK-NEXT: (('r_offset', 0x00000077) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000013) +// CHECK-NEXT: ), +// Relocation 21 (zed@TPOFF) is of type R_386_TLS_LE_32 and uses the symbol +// CHECK-NEXT:# Relocation 0x00000015 +// CHECK-NEXT: (('r_offset', 0x0000007d) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000022) +// CHECK-NEXT: ), +// Relocation 22 (zed@DTPOFF) is of type R_386_TLS_LDO_32 and uses the symbol +// CHECK-NEXT: Relocation 0x00000016 +// CHECK-NEXT: (('r_offset', 0x00000083) +// CHECK-NEXT: ('r_sym', 0x00000004) +// CHECK-NEXT: ('r_type', 0x00000020) +// CHECK-NEXT: ), +// Relocation 23 ($bar) is of type R_386_32 and uses the section +// CHECK-NEXT: Relocation 0x00000017 +// CHECK-NEXT: (('r_offset', +// CHECK-NEXT: ('r_sym', +// CHECK-NEXT: ('r_type', 0x00000001) +// CHECK-NEXT: ), + + .text +bar: + leal .Lfoo@GOTOFF(%ebx), %eax + + .global bar2 +bar2: + calll bar2@PLT + addl $_GLOBAL_OFFSET_TABLE_, %ebx + movb bar3@GOTOFF(%ebx), %al + + .type bar3,@object + .local bar3 + .comm bar3,1,1 + + movl bar2j@GOT(%eax), %eax + + leal foo@TLSGD(, %ebx,1), %eax + movl $foo@TPOFF, %edx + movl foo@INDNTPOFF, %ecx + addl foo@NTPOFF(%eax), %eax + addl foo@GOTNTPOFF(%ebx), %ecx + leal foo@TLSLDM(%ebx), %eax + leal foo@DTPOFF(%eax), %edx + calll 4096 + movl zed@GOT(%eax), %eax + movl zed@GOTOFF(%eax), %eax + movl zed@INDNTPOFF(%eax), %eax + movl zed@NTPOFF(%eax), %eax + movl zed@GOTNTPOFF(%eax), %eax + call zed@PLT + movl zed@TLSGD(%eax), %eax + movl zed@TLSLDM(%eax), %eax + movl zed@TPOFF(%eax), %eax + movl zed@DTPOFF(%eax), %eax + pushl $bar + + .section zedsec,"awT",@progbits +zed: + .long 0 + + .section .rodata.str1.16,"aMS",@progbits,1 +.Lfoo: + .asciz "bool llvm::llvm_start_multithreaded()" diff --git a/test/MC/ELF/relocation.s b/test/MC/ELF/relocation.s new file mode 100644 index 000000000000..dabe721d90bc --- /dev/null +++ b/test/MC/ELF/relocation.s @@ -0,0 +1,114 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we produce the correct relocation. + +bar: + movl $bar, %edx # R_X86_64_32 + movq $bar, %rdx # R_X86_64_32S + movq $bar, bar(%rip) # R_X86_64_32S + movl bar, %edx # R_X86_64_32S + movq bar, %rdx # R_X86_64_32S +.long bar # R_X86_64_32 + leaq foo@GOTTPOFF(%rip), %rax # R_X86_64_GOTTPOFF + leaq foo@TLSGD(%rip), %rax # R_X86_64_TLSGD + leaq foo@TPOFF(%rax), %rax # R_X86_64_TPOFF32 + leaq foo@TLSLD(%rip), %rdi # R_X86_64_TLSLD + leaq foo@dtpoff(%rax), %rcx # R_X86_64_DTPOFF32 + pushq $bar + movq foo(%rip), %rdx + leaq foo-bar(%r14),%r14 + + +// CHECK: # Section 0x00000001 +// CHECK: (('sh_name', 0x00000001) # '.text' + +// CHECK: # Symbol 0x00000002 +// CHECK: (('st_name', 0x00000000) # '' +// CHECK: ('st_bind', 0x00000000) +// CHECK: ('st_type', 0x00000003) +// CHECK: ('st_other', 0x00000000) +// CHECK: ('st_shndx', 0x00000001) + +// CHECK: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000001) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', + +// CHECK: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000008) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000b) +// CHECK-NEXT: ('r_addend', + +// CHECK: # Relocation 0x00000002 +// CHECK-NEXT: (('r_offset', 0x00000013) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000b) +// CHECK-NEXT: ('r_addend', + +// CHECK: # Relocation 0x00000003 +// CHECK-NEXT: (('r_offset', 0x0000001a) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000b) +// CHECK-NEXT: ('r_addend', + +// CHECK: # Relocation 0x00000004 +// CHECK-NEXT: (('r_offset', 0x00000022) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000b) +// CHECK-NEXT: ('r_addend', + +// CHECK: # Relocation 0x00000005 +// CHECK-NEXT: (('r_offset', 0x00000026) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', + +// CHECK: # Relocation 0x00000006 +// CHECK-NEXT: (('r_offset', 0x0000002d) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000016) +// CHECK-NEXT: ('r_addend', 0xfffffffc) + +// CHECK: # Relocation 0x00000007 +// CHECK-NEXT: (('r_offset', 0x00000034) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000013) +// CHECK-NEXT: ('r_addend', 0xfffffffc) + +// CHECK: # Relocation 0x00000008 +// CHECK-NEXT: (('r_offset', 0x0000003b) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000017) +// CHECK-NEXT: ('r_addend', 0x00000000) + +// CHECK: # Relocation 0x00000009 +// CHECK-NEXT: (('r_offset', 0x00000042) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000014) +// CHECK-NEXT: ('r_addend', 0xfffffffc) + +// CHECK: # Relocation 0x0000000a +// CHECK-NEXT: (('r_offset', 0x00000049) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000015) +// CHECK-NEXT: ('r_addend', 0x00000000) + +// CHECK: # Relocation 0x0000000b +// CHECK-NEXT: (('r_offset', 0x0000004e) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000b) +// CHECK-NEXT: ('r_addend', 0x00000000) + +// CHECK: # Relocation 0x0000000c +// CHECK-NEXT: (('r_offset', 0x00000055) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0xfffffffc) + +// CHECK: # Relocation 0x0000000d +// CHECK-NEXT: (('r_offset', 0x0000005c) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x0000005c) diff --git a/test/MC/ELF/rename.s b/test/MC/ELF/rename.s new file mode 100644 index 000000000000..36065603e784 --- /dev/null +++ b/test/MC/ELF/rename.s @@ -0,0 +1,46 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// When doing a rename, all the checks for where the relocation should go +// should be performed with the original symbol. Only if we decide to relocate +// with the symbol we should then use the renamed one. + +// This is a regression test for a bug where we used bar5@@@zed when deciding +// if we should relocate with the symbol or with the section and we would then +// not produce a relocation with .text. + +defined1: +defined3: + .symver defined3, bar5@@@zed + .long defined3 + + .global defined1 + +// Section 1 is .text +// CHECK: # Section 0x00000001 +// CHECK-NEXT: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000040) +// CHECK-NEXT: ('sh_size', 0x00000004) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000004) +// CHECK-NEXT: ('sh_entsize', 0x00000000) + +// Symbol 2 is section 1 +// CHECK: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) + +// The relocation uses symbol 2 +// CHECK: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000000) +// CHECK-NEXT: ('r_sym', 0x00000002) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) diff --git a/test/MC/ELF/section.s b/test/MC/ELF/section.s new file mode 100644 index 000000000000..861dc4f057fe --- /dev/null +++ b/test/MC/ELF/section.s @@ -0,0 +1,110 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that these names are accepted. + +.section .note.GNU-stack,"",@progbits +.section .note.GNU-stack2,"",%progbits +.section .note.GNU-,"",@progbits +.section -.note.GNU,"",@progbits + +// CHECK: ('sh_name', 0x00000012) # '.note.GNU-stack' +// CHECK: ('sh_name', 0x00000022) # '.note.GNU-stack2' +// CHECK: ('sh_name', 0x00000033) # '.note.GNU-' +// CHECK: ('sh_name', 0x0000003e) # '-.note.GNU' + +// Test that the defaults are used + +.section .init +.section .fini +.section .rodata +.section zed, "" + +// CHECK: (('sh_name', 0x00000049) # '.init' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Section 0x0000000b +// CHECK-NEXT: (('sh_name', 0x0000004f) # '.fini' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000006) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Section 0x0000000c +// CHECK-NEXT: (('sh_name', 0x00000055) # '.rodata' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Section 0x0000000d +// CHECK-NEXT: (('sh_name', 0x0000005d) # 'zed' +// CHECK-NEXT: ('sh_type', 0x00000001) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), + +.section .note.test,"",@note +// CHECK: (('sh_name', 0x00000061) # '.note.test' +// CHECK-NEXT: ('sh_type', 0x00000007) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), + +// Test that we can parse these +foo: +bar: +.section .text.foo,"axG",@progbits,foo,comdat +.section .text.bar,"axMG",@progbits,42,bar,comdat + +// Test that the default values are not used + +.section .eh_frame,"a",@unwind + +// CHECK: (('sh_name', 0x00000080) # '.eh_frame' +// CHECK-NEXT: ('sh_type', 0x70000001) +// CHECK-NEXT: ('sh_flags', 0x00000002) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x00000050) +// CHECK-NEXT: ('sh_size', 0x00000000) +// CHECK-NEXT: ('sh_link', 0x00000000) +// CHECK-NEXT: ('sh_info', 0x00000000) +// CHECK-NEXT: ('sh_addralign', 0x00000001) +// CHECK-NEXT: ('sh_entsize', 0x00000000) +// CHECK-NEXT: ), + +// Test that we handle the strings like gas +.section bar-"foo" +.section "foo" + +// CHECK: ('sh_name', 0x0000008a) # 'bar-"foo"' +// CHECK: ('sh_name', 0x00000094) # 'foo' diff --git a/test/MC/ELF/set.s b/test/MC/ELF/set.s new file mode 100644 index 000000000000..69d6c910636f --- /dev/null +++ b/test/MC/ELF/set.s @@ -0,0 +1,34 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we emit the correct value. + +.set kernbase,0xffffffff80000000 + +// CHECK: (('st_name', 0x00000001) # 'kernbase' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x0000fff1) +// CHECK-NEXT: ('st_value', 0xffffffff80000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + +// Test that we accept .set of a symbol after it has been used in a statement. + + jmp foo + .set foo, bar + +// or a .quad + + .quad foo2 + .set foo2,bar2 + +// Test that there is an undefined reference to bar +// CHECK: (('st_name', 0x0000000a) # 'bar' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/sleb.s b/test/MC/ELF/sleb.s new file mode 100644 index 000000000000..00e5b4bf2821 --- /dev/null +++ b/test/MC/ELF/sleb.s @@ -0,0 +1,29 @@ +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_32 %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_64 %s +// RUN: llvm-mc -filetype=obj -triple i386-apple-darwin9 %s -o - | macho-dump --dump-section-data | FileCheck -check-prefix=MACHO_32 %s +// RUN: llvm-mc -filetype=obj -triple x86_64-apple-darwin9 %s -o - | macho-dump --dump-section-data | FileCheck -check-prefix=MACHO_64 %s + + .text +foo: + .sleb128 0 + .sleb128 1 + .sleb128 -1 + .sleb128 63 + .sleb128 -64 + + .sleb128 64 + .sleb128 -65 + + .sleb128 8191 + .sleb128 -8192 + + .sleb128 8193 + +// ELF_32: ('sh_name', 0x00000001) # '.text' +// ELF_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000') +// ELF_64: ('sh_name', 0x00000001) # '.text' +// ELF_64: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000') +// MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// MACHO_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000') +// MACHO_64: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// MACHO_64: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000') diff --git a/test/MC/ELF/symref.s b/test/MC/ELF/symref.s new file mode 100644 index 000000000000..b99e71b869bd --- /dev/null +++ b/test/MC/ELF/symref.s @@ -0,0 +1,165 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +defined1: +defined2: +defined3: + .symver defined1, bar1@zed + .symver undefined1, bar2@zed + + .symver defined2, bar3@@zed + + .symver defined3, bar5@@@zed + .symver undefined3, bar6@@@zed + + .long defined1 + .long undefined1 + .long defined2 + .long defined3 + .long undefined3 + + .global global1 + .symver global1, g1@@zed +global1: + + +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000013) # 'bar1@zed' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x00000025) # 'bar3@@zed' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000003 +// CHECK-NEXT: (('st_name', 0x0000002f) # 'bar5@@zed' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000001) # 'defined1' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x0000000a) # 'defined2' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000002) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000003) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x0000004a) # 'g1@@zed' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000014) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000a +// CHECK-NEXT: (('st_name', 0x00000042) # 'global1' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000014) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000b +// CHECK-NEXT: (('st_name', 0x0000001c) # 'bar2@zed' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000c +// CHECK-NEXT: (('st_name', 0x00000039) # 'bar6@zed' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT:]) + +// CHECK: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000000) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000004) +// CHECK-NEXT: ('r_sym', 0x0000000b) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000002 +// CHECK-NEXT: (('r_offset', 0x00000008) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000003 +// CHECK-NEXT: (('r_offset', 0x0000000c) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000004 +// CHECK-NEXT: (('r_offset', 0x00000010) +// CHECK-NEXT: ('r_sym', 0x0000000c) +// CHECK-NEXT: ('r_type', 0x0000000a) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT:]) diff --git a/test/MC/ELF/tls-i386.s b/test/MC/ELF/tls-i386.s new file mode 100644 index 000000000000..459d4cc69df9 --- /dev/null +++ b/test/MC/ELF/tls-i386.s @@ -0,0 +1,64 @@ +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that all symbols are of type STT_TLS. + + movl foo1@NTPOFF(%eax), %eax + movl foo2@GOTNTPOFF(%eax), %eax + movl foo3@TLSGD(%eax), %eax + movl foo4@TLSLDM(%eax), %eax + movl foo5@TPOFF(%eax), %eax + movl foo6@DTPOFF(%eax), %eax + +// CHECK: (('st_name', 0x00000001) # 'foo1' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000006) # 'foo2' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x0000000b) # 'foo3' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000010) # 'foo4' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x00000015) # 'foo5' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000a +// CHECK-NEXT: (('st_name', 0x0000001a) # 'foo6' +// CHECK-NEXT: ('st_value', 0x00000000) +// CHECK-NEXT: ('st_size', 0x00000000) +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/tls.s b/test/MC/ELF/tls.s new file mode 100644 index 000000000000..2517a5bddc1f --- /dev/null +++ b/test/MC/ELF/tls.s @@ -0,0 +1,48 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that all symbols are of type STT_TLS. + + leaq foo1@TLSGD(%rip), %rdi + leaq foo2@GOTTPOFF(%rip), %rdi + leaq foo3@TLSLD(%rip), %rdi + + .section .zed,"awT",@progbits +foobar: + .long 43 + +// CHECK: (('st_name', 0x00000010) # 'foobar' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000004) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + +// CHECK: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo1' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000006) # 'foo2' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x0000000b) # 'foo3' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000006) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/type.s b/test/MC/ELF/type.s new file mode 100644 index 000000000000..4b98c02e97d5 --- /dev/null +++ b/test/MC/ELF/type.s @@ -0,0 +1,32 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that both % and @ are accepted. + .global foo + .type foo,%function +foo: + + .global bar + .type bar,@object +bar: + +// Test that gnu_unique_object is accepted. + .type zed,@gnu_unique_object + +// CHECK: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000005) # 'bar' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000001) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000002) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/uleb.s b/test/MC/ELF/uleb.s new file mode 100644 index 000000000000..1e4734bcafc6 --- /dev/null +++ b/test/MC/ELF/uleb.s @@ -0,0 +1,22 @@ +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_32 %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_64 %s +// RUN: llvm-mc -filetype=obj -triple i386-apple-darwin9 %s -o - | macho-dump --dump-section-data | FileCheck -check-prefix=MACHO_32 %s +// RUN: llvm-mc -filetype=obj -triple x86_64-apple-darwin9 %s -o - | macho-dump --dump-section-data | FileCheck -check-prefix=MACHO_64 %s + + .text +foo: + .uleb128 0 + .uleb128 1 + .uleb128 127 + .uleb128 128 + .uleb128 16383 + .uleb128 16384 + +// ELF_32: ('sh_name', 0x00000001) # '.text' +// ELF_32: ('_section_data', '00017f80 01ff7f80 8001') +// ELF_64: ('sh_name', 0x00000001) # '.text' +// ELF_64: ('_section_data', '00017f80 01ff7f80 8001') +// MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// MACHO_32: ('_section_data', '00017f80 01ff7f80 8001') +// MACHO_64: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// MACHO_64: ('_section_data', '00017f80 01ff7f80 8001') diff --git a/test/MC/ELF/undef.s b/test/MC/ELF/undef.s new file mode 100644 index 000000000000..fc3a2d23be39 --- /dev/null +++ b/test/MC/ELF/undef.s @@ -0,0 +1,46 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test which symbols should be in the symbol table + + .long .Lsym1 +.Lsym2: +.Lsym3: +.Lsym4 = .Lsym2 - .Lsym3 + .long .Lsym4 + + .type .Lsym5,@object + .type sym6,@object + .long sym6 + + .section .rodata.str1.1,"aMS",@progbits,1 +.Lsym7: +.Lsym8: + + .text + movsd .Lsym8(%rip), %xmm1 + +// CHECK: ('_symbols', [ +// CHECK-NEXT: # Symbol 0x00000000 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x0000000d) # '.Lsym8' +// CHECK: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK: # Symbol 0x00000003 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000001) # '.Lsym1' +// CHECK: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x00000008) # 'sym6' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000001) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/ELF/undef2.s b/test/MC/ELF/undef2.s new file mode 100644 index 000000000000..9544fbc42ac8 --- /dev/null +++ b/test/MC/ELF/undef2.s @@ -0,0 +1,10 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that this produces an undefined reference to .Lfoo + + je .Lfoo + +// CHECK: ('_symbols', [ +// CHECK: (('st_name', 0x00000001) # '.Lfoo' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK: (('sh_name', 0x00000024) # '.strtab' diff --git a/test/MC/ELF/weak.s b/test/MC/ELF/weak.s new file mode 100644 index 000000000000..67e9b188eb06 --- /dev/null +++ b/test/MC/ELF/weak.s @@ -0,0 +1,30 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that this produces a weak undefined symbol. + + .weak foo + .long foo + +// And that bar is after all local symbols and has non zero value. + .weak bar +bar: + +//CHECK: # Symbol 0x00000004 +//CHECK-NEXT: (('st_name', 0x00000005) # 'bar' +//CHECK-NEXT: ('st_bind', 0x00000002) +//CHECK-NEXT: ('st_type', 0x00000000) +//CHECK-NEXT: ('st_other', 0x00000000) +//CHECK-NEXT: ('st_shndx', 0x00000001) +//CHECK-NEXT: ('st_value', 0x0000000000000004) +//CHECK-NEXT: ('st_size', 0x0000000000000000) +//CHECK-NEXT: ), +//CHECK-NEXT: # Symbol 0x00000005 +//CHECK: (('st_name', 0x00000001) # 'foo' +//CHECK-NEXT: ('st_bind', 0x00000002) +//CHECK-NEXT: ('st_type', 0x00000000) +//CHECK-NEXT: ('st_other', 0x00000000) +//CHECK-NEXT: ('st_shndx', 0x00000000) +//CHECK-NEXT: ('st_value', 0x0000000000000000) +//CHECK-NEXT: ('st_size', 0x0000000000000000) +//CHECK-NEXT: ), +//CHECK-NEXT: ]) diff --git a/test/MC/ELF/weakref-plt.s b/test/MC/ELF/weakref-plt.s new file mode 100644 index 000000000000..26ba3f6df543 --- /dev/null +++ b/test/MC/ELF/weakref-plt.s @@ -0,0 +1,8 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .weakref bar,foo + call bar@PLT + +// CHECK: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' +// CHECK-NEXT: ('st_bind', 0x00000002) diff --git a/test/MC/ELF/weakref-reloc.s b/test/MC/ELF/weakref-reloc.s new file mode 100644 index 000000000000..c7cd7649d6f0 --- /dev/null +++ b/test/MC/ELF/weakref-reloc.s @@ -0,0 +1,49 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that the relocations point to the correct symbols. We used to get the +// symbol index wrong for weakrefs when creating _GLOBAL_OFFSET_TABLE_. + + .weakref bar,foo + call zed@PLT + call bar + +// CHECK: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000009) # '_GLOBAL_OFFSET_TABLE_' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' +// CHECK-NEXT: ('st_bind', 0x00000002) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000005) # 'zed' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), + +// CHECK: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000001) +// CHECK-NEXT: ('r_sym', 0x00000006) +// CHECK-NEXT: ('r_type', 0x00000004) +// CHECK-NEXT: ('r_addend', 0xfffffffc) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000006) +// CHECK-NEXT: ('r_sym', 0x00000005) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0xfffffffc) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/weakref.s b/test/MC/ELF/weakref.s new file mode 100644 index 000000000000..aea10d1d9294 --- /dev/null +++ b/test/MC/ELF/weakref.s @@ -0,0 +1,234 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// This is a long test that checks that the aliases created by weakref are +// never in the symbol table and that the only case it causes a symbol to +// be output as a weak undefined symbol is if that variable is not defined +// in this file and all the references to it are done via the alias. + + .weakref foo1, bar1 + + .weakref foo2, bar2 + .long bar2 + + .weakref foo3, bar3 + .long foo3 + + .weakref foo4, bar4 + .long foo4 + .long bar4 + + .weakref foo5, bar5 + .long bar5 + .long foo5 + +bar6: + .weakref foo6, bar6 + +bar7: + .weakref foo7, bar7 + .long bar7 + +bar8: + .weakref foo8, bar8 + .long foo8 + +bar9: + .weakref foo9, bar9 + .long foo9 + .long bar9 + +bar10: + .global bar10 + .weakref foo10, bar10 + .long bar10 + .long foo10 + +bar11: + .global bar11 + .weakref foo11, bar11 + +bar12: + .global bar12 + .weakref foo12, bar12 + .long bar12 + +bar13: + .global bar13 + .weakref foo13, bar13 + .long foo13 + +bar14: + .global bar14 + .weakref foo14, bar14 + .long foo14 + .long bar14 + +bar15: + .global bar15 + .weakref foo15, bar15 + .long bar15 + .long foo15 + +// CHECK: # Symbol 0x00000000 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000001 +// CHECK-NEXT: (('st_name', 0x00000015) # 'bar6' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000018) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000002 +// CHECK-NEXT: (('st_name', 0x0000001a) # 'bar7' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000018) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000003 +// CHECK-NEXT: (('st_name', 0x0000001f) # 'bar8' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x000000000000001c) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000004 +// CHECK-NEXT: (('st_name', 0x00000024) # 'bar9' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000020) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000006 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000002) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000007 +// CHECK-NEXT: (('st_name', 0x00000000) # '' +// CHECK-NEXT: ('st_bind', 0x00000000) +// CHECK-NEXT: ('st_type', 0x00000003) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000003) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000008 +// CHECK-NEXT: (('st_name', 0x00000029) # 'bar10' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000028) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000009 +// CHECK-NEXT: (('st_name', 0x0000002f) # 'bar11' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000030) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000a +// CHECK-NEXT: (('st_name', 0x00000035) # 'bar12' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000030) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000b +// CHECK-NEXT: (('st_name', 0x0000003b) # 'bar13' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000034) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000c +// CHECK-NEXT: (('st_name', 0x00000041) # 'bar14' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000038) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000d +// CHECK-NEXT: (('st_name', 0x00000047) # 'bar15' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000001) +// CHECK-NEXT: ('st_value', 0x0000000000000040) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000e +// CHECK-NEXT: (('st_name', 0x00000001) # 'bar2' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x0000000f +// CHECK-NEXT: (('st_name', 0x00000006) # 'bar3' +// CHECK-NEXT: ('st_bind', 0x00000002) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000010 +// CHECK-NEXT: (('st_name', 0x0000000b) # 'bar4' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000011 +// CHECK-NEXT: (('st_name', 0x00000010) # 'bar5' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/ELF/zero.s b/test/MC/ELF/zero.s new file mode 100644 index 000000000000..adf21f8a6bee --- /dev/null +++ b/test/MC/ELF/zero.s @@ -0,0 +1,16 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +.zero 4 +.zero 1,42 + +// CHECK: ('sh_name', 0x00000001) # '.text' +// CHECK: ('sh_type', 0x00000001) +// CHECK: ('sh_flags', 0x00000006) +// CHECK: ('sh_addr', 0x00000000) +// CHECK: ('sh_offset', 0x00000040) +// CHECK: ('sh_size', 0x00000005) +// CHECK: ('sh_link', 0x00000000) +// CHECK: ('sh_info', 0x00000000) +// CHECK: ('sh_addralign', 0x00000004) +// CHECK: ('sh_entsize', 0x00000000) +// CHECK: ('_section_data', '00000000 2a') diff --git a/test/MC/MBlaze/dg.exp b/test/MC/MBlaze/dg.exp new file mode 100644 index 000000000000..0c4e78e88dc4 --- /dev/null +++ b/test/MC/MBlaze/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target MBlaze] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] +} diff --git a/test/MC/MBlaze/mblaze_branch.s b/test/MC/MBlaze/mblaze_branch.s new file mode 100644 index 000000000000..2ec431926604 --- /dev/null +++ b/test/MC/MBlaze/mblaze_branch.s @@ -0,0 +1,197 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to make sure that all of the TYPE-A instructions supported by +# the Microblaze can be parsed by the assembly parser. + +# TYPE A: OPCODE RD RA RB FLAGS +# BINARY: 000000 00000 00000 00000 00000000000 + +# CHECK: beq +# BINARY: 100111 00000 00010 00011 00000000000 +# CHECK: encoding: [0x9c,0x02,0x18,0x00] + beq r2, r3 + +# CHECK: bge +# BINARY: 100111 00101 00010 00011 00000000000 +# CHECK: encoding: [0x9c,0xa2,0x18,0x00] + bge r2, r3 + +# CHECK: bgt +# BINARY: 100111 00100 00010 00011 00000000000 +# CHECK: encoding: [0x9c,0x82,0x18,0x00] + bgt r2, r3 + +# CHECK: ble +# BINARY: 100111 00011 00010 00011 00000000000 +# CHECK: encoding: [0x9c,0x62,0x18,0x00] + ble r2, r3 + +# CHECK: blt +# BINARY: 100111 00010 00010 00011 00000000000 +# CHECK: encoding: [0x9c,0x42,0x18,0x00] + blt r2, r3 + +# CHECK: bne +# BINARY: 100111 00001 00010 00011 00000000000 +# CHECK: encoding: [0x9c,0x22,0x18,0x00] + bne r2, r3 + +# CHECK: beqd +# BINARY: 100111 10000 00010 00011 00000000000 +# CHECK: encoding: [0x9e,0x02,0x18,0x00] + beqd r2, r3 + +# CHECK: bged +# BINARY: 100111 10101 00010 00011 00000000000 +# CHECK: encoding: [0x9e,0xa2,0x18,0x00] + bged r2, r3 + +# CHECK: bgtd +# BINARY: 100111 10100 00010 00011 00000000000 +# CHECK: encoding: [0x9e,0x82,0x18,0x00] + bgtd r2, r3 + +# CHECK: bled +# BINARY: 100111 10011 00010 00011 00000000000 +# CHECK: encoding: [0x9e,0x62,0x18,0x00] + bled r2, r3 + +# CHECK: bltd +# BINARY: 100111 10010 00010 00011 00000000000 +# CHECK: encoding: [0x9e,0x42,0x18,0x00] + bltd r2, r3 + +# CHECK: bned +# BINARY: 100111 10001 00010 00011 00000000000 +# CHECK: encoding: [0x9e,0x22,0x18,0x00] + bned r2, r3 + +# CHECK: br +# BINARY: 100110 00000 00000 00011 00000000000 +# CHECK: encoding: [0x98,0x00,0x18,0x00] + br r3 + +# CHECK: bra +# BINARY: 100110 00000 01000 00011 00000000000 +# CHECK: encoding: [0x98,0x08,0x18,0x00] + bra r3 + +# CHECK: brd +# BINARY: 100110 00000 10000 00011 00000000000 +# CHECK: encoding: [0x98,0x10,0x18,0x00] + brd r3 + +# CHECK: brad +# BINARY: 100110 00000 11000 00011 00000000000 +# CHECK: encoding: [0x98,0x18,0x18,0x00] + brad r3 + +# CHECK: brld +# BINARY: 100110 01111 10100 00011 00000000000 +# CHECK: encoding: [0x99,0xf4,0x18,0x00] + brld r15, r3 + +# CHECK: brald +# BINARY: 100110 01111 11100 00011 00000000000 +# CHECK: encoding: [0x99,0xfc,0x18,0x00] + brald r15, r3 + +# CHECK: brk +# BINARY: 100110 01111 01100 00011 00000000000 +# CHECK: encoding: [0x99,0xec,0x18,0x00] + brk r15, r3 + +# CHECK: beqi +# BINARY: 101111 00000 00010 0000000000000000 +# CHECK: encoding: [0xbc,0x02,0x00,0x00] + beqi r2, 0 + +# CHECK: bgei +# BINARY: 101111 00101 00010 0000000000000000 +# CHECK: encoding: [0xbc,0xa2,0x00,0x00] + bgei r2, 0 + +# CHECK: bgti +# BINARY: 101111 00100 00010 0000000000000000 +# CHECK: encoding: [0xbc,0x82,0x00,0x00] + bgti r2, 0 + +# CHECK: blei +# BINARY: 101111 00011 00010 0000000000000000 +# CHECK: encoding: [0xbc,0x62,0x00,0x00] + blei r2, 0 + +# CHECK: blti +# BINARY: 101111 00010 00010 0000000000000000 +# CHECK: encoding: [0xbc,0x42,0x00,0x00] + blti r2, 0 + +# CHECK: bnei +# BINARY: 101111 00001 00010 0000000000000000 +# CHECK: encoding: [0xbc,0x22,0x00,0x00] + bnei r2, 0 + +# CHECK: beqid +# BINARY: 101111 10000 00010 0000000000000000 +# CHECK: encoding: [0xbe,0x02,0x00,0x00] + beqid r2, 0 + +# CHECK: bgeid +# BINARY: 101111 10101 00010 0000000000000000 +# CHECK: encoding: [0xbe,0xa2,0x00,0x00] + bgeid r2, 0 + +# CHECK: bgtid +# BINARY: 101111 10100 00010 0000000000000000 +# CHECK: encoding: [0xbe,0x82,0x00,0x00] + bgtid r2, 0 + +# CHECK: bleid +# BINARY: 101111 10011 00010 0000000000000000 +# CHECK: encoding: [0xbe,0x62,0x00,0x00] + bleid r2, 0 + +# CHECK: bltid +# BINARY: 101111 10010 00010 0000000000000000 +# CHECK: encoding: [0xbe,0x42,0x00,0x00] + bltid r2, 0 + +# CHECK: bneid +# BINARY: 101111 10001 00010 0000000000000000 +# CHECK: encoding: [0xbe,0x22,0x00,0x00] + bneid r2, 0 + +# CHECK: bri +# BINARY: 101110 00000 00000 0000000000000000 +# CHECK: encoding: [0xb8,0x00,0x00,0x00] + bri 0 + +# CHECK: brai +# BINARY: 101110 00000 01000 0000000000000000 +# CHECK: encoding: [0xb8,0x08,0x00,0x00] + brai 0 + +# CHECK: brid +# BINARY: 101110 00000 10000 0000000000000000 +# CHECK: encoding: [0xb8,0x10,0x00,0x00] + brid 0 + +# CHECK: braid +# BINARY: 101110 00000 11000 0000000000000000 +# CHECK: encoding: [0xb8,0x18,0x00,0x00] + braid 0 + +# CHECK: brlid +# BINARY: 101110 01111 10100 0000000000000000 +# CHECK: encoding: [0xb9,0xf4,0x00,0x00] + brlid r15, 0 + +# CHECK: bralid +# BINARY: 101110 01111 11100 0000000000000000 +# CHECK: encoding: [0xb9,0xfc,0x00,0x00] + bralid r15, 0 + +# CHECK: brki +# BINARY: 101110 01111 01100 0000000000000000 +# CHECK: encoding: [0xb9,0xec,0x00,0x00] + brki r15, 0 diff --git a/test/MC/MBlaze/mblaze_fpu.s b/test/MC/MBlaze/mblaze_fpu.s new file mode 100644 index 000000000000..a3b683848513 --- /dev/null +++ b/test/MC/MBlaze/mblaze_fpu.s @@ -0,0 +1,77 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to ensure that all FPU instructions can be parsed by the +# assembly parser correctly. + +# TYPE A: OPCODE RD RA RB FLAGS +# BINARY: 011011 00000 00000 00000 00000000000 + +# CHECK: fadd +# BINARY: 010110 00000 00001 00010 00000000000 +# CHECK: encoding: [0x58,0x01,0x10,0x00] + fadd r0, r1, r2 + +# CHECK: frsub +# BINARY: 010110 00000 00001 00010 00010000000 +# CHECK: encoding: [0x58,0x01,0x10,0x80] + frsub r0, r1, r2 + +# CHECK: fmul +# BINARY: 010110 00000 00001 00010 00100000000 +# CHECK: encoding: [0x58,0x01,0x11,0x00] + fmul r0, r1, r2 + +# CHECK: fdiv +# BINARY: 010110 00000 00001 00010 00110000000 +# CHECK: encoding: [0x58,0x01,0x11,0x80] + fdiv r0, r1, r2 + +# CHECK: fsqrt +# BINARY: 010110 00000 00001 00000 01110000000 +# CHECK: encoding: [0x58,0x01,0x03,0x80] + fsqrt r0, r1 + +# CHECK: fint +# BINARY: 010110 00000 00001 00000 01100000000 +# CHECK: encoding: [0x58,0x01,0x03,0x00] + fint r0, r1 + +# CHECK: flt +# BINARY: 010110 00000 00001 00000 01010000000 +# CHECK: encoding: [0x58,0x01,0x02,0x80] + flt r0, r1 + +# CHECK: fcmp.un +# BINARY: 010110 00000 00001 00010 01000000000 +# CHECK: encoding: [0x58,0x01,0x12,0x00] + fcmp.un r0, r1, r2 + +# CHECK: fcmp.lt +# BINARY: 010110 00000 00001 00010 01000010000 +# CHECK: encoding: [0x58,0x01,0x12,0x10] + fcmp.lt r0, r1, r2 + +# CHECK: fcmp.eq +# BINARY: 010110 00000 00001 00010 01000100000 +# CHECK: encoding: [0x58,0x01,0x12,0x20] + fcmp.eq r0, r1, r2 + +# CHECK: fcmp.le +# BINARY: 010110 00000 00001 00010 01000110000 +# CHECK: encoding: [0x58,0x01,0x12,0x30] + fcmp.le r0, r1, r2 + +# CHECK: fcmp.gt +# BINARY: 010110 00000 00001 00010 01001000000 +# CHECK: encoding: [0x58,0x01,0x12,0x40] + fcmp.gt r0, r1, r2 + +# CHECK: fcmp.ne +# BINARY: 010110 00000 00001 00010 01001010000 +# CHECK: encoding: [0x58,0x01,0x12,0x50] + fcmp.ne r0, r1, r2 + +# CHECK: fcmp.ge +# BINARY: 010110 00000 00001 00010 01001100000 +# CHECK: encoding: [0x58,0x01,0x12,0x60] + fcmp.ge r0, r1, r2 diff --git a/test/MC/MBlaze/mblaze_fsl.s b/test/MC/MBlaze/mblaze_fsl.s new file mode 100644 index 000000000000..d0a42b34991f --- /dev/null +++ b/test/MC/MBlaze/mblaze_fsl.s @@ -0,0 +1,568 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to ensure that all FSL immediate operands and FSL instructions +# can be parsed by the assembly parser correctly. + +# TYPE F: OPCODE RD NCTAE FSL +# BINARY: 011011 00000 000000 00000 000000 0000 + +# TYPE FD: OPCODE RD RB NCTAE +# BINARY: 011011 00000 00000 00000 0 00000 00000 + +# TYPE FP: OPCODE RA NCTA FSL +# 000000 00000 00000 1 0000 0000000 0000 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x00,0x00] + get r0, rfsl0 + +# CHECK: nget +# BINARY: 011011 00000 000000 10000 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x40,0x00] + nget r0, rfsl0 + +# CHECK: cget +# BINARY: 011011 00000 000000 01000 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x20,0x00] + cget r0, rfsl0 + +# CHECK: ncget +# BINARY: 011011 00000 000000 11000 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x60,0x00] + ncget r0, rfsl0 + +# CHECK: tget +# BINARY: 011011 00000 000000 00100 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x10,0x00] + tget r0, rfsl0 + +# CHECK: tnget +# BINARY: 011011 00000 000000 10100 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x50,0x00] + tnget r0, rfsl0 + +# CHECK: tcget +# BINARY: 011011 00000 000000 01100 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x30,0x00] + tcget r0, rfsl0 + +# CHECK: tncget +# BINARY: 011011 00000 000000 11100 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x70,0x00] + tncget r0, rfsl0 + +# CHECK: aget +# BINARY: 011011 00000 000000 00010 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x08,0x00] + aget r0, rfsl0 + +# CHECK: naget +# BINARY: 011011 00000 000000 10010 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x48,0x00] + naget r0, rfsl0 + +# CHECK: caget +# BINARY: 011011 00000 000000 01010 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x28,0x00] + caget r0, rfsl0 + +# CHECK: ncaget +# BINARY: 011011 00000 000000 11010 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x68,0x00] + ncaget r0, rfsl0 + +# CHECK: taget +# BINARY: 011011 00000 000000 00110 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x18,0x00] + taget r0, rfsl0 + +# CHECK: tnaget +# BINARY: 011011 00000 000000 10110 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x58,0x00] + tnaget r0, rfsl0 + +# CHECK: tcaget +# BINARY: 011011 00000 000000 01110 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x38,0x00] + tcaget r0, rfsl0 + +# CHECK: tncaget +# BINARY: 011011 00000 000000 11110 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x78,0x00] + tncaget r0, rfsl0 + +# CHECK: eget +# BINARY: 011011 00000 000000 00001 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x04,0x00] + eget r0, rfsl0 + +# CHECK: neget +# BINARY: 011011 00000 000000 10001 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x44,0x00] + neget r0, rfsl0 + +# CHECK: ecget +# BINARY: 011011 00000 000000 01001 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x24,0x00] + ecget r0, rfsl0 + +# CHECK: necget +# BINARY: 011011 00000 000000 11001 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x64,0x00] + necget r0, rfsl0 + +# CHECK: teget +# BINARY: 011011 00000 000000 00101 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x14,0x00] + teget r0, rfsl0 + +# CHECK: tneget +# BINARY: 011011 00000 000000 10101 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x54,0x00] + tneget r0, rfsl0 + +# CHECK: tecget +# BINARY: 011011 00000 000000 01101 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x34,0x00] + tecget r0, rfsl0 + +# CHECK: tnecget +# BINARY: 011011 00000 000000 11101 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x74,0x00] + tnecget r0, rfsl0 + +# CHECK: eaget +# BINARY: 011011 00000 000000 00011 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x0c,0x00] + eaget r0, rfsl0 + +# CHECK: neaget +# BINARY: 011011 00000 000000 10011 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x4c,0x00] + neaget r0, rfsl0 + +# CHECK: ecaget +# BINARY: 011011 00000 000000 01011 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x2c,0x00] + ecaget r0, rfsl0 + +# CHECK: necaget +# BINARY: 011011 00000 000000 11011 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x6c,0x00] + necaget r0, rfsl0 + +# CHECK: teaget +# BINARY: 011011 00000 000000 00111 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x1c,0x00] + teaget r0, rfsl0 + +# CHECK: tneaget +# BINARY: 011011 00000 000000 10111 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x5c,0x00] + tneaget r0, rfsl0 + +# CHECK: tecaget +# BINARY: 011011 00000 000000 01111 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x3c,0x00] + tecaget r0, rfsl0 + +# CHECK: tnecaget +# BINARY: 011011 00000 000000 11111 000000 0000 +# CHECK: encoding: [0x6c,0x00,0x7c,0x00] + tnecaget r0, rfsl0 + +# CHECK: getd +# BINARY: 010011 00000 00000 00001 0 00000 00000 +# CHECK: encoding: [0x4c,0x00,0x08,0x00] + getd r0, r1 + +# CHECK: ngetd +# BINARY: 010011 00000 00000 00001 0 10000 00000 +# CHECK: encoding: [0x4c,0x00,0x0a,0x00] + ngetd r0, r1 + +# CHECK: cgetd +# BINARY: 010011 00000 00000 00001 0 01000 00000 +# CHECK: encoding: [0x4c,0x00,0x09,0x00] + cgetd r0, r1 + +# CHECK: ncgetd +# BINARY: 010011 00000 00000 00001 0 11000 00000 +# CHECK: encoding: [0x4c,0x00,0x0b,0x00] + ncgetd r0, r1 + +# CHECK: tgetd +# BINARY: 010011 00000 00000 00001 0 00100 00000 +# CHECK: encoding: [0x4c,0x00,0x08,0x80] + tgetd r0, r1 + +# CHECK: tngetd +# BINARY: 010011 00000 00000 00001 0 10100 00000 +# CHECK: encoding: [0x4c,0x00,0x0a,0x80] + tngetd r0, r1 + +# CHECK: tcgetd +# BINARY: 010011 00000 00000 00001 0 01100 00000 +# CHECK: encoding: [0x4c,0x00,0x09,0x80] + tcgetd r0, r1 + +# CHECK: tncgetd +# BINARY: 010011 00000 00000 00001 0 11100 00000 +# CHECK: encoding: [0x4c,0x00,0x0b,0x80] + tncgetd r0, r1 + +# CHECK: agetd +# BINARY: 010011 00000 00000 00001 0 00010 00000 +# CHECK: encoding: [0x4c,0x00,0x08,0x40] + agetd r0, r1 + +# CHECK: nagetd +# BINARY: 010011 00000 00000 00001 0 10010 00000 +# CHECK: encoding: [0x4c,0x00,0x0a,0x40] + nagetd r0, r1 + +# CHECK: cagetd +# BINARY: 010011 00000 00000 00001 0 01010 00000 +# CHECK: encoding: [0x4c,0x00,0x09,0x40] + cagetd r0, r1 + +# CHECK: ncagetd +# BINARY: 010011 00000 00000 00001 0 11010 00000 +# CHECK: encoding: [0x4c,0x00,0x0b,0x40] + ncagetd r0, r1 + +# CHECK: tagetd +# BINARY: 010011 00000 00000 00001 0 00110 00000 +# CHECK: encoding: [0x4c,0x00,0x08,0xc0] + tagetd r0, r1 + +# CHECK: tnagetd +# BINARY: 010011 00000 00000 00001 0 10110 00000 +# CHECK: encoding: [0x4c,0x00,0x0a,0xc0] + tnagetd r0, r1 + +# CHECK: tcagetd +# BINARY: 010011 00000 00000 00001 0 01110 00000 +# CHECK: encoding: [0x4c,0x00,0x09,0xc0] + tcagetd r0, r1 + +# CHECK: tncagetd +# BINARY: 010011 00000 00000 00001 0 11110 00000 +# CHECK: encoding: [0x4c,0x00,0x0b,0xc0] + tncagetd r0, r1 + +# CHECK: egetd +# BINARY: 010011 00000 00000 00001 0 00001 00000 +# CHECK: encoding: [0x4c,0x00,0x08,0x20] + egetd r0, r1 + +# CHECK: negetd +# BINARY: 010011 00000 00000 00001 0 10001 00000 +# CHECK: encoding: [0x4c,0x00,0x0a,0x20] + negetd r0, r1 + +# CHECK: ecgetd +# BINARY: 010011 00000 00000 00001 0 01001 00000 +# CHECK: encoding: [0x4c,0x00,0x09,0x20] + ecgetd r0, r1 + +# CHECK: necgetd +# BINARY: 010011 00000 00000 00001 0 11001 00000 +# CHECK: encoding: [0x4c,0x00,0x0b,0x20] + necgetd r0, r1 + +# CHECK: tegetd +# BINARY: 010011 00000 00000 00001 0 00101 00000 +# CHECK: encoding: [0x4c,0x00,0x08,0xa0] + tegetd r0, r1 + +# CHECK: tnegetd +# BINARY: 010011 00000 00000 00001 0 10101 00000 +# CHECK: encoding: [0x4c,0x00,0x0a,0xa0] + tnegetd r0, r1 + +# CHECK: tecgetd +# BINARY: 010011 00000 00000 00001 0 01101 00000 +# CHECK: encoding: [0x4c,0x00,0x09,0xa0] + tecgetd r0, r1 + +# CHECK: tnecgetd +# BINARY: 010011 00000 00000 00001 0 11101 00000 +# CHECK: encoding: [0x4c,0x00,0x0b,0xa0] + tnecgetd r0, r1 + +# CHECK: eagetd +# BINARY: 010011 00000 00000 00001 0 00011 00000 +# CHECK: encoding: [0x4c,0x00,0x08,0x60] + eagetd r0, r1 + +# CHECK: neagetd +# BINARY: 010011 00000 00000 00001 0 10011 00000 +# CHECK: encoding: [0x4c,0x00,0x0a,0x60] + neagetd r0, r1 + +# CHECK: ecagetd +# BINARY: 010011 00000 00000 00001 0 01011 00000 +# CHECK: encoding: [0x4c,0x00,0x09,0x60] + ecagetd r0, r1 + +# CHECK: necagetd +# BINARY: 010011 00000 00000 00001 0 11011 00000 +# CHECK: encoding: [0x4c,0x00,0x0b,0x60] + necagetd r0, r1 + +# CHECK: teagetd +# BINARY: 010011 00000 00000 00001 0 00111 00000 +# CHECK: encoding: [0x4c,0x00,0x08,0xe0] + teagetd r0, r1 + +# CHECK: tneagetd +# BINARY: 010011 00000 00000 00001 0 10111 00000 +# CHECK: encoding: [0x4c,0x00,0x0a,0xe0] + tneagetd r0, r1 + +# CHECK: tecagetd +# BINARY: 010011 00000 00000 00001 0 01111 00000 +# CHECK: encoding: [0x4c,0x00,0x09,0xe0] + tecagetd r0, r1 + +# CHECK: tnecagetd +# BINARY: 010011 00000 00000 00001 0 11111 00000 +# CHECK: encoding: [0x4c,0x00,0x0b,0xe0] + tnecagetd r0, r1 + +# CHECK: put +# BINARY: 011011 00000 00000 1 0000 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0x80,0x00] + put r0, rfsl0 + +# CHECK: aput +# BINARY: 011011 00000 00000 1 0001 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0x88,0x00] + aput r0, rfsl0 + +# CHECK: cput +# BINARY: 011011 00000 00000 1 0100 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xa0,0x00] + cput r0, rfsl0 + +# CHECK: caput +# BINARY: 011011 00000 00000 1 0101 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xa8,0x00] + caput r0, rfsl0 + +# CHECK: nput +# BINARY: 011011 00000 00000 1 1000 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xc0,0x00] + nput r0, rfsl0 + +# CHECK: naput +# BINARY: 011011 00000 00000 1 1001 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xc8,0x00] + naput r0, rfsl0 + +# CHECK: ncput +# BINARY: 011011 00000 00000 1 1100 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xe0,0x00] + ncput r0, rfsl0 + +# CHECK: ncaput +# BINARY: 011011 00000 00000 1 1101 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xe8,0x00] + ncaput r0, rfsl0 + +# CHECK: tput +# BINARY: 011011 00000 00000 1 0010 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0x90,0x00] + tput rfsl0 + +# CHECK: taput +# BINARY: 011011 00000 00000 1 0011 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0x98,0x00] + taput rfsl0 + +# CHECK: tcput +# BINARY: 011011 00000 00000 1 0110 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xb0,0x00] + tcput rfsl0 + +# CHECK: tcaput +# BINARY: 011011 00000 00000 1 0111 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xb8,0x00] + tcaput rfsl0 + +# CHECK: tnput +# BINARY: 011011 00000 00000 1 1010 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xd0,0x00] + tnput rfsl0 + +# CHECK: tnaput +# BINARY: 011011 00000 00000 1 1011 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xd8,0x00] + tnaput rfsl0 + +# CHECK: tncput +# BINARY: 011011 00000 00000 1 1110 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xf0,0x00] + tncput rfsl0 + +# CHECK: tncaput +# BINARY: 011011 00000 00000 1 1111 0000000 0000 +# CHECK: encoding: [0x6c,0x00,0xf8,0x00] + tncaput rfsl0 + +# CHECK: putd +# BINARY: 010011 00000 00000 00001 1 0000 000000 +# CHECK: encoding: [0x4c,0x00,0x0c,0x00] + putd r0, r1 + +# CHECK: aputd +# BINARY: 010011 00000 00000 00001 1 0001 000000 +# CHECK: encoding: [0x4c,0x00,0x0c,0x40] + aputd r0, r1 + +# CHECK: cputd +# BINARY: 010011 00000 00000 00001 1 0100 000000 +# CHECK: encoding: [0x4c,0x00,0x0d,0x00] + cputd r0, r1 + +# CHECK: caputd +# BINARY: 010011 00000 00000 00001 1 0101 000000 +# CHECK: encoding: [0x4c,0x00,0x0d,0x40] + caputd r0, r1 + +# CHECK: nputd +# BINARY: 010011 00000 00000 00001 1 1000 000000 +# CHECK: encoding: [0x4c,0x00,0x0e,0x00] + nputd r0, r1 + +# CHECK: naputd +# BINARY: 010011 00000 00000 00001 1 1001 000000 +# CHECK: encoding: [0x4c,0x00,0x0e,0x40] + naputd r0, r1 + +# CHECK: ncputd +# BINARY: 010011 00000 00000 00001 1 1100 000000 +# CHECK: encoding: [0x4c,0x00,0x0f,0x00] + ncputd r0, r1 + +# CHECK: ncaputd +# BINARY: 010011 00000 00000 00001 1 1101 000000 +# CHECK: encoding: [0x4c,0x00,0x0f,0x40] + ncaputd r0, r1 + +# CHECK: tputd +# BINARY: 010011 00000 00000 00001 1 0010 000000 +# CHECK: encoding: [0x4c,0x00,0x0c,0x80] + tputd r1 + +# CHECK: taputd +# BINARY: 010011 00000 00000 00001 1 0011 000000 +# CHECK: encoding: [0x4c,0x00,0x0c,0xc0] + taputd r1 + +# CHECK: tcputd +# BINARY: 010011 00000 00000 00001 1 0110 000000 +# CHECK: encoding: [0x4c,0x00,0x0d,0x80] + tcputd r1 + +# CHECK: tcaputd +# BINARY: 010011 00000 00000 00001 1 0111 000000 +# CHECK: encoding: [0x4c,0x00,0x0d,0xc0] + tcaputd r1 + +# CHECK: tnputd +# BINARY: 010011 00000 00000 00001 1 1010 000000 +# CHECK: encoding: [0x4c,0x00,0x0e,0x80] + tnputd r1 + +# CHECK: tnaputd +# BINARY: 010011 00000 00000 00001 1 1011 000000 +# CHECK: encoding: [0x4c,0x00,0x0e,0xc0] + tnaputd r1 + +# CHECK: tncputd +# BINARY: 010011 00000 00000 00001 1 1110 000000 +# CHECK: encoding: [0x4c,0x00,0x0f,0x80] + tncputd r1 + +# CHECK: tncaputd +# BINARY: 010011 00000 00000 00001 1 1111 000000 +# CHECK: encoding: [0x4c,0x00,0x0f,0xc0] + tncaputd r1 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 0001 +# CHECK: encoding: [0x6c,0x00,0x00,0x01] + get r0, rfsl1 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 0010 +# CHECK: encoding: [0x6c,0x00,0x00,0x02] + get r0, rfsl2 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 0011 +# CHECK: encoding: [0x6c,0x00,0x00,0x03] + get r0, rfsl3 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 0100 +# CHECK: encoding: [0x6c,0x00,0x00,0x04] + get r0, rfsl4 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 0101 +# CHECK: encoding: [0x6c,0x00,0x00,0x05] + get r0, rfsl5 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 0110 +# CHECK: encoding: [0x6c,0x00,0x00,0x06] + get r0, rfsl6 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 0111 +# CHECK: encoding: [0x6c,0x00,0x00,0x07] + get r0, rfsl7 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 1000 +# CHECK: encoding: [0x6c,0x00,0x00,0x08] + get r0, rfsl8 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 1001 +# CHECK: encoding: [0x6c,0x00,0x00,0x09] + get r0, rfsl9 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 1010 +# CHECK: encoding: [0x6c,0x00,0x00,0x0a] + get r0, rfsl10 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 1011 +# CHECK: encoding: [0x6c,0x00,0x00,0x0b] + get r0, rfsl11 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 1100 +# CHECK: encoding: [0x6c,0x00,0x00,0x0c] + get r0, rfsl12 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 1101 +# CHECK: encoding: [0x6c,0x00,0x00,0x0d] + get r0, rfsl13 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 1110 +# CHECK: encoding: [0x6c,0x00,0x00,0x0e] + get r0, rfsl14 + +# CHECK: get +# BINARY: 011011 00000 000000 00000 000000 1111 +# CHECK: encoding: [0x6c,0x00,0x00,0x0f] + get r0, rfsl15 diff --git a/test/MC/MBlaze/mblaze_imm.s b/test/MC/MBlaze/mblaze_imm.s new file mode 100644 index 000000000000..08b8a0f26818 --- /dev/null +++ b/test/MC/MBlaze/mblaze_imm.s @@ -0,0 +1,194 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# In the microblaze instruction set, any TYPE-B instruction with a +# signed immediate value requiring more than 16-bits must be prefixed +# with an IMM instruction that contains the high 16-bits. The higher +# 16-bits are then combined with the lower 16-bits in the original +# instruction to form a 32-bit immediate value. +# +# The generation of IMM instructions is handled automatically by the +# code emitter. Test to ensure that IMM instructions are generated +# when they are suppose to and are not generated when they are not +# needed. + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0x20,0x00,0x00,0x00] + addi r0, r0, 0x00000000 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000000001 +# CHECK: encoding: [0x20,0x00,0x00,0x01] + addi r0, r0, 0x00000001 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000000010 +# CHECK: encoding: [0x20,0x00,0x00,0x02] + addi r0, r0, 0x00000002 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000000100 +# CHECK: encoding: [0x20,0x00,0x00,0x04] + addi r0, r0, 0x00000004 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000001000 +# CHECK: encoding: [0x20,0x00,0x00,0x08] + addi r0, r0, 0x00000008 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000010000 +# CHECK: encoding: [0x20,0x00,0x00,0x10] + addi r0, r0, 0x00000010 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000100000 +# CHECK: encoding: [0x20,0x00,0x00,0x20] + addi r0, r0, 0x00000020 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000001000000 +# CHECK: encoding: [0x20,0x00,0x00,0x40] + addi r0, r0, 0x00000040 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000010000000 +# CHECK: encoding: [0x20,0x00,0x00,0x80] + addi r0, r0, 0x00000080 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000100000000 +# CHECK: encoding: [0x20,0x00,0x01,0x00] + addi r0, r0, 0x00000100 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000001000000000 +# CHECK: encoding: [0x20,0x00,0x02,0x00] + addi r0, r0, 0x00000200 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000010000000000 +# CHECK: encoding: [0x20,0x00,0x04,0x00] + addi r0, r0, 0x00000400 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000100000000000 +# CHECK: encoding: [0x20,0x00,0x08,0x00] + addi r0, r0, 0x00000800 + +# CHECK: addi +# BINARY: 001000 00000 00000 0001000000000000 +# CHECK: encoding: [0x20,0x00,0x10,0x00] + addi r0, r0, 0x00001000 + +# CHECK: addi +# BINARY: 001000 00000 00000 0010000000000000 +# CHECK: encoding: [0x20,0x00,0x20,0x00] + addi r0, r0, 0x00002000 + +# CHECK: addi +# BINARY: 001000 00000 00000 0100000000000000 +# CHECK: encoding: [0x20,0x00,0x40,0x00] + addi r0, r0, 0x00004000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000000000000 +# BINARY: 001000 00000 00000 1000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x00,0x20,0x00,0x80,0x00] + addi r0, r0, 0x00008000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000000000001 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x01,0x20,0x00,0x00,0x00] + addi r0, r0, 0x00010000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000000000010 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x02,0x20,0x00,0x00,0x00] + addi r0, r0, 0x00020000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000000000100 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x04,0x20,0x00,0x00,0x00] + addi r0, r0, 0x00040000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000000001000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x08,0x20,0x00,0x00,0x00] + addi r0, r0, 0x00080000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000000010000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x10,0x20,0x00,0x00,0x00] + addi r0, r0, 0x00100000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000000100000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x20,0x20,0x00,0x00,0x00] + addi r0, r0, 0x00200000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000001000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x40,0x20,0x00,0x00,0x00] + addi r0, r0, 0x00400000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000010000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x00,0x80,0x20,0x00,0x00,0x00] + addi r0, r0, 0x00800000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000000100000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x01,0x00,0x20,0x00,0x00,0x00] + addi r0, r0, 0x01000000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000001000000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x02,0x00,0x20,0x00,0x00,0x00] + addi r0, r0, 0x02000000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000010000000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x04,0x00,0x20,0x00,0x00,0x00] + addi r0, r0, 0x04000000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0000100000000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x08,0x00,0x20,0x00,0x00,0x00] + addi r0, r0, 0x08000000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0001000000000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x10,0x00,0x20,0x00,0x00,0x00] + addi r0, r0, 0x10000000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0010000000000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x20,0x00,0x20,0x00,0x00,0x00] + addi r0, r0, 0x20000000 + +# CHECK: addi +# BINARY: 101100 00000 00000 0100000000000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x40,0x00,0x20,0x00,0x00,0x00] + addi r0, r0, 0x40000000 + +# CHECK: addi +# BINARY: 101100 00000 00000 1000000000000000 +# 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0xb0,0x00,0x80,0x00,0x20,0x00,0x00,0x00] + addi r0, r0, 0x80000000 diff --git a/test/MC/MBlaze/mblaze_memory.s b/test/MC/MBlaze/mblaze_memory.s new file mode 100644 index 000000000000..fe744753ee4d --- /dev/null +++ b/test/MC/MBlaze/mblaze_memory.s @@ -0,0 +1,107 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to make sure that all of the TYPE-A instructions supported by +# the Microblaze can be parsed by the assembly parser. + +# TYPE A: OPCODE RD RA RB FLAGS +# BINARY: 000000 00000 00000 00000 00000000000 + +# CHECK: lbu +# BINARY: 110000 00001 00010 00011 00000000000 +# CHECK: encoding: [0xc0,0x22,0x18,0x00] + lbu r1, r2, r3 + +# CHECK: lbur +# BINARY: 110000 00001 00010 00011 01000000000 +# CHECK: encoding: [0xc0,0x22,0x1a,0x00] + lbur r1, r2, r3 + +# CHECK: lbui +# BINARY: 111000 00001 00010 0000000000011100 +# CHECK: encoding: [0xe0,0x22,0x00,0x1c] + lbui r1, r2, 28 + +# CHECK: lhu +# BINARY: 110001 00001 00010 00011 00000000000 +# CHECK: encoding: [0xc4,0x22,0x18,0x00] + lhu r1, r2, r3 + +# CHECK: lhur +# BINARY: 110001 00001 00010 00011 01000000000 +# CHECK: encoding: [0xc4,0x22,0x1a,0x00] + lhur r1, r2, r3 + +# CHECK: lhui +# BINARY: 111001 00001 00010 0000000000011100 +# CHECK: encoding: [0xe4,0x22,0x00,0x1c] + lhui r1, r2, 28 + +# CHECK: lw +# BINARY: 110010 00001 00010 00011 00000000000 +# CHECK: encoding: [0xc8,0x22,0x18,0x00] + lw r1, r2, r3 + +# CHECK: lwr +# BINARY: 110010 00001 00010 00011 01000000000 +# CHECK: encoding: [0xc8,0x22,0x1a,0x00] + lwr r1, r2, r3 + +# CHECK: lwi +# BINARY: 111010 00001 00010 0000000000011100 +# CHECK: encoding: [0xe8,0x22,0x00,0x1c] + lwi r1, r2, 28 + +# CHECK: lwx +# BINARY: 110010 00001 00010 00011 10000000000 +# CHECK: encoding: [0xc8,0x22,0x1c,0x00] + lwx r1, r2, r3 + +# CHECK: sb +# BINARY: 110100 00001 00010 00011 00000000000 +# CHECK: encoding: [0xd0,0x22,0x18,0x00] + sb r1, r2, r3 + +# CHECK: sbr +# BINARY: 110100 00001 00010 00011 01000000000 +# CHECK: encoding: [0xd0,0x22,0x1a,0x00] + sbr r1, r2, r3 + +# CHECK: sbi +# BINARY: 111100 00001 00010 0000000000011100 +# CHECK: encoding: [0xf0,0x22,0x00,0x1c] + sbi r1, r2, 28 + +# CHECK: sh +# BINARY: 110101 00001 00010 00011 00000000000 +# CHECK: encoding: [0xd4,0x22,0x18,0x00] + sh r1, r2, r3 + +# CHECK: shr +# BINARY: 110101 00001 00010 00011 01000000000 +# CHECK: encoding: [0xd4,0x22,0x1a,0x00] + shr r1, r2, r3 + +# CHECK: shi +# BINARY: 111101 00001 00010 0000000000011100 +# CHECK: encoding: [0xf4,0x22,0x00,0x1c] + shi r1, r2, 28 + +# CHECK: sw +# BINARY: 110110 00001 00010 00011 00000000000 +# CHECK: encoding: [0xd8,0x22,0x18,0x00] + sw r1, r2, r3 + +# CHECK: swr +# BINARY: 110110 00001 00010 00011 01000000000 +# CHECK: encoding: [0xd8,0x22,0x1a,0x00] + swr r1, r2, r3 + +# CHECK: swi +# BINARY: 111110 00001 00010 0000000000011100 +# CHECK: encoding: [0xf8,0x22,0x00,0x1c] + swi r1, r2, 28 + +# CHECK: swx +# BINARY: 110110 00001 00010 00011 10000000000 +# CHECK: encoding: [0xd8,0x22,0x1c,0x00] + swx r1, r2, r3 diff --git a/test/MC/MBlaze/mblaze_operands.s b/test/MC/MBlaze/mblaze_operands.s new file mode 100644 index 000000000000..d5f1d8059f37 --- /dev/null +++ b/test/MC/MBlaze/mblaze_operands.s @@ -0,0 +1,328 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to ensure that all register and immediate operands can be parsed by +# the assembly parser correctly. Testing the parsing of FSL immediate +# values is done in a different test. + +# TYPE A: OPCODE RD RA RB FLAGS +# BINARY: 000000 00000 00000 00000 00000000000 + +# CHECK: add +# BINARY: 000000 00000 00000 00000 00000000000 +# CHECK: encoding: [0x00,0x00,0x00,0x00] + add r0, r0, r0 + +# CHECK: add +# BINARY: 000000 00001 00001 00001 00000000000 +# CHECK: encoding: [0x00,0x21,0x08,0x00] + add r1, r1, r1 + +# CHECK: add +# BINARY: 000000 00010 00010 00010 00000000000 +# CHECK: encoding: [0x00,0x42,0x10,0x00] + add r2, r2, r2 + +# CHECK: add +# BINARY: 000000 00011 00011 00011 00000000000 +# CHECK: encoding: [0x00,0x63,0x18,0x00] + add r3, r3, r3 + +# CHECK: add +# BINARY: 000000 00100 00100 00100 00000000000 +# CHECK: encoding: [0x00,0x84,0x20,0x00] + add r4, r4, r4 + +# CHECK: add +# BINARY: 000000 00101 00101 00101 00000000000 +# CHECK: encoding: [0x00,0xa5,0x28,0x00] + add r5, r5, r5 + +# CHECK: add +# BINARY: 000000 00110 00110 00110 00000000000 +# CHECK: encoding: [0x00,0xc6,0x30,0x00] + add r6, r6, r6 + +# CHECK: add +# BINARY: 000000 00111 00111 00111 00000000000 +# CHECK: encoding: [0x00,0xe7,0x38,0x00] + add r7, r7, r7 + +# CHECK: add +# BINARY: 000000 01000 01000 01000 00000000000 +# CHECK: encoding: [0x01,0x08,0x40,0x00] + add r8, r8, r8 + +# CHECK: add +# BINARY: 000000 01001 01001 01001 00000000000 +# CHECK: encoding: [0x01,0x29,0x48,0x00] + add r9, r9, r9 + +# CHECK: add +# BINARY: 000000 01010 01010 01010 00000000000 +# CHECK: encoding: [0x01,0x4a,0x50,0x00] + add r10, r10, r10 + +# CHECK: add +# BINARY: 000000 01011 01011 01011 00000000000 +# CHECK: encoding: [0x01,0x6b,0x58,0x00] + add r11, r11, r11 + +# CHECK: add +# BINARY: 000000 01100 01100 01100 00000000000 +# CHECK: encoding: [0x01,0x8c,0x60,0x00] + add r12, r12, r12 + +# CHECK: add +# BINARY: 000000 01101 01101 01101 00000000000 +# CHECK: encoding: [0x01,0xad,0x68,0x00] + add r13, r13, r13 + +# CHECK: add +# BINARY: 000000 01110 01110 01110 00000000000 +# CHECK: encoding: [0x01,0xce,0x70,0x00] + add r14, r14, r14 + +# CHECK: add +# BINARY: 000000 01111 01111 01111 00000000000 +# CHECK: encoding: [0x01,0xef,0x78,0x00] + add r15, r15, r15 + +# CHECK: add +# BINARY: 000000 10000 10000 10000 00000000000 +# CHECK: encoding: [0x02,0x10,0x80,0x00] + add r16, r16, r16 + +# CHECK: add +# BINARY: 000000 10001 10001 10001 00000000000 +# CHECK: encoding: [0x02,0x31,0x88,0x00] + add r17, r17, r17 + +# CHECK: add +# BINARY: 000000 10010 10010 10010 00000000000 +# CHECK: encoding: [0x02,0x52,0x90,0x00] + add r18, r18, r18 + +# CHECK: add +# BINARY: 000000 10011 10011 10011 00000000000 +# CHECK: encoding: [0x02,0x73,0x98,0x00] + add r19, r19, r19 + +# CHECK: add +# BINARY: 000000 10100 10100 10100 00000000000 +# CHECK: encoding: [0x02,0x94,0xa0,0x00] + add r20, r20, r20 + +# CHECK: add +# BINARY: 000000 10101 10101 10101 00000000000 +# CHECK: encoding: [0x02,0xb5,0xa8,0x00] + add r21, r21, r21 + +# CHECK: add +# BINARY: 000000 10110 10110 10110 00000000000 +# CHECK: encoding: [0x02,0xd6,0xb0,0x00] + add r22, r22, r22 + +# CHECK: add +# BINARY: 000000 10111 10111 10111 00000000000 +# CHECK: encoding: [0x02,0xf7,0xb8,0x00] + add r23, r23, r23 + +# CHECK: add +# BINARY: 000000 11000 11000 11000 00000000000 +# CHECK: encoding: [0x03,0x18,0xc0,0x00] + add r24, r24, r24 + +# CHECK: add +# BINARY: 000000 11001 11001 11001 00000000000 +# CHECK: encoding: [0x03,0x39,0xc8,0x00] + add r25, r25, r25 + +# CHECK: add +# BINARY: 000000 11010 11010 11010 00000000000 +# CHECK: encoding: [0x03,0x5a,0xd0,0x00] + add r26, r26, r26 + +# CHECK: add +# BINARY: 000000 11011 11011 11011 00000000000 +# CHECK: encoding: [0x03,0x7b,0xd8,0x00] + add r27, r27, r27 + +# CHECK: add +# BINARY: 000000 11100 11100 11100 00000000000 +# CHECK: encoding: [0x03,0x9c,0xe0,0x00] + add r28, r28, r28 + +# CHECK: add +# BINARY: 000000 11101 11101 11101 00000000000 +# CHECK: encoding: [0x03,0xbd,0xe8,0x00] + add r29, r29, r29 + +# CHECK: add +# BINARY: 000000 11110 11110 11110 00000000000 +# CHECK: encoding: [0x03,0xde,0xf0,0x00] + add r30, r30, r30 + +# CHECK: add +# BINARY: 000000 11111 11111 11111 00000000000 +# CHECK: encoding: [0x03,0xff,0xf8,0x00] + add r31, r31, r31 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000000000 +# CHECK: encoding: [0x20,0x00,0x00,0x00] + addi r0, r0, 0 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000000001 +# CHECK: encoding: [0x20,0x00,0x00,0x01] + addi r0, r0, 1 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000000010 +# CHECK: encoding: [0x20,0x00,0x00,0x02] + addi r0, r0, 2 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000000100 +# CHECK: encoding: [0x20,0x00,0x00,0x04] + addi r0, r0, 4 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000001000 +# CHECK: encoding: [0x20,0x00,0x00,0x08] + addi r0, r0, 8 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000010000 +# CHECK: encoding: [0x20,0x00,0x00,0x10] + addi r0, r0, 16 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000000100000 +# CHECK: encoding: [0x20,0x00,0x00,0x20] + addi r0, r0, 32 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000001000000 +# CHECK: encoding: [0x20,0x00,0x00,0x40] + addi r0, r0, 64 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000010000000 +# CHECK: encoding: [0x20,0x00,0x00,0x80] + addi r0, r0, 128 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000000100000000 +# CHECK: encoding: [0x20,0x00,0x01,0x00] + addi r0, r0, 256 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000001000000000 +# CHECK: encoding: [0x20,0x00,0x02,0x00] + addi r0, r0, 512 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000010000000000 +# CHECK: encoding: [0x20,0x00,0x04,0x00] + addi r0, r0, 1024 + +# CHECK: addi +# BINARY: 001000 00000 00000 0000100000000000 +# CHECK: encoding: [0x20,0x00,0x08,0x00] + addi r0, r0, 2048 + +# CHECK: addi +# BINARY: 001000 00000 00000 0001000000000000 +# CHECK: encoding: [0x20,0x00,0x10,0x00] + addi r0, r0, 4096 + +# CHECK: addi +# BINARY: 001000 00000 00000 0010000000000000 +# CHECK: encoding: [0x20,0x00,0x20,0x00] + addi r0, r0, 8192 + +# CHECK: addi +# BINARY: 001000 00000 00000 0100000000000000 +# CHECK: encoding: [0x20,0x00,0x40,0x00] + addi r0, r0, 16384 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111111111111 +# CHECK: encoding: [0x20,0x00,0xff,0xff] + addi r0, r0, -1 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111111111110 +# CHECK: encoding: [0x20,0x00,0xff,0xfe] + addi r0, r0, -2 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111111111100 +# CHECK: encoding: [0x20,0x00,0xff,0xfc] + addi r0, r0, -4 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111111111000 +# CHECK: encoding: [0x20,0x00,0xff,0xf8] + addi r0, r0, -8 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111111110000 +# CHECK: encoding: [0x20,0x00,0xff,0xf0] + addi r0, r0, -16 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111111100000 +# CHECK: encoding: [0x20,0x00,0xff,0xe0] + addi r0, r0, -32 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111111000000 +# CHECK: encoding: [0x20,0x00,0xff,0xc0] + addi r0, r0, -64 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111110000000 +# CHECK: encoding: [0x20,0x00,0xff,0x80] + addi r0, r0, -128 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111100000000 +# CHECK: encoding: [0x20,0x00,0xff,0x00] + addi r0, r0, -256 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111111000000000 +# CHECK: encoding: [0x20,0x00,0xfe,0x00] + addi r0, r0, -512 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111110000000000 +# CHECK: encoding: [0x20,0x00,0xfc,0x00] + addi r0, r0, -1024 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111100000000000 +# CHECK: encoding: [0x20,0x00,0xf8,0x00] + addi r0, r0, -2048 + +# CHECK: addi +# BINARY: 001000 00000 00000 1111000000000000 +# CHECK: encoding: [0x20,0x00,0xf0,0x00] + addi r0, r0, -4096 + +# CHECK: addi +# BINARY: 001000 00000 00000 1110000000000000 +# CHECK: encoding: [0x20,0x00,0xe0,0x00] + addi r0, r0, -8192 + +# CHECK: addi +# BINARY: 001000 00000 00000 1100000000000000 +# CHECK: encoding: [0x20,0x00,0xc0,0x00] + addi r0, r0, -16384 + +# CHECK: addi +# BINARY: 001000 00000 00000 1000000000000000 +# CHECK: encoding: [0x20,0x00,0x80,0x00] + addi r0, r0, -32768 diff --git a/test/MC/MBlaze/mblaze_pattern.s b/test/MC/MBlaze/mblaze_pattern.s new file mode 100644 index 000000000000..6bbc234e3d43 --- /dev/null +++ b/test/MC/MBlaze/mblaze_pattern.s @@ -0,0 +1,22 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to ensure that all FPU instructions can be parsed by the +# assembly parser correctly. + +# TYPE A: OPCODE RD RA RB FLAGS +# BINARY: 011011 00000 00000 00000 00000000000 + +# CHECK: pcmpbf +# BINARY: 100000 00000 00001 00010 10000000000 +# CHECK: encoding: [0x80,0x01,0x14,0x00] + pcmpbf r0, r1, r2 + +# CHECK: pcmpne +# BINARY: 100011 00000 00001 00010 10000000000 +# CHECK: encoding: [0x8c,0x01,0x14,0x00] + pcmpne r0, r1, r2 + +# CHECK: pcmpeq +# BINARY: 100010 00000 00001 00010 10000000000 +# CHECK: encoding: [0x88,0x01,0x14,0x00] + pcmpeq r0, r1, r2 diff --git a/test/MC/MBlaze/mblaze_shift.s b/test/MC/MBlaze/mblaze_shift.s new file mode 100644 index 000000000000..a25502b35094 --- /dev/null +++ b/test/MC/MBlaze/mblaze_shift.s @@ -0,0 +1,47 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to make sure that all of the TYPE-A instructions supported by +# the Microblaze can be parsed by the assembly parser. + +# TYPE A: OPCODE RD RA RB FLAGS +# BINARY: 000000 00000 00000 00000 00000000000 + +# CHECK: bsrl +# BINARY: 010001 00001 00010 00011 00000000000 +# CHECK: encoding: [0x44,0x22,0x18,0x00] + bsrl r1, r2, r3 + +# CHECK: bsra +# BINARY: 010001 00001 00010 00011 01000000000 +# CHECK: encoding: [0x44,0x22,0x1a,0x00] + bsra r1, r2, r3 + +# CHECK: bsll +# BINARY: 010001 00001 00010 00011 10000000000 +# CHECK: encoding: [0x44,0x22,0x1c,0x00] + bsll r1, r2, r3 + +# CHECK: bsrli +# BINARY: 011001 00001 00010 0000000000000000 +# CHECK: encoding: [0x64,0x22,0x00,0x00] + bsrli r1, r2, 0 + +# CHECK: bsrai +# BINARY: 011001 00001 00010 0000001000000000 +# CHECK: encoding: [0x64,0x22,0x02,0x00] + bsrai r1, r2, 0 + +# CHECK: bslli +# BINARY: 011001 00001 00010 0000010000000000 +# CHECK: encoding: [0x64,0x22,0x04,0x00] + bslli r1, r2, 0 + +# CHECK: sra +# BINARY: 100100 00001 00010 00000 00000000001 +# CHECK: encoding: [0x90,0x22,0x00,0x01] + sra r1, r2 + +# CHECK: srl +# BINARY: 100100 00001 00010 00000 00001000001 +# CHECK: encoding: [0x90,0x22,0x00,0x41] + srl r1, r2 diff --git a/test/MC/MBlaze/mblaze_special.s b/test/MC/MBlaze/mblaze_special.s new file mode 100644 index 000000000000..c55ec277c18a --- /dev/null +++ b/test/MC/MBlaze/mblaze_special.s @@ -0,0 +1,167 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to ensure that all special instructions and special registers can be +# parsed by the assembly parser correctly. + +# TYPE A: OPCODE RD RA RB FLAGS +# BINARY: 011011 00000 00000 00000 00000000000 + +# CHECK: mfs +# BINARY: 100101 00000 00000 10000 00000000000 +# CHECK: encoding: [0x94,0x00,0x80,0x00] + mfs r0, rpc + +# CHECK: msrclr +# BINARY: 100101 00000 100010 000000000000000 +# CHECK: encoding: [0x94,0x11,0x00,0x00] + msrclr r0, 0x0 + +# CHECK: msrset +# BINARY: 100101 00000 100000 000000000000000 +# CHECK: encoding: [0x94,0x10,0x00,0x00] + msrset r0, 0x0 + +# CHECK: mts +# BINARY: 100101 00000 00000 11 00000000000000 +# CHECK: encoding: [0x94,0x00,0xc0,0x00] + mts rpc, r0 + +# CHECK: wdc +# BINARY: 100100 00000 00000 00001 00001100100 +# CHECK: encoding: [0x90,0x00,0x08,0x64] + wdc r0, r1 + +# CHECK: wdc.clear +# BINARY: 100100 00000 00000 00001 00001100110 +# CHECK: encoding: [0x90,0x00,0x08,0x66] + wdc.clear r0, r1 + +# CHECK: wdc.flush +# BINARY: 100100 00000 00000 00001 00001110100 +# CHECK: encoding: [0x90,0x00,0x08,0x74] + wdc.flush r0, r1 + +# CHECK: wic +# BINARY: 100100 00000 00000 00001 00001101000 +# CHECK: encoding: [0x90,0x00,0x08,0x68] + wic r0, r1 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000000 +# CHECK: encoding: [0x94,0x20,0x80,0x00] + mfs r1, rpc + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000001 +# CHECK: encoding: [0x94,0x20,0x80,0x01] + mfs r1, rmsr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000011 +# CHECK: encoding: [0x94,0x20,0x80,0x03] + mfs r1, rear + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000101 +# CHECK: encoding: [0x94,0x20,0x80,0x05] + mfs r1, resr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000000111 +# CHECK: encoding: [0x94,0x20,0x80,0x07] + mfs r1, rfsr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000001011 +# CHECK: encoding: [0x94,0x20,0x80,0x0b] + mfs r1, rbtr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10000 00000001101 +# CHECK: encoding: [0x94,0x20,0x80,0x0d] + mfs r1, redr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000000 +# CHECK: encoding: [0x94,0x20,0x90,0x00] + mfs r1, rpid + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000001 +# CHECK: encoding: [0x94,0x20,0x90,0x01] + mfs r1, rzpr + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000010 +# CHECK: encoding: [0x94,0x20,0x90,0x02] + mfs r1, rtlbx + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000100 +# CHECK: encoding: [0x94,0x20,0x90,0x04] + mfs r1, rtlbhi + +# CHECK: mfs +# BINARY: 100101 00001 00000 10010 00000000011 +# CHECK: encoding: [0x94,0x20,0x90,0x03] + mfs r1, rtlblo + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000000 +# CHECK: encoding: [0x94,0x20,0xa0,0x00] + mfs r1, rpvr0 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000001 +# CHECK: encoding: [0x94,0x20,0xa0,0x01] + mfs r1, rpvr1 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000010 +# CHECK: encoding: [0x94,0x20,0xa0,0x02] + mfs r1, rpvr2 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000011 +# CHECK: encoding: [0x94,0x20,0xa0,0x03] + mfs r1, rpvr3 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000100 +# CHECK: encoding: [0x94,0x20,0xa0,0x04] + mfs r1, rpvr4 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000101 +# CHECK: encoding: [0x94,0x20,0xa0,0x05] + mfs r1, rpvr5 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000110 +# CHECK: encoding: [0x94,0x20,0xa0,0x06] + mfs r1, rpvr6 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000000111 +# CHECK: encoding: [0x94,0x20,0xa0,0x07] + mfs r1, rpvr7 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000001000 +# CHECK: encoding: [0x94,0x20,0xa0,0x08] + mfs r1, rpvr8 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000001001 +# CHECK: encoding: [0x94,0x20,0xa0,0x09] + mfs r1, rpvr9 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000001010 +# CHECK: encoding: [0x94,0x20,0xa0,0x0a] + mfs r1, rpvr10 + +# CHECK: mfs +# BINARY: 100101 00001 00000 10100 00000001011 +# CHECK: encoding: [0x94,0x20,0xa0,0x0b] + mfs r1, rpvr11 diff --git a/test/MC/MBlaze/mblaze_typea.s b/test/MC/MBlaze/mblaze_typea.s new file mode 100644 index 000000000000..a0735e482cbb --- /dev/null +++ b/test/MC/MBlaze/mblaze_typea.s @@ -0,0 +1,122 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to make sure that all of the TYPE-A instructions supported by +# the Microblaze can be parsed by the assembly parser. + +# TYPE A: OPCODE RD RA RB FLAGS +# BINARY: 000000 00000 00000 00000 00000000000 + +# CHECK: add +# BINARY: 000000 00001 00010 00011 00000000000 +# CHECK: encoding: [0x00,0x22,0x18,0x00] + add r1, r2, r3 + +# CHECK: addc +# BINARY: 000010 00001 00010 00011 00000000000 +# CHECK: encoding: [0x08,0x22,0x18,0x00] + addc r1, r2, r3 + +# CHECK: addk +# BINARY: 000100 00001 00010 00011 00000000000 +# CHECK: encoding: [0x10,0x22,0x18,0x00] + addk r1, r2, r3 + +# CHECK: addkc +# BINARY: 000110 00001 00010 00011 00000000000 +# CHECK: encoding: [0x18,0x22,0x18,0x00] + addkc r1, r2, r3 + +# CHECK: and +# BINARY: 100001 00001 00010 00011 00000000000 +# CHECK: encoding: [0x84,0x22,0x18,0x00] + and r1, r2, r3 + +# CHECK: andn +# BINARY: 100011 00001 00010 00011 00000000000 +# CHECK: encoding: [0x8c,0x22,0x18,0x00] + andn r1, r2, r3 + +# CHECK: cmp +# BINARY: 000101 00001 00010 00011 00000000001 +# CHECK: encoding: [0x14,0x22,0x18,0x01] + cmp r1, r2, r3 + +# CHECK: cmpu +# BINARY: 000101 00001 00010 00011 00000000011 +# CHECK: encoding: [0x14,0x22,0x18,0x03] + cmpu r1, r2, r3 + +# CHECK: idiv +# BINARY: 010010 00001 00010 00011 00000000000 +# CHECK: encoding: [0x48,0x22,0x18,0x00] + idiv r1, r2, r3 + +# CHECK: idivu +# BINARY: 010010 00001 00010 00011 00000000010 +# CHECK: encoding: [0x48,0x22,0x18,0x02] + idivu r1, r2, r3 + +# CHECK: mul +# BINARY: 010000 00001 00010 00011 00000000000 +# CHECK: encoding: [0x40,0x22,0x18,0x00] + mul r1, r2, r3 + +# CHECK: mulh +# BINARY: 010000 00001 00010 00011 00000000001 +# CHECK: encoding: [0x40,0x22,0x18,0x01] + mulh r1, r2, r3 + +# CHECK: mulhu +# BINARY: 010000 00001 00010 00011 00000000011 +# CHECK: encoding: [0x40,0x22,0x18,0x03] + mulhu r1, r2, r3 + +# CHECK: mulhsu +# BINARY: 010000 00001 00010 00011 00000000010 +# CHECK: encoding: [0x40,0x22,0x18,0x02] + mulhsu r1, r2, r3 + +# CHECK: or +# BINARY: 100000 00001 00010 00011 00000000000 +# CHECK: encoding: [0x80,0x22,0x18,0x00] + or r1, r2, r3 + +# CHECK: rsub +# BINARY: 000001 00001 00010 00011 00000000000 +# CHECK: encoding: [0x04,0x22,0x18,0x00] + rsub r1, r2, r3 + +# CHECK: rsubc +# BINARY: 000011 00001 00010 00011 00000000000 +# CHECK: encoding: [0x0c,0x22,0x18,0x00] + rsubc r1, r2, r3 + +# CHECK: rsubk +# BINARY: 000101 00001 00010 00011 00000000000 +# CHECK: encoding: [0x14,0x22,0x18,0x00] + rsubk r1, r2, r3 + +# CHECK: rsubkc +# BINARY: 000111 00001 00010 00011 00000000000 +# CHECK: encoding: [0x1c,0x22,0x18,0x00] + rsubkc r1, r2, r3 + +# CHECK: sext16 +# BINARY: 100100 00001 00010 00000 00001100001 +# CHECK: encoding: [0x90,0x22,0x00,0x61] + sext16 r1, r2 + +# CHECK: sext8 +# BINARY: 100100 00001 00010 00000 00001100000 +# CHECK: encoding: [0x90,0x22,0x00,0x60] + sext8 r1, r2 + +# CHECK: xor +# BINARY: 100010 00001 00010 00011 00000000000 +# CHECK: encoding: [0x88,0x22,0x18,0x00] + xor r1, r2, r3 + +# CHECK: nop +# BINARY: 100000 00000 00000 00000 00000000000 +# CHECK: encoding: [0x80,0x00,0x00,0x00] + nop diff --git a/test/MC/MBlaze/mblaze_typeb.s b/test/MC/MBlaze/mblaze_typeb.s new file mode 100644 index 000000000000..ac4f1e2932a7 --- /dev/null +++ b/test/MC/MBlaze/mblaze_typeb.s @@ -0,0 +1,92 @@ +# RUN: llvm-mc -triple mblaze-unknown-unknown -show-encoding %s | FileCheck %s + +# Test to make sure that all of the TYPE-B instructions supported by +# the Microblaze can be parsed by the assembly parser. + +# TYPE B: OPCODE RD RA IMMEDIATE +# 000000 00000 00000 0000000000000000 + +# CHECK: addi +# BINARY: 001000 00001 00010 0000000000001111 +# CHECK: encoding: [0x20,0x22,0x00,0x0f] + addi r1, r2, 0x000F + +# CHECK: addic +# BINARY: 001010 00001 00010 0000000000001111 +# CHECK: encoding: [0x28,0x22,0x00,0x0f] + addic r1, r2, 0x000F + +# CHECK: addik +# BINARY: 001100 00001 00010 0000000000001111 +# CHECK: encoding: [0x30,0x22,0x00,0x0f] + addik r1, r2, 0x000F + +# CHECK: addikc +# BINARY: 001110 00001 00010 0000000000001111 +# CHECK: encoding: [0x38,0x22,0x00,0x0f] + addikc r1, r2, 0x000F + +# CHECK: andi +# BINARY: 101001 00001 00010 0000000000001111 +# CHECK: encoding: [0xa4,0x22,0x00,0x0f] + andi r1, r2, 0x000F + +# CHECK: andni +# BINARY: 101011 00001 00010 0000000000001111 +# CHECK: encoding: [0xac,0x22,0x00,0x0f] + andni r1, r2, 0x000F + +# CHECK: muli +# BINARY: 011000 00001 00010 0000000000001111 +# CHECK: encoding: [0x60,0x22,0x00,0x0f] + muli r1, r2, 0x000F + +# CHECK: ori +# BINARY: 101000 00001 00010 0000000000001111 +# CHECK: encoding: [0xa0,0x22,0x00,0x0f] + ori r1, r2, 0x000F + +# CHECK: rsubi +# BINARY: 001001 00001 00010 0000000000001111 +# CHECK: encoding: [0x24,0x22,0x00,0x0f] + rsubi r1, r2, 0x000F + +# CHECK: rsubic +# BINARY: 001011 00001 00010 0000000000001111 +# CHECK: encoding: [0x2c,0x22,0x00,0x0f] + rsubic r1, r2, 0x000F + +# CHECK: rsubik +# BINARY: 001101 00001 00010 0000000000001111 +# CHECK: encoding: [0x34,0x22,0x00,0x0f] + rsubik r1, r2, 0x000F + +# CHECK: rsubikc +# BINARY: 001111 00001 00010 0000000000001111 +# CHECK: encoding: [0x3c,0x22,0x00,0x0f] + rsubikc r1, r2, 0x000F + +# CHECK: rtbd +# BINARY: 101101 10010 01111 0000000000001111 +# CHECK: encoding: [0xb6,0x4f,0x00,0x0f] + rtbd r15, 0x000F + +# CHECK: rted +# BINARY: 101101 10001 01111 0000000000001111 +# CHECK: encoding: [0xb6,0x8f,0x00,0x0f] + rted r15, 0x000F + +# CHECK: rtid +# BINARY: 101101 10001 01111 0000000000001111 +# CHECK: encoding: [0xb6,0x2f,0x00,0x0f] + rtid r15, 0x000F + +# CHECK: rtsd +# BINARY: 101101 10000 01111 0000000000001111 +# CHECK: encoding: [0xb6,0x0f,0x00,0x0f] + rtsd r15, 0x000F + +# CHECK: xori +# BINARY: 101010 00001 00010 0000000000001111 +# CHECK: encoding: [0xa8,0x22,0x00,0x0f] + xori r1, r2, 0x000F diff --git a/test/MC/MachO/absolutize.s b/test/MC/MachO/absolutize.s index 76acd5bccfbe..39571dddebd6 100644 --- a/test/MC/MachO/absolutize.s +++ b/test/MC/MachO/absolutize.s @@ -50,7 +50,7 @@ Ldata_expr_2 = Ldata_d - Ldata_c // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -103,7 +103,7 @@ Ldata_expr_2 = Ldata_d - Ldata_c // CHECK: (('word-0', 0xa1000000), // CHECK: ('word-1', 0x2)), // CHECK: ]) -// CHECK: ('_section_data', '1\xc01\xc01\xc01\xc0\xb8\xfe\xff\xff\xff\xb8\xfe\xff\xff\xff\xb8\x02\x00\x00\x00\xb8\x02\x00\x00\x00\xb8\x02\x00\x00\x00\xb8\x02\x00\x00\x00\xb8\xfe\xff\xff\xff') +// CHECK: ('_section_data', '31c031c0 31c031c0 b8feffff ffb8feff ffffb802 000000b8 02000000 b8020000 00b80200 0000b8fe ffffff') // CHECK: # Section 1 // CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -140,7 +140,7 @@ Ldata_expr_2 = Ldata_d - Ldata_c // CHECK: (('word-0', 0xa1000000), // CHECK: ('word-1', 0x2f)), // CHECK: ]) -// CHECK: ('_section_data', "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xfc\xff\xff\xff\xfc\xff\xff\xff\x04\x00\x00\x00\x04\x00\x00\x00\x04\x00\x00\x00\x04\x00\x00\x00'\x00\x00\x00") +// CHECK: ('_section_data', '00000000 00000000 00000000 00000000 fcffffff fcffffff 04000000 04000000 04000000 04000000 27000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/comm-1.s b/test/MC/MachO/comm-1.s index e979fb139204..5ffa979eb342 100644 --- a/test/MC/MachO/comm-1.s +++ b/test/MC/MachO/comm-1.s @@ -10,7 +10,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 228) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/darwin-ARM-reloc.s b/test/MC/MachO/darwin-ARM-reloc.s new file mode 100644 index 000000000000..86b45e07bf38 --- /dev/null +++ b/test/MC/MachO/darwin-ARM-reloc.s @@ -0,0 +1,171 @@ +@ RUN: llvm-mc -n -triple armv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + + .syntax unified + .text +_f0: + bl _printf + +_f1: + bl _f0 + + .data +_d0: +Ld0_0: + .long Lsc0_0 - Ld0_0 + + .section __TEXT,__cstring,cstring_literals +Lsc0_0: + .long 0 + +@ CHECK: ('cputype', 12) +@ CHECK: ('cpusubtype', 9) +@ CHECK: ('filetype', 1) +@ CHECK: ('num_load_commands', 3) +@ CHECK: ('load_commands_size', 364) +@ CHECK: ('flag', 0) +@ CHECK: ('load_commands', [ +@ CHECK: # Load Command 0 +@ CHECK: (('command', 1) +@ CHECK: ('size', 260) +@ CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('vm_addr', 0) +@ CHECK: ('vm_size', 16) +@ CHECK: ('file_offset', 392) +@ CHECK: ('file_size', 16) +@ CHECK: ('maxprot', 7) +@ CHECK: ('initprot', 7) +@ CHECK: ('num_sections', 3) +@ CHECK: ('flags', 0) +@ CHECK: ('sections', [ +@ CHECK: # Section 0 +@ CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 0) +@ CHECK: ('size', 8) +@ CHECK: ('offset', 392) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 408) +@ CHECK: ('num_reloc', 2) +@ CHECK: ('flags', 0x80000400) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0x4), +@ CHECK: ('word-1', 0x55000001)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0x0), +@ CHECK: ('word-1', 0x5d000003)), +@ CHECK: ]) +@ CHECK: ('_section_data', 'feffffeb fdffffeb') +@ CHECK: # Section 1 +@ CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 8) +@ CHECK: ('size', 4) +@ CHECK: ('offset', 400) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 424) +@ CHECK: ('num_reloc', 2) +@ CHECK: ('flags', 0x0) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0xa2000000), +@ CHECK: ('word-1', 0xc)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0xa1000000), +@ CHECK: ('word-1', 0x8)), +@ CHECK: ]) +@ CHECK: ('_section_data', '04000000') +@ CHECK: # Section 2 +@ CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 12) +@ CHECK: ('size', 4) +@ CHECK: ('offset', 404) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 0) +@ CHECK: ('num_reloc', 0) +@ CHECK: ('flags', 0x2) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: ]) +@ CHECK: ('_section_data', '00000000') +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 1 +@ CHECK: (('command', 2) +@ CHECK: ('size', 24) +@ CHECK: ('symoff', 440) +@ CHECK: ('nsyms', 4) +@ CHECK: ('stroff', 488) +@ CHECK: ('strsize', 24) +@ CHECK: ('_string_data', '\x00_printf\x00_f0\x00_f1\x00_d0\x00\x00\x00\x00') +@ CHECK: ('_symbols', [ +@ CHECK: # Symbol 0 +@ CHECK: (('n_strx', 9) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_f0') +@ CHECK: ), +@ CHECK: # Symbol 1 +@ CHECK: (('n_strx', 13) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 4) +@ CHECK: ('_string', '_f1') +@ CHECK: ), +@ CHECK: # Symbol 2 +@ CHECK: (('n_strx', 17) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 2) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 8) +@ CHECK: ('_string', '_d0') +@ CHECK: ), +@ CHECK: # Symbol 3 +@ CHECK: (('n_strx', 1) +@ CHECK: ('n_type', 0x1) +@ CHECK: ('n_sect', 0) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_printf') +@ CHECK: ), +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 2 +@ CHECK: (('command', 11) +@ CHECK: ('size', 80) +@ CHECK: ('ilocalsym', 0) +@ CHECK: ('nlocalsym', 3) +@ CHECK: ('iextdefsym', 3) +@ CHECK: ('nextdefsym', 0) +@ CHECK: ('iundefsym', 3) +@ CHECK: ('nundefsym', 1) +@ CHECK: ('tocoff', 0) +@ CHECK: ('ntoc', 0) +@ CHECK: ('modtaboff', 0) +@ CHECK: ('nmodtab', 0) +@ CHECK: ('extrefsymoff', 0) +@ CHECK: ('nextrefsyms', 0) +@ CHECK: ('indirectsymoff', 0) +@ CHECK: ('nindirectsyms', 0) +@ CHECK: ('extreloff', 0) +@ CHECK: ('nextrel', 0) +@ CHECK: ('locreloff', 0) +@ CHECK: ('nlocrel', 0) +@ CHECK: ('_indirect_symbols', [ +@ CHECK: ]) +@ CHECK: ), +@ CHECK: ]) diff --git a/test/MC/MachO/darwin-Thumb-reloc.s b/test/MC/MachO/darwin-Thumb-reloc.s new file mode 100644 index 000000000000..567573d9ef19 --- /dev/null +++ b/test/MC/MachO/darwin-Thumb-reloc.s @@ -0,0 +1,139 @@ +@ RUN: llvm-mc -n -triple thumbv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + + .syntax unified + .section __TEXT,__text,regular,pure_instructions + .globl _main + .align 2 + .code 16 + .thumb_func _main +_main: +LPC0_0: + blx _printf + .align 2 +LCPI0_0: + .long L_.str-(LPC0_0+4) + + .section __TEXT,__cstring,cstring_literals + .align 2 +L_.str: + .asciz "s0" + +.subsections_via_symbols + +@ CHECK: ('cputype', 12) +@ CHECK: ('cpusubtype', 9) +@ CHECK: ('filetype', 1) +@ CHECK: ('num_load_commands', 3) +@ CHECK: ('load_commands_size', 296) +@ CHECK: ('flag', 8192) +@ CHECK: ('load_commands', [ +@ CHECK: # Load Command 0 +@ CHECK: (('command', 1) +@ CHECK: ('size', 192) +@ CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('vm_addr', 0) +@ CHECK: ('vm_size', 11) +@ CHECK: ('file_offset', 324) +@ CHECK: ('file_size', 11) +@ CHECK: ('maxprot', 7) +@ CHECK: ('initprot', 7) +@ CHECK: ('num_sections', 2) +@ CHECK: ('flags', 0) +@ CHECK: ('sections', [ +@ CHECK: # Section 0 +@ CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 0) +@ CHECK: ('size', 8) +@ CHECK: ('offset', 324) +@ CHECK: ('alignment', 2) +@ CHECK: ('reloc_offset', 336) +@ CHECK: ('num_reloc', 3) +@ CHECK: ('flags', 0x80000400) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0xa2000004), +@ CHECK: ('word-1', 0x8)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0xa1000000), +@ CHECK: ('word-1', 0x0)), +@ CHECK: # Relocation 2 +@ CHECK: (('word-0', 0x0), +@ CHECK: ('word-1', 0x6d000001)), +@ CHECK: ]) +@ CHECK-FIXME: ('_section_data', 'fff7feef 04000000') +@ CHECK: # Section 1 +@ CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 8) +@ CHECK: ('size', 3) +@ CHECK: ('offset', 332) +@ CHECK: ('alignment', 2) +@ CHECK: ('reloc_offset', 0) +@ CHECK: ('num_reloc', 0) +@ CHECK: ('flags', 0x2) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: ]) +@ CHECK: ('_section_data', '733000') +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 1 +@ CHECK: (('command', 2) +@ CHECK: ('size', 24) +@ CHECK: ('symoff', 360) +@ CHECK: ('nsyms', 2) +@ CHECK: ('stroff', 384) +@ CHECK: ('strsize', 16) +@ CHECK: ('_string_data', '\x00_main\x00_printf\x00\x00') +@ CHECK: ('_symbols', [ +@ CHECK: # Symbol 0 +@ CHECK: (('n_strx', 1) +@ CHECK: ('n_type', 0xf) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 8) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_main') +@ CHECK: ), +@ CHECK: # Symbol 1 +@ CHECK: (('n_strx', 7) +@ CHECK: ('n_type', 0x1) +@ CHECK: ('n_sect', 0) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_printf') +@ CHECK: ), +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 2 +@ CHECK: (('command', 11) +@ CHECK: ('size', 80) +@ CHECK: ('ilocalsym', 0) +@ CHECK: ('nlocalsym', 0) +@ CHECK: ('iextdefsym', 0) +@ CHECK: ('nextdefsym', 1) +@ CHECK: ('iundefsym', 1) +@ CHECK: ('nundefsym', 1) +@ CHECK: ('tocoff', 0) +@ CHECK: ('ntoc', 0) +@ CHECK: ('modtaboff', 0) +@ CHECK: ('nmodtab', 0) +@ CHECK: ('extrefsymoff', 0) +@ CHECK: ('nextrefsyms', 0) +@ CHECK: ('indirectsymoff', 0) +@ CHECK: ('nindirectsyms', 0) +@ CHECK: ('extreloff', 0) +@ CHECK: ('nextrel', 0) +@ CHECK: ('locreloff', 0) +@ CHECK: ('nlocrel', 0) +@ CHECK: ('_indirect_symbols', [ +@ CHECK: ]) +@ CHECK: ), +@ CHECK: ]) diff --git a/test/MC/MachO/darwin-complex-difference.s b/test/MC/MachO/darwin-complex-difference.s new file mode 100644 index 000000000000..e66bd096711f --- /dev/null +++ b/test/MC/MachO/darwin-complex-difference.s @@ -0,0 +1,129 @@ +// RUN: llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o %t.o +// RUN: macho-dump --dump-section-data < %t.o > %t.dump +// RUN: FileCheck < %t.dump %s + +_a: +L0: + .long 1 +L1: + .long 2 + .long _c - _d + 4 + .long (_c - L0) - (_d - L1) // == (_c - _d) + (L1 - L0) + // == (_c - _d + 4) +_c: + .long 0 +_d: + .long 0 + +// CHECK: ('cputype', 16777223) +// CHECK: ('cpusubtype', 3) +// CHECK: ('filetype', 1) +// CHECK: ('num_load_commands', 3) +// CHECK: ('load_commands_size', 256) +// CHECK: ('flag', 0) +// CHECK: ('reserved', 0) +// CHECK: ('load_commands', [ +// CHECK: # Load Command 0 +// CHECK: (('command', 25) +// CHECK: ('size', 152) +// CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('vm_addr', 0) +// CHECK: ('vm_size', 24) +// CHECK: ('file_offset', 288) +// CHECK: ('file_size', 24) +// CHECK: ('maxprot', 7) +// CHECK: ('initprot', 7) +// CHECK: ('num_sections', 1) +// CHECK: ('flags', 0) +// CHECK: ('sections', [ +// CHECK: # Section 0 +// CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('address', 0) +// CHECK: ('size', 24) +// CHECK: ('offset', 288) +// CHECK: ('alignment', 0) +// CHECK: ('reloc_offset', 312) +// CHECK: ('num_reloc', 4) +// CHECK: ('flags', 0x80000000) +// CHECK: ('reserved1', 0) +// CHECK: ('reserved2', 0) +// CHECK: ('reserved3', 0) +// CHECK: ), +// CHECK: ('_relocations', [ +// CHECK: # Relocation 0 +// CHECK: (('word-0', 0xc), +// CHECK: ('word-1', 0x5c000002)), +// CHECK: # Relocation 1 +// CHECK: (('word-0', 0xc), +// CHECK: ('word-1', 0xc000001)), +// CHECK: # Relocation 2 +// CHECK: (('word-0', 0x8), +// CHECK: ('word-1', 0x5c000002)), +// CHECK: # Relocation 3 +// CHECK: (('word-0', 0x8), +// CHECK: ('word-1', 0xc000001)), +// CHECK: ]) +// CHECK: ('_section_data', '01000000 02000000 04000000 04000000 00000000 00000000') +// CHECK: ]) +// CHECK: ), +// CHECK: # Load Command 1 +// CHECK: (('command', 2) +// CHECK: ('size', 24) +// CHECK: ('symoff', 344) +// CHECK: ('nsyms', 3) +// CHECK: ('stroff', 392) +// CHECK: ('strsize', 12) +// CHECK: ('_string_data', '\x00_a\x00_c\x00_d\x00\x00\x00') +// CHECK: ('_symbols', [ +// CHECK: # Symbol 0 +// CHECK: (('n_strx', 1) +// CHECK: ('n_type', 0xe) +// CHECK: ('n_sect', 1) +// CHECK: ('n_desc', 0) +// CHECK: ('n_value', 0) +// CHECK: ('_string', '_a') +// CHECK: ), +// CHECK: # Symbol 1 +// CHECK: (('n_strx', 4) +// CHECK: ('n_type', 0xe) +// CHECK: ('n_sect', 1) +// CHECK: ('n_desc', 0) +// CHECK: ('n_value', 16) +// CHECK: ('_string', '_c') +// CHECK: ), +// CHECK: # Symbol 2 +// CHECK: (('n_strx', 7) +// CHECK: ('n_type', 0xe) +// CHECK: ('n_sect', 1) +// CHECK: ('n_desc', 0) +// CHECK: ('n_value', 20) +// CHECK: ('_string', '_d') +// CHECK: ), +// CHECK: ]) +// CHECK: ), +// CHECK: # Load Command 2 +// CHECK: (('command', 11) +// CHECK: ('size', 80) +// CHECK: ('ilocalsym', 0) +// CHECK: ('nlocalsym', 3) +// CHECK: ('iextdefsym', 3) +// CHECK: ('nextdefsym', 0) +// CHECK: ('iundefsym', 3) +// CHECK: ('nundefsym', 0) +// CHECK: ('tocoff', 0) +// CHECK: ('ntoc', 0) +// CHECK: ('modtaboff', 0) +// CHECK: ('nmodtab', 0) +// CHECK: ('extrefsymoff', 0) +// CHECK: ('nextrefsyms', 0) +// CHECK: ('indirectsymoff', 0) +// CHECK: ('nindirectsyms', 0) +// CHECK: ('extreloff', 0) +// CHECK: ('nextrel', 0) +// CHECK: ('locreloff', 0) +// CHECK: ('nlocrel', 0) +// CHECK: ('_indirect_symbols', [ +// CHECK: ]) +// CHECK: ), +// CHECK: ]) diff --git a/test/MC/MachO/darwin-x86_64-diff-relocs.s b/test/MC/MachO/darwin-x86_64-diff-relocs.s index 38fa074fde22..449d2f593e73 100644 --- a/test/MC/MachO/darwin-x86_64-diff-relocs.s +++ b/test/MC/MachO/darwin-x86_64-diff-relocs.s @@ -120,7 +120,7 @@ L3: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/darwin-x86_64-reloc-offsets.s b/test/MC/MachO/darwin-x86_64-reloc-offsets.s index ab6820e4a82a..f748064b2bf9 100644 --- a/test/MC/MachO/darwin-x86_64-reloc-offsets.s +++ b/test/MC/MachO/darwin-x86_64-reloc-offsets.s @@ -117,7 +117,7 @@ L1: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) @@ -277,7 +277,7 @@ L1: // CHECK: (('word-0', 0x2), // CHECK: ('word-1', 0x6d000000)), // CHECK: ]) -// CHECK: ('_section_data', '\xc6\x05\xff\xff\xff\xff\x12\xc6\x05\x00\x00\x00\x00\x12\xc7\x05\xfc\xff\xff\xffxV4\x12\xc7\x05\xfd\xff\xff\xffxV4\x12\xc7\x05\xfe\xff\xff\xffxV4\x12\xc7\x05\xff\xff\xff\xffxV4\x12\xc7\x05\x00\x00\x00\x00xV4\x12\x88\x05\x00\x00\x00\x00\x88\x05\x01\x00\x00\x00\x89\x05\x00\x00\x00\x00\x89\x05\x01\x00\x00\x00\x89\x05\x02\x00\x00\x00\x89\x05\x03\x00\x00\x00\x89\x05\x04\x00\x00\x00\xc6\x05\xdd\x00\x00\x00\x12\xc6\x05\xd7\x00\x00\x00\x12\xc7\x05\xcc\x00\x00\x00xV4\x12\xc7\x05\xc3\x00\x00\x00xV4\x12\xc7\x05\xba\x00\x00\x00xV4\x12\xc7\x05\xb1\x00\x00\x00xV4\x12\xc7\x05\xa8\x00\x00\x00xV4\x12\x88\x05\x9e\x00\x00\x00\x88\x05\x99\x00\x00\x00\x89\x05\x92\x00\x00\x00\x89\x05\x8d\x00\x00\x00\x89\x05\x88\x00\x00\x00\x89\x05\x83\x00\x00\x00\x89\x05~\x00\x00\x00\xc6\x05\x03\x00\x00\x00\x12\xc6\x05\x04\x00\x00\x00\x12\xc7\x05\x00\x00\x00\x00xV4\x12\xc7\x05\x01\x00\x00\x00xV4\x12\xc7\x05\x02\x00\x00\x00xV4\x12\xc7\x05\x03\x00\x00\x00xV4\x12\xc7\x05\x04\x00\x00\x00xV4\x12\x88\x05\x04\x00\x00\x00\x88\x05\x05\x00\x00\x00\x89\x05\x04\x00\x00\x00\x89\x05\x05\x00\x00\x00\x89\x05\x06\x00\x00\x00\x89\x05\x07\x00\x00\x00\x89\x05\x08\x00\x00\x00') +// CHECK: ('_section_data', 'c605ffff ffff12c6 05000000 0012c705 fcffffff 78563412 c705fdff ffff7856 3412c705 feffffff 78563412 c705ffff ffff7856 3412c705 00000000 78563412 88050000 00008805 01000000 89050000 00008905 01000000 89050200 00008905 03000000 89050400 0000c605 dd000000 12c605d7 00000012 c705cc00 00007856 3412c705 c3000000 78563412 c705ba00 00007856 3412c705 b1000000 78563412 c705a800 00007856 34128805 9e000000 88059900 00008905 92000000 89058d00 00008905 88000000 89058300 00008905 7e000000 c6050300 000012c6 05040000 0012c705 00000000 78563412 c7050100 00007856 3412c705 02000000 78563412 c7050300 00007856 3412c705 04000000 78563412 88050400 00008805 05000000 89050400 00008905 05000000 89050600 00008905 07000000 89050800 0000') // CHECK: # Section 1 // CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -294,7 +294,7 @@ L1: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', '00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/darwin-x86_64-reloc.s b/test/MC/MachO/darwin-x86_64-reloc.s index 19b434565a29..83c0de788f86 100644 --- a/test/MC/MachO/darwin-x86_64-reloc.s +++ b/test/MC/MachO/darwin-x86_64-reloc.s @@ -90,7 +90,7 @@ L6: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 496) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) @@ -139,7 +139,7 @@ L6: // CHECK: (('word-0', 0x4), // CHECK: ('word-1', 0x4d000008)), // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x04\x00\x00\x00\x04\x00\x00\x00\x00\x00\x00\x00\x1f\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00/\x01\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', '00000000 04000000 04000000 00000000 1f010000 00000000 00000000 00000000 2f010000 00000000') // CHECK: # Section 1 // CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -252,7 +252,7 @@ L6: // CHECK: (('word-0', 0x2), // CHECK: ('word-1', 0x2d000000)), // CHECK: ]) -// CHECK: ('_section_data', '\xc3\xe8\x00\x00\x00\x00\xe8\x04\x00\x00\x00H\x8b\x05\x00\x00\x00\x00\xff5\x00\x00\x00\x00\x8b\x05\x00\x00\x00\x00\x8b\x05\x04\x00\x00\x00\xc6\x05\xff\xff\xff\xff\x12\xc7\x05\xfc\xff\xff\xffxV4\x12\x00\x00\x00\x00\x00\x00\x00\x00\x04\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x04\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00H\x8d\x05,\x00\x00\x00H\x8d\x05\x14\x00\x00\x00\x83\x05\x13\x00\x00\x00\x06f\x81\x05\x12\x00\x00\x00\xf4\x01\x81\x05\x10\x00\x00\x00\xf4\x01\x00\x00\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90,\x00\x00\x00\x00\x00\x00\x00\x14\x00\x00\x00\x00\x00\x00\x00\xe4\xff\xff\xff\xff\xff\xff\xff\xd4\xff\xff\xff\xff\xff\xff\xff,\x00\x00\x00\x00\x00\x00\x00\x83\xc0\x00\x03\x04%\x03\x00\x00\x00\x8b\x05\x1f\xff\xff\xff\x8b\x05,\x00\x00\x00\x8b\x05\x00\x00\x00\x00\x8b\x050\x00\x00\x00H\x83=\xff\xff\xff\xff\x00') +// CHECK: ('_section_data', 'c3e80000 0000e804 00000048 8b050000 0000ff35 00000000 8b050000 00008b05 04000000 c605ffff ffff12c7 05fcffff ff785634 12000000 00000000 00040000 00000000 00000000 00000000 00040000 00000000 00000000 00488d05 2c000000 488d0514 00000083 05130000 00066681 05120000 00f40181 05100000 00f40100 00909090 90909090 90909090 902c0000 00000000 00140000 00000000 00e4ffff ffffffff ffd4ffff ffffffff ff2c0000 00000000 0083c000 03042503 0000008b 051fffff ff8b052c 0000008b 05000000 008b0530 00000048 833dffff ffff00') // CHECK: # Section 2 // CHECK: (('section_name', '__debug_frame\x00\x00\x00') // CHECK: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -275,7 +275,7 @@ L6: // CHECK: (('word-0', 0x0), // CHECK: ('word-1', 0x6000002)), // CHECK: ]) -// CHECK: ('_section_data', '\xd5\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', 'd5000000 00000000 00000000 00000000') // CHECK: # Section 3 // CHECK: (('section_name', '__literal8\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -292,7 +292,7 @@ L6: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', '00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/diff-with-two-sections.s b/test/MC/MachO/diff-with-two-sections.s new file mode 100644 index 000000000000..b5e09885f318 --- /dev/null +++ b/test/MC/MachO/diff-with-two-sections.s @@ -0,0 +1,64 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + + .section __TEXT,__text,regular,pure_instructions +Leh_func_begin0: + .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support +Ltmp3: +Ltmp4 = Leh_func_begin0-Ltmp3 + .long Ltmp4 + +// CHECK: ('cputype', 7) +// CHECK-NEXT: ('cpusubtype', 3) +// CHECK-NEXT: ('filetype', 1) +// CHECK-NEXT: ('num_load_commands', 1) +// CHECK-NEXT: ('load_commands_size', 192) +// CHECK-NEXT: ('flag', 0) +// CHECK-NEXT: ('load_commands', [ +// CHECK-NEXT: # Load Command 0 +// CHECK-NEXT: (('command', 1) +// CHECK-NEXT: ('size', 192) +// CHECK-NEXT: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('vm_addr', 0) +// CHECK-NEXT: ('vm_size', 4) +// CHECK-NEXT: ('file_offset', 220) +// CHECK-NEXT: ('file_size', 4) +// CHECK-NEXT: ('maxprot', 7) +// CHECK-NEXT: ('initprot', 7) +// CHECK-NEXT: ('num_sections', 2) +// CHECK-NEXT: ('flags', 0) +// CHECK-NEXT: ('sections', [ +// CHECK-NEXT: # Section 0 +// CHECK-NEXT: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 0) +// CHECK-NEXT: ('offset', 220) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x80000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '') +// CHECK-NEXT: # Section 1 +// CHECK-NEXT: (('section_name', '__eh_frame\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 4) +// CHECK-NEXT: ('offset', 220) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x6800000b) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '00000000') +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/MachO/direction_labels.s b/test/MC/MachO/direction_labels.s index 5a68f7f51dff..e224ed3a1473 100644 --- a/test/MC/MachO/direction_labels.s +++ b/test/MC/MachO/direction_labels.s @@ -14,7 +14,7 @@ direction_labels: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 228) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -46,7 +46,7 @@ direction_labels: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x90\xeb\xfd\x90u\x00\x90u\xfd\xeb\x00\x90\xc3') +// CHECK: ('_section_data', '90ebfd90 75009075 fdeb0090 c3') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/empty-dwarf-lines.s b/test/MC/MachO/empty-dwarf-lines.s new file mode 100644 index 000000000000..4bdc16b55f5c --- /dev/null +++ b/test/MC/MachO/empty-dwarf-lines.s @@ -0,0 +1,25 @@ +// RUN: llvm-mc -triple x86_64-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s + +// This tests that when producing files for darwin9 or older we make sure +// that debug_line sections are of a minimum size to avoid the linker bug +// described in PR8715. + + .section __DATA,__data + .file 1 "test.c" + .globl _c ## @c +_c: + .asciz "hi\n" + +// CHECK: (('section_name', '__debug_line\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 4) +// CHECK-NEXT: ('size', 44) +// CHECK-NEXT: ('offset', 452) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x2000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ('reserved3', 0) +// CHECK-NEXT: ), diff --git a/test/MC/MachO/indirect-symbols.s b/test/MC/MachO/indirect-symbols.s index 45a62f6bb2cd..90fd23154754 100644 --- a/test/MC/MachO/indirect-symbols.s +++ b/test/MC/MachO/indirect-symbols.s @@ -23,7 +23,7 @@ _e: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -71,7 +71,7 @@ _e: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\xf4\xf4\xf4\xf4\xf4\xf4\xf4\xf4\xf4\xf4\xf4\xf4\xf4\xf4\xf4') +// CHECK: ('_section_data', 'f4f4f4f4 f4f4f4f4 f4f4f4f4 f4f4f4') // CHECK: # Section 2 // CHECK: (('section_name', '__pointers\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__IMPORT\x00\x00\x00\x00\x00\x00\x00\x00') @@ -87,7 +87,7 @@ _e: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', '00000000 00000000 00000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/jcc.s b/test/MC/MachO/jcc.s index 7640429a79de..2288a20fa273 100644 --- a/test/MC/MachO/jcc.s +++ b/test/MC/MachO/jcc.s @@ -10,7 +10,7 @@ 1: nop jc 1f 1: nop - jcxz 1f + jecxz 1f 1: nop jecxz 1f 1: nop @@ -100,7 +100,7 @@ // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', 'w\x00\x90s\x00\x90r\x00\x90v\x00\x90r\x00\x90\xe3\x00\x90\xe3\x00\x90t\x00\x90\x7f\x00\x90}\x00\x90|\x00\x90~\x00\x90v\x00\x90r\x00\x90s\x00\x90w\x00\x90s\x00\x90u\x00\x90~\x00\x90|\x00\x90}\x00\x90\x7f\x00\x90q\x00\x90{\x00\x90y\x00\x90u\x00\x90p\x00\x90z\x00\x90z\x00\x90{\x00\x90x\x00\x90t\x00\x90') +// CHECK: ('_section_data', '77009073 00907200 90760090 720090e3 0090e300 90740090 7f00907d 00907c00 907e0090 76009072 00907300 90770090 73009075 00907e00 907c0090 7d00907f 00907100 907b0090 79009075 00907000 907a0090 7a00907b 00907800 90740090') // CHECK: ]) // CHECK: ), // CHECK: ]) diff --git a/test/MC/MachO/lcomm-attributes.s b/test/MC/MachO/lcomm-attributes.s index 2685395e1ede..1e9592438fe0 100644 --- a/test/MC/MachO/lcomm-attributes.s +++ b/test/MC/MachO/lcomm-attributes.s @@ -17,7 +17,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/loc.s b/test/MC/MachO/loc.s new file mode 100644 index 000000000000..6e7faa3bf9aa --- /dev/null +++ b/test/MC/MachO/loc.s @@ -0,0 +1,25 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + + .file 1 "foo" + .loc 1 64 0 + nop + +// CHECK: # Section 1 +// CHECK-NEXT: (('section_name', '__debug_line\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 1) +// CHECK-NEXT: ('size', 51) +// CHECK-NEXT: ('offset', 221) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 272) +// CHECK-NEXT: ('num_reloc', 1) +// CHECK-NEXT: ('flags', 0x2000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('word-0', 0x27), +// CHECK-NEXT: ('word-1', 0x4000001)), +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '2f000000 02001a00 00000101 fb0e0d00 01010101 00000001 00000100 666f6f00 00000000 00050200 00000003 3f010201 000101') diff --git a/test/MC/MachO/pcrel-to-other-section.s b/test/MC/MachO/pcrel-to-other-section.s new file mode 100644 index 000000000000..22a7822d9576 --- /dev/null +++ b/test/MC/MachO/pcrel-to-other-section.s @@ -0,0 +1,107 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + +nop + .section __TEXT,__StaticInit,regular,pure_instructions + calll foo + +// CHECK: ('cputype', 7) +// CHECK-NEXT: ('cpusubtype', 3) +// CHECK-NEXT: ('filetype', 1) +// CHECK-NEXT: ('num_load_commands', 3) +// CHECK-NEXT: ('load_commands_size', 296) +// CHECK-NEXT: ('flag', 0) +// CHECK-NEXT: ('load_commands', [ +// CHECK-NEXT: # Load Command 0 +// CHECK-NEXT: (('command', 1) +// CHECK-NEXT: ('size', 192) +// CHECK-NEXT: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('vm_addr', 0) +// CHECK-NEXT: ('vm_size', 6) +// CHECK-NEXT: ('file_offset', 324) +// CHECK-NEXT: ('file_size', 6) +// CHECK-NEXT: ('maxprot', 7) +// CHECK-NEXT: ('initprot', 7) +// CHECK-NEXT: ('num_sections', 2) +// CHECK-NEXT: ('flags', 0) +// CHECK-NEXT: ('sections', [ +// CHECK-NEXT: # Section 0 +// CHECK-NEXT: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 1) +// CHECK-NEXT: ('offset', 324) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x80000400) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '90') +// CHECK-NEXT: # Section 1 +// CHECK-NEXT: (('section_name', '__StaticInit\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 1) +// CHECK-NEXT: ('size', 5) +// CHECK-NEXT: ('offset', 325) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 332) +// CHECK-NEXT: ('num_reloc', 1) +// CHECK-NEXT: ('flags', 0x80000400) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('word-0', 0x1), +// CHECK-NEXT: ('word-1', 0xd000000)), +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', 'e8faffff ff') +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 1 +// CHECK-NEXT: (('command', 2) +// CHECK-NEXT: ('size', 24) +// CHECK-NEXT: ('symoff', 340) +// CHECK-NEXT: ('nsyms', 1) +// CHECK-NEXT: ('stroff', 352) +// CHECK-NEXT: ('strsize', 8) +// CHECK-NEXT: ('_string_data', '\x00foo\x00\x00\x00\x00') +// CHECK-NEXT: ('_symbols', [ +// CHECK-NEXT: # Symbol 0 +// CHECK-NEXT: (('n_strx', 1) +// CHECK-NEXT: ('n_type', 0x1) +// CHECK-NEXT: ('n_sect', 0) +// CHECK-NEXT: ('n_desc', 0) +// CHECK-NEXT: ('n_value', 0) +// CHECK-NEXT: ('_string', 'foo') +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 2 +// CHECK-NEXT: (('command', 11) +// CHECK-NEXT: ('size', 80) +// CHECK-NEXT: ('ilocalsym', 0) +// CHECK-NEXT: ('nlocalsym', 0) +// CHECK-NEXT: ('iextdefsym', 0) +// CHECK-NEXT: ('nextdefsym', 0) +// CHECK-NEXT: ('iundefsym', 0) +// CHECK-NEXT: ('nundefsym', 1) +// CHECK-NEXT: ('tocoff', 0) +// CHECK-NEXT: ('ntoc', 0) +// CHECK-NEXT: ('modtaboff', 0) +// CHECK-NEXT: ('nmodtab', 0) +// CHECK-NEXT: ('extrefsymoff', 0) +// CHECK-NEXT: ('nextrefsyms', 0) +// CHECK-NEXT: ('indirectsymoff', 0) +// CHECK-NEXT: ('nindirectsyms', 0) +// CHECK-NEXT: ('extreloff', 0) +// CHECK-NEXT: ('nextrel', 0) +// CHECK-NEXT: ('locreloff', 0) +// CHECK-NEXT: ('nlocrel', 0) +// CHECK-NEXT: ('_indirect_symbols', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/MachO/relax-jumps.s b/test/MC/MachO/relax-jumps.s index 9c58aa768258..65a51e92b37c 100644 --- a/test/MC/MachO/relax-jumps.s +++ b/test/MC/MachO/relax-jumps.s @@ -10,9 +10,9 @@ // diff $f.{as,mc}.dump) // to examine the results in a more sensible fashion. -// CHECK: ('_section_data', '\x90 -// CHECK: \x0f\x842\xff\xff\xff\x0f\x82\xe6\x00\x00\x00\x0f\x87&\xff\xff\xff\x0f\x8f\xda\x00\x00\x00\x0f\x88\x1a\xff\xff\xff\x0f\x83\xce\x00\x00\x00\x0f\x89\x0e\xff\xff\xff\x90 -// CHECK: \x901\xc0') +// CHECK: ('_section_data', '90 +// CHECK: 0f8432ff ffff0f82 e6000000 0f8726ff ffff0f8f da000000 0f881aff ffff0f83 ce000000 0f890eff ffff90 +// CHECK: 9031c0') L1: .space 200, 0x90 diff --git a/test/MC/MachO/reloc-pcrel-offset.s b/test/MC/MachO/reloc-pcrel-offset.s index 46dc3a9c57d8..e0f12bf4ba2f 100644 --- a/test/MC/MachO/reloc-pcrel-offset.s +++ b/test/MC/MachO/reloc-pcrel-offset.s @@ -4,7 +4,7 @@ // CHECK: (('word-0', 0x1), // CHECK: ('word-1', 0x5000002)), // CHECK-NEXT: ]) -// CHECK: ('_section_data', '\xe8\xfb\xff\xff\xff') +// CHECK: ('_section_data', 'e8fbffff ff') .data .long 0 diff --git a/test/MC/MachO/reloc.s b/test/MC/MachO/reloc.s index f91f42559b0f..f6a3446b51b4 100644 --- a/test/MC/MachO/reloc.s +++ b/test/MC/MachO/reloc.s @@ -37,6 +37,7 @@ L0: .text _f0: L1: + jmp 0xbabecafe jmp L0 jmp L1 ret @@ -55,7 +56,7 @@ _f1: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -64,9 +65,9 @@ _f1: // CHECK: ('size', 260) // CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('vm_addr', 0) -// CHECK: ('vm_size', 71) +// CHECK: ('vm_size', 76) // CHECK: ('file_offset', 392) -// CHECK: ('file_size', 71) +// CHECK: ('file_size', 76) // CHECK: ('maxprot', 7) // CHECK: ('initprot', 7) // CHECK: ('num_sections', 3) @@ -76,29 +77,32 @@ _f1: // CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('address', 0) -// CHECK: ('size', 8) +// CHECK: ('size', 13) // CHECK: ('offset', 392) // CHECK: ('alignment', 0) -// CHECK: ('reloc_offset', 464) -// CHECK: ('num_reloc', 1) +// CHECK: ('reloc_offset', 468) +// CHECK: ('num_reloc', 2) // CHECK: ('flags', 0x80000400) // CHECK: ('reserved1', 0) // CHECK: ('reserved2', 0) // CHECK: ), // CHECK: ('_relocations', [ // CHECK: # Relocation 0 -// CHECK: (('word-0', 0x1), +// CHECK: (('word-0', 0x6), // CHECK: ('word-1', 0x5000003)), +// CHECK: # Relocation 1 +// CHECK: (('word-0', 0x1), +// CHECK: ('word-1', 0x5000000)), // CHECK: ]) -// CHECK: ('_section_data', '\xe9:\x00\x00\x00\xeb\xf9\xc3') +// CHECK: ('_section_data', 'e9f9cabe bae93a00 0000ebf4 c3') // CHECK: # Section 1 // CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -// CHECK: ('address', 8) +// CHECK: ('address', 13) // CHECK: ('size', 51) -// CHECK: ('offset', 400) +// CHECK: ('offset', 405) // CHECK: ('alignment', 0) -// CHECK: ('reloc_offset', 472) +// CHECK: ('reloc_offset', 484) // CHECK: ('num_reloc', 11) // CHECK: ('flags', 0x0) // CHECK: ('reserved1', 0) @@ -113,22 +117,22 @@ _f1: // CHECK: ('word-1', 0xc000007)), // CHECK: # Relocation 2 // CHECK: (('word-0', 0x8000002a), -// CHECK: ('word-1', 0x18)), +// CHECK: ('word-1', 0x1d)), // CHECK: # Relocation 3 // CHECK: (('word-0', 0x90000028), -// CHECK: ('word-1', 0x18)), +// CHECK: ('word-1', 0x1d)), // CHECK: # Relocation 4 // CHECK: (('word-0', 0xa0000024), -// CHECK: ('word-1', 0x18)), +// CHECK: ('word-1', 0x1d)), // CHECK: # Relocation 5 // CHECK: (('word-0', 0xa0000020), -// CHECK: ('word-1', 0x18)), +// CHECK: ('word-1', 0x1d)), // CHECK: # Relocation 6 // CHECK: (('word-0', 0xa4000014), -// CHECK: ('word-1', 0x1c)), +// CHECK: ('word-1', 0x21)), // CHECK: # Relocation 7 // CHECK: (('word-0', 0xa1000000), -// CHECK: ('word-1', 0x24)), +// CHECK: ('word-1', 0x29)), // CHECK: # Relocation 8 // CHECK: (('word-0', 0x8), // CHECK: ('word-1', 0x4000002)), @@ -139,15 +143,15 @@ _f1: // CHECK: (('word-0', 0x0), // CHECK: ('word-1', 0xc000009)), // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x04\x00\x00\x00\x10\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xed\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x19\x00\x00\x00"\x00\x00\x00,\x00q\x00\x00\x00\x00\x04\x00\x00\x00') +// CHECK: ('_section_data', '00000000 04000000 15000000 00000000 00000000 ed000000 00000000 00000000 1e000000 27000000 31007600 00000004 000000') // CHECK: # Section 2 // CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -// CHECK: ('address', 59) +// CHECK: ('address', 64) // CHECK: ('size', 12) -// CHECK: ('offset', 451) +// CHECK: ('offset', 456) // CHECK: ('alignment', 0) -// CHECK: ('reloc_offset', 560) +// CHECK: ('reloc_offset', 572) // CHECK: ('num_reloc', 4) // CHECK: ('flags', 0x0) // CHECK: ('reserved1', 0) @@ -162,20 +166,20 @@ _f1: // CHECK: ('word-1', 0x4000003)), // CHECK: # Relocation 2 // CHECK: (('word-0', 0xa4000000), -// CHECK: ('word-1', 0x18)), +// CHECK: ('word-1', 0x1d)), // CHECK: # Relocation 3 // CHECK: (('word-0', 0xa1000000), -// CHECK: ('word-1', 0x3b)), +// CHECK: ('word-1', 0x40)), // CHECK: ]) -// CHECK: ('_section_data', '\xfe\xff\xff\xff?\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', 'feffffff 44000000 00000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 // CHECK: (('command', 2) // CHECK: ('size', 24) -// CHECK: ('symoff', 592) +// CHECK: ('symoff', 604) // CHECK: ('nsyms', 10) -// CHECK: ('stroff', 712) +// CHECK: ('stroff', 724) // CHECK: ('strsize', 88) // CHECK: ('_string_data', '\x00undef\x00local_a_ext\x00.objc_class_name_A\x00_f1\x00local_a\x00local_a_elt\x00local_b\x00local_c\x00bar\x00_f0\x00\x00\x00') // CHECK: ('_symbols', [ @@ -184,7 +188,7 @@ _f1: // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) -// CHECK: ('n_value', 20) +// CHECK: ('n_value', 25) // CHECK: ('_string', 'local_a') // CHECK: ), // CHECK: # Symbol 1 @@ -192,7 +196,7 @@ _f1: // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) -// CHECK: ('n_value', 24) +// CHECK: ('n_value', 29) // CHECK: ('_string', 'local_a_elt') // CHECK: ), // CHECK: # Symbol 2 @@ -200,7 +204,7 @@ _f1: // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) -// CHECK: ('n_value', 28) +// CHECK: ('n_value', 33) // CHECK: ('_string', 'local_b') // CHECK: ), // CHECK: # Symbol 3 @@ -208,7 +212,7 @@ _f1: // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) -// CHECK: ('n_value', 36) +// CHECK: ('n_value', 41) // CHECK: ('_string', 'local_c') // CHECK: ), // CHECK: # Symbol 4 @@ -216,7 +220,7 @@ _f1: // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) -// CHECK: ('n_value', 59) +// CHECK: ('n_value', 64) // CHECK: ('_string', 'bar') // CHECK: ), // CHECK: # Symbol 5 @@ -240,7 +244,7 @@ _f1: // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 128) -// CHECK: ('n_value', 8) +// CHECK: ('n_value', 13) // CHECK: ('_string', '_f1') // CHECK: ), // CHECK: # Symbol 8 @@ -248,7 +252,7 @@ _f1: // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) -// CHECK: ('n_value', 16) +// CHECK: ('n_value', 21) // CHECK: ('_string', 'local_a_ext') // CHECK: ), // CHECK: # Symbol 9 diff --git a/test/MC/MachO/section-align-1.s b/test/MC/MachO/section-align-1.s index 6a5e247c938e..360c0a842313 100644 --- a/test/MC/MachO/section-align-1.s +++ b/test/MC/MachO/section-align-1.s @@ -9,7 +9,7 @@ name: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 228) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/section-align-2.s b/test/MC/MachO/section-align-2.s index e0704734a8e6..e0d7b8df8f48 100644 --- a/test/MC/MachO/section-align-2.s +++ b/test/MC/MachO/section-align-2.s @@ -17,7 +17,7 @@ baz: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/string-table.s b/test/MC/MachO/string-table.s index b811a0b82fcf..179528eaae52 100644 --- a/test/MC/MachO/string-table.s +++ b/test/MC/MachO/string-table.s @@ -5,7 +5,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 228) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -43,7 +43,7 @@ // CHECK: (('word-0', 0x2), // CHECK: ('word-1', 0xc000001)), // CHECK: ]) -// CHECK: ('_section_data', '\xc7\x05\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', 'c7050000 00000000 0000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/symbol-diff.s b/test/MC/MachO/symbol-diff.s new file mode 100644 index 000000000000..1483df16333c --- /dev/null +++ b/test/MC/MachO/symbol-diff.s @@ -0,0 +1,122 @@ +// RUN: llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s +_g: +LFB2: + .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support +_g.eh: + .quad LFB2-. + +// CHECK: ('cputype', 16777223) +// CHECK-NEXT: ('cpusubtype', 3) +// CHECK-NEXT: ('filetype', 1) +// CHECK-NEXT: ('num_load_commands', 3) +// CHECK-NEXT: ('load_commands_size', 336) +// CHECK-NEXT: ('flag', 0) +// CHECK-NEXT: ('reserved', 0) +// CHECK-NEXT: ('load_commands', [ +// CHECK-NEXT: # Load Command 0 +// CHECK-NEXT: (('command', 25) +// CHECK-NEXT: ('size', 232) +// CHECK-NEXT: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('vm_addr', 0) +// CHECK-NEXT: ('vm_size', 8) +// CHECK-NEXT: ('file_offset', 368) +// CHECK-NEXT: ('file_size', 8) +// CHECK-NEXT: ('maxprot', 7) +// CHECK-NEXT: ('initprot', 7) +// CHECK-NEXT: ('num_sections', 2) +// CHECK-NEXT: ('flags', 0) +// CHECK-NEXT: ('sections', [ +// CHECK-NEXT: # Section 0 +// CHECK-NEXT: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 0) +// CHECK-NEXT: ('offset', 368) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x80000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ('reserved3', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '') +// CHECK-NEXT: # Section 1 +// CHECK-NEXT: (('section_name', '__eh_frame\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 8) +// CHECK-NEXT: ('offset', 368) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 376) +// CHECK-NEXT: ('num_reloc', 2) +// CHECK-NEXT: ('flags', 0x6800000b) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ('reserved3', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('word-0', 0x0), +// CHECK-NEXT: ('word-1', 0x5e000001)), +// CHECK-NEXT: # Relocation 1 +// CHECK-NEXT: (('word-0', 0x0), +// CHECK-NEXT: ('word-1', 0xe000000)), +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '00000000 00000000') +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 1 +// CHECK-NEXT: (('command', 2) +// CHECK-NEXT: ('size', 24) +// CHECK-NEXT: ('symoff', 392) +// CHECK-NEXT: ('nsyms', 2) +// CHECK-NEXT: ('stroff', 424) +// CHECK-NEXT: ('strsize', 12) +// CHECK-NEXT: ('_string_data', '\x00_g\x00_g.eh\x00\x00\x00') +// CHECK-NEXT: ('_symbols', [ +// CHECK-NEXT: # Symbol 0 +// CHECK-NEXT: (('n_strx', 1) +// CHECK-NEXT: ('n_type', 0xe) +// CHECK-NEXT: ('n_sect', 1) +// CHECK-NEXT: ('n_desc', 0) +// CHECK-NEXT: ('n_value', 0) +// CHECK-NEXT: ('_string', '_g') +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 1 +// CHECK-NEXT: (('n_strx', 4) +// CHECK-NEXT: ('n_type', 0xe) +// CHECK-NEXT: ('n_sect', 2) +// CHECK-NEXT: ('n_desc', 0) +// CHECK-NEXT: ('n_value', 0) +// CHECK-NEXT: ('_string', '_g.eh') +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 2 +// CHECK-NEXT: (('command', 11) +// CHECK-NEXT: ('size', 80) +// CHECK-NEXT: ('ilocalsym', 0) +// CHECK-NEXT: ('nlocalsym', 2) +// CHECK-NEXT: ('iextdefsym', 2) +// CHECK-NEXT: ('nextdefsym', 0) +// CHECK-NEXT: ('iundefsym', 2) +// CHECK-NEXT: ('nundefsym', 0) +// CHECK-NEXT: ('tocoff', 0) +// CHECK-NEXT: ('ntoc', 0) +// CHECK-NEXT: ('modtaboff', 0) +// CHECK-NEXT: ('nmodtab', 0) +// CHECK-NEXT: ('extrefsymoff', 0) +// CHECK-NEXT: ('nextrefsyms', 0) +// CHECK-NEXT: ('indirectsymoff', 0) +// CHECK-NEXT: ('nindirectsyms', 0) +// CHECK-NEXT: ('extreloff', 0) +// CHECK-NEXT: ('nextrel', 0) +// CHECK-NEXT: ('locreloff', 0) +// CHECK-NEXT: ('nlocrel', 0) +// CHECK-NEXT: ('_indirect_symbols', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT:]) diff --git a/test/MC/MachO/symbol-flags.s b/test/MC/MachO/symbol-flags.s index 705fa39fad5d..7a4f8e4031ae 100644 --- a/test/MC/MachO/symbol-flags.s +++ b/test/MC/MachO/symbol-flags.s @@ -49,6 +49,9 @@ sym_private_ext_C: .no_dead_strip sym_no_dead_strip_A +sym_symbol_resolver_A: + .symbol_resolver sym_symbol_resolver_A + .reference sym_ref_A .desc sym_ref_A, 1 .desc sym_ref_A, 0x1234 @@ -59,7 +62,7 @@ sym_desc_flags: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -112,10 +115,10 @@ sym_desc_flags: // CHECK: (('command', 2) // CHECK: ('size', 24) // CHECK: ('symoff', 324) -// CHECK: ('nsyms', 23) -// CHECK: ('stroff', 600) -// CHECK: ('strsize', 368) -// CHECK: ('_string_data', '\x00sym_ref_A\x00sym_ref_def_D\x00sym_ref_def_E\x00sym_weak_ref_A\x00sym_weak_def_A\x00sym_weak_def_B\x00sym_weak_def_C\x00sym_lazy_ref_A\x00sym_lazy_ref_D\x00sym_lazy_ref_E\x00sym_private_ext_A\x00sym_private_ext_B\x00sym_private_ext_C\x00sym_private_ext_D\x00sym_private_ext_E\x00sym_no_dead_strip_A\x00sym_ref_def_A\x00sym_ref_def_C\x00sym_weak_ref_def_A\x00sym_weak_ref_def_B\x00sym_lazy_ref_B\x00sym_lazy_ref_C\x00sym_desc_flags\x00\x00\x00\x00') +// CHECK: ('nsyms', 24) +// CHECK: ('stroff', 612) +// CHECK: ('strsize', 388) +// CHECK: ('_string_data', '\x00sym_ref_A\x00sym_ref_def_D\x00sym_ref_def_E\x00sym_weak_ref_A\x00sym_weak_def_A\x00sym_weak_def_B\x00sym_weak_def_C\x00sym_lazy_ref_A\x00sym_lazy_ref_D\x00sym_lazy_ref_E\x00sym_private_ext_A\x00sym_private_ext_B\x00sym_private_ext_C\x00sym_private_ext_D\x00sym_private_ext_E\x00sym_no_dead_strip_A\x00sym_ref_def_A\x00sym_ref_def_C\x00sym_weak_ref_def_A\x00sym_weak_ref_def_B\x00sym_lazy_ref_B\x00sym_lazy_ref_C\x00sym_symbol_resolver_A\x00sym_desc_flags\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 // CHECK: (('n_strx', 254) @@ -169,11 +172,19 @@ sym_desc_flags: // CHECK: (('n_strx', 350) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) +// CHECK: ('n_desc', 256) +// CHECK: ('n_value', 0) +// CHECK: ('_string', 'sym_symbol_resolver_A') +// CHECK: ), +// CHECK: # Symbol 7 +// CHECK: (('n_strx', 372) +// CHECK: ('n_type', 0xe) +// CHECK: ('n_sect', 2) // CHECK: ('n_desc', 64) // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_desc_flags') // CHECK: ), -// CHECK: # Symbol 7 +// CHECK: # Symbol 8 // CHECK: (('n_strx', 162) // CHECK: ('n_type', 0x1f) // CHECK: ('n_sect', 2) @@ -181,7 +192,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_B') // CHECK: ), -// CHECK: # Symbol 8 +// CHECK: # Symbol 9 // CHECK: (('n_strx', 180) // CHECK: ('n_type', 0x1f) // CHECK: ('n_sect', 2) @@ -189,7 +200,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_C') // CHECK: ), -// CHECK: # Symbol 9 +// CHECK: # Symbol 10 // CHECK: (('n_strx', 54) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) @@ -197,7 +208,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_weak_def_A') // CHECK: ), -// CHECK: # Symbol 10 +// CHECK: # Symbol 11 // CHECK: (('n_strx', 69) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) @@ -205,7 +216,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_weak_def_B') // CHECK: ), -// CHECK: # Symbol 11 +// CHECK: # Symbol 12 // CHECK: (('n_strx', 84) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) @@ -213,7 +224,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_weak_def_C') // CHECK: ), -// CHECK: # Symbol 12 +// CHECK: # Symbol 13 // CHECK: (('n_strx', 99) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -221,7 +232,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_lazy_ref_A') // CHECK: ), -// CHECK: # Symbol 13 +// CHECK: # Symbol 14 // CHECK: (('n_strx', 114) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -229,7 +240,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_lazy_ref_D') // CHECK: ), -// CHECK: # Symbol 14 +// CHECK: # Symbol 15 // CHECK: (('n_strx', 129) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -237,7 +248,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_lazy_ref_E') // CHECK: ), -// CHECK: # Symbol 15 +// CHECK: # Symbol 16 // CHECK: (('n_strx', 234) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -245,7 +256,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_no_dead_strip_A') // CHECK: ), -// CHECK: # Symbol 16 +// CHECK: # Symbol 17 // CHECK: (('n_strx', 144) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) @@ -253,7 +264,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_A') // CHECK: ), -// CHECK: # Symbol 17 +// CHECK: # Symbol 18 // CHECK: (('n_strx', 198) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) @@ -261,7 +272,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_D') // CHECK: ), -// CHECK: # Symbol 18 +// CHECK: # Symbol 19 // CHECK: (('n_strx', 216) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) @@ -269,7 +280,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_private_ext_E') // CHECK: ), -// CHECK: # Symbol 19 +// CHECK: # Symbol 20 // CHECK: (('n_strx', 1) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -277,7 +288,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_ref_A') // CHECK: ), -// CHECK: # Symbol 20 +// CHECK: # Symbol 21 // CHECK: (('n_strx', 11) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -285,7 +296,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_ref_def_D') // CHECK: ), -// CHECK: # Symbol 21 +// CHECK: # Symbol 22 // CHECK: (('n_strx', 25) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -293,7 +304,7 @@ sym_desc_flags: // CHECK: ('n_value', 0) // CHECK: ('_string', 'sym_ref_def_E') // CHECK: ), -// CHECK: # Symbol 22 +// CHECK: # Symbol 23 // CHECK: (('n_strx', 39) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) @@ -307,10 +318,10 @@ sym_desc_flags: // CHECK: (('command', 11) // CHECK: ('size', 80) // CHECK: ('ilocalsym', 0) -// CHECK: ('nlocalsym', 7) -// CHECK: ('iextdefsym', 7) +// CHECK: ('nlocalsym', 8) +// CHECK: ('iextdefsym', 8) // CHECK: ('nextdefsym', 5) -// CHECK: ('iundefsym', 12) +// CHECK: ('iundefsym', 13) // CHECK: ('nundefsym', 11) // CHECK: ('tocoff', 0) // CHECK: ('ntoc', 0) diff --git a/test/MC/MachO/symbol-indirect.s b/test/MC/MachO/symbol-indirect.s index 461291a3c909..2412970322bf 100644 --- a/test/MC/MachO/symbol-indirect.s +++ b/test/MC/MachO/symbol-indirect.s @@ -72,7 +72,7 @@ sym_nlp_G: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/symbols-1.s b/test/MC/MachO/symbols-1.s index 623e5285fe5b..cf05afa7509f 100644 --- a/test/MC/MachO/symbols-1.s +++ b/test/MC/MachO/symbols-1.s @@ -20,7 +20,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('cputype', 7) // CHECK-X86_32: ('cpusubtype', 3) // CHECK-X86_32: ('filetype', 1) -// CHECK-X86_32: ('num_load_commands', 1) +// CHECK-X86_32: ('num_load_commands', 3) // CHECK-X86_32: ('load_commands_size', 228) // CHECK-X86_32: ('flag', 0) // CHECK-X86_32: ('load_commands', [ @@ -164,7 +164,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('cputype', 16777223) // CHECK-X86_64: ('cpusubtype', 3) // CHECK-X86_64: ('filetype', 1) -// CHECK-X86_64: ('num_load_commands', 1) +// CHECK-X86_64: ('num_load_commands', 3) // CHECK-X86_64: ('load_commands_size', 256) // CHECK-X86_64: ('flag', 0) // CHECK-X86_64: ('reserved', 0) diff --git a/test/MC/MachO/tbss.s b/test/MC/MachO/tbss.s index 2131ea469cda..8eae14296865 100644 --- a/test/MC/MachO/tbss.s +++ b/test/MC/MachO/tbss.s @@ -6,7 +6,7 @@ // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) @@ -57,7 +57,7 @@ // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\xcf\xfa\xed\xfe\x07\x00\x00\x01\x03\x00\x00\x00') +// CHECK: ('_section_data', 'cffaedfe 07000001 03000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/tdata.s b/test/MC/MachO/tdata.s index 64f88b514eb2..4829ca73a519 100644 --- a/test/MC/MachO/tdata.s +++ b/test/MC/MachO/tdata.s @@ -6,7 +6,7 @@ _a$tlv$init: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) @@ -57,7 +57,7 @@ _a$tlv$init: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x04\x00\x00\x00') +// CHECK: ('_section_data', '04000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/thread_init_func.s b/test/MC/MachO/thread_init_func.s index eeab6e1b2945..d3ead83fd255 100644 --- a/test/MC/MachO/thread_init_func.s +++ b/test/MC/MachO/thread_init_func.s @@ -57,7 +57,7 @@ // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', '00000000 00000000') // CHECK: ]) // CHECK: ), // CHECK: ]) diff --git a/test/MC/MachO/tls.s b/test/MC/MachO/tls.s index 07ea0aa16a33..44b61beeb489 100644 --- a/test/MC/MachO/tls.s +++ b/test/MC/MachO/tls.s @@ -48,7 +48,7 @@ _b: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 496) // CHECK: ('flag', 8192) // CHECK: ('reserved', 0) @@ -99,7 +99,7 @@ _b: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x04\x00\x00\x00\x05\x00\x00\x00') +// CHECK: ('_section_data', '04000000 05000000') // CHECK: # Section 2 // CHECK: (('section_name', '__thread_vars\x00\x00\x00') // CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -140,7 +140,7 @@ _b: // CHECK: (('word-0', 0x0), // CHECK: ('word-1', 0xe000008)), // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', '00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000') // CHECK: # Section 3 // CHECK: (('section_name', '__thread_bss\x00\x00\x00\x00') // CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -157,7 +157,7 @@ _b: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\xcf\xfa\xed\xfe\x07\x00\x00\x01') +// CHECK: ('_section_data', 'cffaedfe 07000001') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/tlv-reloc.s b/test/MC/MachO/tlv-reloc.s index 04fc7aeda550..d11124184723 100644 --- a/test/MC/MachO/tlv-reloc.s +++ b/test/MC/MachO/tlv-reloc.s @@ -24,7 +24,7 @@ _foo: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 416) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) @@ -61,7 +61,7 @@ _foo: // CHECK: (('word-0', 0x3), // CHECK: ('word-1', 0x9d000001)), // CHECK: ]) -// CHECK: ('_section_data', 'H\x8b=\x00\x00\x00\x00\xff\x17\xc3') +// CHECK: ('_section_data', '488b3d00 000000ff 17c3') // CHECK: # Section 1 // CHECK: (('section_name', '__thread_data\x00\x00\x00') // CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -78,7 +78,7 @@ _foo: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x04\x00\x00\x00') +// CHECK: ('_section_data', '04000000') // CHECK: # Section 2 // CHECK: (('section_name', '__thread_vars\x00\x00\x00') // CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -101,7 +101,7 @@ _foo: // CHECK: (('word-0', 0x0), // CHECK: ('word-1', 0xe000003)), // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', '00000000 00000000 00000000 00000000 00000000 00000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/tlv.s b/test/MC/MachO/tlv.s index 7dd739014f69..0fe028e7d501 100644 --- a/test/MC/MachO/tlv.s +++ b/test/MC/MachO/tlv.s @@ -10,7 +10,7 @@ _a: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) @@ -61,7 +61,7 @@ _a: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK: ('_section_data', '00000000 00000000 00000000 00000000 00000000 00000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/values.s b/test/MC/MachO/values.s index 2a472ab60711..96115990636e 100644 --- a/test/MC/MachO/values.s +++ b/test/MC/MachO/values.s @@ -20,7 +20,7 @@ data_def_ext: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/weakdef.s b/test/MC/MachO/weakdef.s new file mode 100644 index 000000000000..494079df5004 --- /dev/null +++ b/test/MC/MachO/weakdef.s @@ -0,0 +1,141 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + + .section __DATA,__datacoal_nt,coalesced + .section __TEXT,__const_coal,coalesced + .globl __ZTS3optIbE ## @_ZTS3optIbE + .weak_definition __ZTS3optIbE +__ZTS3optIbE: + + + .section __DATA,__datacoal_nt,coalesced + .globl __ZTI3optIbE ## @_ZTI3optIbE + .weak_definition __ZTI3optIbE + +__ZTI3optIbE: + .long __ZTS3optIbE + +// CHECK: ('cputype', 7) +// CHECK-NEXT: ('cpusubtype', 3) +// CHECK-NEXT: ('filetype', 1) +// CHECK-NEXT: ('num_load_commands', 3) +// CHECK-NEXT: ('load_commands_size', 364) +// CHECK-NEXT: ('flag', 0) +// CHECK-NEXT: ('load_commands', [ +// CHECK-NEXT: # Load Command 0 +// CHECK-NEXT: (('command', 1) +// CHECK-NEXT: ('size', 260) +// CHECK-NEXT: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('vm_addr', 0) +// CHECK-NEXT: ('vm_size', 4) +// CHECK-NEXT: ('file_offset', 392) +// CHECK-NEXT: ('file_size', 4) +// CHECK-NEXT: ('maxprot', 7) +// CHECK-NEXT: ('initprot', 7) +// CHECK-NEXT: ('num_sections', 3) +// CHECK-NEXT: ('flags', 0) +// CHECK-NEXT: ('sections', [ +// CHECK-NEXT: # Section 0 +// CHECK-NEXT: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 0) +// CHECK-NEXT: ('offset', 392) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0x80000000) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '') +// CHECK-NEXT: # Section 1 +// CHECK-NEXT: (('section_name', '__datacoal_nt\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 0) +// CHECK-NEXT: ('size', 4) +// CHECK-NEXT: ('offset', 392) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 396) +// CHECK-NEXT: ('num_reloc', 1) +// CHECK-NEXT: ('flags', 0xb) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0 +// CHECK-NEXT: (('word-0', 0x0), +// CHECK-NEXT: ('word-1', 0xc000001)), +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '00000000') +// CHECK-NEXT: # Section 2 +// CHECK-NEXT: (('section_name', '__const_coal\x00\x00\x00\x00') +// CHECK-NEXT: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +// CHECK-NEXT: ('address', 4) +// CHECK-NEXT: ('size', 0) +// CHECK-NEXT: ('offset', 396) +// CHECK-NEXT: ('alignment', 0) +// CHECK-NEXT: ('reloc_offset', 0) +// CHECK-NEXT: ('num_reloc', 0) +// CHECK-NEXT: ('flags', 0xb) +// CHECK-NEXT: ('reserved1', 0) +// CHECK-NEXT: ('reserved2', 0) +// CHECK-NEXT: ), +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ('_section_data', '') +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 1 +// CHECK-NEXT: (('command', 2) +// CHECK-NEXT: ('size', 24) +// CHECK-NEXT: ('symoff', 404) +// CHECK-NEXT: ('nsyms', 2) +// CHECK-NEXT: ('stroff', 428) +// CHECK-NEXT: ('strsize', 28) +// CHECK-NEXT: ('_string_data', '\x00__ZTS3optIbE\x00__ZTI3optIbE\x00\x00') +// CHECK-NEXT: ('_symbols', [ +// CHECK-NEXT: # Symbol 0 +// CHECK-NEXT: (('n_strx', 14) +// CHECK-NEXT: ('n_type', 0xf) +// CHECK-NEXT: ('n_sect', 2) +// CHECK-NEXT: ('n_desc', 128) +// CHECK-NEXT: ('n_value', 0) +// CHECK-NEXT: ('_string', '__ZTI3optIbE') +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 1 +// CHECK-NEXT: (('n_strx', 1) +// CHECK-NEXT: ('n_type', 0xf) +// CHECK-NEXT: ('n_sect', 3) +// CHECK-NEXT: ('n_desc', 128) +// CHECK-NEXT: ('n_value', 4) +// CHECK-NEXT: ('_string', '__ZTS3optIbE') +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: # Load Command 2 +// CHECK-NEXT: (('command', 11) +// CHECK-NEXT: ('size', 80) +// CHECK-NEXT: ('ilocalsym', 0) +// CHECK-NEXT: ('nlocalsym', 0) +// CHECK-NEXT: ('iextdefsym', 0) +// CHECK-NEXT: ('nextdefsym', 2) +// CHECK-NEXT: ('iundefsym', 2) +// CHECK-NEXT: ('nundefsym', 0) +// CHECK-NEXT: ('tocoff', 0) +// CHECK-NEXT: ('ntoc', 0) +// CHECK-NEXT: ('modtaboff', 0) +// CHECK-NEXT: ('nmodtab', 0) +// CHECK-NEXT: ('extrefsymoff', 0) +// CHECK-NEXT: ('nextrefsyms', 0) +// CHECK-NEXT: ('indirectsymoff', 0) +// CHECK-NEXT: ('nindirectsyms', 0) +// CHECK-NEXT: ('extreloff', 0) +// CHECK-NEXT: ('nextrel', 0) +// CHECK-NEXT: ('locreloff', 0) +// CHECK-NEXT: ('nlocrel', 0) +// CHECK-NEXT: ('_indirect_symbols', [ +// CHECK-NEXT: ]) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) diff --git a/test/MC/MachO/x86_32-optimal_nop.s b/test/MC/MachO/x86_32-optimal_nop.s index e6d41d79bfca..24751409bdb4 100644 --- a/test/MC/MachO/x86_32-optimal_nop.s +++ b/test/MC/MachO/x86_32-optimal_nop.s @@ -104,7 +104,7 @@ ret ret # nopw %cs:0L(%[re]ax,%[re]ax,1) - # 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 + # 0x66, 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 .align 4, 0x90 ret # 12 byte nop test @@ -160,7 +160,7 @@ f0: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ @@ -192,7 +192,7 @@ f0: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\xc3\x90\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\xc3f\x90\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\x0f\x1f\x00\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\xc3\xc3\x0f\x1f@\x00\xc3\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\xc3\x0f\x1fD\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\xc3\xc3f\x0f\x1fD\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\xc3\x0f\x1f\x80\x00\x00\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\xc3\xc3\xc3\xc3\xc3\xc3\xc3\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\xc3\xc3\xc3\xc3\xc3f\x0f\x1f\x84\x00\x00\x00\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\xc3\xc3\xc3\xc3\xc3f\x0f\x1f\x84\x00\x00\x00\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\xc3\xc3\xc3\x0f\x1fD\x00\x00f\x0f\x1fD\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\xc3\xc3f\x0f\x1fD\x00\x00f\x0f\x1fD\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\xc3f\x0f\x1fD\x00\x00\x0f\x1f\x80\x00\x00\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\xc3\x0f\x1f\x80\x00\x00\x00\x00\x0f\x1f\x80\x00\x00\x00\x00\xc3\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xc3\x0f\x1f\x80\x00\x00\x00\x00\x0f\x1f\x84\x00\x00\x00\x00\x00\xc3') +// CHECK: ('_section_data', 'c390c300 00000000 00000000 00000000 c3c36690 c3000000 00000000 00000000 c30f1f00 c3000000 00000000 00000000 c3c3c3c3 0f1f4000 c3000000 00000000 c3c3c30f 1f440000 c3000000 00000000 c3c3660f 1f440000 c3000000 00000000 c30f1f80 00000000 c3000000 00000000 c3c3c3c3 c3c3c3c3 c3000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c3c3c366 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 c366662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c3c3 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c3c366 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3c36666 6666662e 0f1f8400 00000000 c3000000 00000000 00000000 00000000 c3666666 6666662e 0f1f8400 00000000 c3') // CHECK: # Section 1 // CHECK: (('section_name', '__const\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -208,7 +208,7 @@ f0: // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x00\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90\x90\x00\x00\x00\x00') +// CHECK: ('_section_data', '00909090 90909090 90909090 90909090 00000000') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/MachO/x86_32-symbols.s b/test/MC/MachO/x86_32-symbols.s index 629ba7de7ced..35ada354d29e 100644 --- a/test/MC/MachO/x86_32-symbols.s +++ b/test/MC/MachO/x86_32-symbols.s @@ -124,7 +124,7 @@ D39: // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 2608) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/x86_64-symbols.s b/test/MC/MachO/x86_64-symbols.s index c5c39a6fd47f..804cee84791e 100644 --- a/test/MC/MachO/x86_64-symbols.s +++ b/test/MC/MachO/x86_64-symbols.s @@ -124,7 +124,7 @@ D38: // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 2656) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) diff --git a/test/MC/MachO/zerofill-1.s b/test/MC/MachO/zerofill-1.s index a175d4c4d01e..805a7861e1fe 100644 --- a/test/MC/MachO/zerofill-1.s +++ b/test/MC/MachO/zerofill-1.s @@ -11,7 +11,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 364) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/zerofill-2.s b/test/MC/MachO/zerofill-2.s index e76de8453cbd..16577e41d03a 100644 --- a/test/MC/MachO/zerofill-2.s +++ b/test/MC/MachO/zerofill-2.s @@ -8,7 +8,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/zerofill-3.s b/test/MC/MachO/zerofill-3.s index e7f4c7b44418..cc81fa863420 100644 --- a/test/MC/MachO/zerofill-3.s +++ b/test/MC/MachO/zerofill-3.s @@ -22,7 +22,7 @@ // CHECK: ('cputype', 7) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 296) // CHECK: ('flag', 0) // CHECK: ('load_commands', [ diff --git a/test/MC/MachO/zerofill-5.s b/test/MC/MachO/zerofill-5.s index 3074f60d3f57..91f251b9983c 100644 --- a/test/MC/MachO/zerofill-5.s +++ b/test/MC/MachO/zerofill-5.s @@ -9,7 +9,7 @@ // CHECK: ('cputype', 16777223) // CHECK: ('cpusubtype', 3) // CHECK: ('filetype', 1) -// CHECK: ('num_load_commands', 1) +// CHECK: ('num_load_commands', 3) // CHECK: ('load_commands_size', 336) // CHECK: ('flag', 0) // CHECK: ('reserved', 0) @@ -43,7 +43,7 @@ // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\x02\x00\x00\x00') +// CHECK: ('_section_data', '02000000') // CHECK: # Section 1 // CHECK: (('section_name', '__bss\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') @@ -60,7 +60,7 @@ // CHECK: ), // CHECK: ('_relocations', [ // CHECK: ]) -// CHECK: ('_section_data', '\xcf\xfa\xed\xfe\x07\x00\x00\x01') +// CHECK: ('_section_data', 'cffaedfe 07000001') // CHECK: ]) // CHECK: ), // CHECK: # Load Command 1 diff --git a/test/MC/X86/3DNow.s b/test/MC/X86/3DNow.s new file mode 100644 index 000000000000..4dc68aecf4fa --- /dev/null +++ b/test/MC/X86/3DNow.s @@ -0,0 +1,92 @@ +// RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck %s + +// PR8283 + +// CHECK: pavgusb %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xbf] +pavgusb %mm2, %mm1 + +// CHECK: pavgusb 9(%esi,%edx), %mm3 # encoding: [0x0f,0x0f,0x5c,0x16,0x09,0xbf] +pavgusb 9(%esi,%edx), %mm3 + + +// CHECK: pf2id %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x1d] +pf2id %mm2, %mm1 + +// CHECK: pf2id 9(%esi,%edx), %mm3 # encoding: [0x0f,0x0f,0x5c,0x16,0x09,0x1d] +pf2id 9(%esi,%edx), %mm3 + +// CHECK: pfacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xae] +pfacc %mm2, %mm1 + +// CHECK: pfadd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x9e] +pfadd %mm2, %mm1 + +// CHECK: pfcmpeq %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb0] +pfcmpeq %mm2, %mm1 + +// CHECK: pfcmpge %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x90] +pfcmpge %mm2, %mm1 + +// CHECK: pfcmpgt %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa0] +pfcmpgt %mm2, %mm1 + +// CHECK: pfmax %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa4] +pfmax %mm2, %mm1 + +// CHECK: pfmin %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x94] +pfmin %mm2, %mm1 + +// CHECK: pfmul %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb4] +pfmul %mm2, %mm1 + +// CHECK: pfrcp %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x96] +pfrcp %mm2, %mm1 + +// CHECK: pfrcpit1 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa6] +pfrcpit1 %mm2, %mm1 + +// CHECK: pfrcpit2 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb6] +pfrcpit2 %mm2, %mm1 + +// CHECK: pfrsqit1 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa7] +pfrsqit1 %mm2, %mm1 + +// CHECK: pfrsqrt %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x97] +pfrsqrt %mm2, %mm1 + +// CHECK: pfsub %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x9a] +pfsub %mm2, %mm1 + +// CHECK: pfsubr %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xaa] +pfsubr %mm2, %mm1 + +// CHECK: pi2fd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x0d] +pi2fd %mm2, %mm1 + +// CHECK: pmulhrw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb7] +pmulhrw %mm2, %mm1 + + +// CHECK: femms # encoding: [0x0f,0x0e] +femms + +// CHECK: prefetch (%rax) # encoding: [0x0f,0x0d,0x00] +// CHECK: prefetchw (%rax) # encoding: [0x0f,0x0d,0x08] +prefetch (%rax) +prefetchw (%rax) + + +// CHECK: pf2iw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x1c] +pf2iw %mm2, %mm1 + +// CHECK: pi2fw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x0c] +pi2fw %mm2, %mm1 + +// CHECK: pfnacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x8a] +pfnacc %mm2, %mm1 + +// CHECK: pfpnacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x8e] +pfpnacc %mm2, %mm1 + +// CHECK: pswapd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xbb] +pswapd %mm2, %mm1 diff --git a/test/MC/AsmParser/X86/dg.exp b/test/MC/X86/dg.exp index ec87b695b7ef..ec87b695b7ef 100644 --- a/test/MC/AsmParser/X86/dg.exp +++ b/test/MC/X86/dg.exp diff --git a/test/MC/AsmParser/X86/x86_32-avx-encoding.s b/test/MC/X86/x86-32-avx.s index b7ade6670a01..1927e4e7a6b9 100644 --- a/test/MC/AsmParser/X86/x86_32-avx-encoding.s +++ b/test/MC/X86/x86-32-avx.s @@ -3239,3 +3239,45 @@ // CHECK: encoding: [0xc4,0xe3,0x75,0x4b,0x94,0x20,0xad,0xde,0x00,0x00,0x00] vblendvpd %ymm0, 0xdead(%eax,%eiz), %ymm1, %ymm2 + + +// CHECK: vpclmulqdq $17, %xmm2, %xmm5, %xmm1 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x11] + vpclmulhqhqdq %xmm2, %xmm5, %xmm1 + +// CHECK: vpclmulqdq $17, (%eax), %xmm5, %xmm3 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x11] + vpclmulhqhqdq (%eax), %xmm5, %xmm3 + +// CHECK: vpclmulqdq $1, %xmm2, %xmm5, %xmm1 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x01] + vpclmulhqlqdq %xmm2, %xmm5, %xmm1 + +// CHECK: vpclmulqdq $1, (%eax), %xmm5, %xmm3 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x01] + vpclmulhqlqdq (%eax), %xmm5, %xmm3 + +// CHECK: vpclmulqdq $16, %xmm2, %xmm5, %xmm1 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x10] + vpclmullqhqdq %xmm2, %xmm5, %xmm1 + +// CHECK: vpclmulqdq $16, (%eax), %xmm5, %xmm3 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x10] + vpclmullqhqdq (%eax), %xmm5, %xmm3 + +// CHECK: vpclmulqdq $0, %xmm2, %xmm5, %xmm1 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x00] + vpclmullqlqdq %xmm2, %xmm5, %xmm1 + +// CHECK: vpclmulqdq $0, (%eax), %xmm5, %xmm3 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x00] + vpclmullqlqdq (%eax), %xmm5, %xmm3 + +// CHECK: vpclmulqdq $17, %xmm2, %xmm5, %xmm1 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x11] + vpclmulqdq $17, %xmm2, %xmm5, %xmm1 + +// CHECK: vpclmulqdq $17, (%eax), %xmm5, %xmm3 +// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x11] + vpclmulqdq $17, (%eax), %xmm5, %xmm3 + diff --git a/test/MC/AsmParser/X86/x86_32-encoding.s b/test/MC/X86/x86-32-coverage.s index ef774239ffe8..4ec9fcdb1ee5 100644 --- a/test/MC/AsmParser/X86/x86_32-encoding.s +++ b/test/MC/X86/x86-32-coverage.s @@ -1,5 +1,1636 @@ -// RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck %s -// XFAIL: * +// RUN: llvm-mc -triple i386-unknown-unknown %s --show-encoding | FileCheck %s + +// CHECK: movb $127, 3735928559(%ebx,%ecx,8) + movb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movw $31438, 3735928559(%ebx,%ecx,8) + movw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movl $2063514302, 3735928559(%ebx,%ecx,8) + movl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movl $324478056, 3735928559(%ebx,%ecx,8) + movl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movsbl 3735928559(%ebx,%ecx,8), %ecx + movsbl 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: movswl 3735928559(%ebx,%ecx,8), %ecx + movswl 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: movzbl 3735928559(%ebx,%ecx,8), %ecx + movzbl 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: movzwl 3735928559(%ebx,%ecx,8), %ecx + movzwl 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: pushl 3735928559(%ebx,%ecx,8) + pushl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: popl 3735928559(%ebx,%ecx,8) + popl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: lahf + lahf + +// CHECK: sahf + sahf + +// CHECK: addb $254, 3735928559(%ebx,%ecx,8) + addb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addb $127, 3735928559(%ebx,%ecx,8) + addb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addw $31438, 3735928559(%ebx,%ecx,8) + addw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addl $2063514302, 3735928559(%ebx,%ecx,8) + addl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addl $324478056, 3735928559(%ebx,%ecx,8) + addl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: incl 3735928559(%ebx,%ecx,8) + incl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subb $254, 3735928559(%ebx,%ecx,8) + subb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subb $127, 3735928559(%ebx,%ecx,8) + subb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subw $31438, 3735928559(%ebx,%ecx,8) + subw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subl $2063514302, 3735928559(%ebx,%ecx,8) + subl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subl $324478056, 3735928559(%ebx,%ecx,8) + subl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: decl 3735928559(%ebx,%ecx,8) + decl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sbbw $31438, 3735928559(%ebx,%ecx,8) + sbbw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sbbl $2063514302, 3735928559(%ebx,%ecx,8) + sbbl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sbbl $324478056, 3735928559(%ebx,%ecx,8) + sbbl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpb $254, 3735928559(%ebx,%ecx,8) + cmpb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpb $127, 3735928559(%ebx,%ecx,8) + cmpb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpw $31438, 3735928559(%ebx,%ecx,8) + cmpw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpl $2063514302, 3735928559(%ebx,%ecx,8) + cmpl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpl $324478056, 3735928559(%ebx,%ecx,8) + cmpl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: testb $127, 3735928559(%ebx,%ecx,8) + testb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: testw $31438, 3735928559(%ebx,%ecx,8) + testw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: testl $2063514302, 3735928559(%ebx,%ecx,8) + testl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: testl $324478056, 3735928559(%ebx,%ecx,8) + testl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andb $254, 3735928559(%ebx,%ecx,8) + andb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andb $127, 3735928559(%ebx,%ecx,8) + andb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andw $31438, 3735928559(%ebx,%ecx,8) + andw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andl $2063514302, 3735928559(%ebx,%ecx,8) + andl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andl $324478056, 3735928559(%ebx,%ecx,8) + andl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orb $254, 3735928559(%ebx,%ecx,8) + orb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orb $127, 3735928559(%ebx,%ecx,8) + orb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orw $31438, 3735928559(%ebx,%ecx,8) + orw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orl $2063514302, 3735928559(%ebx,%ecx,8) + orl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orl $324478056, 3735928559(%ebx,%ecx,8) + orl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorb $254, 3735928559(%ebx,%ecx,8) + xorb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorb $127, 3735928559(%ebx,%ecx,8) + xorb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorw $31438, 3735928559(%ebx,%ecx,8) + xorw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorl $2063514302, 3735928559(%ebx,%ecx,8) + xorl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorl $324478056, 3735928559(%ebx,%ecx,8) + xorl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcb $254, 3735928559(%ebx,%ecx,8) + adcb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcb $127, 3735928559(%ebx,%ecx,8) + adcb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcw $31438, 3735928559(%ebx,%ecx,8) + adcw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcl $2063514302, 3735928559(%ebx,%ecx,8) + adcl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcl $324478056, 3735928559(%ebx,%ecx,8) + adcl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: negl 3735928559(%ebx,%ecx,8) + negl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: notl 3735928559(%ebx,%ecx,8) + notl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cbtw + cbtw + +// CHECK: cwtl + cwtl + +// CHECK: cwtd + cwtd + +// CHECK: cltd + cltd + +// CHECK: mull 3735928559(%ebx,%ecx,8) + mull 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: imull 3735928559(%ebx,%ecx,8) + imull 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: divl 3735928559(%ebx,%ecx,8) + divl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: idivl 3735928559(%ebx,%ecx,8) + idivl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: roll $0, 3735928559(%ebx,%ecx,8) + roll $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rolb $127, 3735928559(%ebx,%ecx,8) + rolb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: roll 3735928559(%ebx,%ecx,8) + roll 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rorl $0, 3735928559(%ebx,%ecx,8) + rorl $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rorb $127, 3735928559(%ebx,%ecx,8) + rorb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rorl 3735928559(%ebx,%ecx,8) + rorl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shll $0, 3735928559(%ebx,%ecx,8) + shll $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shlb $127, 3735928559(%ebx,%ecx,8) + shlb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shll 3735928559(%ebx,%ecx,8) + shll 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shrl $0, 3735928559(%ebx,%ecx,8) + shrl $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shrb $127, 3735928559(%ebx,%ecx,8) + shrb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shrl 3735928559(%ebx,%ecx,8) + shrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sarl $0, 3735928559(%ebx,%ecx,8) + sarl $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sarb $127, 3735928559(%ebx,%ecx,8) + sarb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sarl 3735928559(%ebx,%ecx,8) + sarl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: calll *%ecx + call *%ecx + +// CHECK: calll *3735928559(%ebx,%ecx,8) + call *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: calll *3735928559(%ebx,%ecx,8) + call *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: jmpl *3735928559(%ebx,%ecx,8) + jmp *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: jmpl *3735928559(%ebx,%ecx,8) + jmp *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: ljmpl *3735928559(%ebx,%ecx,8) + ljmpl *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: lret + lret + +// CHECK: leave + leave + +// CHECK: leave + leavel + +// CHECK: seto %bl + seto %bl + +// CHECK: seto 3735928559(%ebx,%ecx,8) + seto 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setno %bl + setno %bl + +// CHECK: setno 3735928559(%ebx,%ecx,8) + setno 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setb %bl + setb %bl + +// CHECK: setb 3735928559(%ebx,%ecx,8) + setb 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setae %bl + setae %bl + +// CHECK: setae 3735928559(%ebx,%ecx,8) + setae 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sete %bl + sete %bl + +// CHECK: sete 3735928559(%ebx,%ecx,8) + sete 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setne %bl + setne %bl + +// CHECK: setne 3735928559(%ebx,%ecx,8) + setne 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setbe %bl + setbe %bl + +// CHECK: setbe 3735928559(%ebx,%ecx,8) + setbe 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: seta %bl + seta %bl + +// CHECK: seta 3735928559(%ebx,%ecx,8) + seta 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sets %bl + sets %bl + +// CHECK: sets 3735928559(%ebx,%ecx,8) + sets 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setns %bl + setns %bl + +// CHECK: setns 3735928559(%ebx,%ecx,8) + setns 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setp %bl + setp %bl + +// CHECK: setp 3735928559(%ebx,%ecx,8) + setp 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setnp %bl + setnp %bl + +// CHECK: setnp 3735928559(%ebx,%ecx,8) + setnp 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setl %bl + setl %bl + +// CHECK: setl 3735928559(%ebx,%ecx,8) + setl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setge %bl + setge %bl + +// CHECK: setge 3735928559(%ebx,%ecx,8) + setge 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setle %bl + setle %bl + +// CHECK: setle 3735928559(%ebx,%ecx,8) + setle 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setg %bl + setg %bl + +// CHECK: setg 3735928559(%ebx,%ecx,8) + setg 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: nopl 3735928559(%ebx,%ecx,8) + nopl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: nop + nop + +// CHECK: fldl 3735928559(%ebx,%ecx,8) + fldl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fildl 3735928559(%ebx,%ecx,8) + fildl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fildll 3735928559(%ebx,%ecx,8) + fildll 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fldt 3735928559(%ebx,%ecx,8) + fldt 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fbld 3735928559(%ebx,%ecx,8) + fbld 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fstl 3735928559(%ebx,%ecx,8) + fstl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fistl 3735928559(%ebx,%ecx,8) + fistl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fstpl 3735928559(%ebx,%ecx,8) + fstpl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fistpl 3735928559(%ebx,%ecx,8) + fistpl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fistpll 3735928559(%ebx,%ecx,8) + fistpll 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fstpt 3735928559(%ebx,%ecx,8) + fstpt 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fbstp 3735928559(%ebx,%ecx,8) + fbstp 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: ficoml 3735928559(%ebx,%ecx,8) + ficoml 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: ficompl 3735928559(%ebx,%ecx,8) + ficompl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fucompp + fucompp + +// CHECK: ftst + ftst + +// CHECK: fld1 + fld1 + +// CHECK: fldz + fldz + +// CHECK: faddl 3735928559(%ebx,%ecx,8) + faddl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fiaddl 3735928559(%ebx,%ecx,8) + fiaddl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fsubl 3735928559(%ebx,%ecx,8) + fsubl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fisubl 3735928559(%ebx,%ecx,8) + fisubl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fsubrl 3735928559(%ebx,%ecx,8) + fsubrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fisubrl 3735928559(%ebx,%ecx,8) + fisubrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fmull 3735928559(%ebx,%ecx,8) + fmull 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fimull 3735928559(%ebx,%ecx,8) + fimull 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fdivl 3735928559(%ebx,%ecx,8) + fdivl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fidivl 3735928559(%ebx,%ecx,8) + fidivl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fdivrl 3735928559(%ebx,%ecx,8) + fdivrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fidivrl 3735928559(%ebx,%ecx,8) + fidivrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fsqrt + fsqrt + +// CHECK: fsin + fsin + +// CHECK: fcos + fcos + +// CHECK: fchs + fchs + +// CHECK: fabs + fabs + +// CHECK: fldcw 3735928559(%ebx,%ecx,8) + fldcw 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fnstcw 3735928559(%ebx,%ecx,8) + fnstcw 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rdtsc + rdtsc + +// CHECK: sysenter + sysenter + +// CHECK: sysexit + sysexit + +// CHECK: ud2 + ud2 + +// CHECK: movnti %ecx, 3735928559(%ebx,%ecx,8) + movnti %ecx,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: clflush 3735928559(%ebx,%ecx,8) + clflush 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: emms + emms + +// CHECK: movd %ecx, %mm3 + movd %ecx,%mm3 + +// CHECK: movd 3735928559(%ebx,%ecx,8), %mm3 + movd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: movd %ecx, %xmm5 + movd %ecx,%xmm5 + +// CHECK: movd 3735928559(%ebx,%ecx,8), %xmm5 + movd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movd %xmm5, %ecx + movd %xmm5,%ecx + +// CHECK: movd %xmm5, 3735928559(%ebx,%ecx,8) + movd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movq 3735928559(%ebx,%ecx,8), %mm3 + movq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: movq %mm3, %mm3 + movq %mm3,%mm3 + +// CHECK: movq %mm3, %mm3 + movq %mm3,%mm3 + +// CHECK: movq %xmm5, %xmm5 + movq %xmm5,%xmm5 + +// CHECK: movq %xmm5, %xmm5 + movq %xmm5,%xmm5 + +// CHECK: packssdw %mm3, %mm3 + packssdw %mm3,%mm3 + +// CHECK: packssdw %xmm5, %xmm5 + packssdw %xmm5,%xmm5 + +// CHECK: packsswb %mm3, %mm3 + packsswb %mm3,%mm3 + +// CHECK: packsswb %xmm5, %xmm5 + packsswb %xmm5,%xmm5 + +// CHECK: packuswb %mm3, %mm3 + packuswb %mm3,%mm3 + +// CHECK: packuswb %xmm5, %xmm5 + packuswb %xmm5,%xmm5 + +// CHECK: paddb %mm3, %mm3 + paddb %mm3,%mm3 + +// CHECK: paddb %xmm5, %xmm5 + paddb %xmm5,%xmm5 + +// CHECK: paddw %mm3, %mm3 + paddw %mm3,%mm3 + +// CHECK: paddw %xmm5, %xmm5 + paddw %xmm5,%xmm5 + +// CHECK: paddd %mm3, %mm3 + paddd %mm3,%mm3 + +// CHECK: paddd %xmm5, %xmm5 + paddd %xmm5,%xmm5 + +// CHECK: paddq %mm3, %mm3 + paddq %mm3,%mm3 + +// CHECK: paddq %xmm5, %xmm5 + paddq %xmm5,%xmm5 + +// CHECK: paddsb %mm3, %mm3 + paddsb %mm3,%mm3 + +// CHECK: paddsb %xmm5, %xmm5 + paddsb %xmm5,%xmm5 + +// CHECK: paddsw %mm3, %mm3 + paddsw %mm3,%mm3 + +// CHECK: paddsw %xmm5, %xmm5 + paddsw %xmm5,%xmm5 + +// CHECK: paddusb %mm3, %mm3 + paddusb %mm3,%mm3 + +// CHECK: paddusb %xmm5, %xmm5 + paddusb %xmm5,%xmm5 + +// CHECK: paddusw %mm3, %mm3 + paddusw %mm3,%mm3 + +// CHECK: paddusw %xmm5, %xmm5 + paddusw %xmm5,%xmm5 + +// CHECK: pand %mm3, %mm3 + pand %mm3,%mm3 + +// CHECK: pand %xmm5, %xmm5 + pand %xmm5,%xmm5 + +// CHECK: pandn %mm3, %mm3 + pandn %mm3,%mm3 + +// CHECK: pandn %xmm5, %xmm5 + pandn %xmm5,%xmm5 + +// CHECK: pcmpeqb %mm3, %mm3 + pcmpeqb %mm3,%mm3 + +// CHECK: pcmpeqb %xmm5, %xmm5 + pcmpeqb %xmm5,%xmm5 + +// CHECK: pcmpeqw %mm3, %mm3 + pcmpeqw %mm3,%mm3 + +// CHECK: pcmpeqw %xmm5, %xmm5 + pcmpeqw %xmm5,%xmm5 + +// CHECK: pcmpeqd %mm3, %mm3 + pcmpeqd %mm3,%mm3 + +// CHECK: pcmpeqd %xmm5, %xmm5 + pcmpeqd %xmm5,%xmm5 + +// CHECK: pcmpgtb %mm3, %mm3 + pcmpgtb %mm3,%mm3 + +// CHECK: pcmpgtb %xmm5, %xmm5 + pcmpgtb %xmm5,%xmm5 + +// CHECK: pcmpgtw %mm3, %mm3 + pcmpgtw %mm3,%mm3 + +// CHECK: pcmpgtw %xmm5, %xmm5 + pcmpgtw %xmm5,%xmm5 + +// CHECK: pcmpgtd %mm3, %mm3 + pcmpgtd %mm3,%mm3 + +// CHECK: pcmpgtd %xmm5, %xmm5 + pcmpgtd %xmm5,%xmm5 + +// CHECK: pmaddwd %mm3, %mm3 + pmaddwd %mm3,%mm3 + +// CHECK: pmaddwd %xmm5, %xmm5 + pmaddwd %xmm5,%xmm5 + +// CHECK: pmulhw %mm3, %mm3 + pmulhw %mm3,%mm3 + +// CHECK: pmulhw %xmm5, %xmm5 + pmulhw %xmm5,%xmm5 + +// CHECK: pmullw %mm3, %mm3 + pmullw %mm3,%mm3 + +// CHECK: pmullw %xmm5, %xmm5 + pmullw %xmm5,%xmm5 + +// CHECK: por %mm3, %mm3 + por %mm3,%mm3 + +// CHECK: por %xmm5, %xmm5 + por %xmm5,%xmm5 + +// CHECK: psllw %mm3, %mm3 + psllw %mm3,%mm3 + +// CHECK: psllw %xmm5, %xmm5 + psllw %xmm5,%xmm5 + +// CHECK: psllw $127, %mm3 + psllw $0x7f,%mm3 + +// CHECK: psllw $127, %xmm5 + psllw $0x7f,%xmm5 + +// CHECK: pslld %mm3, %mm3 + pslld %mm3,%mm3 + +// CHECK: pslld %xmm5, %xmm5 + pslld %xmm5,%xmm5 + +// CHECK: pslld $127, %mm3 + pslld $0x7f,%mm3 + +// CHECK: pslld $127, %xmm5 + pslld $0x7f,%xmm5 + +// CHECK: psllq %mm3, %mm3 + psllq %mm3,%mm3 + +// CHECK: psllq %xmm5, %xmm5 + psllq %xmm5,%xmm5 + +// CHECK: psllq $127, %mm3 + psllq $0x7f,%mm3 + +// CHECK: psllq $127, %xmm5 + psllq $0x7f,%xmm5 + +// CHECK: psraw %mm3, %mm3 + psraw %mm3,%mm3 + +// CHECK: psraw %xmm5, %xmm5 + psraw %xmm5,%xmm5 + +// CHECK: psraw $127, %mm3 + psraw $0x7f,%mm3 + +// CHECK: psraw $127, %xmm5 + psraw $0x7f,%xmm5 + +// CHECK: psrad %mm3, %mm3 + psrad %mm3,%mm3 + +// CHECK: psrad %xmm5, %xmm5 + psrad %xmm5,%xmm5 + +// CHECK: psrad $127, %mm3 + psrad $0x7f,%mm3 + +// CHECK: psrad $127, %xmm5 + psrad $0x7f,%xmm5 + +// CHECK: psrlw %mm3, %mm3 + psrlw %mm3,%mm3 + +// CHECK: psrlw %xmm5, %xmm5 + psrlw %xmm5,%xmm5 + +// CHECK: psrlw $127, %mm3 + psrlw $0x7f,%mm3 + +// CHECK: psrlw $127, %xmm5 + psrlw $0x7f,%xmm5 + +// CHECK: psrld %mm3, %mm3 + psrld %mm3,%mm3 + +// CHECK: psrld %xmm5, %xmm5 + psrld %xmm5,%xmm5 + +// CHECK: psrld $127, %mm3 + psrld $0x7f,%mm3 + +// CHECK: psrld $127, %xmm5 + psrld $0x7f,%xmm5 + +// CHECK: psrlq %mm3, %mm3 + psrlq %mm3,%mm3 + +// CHECK: psrlq %xmm5, %xmm5 + psrlq %xmm5,%xmm5 + +// CHECK: psrlq $127, %mm3 + psrlq $0x7f,%mm3 + +// CHECK: psrlq $127, %xmm5 + psrlq $0x7f,%xmm5 + +// CHECK: psubb %mm3, %mm3 + psubb %mm3,%mm3 + +// CHECK: psubb %xmm5, %xmm5 + psubb %xmm5,%xmm5 + +// CHECK: psubw %mm3, %mm3 + psubw %mm3,%mm3 + +// CHECK: psubw %xmm5, %xmm5 + psubw %xmm5,%xmm5 + +// CHECK: psubd %mm3, %mm3 + psubd %mm3,%mm3 + +// CHECK: psubd %xmm5, %xmm5 + psubd %xmm5,%xmm5 + +// CHECK: psubq %mm3, %mm3 + psubq %mm3,%mm3 + +// CHECK: psubq %xmm5, %xmm5 + psubq %xmm5,%xmm5 + +// CHECK: psubsb %mm3, %mm3 + psubsb %mm3,%mm3 + +// CHECK: psubsb %xmm5, %xmm5 + psubsb %xmm5,%xmm5 + +// CHECK: psubsw %mm3, %mm3 + psubsw %mm3,%mm3 + +// CHECK: psubsw %xmm5, %xmm5 + psubsw %xmm5,%xmm5 + +// CHECK: psubusb %mm3, %mm3 + psubusb %mm3,%mm3 + +// CHECK: psubusb %xmm5, %xmm5 + psubusb %xmm5,%xmm5 + +// CHECK: psubusw %mm3, %mm3 + psubusw %mm3,%mm3 + +// CHECK: psubusw %xmm5, %xmm5 + psubusw %xmm5,%xmm5 + +// CHECK: punpckhbw %mm3, %mm3 + punpckhbw %mm3,%mm3 + +// CHECK: punpckhbw %xmm5, %xmm5 + punpckhbw %xmm5,%xmm5 + +// CHECK: punpckhwd %mm3, %mm3 + punpckhwd %mm3,%mm3 + +// CHECK: punpckhwd %xmm5, %xmm5 + punpckhwd %xmm5,%xmm5 + +// CHECK: punpckhdq %mm3, %mm3 + punpckhdq %mm3,%mm3 + +// CHECK: punpckhdq %xmm5, %xmm5 + punpckhdq %xmm5,%xmm5 + +// CHECK: punpcklbw %mm3, %mm3 + punpcklbw %mm3,%mm3 + +// CHECK: punpcklbw %xmm5, %xmm5 + punpcklbw %xmm5,%xmm5 + +// CHECK: punpcklwd %mm3, %mm3 + punpcklwd %mm3,%mm3 + +// CHECK: punpcklwd %xmm5, %xmm5 + punpcklwd %xmm5,%xmm5 + +// CHECK: punpckldq %mm3, %mm3 + punpckldq %mm3,%mm3 + +// CHECK: punpckldq %xmm5, %xmm5 + punpckldq %xmm5,%xmm5 + +// CHECK: pxor %mm3, %mm3 + pxor %mm3,%mm3 + +// CHECK: pxor %xmm5, %xmm5 + pxor %xmm5,%xmm5 + +// CHECK: addps %xmm5, %xmm5 + addps %xmm5,%xmm5 + +// CHECK: addss %xmm5, %xmm5 + addss %xmm5,%xmm5 + +// CHECK: andnps %xmm5, %xmm5 + andnps %xmm5,%xmm5 + +// CHECK: andps %xmm5, %xmm5 + andps %xmm5,%xmm5 + +// CHECK: cvtpi2ps 3735928559(%ebx,%ecx,8), %xmm5 + cvtpi2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtpi2ps %mm3, %xmm5 + cvtpi2ps %mm3,%xmm5 + +// CHECK: cvtps2pi 3735928559(%ebx,%ecx,8), %mm3 + cvtps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: cvtps2pi %xmm5, %mm3 + cvtps2pi %xmm5,%mm3 + +// CHECK: cvtsi2ss %ecx, %xmm5 + cvtsi2ss %ecx,%xmm5 + +// CHECK: cvtsi2ss 3735928559(%ebx,%ecx,8), %xmm5 + cvtsi2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvttps2pi 3735928559(%ebx,%ecx,8), %mm3 + cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: cvttps2pi %xmm5, %mm3 + cvttps2pi %xmm5,%mm3 + +// CHECK: cvttss2si 3735928559(%ebx,%ecx,8), %ecx + cvttss2si 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: cvttss2si %xmm5, %ecx + cvttss2si %xmm5,%ecx + +// CHECK: divps %xmm5, %xmm5 + divps %xmm5,%xmm5 + +// CHECK: divss %xmm5, %xmm5 + divss %xmm5,%xmm5 + +// CHECK: ldmxcsr 3735928559(%ebx,%ecx,8) + ldmxcsr 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: maskmovq %mm3, %mm3 + maskmovq %mm3,%mm3 + +// CHECK: maxps %xmm5, %xmm5 + maxps %xmm5,%xmm5 + +// CHECK: maxss %xmm5, %xmm5 + maxss %xmm5,%xmm5 + +// CHECK: minps %xmm5, %xmm5 + minps %xmm5,%xmm5 + +// CHECK: minss %xmm5, %xmm5 + minss %xmm5,%xmm5 + +// CHECK: movaps 3735928559(%ebx,%ecx,8), %xmm5 + movaps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movaps %xmm5, %xmm5 + movaps %xmm5,%xmm5 + +// CHECK: movaps %xmm5, 3735928559(%ebx,%ecx,8) + movaps %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movaps %xmm5, %xmm5 + movaps %xmm5,%xmm5 + +// CHECK: movhlps %xmm5, %xmm5 + movhlps %xmm5,%xmm5 + +// CHECK: movhps %xmm5, 3735928559(%ebx,%ecx,8) + movhps %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movlhps %xmm5, %xmm5 + movlhps %xmm5,%xmm5 + +// CHECK: movlps %xmm5, 3735928559(%ebx,%ecx,8) + movlps %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movmskps %xmm5, %ecx + movmskps %xmm5,%ecx + +// CHECK: movntps %xmm5, 3735928559(%ebx,%ecx,8) + movntps %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movntq %mm3, 3735928559(%ebx,%ecx,8) + movntq %mm3,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movntdq %xmm5, 3735928559(%ebx,%ecx,8) + movntdq %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movss 3735928559(%ebx,%ecx,8), %xmm5 + movss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movss %xmm5, %xmm5 + movss %xmm5,%xmm5 + +// CHECK: movss %xmm5, 3735928559(%ebx,%ecx,8) + movss %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movss %xmm5, %xmm5 + movss %xmm5,%xmm5 + +// CHECK: movups 3735928559(%ebx,%ecx,8), %xmm5 + movups 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movups %xmm5, %xmm5 + movups %xmm5,%xmm5 + +// CHECK: movups %xmm5, 3735928559(%ebx,%ecx,8) + movups %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movups %xmm5, %xmm5 + movups %xmm5,%xmm5 + +// CHECK: mulps %xmm5, %xmm5 + mulps %xmm5,%xmm5 + +// CHECK: mulss %xmm5, %xmm5 + mulss %xmm5,%xmm5 + +// CHECK: orps %xmm5, %xmm5 + orps %xmm5,%xmm5 + +// CHECK: pavgb %mm3, %mm3 + pavgb %mm3,%mm3 + +// CHECK: pavgb %xmm5, %xmm5 + pavgb %xmm5,%xmm5 + +// CHECK: pavgw %mm3, %mm3 + pavgw %mm3,%mm3 + +// CHECK: pavgw %xmm5, %xmm5 + pavgw %xmm5,%xmm5 + +// CHECK: pmaxsw %mm3, %mm3 + pmaxsw %mm3,%mm3 + +// CHECK: pmaxsw %xmm5, %xmm5 + pmaxsw %xmm5,%xmm5 + +// CHECK: pmaxub %mm3, %mm3 + pmaxub %mm3,%mm3 + +// CHECK: pmaxub %xmm5, %xmm5 + pmaxub %xmm5,%xmm5 + +// CHECK: pminsw %mm3, %mm3 + pminsw %mm3,%mm3 + +// CHECK: pminsw %xmm5, %xmm5 + pminsw %xmm5,%xmm5 + +// CHECK: pminub %mm3, %mm3 + pminub %mm3,%mm3 + +// CHECK: pminub %xmm5, %xmm5 + pminub %xmm5,%xmm5 + +// CHECK: pmovmskb %mm3, %ecx + pmovmskb %mm3,%ecx + +// CHECK: pmovmskb %xmm5, %ecx + pmovmskb %xmm5,%ecx + +// CHECK: pmulhuw %mm3, %mm3 + pmulhuw %mm3,%mm3 + +// CHECK: pmulhuw %xmm5, %xmm5 + pmulhuw %xmm5,%xmm5 + +// CHECK: prefetchnta 3735928559(%ebx,%ecx,8) + prefetchnta 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: prefetcht0 3735928559(%ebx,%ecx,8) + prefetcht0 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: prefetcht1 3735928559(%ebx,%ecx,8) + prefetcht1 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: prefetcht2 3735928559(%ebx,%ecx,8) + prefetcht2 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: psadbw %mm3, %mm3 + psadbw %mm3,%mm3 + +// CHECK: psadbw %xmm5, %xmm5 + psadbw %xmm5,%xmm5 + +// CHECK: rcpps 3735928559(%ebx,%ecx,8), %xmm5 + rcpps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: rcpps %xmm5, %xmm5 + rcpps %xmm5,%xmm5 + +// CHECK: rcpss 3735928559(%ebx,%ecx,8), %xmm5 + rcpss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: rcpss %xmm5, %xmm5 + rcpss %xmm5,%xmm5 + +// CHECK: rsqrtps 3735928559(%ebx,%ecx,8), %xmm5 + rsqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: rsqrtps %xmm5, %xmm5 + rsqrtps %xmm5,%xmm5 + +// CHECK: rsqrtss 3735928559(%ebx,%ecx,8), %xmm5 + rsqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: rsqrtss %xmm5, %xmm5 + rsqrtss %xmm5,%xmm5 + +// CHECK: sqrtps 3735928559(%ebx,%ecx,8), %xmm5 + sqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: sqrtps %xmm5, %xmm5 + sqrtps %xmm5,%xmm5 + +// CHECK: sqrtss 3735928559(%ebx,%ecx,8), %xmm5 + sqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: sqrtss %xmm5, %xmm5 + sqrtss %xmm5,%xmm5 + +// CHECK: stmxcsr 3735928559(%ebx,%ecx,8) + stmxcsr 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subps %xmm5, %xmm5 + subps %xmm5,%xmm5 + +// CHECK: subss %xmm5, %xmm5 + subss %xmm5,%xmm5 + +// CHECK: ucomiss 3735928559(%ebx,%ecx,8), %xmm5 + ucomiss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: ucomiss %xmm5, %xmm5 + ucomiss %xmm5,%xmm5 + +// CHECK: unpckhps %xmm5, %xmm5 + unpckhps %xmm5,%xmm5 + +// CHECK: unpcklps %xmm5, %xmm5 + unpcklps %xmm5,%xmm5 + +// CHECK: xorps %xmm5, %xmm5 + xorps %xmm5,%xmm5 + +// CHECK: addpd %xmm5, %xmm5 + addpd %xmm5,%xmm5 + +// CHECK: addsd %xmm5, %xmm5 + addsd %xmm5,%xmm5 + +// CHECK: andnpd %xmm5, %xmm5 + andnpd %xmm5,%xmm5 + +// CHECK: andpd %xmm5, %xmm5 + andpd %xmm5,%xmm5 + +// CHECK: comisd 3735928559(%ebx,%ecx,8), %xmm5 + comisd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: comisd %xmm5, %xmm5 + comisd %xmm5,%xmm5 + +// CHECK: cvtpi2pd 3735928559(%ebx,%ecx,8), %xmm5 + cvtpi2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtpi2pd %mm3, %xmm5 + cvtpi2pd %mm3,%xmm5 + +// CHECK: cvtsi2sd %ecx, %xmm5 + cvtsi2sd %ecx,%xmm5 + +// CHECK: cvtsi2sd 3735928559(%ebx,%ecx,8), %xmm5 + cvtsi2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: divpd %xmm5, %xmm5 + divpd %xmm5,%xmm5 + +// CHECK: divsd %xmm5, %xmm5 + divsd %xmm5,%xmm5 + +// CHECK: maxpd %xmm5, %xmm5 + maxpd %xmm5,%xmm5 + +// CHECK: maxsd %xmm5, %xmm5 + maxsd %xmm5,%xmm5 + +// CHECK: minpd %xmm5, %xmm5 + minpd %xmm5,%xmm5 + +// CHECK: minsd %xmm5, %xmm5 + minsd %xmm5,%xmm5 + +// CHECK: movapd 3735928559(%ebx,%ecx,8), %xmm5 + movapd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movapd %xmm5, %xmm5 + movapd %xmm5,%xmm5 + +// CHECK: movapd %xmm5, 3735928559(%ebx,%ecx,8) + movapd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movapd %xmm5, %xmm5 + movapd %xmm5,%xmm5 + +// CHECK: movhpd %xmm5, 3735928559(%ebx,%ecx,8) + movhpd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movlpd %xmm5, 3735928559(%ebx,%ecx,8) + movlpd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movmskpd %xmm5, %ecx + movmskpd %xmm5,%ecx + +// CHECK: movntpd %xmm5, 3735928559(%ebx,%ecx,8) + movntpd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movsd 3735928559(%ebx,%ecx,8), %xmm5 + movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movsd %xmm5, %xmm5 + movsd %xmm5,%xmm5 + +// CHECK: movsd %xmm5, 3735928559(%ebx,%ecx,8) + movsd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movsd %xmm5, %xmm5 + movsd %xmm5,%xmm5 + +// CHECK: movupd 3735928559(%ebx,%ecx,8), %xmm5 + movupd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movupd %xmm5, %xmm5 + movupd %xmm5,%xmm5 + +// CHECK: movupd %xmm5, 3735928559(%ebx,%ecx,8) + movupd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movupd %xmm5, %xmm5 + movupd %xmm5,%xmm5 + +// CHECK: mulpd %xmm5, %xmm5 + mulpd %xmm5,%xmm5 + +// CHECK: mulsd %xmm5, %xmm5 + mulsd %xmm5,%xmm5 + +// CHECK: orpd %xmm5, %xmm5 + orpd %xmm5,%xmm5 + +// CHECK: sqrtpd 3735928559(%ebx,%ecx,8), %xmm5 + sqrtpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: sqrtpd %xmm5, %xmm5 + sqrtpd %xmm5,%xmm5 + +// CHECK: sqrtsd 3735928559(%ebx,%ecx,8), %xmm5 + sqrtsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: sqrtsd %xmm5, %xmm5 + sqrtsd %xmm5,%xmm5 + +// CHECK: subpd %xmm5, %xmm5 + subpd %xmm5,%xmm5 + +// CHECK: subsd %xmm5, %xmm5 + subsd %xmm5,%xmm5 + +// CHECK: ucomisd 3735928559(%ebx,%ecx,8), %xmm5 + ucomisd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: ucomisd %xmm5, %xmm5 + ucomisd %xmm5,%xmm5 + +// CHECK: unpckhpd %xmm5, %xmm5 + unpckhpd %xmm5,%xmm5 + +// CHECK: unpcklpd %xmm5, %xmm5 + unpcklpd %xmm5,%xmm5 + +// CHECK: xorpd %xmm5, %xmm5 + xorpd %xmm5,%xmm5 + +// CHECK: cvtdq2pd 3735928559(%ebx,%ecx,8), %xmm5 + cvtdq2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtdq2pd %xmm5, %xmm5 + cvtdq2pd %xmm5,%xmm5 + +// CHECK: cvtpd2dq 3735928559(%ebx,%ecx,8), %xmm5 + cvtpd2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtpd2dq %xmm5, %xmm5 + cvtpd2dq %xmm5,%xmm5 + +// CHECK: cvtdq2ps 3735928559(%ebx,%ecx,8), %xmm5 + cvtdq2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtdq2ps %xmm5, %xmm5 + cvtdq2ps %xmm5,%xmm5 + +// CHECK: cvtpd2pi 3735928559(%ebx,%ecx,8), %mm3 + cvtpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: cvtpd2pi %xmm5, %mm3 + cvtpd2pi %xmm5,%mm3 + +// CHECK: cvtps2dq 3735928559(%ebx,%ecx,8), %xmm5 + cvtps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtps2dq %xmm5, %xmm5 + cvtps2dq %xmm5,%xmm5 + +// CHECK: cvtsd2ss 3735928559(%ebx,%ecx,8), %xmm5 + cvtsd2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtsd2ss %xmm5, %xmm5 + cvtsd2ss %xmm5,%xmm5 + +// CHECK: cvtss2sd 3735928559(%ebx,%ecx,8), %xmm5 + cvtss2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtss2sd %xmm5, %xmm5 + cvtss2sd %xmm5,%xmm5 + +// CHECK: cvttpd2pi 3735928559(%ebx,%ecx,8), %mm3 + cvttpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: cvttpd2pi %xmm5, %mm3 + cvttpd2pi %xmm5,%mm3 + +// CHECK: cvttsd2si 3735928559(%ebx,%ecx,8), %ecx + cvttsd2si 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: cvttsd2si %xmm5, %ecx + cvttsd2si %xmm5,%ecx + +// CHECK: maskmovdqu %xmm5, %xmm5 + maskmovdqu %xmm5,%xmm5 + +// CHECK: movdqa 3735928559(%ebx,%ecx,8), %xmm5 + movdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movdqa %xmm5, %xmm5 + movdqa %xmm5,%xmm5 + +// CHECK: movdqa %xmm5, 3735928559(%ebx,%ecx,8) + movdqa %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movdqa %xmm5, %xmm5 + movdqa %xmm5,%xmm5 + +// CHECK: movdqu 3735928559(%ebx,%ecx,8), %xmm5 + movdqu 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movdqu %xmm5, 3735928559(%ebx,%ecx,8) + movdqu %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movdq2q %xmm5, %mm3 + movdq2q %xmm5,%mm3 + +// CHECK: movq2dq %mm3, %xmm5 + movq2dq %mm3,%xmm5 + +// CHECK: pmuludq %mm3, %mm3 + pmuludq %mm3,%mm3 + +// CHECK: pmuludq %xmm5, %xmm5 + pmuludq %xmm5,%xmm5 + +// CHECK: pslldq $127, %xmm5 + pslldq $0x7f,%xmm5 + +// CHECK: psrldq $127, %xmm5 + psrldq $0x7f,%xmm5 + +// CHECK: punpckhqdq %xmm5, %xmm5 + punpckhqdq %xmm5,%xmm5 + +// CHECK: punpcklqdq %xmm5, %xmm5 + punpcklqdq %xmm5,%xmm5 + +// CHECK: addsubpd %xmm5, %xmm5 + addsubpd %xmm5,%xmm5 + +// CHECK: addsubps %xmm5, %xmm5 + addsubps %xmm5,%xmm5 + +// CHECK: haddpd %xmm5, %xmm5 + haddpd %xmm5,%xmm5 + +// CHECK: haddps %xmm5, %xmm5 + haddps %xmm5,%xmm5 + +// CHECK: hsubpd %xmm5, %xmm5 + hsubpd %xmm5,%xmm5 + +// CHECK: hsubps %xmm5, %xmm5 + hsubps %xmm5,%xmm5 + +// CHECK: lddqu 3735928559(%ebx,%ecx,8), %xmm5 + lddqu 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movddup 3735928559(%ebx,%ecx,8), %xmm5 + movddup 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movddup %xmm5, %xmm5 + movddup %xmm5,%xmm5 + +// CHECK: movshdup 3735928559(%ebx,%ecx,8), %xmm5 + movshdup 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movshdup %xmm5, %xmm5 + movshdup %xmm5,%xmm5 + +// CHECK: movsldup 3735928559(%ebx,%ecx,8), %xmm5 + movsldup 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movsldup %xmm5, %xmm5 + movsldup %xmm5,%xmm5 + +// CHECK: phaddw %mm3, %mm3 + phaddw %mm3,%mm3 + +// CHECK: phaddw %xmm5, %xmm5 + phaddw %xmm5,%xmm5 + +// CHECK: phaddd %mm3, %mm3 + phaddd %mm3,%mm3 + +// CHECK: phaddd %xmm5, %xmm5 + phaddd %xmm5,%xmm5 + +// CHECK: phaddsw %mm3, %mm3 + phaddsw %mm3,%mm3 + +// CHECK: phaddsw %xmm5, %xmm5 + phaddsw %xmm5,%xmm5 + +// CHECK: phsubw %mm3, %mm3 + phsubw %mm3,%mm3 + +// CHECK: phsubw %xmm5, %xmm5 + phsubw %xmm5,%xmm5 + +// CHECK: phsubd %mm3, %mm3 + phsubd %mm3,%mm3 + +// CHECK: phsubd %xmm5, %xmm5 + phsubd %xmm5,%xmm5 + +// CHECK: phsubsw %mm3, %mm3 + phsubsw %mm3,%mm3 + +// CHECK: phsubsw %xmm5, %xmm5 + phsubsw %xmm5,%xmm5 + +// CHECK: pmaddubsw %mm3, %mm3 + pmaddubsw %mm3,%mm3 + +// CHECK: pmaddubsw %xmm5, %xmm5 + pmaddubsw %xmm5,%xmm5 + +// CHECK: pmulhrsw %mm3, %mm3 + pmulhrsw %mm3,%mm3 + +// CHECK: pmulhrsw %xmm5, %xmm5 + pmulhrsw %xmm5,%xmm5 + +// CHECK: pshufb %mm3, %mm3 + pshufb %mm3,%mm3 + +// CHECK: pshufb %xmm5, %xmm5 + pshufb %xmm5,%xmm5 + +// CHECK: psignb %mm3, %mm3 + psignb %mm3,%mm3 + +// CHECK: psignb %xmm5, %xmm5 + psignb %xmm5,%xmm5 + +// CHECK: psignw %mm3, %mm3 + psignw %mm3,%mm3 + +// CHECK: psignw %xmm5, %xmm5 + psignw %xmm5,%xmm5 + +// CHECK: psignd %mm3, %mm3 + psignd %mm3,%mm3 + +// CHECK: psignd %xmm5, %xmm5 + psignd %xmm5,%xmm5 + +// CHECK: pabsb 3735928559(%ebx,%ecx,8), %mm3 + pabsb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pabsb %mm3, %mm3 + pabsb %mm3,%mm3 + +// CHECK: pabsb 3735928559(%ebx,%ecx,8), %xmm5 + pabsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pabsb %xmm5, %xmm5 + pabsb %xmm5,%xmm5 + +// CHECK: pabsw 3735928559(%ebx,%ecx,8), %mm3 + pabsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pabsw %mm3, %mm3 + pabsw %mm3,%mm3 + +// CHECK: pabsw 3735928559(%ebx,%ecx,8), %xmm5 + pabsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pabsw %xmm5, %xmm5 + pabsw %xmm5,%xmm5 + +// CHECK: pabsd 3735928559(%ebx,%ecx,8), %mm3 + pabsd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pabsd %mm3, %mm3 + pabsd %mm3,%mm3 + +// CHECK: pabsd 3735928559(%ebx,%ecx,8), %xmm5 + pabsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pabsd %xmm5, %xmm5 + pabsd %xmm5,%xmm5 + +// CHECK: femms + femms + +// CHECK: packusdw %xmm5, %xmm5 + packusdw %xmm5,%xmm5 + +// CHECK: pcmpeqq %xmm5, %xmm5 + pcmpeqq %xmm5,%xmm5 + +// CHECK: phminposuw 3735928559(%ebx,%ecx,8), %xmm5 + phminposuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: phminposuw %xmm5, %xmm5 + phminposuw %xmm5,%xmm5 + +// CHECK: pmaxsb %xmm5, %xmm5 + pmaxsb %xmm5,%xmm5 + +// CHECK: pmaxsd %xmm5, %xmm5 + pmaxsd %xmm5,%xmm5 + +// CHECK: pmaxud %xmm5, %xmm5 + pmaxud %xmm5,%xmm5 + +// CHECK: pmaxuw %xmm5, %xmm5 + pmaxuw %xmm5,%xmm5 + +// CHECK: pminsb %xmm5, %xmm5 + pminsb %xmm5,%xmm5 + +// CHECK: pminsd %xmm5, %xmm5 + pminsd %xmm5,%xmm5 + +// CHECK: pminud %xmm5, %xmm5 + pminud %xmm5,%xmm5 + +// CHECK: pminuw %xmm5, %xmm5 + pminuw %xmm5,%xmm5 + +// CHECK: pmovsxbw 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxbw %xmm5, %xmm5 + pmovsxbw %xmm5,%xmm5 + +// CHECK: pmovsxbd 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxbd %xmm5, %xmm5 + pmovsxbd %xmm5,%xmm5 + +// CHECK: pmovsxbq 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxbq %xmm5, %xmm5 + pmovsxbq %xmm5,%xmm5 + +// CHECK: pmovsxwd 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxwd %xmm5, %xmm5 + pmovsxwd %xmm5,%xmm5 + +// CHECK: pmovsxwq 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxwq %xmm5, %xmm5 + pmovsxwq %xmm5,%xmm5 + +// CHECK: pmovsxdq 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxdq %xmm5, %xmm5 + pmovsxdq %xmm5,%xmm5 + +// CHECK: pmovzxbw 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxbw %xmm5, %xmm5 + pmovzxbw %xmm5,%xmm5 + +// CHECK: pmovzxbd 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxbd %xmm5, %xmm5 + pmovzxbd %xmm5,%xmm5 + +// CHECK: pmovzxbq 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxbq %xmm5, %xmm5 + pmovzxbq %xmm5,%xmm5 + +// CHECK: pmovzxwd 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxwd %xmm5, %xmm5 + pmovzxwd %xmm5,%xmm5 + +// CHECK: pmovzxwq 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxwq %xmm5, %xmm5 + pmovzxwq %xmm5,%xmm5 + +// CHECK: pmovzxdq 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxdq %xmm5, %xmm5 + pmovzxdq %xmm5,%xmm5 + +// CHECK: pmuldq %xmm5, %xmm5 + pmuldq %xmm5,%xmm5 + +// CHECK: pmulld %xmm5, %xmm5 + pmulld %xmm5,%xmm5 + +// CHECK: ptest 3735928559(%ebx,%ecx,8), %xmm5 + ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: ptest %xmm5, %xmm5 + ptest %xmm5,%xmm5 + +// CHECK: pcmpgtq %xmm5, %xmm5 + pcmpgtq %xmm5,%xmm5 // CHECK: movb $127, 3735928559(%ebx,%ecx,8) @@ -1634,23 +3265,23 @@ // CHECK: encoding: [0xd1,0x3d,0x78,0x56,0x34,0x12] sarl 0x12345678 -// CHECK: call *%ecx +// CHECK: calll *%ecx // CHECK: encoding: [0xff,0xd1] call *%ecx -// CHECK: call *3735928559(%ebx,%ecx,8) +// CHECK: calll *3735928559(%ebx,%ecx,8) // CHECK: encoding: [0xff,0x94,0xcb,0xef,0xbe,0xad,0xde] call *0xdeadbeef(%ebx,%ecx,8) -// CHECK: call *3135175374 +// CHECK: calll *3135175374 // CHECK: encoding: [0xff,0x15,0xce,0xfa,0xde,0xba] call *0xbadeface -// CHECK: call *3735928559(%ebx,%ecx,8) +// CHECK: calll *3735928559(%ebx,%ecx,8) // CHECK: encoding: [0xff,0x94,0xcb,0xef,0xbe,0xad,0xde] call *0xdeadbeef(%ebx,%ecx,8) -// CHECK: call *3135175374 +// CHECK: calll *3135175374 // CHECK: encoding: [0xff,0x15,0xce,0xfa,0xde,0xba] call *0xbadeface @@ -1658,19 +3289,19 @@ // CHECK: encoding: [0x66,0xff,0x1d,0xed,0x7e,0x00,0x00] lcallw *0x7eed -// CHECK: jmp *3735928559(%ebx,%ecx,8) +// CHECK: jmpl *3735928559(%ebx,%ecx,8) // CHECK: encoding: [0xff,0xa4,0xcb,0xef,0xbe,0xad,0xde] jmp *0xdeadbeef(%ebx,%ecx,8) -// CHECK: jmp *3135175374 +// CHECK: jmpl *3135175374 // CHECK: encoding: [0xff,0x25,0xce,0xfa,0xde,0xba] jmp *0xbadeface -// CHECK: jmp *3735928559(%ebx,%ecx,8) +// CHECK: jmpl *3735928559(%ebx,%ecx,8) // CHECK: encoding: [0xff,0xa4,0xcb,0xef,0xbe,0xad,0xde] jmp *0xdeadbeef(%ebx,%ecx,8) -// CHECK: jmp *3135175374 +// CHECK: jmpl *3135175374 // CHECK: encoding: [0xff,0x25,0xce,0xfa,0xde,0xba] jmp *0xbadeface @@ -1702,6 +3333,10 @@ // CHECK: encoding: [0xc9] leave +// CHECK: leave +// CHECK: encoding: [0xc9] + leavel + // CHECK: seto %bl // CHECK: encoding: [0x0f,0x90,0xc3] seto %bl @@ -2846,19 +4481,19 @@ // CHECK: encoding: [0xdb,0xda] fcmovnu %st(2),%st -// CHECK: fcomi %st(2), %st(0) +// CHECK: fcomi %st(2) // CHECK: encoding: [0xdb,0xf2] fcomi %st(2),%st -// CHECK: fucomi %st(2), %st(0) +// CHECK: fucomi %st(2) // CHECK: encoding: [0xdb,0xea] fucomi %st(2),%st -// CHECK: fcomip %st(2), %st(0) +// CHECK: fcompi %st(2) // CHECK: encoding: [0xdf,0xf2] fcomip %st(2),%st -// CHECK: fucomip %st(2), %st(0) +// CHECK: fucompi %st(2) // CHECK: encoding: [0xdf,0xea] fucomip %st(2),%st @@ -9964,7 +11599,7 @@ // rdar://8017638 // CHECK: aeskeygenassist $128, %xmm1, %xmm2 -// CHECK: encoding: [0x66,0x0f,0x3a,0xdf,0x14,0x82,0x80] +// CHECK: encoding: [0x66,0x0f,0x3a,0xdf,0xd1,0x80] aeskeygenassist $128, %xmm1, %xmm2 // rdar://7910087 @@ -9986,7 +11621,7 @@ // radr://7901779 // CHECK: pushl $127 -// CHECK: encoding: [0x6a,0xfe] +// CHECK: encoding: [0x6a,0x7f] pushl $127 // CHECK: pushw $254 @@ -10067,3 +11702,7863 @@ // CHECK: encoding: [0x8b,0x04,0xe1] movl (%ecx,%eiz,8), %eax +// CHECK: addl $4294967295, %eax # encoding: [0x83,0xc0,0xff] + addl $0xFFFFFFFF, %eax + +// CHECK: addw $65535, %ax # encoding: [0x66,0x83,0xc0,0xff] + addw $0xFFFF, %ax + + +// CHECK: movb $127, 3735928559(%ebx,%ecx,8) + movb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movb $127, 69 + movb $0x7f,0x45 + +// CHECK: movb $127, 32493 + movb $0x7f,0x7eed + +// CHECK: movb $127, 3133065982 + movb $0x7f,0xbabecafe + +// CHECK: movb $127, 305419896 + movb $0x7f,0x12345678 + +// CHECK: movw $31438, 3735928559(%ebx,%ecx,8) + movw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movw $31438, 69 + movw $0x7ace,0x45 + +// CHECK: movw $31438, 32493 + movw $0x7ace,0x7eed + +// CHECK: movw $31438, 3133065982 + movw $0x7ace,0xbabecafe + +// CHECK: movw $31438, 305419896 + movw $0x7ace,0x12345678 + +// CHECK: movl $2063514302, 3735928559(%ebx,%ecx,8) + movl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movl $2063514302, 69 + movl $0x7afebabe,0x45 + +// CHECK: movl $2063514302, 32493 + movl $0x7afebabe,0x7eed + +// CHECK: movl $2063514302, 3133065982 + movl $0x7afebabe,0xbabecafe + +// CHECK: movl $2063514302, 305419896 + movl $0x7afebabe,0x12345678 + +// CHECK: movl $324478056, 3735928559(%ebx,%ecx,8) + movl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movl $324478056, 69 + movl $0x13572468,0x45 + +// CHECK: movl $324478056, 32493 + movl $0x13572468,0x7eed + +// CHECK: movl $324478056, 3133065982 + movl $0x13572468,0xbabecafe + +// CHECK: movl $324478056, 305419896 + movl $0x13572468,0x12345678 + +// CHECK: movsbl 3735928559(%ebx,%ecx,8), %ecx + movsbl 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: movsbl 69, %ecx + movsbl 0x45,%ecx + +// CHECK: movsbl 32493, %ecx + movsbl 0x7eed,%ecx + +// CHECK: movsbl 3133065982, %ecx + movsbl 0xbabecafe,%ecx + +// CHECK: movsbl 305419896, %ecx + movsbl 0x12345678,%ecx + +// CHECK: movsbw 3735928559(%ebx,%ecx,8), %bx + movsbw 0xdeadbeef(%ebx,%ecx,8),%bx + +// CHECK: movsbw 69, %bx + movsbw 0x45,%bx + +// CHECK: movsbw 32493, %bx + movsbw 0x7eed,%bx + +// CHECK: movsbw 3133065982, %bx + movsbw 0xbabecafe,%bx + +// CHECK: movsbw 305419896, %bx + movsbw 0x12345678,%bx + +// CHECK: movswl 3735928559(%ebx,%ecx,8), %ecx + movswl 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: movswl 69, %ecx + movswl 0x45,%ecx + +// CHECK: movswl 32493, %ecx + movswl 0x7eed,%ecx + +// CHECK: movswl 3133065982, %ecx + movswl 0xbabecafe,%ecx + +// CHECK: movswl 305419896, %ecx + movswl 0x12345678,%ecx + +// CHECK: movzbl 3735928559(%ebx,%ecx,8), %ecx + movzbl 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: movzbl 69, %ecx + movzbl 0x45,%ecx + +// CHECK: movzbl 32493, %ecx + movzbl 0x7eed,%ecx + +// CHECK: movzbl 3133065982, %ecx + movzbl 0xbabecafe,%ecx + +// CHECK: movzbl 305419896, %ecx + movzbl 0x12345678,%ecx + +// CHECK: movzbw 3735928559(%ebx,%ecx,8), %bx + movzbw 0xdeadbeef(%ebx,%ecx,8),%bx + +// CHECK: movzbw 69, %bx + movzbw 0x45,%bx + +// CHECK: movzbw 32493, %bx + movzbw 0x7eed,%bx + +// CHECK: movzbw 3133065982, %bx + movzbw 0xbabecafe,%bx + +// CHECK: movzbw 305419896, %bx + movzbw 0x12345678,%bx + +// CHECK: movzwl 3735928559(%ebx,%ecx,8), %ecx + movzwl 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: movzwl 69, %ecx + movzwl 0x45,%ecx + +// CHECK: movzwl 32493, %ecx + movzwl 0x7eed,%ecx + +// CHECK: movzwl 3133065982, %ecx + movzwl 0xbabecafe,%ecx + +// CHECK: movzwl 305419896, %ecx + movzwl 0x12345678,%ecx + +// CHECK: pushw 32493 + pushw 0x7eed + +// CHECK: popw 32493 + popw 0x7eed + +// CHECK: pushf + pushfl + +// CHECK: pushfl + pushfl + +// CHECK: popf + popfl + +// CHECK: popfl + popfl + +// CHECK: clc + clc + +// CHECK: cld + cld + +// CHECK: cli + cli + +// CHECK: clts + clts + +// CHECK: cmc + cmc + +// CHECK: lahf + lahf + +// CHECK: sahf + sahf + +// CHECK: stc + stc + +// CHECK: std + std + +// CHECK: sti + sti + +// CHECK: addb $254, 3735928559(%ebx,%ecx,8) + addb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addb $254, 69 + addb $0xfe,0x45 + +// CHECK: addb $254, 32493 + addb $0xfe,0x7eed + +// CHECK: addb $254, 3133065982 + addb $0xfe,0xbabecafe + +// CHECK: addb $254, 305419896 + addb $0xfe,0x12345678 + +// CHECK: addb $127, 3735928559(%ebx,%ecx,8) + addb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addb $127, 69 + addb $0x7f,0x45 + +// CHECK: addb $127, 32493 + addb $0x7f,0x7eed + +// CHECK: addb $127, 3133065982 + addb $0x7f,0xbabecafe + +// CHECK: addb $127, 305419896 + addb $0x7f,0x12345678 + +// CHECK: addw $31438, 3735928559(%ebx,%ecx,8) + addw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addw $31438, 69 + addw $0x7ace,0x45 + +// CHECK: addw $31438, 32493 + addw $0x7ace,0x7eed + +// CHECK: addw $31438, 3133065982 + addw $0x7ace,0xbabecafe + +// CHECK: addw $31438, 305419896 + addw $0x7ace,0x12345678 + +// CHECK: addl $2063514302, 3735928559(%ebx,%ecx,8) + addl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addl $2063514302, 69 + addl $0x7afebabe,0x45 + +// CHECK: addl $2063514302, 32493 + addl $0x7afebabe,0x7eed + +// CHECK: addl $2063514302, 3133065982 + addl $0x7afebabe,0xbabecafe + +// CHECK: addl $2063514302, 305419896 + addl $0x7afebabe,0x12345678 + +// CHECK: addl $324478056, 3735928559(%ebx,%ecx,8) + addl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: addl $324478056, 69 + addl $0x13572468,0x45 + +// CHECK: addl $324478056, 32493 + addl $0x13572468,0x7eed + +// CHECK: addl $324478056, 3133065982 + addl $0x13572468,0xbabecafe + +// CHECK: addl $324478056, 305419896 + addl $0x13572468,0x12345678 + +// CHECK: incl 3735928559(%ebx,%ecx,8) + incl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: incw 32493 + incw 0x7eed + +// CHECK: incl 3133065982 + incl 0xbabecafe + +// CHECK: incl 305419896 + incl 0x12345678 + +// CHECK: subb $254, 3735928559(%ebx,%ecx,8) + subb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subb $254, 69 + subb $0xfe,0x45 + +// CHECK: subb $254, 32493 + subb $0xfe,0x7eed + +// CHECK: subb $254, 3133065982 + subb $0xfe,0xbabecafe + +// CHECK: subb $254, 305419896 + subb $0xfe,0x12345678 + +// CHECK: subb $127, 3735928559(%ebx,%ecx,8) + subb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subb $127, 69 + subb $0x7f,0x45 + +// CHECK: subb $127, 32493 + subb $0x7f,0x7eed + +// CHECK: subb $127, 3133065982 + subb $0x7f,0xbabecafe + +// CHECK: subb $127, 305419896 + subb $0x7f,0x12345678 + +// CHECK: subw $31438, 3735928559(%ebx,%ecx,8) + subw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subw $31438, 69 + subw $0x7ace,0x45 + +// CHECK: subw $31438, 32493 + subw $0x7ace,0x7eed + +// CHECK: subw $31438, 3133065982 + subw $0x7ace,0xbabecafe + +// CHECK: subw $31438, 305419896 + subw $0x7ace,0x12345678 + +// CHECK: subl $2063514302, 3735928559(%ebx,%ecx,8) + subl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subl $2063514302, 69 + subl $0x7afebabe,0x45 + +// CHECK: subl $2063514302, 32493 + subl $0x7afebabe,0x7eed + +// CHECK: subl $2063514302, 3133065982 + subl $0x7afebabe,0xbabecafe + +// CHECK: subl $2063514302, 305419896 + subl $0x7afebabe,0x12345678 + +// CHECK: subl $324478056, 3735928559(%ebx,%ecx,8) + subl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: subl $324478056, 69 + subl $0x13572468,0x45 + +// CHECK: subl $324478056, 32493 + subl $0x13572468,0x7eed + +// CHECK: subl $324478056, 3133065982 + subl $0x13572468,0xbabecafe + +// CHECK: subl $324478056, 305419896 + subl $0x13572468,0x12345678 + +// CHECK: decl 3735928559(%ebx,%ecx,8) + decl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: decw 32493 + decw 0x7eed + +// CHECK: decl 3133065982 + decl 0xbabecafe + +// CHECK: decl 305419896 + decl 0x12345678 + +// CHECK: sbbb $254, 3735928559(%ebx,%ecx,8) + sbbb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sbbb $254, 69 + sbbb $0xfe,0x45 + +// CHECK: sbbb $254, 32493 + sbbb $0xfe,0x7eed + +// CHECK: sbbb $254, 3133065982 + sbbb $0xfe,0xbabecafe + +// CHECK: sbbb $254, 305419896 + sbbb $0xfe,0x12345678 + +// CHECK: sbbb $127, 3735928559(%ebx,%ecx,8) + sbbb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sbbb $127, 69 + sbbb $0x7f,0x45 + +// CHECK: sbbb $127, 32493 + sbbb $0x7f,0x7eed + +// CHECK: sbbb $127, 3133065982 + sbbb $0x7f,0xbabecafe + +// CHECK: sbbb $127, 305419896 + sbbb $0x7f,0x12345678 + +// CHECK: sbbw $31438, 3735928559(%ebx,%ecx,8) + sbbw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sbbw $31438, 69 + sbbw $0x7ace,0x45 + +// CHECK: sbbw $31438, 32493 + sbbw $0x7ace,0x7eed + +// CHECK: sbbw $31438, 3133065982 + sbbw $0x7ace,0xbabecafe + +// CHECK: sbbw $31438, 305419896 + sbbw $0x7ace,0x12345678 + +// CHECK: sbbl $2063514302, 3735928559(%ebx,%ecx,8) + sbbl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sbbl $2063514302, 69 + sbbl $0x7afebabe,0x45 + +// CHECK: sbbl $2063514302, 32493 + sbbl $0x7afebabe,0x7eed + +// CHECK: sbbl $2063514302, 3133065982 + sbbl $0x7afebabe,0xbabecafe + +// CHECK: sbbl $2063514302, 305419896 + sbbl $0x7afebabe,0x12345678 + +// CHECK: sbbl $324478056, 3735928559(%ebx,%ecx,8) + sbbl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sbbl $324478056, 69 + sbbl $0x13572468,0x45 + +// CHECK: sbbl $324478056, 32493 + sbbl $0x13572468,0x7eed + +// CHECK: sbbl $324478056, 3133065982 + sbbl $0x13572468,0xbabecafe + +// CHECK: sbbl $324478056, 305419896 + sbbl $0x13572468,0x12345678 + +// CHECK: cmpb $254, 3735928559(%ebx,%ecx,8) + cmpb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpb $254, 69 + cmpb $0xfe,0x45 + +// CHECK: cmpb $254, 32493 + cmpb $0xfe,0x7eed + +// CHECK: cmpb $254, 3133065982 + cmpb $0xfe,0xbabecafe + +// CHECK: cmpb $254, 305419896 + cmpb $0xfe,0x12345678 + +// CHECK: cmpb $127, 3735928559(%ebx,%ecx,8) + cmpb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpb $127, 69 + cmpb $0x7f,0x45 + +// CHECK: cmpb $127, 32493 + cmpb $0x7f,0x7eed + +// CHECK: cmpb $127, 3133065982 + cmpb $0x7f,0xbabecafe + +// CHECK: cmpb $127, 305419896 + cmpb $0x7f,0x12345678 + +// CHECK: cmpw $31438, 3735928559(%ebx,%ecx,8) + cmpw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpw $31438, 69 + cmpw $0x7ace,0x45 + +// CHECK: cmpw $31438, 32493 + cmpw $0x7ace,0x7eed + +// CHECK: cmpw $31438, 3133065982 + cmpw $0x7ace,0xbabecafe + +// CHECK: cmpw $31438, 305419896 + cmpw $0x7ace,0x12345678 + +// CHECK: cmpl $2063514302, 3735928559(%ebx,%ecx,8) + cmpl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpl $2063514302, 69 + cmpl $0x7afebabe,0x45 + +// CHECK: cmpl $2063514302, 32493 + cmpl $0x7afebabe,0x7eed + +// CHECK: cmpl $2063514302, 3133065982 + cmpl $0x7afebabe,0xbabecafe + +// CHECK: cmpl $2063514302, 305419896 + cmpl $0x7afebabe,0x12345678 + +// CHECK: cmpl $324478056, 3735928559(%ebx,%ecx,8) + cmpl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpl $324478056, 69 + cmpl $0x13572468,0x45 + +// CHECK: cmpl $324478056, 32493 + cmpl $0x13572468,0x7eed + +// CHECK: cmpl $324478056, 3133065982 + cmpl $0x13572468,0xbabecafe + +// CHECK: cmpl $324478056, 305419896 + cmpl $0x13572468,0x12345678 + +// CHECK: testb $127, 3735928559(%ebx,%ecx,8) + testb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: testb $127, 69 + testb $0x7f,0x45 + +// CHECK: testb $127, 32493 + testb $0x7f,0x7eed + +// CHECK: testb $127, 3133065982 + testb $0x7f,0xbabecafe + +// CHECK: testb $127, 305419896 + testb $0x7f,0x12345678 + +// CHECK: testw $31438, 3735928559(%ebx,%ecx,8) + testw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: testw $31438, 69 + testw $0x7ace,0x45 + +// CHECK: testw $31438, 32493 + testw $0x7ace,0x7eed + +// CHECK: testw $31438, 3133065982 + testw $0x7ace,0xbabecafe + +// CHECK: testw $31438, 305419896 + testw $0x7ace,0x12345678 + +// CHECK: testl $2063514302, 3735928559(%ebx,%ecx,8) + testl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: testl $2063514302, 69 + testl $0x7afebabe,0x45 + +// CHECK: testl $2063514302, 32493 + testl $0x7afebabe,0x7eed + +// CHECK: testl $2063514302, 3133065982 + testl $0x7afebabe,0xbabecafe + +// CHECK: testl $2063514302, 305419896 + testl $0x7afebabe,0x12345678 + +// CHECK: testl $324478056, 3735928559(%ebx,%ecx,8) + testl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: testl $324478056, 69 + testl $0x13572468,0x45 + +// CHECK: testl $324478056, 32493 + testl $0x13572468,0x7eed + +// CHECK: testl $324478056, 3133065982 + testl $0x13572468,0xbabecafe + +// CHECK: testl $324478056, 305419896 + testl $0x13572468,0x12345678 + +// CHECK: andb $254, 3735928559(%ebx,%ecx,8) + andb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andb $254, 69 + andb $0xfe,0x45 + +// CHECK: andb $254, 32493 + andb $0xfe,0x7eed + +// CHECK: andb $254, 3133065982 + andb $0xfe,0xbabecafe + +// CHECK: andb $254, 305419896 + andb $0xfe,0x12345678 + +// CHECK: andb $127, 3735928559(%ebx,%ecx,8) + andb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andb $127, 69 + andb $0x7f,0x45 + +// CHECK: andb $127, 32493 + andb $0x7f,0x7eed + +// CHECK: andb $127, 3133065982 + andb $0x7f,0xbabecafe + +// CHECK: andb $127, 305419896 + andb $0x7f,0x12345678 + +// CHECK: andw $31438, 3735928559(%ebx,%ecx,8) + andw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andw $31438, 69 + andw $0x7ace,0x45 + +// CHECK: andw $31438, 32493 + andw $0x7ace,0x7eed + +// CHECK: andw $31438, 3133065982 + andw $0x7ace,0xbabecafe + +// CHECK: andw $31438, 305419896 + andw $0x7ace,0x12345678 + +// CHECK: andl $2063514302, 3735928559(%ebx,%ecx,8) + andl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andl $2063514302, 69 + andl $0x7afebabe,0x45 + +// CHECK: andl $2063514302, 32493 + andl $0x7afebabe,0x7eed + +// CHECK: andl $2063514302, 3133065982 + andl $0x7afebabe,0xbabecafe + +// CHECK: andl $2063514302, 305419896 + andl $0x7afebabe,0x12345678 + +// CHECK: andl $324478056, 3735928559(%ebx,%ecx,8) + andl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: andl $324478056, 69 + andl $0x13572468,0x45 + +// CHECK: andl $324478056, 32493 + andl $0x13572468,0x7eed + +// CHECK: andl $324478056, 3133065982 + andl $0x13572468,0xbabecafe + +// CHECK: andl $324478056, 305419896 + andl $0x13572468,0x12345678 + +// CHECK: orb $254, 3735928559(%ebx,%ecx,8) + orb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orb $254, 69 + orb $0xfe,0x45 + +// CHECK: orb $254, 32493 + orb $0xfe,0x7eed + +// CHECK: orb $254, 3133065982 + orb $0xfe,0xbabecafe + +// CHECK: orb $254, 305419896 + orb $0xfe,0x12345678 + +// CHECK: orb $127, 3735928559(%ebx,%ecx,8) + orb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orb $127, 69 + orb $0x7f,0x45 + +// CHECK: orb $127, 32493 + orb $0x7f,0x7eed + +// CHECK: orb $127, 3133065982 + orb $0x7f,0xbabecafe + +// CHECK: orb $127, 305419896 + orb $0x7f,0x12345678 + +// CHECK: orw $31438, 3735928559(%ebx,%ecx,8) + orw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orw $31438, 69 + orw $0x7ace,0x45 + +// CHECK: orw $31438, 32493 + orw $0x7ace,0x7eed + +// CHECK: orw $31438, 3133065982 + orw $0x7ace,0xbabecafe + +// CHECK: orw $31438, 305419896 + orw $0x7ace,0x12345678 + +// CHECK: orl $2063514302, 3735928559(%ebx,%ecx,8) + orl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orl $2063514302, 69 + orl $0x7afebabe,0x45 + +// CHECK: orl $2063514302, 32493 + orl $0x7afebabe,0x7eed + +// CHECK: orl $2063514302, 3133065982 + orl $0x7afebabe,0xbabecafe + +// CHECK: orl $2063514302, 305419896 + orl $0x7afebabe,0x12345678 + +// CHECK: orl $324478056, 3735928559(%ebx,%ecx,8) + orl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: orl $324478056, 69 + orl $0x13572468,0x45 + +// CHECK: orl $324478056, 32493 + orl $0x13572468,0x7eed + +// CHECK: orl $324478056, 3133065982 + orl $0x13572468,0xbabecafe + +// CHECK: orl $324478056, 305419896 + orl $0x13572468,0x12345678 + +// CHECK: xorb $254, 3735928559(%ebx,%ecx,8) + xorb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorb $254, 69 + xorb $0xfe,0x45 + +// CHECK: xorb $254, 32493 + xorb $0xfe,0x7eed + +// CHECK: xorb $254, 3133065982 + xorb $0xfe,0xbabecafe + +// CHECK: xorb $254, 305419896 + xorb $0xfe,0x12345678 + +// CHECK: xorb $127, 3735928559(%ebx,%ecx,8) + xorb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorb $127, 69 + xorb $0x7f,0x45 + +// CHECK: xorb $127, 32493 + xorb $0x7f,0x7eed + +// CHECK: xorb $127, 3133065982 + xorb $0x7f,0xbabecafe + +// CHECK: xorb $127, 305419896 + xorb $0x7f,0x12345678 + +// CHECK: xorw $31438, 3735928559(%ebx,%ecx,8) + xorw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorw $31438, 69 + xorw $0x7ace,0x45 + +// CHECK: xorw $31438, 32493 + xorw $0x7ace,0x7eed + +// CHECK: xorw $31438, 3133065982 + xorw $0x7ace,0xbabecafe + +// CHECK: xorw $31438, 305419896 + xorw $0x7ace,0x12345678 + +// CHECK: xorl $2063514302, 3735928559(%ebx,%ecx,8) + xorl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorl $2063514302, 69 + xorl $0x7afebabe,0x45 + +// CHECK: xorl $2063514302, 32493 + xorl $0x7afebabe,0x7eed + +// CHECK: xorl $2063514302, 3133065982 + xorl $0x7afebabe,0xbabecafe + +// CHECK: xorl $2063514302, 305419896 + xorl $0x7afebabe,0x12345678 + +// CHECK: xorl $324478056, 3735928559(%ebx,%ecx,8) + xorl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: xorl $324478056, 69 + xorl $0x13572468,0x45 + +// CHECK: xorl $324478056, 32493 + xorl $0x13572468,0x7eed + +// CHECK: xorl $324478056, 3133065982 + xorl $0x13572468,0xbabecafe + +// CHECK: xorl $324478056, 305419896 + xorl $0x13572468,0x12345678 + +// CHECK: adcb $254, 3735928559(%ebx,%ecx,8) + adcb $0xfe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcb $254, 69 + adcb $0xfe,0x45 + +// CHECK: adcb $254, 32493 + adcb $0xfe,0x7eed + +// CHECK: adcb $254, 3133065982 + adcb $0xfe,0xbabecafe + +// CHECK: adcb $254, 305419896 + adcb $0xfe,0x12345678 + +// CHECK: adcb $127, 3735928559(%ebx,%ecx,8) + adcb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcb $127, 69 + adcb $0x7f,0x45 + +// CHECK: adcb $127, 32493 + adcb $0x7f,0x7eed + +// CHECK: adcb $127, 3133065982 + adcb $0x7f,0xbabecafe + +// CHECK: adcb $127, 305419896 + adcb $0x7f,0x12345678 + +// CHECK: adcw $31438, 3735928559(%ebx,%ecx,8) + adcw $0x7ace,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcw $31438, 69 + adcw $0x7ace,0x45 + +// CHECK: adcw $31438, 32493 + adcw $0x7ace,0x7eed + +// CHECK: adcw $31438, 3133065982 + adcw $0x7ace,0xbabecafe + +// CHECK: adcw $31438, 305419896 + adcw $0x7ace,0x12345678 + +// CHECK: adcl $2063514302, 3735928559(%ebx,%ecx,8) + adcl $0x7afebabe,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcl $2063514302, 69 + adcl $0x7afebabe,0x45 + +// CHECK: adcl $2063514302, 32493 + adcl $0x7afebabe,0x7eed + +// CHECK: adcl $2063514302, 3133065982 + adcl $0x7afebabe,0xbabecafe + +// CHECK: adcl $2063514302, 305419896 + adcl $0x7afebabe,0x12345678 + +// CHECK: adcl $324478056, 3735928559(%ebx,%ecx,8) + adcl $0x13572468,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: adcl $324478056, 69 + adcl $0x13572468,0x45 + +// CHECK: adcl $324478056, 32493 + adcl $0x13572468,0x7eed + +// CHECK: adcl $324478056, 3133065982 + adcl $0x13572468,0xbabecafe + +// CHECK: adcl $324478056, 305419896 + adcl $0x13572468,0x12345678 + +// CHECK: negl 3735928559(%ebx,%ecx,8) + negl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: negw 32493 + negw 0x7eed + +// CHECK: negl 3133065982 + negl 0xbabecafe + +// CHECK: negl 305419896 + negl 0x12345678 + +// CHECK: notl 3735928559(%ebx,%ecx,8) + notl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: notw 32493 + notw 0x7eed + +// CHECK: notl 3133065982 + notl 0xbabecafe + +// CHECK: notl 305419896 + notl 0x12345678 + +// CHECK: cbtw + cbtw + +// CHECK: cwtl + cwtl + +// CHECK: cwtd + cwtd + +// CHECK: cltd + cltd + +// CHECK: mull 3735928559(%ebx,%ecx,8) + mull 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: mulw 32493 + mulw 0x7eed + +// CHECK: mull 3133065982 + mull 0xbabecafe + +// CHECK: mull 305419896 + mull 0x12345678 + +// CHECK: imull 3735928559(%ebx,%ecx,8) + imull 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: imulw 32493 + imulw 0x7eed + +// CHECK: imull 3133065982 + imull 0xbabecafe + +// CHECK: imull 305419896 + imull 0x12345678 + +// CHECK: divl 3735928559(%ebx,%ecx,8) + divl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: divw 32493 + divw 0x7eed + +// CHECK: divl 3133065982 + divl 0xbabecafe + +// CHECK: divl 305419896 + divl 0x12345678 + +// CHECK: idivl 3735928559(%ebx,%ecx,8) + idivl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: idivw 32493 + idivw 0x7eed + +// CHECK: idivl 3133065982 + idivl 0xbabecafe + +// CHECK: idivl 305419896 + idivl 0x12345678 + +// CHECK: roll $0, 3735928559(%ebx,%ecx,8) + roll $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: roll $0, 69 + roll $0,0x45 + +// CHECK: roll $0, 32493 + roll $0,0x7eed + +// CHECK: roll $0, 3133065982 + roll $0,0xbabecafe + +// CHECK: roll $0, 305419896 + roll $0,0x12345678 + +// CHECK: rolb $127, 3735928559(%ebx,%ecx,8) + rolb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rolb $127, 69 + rolb $0x7f,0x45 + +// CHECK: rolb $127, 32493 + rolb $0x7f,0x7eed + +// CHECK: rolb $127, 3133065982 + rolb $0x7f,0xbabecafe + +// CHECK: rolb $127, 305419896 + rolb $0x7f,0x12345678 + +// CHECK: roll 3735928559(%ebx,%ecx,8) + roll 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rolw 32493 + rolw 0x7eed + +// CHECK: roll 3133065982 + roll 0xbabecafe + +// CHECK: roll 305419896 + roll 0x12345678 + +// CHECK: rorl $0, 3735928559(%ebx,%ecx,8) + rorl $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rorl $0, 69 + rorl $0,0x45 + +// CHECK: rorl $0, 32493 + rorl $0,0x7eed + +// CHECK: rorl $0, 3133065982 + rorl $0,0xbabecafe + +// CHECK: rorl $0, 305419896 + rorl $0,0x12345678 + +// CHECK: rorb $127, 3735928559(%ebx,%ecx,8) + rorb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rorb $127, 69 + rorb $0x7f,0x45 + +// CHECK: rorb $127, 32493 + rorb $0x7f,0x7eed + +// CHECK: rorb $127, 3133065982 + rorb $0x7f,0xbabecafe + +// CHECK: rorb $127, 305419896 + rorb $0x7f,0x12345678 + +// CHECK: rorl 3735928559(%ebx,%ecx,8) + rorl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rorw 32493 + rorw 0x7eed + +// CHECK: rorl 3133065982 + rorl 0xbabecafe + +// CHECK: rorl 305419896 + rorl 0x12345678 + +// CHECK: rcll $0, 3735928559(%ebx,%ecx,8) + rcll $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rcll $0, 69 + rcll $0,0x45 + +// CHECK: rcll $0, 32493 + rcll $0,0x7eed + +// CHECK: rcll $0, 3133065982 + rcll $0,0xbabecafe + +// CHECK: rcll $0, 305419896 + rcll $0,0x12345678 + +// CHECK: rclb $127, 3735928559(%ebx,%ecx,8) + rclb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rclb $127, 69 + rclb $0x7f,0x45 + +// CHECK: rclb $127, 32493 + rclb $0x7f,0x7eed + +// CHECK: rclb $127, 3133065982 + rclb $0x7f,0xbabecafe + +// CHECK: rclb $127, 305419896 + rclb $0x7f,0x12345678 + +// CHECK: rcrl $0, 3735928559(%ebx,%ecx,8) + rcrl $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rcrl $0, 69 + rcrl $0,0x45 + +// CHECK: rcrl $0, 32493 + rcrl $0,0x7eed + +// CHECK: rcrl $0, 3133065982 + rcrl $0,0xbabecafe + +// CHECK: rcrl $0, 305419896 + rcrl $0,0x12345678 + +// CHECK: rcrb $127, 3735928559(%ebx,%ecx,8) + rcrb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: rcrb $127, 69 + rcrb $0x7f,0x45 + +// CHECK: rcrb $127, 32493 + rcrb $0x7f,0x7eed + +// CHECK: rcrb $127, 3133065982 + rcrb $0x7f,0xbabecafe + +// CHECK: rcrb $127, 305419896 + rcrb $0x7f,0x12345678 + +// CHECK: shll $0, 3735928559(%ebx,%ecx,8) + sall $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shll $0, 69 + sall $0,0x45 + +// CHECK: shll $0, 32493 + sall $0,0x7eed + +// CHECK: shll $0, 3133065982 + sall $0,0xbabecafe + +// CHECK: shll $0, 305419896 + sall $0,0x12345678 + +// CHECK: shlb $127, 3735928559(%ebx,%ecx,8) + salb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shlb $127, 69 + salb $0x7f,0x45 + +// CHECK: shlb $127, 32493 + salb $0x7f,0x7eed + +// CHECK: shlb $127, 3133065982 + salb $0x7f,0xbabecafe + +// CHECK: shlb $127, 305419896 + salb $0x7f,0x12345678 + +// CHECK: shll 3735928559(%ebx,%ecx,8) + sall 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shlw 32493 + salw 0x7eed + +// CHECK: shll 3133065982 + sall 0xbabecafe + +// CHECK: shll 305419896 + sall 0x12345678 + +// CHECK: shll $0, 3735928559(%ebx,%ecx,8) + shll $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shll $0, 69 + shll $0,0x45 + +// CHECK: shll $0, 32493 + shll $0,0x7eed + +// CHECK: shll $0, 3133065982 + shll $0,0xbabecafe + +// CHECK: shll $0, 305419896 + shll $0,0x12345678 + +// CHECK: shlb $127, 3735928559(%ebx,%ecx,8) + shlb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shlb $127, 69 + shlb $0x7f,0x45 + +// CHECK: shlb $127, 32493 + shlb $0x7f,0x7eed + +// CHECK: shlb $127, 3133065982 + shlb $0x7f,0xbabecafe + +// CHECK: shlb $127, 305419896 + shlb $0x7f,0x12345678 + +// CHECK: shll 3735928559(%ebx,%ecx,8) + shll 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shlw 32493 + shlw 0x7eed + +// CHECK: shll 3133065982 + shll 0xbabecafe + +// CHECK: shll 305419896 + shll 0x12345678 + +// CHECK: shrl $0, 3735928559(%ebx,%ecx,8) + shrl $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shrl $0, 69 + shrl $0,0x45 + +// CHECK: shrl $0, 32493 + shrl $0,0x7eed + +// CHECK: shrl $0, 3133065982 + shrl $0,0xbabecafe + +// CHECK: shrl $0, 305419896 + shrl $0,0x12345678 + +// CHECK: shrb $127, 3735928559(%ebx,%ecx,8) + shrb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shrb $127, 69 + shrb $0x7f,0x45 + +// CHECK: shrb $127, 32493 + shrb $0x7f,0x7eed + +// CHECK: shrb $127, 3133065982 + shrb $0x7f,0xbabecafe + +// CHECK: shrb $127, 305419896 + shrb $0x7f,0x12345678 + +// CHECK: shrl 3735928559(%ebx,%ecx,8) + shrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: shrw 32493 + shrw 0x7eed + +// CHECK: shrl 3133065982 + shrl 0xbabecafe + +// CHECK: shrl 305419896 + shrl 0x12345678 + +// CHECK: sarl $0, 3735928559(%ebx,%ecx,8) + sarl $0,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sarl $0, 69 + sarl $0,0x45 + +// CHECK: sarl $0, 32493 + sarl $0,0x7eed + +// CHECK: sarl $0, 3133065982 + sarl $0,0xbabecafe + +// CHECK: sarl $0, 305419896 + sarl $0,0x12345678 + +// CHECK: sarb $127, 3735928559(%ebx,%ecx,8) + sarb $0x7f,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sarb $127, 69 + sarb $0x7f,0x45 + +// CHECK: sarb $127, 32493 + sarb $0x7f,0x7eed + +// CHECK: sarb $127, 3133065982 + sarb $0x7f,0xbabecafe + +// CHECK: sarb $127, 305419896 + sarb $0x7f,0x12345678 + +// CHECK: sarl 3735928559(%ebx,%ecx,8) + sarl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sarw 32493 + sarw 0x7eed + +// CHECK: sarl 3133065982 + sarl 0xbabecafe + +// CHECK: sarl 305419896 + sarl 0x12345678 + +// CHECK: calll 3133065982 + calll 0xbabecafe + +// CHECK: calll *3735928559(%ebx,%ecx,8) + calll *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: calll 3133065982 + calll 0xbabecafe + +// CHECK: calll 305419896 + calll 0x12345678 + +// CHECK: calll *3135175374 + call *0xbadeface + +// CHECK: calll *3735928559(%ebx,%ecx,8) + call *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: calll 32493 + call 0x7eed + +// CHECK: calll 3133065982 + call 0xbabecafe + +// CHECK: calll 305419896 + call 0x12345678 + +// CHECK: calll *3135175374 + call *0xbadeface + +// CHECK: lcallw *32493 + lcallw *0x7eed + +// CHECK: jmp 32493 + jmp 0x7eed + +// CHECK: jmp 3133065982 + jmp 0xbabecafe + +// CHECK: jmp 305419896 + jmp 0x12345678 + +// CHECK: jmp -77129852792157442 + jmp 0xfeedfacebabecafe + +// CHECK: jmpl *3735928559(%ebx,%ecx,8) + jmp *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: jmp 32493 + jmp 0x7eed + +// CHECK: jmp 3133065982 + jmp 0xbabecafe + +// CHECK: jmp 305419896 + jmp 0x12345678 + +// CHECK: jmpl *3135175374 + jmp *0xbadeface + +// CHECK: jmpl *3735928559(%ebx,%ecx,8) + jmp *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: jmp 32493 + jmp 0x7eed + +// CHECK: jmp 3133065982 + jmp 0xbabecafe + +// CHECK: jmp 305419896 + jmp 0x12345678 + +// CHECK: jmpl *3135175374 + jmp *0xbadeface + +// CHECK: ljmpl *3735928559(%ebx,%ecx,8) + ljmpl *0xdeadbeef(%ebx,%ecx,8) + +// CHECK: ljmpw *32493 + ljmpw *0x7eed + +// CHECK: ljmpl *3133065982 + ljmpl *0xbabecafe + +// CHECK: ljmpl *305419896 + ljmpl *0x12345678 + +// CHECK: ret + ret + +// CHECK: lret + lret + +// CHECK: enter $31438, $127 + enter $0x7ace,$0x7f + +// CHECK: leave + leave + +// CHECK: jo 32493 + jo 0x7eed + +// CHECK: jo 3133065982 + jo 0xbabecafe + +// CHECK: jo 305419896 + jo 0x12345678 + +// CHECK: jo -77129852792157442 + jo 0xfeedfacebabecafe + +// CHECK: jno 32493 + jno 0x7eed + +// CHECK: jno 3133065982 + jno 0xbabecafe + +// CHECK: jno 305419896 + jno 0x12345678 + +// CHECK: jno -77129852792157442 + jno 0xfeedfacebabecafe + +// CHECK: jb 32493 + jb 0x7eed + +// CHECK: jb 3133065982 + jb 0xbabecafe + +// CHECK: jb 305419896 + jb 0x12345678 + +// CHECK: jb -77129852792157442 + jb 0xfeedfacebabecafe + +// CHECK: jae 32493 + jae 0x7eed + +// CHECK: jae 3133065982 + jae 0xbabecafe + +// CHECK: jae 305419896 + jae 0x12345678 + +// CHECK: jae -77129852792157442 + jae 0xfeedfacebabecafe + +// CHECK: je 32493 + je 0x7eed + +// CHECK: je 3133065982 + je 0xbabecafe + +// CHECK: je 305419896 + je 0x12345678 + +// CHECK: je -77129852792157442 + je 0xfeedfacebabecafe + +// CHECK: jne 32493 + jne 0x7eed + +// CHECK: jne 3133065982 + jne 0xbabecafe + +// CHECK: jne 305419896 + jne 0x12345678 + +// CHECK: jne -77129852792157442 + jne 0xfeedfacebabecafe + +// CHECK: jbe 32493 + jbe 0x7eed + +// CHECK: jbe 3133065982 + jbe 0xbabecafe + +// CHECK: jbe 305419896 + jbe 0x12345678 + +// CHECK: jbe -77129852792157442 + jbe 0xfeedfacebabecafe + +// CHECK: ja 32493 + ja 0x7eed + +// CHECK: ja 3133065982 + ja 0xbabecafe + +// CHECK: ja 305419896 + ja 0x12345678 + +// CHECK: ja -77129852792157442 + ja 0xfeedfacebabecafe + +// CHECK: js 32493 + js 0x7eed + +// CHECK: js 3133065982 + js 0xbabecafe + +// CHECK: js 305419896 + js 0x12345678 + +// CHECK: js -77129852792157442 + js 0xfeedfacebabecafe + +// CHECK: jns 32493 + jns 0x7eed + +// CHECK: jns 3133065982 + jns 0xbabecafe + +// CHECK: jns 305419896 + jns 0x12345678 + +// CHECK: jns -77129852792157442 + jns 0xfeedfacebabecafe + +// CHECK: jp 32493 + jp 0x7eed + +// CHECK: jp 3133065982 + jp 0xbabecafe + +// CHECK: jp 305419896 + jp 0x12345678 + +// CHECK: jp -77129852792157442 + jp 0xfeedfacebabecafe + +// CHECK: jnp 32493 + jnp 0x7eed + +// CHECK: jnp 3133065982 + jnp 0xbabecafe + +// CHECK: jnp 305419896 + jnp 0x12345678 + +// CHECK: jnp -77129852792157442 + jnp 0xfeedfacebabecafe + +// CHECK: jl 32493 + jl 0x7eed + +// CHECK: jl 3133065982 + jl 0xbabecafe + +// CHECK: jl 305419896 + jl 0x12345678 + +// CHECK: jl -77129852792157442 + jl 0xfeedfacebabecafe + +// CHECK: jge 32493 + jge 0x7eed + +// CHECK: jge 3133065982 + jge 0xbabecafe + +// CHECK: jge 305419896 + jge 0x12345678 + +// CHECK: jge -77129852792157442 + jge 0xfeedfacebabecafe + +// CHECK: jle 32493 + jle 0x7eed + +// CHECK: jle 3133065982 + jle 0xbabecafe + +// CHECK: jle 305419896 + jle 0x12345678 + +// CHECK: jle -77129852792157442 + jle 0xfeedfacebabecafe + +// CHECK: jg 32493 + jg 0x7eed + +// CHECK: jg 3133065982 + jg 0xbabecafe + +// CHECK: jg 305419896 + jg 0x12345678 + +// CHECK: jg -77129852792157442 + jg 0xfeedfacebabecafe + +// CHECK: seto %bl + seto %bl + +// CHECK: seto 3735928559(%ebx,%ecx,8) + seto 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: seto 32493 + seto 0x7eed + +// CHECK: seto 3133065982 + seto 0xbabecafe + +// CHECK: seto 305419896 + seto 0x12345678 + +// CHECK: setno %bl + setno %bl + +// CHECK: setno 3735928559(%ebx,%ecx,8) + setno 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setno 32493 + setno 0x7eed + +// CHECK: setno 3133065982 + setno 0xbabecafe + +// CHECK: setno 305419896 + setno 0x12345678 + +// CHECK: setb %bl + setb %bl + +// CHECK: setb 3735928559(%ebx,%ecx,8) + setb 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setb 32493 + setb 0x7eed + +// CHECK: setb 3133065982 + setb 0xbabecafe + +// CHECK: setb 305419896 + setb 0x12345678 + +// CHECK: setae %bl + setae %bl + +// CHECK: setae 3735928559(%ebx,%ecx,8) + setae 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setae 32493 + setae 0x7eed + +// CHECK: setae 3133065982 + setae 0xbabecafe + +// CHECK: setae 305419896 + setae 0x12345678 + +// CHECK: sete %bl + sete %bl + +// CHECK: sete 3735928559(%ebx,%ecx,8) + sete 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sete 32493 + sete 0x7eed + +// CHECK: sete 3133065982 + sete 0xbabecafe + +// CHECK: sete 305419896 + sete 0x12345678 + +// CHECK: setne %bl + setne %bl + +// CHECK: setne 3735928559(%ebx,%ecx,8) + setne 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setne 32493 + setne 0x7eed + +// CHECK: setne 3133065982 + setne 0xbabecafe + +// CHECK: setne 305419896 + setne 0x12345678 + +// CHECK: setbe %bl + setbe %bl + +// CHECK: setbe 3735928559(%ebx,%ecx,8) + setbe 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setbe 32493 + setbe 0x7eed + +// CHECK: setbe 3133065982 + setbe 0xbabecafe + +// CHECK: setbe 305419896 + setbe 0x12345678 + +// CHECK: seta %bl + seta %bl + +// CHECK: seta 3735928559(%ebx,%ecx,8) + seta 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: seta 32493 + seta 0x7eed + +// CHECK: seta 3133065982 + seta 0xbabecafe + +// CHECK: seta 305419896 + seta 0x12345678 + +// CHECK: sets %bl + sets %bl + +// CHECK: sets 3735928559(%ebx,%ecx,8) + sets 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: sets 32493 + sets 0x7eed + +// CHECK: sets 3133065982 + sets 0xbabecafe + +// CHECK: sets 305419896 + sets 0x12345678 + +// CHECK: setns %bl + setns %bl + +// CHECK: setns 3735928559(%ebx,%ecx,8) + setns 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setns 32493 + setns 0x7eed + +// CHECK: setns 3133065982 + setns 0xbabecafe + +// CHECK: setns 305419896 + setns 0x12345678 + +// CHECK: setp %bl + setp %bl + +// CHECK: setp 3735928559(%ebx,%ecx,8) + setp 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setp 32493 + setp 0x7eed + +// CHECK: setp 3133065982 + setp 0xbabecafe + +// CHECK: setp 305419896 + setp 0x12345678 + +// CHECK: setnp %bl + setnp %bl + +// CHECK: setnp 3735928559(%ebx,%ecx,8) + setnp 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setnp 32493 + setnp 0x7eed + +// CHECK: setnp 3133065982 + setnp 0xbabecafe + +// CHECK: setnp 305419896 + setnp 0x12345678 + +// CHECK: setl %bl + setl %bl + +// CHECK: setl 3735928559(%ebx,%ecx,8) + setl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setl 32493 + setl 0x7eed + +// CHECK: setl 3133065982 + setl 0xbabecafe + +// CHECK: setl 305419896 + setl 0x12345678 + +// CHECK: setge %bl + setge %bl + +// CHECK: setge 3735928559(%ebx,%ecx,8) + setge 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setge 32493 + setge 0x7eed + +// CHECK: setge 3133065982 + setge 0xbabecafe + +// CHECK: setge 305419896 + setge 0x12345678 + +// CHECK: setle %bl + setle %bl + +// CHECK: setle 3735928559(%ebx,%ecx,8) + setle 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setle 32493 + setle 0x7eed + +// CHECK: setle 3133065982 + setle 0xbabecafe + +// CHECK: setle 305419896 + setle 0x12345678 + +// CHECK: setg %bl + setg %bl + +// CHECK: setg 3735928559(%ebx,%ecx,8) + setg 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: setg 32493 + setg 0x7eed + +// CHECK: setg 3133065982 + setg 0xbabecafe + +// CHECK: setg 305419896 + setg 0x12345678 + +// CHECK: int $127 + int $0x7f + +// CHECK: rsm + rsm + +// CHECK: hlt + hlt + +// CHECK: nopl 3735928559(%ebx,%ecx,8) + nopl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: nopw 32493 + nopw 0x7eed + +// CHECK: nopl 3133065982 + nopl 0xbabecafe + +// CHECK: nopl 305419896 + nopl 0x12345678 + +// CHECK: nop + nop + +// CHECK: lldtw 32493 + lldtw 0x7eed + +// CHECK: lmsww 32493 + lmsww 0x7eed + +// CHECK: ltrw 32493 + ltrw 0x7eed + +// CHECK: sldtw 32493 + sldtw 0x7eed + +// CHECK: smsww 32493 + smsww 0x7eed + +// CHECK: strw 32493 + strw 0x7eed + +// CHECK: verr %bx + verr %bx + +// CHECK: verr 3735928559(%ebx,%ecx,8) + verr 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: verr 3133065982 + verr 0xbabecafe + +// CHECK: verr 305419896 + verr 0x12345678 + +// CHECK: verw %bx + verw %bx + +// CHECK: verw 3735928559(%ebx,%ecx,8) + verw 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: verw 3133065982 + verw 0xbabecafe + +// CHECK: verw 305419896 + verw 0x12345678 + +// CHECK: fld %st(2) + fld %st(2) + +// CHECK: fldl 3735928559(%ebx,%ecx,8) + fldl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fldl 3133065982 + fldl 0xbabecafe + +// CHECK: fldl 305419896 + fldl 0x12345678 + +// CHECK: fld %st(2) + fld %st(2) + +// CHECK: fildl 3735928559(%ebx,%ecx,8) + fildl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fildl 3133065982 + fildl 0xbabecafe + +// CHECK: fildl 305419896 + fildl 0x12345678 + +// CHECK: fildll 3735928559(%ebx,%ecx,8) + fildll 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fildll 32493 + fildll 0x7eed + +// CHECK: fildll 3133065982 + fildll 0xbabecafe + +// CHECK: fildll 305419896 + fildll 0x12345678 + +// CHECK: fldt 3735928559(%ebx,%ecx,8) + fldt 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fldt 32493 + fldt 0x7eed + +// CHECK: fldt 3133065982 + fldt 0xbabecafe + +// CHECK: fldt 305419896 + fldt 0x12345678 + +// CHECK: fbld 3735928559(%ebx,%ecx,8) + fbld 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fbld 32493 + fbld 0x7eed + +// CHECK: fbld 3133065982 + fbld 0xbabecafe + +// CHECK: fbld 305419896 + fbld 0x12345678 + +// CHECK: fst %st(2) + fst %st(2) + +// CHECK: fstl 3735928559(%ebx,%ecx,8) + fstl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fstl 3133065982 + fstl 0xbabecafe + +// CHECK: fstl 305419896 + fstl 0x12345678 + +// CHECK: fst %st(2) + fst %st(2) + +// CHECK: fistl 3735928559(%ebx,%ecx,8) + fistl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fistl 3133065982 + fistl 0xbabecafe + +// CHECK: fistl 305419896 + fistl 0x12345678 + +// CHECK: fstp %st(2) + fstp %st(2) + +// CHECK: fstpl 3735928559(%ebx,%ecx,8) + fstpl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fstpl 3133065982 + fstpl 0xbabecafe + +// CHECK: fstpl 305419896 + fstpl 0x12345678 + +// CHECK: fstp %st(2) + fstp %st(2) + +// CHECK: fistpl 3735928559(%ebx,%ecx,8) + fistpl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fistpl 3133065982 + fistpl 0xbabecafe + +// CHECK: fistpl 305419896 + fistpl 0x12345678 + +// CHECK: fistpll 3735928559(%ebx,%ecx,8) + fistpll 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fistpll 32493 + fistpll 0x7eed + +// CHECK: fistpll 3133065982 + fistpll 0xbabecafe + +// CHECK: fistpll 305419896 + fistpll 0x12345678 + +// CHECK: fstpt 3735928559(%ebx,%ecx,8) + fstpt 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fstpt 32493 + fstpt 0x7eed + +// CHECK: fstpt 3133065982 + fstpt 0xbabecafe + +// CHECK: fstpt 305419896 + fstpt 0x12345678 + +// CHECK: fbstp 3735928559(%ebx,%ecx,8) + fbstp 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fbstp 32493 + fbstp 0x7eed + +// CHECK: fbstp 3133065982 + fbstp 0xbabecafe + +// CHECK: fbstp 305419896 + fbstp 0x12345678 + +// CHECK: fxch %st(2) + fxch %st(2) + +// CHECK: fcom %st(2) + fcom %st(2) + +// CHECK: fcoml 3735928559(%ebx,%ecx,8) + fcoml 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fcoml 3133065982 + fcoml 0xbabecafe + +// CHECK: fcoml 305419896 + fcoml 0x12345678 + +// CHECK: fcom %st(2) + fcom %st(2) + +// CHECK: ficoml 3735928559(%ebx,%ecx,8) + ficoml 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: ficoml 3133065982 + ficoml 0xbabecafe + +// CHECK: ficoml 305419896 + ficoml 0x12345678 + +// CHECK: fcomp %st(2) + fcomp %st(2) + +// CHECK: fcompl 3735928559(%ebx,%ecx,8) + fcompl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fcompl 3133065982 + fcompl 0xbabecafe + +// CHECK: fcompl 305419896 + fcompl 0x12345678 + +// CHECK: fcomp %st(2) + fcomp %st(2) + +// CHECK: ficompl 3735928559(%ebx,%ecx,8) + ficompl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: ficompl 3133065982 + ficompl 0xbabecafe + +// CHECK: ficompl 305419896 + ficompl 0x12345678 + +// CHECK: fcompp + fcompp + +// CHECK: fucom %st(2) + fucom %st(2) + +// CHECK: fucomp %st(2) + fucomp %st(2) + +// CHECK: fucompp + fucompp + +// CHECK: ftst + ftst + +// CHECK: fxam + fxam + +// CHECK: fld1 + fld1 + +// CHECK: fldl2t + fldl2t + +// CHECK: fldl2e + fldl2e + +// CHECK: fldpi + fldpi + +// CHECK: fldlg2 + fldlg2 + +// CHECK: fldln2 + fldln2 + +// CHECK: fldz + fldz + +// CHECK: fadd %st(2) + fadd %st(2) + +// CHECK: faddl 3735928559(%ebx,%ecx,8) + faddl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: faddl 3133065982 + faddl 0xbabecafe + +// CHECK: faddl 305419896 + faddl 0x12345678 + +// CHECK: fiaddl 3735928559(%ebx,%ecx,8) + fiaddl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fiaddl 3133065982 + fiaddl 0xbabecafe + +// CHECK: fiaddl 305419896 + fiaddl 0x12345678 + +// CHECK: faddp %st(2) + faddp %st(2) + +// CHECK: fsub %st(2) + fsub %st(2) + +// CHECK: fsubl 3735928559(%ebx,%ecx,8) + fsubl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fsubl 3133065982 + fsubl 0xbabecafe + +// CHECK: fsubl 305419896 + fsubl 0x12345678 + +// CHECK: fisubl 3735928559(%ebx,%ecx,8) + fisubl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fisubl 3133065982 + fisubl 0xbabecafe + +// CHECK: fisubl 305419896 + fisubl 0x12345678 + +// CHECK: fsubp %st(2) + fsubp %st(2) + +// CHECK: fsubr %st(2) + fsubr %st(2) + +// CHECK: fsubrl 3735928559(%ebx,%ecx,8) + fsubrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fsubrl 3133065982 + fsubrl 0xbabecafe + +// CHECK: fsubrl 305419896 + fsubrl 0x12345678 + +// CHECK: fisubrl 3735928559(%ebx,%ecx,8) + fisubrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fisubrl 3133065982 + fisubrl 0xbabecafe + +// CHECK: fisubrl 305419896 + fisubrl 0x12345678 + +// CHECK: fsubrp %st(2) + fsubrp %st(2) + +// CHECK: fmul %st(2) + fmul %st(2) + +// CHECK: fmull 3735928559(%ebx,%ecx,8) + fmull 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fmull 3133065982 + fmull 0xbabecafe + +// CHECK: fmull 305419896 + fmull 0x12345678 + +// CHECK: fimull 3735928559(%ebx,%ecx,8) + fimull 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fimull 3133065982 + fimull 0xbabecafe + +// CHECK: fimull 305419896 + fimull 0x12345678 + +// CHECK: fmulp %st(2) + fmulp %st(2) + +// CHECK: fdiv %st(2) + fdiv %st(2) + +// CHECK: fdivl 3735928559(%ebx,%ecx,8) + fdivl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fdivl 3133065982 + fdivl 0xbabecafe + +// CHECK: fdivl 305419896 + fdivl 0x12345678 + +// CHECK: fidivl 3735928559(%ebx,%ecx,8) + fidivl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fidivl 3133065982 + fidivl 0xbabecafe + +// CHECK: fidivl 305419896 + fidivl 0x12345678 + +// CHECK: fdivp %st(2) + fdivp %st(2) + +// CHECK: fdivr %st(2) + fdivr %st(2) + +// CHECK: fdivrl 3735928559(%ebx,%ecx,8) + fdivrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fdivrl 3133065982 + fdivrl 0xbabecafe + +// CHECK: fdivrl 305419896 + fdivrl 0x12345678 + +// CHECK: fidivrl 3735928559(%ebx,%ecx,8) + fidivrl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fidivrl 3133065982 + fidivrl 0xbabecafe + +// CHECK: fidivrl 305419896 + fidivrl 0x12345678 + +// CHECK: fdivrp %st(2) + fdivrp %st(2) + +// CHECK: f2xm1 + f2xm1 + +// CHECK: fyl2x + fyl2x + +// CHECK: fptan + fptan + +// CHECK: fpatan + fpatan + +// CHECK: fxtract + fxtract + +// CHECK: fprem1 + fprem1 + +// CHECK: fdecstp + fdecstp + +// CHECK: fincstp + fincstp + +// CHECK: fprem + fprem + +// CHECK: fyl2xp1 + fyl2xp1 + +// CHECK: fsqrt + fsqrt + +// CHECK: fsincos + fsincos + +// CHECK: frndint + frndint + +// CHECK: fscale + fscale + +// CHECK: fsin + fsin + +// CHECK: fcos + fcos + +// CHECK: fchs + fchs + +// CHECK: fabs + fabs + +// CHECK: fninit + fninit + +// CHECK: fldcw 3735928559(%ebx,%ecx,8) + fldcw 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fldcw 3133065982 + fldcw 0xbabecafe + +// CHECK: fldcw 305419896 + fldcw 0x12345678 + +// CHECK: fnstcw 3735928559(%ebx,%ecx,8) + fnstcw 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fnstcw 3133065982 + fnstcw 0xbabecafe + +// CHECK: fnstcw 305419896 + fnstcw 0x12345678 + +// CHECK: fnstsw 3735928559(%ebx,%ecx,8) + fnstsw 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fnstsw 3133065982 + fnstsw 0xbabecafe + +// CHECK: fnstsw 305419896 + fnstsw 0x12345678 + +// CHECK: fnclex + fnclex + +// CHECK: fnstenv 32493 + fnstenv 0x7eed + +// CHECK: fldenv 32493 + fldenv 0x7eed + +// CHECK: fnsave 32493 + fnsave 0x7eed + +// CHECK: frstor 32493 + frstor 0x7eed + +// CHECK: ffree %st(2) + ffree %st(2) + +// CHECK: fnop + fnop + +// CHECK: invd + invd + +// CHECK: wbinvd + wbinvd + +// CHECK: cpuid + cpuid + +// CHECK: wrmsr + wrmsr + +// CHECK: rdtsc + rdtsc + +// CHECK: rdmsr + rdmsr + +// CHECK: cmpxchg8b 3735928559(%ebx,%ecx,8) + cmpxchg8b 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: cmpxchg8b 32493 + cmpxchg8b 0x7eed + +// CHECK: cmpxchg8b 3133065982 + cmpxchg8b 0xbabecafe + +// CHECK: cmpxchg8b 305419896 + cmpxchg8b 0x12345678 + +// CHECK: sysenter + sysenter + +// CHECK: sysexit + sysexit + +// CHECK: fxsave 3735928559(%ebx,%ecx,8) + fxsave 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fxsave 32493 + fxsave 0x7eed + +// CHECK: fxsave 3133065982 + fxsave 0xbabecafe + +// CHECK: fxsave 305419896 + fxsave 0x12345678 + +// CHECK: fxrstor 3735928559(%ebx,%ecx,8) + fxrstor 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fxrstor 32493 + fxrstor 0x7eed + +// CHECK: fxrstor 3133065982 + fxrstor 0xbabecafe + +// CHECK: fxrstor 305419896 + fxrstor 0x12345678 + +// CHECK: rdpmc + rdpmc + +// CHECK: ud2 + ud2 + +// CHECK: fcmovb %st(2), %st(0) + fcmovb %st(2),%st + +// CHECK: fcmove %st(2), %st(0) + fcmove %st(2),%st + +// CHECK: fcmovbe %st(2), %st(0) + fcmovbe %st(2),%st + +// CHECK: fcmovu %st(2), %st(0) + fcmovu %st(2),%st + +// CHECK: fcmovnb %st(2), %st(0) + fcmovnb %st(2),%st + +// CHECK: fcmovne %st(2), %st(0) + fcmovne %st(2),%st + +// CHECK: fcmovnbe %st(2), %st(0) + fcmovnbe %st(2),%st + +// CHECK: fcmovnu %st(2), %st(0) + fcmovnu %st(2),%st + +// CHECK: fcomi %st(2) + fcomi %st(2),%st + +// CHECK: fucomi %st(2) + fucomi %st(2),%st + +// CHECK: fcompi %st(2) + fcomip %st(2),%st + +// CHECK: fucompi %st(2) + fucomip %st(2),%st + +// CHECK: movnti %ecx, 3735928559(%ebx,%ecx,8) + movnti %ecx,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movnti %ecx, 69 + movnti %ecx,0x45 + +// CHECK: movnti %ecx, 32493 + movnti %ecx,0x7eed + +// CHECK: movnti %ecx, 3133065982 + movnti %ecx,0xbabecafe + +// CHECK: movnti %ecx, 305419896 + movnti %ecx,0x12345678 + +// CHECK: clflush 3735928559(%ebx,%ecx,8) + clflush 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: clflush 32493 + clflush 0x7eed + +// CHECK: clflush 3133065982 + clflush 0xbabecafe + +// CHECK: clflush 305419896 + clflush 0x12345678 + +// CHECK: pause + pause + +// CHECK: sfence + sfence + +// CHECK: lfence + lfence + +// CHECK: mfence + mfence + +// CHECK: emms + emms + +// CHECK: movd %ecx, %mm3 + movd %ecx,%mm3 + +// CHECK: movd 3735928559(%ebx,%ecx,8), %mm3 + movd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: movd 69, %mm3 + movd 0x45,%mm3 + +// CHECK: movd 32493, %mm3 + movd 0x7eed,%mm3 + +// CHECK: movd 3133065982, %mm3 + movd 0xbabecafe,%mm3 + +// CHECK: movd 305419896, %mm3 + movd 0x12345678,%mm3 + +// CHECK: movd %mm3, %ecx + movd %mm3,%ecx + +// CHECK: movd %mm3, 3735928559(%ebx,%ecx,8) + movd %mm3,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movd %mm3, 69 + movd %mm3,0x45 + +// CHECK: movd %mm3, 32493 + movd %mm3,0x7eed + +// CHECK: movd %mm3, 3133065982 + movd %mm3,0xbabecafe + +// CHECK: movd %mm3, 305419896 + movd %mm3,0x12345678 + +// CHECK: movd %ecx, %xmm5 + movd %ecx,%xmm5 + +// CHECK: movd 3735928559(%ebx,%ecx,8), %xmm5 + movd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movd 69, %xmm5 + movd 0x45,%xmm5 + +// CHECK: movd 32493, %xmm5 + movd 0x7eed,%xmm5 + +// CHECK: movd 3133065982, %xmm5 + movd 0xbabecafe,%xmm5 + +// CHECK: movd 305419896, %xmm5 + movd 0x12345678,%xmm5 + +// CHECK: movd %xmm5, %ecx + movd %xmm5,%ecx + +// CHECK: movd %xmm5, 3735928559(%ebx,%ecx,8) + movd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movd %xmm5, 69 + movd %xmm5,0x45 + +// CHECK: movd %xmm5, 32493 + movd %xmm5,0x7eed + +// CHECK: movd %xmm5, 3133065982 + movd %xmm5,0xbabecafe + +// CHECK: movd %xmm5, 305419896 + movd %xmm5,0x12345678 + +// CHECK: movq 3735928559(%ebx,%ecx,8), %mm3 + movq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: movq 69, %mm3 + movq 0x45,%mm3 + +// CHECK: movq 32493, %mm3 + movq 0x7eed,%mm3 + +// CHECK: movq 3133065982, %mm3 + movq 0xbabecafe,%mm3 + +// CHECK: movq 305419896, %mm3 + movq 0x12345678,%mm3 + +// CHECK: movq %mm3, %mm3 + movq %mm3,%mm3 + +// CHECK: movq %mm3, 3735928559(%ebx,%ecx,8) + movq %mm3,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movq %mm3, 69 + movq %mm3,0x45 + +// CHECK: movq %mm3, 32493 + movq %mm3,0x7eed + +// CHECK: movq %mm3, 3133065982 + movq %mm3,0xbabecafe + +// CHECK: movq %mm3, 305419896 + movq %mm3,0x12345678 + +// CHECK: movq %mm3, %mm3 + movq %mm3,%mm3 + +// CHECK: movq 3735928559(%ebx,%ecx,8), %xmm5 + movq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movq 69, %xmm5 + movq 0x45,%xmm5 + +// CHECK: movq 32493, %xmm5 + movq 0x7eed,%xmm5 + +// CHECK: movq 3133065982, %xmm5 + movq 0xbabecafe,%xmm5 + +// CHECK: movq 305419896, %xmm5 + movq 0x12345678,%xmm5 + +// CHECK: movq %xmm5, %xmm5 + movq %xmm5,%xmm5 + +// CHECK: movq %xmm5, 3735928559(%ebx,%ecx,8) + movq %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movq %xmm5, 69 + movq %xmm5,0x45 + +// CHECK: movq %xmm5, 32493 + movq %xmm5,0x7eed + +// CHECK: movq %xmm5, 3133065982 + movq %xmm5,0xbabecafe + +// CHECK: movq %xmm5, 305419896 + movq %xmm5,0x12345678 + +// CHECK: movq %xmm5, %xmm5 + movq %xmm5,%xmm5 + +// CHECK: packssdw 3735928559(%ebx,%ecx,8), %mm3 + packssdw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: packssdw 69, %mm3 + packssdw 0x45,%mm3 + +// CHECK: packssdw 32493, %mm3 + packssdw 0x7eed,%mm3 + +// CHECK: packssdw 3133065982, %mm3 + packssdw 0xbabecafe,%mm3 + +// CHECK: packssdw 305419896, %mm3 + packssdw 0x12345678,%mm3 + +// CHECK: packssdw %mm3, %mm3 + packssdw %mm3,%mm3 + +// CHECK: packssdw 3735928559(%ebx,%ecx,8), %xmm5 + packssdw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: packssdw 69, %xmm5 + packssdw 0x45,%xmm5 + +// CHECK: packssdw 32493, %xmm5 + packssdw 0x7eed,%xmm5 + +// CHECK: packssdw 3133065982, %xmm5 + packssdw 0xbabecafe,%xmm5 + +// CHECK: packssdw 305419896, %xmm5 + packssdw 0x12345678,%xmm5 + +// CHECK: packssdw %xmm5, %xmm5 + packssdw %xmm5,%xmm5 + +// CHECK: packsswb 3735928559(%ebx,%ecx,8), %mm3 + packsswb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: packsswb 69, %mm3 + packsswb 0x45,%mm3 + +// CHECK: packsswb 32493, %mm3 + packsswb 0x7eed,%mm3 + +// CHECK: packsswb 3133065982, %mm3 + packsswb 0xbabecafe,%mm3 + +// CHECK: packsswb 305419896, %mm3 + packsswb 0x12345678,%mm3 + +// CHECK: packsswb %mm3, %mm3 + packsswb %mm3,%mm3 + +// CHECK: packsswb 3735928559(%ebx,%ecx,8), %xmm5 + packsswb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: packsswb 69, %xmm5 + packsswb 0x45,%xmm5 + +// CHECK: packsswb 32493, %xmm5 + packsswb 0x7eed,%xmm5 + +// CHECK: packsswb 3133065982, %xmm5 + packsswb 0xbabecafe,%xmm5 + +// CHECK: packsswb 305419896, %xmm5 + packsswb 0x12345678,%xmm5 + +// CHECK: packsswb %xmm5, %xmm5 + packsswb %xmm5,%xmm5 + +// CHECK: packuswb 3735928559(%ebx,%ecx,8), %mm3 + packuswb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: packuswb 69, %mm3 + packuswb 0x45,%mm3 + +// CHECK: packuswb 32493, %mm3 + packuswb 0x7eed,%mm3 + +// CHECK: packuswb 3133065982, %mm3 + packuswb 0xbabecafe,%mm3 + +// CHECK: packuswb 305419896, %mm3 + packuswb 0x12345678,%mm3 + +// CHECK: packuswb %mm3, %mm3 + packuswb %mm3,%mm3 + +// CHECK: packuswb 3735928559(%ebx,%ecx,8), %xmm5 + packuswb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: packuswb 69, %xmm5 + packuswb 0x45,%xmm5 + +// CHECK: packuswb 32493, %xmm5 + packuswb 0x7eed,%xmm5 + +// CHECK: packuswb 3133065982, %xmm5 + packuswb 0xbabecafe,%xmm5 + +// CHECK: packuswb 305419896, %xmm5 + packuswb 0x12345678,%xmm5 + +// CHECK: packuswb %xmm5, %xmm5 + packuswb %xmm5,%xmm5 + +// CHECK: paddb 3735928559(%ebx,%ecx,8), %mm3 + paddb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: paddb 69, %mm3 + paddb 0x45,%mm3 + +// CHECK: paddb 32493, %mm3 + paddb 0x7eed,%mm3 + +// CHECK: paddb 3133065982, %mm3 + paddb 0xbabecafe,%mm3 + +// CHECK: paddb 305419896, %mm3 + paddb 0x12345678,%mm3 + +// CHECK: paddb %mm3, %mm3 + paddb %mm3,%mm3 + +// CHECK: paddb 3735928559(%ebx,%ecx,8), %xmm5 + paddb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: paddb 69, %xmm5 + paddb 0x45,%xmm5 + +// CHECK: paddb 32493, %xmm5 + paddb 0x7eed,%xmm5 + +// CHECK: paddb 3133065982, %xmm5 + paddb 0xbabecafe,%xmm5 + +// CHECK: paddb 305419896, %xmm5 + paddb 0x12345678,%xmm5 + +// CHECK: paddb %xmm5, %xmm5 + paddb %xmm5,%xmm5 + +// CHECK: paddw 3735928559(%ebx,%ecx,8), %mm3 + paddw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: paddw 69, %mm3 + paddw 0x45,%mm3 + +// CHECK: paddw 32493, %mm3 + paddw 0x7eed,%mm3 + +// CHECK: paddw 3133065982, %mm3 + paddw 0xbabecafe,%mm3 + +// CHECK: paddw 305419896, %mm3 + paddw 0x12345678,%mm3 + +// CHECK: paddw %mm3, %mm3 + paddw %mm3,%mm3 + +// CHECK: paddw 3735928559(%ebx,%ecx,8), %xmm5 + paddw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: paddw 69, %xmm5 + paddw 0x45,%xmm5 + +// CHECK: paddw 32493, %xmm5 + paddw 0x7eed,%xmm5 + +// CHECK: paddw 3133065982, %xmm5 + paddw 0xbabecafe,%xmm5 + +// CHECK: paddw 305419896, %xmm5 + paddw 0x12345678,%xmm5 + +// CHECK: paddw %xmm5, %xmm5 + paddw %xmm5,%xmm5 + +// CHECK: paddd 3735928559(%ebx,%ecx,8), %mm3 + paddd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: paddd 69, %mm3 + paddd 0x45,%mm3 + +// CHECK: paddd 32493, %mm3 + paddd 0x7eed,%mm3 + +// CHECK: paddd 3133065982, %mm3 + paddd 0xbabecafe,%mm3 + +// CHECK: paddd 305419896, %mm3 + paddd 0x12345678,%mm3 + +// CHECK: paddd %mm3, %mm3 + paddd %mm3,%mm3 + +// CHECK: paddd 3735928559(%ebx,%ecx,8), %xmm5 + paddd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: paddd 69, %xmm5 + paddd 0x45,%xmm5 + +// CHECK: paddd 32493, %xmm5 + paddd 0x7eed,%xmm5 + +// CHECK: paddd 3133065982, %xmm5 + paddd 0xbabecafe,%xmm5 + +// CHECK: paddd 305419896, %xmm5 + paddd 0x12345678,%xmm5 + +// CHECK: paddd %xmm5, %xmm5 + paddd %xmm5,%xmm5 + +// CHECK: paddq 3735928559(%ebx,%ecx,8), %mm3 + paddq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: paddq 69, %mm3 + paddq 0x45,%mm3 + +// CHECK: paddq 32493, %mm3 + paddq 0x7eed,%mm3 + +// CHECK: paddq 3133065982, %mm3 + paddq 0xbabecafe,%mm3 + +// CHECK: paddq 305419896, %mm3 + paddq 0x12345678,%mm3 + +// CHECK: paddq %mm3, %mm3 + paddq %mm3,%mm3 + +// CHECK: paddq 3735928559(%ebx,%ecx,8), %xmm5 + paddq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: paddq 69, %xmm5 + paddq 0x45,%xmm5 + +// CHECK: paddq 32493, %xmm5 + paddq 0x7eed,%xmm5 + +// CHECK: paddq 3133065982, %xmm5 + paddq 0xbabecafe,%xmm5 + +// CHECK: paddq 305419896, %xmm5 + paddq 0x12345678,%xmm5 + +// CHECK: paddq %xmm5, %xmm5 + paddq %xmm5,%xmm5 + +// CHECK: paddsb 3735928559(%ebx,%ecx,8), %mm3 + paddsb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: paddsb 69, %mm3 + paddsb 0x45,%mm3 + +// CHECK: paddsb 32493, %mm3 + paddsb 0x7eed,%mm3 + +// CHECK: paddsb 3133065982, %mm3 + paddsb 0xbabecafe,%mm3 + +// CHECK: paddsb 305419896, %mm3 + paddsb 0x12345678,%mm3 + +// CHECK: paddsb %mm3, %mm3 + paddsb %mm3,%mm3 + +// CHECK: paddsb 3735928559(%ebx,%ecx,8), %xmm5 + paddsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: paddsb 69, %xmm5 + paddsb 0x45,%xmm5 + +// CHECK: paddsb 32493, %xmm5 + paddsb 0x7eed,%xmm5 + +// CHECK: paddsb 3133065982, %xmm5 + paddsb 0xbabecafe,%xmm5 + +// CHECK: paddsb 305419896, %xmm5 + paddsb 0x12345678,%xmm5 + +// CHECK: paddsb %xmm5, %xmm5 + paddsb %xmm5,%xmm5 + +// CHECK: paddsw 3735928559(%ebx,%ecx,8), %mm3 + paddsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: paddsw 69, %mm3 + paddsw 0x45,%mm3 + +// CHECK: paddsw 32493, %mm3 + paddsw 0x7eed,%mm3 + +// CHECK: paddsw 3133065982, %mm3 + paddsw 0xbabecafe,%mm3 + +// CHECK: paddsw 305419896, %mm3 + paddsw 0x12345678,%mm3 + +// CHECK: paddsw %mm3, %mm3 + paddsw %mm3,%mm3 + +// CHECK: paddsw 3735928559(%ebx,%ecx,8), %xmm5 + paddsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: paddsw 69, %xmm5 + paddsw 0x45,%xmm5 + +// CHECK: paddsw 32493, %xmm5 + paddsw 0x7eed,%xmm5 + +// CHECK: paddsw 3133065982, %xmm5 + paddsw 0xbabecafe,%xmm5 + +// CHECK: paddsw 305419896, %xmm5 + paddsw 0x12345678,%xmm5 + +// CHECK: paddsw %xmm5, %xmm5 + paddsw %xmm5,%xmm5 + +// CHECK: paddusb 3735928559(%ebx,%ecx,8), %mm3 + paddusb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: paddusb 69, %mm3 + paddusb 0x45,%mm3 + +// CHECK: paddusb 32493, %mm3 + paddusb 0x7eed,%mm3 + +// CHECK: paddusb 3133065982, %mm3 + paddusb 0xbabecafe,%mm3 + +// CHECK: paddusb 305419896, %mm3 + paddusb 0x12345678,%mm3 + +// CHECK: paddusb %mm3, %mm3 + paddusb %mm3,%mm3 + +// CHECK: paddusb 3735928559(%ebx,%ecx,8), %xmm5 + paddusb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: paddusb 69, %xmm5 + paddusb 0x45,%xmm5 + +// CHECK: paddusb 32493, %xmm5 + paddusb 0x7eed,%xmm5 + +// CHECK: paddusb 3133065982, %xmm5 + paddusb 0xbabecafe,%xmm5 + +// CHECK: paddusb 305419896, %xmm5 + paddusb 0x12345678,%xmm5 + +// CHECK: paddusb %xmm5, %xmm5 + paddusb %xmm5,%xmm5 + +// CHECK: paddusw 3735928559(%ebx,%ecx,8), %mm3 + paddusw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: paddusw 69, %mm3 + paddusw 0x45,%mm3 + +// CHECK: paddusw 32493, %mm3 + paddusw 0x7eed,%mm3 + +// CHECK: paddusw 3133065982, %mm3 + paddusw 0xbabecafe,%mm3 + +// CHECK: paddusw 305419896, %mm3 + paddusw 0x12345678,%mm3 + +// CHECK: paddusw %mm3, %mm3 + paddusw %mm3,%mm3 + +// CHECK: paddusw 3735928559(%ebx,%ecx,8), %xmm5 + paddusw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: paddusw 69, %xmm5 + paddusw 0x45,%xmm5 + +// CHECK: paddusw 32493, %xmm5 + paddusw 0x7eed,%xmm5 + +// CHECK: paddusw 3133065982, %xmm5 + paddusw 0xbabecafe,%xmm5 + +// CHECK: paddusw 305419896, %xmm5 + paddusw 0x12345678,%xmm5 + +// CHECK: paddusw %xmm5, %xmm5 + paddusw %xmm5,%xmm5 + +// CHECK: pand 3735928559(%ebx,%ecx,8), %mm3 + pand 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pand 69, %mm3 + pand 0x45,%mm3 + +// CHECK: pand 32493, %mm3 + pand 0x7eed,%mm3 + +// CHECK: pand 3133065982, %mm3 + pand 0xbabecafe,%mm3 + +// CHECK: pand 305419896, %mm3 + pand 0x12345678,%mm3 + +// CHECK: pand %mm3, %mm3 + pand %mm3,%mm3 + +// CHECK: pand 3735928559(%ebx,%ecx,8), %xmm5 + pand 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pand 69, %xmm5 + pand 0x45,%xmm5 + +// CHECK: pand 32493, %xmm5 + pand 0x7eed,%xmm5 + +// CHECK: pand 3133065982, %xmm5 + pand 0xbabecafe,%xmm5 + +// CHECK: pand 305419896, %xmm5 + pand 0x12345678,%xmm5 + +// CHECK: pand %xmm5, %xmm5 + pand %xmm5,%xmm5 + +// CHECK: pandn 3735928559(%ebx,%ecx,8), %mm3 + pandn 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pandn 69, %mm3 + pandn 0x45,%mm3 + +// CHECK: pandn 32493, %mm3 + pandn 0x7eed,%mm3 + +// CHECK: pandn 3133065982, %mm3 + pandn 0xbabecafe,%mm3 + +// CHECK: pandn 305419896, %mm3 + pandn 0x12345678,%mm3 + +// CHECK: pandn %mm3, %mm3 + pandn %mm3,%mm3 + +// CHECK: pandn 3735928559(%ebx,%ecx,8), %xmm5 + pandn 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pandn 69, %xmm5 + pandn 0x45,%xmm5 + +// CHECK: pandn 32493, %xmm5 + pandn 0x7eed,%xmm5 + +// CHECK: pandn 3133065982, %xmm5 + pandn 0xbabecafe,%xmm5 + +// CHECK: pandn 305419896, %xmm5 + pandn 0x12345678,%xmm5 + +// CHECK: pandn %xmm5, %xmm5 + pandn %xmm5,%xmm5 + +// CHECK: pcmpeqb 3735928559(%ebx,%ecx,8), %mm3 + pcmpeqb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pcmpeqb 69, %mm3 + pcmpeqb 0x45,%mm3 + +// CHECK: pcmpeqb 32493, %mm3 + pcmpeqb 0x7eed,%mm3 + +// CHECK: pcmpeqb 3133065982, %mm3 + pcmpeqb 0xbabecafe,%mm3 + +// CHECK: pcmpeqb 305419896, %mm3 + pcmpeqb 0x12345678,%mm3 + +// CHECK: pcmpeqb %mm3, %mm3 + pcmpeqb %mm3,%mm3 + +// CHECK: pcmpeqb 3735928559(%ebx,%ecx,8), %xmm5 + pcmpeqb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pcmpeqb 69, %xmm5 + pcmpeqb 0x45,%xmm5 + +// CHECK: pcmpeqb 32493, %xmm5 + pcmpeqb 0x7eed,%xmm5 + +// CHECK: pcmpeqb 3133065982, %xmm5 + pcmpeqb 0xbabecafe,%xmm5 + +// CHECK: pcmpeqb 305419896, %xmm5 + pcmpeqb 0x12345678,%xmm5 + +// CHECK: pcmpeqb %xmm5, %xmm5 + pcmpeqb %xmm5,%xmm5 + +// CHECK: pcmpeqw 3735928559(%ebx,%ecx,8), %mm3 + pcmpeqw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pcmpeqw 69, %mm3 + pcmpeqw 0x45,%mm3 + +// CHECK: pcmpeqw 32493, %mm3 + pcmpeqw 0x7eed,%mm3 + +// CHECK: pcmpeqw 3133065982, %mm3 + pcmpeqw 0xbabecafe,%mm3 + +// CHECK: pcmpeqw 305419896, %mm3 + pcmpeqw 0x12345678,%mm3 + +// CHECK: pcmpeqw %mm3, %mm3 + pcmpeqw %mm3,%mm3 + +// CHECK: pcmpeqw 3735928559(%ebx,%ecx,8), %xmm5 + pcmpeqw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pcmpeqw 69, %xmm5 + pcmpeqw 0x45,%xmm5 + +// CHECK: pcmpeqw 32493, %xmm5 + pcmpeqw 0x7eed,%xmm5 + +// CHECK: pcmpeqw 3133065982, %xmm5 + pcmpeqw 0xbabecafe,%xmm5 + +// CHECK: pcmpeqw 305419896, %xmm5 + pcmpeqw 0x12345678,%xmm5 + +// CHECK: pcmpeqw %xmm5, %xmm5 + pcmpeqw %xmm5,%xmm5 + +// CHECK: pcmpeqd 3735928559(%ebx,%ecx,8), %mm3 + pcmpeqd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pcmpeqd 69, %mm3 + pcmpeqd 0x45,%mm3 + +// CHECK: pcmpeqd 32493, %mm3 + pcmpeqd 0x7eed,%mm3 + +// CHECK: pcmpeqd 3133065982, %mm3 + pcmpeqd 0xbabecafe,%mm3 + +// CHECK: pcmpeqd 305419896, %mm3 + pcmpeqd 0x12345678,%mm3 + +// CHECK: pcmpeqd %mm3, %mm3 + pcmpeqd %mm3,%mm3 + +// CHECK: pcmpeqd 3735928559(%ebx,%ecx,8), %xmm5 + pcmpeqd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pcmpeqd 69, %xmm5 + pcmpeqd 0x45,%xmm5 + +// CHECK: pcmpeqd 32493, %xmm5 + pcmpeqd 0x7eed,%xmm5 + +// CHECK: pcmpeqd 3133065982, %xmm5 + pcmpeqd 0xbabecafe,%xmm5 + +// CHECK: pcmpeqd 305419896, %xmm5 + pcmpeqd 0x12345678,%xmm5 + +// CHECK: pcmpeqd %xmm5, %xmm5 + pcmpeqd %xmm5,%xmm5 + +// CHECK: pcmpgtb 3735928559(%ebx,%ecx,8), %mm3 + pcmpgtb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pcmpgtb 69, %mm3 + pcmpgtb 0x45,%mm3 + +// CHECK: pcmpgtb 32493, %mm3 + pcmpgtb 0x7eed,%mm3 + +// CHECK: pcmpgtb 3133065982, %mm3 + pcmpgtb 0xbabecafe,%mm3 + +// CHECK: pcmpgtb 305419896, %mm3 + pcmpgtb 0x12345678,%mm3 + +// CHECK: pcmpgtb %mm3, %mm3 + pcmpgtb %mm3,%mm3 + +// CHECK: pcmpgtb 3735928559(%ebx,%ecx,8), %xmm5 + pcmpgtb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pcmpgtb 69, %xmm5 + pcmpgtb 0x45,%xmm5 + +// CHECK: pcmpgtb 32493, %xmm5 + pcmpgtb 0x7eed,%xmm5 + +// CHECK: pcmpgtb 3133065982, %xmm5 + pcmpgtb 0xbabecafe,%xmm5 + +// CHECK: pcmpgtb 305419896, %xmm5 + pcmpgtb 0x12345678,%xmm5 + +// CHECK: pcmpgtb %xmm5, %xmm5 + pcmpgtb %xmm5,%xmm5 + +// CHECK: pcmpgtw 3735928559(%ebx,%ecx,8), %mm3 + pcmpgtw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pcmpgtw 69, %mm3 + pcmpgtw 0x45,%mm3 + +// CHECK: pcmpgtw 32493, %mm3 + pcmpgtw 0x7eed,%mm3 + +// CHECK: pcmpgtw 3133065982, %mm3 + pcmpgtw 0xbabecafe,%mm3 + +// CHECK: pcmpgtw 305419896, %mm3 + pcmpgtw 0x12345678,%mm3 + +// CHECK: pcmpgtw %mm3, %mm3 + pcmpgtw %mm3,%mm3 + +// CHECK: pcmpgtw 3735928559(%ebx,%ecx,8), %xmm5 + pcmpgtw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pcmpgtw 69, %xmm5 + pcmpgtw 0x45,%xmm5 + +// CHECK: pcmpgtw 32493, %xmm5 + pcmpgtw 0x7eed,%xmm5 + +// CHECK: pcmpgtw 3133065982, %xmm5 + pcmpgtw 0xbabecafe,%xmm5 + +// CHECK: pcmpgtw 305419896, %xmm5 + pcmpgtw 0x12345678,%xmm5 + +// CHECK: pcmpgtw %xmm5, %xmm5 + pcmpgtw %xmm5,%xmm5 + +// CHECK: pcmpgtd 3735928559(%ebx,%ecx,8), %mm3 + pcmpgtd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pcmpgtd 69, %mm3 + pcmpgtd 0x45,%mm3 + +// CHECK: pcmpgtd 32493, %mm3 + pcmpgtd 0x7eed,%mm3 + +// CHECK: pcmpgtd 3133065982, %mm3 + pcmpgtd 0xbabecafe,%mm3 + +// CHECK: pcmpgtd 305419896, %mm3 + pcmpgtd 0x12345678,%mm3 + +// CHECK: pcmpgtd %mm3, %mm3 + pcmpgtd %mm3,%mm3 + +// CHECK: pcmpgtd 3735928559(%ebx,%ecx,8), %xmm5 + pcmpgtd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pcmpgtd 69, %xmm5 + pcmpgtd 0x45,%xmm5 + +// CHECK: pcmpgtd 32493, %xmm5 + pcmpgtd 0x7eed,%xmm5 + +// CHECK: pcmpgtd 3133065982, %xmm5 + pcmpgtd 0xbabecafe,%xmm5 + +// CHECK: pcmpgtd 305419896, %xmm5 + pcmpgtd 0x12345678,%xmm5 + +// CHECK: pcmpgtd %xmm5, %xmm5 + pcmpgtd %xmm5,%xmm5 + +// CHECK: pmaddwd 3735928559(%ebx,%ecx,8), %mm3 + pmaddwd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmaddwd 69, %mm3 + pmaddwd 0x45,%mm3 + +// CHECK: pmaddwd 32493, %mm3 + pmaddwd 0x7eed,%mm3 + +// CHECK: pmaddwd 3133065982, %mm3 + pmaddwd 0xbabecafe,%mm3 + +// CHECK: pmaddwd 305419896, %mm3 + pmaddwd 0x12345678,%mm3 + +// CHECK: pmaddwd %mm3, %mm3 + pmaddwd %mm3,%mm3 + +// CHECK: pmaddwd 3735928559(%ebx,%ecx,8), %xmm5 + pmaddwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmaddwd 69, %xmm5 + pmaddwd 0x45,%xmm5 + +// CHECK: pmaddwd 32493, %xmm5 + pmaddwd 0x7eed,%xmm5 + +// CHECK: pmaddwd 3133065982, %xmm5 + pmaddwd 0xbabecafe,%xmm5 + +// CHECK: pmaddwd 305419896, %xmm5 + pmaddwd 0x12345678,%xmm5 + +// CHECK: pmaddwd %xmm5, %xmm5 + pmaddwd %xmm5,%xmm5 + +// CHECK: pmulhw 3735928559(%ebx,%ecx,8), %mm3 + pmulhw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmulhw 69, %mm3 + pmulhw 0x45,%mm3 + +// CHECK: pmulhw 32493, %mm3 + pmulhw 0x7eed,%mm3 + +// CHECK: pmulhw 3133065982, %mm3 + pmulhw 0xbabecafe,%mm3 + +// CHECK: pmulhw 305419896, %mm3 + pmulhw 0x12345678,%mm3 + +// CHECK: pmulhw %mm3, %mm3 + pmulhw %mm3,%mm3 + +// CHECK: pmulhw 3735928559(%ebx,%ecx,8), %xmm5 + pmulhw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmulhw 69, %xmm5 + pmulhw 0x45,%xmm5 + +// CHECK: pmulhw 32493, %xmm5 + pmulhw 0x7eed,%xmm5 + +// CHECK: pmulhw 3133065982, %xmm5 + pmulhw 0xbabecafe,%xmm5 + +// CHECK: pmulhw 305419896, %xmm5 + pmulhw 0x12345678,%xmm5 + +// CHECK: pmulhw %xmm5, %xmm5 + pmulhw %xmm5,%xmm5 + +// CHECK: pmullw 3735928559(%ebx,%ecx,8), %mm3 + pmullw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmullw 69, %mm3 + pmullw 0x45,%mm3 + +// CHECK: pmullw 32493, %mm3 + pmullw 0x7eed,%mm3 + +// CHECK: pmullw 3133065982, %mm3 + pmullw 0xbabecafe,%mm3 + +// CHECK: pmullw 305419896, %mm3 + pmullw 0x12345678,%mm3 + +// CHECK: pmullw %mm3, %mm3 + pmullw %mm3,%mm3 + +// CHECK: pmullw 3735928559(%ebx,%ecx,8), %xmm5 + pmullw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmullw 69, %xmm5 + pmullw 0x45,%xmm5 + +// CHECK: pmullw 32493, %xmm5 + pmullw 0x7eed,%xmm5 + +// CHECK: pmullw 3133065982, %xmm5 + pmullw 0xbabecafe,%xmm5 + +// CHECK: pmullw 305419896, %xmm5 + pmullw 0x12345678,%xmm5 + +// CHECK: pmullw %xmm5, %xmm5 + pmullw %xmm5,%xmm5 + +// CHECK: por 3735928559(%ebx,%ecx,8), %mm3 + por 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: por 69, %mm3 + por 0x45,%mm3 + +// CHECK: por 32493, %mm3 + por 0x7eed,%mm3 + +// CHECK: por 3133065982, %mm3 + por 0xbabecafe,%mm3 + +// CHECK: por 305419896, %mm3 + por 0x12345678,%mm3 + +// CHECK: por %mm3, %mm3 + por %mm3,%mm3 + +// CHECK: por 3735928559(%ebx,%ecx,8), %xmm5 + por 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: por 69, %xmm5 + por 0x45,%xmm5 + +// CHECK: por 32493, %xmm5 + por 0x7eed,%xmm5 + +// CHECK: por 3133065982, %xmm5 + por 0xbabecafe,%xmm5 + +// CHECK: por 305419896, %xmm5 + por 0x12345678,%xmm5 + +// CHECK: por %xmm5, %xmm5 + por %xmm5,%xmm5 + +// CHECK: psllw 3735928559(%ebx,%ecx,8), %mm3 + psllw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psllw 69, %mm3 + psllw 0x45,%mm3 + +// CHECK: psllw 32493, %mm3 + psllw 0x7eed,%mm3 + +// CHECK: psllw 3133065982, %mm3 + psllw 0xbabecafe,%mm3 + +// CHECK: psllw 305419896, %mm3 + psllw 0x12345678,%mm3 + +// CHECK: psllw %mm3, %mm3 + psllw %mm3,%mm3 + +// CHECK: psllw 3735928559(%ebx,%ecx,8), %xmm5 + psllw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psllw 69, %xmm5 + psllw 0x45,%xmm5 + +// CHECK: psllw 32493, %xmm5 + psllw 0x7eed,%xmm5 + +// CHECK: psllw 3133065982, %xmm5 + psllw 0xbabecafe,%xmm5 + +// CHECK: psllw 305419896, %xmm5 + psllw 0x12345678,%xmm5 + +// CHECK: psllw %xmm5, %xmm5 + psllw %xmm5,%xmm5 + +// CHECK: psllw $127, %mm3 + psllw $0x7f,%mm3 + +// CHECK: psllw $127, %xmm5 + psllw $0x7f,%xmm5 + +// CHECK: pslld 3735928559(%ebx,%ecx,8), %mm3 + pslld 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pslld 69, %mm3 + pslld 0x45,%mm3 + +// CHECK: pslld 32493, %mm3 + pslld 0x7eed,%mm3 + +// CHECK: pslld 3133065982, %mm3 + pslld 0xbabecafe,%mm3 + +// CHECK: pslld 305419896, %mm3 + pslld 0x12345678,%mm3 + +// CHECK: pslld %mm3, %mm3 + pslld %mm3,%mm3 + +// CHECK: pslld 3735928559(%ebx,%ecx,8), %xmm5 + pslld 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pslld 69, %xmm5 + pslld 0x45,%xmm5 + +// CHECK: pslld 32493, %xmm5 + pslld 0x7eed,%xmm5 + +// CHECK: pslld 3133065982, %xmm5 + pslld 0xbabecafe,%xmm5 + +// CHECK: pslld 305419896, %xmm5 + pslld 0x12345678,%xmm5 + +// CHECK: pslld %xmm5, %xmm5 + pslld %xmm5,%xmm5 + +// CHECK: pslld $127, %mm3 + pslld $0x7f,%mm3 + +// CHECK: pslld $127, %xmm5 + pslld $0x7f,%xmm5 + +// CHECK: psllq 3735928559(%ebx,%ecx,8), %mm3 + psllq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psllq 69, %mm3 + psllq 0x45,%mm3 + +// CHECK: psllq 32493, %mm3 + psllq 0x7eed,%mm3 + +// CHECK: psllq 3133065982, %mm3 + psllq 0xbabecafe,%mm3 + +// CHECK: psllq 305419896, %mm3 + psllq 0x12345678,%mm3 + +// CHECK: psllq %mm3, %mm3 + psllq %mm3,%mm3 + +// CHECK: psllq 3735928559(%ebx,%ecx,8), %xmm5 + psllq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psllq 69, %xmm5 + psllq 0x45,%xmm5 + +// CHECK: psllq 32493, %xmm5 + psllq 0x7eed,%xmm5 + +// CHECK: psllq 3133065982, %xmm5 + psllq 0xbabecafe,%xmm5 + +// CHECK: psllq 305419896, %xmm5 + psllq 0x12345678,%xmm5 + +// CHECK: psllq %xmm5, %xmm5 + psllq %xmm5,%xmm5 + +// CHECK: psllq $127, %mm3 + psllq $0x7f,%mm3 + +// CHECK: psllq $127, %xmm5 + psllq $0x7f,%xmm5 + +// CHECK: psraw 3735928559(%ebx,%ecx,8), %mm3 + psraw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psraw 69, %mm3 + psraw 0x45,%mm3 + +// CHECK: psraw 32493, %mm3 + psraw 0x7eed,%mm3 + +// CHECK: psraw 3133065982, %mm3 + psraw 0xbabecafe,%mm3 + +// CHECK: psraw 305419896, %mm3 + psraw 0x12345678,%mm3 + +// CHECK: psraw %mm3, %mm3 + psraw %mm3,%mm3 + +// CHECK: psraw 3735928559(%ebx,%ecx,8), %xmm5 + psraw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psraw 69, %xmm5 + psraw 0x45,%xmm5 + +// CHECK: psraw 32493, %xmm5 + psraw 0x7eed,%xmm5 + +// CHECK: psraw 3133065982, %xmm5 + psraw 0xbabecafe,%xmm5 + +// CHECK: psraw 305419896, %xmm5 + psraw 0x12345678,%xmm5 + +// CHECK: psraw %xmm5, %xmm5 + psraw %xmm5,%xmm5 + +// CHECK: psraw $127, %mm3 + psraw $0x7f,%mm3 + +// CHECK: psraw $127, %xmm5 + psraw $0x7f,%xmm5 + +// CHECK: psrad 3735928559(%ebx,%ecx,8), %mm3 + psrad 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psrad 69, %mm3 + psrad 0x45,%mm3 + +// CHECK: psrad 32493, %mm3 + psrad 0x7eed,%mm3 + +// CHECK: psrad 3133065982, %mm3 + psrad 0xbabecafe,%mm3 + +// CHECK: psrad 305419896, %mm3 + psrad 0x12345678,%mm3 + +// CHECK: psrad %mm3, %mm3 + psrad %mm3,%mm3 + +// CHECK: psrad 3735928559(%ebx,%ecx,8), %xmm5 + psrad 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psrad 69, %xmm5 + psrad 0x45,%xmm5 + +// CHECK: psrad 32493, %xmm5 + psrad 0x7eed,%xmm5 + +// CHECK: psrad 3133065982, %xmm5 + psrad 0xbabecafe,%xmm5 + +// CHECK: psrad 305419896, %xmm5 + psrad 0x12345678,%xmm5 + +// CHECK: psrad %xmm5, %xmm5 + psrad %xmm5,%xmm5 + +// CHECK: psrad $127, %mm3 + psrad $0x7f,%mm3 + +// CHECK: psrad $127, %xmm5 + psrad $0x7f,%xmm5 + +// CHECK: psrlw 3735928559(%ebx,%ecx,8), %mm3 + psrlw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psrlw 69, %mm3 + psrlw 0x45,%mm3 + +// CHECK: psrlw 32493, %mm3 + psrlw 0x7eed,%mm3 + +// CHECK: psrlw 3133065982, %mm3 + psrlw 0xbabecafe,%mm3 + +// CHECK: psrlw 305419896, %mm3 + psrlw 0x12345678,%mm3 + +// CHECK: psrlw %mm3, %mm3 + psrlw %mm3,%mm3 + +// CHECK: psrlw 3735928559(%ebx,%ecx,8), %xmm5 + psrlw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psrlw 69, %xmm5 + psrlw 0x45,%xmm5 + +// CHECK: psrlw 32493, %xmm5 + psrlw 0x7eed,%xmm5 + +// CHECK: psrlw 3133065982, %xmm5 + psrlw 0xbabecafe,%xmm5 + +// CHECK: psrlw 305419896, %xmm5 + psrlw 0x12345678,%xmm5 + +// CHECK: psrlw %xmm5, %xmm5 + psrlw %xmm5,%xmm5 + +// CHECK: psrlw $127, %mm3 + psrlw $0x7f,%mm3 + +// CHECK: psrlw $127, %xmm5 + psrlw $0x7f,%xmm5 + +// CHECK: psrld 3735928559(%ebx,%ecx,8), %mm3 + psrld 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psrld 69, %mm3 + psrld 0x45,%mm3 + +// CHECK: psrld 32493, %mm3 + psrld 0x7eed,%mm3 + +// CHECK: psrld 3133065982, %mm3 + psrld 0xbabecafe,%mm3 + +// CHECK: psrld 305419896, %mm3 + psrld 0x12345678,%mm3 + +// CHECK: psrld %mm3, %mm3 + psrld %mm3,%mm3 + +// CHECK: psrld 3735928559(%ebx,%ecx,8), %xmm5 + psrld 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psrld 69, %xmm5 + psrld 0x45,%xmm5 + +// CHECK: psrld 32493, %xmm5 + psrld 0x7eed,%xmm5 + +// CHECK: psrld 3133065982, %xmm5 + psrld 0xbabecafe,%xmm5 + +// CHECK: psrld 305419896, %xmm5 + psrld 0x12345678,%xmm5 + +// CHECK: psrld %xmm5, %xmm5 + psrld %xmm5,%xmm5 + +// CHECK: psrld $127, %mm3 + psrld $0x7f,%mm3 + +// CHECK: psrld $127, %xmm5 + psrld $0x7f,%xmm5 + +// CHECK: psrlq 3735928559(%ebx,%ecx,8), %mm3 + psrlq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psrlq 69, %mm3 + psrlq 0x45,%mm3 + +// CHECK: psrlq 32493, %mm3 + psrlq 0x7eed,%mm3 + +// CHECK: psrlq 3133065982, %mm3 + psrlq 0xbabecafe,%mm3 + +// CHECK: psrlq 305419896, %mm3 + psrlq 0x12345678,%mm3 + +// CHECK: psrlq %mm3, %mm3 + psrlq %mm3,%mm3 + +// CHECK: psrlq 3735928559(%ebx,%ecx,8), %xmm5 + psrlq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psrlq 69, %xmm5 + psrlq 0x45,%xmm5 + +// CHECK: psrlq 32493, %xmm5 + psrlq 0x7eed,%xmm5 + +// CHECK: psrlq 3133065982, %xmm5 + psrlq 0xbabecafe,%xmm5 + +// CHECK: psrlq 305419896, %xmm5 + psrlq 0x12345678,%xmm5 + +// CHECK: psrlq %xmm5, %xmm5 + psrlq %xmm5,%xmm5 + +// CHECK: psrlq $127, %mm3 + psrlq $0x7f,%mm3 + +// CHECK: psrlq $127, %xmm5 + psrlq $0x7f,%xmm5 + +// CHECK: psubb 3735928559(%ebx,%ecx,8), %mm3 + psubb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psubb 69, %mm3 + psubb 0x45,%mm3 + +// CHECK: psubb 32493, %mm3 + psubb 0x7eed,%mm3 + +// CHECK: psubb 3133065982, %mm3 + psubb 0xbabecafe,%mm3 + +// CHECK: psubb 305419896, %mm3 + psubb 0x12345678,%mm3 + +// CHECK: psubb %mm3, %mm3 + psubb %mm3,%mm3 + +// CHECK: psubb 3735928559(%ebx,%ecx,8), %xmm5 + psubb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psubb 69, %xmm5 + psubb 0x45,%xmm5 + +// CHECK: psubb 32493, %xmm5 + psubb 0x7eed,%xmm5 + +// CHECK: psubb 3133065982, %xmm5 + psubb 0xbabecafe,%xmm5 + +// CHECK: psubb 305419896, %xmm5 + psubb 0x12345678,%xmm5 + +// CHECK: psubb %xmm5, %xmm5 + psubb %xmm5,%xmm5 + +// CHECK: psubw 3735928559(%ebx,%ecx,8), %mm3 + psubw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psubw 69, %mm3 + psubw 0x45,%mm3 + +// CHECK: psubw 32493, %mm3 + psubw 0x7eed,%mm3 + +// CHECK: psubw 3133065982, %mm3 + psubw 0xbabecafe,%mm3 + +// CHECK: psubw 305419896, %mm3 + psubw 0x12345678,%mm3 + +// CHECK: psubw %mm3, %mm3 + psubw %mm3,%mm3 + +// CHECK: psubw 3735928559(%ebx,%ecx,8), %xmm5 + psubw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psubw 69, %xmm5 + psubw 0x45,%xmm5 + +// CHECK: psubw 32493, %xmm5 + psubw 0x7eed,%xmm5 + +// CHECK: psubw 3133065982, %xmm5 + psubw 0xbabecafe,%xmm5 + +// CHECK: psubw 305419896, %xmm5 + psubw 0x12345678,%xmm5 + +// CHECK: psubw %xmm5, %xmm5 + psubw %xmm5,%xmm5 + +// CHECK: psubd 3735928559(%ebx,%ecx,8), %mm3 + psubd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psubd 69, %mm3 + psubd 0x45,%mm3 + +// CHECK: psubd 32493, %mm3 + psubd 0x7eed,%mm3 + +// CHECK: psubd 3133065982, %mm3 + psubd 0xbabecafe,%mm3 + +// CHECK: psubd 305419896, %mm3 + psubd 0x12345678,%mm3 + +// CHECK: psubd %mm3, %mm3 + psubd %mm3,%mm3 + +// CHECK: psubd 3735928559(%ebx,%ecx,8), %xmm5 + psubd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psubd 69, %xmm5 + psubd 0x45,%xmm5 + +// CHECK: psubd 32493, %xmm5 + psubd 0x7eed,%xmm5 + +// CHECK: psubd 3133065982, %xmm5 + psubd 0xbabecafe,%xmm5 + +// CHECK: psubd 305419896, %xmm5 + psubd 0x12345678,%xmm5 + +// CHECK: psubd %xmm5, %xmm5 + psubd %xmm5,%xmm5 + +// CHECK: psubq 3735928559(%ebx,%ecx,8), %mm3 + psubq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psubq 69, %mm3 + psubq 0x45,%mm3 + +// CHECK: psubq 32493, %mm3 + psubq 0x7eed,%mm3 + +// CHECK: psubq 3133065982, %mm3 + psubq 0xbabecafe,%mm3 + +// CHECK: psubq 305419896, %mm3 + psubq 0x12345678,%mm3 + +// CHECK: psubq %mm3, %mm3 + psubq %mm3,%mm3 + +// CHECK: psubq 3735928559(%ebx,%ecx,8), %xmm5 + psubq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psubq 69, %xmm5 + psubq 0x45,%xmm5 + +// CHECK: psubq 32493, %xmm5 + psubq 0x7eed,%xmm5 + +// CHECK: psubq 3133065982, %xmm5 + psubq 0xbabecafe,%xmm5 + +// CHECK: psubq 305419896, %xmm5 + psubq 0x12345678,%xmm5 + +// CHECK: psubq %xmm5, %xmm5 + psubq %xmm5,%xmm5 + +// CHECK: psubsb 3735928559(%ebx,%ecx,8), %mm3 + psubsb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psubsb 69, %mm3 + psubsb 0x45,%mm3 + +// CHECK: psubsb 32493, %mm3 + psubsb 0x7eed,%mm3 + +// CHECK: psubsb 3133065982, %mm3 + psubsb 0xbabecafe,%mm3 + +// CHECK: psubsb 305419896, %mm3 + psubsb 0x12345678,%mm3 + +// CHECK: psubsb %mm3, %mm3 + psubsb %mm3,%mm3 + +// CHECK: psubsb 3735928559(%ebx,%ecx,8), %xmm5 + psubsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psubsb 69, %xmm5 + psubsb 0x45,%xmm5 + +// CHECK: psubsb 32493, %xmm5 + psubsb 0x7eed,%xmm5 + +// CHECK: psubsb 3133065982, %xmm5 + psubsb 0xbabecafe,%xmm5 + +// CHECK: psubsb 305419896, %xmm5 + psubsb 0x12345678,%xmm5 + +// CHECK: psubsb %xmm5, %xmm5 + psubsb %xmm5,%xmm5 + +// CHECK: psubsw 3735928559(%ebx,%ecx,8), %mm3 + psubsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psubsw 69, %mm3 + psubsw 0x45,%mm3 + +// CHECK: psubsw 32493, %mm3 + psubsw 0x7eed,%mm3 + +// CHECK: psubsw 3133065982, %mm3 + psubsw 0xbabecafe,%mm3 + +// CHECK: psubsw 305419896, %mm3 + psubsw 0x12345678,%mm3 + +// CHECK: psubsw %mm3, %mm3 + psubsw %mm3,%mm3 + +// CHECK: psubsw 3735928559(%ebx,%ecx,8), %xmm5 + psubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psubsw 69, %xmm5 + psubsw 0x45,%xmm5 + +// CHECK: psubsw 32493, %xmm5 + psubsw 0x7eed,%xmm5 + +// CHECK: psubsw 3133065982, %xmm5 + psubsw 0xbabecafe,%xmm5 + +// CHECK: psubsw 305419896, %xmm5 + psubsw 0x12345678,%xmm5 + +// CHECK: psubsw %xmm5, %xmm5 + psubsw %xmm5,%xmm5 + +// CHECK: psubusb 3735928559(%ebx,%ecx,8), %mm3 + psubusb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psubusb 69, %mm3 + psubusb 0x45,%mm3 + +// CHECK: psubusb 32493, %mm3 + psubusb 0x7eed,%mm3 + +// CHECK: psubusb 3133065982, %mm3 + psubusb 0xbabecafe,%mm3 + +// CHECK: psubusb 305419896, %mm3 + psubusb 0x12345678,%mm3 + +// CHECK: psubusb %mm3, %mm3 + psubusb %mm3,%mm3 + +// CHECK: psubusb 3735928559(%ebx,%ecx,8), %xmm5 + psubusb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psubusb 69, %xmm5 + psubusb 0x45,%xmm5 + +// CHECK: psubusb 32493, %xmm5 + psubusb 0x7eed,%xmm5 + +// CHECK: psubusb 3133065982, %xmm5 + psubusb 0xbabecafe,%xmm5 + +// CHECK: psubusb 305419896, %xmm5 + psubusb 0x12345678,%xmm5 + +// CHECK: psubusb %xmm5, %xmm5 + psubusb %xmm5,%xmm5 + +// CHECK: psubusw 3735928559(%ebx,%ecx,8), %mm3 + psubusw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psubusw 69, %mm3 + psubusw 0x45,%mm3 + +// CHECK: psubusw 32493, %mm3 + psubusw 0x7eed,%mm3 + +// CHECK: psubusw 3133065982, %mm3 + psubusw 0xbabecafe,%mm3 + +// CHECK: psubusw 305419896, %mm3 + psubusw 0x12345678,%mm3 + +// CHECK: psubusw %mm3, %mm3 + psubusw %mm3,%mm3 + +// CHECK: psubusw 3735928559(%ebx,%ecx,8), %xmm5 + psubusw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psubusw 69, %xmm5 + psubusw 0x45,%xmm5 + +// CHECK: psubusw 32493, %xmm5 + psubusw 0x7eed,%xmm5 + +// CHECK: psubusw 3133065982, %xmm5 + psubusw 0xbabecafe,%xmm5 + +// CHECK: psubusw 305419896, %xmm5 + psubusw 0x12345678,%xmm5 + +// CHECK: psubusw %xmm5, %xmm5 + psubusw %xmm5,%xmm5 + +// CHECK: punpckhbw 3735928559(%ebx,%ecx,8), %mm3 + punpckhbw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: punpckhbw 69, %mm3 + punpckhbw 0x45,%mm3 + +// CHECK: punpckhbw 32493, %mm3 + punpckhbw 0x7eed,%mm3 + +// CHECK: punpckhbw 3133065982, %mm3 + punpckhbw 0xbabecafe,%mm3 + +// CHECK: punpckhbw 305419896, %mm3 + punpckhbw 0x12345678,%mm3 + +// CHECK: punpckhbw %mm3, %mm3 + punpckhbw %mm3,%mm3 + +// CHECK: punpckhbw 3735928559(%ebx,%ecx,8), %xmm5 + punpckhbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: punpckhbw 69, %xmm5 + punpckhbw 0x45,%xmm5 + +// CHECK: punpckhbw 32493, %xmm5 + punpckhbw 0x7eed,%xmm5 + +// CHECK: punpckhbw 3133065982, %xmm5 + punpckhbw 0xbabecafe,%xmm5 + +// CHECK: punpckhbw 305419896, %xmm5 + punpckhbw 0x12345678,%xmm5 + +// CHECK: punpckhbw %xmm5, %xmm5 + punpckhbw %xmm5,%xmm5 + +// CHECK: punpckhwd 3735928559(%ebx,%ecx,8), %mm3 + punpckhwd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: punpckhwd 69, %mm3 + punpckhwd 0x45,%mm3 + +// CHECK: punpckhwd 32493, %mm3 + punpckhwd 0x7eed,%mm3 + +// CHECK: punpckhwd 3133065982, %mm3 + punpckhwd 0xbabecafe,%mm3 + +// CHECK: punpckhwd 305419896, %mm3 + punpckhwd 0x12345678,%mm3 + +// CHECK: punpckhwd %mm3, %mm3 + punpckhwd %mm3,%mm3 + +// CHECK: punpckhwd 3735928559(%ebx,%ecx,8), %xmm5 + punpckhwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: punpckhwd 69, %xmm5 + punpckhwd 0x45,%xmm5 + +// CHECK: punpckhwd 32493, %xmm5 + punpckhwd 0x7eed,%xmm5 + +// CHECK: punpckhwd 3133065982, %xmm5 + punpckhwd 0xbabecafe,%xmm5 + +// CHECK: punpckhwd 305419896, %xmm5 + punpckhwd 0x12345678,%xmm5 + +// CHECK: punpckhwd %xmm5, %xmm5 + punpckhwd %xmm5,%xmm5 + +// CHECK: punpckhdq 3735928559(%ebx,%ecx,8), %mm3 + punpckhdq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: punpckhdq 69, %mm3 + punpckhdq 0x45,%mm3 + +// CHECK: punpckhdq 32493, %mm3 + punpckhdq 0x7eed,%mm3 + +// CHECK: punpckhdq 3133065982, %mm3 + punpckhdq 0xbabecafe,%mm3 + +// CHECK: punpckhdq 305419896, %mm3 + punpckhdq 0x12345678,%mm3 + +// CHECK: punpckhdq %mm3, %mm3 + punpckhdq %mm3,%mm3 + +// CHECK: punpckhdq 3735928559(%ebx,%ecx,8), %xmm5 + punpckhdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: punpckhdq 69, %xmm5 + punpckhdq 0x45,%xmm5 + +// CHECK: punpckhdq 32493, %xmm5 + punpckhdq 0x7eed,%xmm5 + +// CHECK: punpckhdq 3133065982, %xmm5 + punpckhdq 0xbabecafe,%xmm5 + +// CHECK: punpckhdq 305419896, %xmm5 + punpckhdq 0x12345678,%xmm5 + +// CHECK: punpckhdq %xmm5, %xmm5 + punpckhdq %xmm5,%xmm5 + +// CHECK: punpcklbw 3735928559(%ebx,%ecx,8), %mm3 + punpcklbw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: punpcklbw 69, %mm3 + punpcklbw 0x45,%mm3 + +// CHECK: punpcklbw 32493, %mm3 + punpcklbw 0x7eed,%mm3 + +// CHECK: punpcklbw 3133065982, %mm3 + punpcklbw 0xbabecafe,%mm3 + +// CHECK: punpcklbw 305419896, %mm3 + punpcklbw 0x12345678,%mm3 + +// CHECK: punpcklbw %mm3, %mm3 + punpcklbw %mm3,%mm3 + +// CHECK: punpcklbw 3735928559(%ebx,%ecx,8), %xmm5 + punpcklbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: punpcklbw 69, %xmm5 + punpcklbw 0x45,%xmm5 + +// CHECK: punpcklbw 32493, %xmm5 + punpcklbw 0x7eed,%xmm5 + +// CHECK: punpcklbw 3133065982, %xmm5 + punpcklbw 0xbabecafe,%xmm5 + +// CHECK: punpcklbw 305419896, %xmm5 + punpcklbw 0x12345678,%xmm5 + +// CHECK: punpcklbw %xmm5, %xmm5 + punpcklbw %xmm5,%xmm5 + +// CHECK: punpcklwd 3735928559(%ebx,%ecx,8), %mm3 + punpcklwd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: punpcklwd 69, %mm3 + punpcklwd 0x45,%mm3 + +// CHECK: punpcklwd 32493, %mm3 + punpcklwd 0x7eed,%mm3 + +// CHECK: punpcklwd 3133065982, %mm3 + punpcklwd 0xbabecafe,%mm3 + +// CHECK: punpcklwd 305419896, %mm3 + punpcklwd 0x12345678,%mm3 + +// CHECK: punpcklwd %mm3, %mm3 + punpcklwd %mm3,%mm3 + +// CHECK: punpcklwd 3735928559(%ebx,%ecx,8), %xmm5 + punpcklwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: punpcklwd 69, %xmm5 + punpcklwd 0x45,%xmm5 + +// CHECK: punpcklwd 32493, %xmm5 + punpcklwd 0x7eed,%xmm5 + +// CHECK: punpcklwd 3133065982, %xmm5 + punpcklwd 0xbabecafe,%xmm5 + +// CHECK: punpcklwd 305419896, %xmm5 + punpcklwd 0x12345678,%xmm5 + +// CHECK: punpcklwd %xmm5, %xmm5 + punpcklwd %xmm5,%xmm5 + +// CHECK: punpckldq 3735928559(%ebx,%ecx,8), %mm3 + punpckldq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: punpckldq 69, %mm3 + punpckldq 0x45,%mm3 + +// CHECK: punpckldq 32493, %mm3 + punpckldq 0x7eed,%mm3 + +// CHECK: punpckldq 3133065982, %mm3 + punpckldq 0xbabecafe,%mm3 + +// CHECK: punpckldq 305419896, %mm3 + punpckldq 0x12345678,%mm3 + +// CHECK: punpckldq %mm3, %mm3 + punpckldq %mm3,%mm3 + +// CHECK: punpckldq 3735928559(%ebx,%ecx,8), %xmm5 + punpckldq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: punpckldq 69, %xmm5 + punpckldq 0x45,%xmm5 + +// CHECK: punpckldq 32493, %xmm5 + punpckldq 0x7eed,%xmm5 + +// CHECK: punpckldq 3133065982, %xmm5 + punpckldq 0xbabecafe,%xmm5 + +// CHECK: punpckldq 305419896, %xmm5 + punpckldq 0x12345678,%xmm5 + +// CHECK: punpckldq %xmm5, %xmm5 + punpckldq %xmm5,%xmm5 + +// CHECK: pxor 3735928559(%ebx,%ecx,8), %mm3 + pxor 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pxor 69, %mm3 + pxor 0x45,%mm3 + +// CHECK: pxor 32493, %mm3 + pxor 0x7eed,%mm3 + +// CHECK: pxor 3133065982, %mm3 + pxor 0xbabecafe,%mm3 + +// CHECK: pxor 305419896, %mm3 + pxor 0x12345678,%mm3 + +// CHECK: pxor %mm3, %mm3 + pxor %mm3,%mm3 + +// CHECK: pxor 3735928559(%ebx,%ecx,8), %xmm5 + pxor 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pxor 69, %xmm5 + pxor 0x45,%xmm5 + +// CHECK: pxor 32493, %xmm5 + pxor 0x7eed,%xmm5 + +// CHECK: pxor 3133065982, %xmm5 + pxor 0xbabecafe,%xmm5 + +// CHECK: pxor 305419896, %xmm5 + pxor 0x12345678,%xmm5 + +// CHECK: pxor %xmm5, %xmm5 + pxor %xmm5,%xmm5 + +// CHECK: addps 3735928559(%ebx,%ecx,8), %xmm5 + addps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: addps 69, %xmm5 + addps 0x45,%xmm5 + +// CHECK: addps 32493, %xmm5 + addps 0x7eed,%xmm5 + +// CHECK: addps 3133065982, %xmm5 + addps 0xbabecafe,%xmm5 + +// CHECK: addps 305419896, %xmm5 + addps 0x12345678,%xmm5 + +// CHECK: addps %xmm5, %xmm5 + addps %xmm5,%xmm5 + +// CHECK: addss 3735928559(%ebx,%ecx,8), %xmm5 + addss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: addss 69, %xmm5 + addss 0x45,%xmm5 + +// CHECK: addss 32493, %xmm5 + addss 0x7eed,%xmm5 + +// CHECK: addss 3133065982, %xmm5 + addss 0xbabecafe,%xmm5 + +// CHECK: addss 305419896, %xmm5 + addss 0x12345678,%xmm5 + +// CHECK: addss %xmm5, %xmm5 + addss %xmm5,%xmm5 + +// CHECK: andnps 3735928559(%ebx,%ecx,8), %xmm5 + andnps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: andnps 69, %xmm5 + andnps 0x45,%xmm5 + +// CHECK: andnps 32493, %xmm5 + andnps 0x7eed,%xmm5 + +// CHECK: andnps 3133065982, %xmm5 + andnps 0xbabecafe,%xmm5 + +// CHECK: andnps 305419896, %xmm5 + andnps 0x12345678,%xmm5 + +// CHECK: andnps %xmm5, %xmm5 + andnps %xmm5,%xmm5 + +// CHECK: andps 3735928559(%ebx,%ecx,8), %xmm5 + andps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: andps 69, %xmm5 + andps 0x45,%xmm5 + +// CHECK: andps 32493, %xmm5 + andps 0x7eed,%xmm5 + +// CHECK: andps 3133065982, %xmm5 + andps 0xbabecafe,%xmm5 + +// CHECK: andps 305419896, %xmm5 + andps 0x12345678,%xmm5 + +// CHECK: andps %xmm5, %xmm5 + andps %xmm5,%xmm5 + +// CHECK: comiss 3735928559(%ebx,%ecx,8), %xmm5 + comiss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: comiss 69, %xmm5 + comiss 0x45,%xmm5 + +// CHECK: comiss 32493, %xmm5 + comiss 0x7eed,%xmm5 + +// CHECK: comiss 3133065982, %xmm5 + comiss 0xbabecafe,%xmm5 + +// CHECK: comiss 305419896, %xmm5 + comiss 0x12345678,%xmm5 + +// CHECK: comiss %xmm5, %xmm5 + comiss %xmm5,%xmm5 + +// CHECK: cvtpi2ps 3735928559(%ebx,%ecx,8), %xmm5 + cvtpi2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtpi2ps 69, %xmm5 + cvtpi2ps 0x45,%xmm5 + +// CHECK: cvtpi2ps 32493, %xmm5 + cvtpi2ps 0x7eed,%xmm5 + +// CHECK: cvtpi2ps 3133065982, %xmm5 + cvtpi2ps 0xbabecafe,%xmm5 + +// CHECK: cvtpi2ps 305419896, %xmm5 + cvtpi2ps 0x12345678,%xmm5 + +// CHECK: cvtpi2ps %mm3, %xmm5 + cvtpi2ps %mm3,%xmm5 + +// CHECK: cvtps2pi 3735928559(%ebx,%ecx,8), %mm3 + cvtps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: cvtps2pi 69, %mm3 + cvtps2pi 0x45,%mm3 + +// CHECK: cvtps2pi 32493, %mm3 + cvtps2pi 0x7eed,%mm3 + +// CHECK: cvtps2pi 3133065982, %mm3 + cvtps2pi 0xbabecafe,%mm3 + +// CHECK: cvtps2pi 305419896, %mm3 + cvtps2pi 0x12345678,%mm3 + +// CHECK: cvtps2pi %xmm5, %mm3 + cvtps2pi %xmm5,%mm3 + +// CHECK: cvtsi2ss %ecx, %xmm5 + cvtsi2ss %ecx,%xmm5 + +// CHECK: cvtsi2ss 3735928559(%ebx,%ecx,8), %xmm5 + cvtsi2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtsi2ss 69, %xmm5 + cvtsi2ss 0x45,%xmm5 + +// CHECK: cvtsi2ss 32493, %xmm5 + cvtsi2ss 0x7eed,%xmm5 + +// CHECK: cvtsi2ss 3133065982, %xmm5 + cvtsi2ss 0xbabecafe,%xmm5 + +// CHECK: cvtsi2ss 305419896, %xmm5 + cvtsi2ss 0x12345678,%xmm5 + +// CHECK: cvttps2pi 3735928559(%ebx,%ecx,8), %mm3 + cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: cvttps2pi 69, %mm3 + cvttps2pi 0x45,%mm3 + +// CHECK: cvttps2pi 32493, %mm3 + cvttps2pi 0x7eed,%mm3 + +// CHECK: cvttps2pi 3133065982, %mm3 + cvttps2pi 0xbabecafe,%mm3 + +// CHECK: cvttps2pi 305419896, %mm3 + cvttps2pi 0x12345678,%mm3 + +// CHECK: cvttps2pi %xmm5, %mm3 + cvttps2pi %xmm5,%mm3 + +// CHECK: cvttss2si 3735928559(%ebx,%ecx,8), %ecx + cvttss2si 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: cvttss2si 69, %ecx + cvttss2si 0x45,%ecx + +// CHECK: cvttss2si 32493, %ecx + cvttss2si 0x7eed,%ecx + +// CHECK: cvttss2si 3133065982, %ecx + cvttss2si 0xbabecafe,%ecx + +// CHECK: cvttss2si 305419896, %ecx + cvttss2si 0x12345678,%ecx + +// CHECK: cvttss2si %xmm5, %ecx + cvttss2si %xmm5,%ecx + +// CHECK: divps 3735928559(%ebx,%ecx,8), %xmm5 + divps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: divps 69, %xmm5 + divps 0x45,%xmm5 + +// CHECK: divps 32493, %xmm5 + divps 0x7eed,%xmm5 + +// CHECK: divps 3133065982, %xmm5 + divps 0xbabecafe,%xmm5 + +// CHECK: divps 305419896, %xmm5 + divps 0x12345678,%xmm5 + +// CHECK: divps %xmm5, %xmm5 + divps %xmm5,%xmm5 + +// CHECK: divss 3735928559(%ebx,%ecx,8), %xmm5 + divss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: divss 69, %xmm5 + divss 0x45,%xmm5 + +// CHECK: divss 32493, %xmm5 + divss 0x7eed,%xmm5 + +// CHECK: divss 3133065982, %xmm5 + divss 0xbabecafe,%xmm5 + +// CHECK: divss 305419896, %xmm5 + divss 0x12345678,%xmm5 + +// CHECK: divss %xmm5, %xmm5 + divss %xmm5,%xmm5 + +// CHECK: ldmxcsr 3735928559(%ebx,%ecx,8) + ldmxcsr 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: ldmxcsr 32493 + ldmxcsr 0x7eed + +// CHECK: ldmxcsr 3133065982 + ldmxcsr 0xbabecafe + +// CHECK: ldmxcsr 305419896 + ldmxcsr 0x12345678 + +// CHECK: maskmovq %mm3, %mm3 + maskmovq %mm3,%mm3 + +// CHECK: maxps 3735928559(%ebx,%ecx,8), %xmm5 + maxps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: maxps 69, %xmm5 + maxps 0x45,%xmm5 + +// CHECK: maxps 32493, %xmm5 + maxps 0x7eed,%xmm5 + +// CHECK: maxps 3133065982, %xmm5 + maxps 0xbabecafe,%xmm5 + +// CHECK: maxps 305419896, %xmm5 + maxps 0x12345678,%xmm5 + +// CHECK: maxps %xmm5, %xmm5 + maxps %xmm5,%xmm5 + +// CHECK: maxss 3735928559(%ebx,%ecx,8), %xmm5 + maxss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: maxss 69, %xmm5 + maxss 0x45,%xmm5 + +// CHECK: maxss 32493, %xmm5 + maxss 0x7eed,%xmm5 + +// CHECK: maxss 3133065982, %xmm5 + maxss 0xbabecafe,%xmm5 + +// CHECK: maxss 305419896, %xmm5 + maxss 0x12345678,%xmm5 + +// CHECK: maxss %xmm5, %xmm5 + maxss %xmm5,%xmm5 + +// CHECK: minps 3735928559(%ebx,%ecx,8), %xmm5 + minps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: minps 69, %xmm5 + minps 0x45,%xmm5 + +// CHECK: minps 32493, %xmm5 + minps 0x7eed,%xmm5 + +// CHECK: minps 3133065982, %xmm5 + minps 0xbabecafe,%xmm5 + +// CHECK: minps 305419896, %xmm5 + minps 0x12345678,%xmm5 + +// CHECK: minps %xmm5, %xmm5 + minps %xmm5,%xmm5 + +// CHECK: minss 3735928559(%ebx,%ecx,8), %xmm5 + minss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: minss 69, %xmm5 + minss 0x45,%xmm5 + +// CHECK: minss 32493, %xmm5 + minss 0x7eed,%xmm5 + +// CHECK: minss 3133065982, %xmm5 + minss 0xbabecafe,%xmm5 + +// CHECK: minss 305419896, %xmm5 + minss 0x12345678,%xmm5 + +// CHECK: minss %xmm5, %xmm5 + minss %xmm5,%xmm5 + +// CHECK: movaps 3735928559(%ebx,%ecx,8), %xmm5 + movaps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movaps 69, %xmm5 + movaps 0x45,%xmm5 + +// CHECK: movaps 32493, %xmm5 + movaps 0x7eed,%xmm5 + +// CHECK: movaps 3133065982, %xmm5 + movaps 0xbabecafe,%xmm5 + +// CHECK: movaps 305419896, %xmm5 + movaps 0x12345678,%xmm5 + +// CHECK: movaps %xmm5, %xmm5 + movaps %xmm5,%xmm5 + +// CHECK: movaps %xmm5, 3735928559(%ebx,%ecx,8) + movaps %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movaps %xmm5, 69 + movaps %xmm5,0x45 + +// CHECK: movaps %xmm5, 32493 + movaps %xmm5,0x7eed + +// CHECK: movaps %xmm5, 3133065982 + movaps %xmm5,0xbabecafe + +// CHECK: movaps %xmm5, 305419896 + movaps %xmm5,0x12345678 + +// CHECK: movaps %xmm5, %xmm5 + movaps %xmm5,%xmm5 + +// CHECK: movhlps %xmm5, %xmm5 + movhlps %xmm5,%xmm5 + +// CHECK: movhps 3735928559(%ebx,%ecx,8), %xmm5 + movhps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movhps 69, %xmm5 + movhps 0x45,%xmm5 + +// CHECK: movhps 32493, %xmm5 + movhps 0x7eed,%xmm5 + +// CHECK: movhps 3133065982, %xmm5 + movhps 0xbabecafe,%xmm5 + +// CHECK: movhps 305419896, %xmm5 + movhps 0x12345678,%xmm5 + +// CHECK: movhps %xmm5, 3735928559(%ebx,%ecx,8) + movhps %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movhps %xmm5, 69 + movhps %xmm5,0x45 + +// CHECK: movhps %xmm5, 32493 + movhps %xmm5,0x7eed + +// CHECK: movhps %xmm5, 3133065982 + movhps %xmm5,0xbabecafe + +// CHECK: movhps %xmm5, 305419896 + movhps %xmm5,0x12345678 + +// CHECK: movlhps %xmm5, %xmm5 + movlhps %xmm5,%xmm5 + +// CHECK: movlps 3735928559(%ebx,%ecx,8), %xmm5 + movlps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movlps 69, %xmm5 + movlps 0x45,%xmm5 + +// CHECK: movlps 32493, %xmm5 + movlps 0x7eed,%xmm5 + +// CHECK: movlps 3133065982, %xmm5 + movlps 0xbabecafe,%xmm5 + +// CHECK: movlps 305419896, %xmm5 + movlps 0x12345678,%xmm5 + +// CHECK: movlps %xmm5, 3735928559(%ebx,%ecx,8) + movlps %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movlps %xmm5, 69 + movlps %xmm5,0x45 + +// CHECK: movlps %xmm5, 32493 + movlps %xmm5,0x7eed + +// CHECK: movlps %xmm5, 3133065982 + movlps %xmm5,0xbabecafe + +// CHECK: movlps %xmm5, 305419896 + movlps %xmm5,0x12345678 + +// CHECK: movmskps %xmm5, %ecx + movmskps %xmm5,%ecx + +// CHECK: movntps %xmm5, 3735928559(%ebx,%ecx,8) + movntps %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movntps %xmm5, 69 + movntps %xmm5,0x45 + +// CHECK: movntps %xmm5, 32493 + movntps %xmm5,0x7eed + +// CHECK: movntps %xmm5, 3133065982 + movntps %xmm5,0xbabecafe + +// CHECK: movntps %xmm5, 305419896 + movntps %xmm5,0x12345678 + +// CHECK: movntq %mm3, 3735928559(%ebx,%ecx,8) + movntq %mm3,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movntq %mm3, 69 + movntq %mm3,0x45 + +// CHECK: movntq %mm3, 32493 + movntq %mm3,0x7eed + +// CHECK: movntq %mm3, 3133065982 + movntq %mm3,0xbabecafe + +// CHECK: movntq %mm3, 305419896 + movntq %mm3,0x12345678 + +// CHECK: movntdq %xmm5, 3735928559(%ebx,%ecx,8) + movntdq %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movntdq %xmm5, 69 + movntdq %xmm5,0x45 + +// CHECK: movntdq %xmm5, 32493 + movntdq %xmm5,0x7eed + +// CHECK: movntdq %xmm5, 3133065982 + movntdq %xmm5,0xbabecafe + +// CHECK: movntdq %xmm5, 305419896 + movntdq %xmm5,0x12345678 + +// CHECK: movss 3735928559(%ebx,%ecx,8), %xmm5 + movss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movss 69, %xmm5 + movss 0x45,%xmm5 + +// CHECK: movss 32493, %xmm5 + movss 0x7eed,%xmm5 + +// CHECK: movss 3133065982, %xmm5 + movss 0xbabecafe,%xmm5 + +// CHECK: movss 305419896, %xmm5 + movss 0x12345678,%xmm5 + +// CHECK: movss %xmm5, %xmm5 + movss %xmm5,%xmm5 + +// CHECK: movss %xmm5, 3735928559(%ebx,%ecx,8) + movss %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movss %xmm5, 69 + movss %xmm5,0x45 + +// CHECK: movss %xmm5, 32493 + movss %xmm5,0x7eed + +// CHECK: movss %xmm5, 3133065982 + movss %xmm5,0xbabecafe + +// CHECK: movss %xmm5, 305419896 + movss %xmm5,0x12345678 + +// CHECK: movss %xmm5, %xmm5 + movss %xmm5,%xmm5 + +// CHECK: movups 3735928559(%ebx,%ecx,8), %xmm5 + movups 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movups 69, %xmm5 + movups 0x45,%xmm5 + +// CHECK: movups 32493, %xmm5 + movups 0x7eed,%xmm5 + +// CHECK: movups 3133065982, %xmm5 + movups 0xbabecafe,%xmm5 + +// CHECK: movups 305419896, %xmm5 + movups 0x12345678,%xmm5 + +// CHECK: movups %xmm5, %xmm5 + movups %xmm5,%xmm5 + +// CHECK: movups %xmm5, 3735928559(%ebx,%ecx,8) + movups %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movups %xmm5, 69 + movups %xmm5,0x45 + +// CHECK: movups %xmm5, 32493 + movups %xmm5,0x7eed + +// CHECK: movups %xmm5, 3133065982 + movups %xmm5,0xbabecafe + +// CHECK: movups %xmm5, 305419896 + movups %xmm5,0x12345678 + +// CHECK: movups %xmm5, %xmm5 + movups %xmm5,%xmm5 + +// CHECK: mulps 3735928559(%ebx,%ecx,8), %xmm5 + mulps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: mulps 69, %xmm5 + mulps 0x45,%xmm5 + +// CHECK: mulps 32493, %xmm5 + mulps 0x7eed,%xmm5 + +// CHECK: mulps 3133065982, %xmm5 + mulps 0xbabecafe,%xmm5 + +// CHECK: mulps 305419896, %xmm5 + mulps 0x12345678,%xmm5 + +// CHECK: mulps %xmm5, %xmm5 + mulps %xmm5,%xmm5 + +// CHECK: mulss 3735928559(%ebx,%ecx,8), %xmm5 + mulss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: mulss 69, %xmm5 + mulss 0x45,%xmm5 + +// CHECK: mulss 32493, %xmm5 + mulss 0x7eed,%xmm5 + +// CHECK: mulss 3133065982, %xmm5 + mulss 0xbabecafe,%xmm5 + +// CHECK: mulss 305419896, %xmm5 + mulss 0x12345678,%xmm5 + +// CHECK: mulss %xmm5, %xmm5 + mulss %xmm5,%xmm5 + +// CHECK: orps 3735928559(%ebx,%ecx,8), %xmm5 + orps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: orps 69, %xmm5 + orps 0x45,%xmm5 + +// CHECK: orps 32493, %xmm5 + orps 0x7eed,%xmm5 + +// CHECK: orps 3133065982, %xmm5 + orps 0xbabecafe,%xmm5 + +// CHECK: orps 305419896, %xmm5 + orps 0x12345678,%xmm5 + +// CHECK: orps %xmm5, %xmm5 + orps %xmm5,%xmm5 + +// CHECK: pavgb 3735928559(%ebx,%ecx,8), %mm3 + pavgb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pavgb 69, %mm3 + pavgb 0x45,%mm3 + +// CHECK: pavgb 32493, %mm3 + pavgb 0x7eed,%mm3 + +// CHECK: pavgb 3133065982, %mm3 + pavgb 0xbabecafe,%mm3 + +// CHECK: pavgb 305419896, %mm3 + pavgb 0x12345678,%mm3 + +// CHECK: pavgb %mm3, %mm3 + pavgb %mm3,%mm3 + +// CHECK: pavgb 3735928559(%ebx,%ecx,8), %xmm5 + pavgb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pavgb 69, %xmm5 + pavgb 0x45,%xmm5 + +// CHECK: pavgb 32493, %xmm5 + pavgb 0x7eed,%xmm5 + +// CHECK: pavgb 3133065982, %xmm5 + pavgb 0xbabecafe,%xmm5 + +// CHECK: pavgb 305419896, %xmm5 + pavgb 0x12345678,%xmm5 + +// CHECK: pavgb %xmm5, %xmm5 + pavgb %xmm5,%xmm5 + +// CHECK: pavgw 3735928559(%ebx,%ecx,8), %mm3 + pavgw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pavgw 69, %mm3 + pavgw 0x45,%mm3 + +// CHECK: pavgw 32493, %mm3 + pavgw 0x7eed,%mm3 + +// CHECK: pavgw 3133065982, %mm3 + pavgw 0xbabecafe,%mm3 + +// CHECK: pavgw 305419896, %mm3 + pavgw 0x12345678,%mm3 + +// CHECK: pavgw %mm3, %mm3 + pavgw %mm3,%mm3 + +// CHECK: pavgw 3735928559(%ebx,%ecx,8), %xmm5 + pavgw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pavgw 69, %xmm5 + pavgw 0x45,%xmm5 + +// CHECK: pavgw 32493, %xmm5 + pavgw 0x7eed,%xmm5 + +// CHECK: pavgw 3133065982, %xmm5 + pavgw 0xbabecafe,%xmm5 + +// CHECK: pavgw 305419896, %xmm5 + pavgw 0x12345678,%xmm5 + +// CHECK: pavgw %xmm5, %xmm5 + pavgw %xmm5,%xmm5 + +// CHECK: pmaxsw 3735928559(%ebx,%ecx,8), %mm3 + pmaxsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmaxsw 69, %mm3 + pmaxsw 0x45,%mm3 + +// CHECK: pmaxsw 32493, %mm3 + pmaxsw 0x7eed,%mm3 + +// CHECK: pmaxsw 3133065982, %mm3 + pmaxsw 0xbabecafe,%mm3 + +// CHECK: pmaxsw 305419896, %mm3 + pmaxsw 0x12345678,%mm3 + +// CHECK: pmaxsw %mm3, %mm3 + pmaxsw %mm3,%mm3 + +// CHECK: pmaxsw 3735928559(%ebx,%ecx,8), %xmm5 + pmaxsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmaxsw 69, %xmm5 + pmaxsw 0x45,%xmm5 + +// CHECK: pmaxsw 32493, %xmm5 + pmaxsw 0x7eed,%xmm5 + +// CHECK: pmaxsw 3133065982, %xmm5 + pmaxsw 0xbabecafe,%xmm5 + +// CHECK: pmaxsw 305419896, %xmm5 + pmaxsw 0x12345678,%xmm5 + +// CHECK: pmaxsw %xmm5, %xmm5 + pmaxsw %xmm5,%xmm5 + +// CHECK: pmaxub 3735928559(%ebx,%ecx,8), %mm3 + pmaxub 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmaxub 69, %mm3 + pmaxub 0x45,%mm3 + +// CHECK: pmaxub 32493, %mm3 + pmaxub 0x7eed,%mm3 + +// CHECK: pmaxub 3133065982, %mm3 + pmaxub 0xbabecafe,%mm3 + +// CHECK: pmaxub 305419896, %mm3 + pmaxub 0x12345678,%mm3 + +// CHECK: pmaxub %mm3, %mm3 + pmaxub %mm3,%mm3 + +// CHECK: pmaxub 3735928559(%ebx,%ecx,8), %xmm5 + pmaxub 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmaxub 69, %xmm5 + pmaxub 0x45,%xmm5 + +// CHECK: pmaxub 32493, %xmm5 + pmaxub 0x7eed,%xmm5 + +// CHECK: pmaxub 3133065982, %xmm5 + pmaxub 0xbabecafe,%xmm5 + +// CHECK: pmaxub 305419896, %xmm5 + pmaxub 0x12345678,%xmm5 + +// CHECK: pmaxub %xmm5, %xmm5 + pmaxub %xmm5,%xmm5 + +// CHECK: pminsw 3735928559(%ebx,%ecx,8), %mm3 + pminsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pminsw 69, %mm3 + pminsw 0x45,%mm3 + +// CHECK: pminsw 32493, %mm3 + pminsw 0x7eed,%mm3 + +// CHECK: pminsw 3133065982, %mm3 + pminsw 0xbabecafe,%mm3 + +// CHECK: pminsw 305419896, %mm3 + pminsw 0x12345678,%mm3 + +// CHECK: pminsw %mm3, %mm3 + pminsw %mm3,%mm3 + +// CHECK: pminsw 3735928559(%ebx,%ecx,8), %xmm5 + pminsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pminsw 69, %xmm5 + pminsw 0x45,%xmm5 + +// CHECK: pminsw 32493, %xmm5 + pminsw 0x7eed,%xmm5 + +// CHECK: pminsw 3133065982, %xmm5 + pminsw 0xbabecafe,%xmm5 + +// CHECK: pminsw 305419896, %xmm5 + pminsw 0x12345678,%xmm5 + +// CHECK: pminsw %xmm5, %xmm5 + pminsw %xmm5,%xmm5 + +// CHECK: pminub 3735928559(%ebx,%ecx,8), %mm3 + pminub 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pminub 69, %mm3 + pminub 0x45,%mm3 + +// CHECK: pminub 32493, %mm3 + pminub 0x7eed,%mm3 + +// CHECK: pminub 3133065982, %mm3 + pminub 0xbabecafe,%mm3 + +// CHECK: pminub 305419896, %mm3 + pminub 0x12345678,%mm3 + +// CHECK: pminub %mm3, %mm3 + pminub %mm3,%mm3 + +// CHECK: pminub 3735928559(%ebx,%ecx,8), %xmm5 + pminub 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pminub 69, %xmm5 + pminub 0x45,%xmm5 + +// CHECK: pminub 32493, %xmm5 + pminub 0x7eed,%xmm5 + +// CHECK: pminub 3133065982, %xmm5 + pminub 0xbabecafe,%xmm5 + +// CHECK: pminub 305419896, %xmm5 + pminub 0x12345678,%xmm5 + +// CHECK: pminub %xmm5, %xmm5 + pminub %xmm5,%xmm5 + +// CHECK: pmovmskb %mm3, %ecx + pmovmskb %mm3,%ecx + +// CHECK: pmovmskb %xmm5, %ecx + pmovmskb %xmm5,%ecx + +// CHECK: pmulhuw 3735928559(%ebx,%ecx,8), %mm3 + pmulhuw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmulhuw 69, %mm3 + pmulhuw 0x45,%mm3 + +// CHECK: pmulhuw 32493, %mm3 + pmulhuw 0x7eed,%mm3 + +// CHECK: pmulhuw 3133065982, %mm3 + pmulhuw 0xbabecafe,%mm3 + +// CHECK: pmulhuw 305419896, %mm3 + pmulhuw 0x12345678,%mm3 + +// CHECK: pmulhuw %mm3, %mm3 + pmulhuw %mm3,%mm3 + +// CHECK: pmulhuw 3735928559(%ebx,%ecx,8), %xmm5 + pmulhuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmulhuw 69, %xmm5 + pmulhuw 0x45,%xmm5 + +// CHECK: pmulhuw 32493, %xmm5 + pmulhuw 0x7eed,%xmm5 + +// CHECK: pmulhuw 3133065982, %xmm5 + pmulhuw 0xbabecafe,%xmm5 + +// CHECK: pmulhuw 305419896, %xmm5 + pmulhuw 0x12345678,%xmm5 + +// CHECK: pmulhuw %xmm5, %xmm5 + pmulhuw %xmm5,%xmm5 + +// CHECK: prefetchnta 3735928559(%ebx,%ecx,8) + prefetchnta 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: prefetchnta 32493 + prefetchnta 0x7eed + +// CHECK: prefetchnta 3133065982 + prefetchnta 0xbabecafe + +// CHECK: prefetchnta 305419896 + prefetchnta 0x12345678 + +// CHECK: prefetcht0 3735928559(%ebx,%ecx,8) + prefetcht0 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: prefetcht0 32493 + prefetcht0 0x7eed + +// CHECK: prefetcht0 3133065982 + prefetcht0 0xbabecafe + +// CHECK: prefetcht0 305419896 + prefetcht0 0x12345678 + +// CHECK: prefetcht1 3735928559(%ebx,%ecx,8) + prefetcht1 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: prefetcht1 32493 + prefetcht1 0x7eed + +// CHECK: prefetcht1 3133065982 + prefetcht1 0xbabecafe + +// CHECK: prefetcht1 305419896 + prefetcht1 0x12345678 + +// CHECK: prefetcht2 3735928559(%ebx,%ecx,8) + prefetcht2 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: prefetcht2 32493 + prefetcht2 0x7eed + +// CHECK: prefetcht2 3133065982 + prefetcht2 0xbabecafe + +// CHECK: prefetcht2 305419896 + prefetcht2 0x12345678 + +// CHECK: psadbw 3735928559(%ebx,%ecx,8), %mm3 + psadbw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psadbw 69, %mm3 + psadbw 0x45,%mm3 + +// CHECK: psadbw 32493, %mm3 + psadbw 0x7eed,%mm3 + +// CHECK: psadbw 3133065982, %mm3 + psadbw 0xbabecafe,%mm3 + +// CHECK: psadbw 305419896, %mm3 + psadbw 0x12345678,%mm3 + +// CHECK: psadbw %mm3, %mm3 + psadbw %mm3,%mm3 + +// CHECK: psadbw 3735928559(%ebx,%ecx,8), %xmm5 + psadbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psadbw 69, %xmm5 + psadbw 0x45,%xmm5 + +// CHECK: psadbw 32493, %xmm5 + psadbw 0x7eed,%xmm5 + +// CHECK: psadbw 3133065982, %xmm5 + psadbw 0xbabecafe,%xmm5 + +// CHECK: psadbw 305419896, %xmm5 + psadbw 0x12345678,%xmm5 + +// CHECK: psadbw %xmm5, %xmm5 + psadbw %xmm5,%xmm5 + +// CHECK: rcpps 3735928559(%ebx,%ecx,8), %xmm5 + rcpps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: rcpps 69, %xmm5 + rcpps 0x45,%xmm5 + +// CHECK: rcpps 32493, %xmm5 + rcpps 0x7eed,%xmm5 + +// CHECK: rcpps 3133065982, %xmm5 + rcpps 0xbabecafe,%xmm5 + +// CHECK: rcpps 305419896, %xmm5 + rcpps 0x12345678,%xmm5 + +// CHECK: rcpps %xmm5, %xmm5 + rcpps %xmm5,%xmm5 + +// CHECK: rcpss 3735928559(%ebx,%ecx,8), %xmm5 + rcpss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: rcpss 69, %xmm5 + rcpss 0x45,%xmm5 + +// CHECK: rcpss 32493, %xmm5 + rcpss 0x7eed,%xmm5 + +// CHECK: rcpss 3133065982, %xmm5 + rcpss 0xbabecafe,%xmm5 + +// CHECK: rcpss 305419896, %xmm5 + rcpss 0x12345678,%xmm5 + +// CHECK: rcpss %xmm5, %xmm5 + rcpss %xmm5,%xmm5 + +// CHECK: rsqrtps 3735928559(%ebx,%ecx,8), %xmm5 + rsqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: rsqrtps 69, %xmm5 + rsqrtps 0x45,%xmm5 + +// CHECK: rsqrtps 32493, %xmm5 + rsqrtps 0x7eed,%xmm5 + +// CHECK: rsqrtps 3133065982, %xmm5 + rsqrtps 0xbabecafe,%xmm5 + +// CHECK: rsqrtps 305419896, %xmm5 + rsqrtps 0x12345678,%xmm5 + +// CHECK: rsqrtps %xmm5, %xmm5 + rsqrtps %xmm5,%xmm5 + +// CHECK: rsqrtss 3735928559(%ebx,%ecx,8), %xmm5 + rsqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: rsqrtss 69, %xmm5 + rsqrtss 0x45,%xmm5 + +// CHECK: rsqrtss 32493, %xmm5 + rsqrtss 0x7eed,%xmm5 + +// CHECK: rsqrtss 3133065982, %xmm5 + rsqrtss 0xbabecafe,%xmm5 + +// CHECK: rsqrtss 305419896, %xmm5 + rsqrtss 0x12345678,%xmm5 + +// CHECK: rsqrtss %xmm5, %xmm5 + rsqrtss %xmm5,%xmm5 + +// CHECK: sfence + sfence + +// CHECK: sqrtps 3735928559(%ebx,%ecx,8), %xmm5 + sqrtps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: sqrtps 69, %xmm5 + sqrtps 0x45,%xmm5 + +// CHECK: sqrtps 32493, %xmm5 + sqrtps 0x7eed,%xmm5 + +// CHECK: sqrtps 3133065982, %xmm5 + sqrtps 0xbabecafe,%xmm5 + +// CHECK: sqrtps 305419896, %xmm5 + sqrtps 0x12345678,%xmm5 + +// CHECK: sqrtps %xmm5, %xmm5 + sqrtps %xmm5,%xmm5 + +// CHECK: sqrtss 3735928559(%ebx,%ecx,8), %xmm5 + sqrtss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: sqrtss 69, %xmm5 + sqrtss 0x45,%xmm5 + +// CHECK: sqrtss 32493, %xmm5 + sqrtss 0x7eed,%xmm5 + +// CHECK: sqrtss 3133065982, %xmm5 + sqrtss 0xbabecafe,%xmm5 + +// CHECK: sqrtss 305419896, %xmm5 + sqrtss 0x12345678,%xmm5 + +// CHECK: sqrtss %xmm5, %xmm5 + sqrtss %xmm5,%xmm5 + +// CHECK: stmxcsr 3735928559(%ebx,%ecx,8) + stmxcsr 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: stmxcsr 32493 + stmxcsr 0x7eed + +// CHECK: stmxcsr 3133065982 + stmxcsr 0xbabecafe + +// CHECK: stmxcsr 305419896 + stmxcsr 0x12345678 + +// CHECK: subps 3735928559(%ebx,%ecx,8), %xmm5 + subps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: subps 69, %xmm5 + subps 0x45,%xmm5 + +// CHECK: subps 32493, %xmm5 + subps 0x7eed,%xmm5 + +// CHECK: subps 3133065982, %xmm5 + subps 0xbabecafe,%xmm5 + +// CHECK: subps 305419896, %xmm5 + subps 0x12345678,%xmm5 + +// CHECK: subps %xmm5, %xmm5 + subps %xmm5,%xmm5 + +// CHECK: subss 3735928559(%ebx,%ecx,8), %xmm5 + subss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: subss 69, %xmm5 + subss 0x45,%xmm5 + +// CHECK: subss 32493, %xmm5 + subss 0x7eed,%xmm5 + +// CHECK: subss 3133065982, %xmm5 + subss 0xbabecafe,%xmm5 + +// CHECK: subss 305419896, %xmm5 + subss 0x12345678,%xmm5 + +// CHECK: subss %xmm5, %xmm5 + subss %xmm5,%xmm5 + +// CHECK: ucomiss 3735928559(%ebx,%ecx,8), %xmm5 + ucomiss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: ucomiss 69, %xmm5 + ucomiss 0x45,%xmm5 + +// CHECK: ucomiss 32493, %xmm5 + ucomiss 0x7eed,%xmm5 + +// CHECK: ucomiss 3133065982, %xmm5 + ucomiss 0xbabecafe,%xmm5 + +// CHECK: ucomiss 305419896, %xmm5 + ucomiss 0x12345678,%xmm5 + +// CHECK: ucomiss %xmm5, %xmm5 + ucomiss %xmm5,%xmm5 + +// CHECK: unpckhps 3735928559(%ebx,%ecx,8), %xmm5 + unpckhps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: unpckhps 69, %xmm5 + unpckhps 0x45,%xmm5 + +// CHECK: unpckhps 32493, %xmm5 + unpckhps 0x7eed,%xmm5 + +// CHECK: unpckhps 3133065982, %xmm5 + unpckhps 0xbabecafe,%xmm5 + +// CHECK: unpckhps 305419896, %xmm5 + unpckhps 0x12345678,%xmm5 + +// CHECK: unpckhps %xmm5, %xmm5 + unpckhps %xmm5,%xmm5 + +// CHECK: unpcklps 3735928559(%ebx,%ecx,8), %xmm5 + unpcklps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: unpcklps 69, %xmm5 + unpcklps 0x45,%xmm5 + +// CHECK: unpcklps 32493, %xmm5 + unpcklps 0x7eed,%xmm5 + +// CHECK: unpcklps 3133065982, %xmm5 + unpcklps 0xbabecafe,%xmm5 + +// CHECK: unpcklps 305419896, %xmm5 + unpcklps 0x12345678,%xmm5 + +// CHECK: unpcklps %xmm5, %xmm5 + unpcklps %xmm5,%xmm5 + +// CHECK: xorps 3735928559(%ebx,%ecx,8), %xmm5 + xorps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: xorps 69, %xmm5 + xorps 0x45,%xmm5 + +// CHECK: xorps 32493, %xmm5 + xorps 0x7eed,%xmm5 + +// CHECK: xorps 3133065982, %xmm5 + xorps 0xbabecafe,%xmm5 + +// CHECK: xorps 305419896, %xmm5 + xorps 0x12345678,%xmm5 + +// CHECK: xorps %xmm5, %xmm5 + xorps %xmm5,%xmm5 + +// CHECK: addpd 3735928559(%ebx,%ecx,8), %xmm5 + addpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: addpd 69, %xmm5 + addpd 0x45,%xmm5 + +// CHECK: addpd 32493, %xmm5 + addpd 0x7eed,%xmm5 + +// CHECK: addpd 3133065982, %xmm5 + addpd 0xbabecafe,%xmm5 + +// CHECK: addpd 305419896, %xmm5 + addpd 0x12345678,%xmm5 + +// CHECK: addpd %xmm5, %xmm5 + addpd %xmm5,%xmm5 + +// CHECK: addsd 3735928559(%ebx,%ecx,8), %xmm5 + addsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: addsd 69, %xmm5 + addsd 0x45,%xmm5 + +// CHECK: addsd 32493, %xmm5 + addsd 0x7eed,%xmm5 + +// CHECK: addsd 3133065982, %xmm5 + addsd 0xbabecafe,%xmm5 + +// CHECK: addsd 305419896, %xmm5 + addsd 0x12345678,%xmm5 + +// CHECK: addsd %xmm5, %xmm5 + addsd %xmm5,%xmm5 + +// CHECK: andnpd 3735928559(%ebx,%ecx,8), %xmm5 + andnpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: andnpd 69, %xmm5 + andnpd 0x45,%xmm5 + +// CHECK: andnpd 32493, %xmm5 + andnpd 0x7eed,%xmm5 + +// CHECK: andnpd 3133065982, %xmm5 + andnpd 0xbabecafe,%xmm5 + +// CHECK: andnpd 305419896, %xmm5 + andnpd 0x12345678,%xmm5 + +// CHECK: andnpd %xmm5, %xmm5 + andnpd %xmm5,%xmm5 + +// CHECK: andpd 3735928559(%ebx,%ecx,8), %xmm5 + andpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: andpd 69, %xmm5 + andpd 0x45,%xmm5 + +// CHECK: andpd 32493, %xmm5 + andpd 0x7eed,%xmm5 + +// CHECK: andpd 3133065982, %xmm5 + andpd 0xbabecafe,%xmm5 + +// CHECK: andpd 305419896, %xmm5 + andpd 0x12345678,%xmm5 + +// CHECK: andpd %xmm5, %xmm5 + andpd %xmm5,%xmm5 + +// CHECK: comisd 3735928559(%ebx,%ecx,8), %xmm5 + comisd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: comisd 69, %xmm5 + comisd 0x45,%xmm5 + +// CHECK: comisd 32493, %xmm5 + comisd 0x7eed,%xmm5 + +// CHECK: comisd 3133065982, %xmm5 + comisd 0xbabecafe,%xmm5 + +// CHECK: comisd 305419896, %xmm5 + comisd 0x12345678,%xmm5 + +// CHECK: comisd %xmm5, %xmm5 + comisd %xmm5,%xmm5 + +// CHECK: cvtpi2pd 3735928559(%ebx,%ecx,8), %xmm5 + cvtpi2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtpi2pd 69, %xmm5 + cvtpi2pd 0x45,%xmm5 + +// CHECK: cvtpi2pd 32493, %xmm5 + cvtpi2pd 0x7eed,%xmm5 + +// CHECK: cvtpi2pd 3133065982, %xmm5 + cvtpi2pd 0xbabecafe,%xmm5 + +// CHECK: cvtpi2pd 305419896, %xmm5 + cvtpi2pd 0x12345678,%xmm5 + +// CHECK: cvtpi2pd %mm3, %xmm5 + cvtpi2pd %mm3,%xmm5 + +// CHECK: cvtsi2sd %ecx, %xmm5 + cvtsi2sd %ecx,%xmm5 + +// CHECK: cvtsi2sd 3735928559(%ebx,%ecx,8), %xmm5 + cvtsi2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtsi2sd 69, %xmm5 + cvtsi2sd 0x45,%xmm5 + +// CHECK: cvtsi2sd 32493, %xmm5 + cvtsi2sd 0x7eed,%xmm5 + +// CHECK: cvtsi2sd 3133065982, %xmm5 + cvtsi2sd 0xbabecafe,%xmm5 + +// CHECK: cvtsi2sd 305419896, %xmm5 + cvtsi2sd 0x12345678,%xmm5 + +// CHECK: divpd 3735928559(%ebx,%ecx,8), %xmm5 + divpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: divpd 69, %xmm5 + divpd 0x45,%xmm5 + +// CHECK: divpd 32493, %xmm5 + divpd 0x7eed,%xmm5 + +// CHECK: divpd 3133065982, %xmm5 + divpd 0xbabecafe,%xmm5 + +// CHECK: divpd 305419896, %xmm5 + divpd 0x12345678,%xmm5 + +// CHECK: divpd %xmm5, %xmm5 + divpd %xmm5,%xmm5 + +// CHECK: divsd 3735928559(%ebx,%ecx,8), %xmm5 + divsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: divsd 69, %xmm5 + divsd 0x45,%xmm5 + +// CHECK: divsd 32493, %xmm5 + divsd 0x7eed,%xmm5 + +// CHECK: divsd 3133065982, %xmm5 + divsd 0xbabecafe,%xmm5 + +// CHECK: divsd 305419896, %xmm5 + divsd 0x12345678,%xmm5 + +// CHECK: divsd %xmm5, %xmm5 + divsd %xmm5,%xmm5 + +// CHECK: maxpd 3735928559(%ebx,%ecx,8), %xmm5 + maxpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: maxpd 69, %xmm5 + maxpd 0x45,%xmm5 + +// CHECK: maxpd 32493, %xmm5 + maxpd 0x7eed,%xmm5 + +// CHECK: maxpd 3133065982, %xmm5 + maxpd 0xbabecafe,%xmm5 + +// CHECK: maxpd 305419896, %xmm5 + maxpd 0x12345678,%xmm5 + +// CHECK: maxpd %xmm5, %xmm5 + maxpd %xmm5,%xmm5 + +// CHECK: maxsd 3735928559(%ebx,%ecx,8), %xmm5 + maxsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: maxsd 69, %xmm5 + maxsd 0x45,%xmm5 + +// CHECK: maxsd 32493, %xmm5 + maxsd 0x7eed,%xmm5 + +// CHECK: maxsd 3133065982, %xmm5 + maxsd 0xbabecafe,%xmm5 + +// CHECK: maxsd 305419896, %xmm5 + maxsd 0x12345678,%xmm5 + +// CHECK: maxsd %xmm5, %xmm5 + maxsd %xmm5,%xmm5 + +// CHECK: minpd 3735928559(%ebx,%ecx,8), %xmm5 + minpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: minpd 69, %xmm5 + minpd 0x45,%xmm5 + +// CHECK: minpd 32493, %xmm5 + minpd 0x7eed,%xmm5 + +// CHECK: minpd 3133065982, %xmm5 + minpd 0xbabecafe,%xmm5 + +// CHECK: minpd 305419896, %xmm5 + minpd 0x12345678,%xmm5 + +// CHECK: minpd %xmm5, %xmm5 + minpd %xmm5,%xmm5 + +// CHECK: minsd 3735928559(%ebx,%ecx,8), %xmm5 + minsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: minsd 69, %xmm5 + minsd 0x45,%xmm5 + +// CHECK: minsd 32493, %xmm5 + minsd 0x7eed,%xmm5 + +// CHECK: minsd 3133065982, %xmm5 + minsd 0xbabecafe,%xmm5 + +// CHECK: minsd 305419896, %xmm5 + minsd 0x12345678,%xmm5 + +// CHECK: minsd %xmm5, %xmm5 + minsd %xmm5,%xmm5 + +// CHECK: movapd 3735928559(%ebx,%ecx,8), %xmm5 + movapd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movapd 69, %xmm5 + movapd 0x45,%xmm5 + +// CHECK: movapd 32493, %xmm5 + movapd 0x7eed,%xmm5 + +// CHECK: movapd 3133065982, %xmm5 + movapd 0xbabecafe,%xmm5 + +// CHECK: movapd 305419896, %xmm5 + movapd 0x12345678,%xmm5 + +// CHECK: movapd %xmm5, %xmm5 + movapd %xmm5,%xmm5 + +// CHECK: movapd %xmm5, 3735928559(%ebx,%ecx,8) + movapd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movapd %xmm5, 69 + movapd %xmm5,0x45 + +// CHECK: movapd %xmm5, 32493 + movapd %xmm5,0x7eed + +// CHECK: movapd %xmm5, 3133065982 + movapd %xmm5,0xbabecafe + +// CHECK: movapd %xmm5, 305419896 + movapd %xmm5,0x12345678 + +// CHECK: movapd %xmm5, %xmm5 + movapd %xmm5,%xmm5 + +// CHECK: movhpd 3735928559(%ebx,%ecx,8), %xmm5 + movhpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movhpd 69, %xmm5 + movhpd 0x45,%xmm5 + +// CHECK: movhpd 32493, %xmm5 + movhpd 0x7eed,%xmm5 + +// CHECK: movhpd 3133065982, %xmm5 + movhpd 0xbabecafe,%xmm5 + +// CHECK: movhpd 305419896, %xmm5 + movhpd 0x12345678,%xmm5 + +// CHECK: movhpd %xmm5, 3735928559(%ebx,%ecx,8) + movhpd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movhpd %xmm5, 69 + movhpd %xmm5,0x45 + +// CHECK: movhpd %xmm5, 32493 + movhpd %xmm5,0x7eed + +// CHECK: movhpd %xmm5, 3133065982 + movhpd %xmm5,0xbabecafe + +// CHECK: movhpd %xmm5, 305419896 + movhpd %xmm5,0x12345678 + +// CHECK: movlpd 3735928559(%ebx,%ecx,8), %xmm5 + movlpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movlpd 69, %xmm5 + movlpd 0x45,%xmm5 + +// CHECK: movlpd 32493, %xmm5 + movlpd 0x7eed,%xmm5 + +// CHECK: movlpd 3133065982, %xmm5 + movlpd 0xbabecafe,%xmm5 + +// CHECK: movlpd 305419896, %xmm5 + movlpd 0x12345678,%xmm5 + +// CHECK: movlpd %xmm5, 3735928559(%ebx,%ecx,8) + movlpd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movlpd %xmm5, 69 + movlpd %xmm5,0x45 + +// CHECK: movlpd %xmm5, 32493 + movlpd %xmm5,0x7eed + +// CHECK: movlpd %xmm5, 3133065982 + movlpd %xmm5,0xbabecafe + +// CHECK: movlpd %xmm5, 305419896 + movlpd %xmm5,0x12345678 + +// CHECK: movmskpd %xmm5, %ecx + movmskpd %xmm5,%ecx + +// CHECK: movntpd %xmm5, 3735928559(%ebx,%ecx,8) + movntpd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movntpd %xmm5, 69 + movntpd %xmm5,0x45 + +// CHECK: movntpd %xmm5, 32493 + movntpd %xmm5,0x7eed + +// CHECK: movntpd %xmm5, 3133065982 + movntpd %xmm5,0xbabecafe + +// CHECK: movntpd %xmm5, 305419896 + movntpd %xmm5,0x12345678 + +// CHECK: movsd 3735928559(%ebx,%ecx,8), %xmm5 + movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movsd 69, %xmm5 + movsd 0x45,%xmm5 + +// CHECK: movsd 32493, %xmm5 + movsd 0x7eed,%xmm5 + +// CHECK: movsd 3133065982, %xmm5 + movsd 0xbabecafe,%xmm5 + +// CHECK: movsd 305419896, %xmm5 + movsd 0x12345678,%xmm5 + +// CHECK: movsd %xmm5, %xmm5 + movsd %xmm5,%xmm5 + +// CHECK: movsd %xmm5, 3735928559(%ebx,%ecx,8) + movsd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movsd %xmm5, 69 + movsd %xmm5,0x45 + +// CHECK: movsd %xmm5, 32493 + movsd %xmm5,0x7eed + +// CHECK: movsd %xmm5, 3133065982 + movsd %xmm5,0xbabecafe + +// CHECK: movsd %xmm5, 305419896 + movsd %xmm5,0x12345678 + +// CHECK: movsd %xmm5, %xmm5 + movsd %xmm5,%xmm5 + +// CHECK: movupd 3735928559(%ebx,%ecx,8), %xmm5 + movupd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movupd 69, %xmm5 + movupd 0x45,%xmm5 + +// CHECK: movupd 32493, %xmm5 + movupd 0x7eed,%xmm5 + +// CHECK: movupd 3133065982, %xmm5 + movupd 0xbabecafe,%xmm5 + +// CHECK: movupd 305419896, %xmm5 + movupd 0x12345678,%xmm5 + +// CHECK: movupd %xmm5, %xmm5 + movupd %xmm5,%xmm5 + +// CHECK: movupd %xmm5, 3735928559(%ebx,%ecx,8) + movupd %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movupd %xmm5, 69 + movupd %xmm5,0x45 + +// CHECK: movupd %xmm5, 32493 + movupd %xmm5,0x7eed + +// CHECK: movupd %xmm5, 3133065982 + movupd %xmm5,0xbabecafe + +// CHECK: movupd %xmm5, 305419896 + movupd %xmm5,0x12345678 + +// CHECK: movupd %xmm5, %xmm5 + movupd %xmm5,%xmm5 + +// CHECK: mulpd 3735928559(%ebx,%ecx,8), %xmm5 + mulpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: mulpd 69, %xmm5 + mulpd 0x45,%xmm5 + +// CHECK: mulpd 32493, %xmm5 + mulpd 0x7eed,%xmm5 + +// CHECK: mulpd 3133065982, %xmm5 + mulpd 0xbabecafe,%xmm5 + +// CHECK: mulpd 305419896, %xmm5 + mulpd 0x12345678,%xmm5 + +// CHECK: mulpd %xmm5, %xmm5 + mulpd %xmm5,%xmm5 + +// CHECK: mulsd 3735928559(%ebx,%ecx,8), %xmm5 + mulsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: mulsd 69, %xmm5 + mulsd 0x45,%xmm5 + +// CHECK: mulsd 32493, %xmm5 + mulsd 0x7eed,%xmm5 + +// CHECK: mulsd 3133065982, %xmm5 + mulsd 0xbabecafe,%xmm5 + +// CHECK: mulsd 305419896, %xmm5 + mulsd 0x12345678,%xmm5 + +// CHECK: mulsd %xmm5, %xmm5 + mulsd %xmm5,%xmm5 + +// CHECK: orpd 3735928559(%ebx,%ecx,8), %xmm5 + orpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: orpd 69, %xmm5 + orpd 0x45,%xmm5 + +// CHECK: orpd 32493, %xmm5 + orpd 0x7eed,%xmm5 + +// CHECK: orpd 3133065982, %xmm5 + orpd 0xbabecafe,%xmm5 + +// CHECK: orpd 305419896, %xmm5 + orpd 0x12345678,%xmm5 + +// CHECK: orpd %xmm5, %xmm5 + orpd %xmm5,%xmm5 + +// CHECK: sqrtpd 3735928559(%ebx,%ecx,8), %xmm5 + sqrtpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: sqrtpd 69, %xmm5 + sqrtpd 0x45,%xmm5 + +// CHECK: sqrtpd 32493, %xmm5 + sqrtpd 0x7eed,%xmm5 + +// CHECK: sqrtpd 3133065982, %xmm5 + sqrtpd 0xbabecafe,%xmm5 + +// CHECK: sqrtpd 305419896, %xmm5 + sqrtpd 0x12345678,%xmm5 + +// CHECK: sqrtpd %xmm5, %xmm5 + sqrtpd %xmm5,%xmm5 + +// CHECK: sqrtsd 3735928559(%ebx,%ecx,8), %xmm5 + sqrtsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: sqrtsd 69, %xmm5 + sqrtsd 0x45,%xmm5 + +// CHECK: sqrtsd 32493, %xmm5 + sqrtsd 0x7eed,%xmm5 + +// CHECK: sqrtsd 3133065982, %xmm5 + sqrtsd 0xbabecafe,%xmm5 + +// CHECK: sqrtsd 305419896, %xmm5 + sqrtsd 0x12345678,%xmm5 + +// CHECK: sqrtsd %xmm5, %xmm5 + sqrtsd %xmm5,%xmm5 + +// CHECK: subpd 3735928559(%ebx,%ecx,8), %xmm5 + subpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: subpd 69, %xmm5 + subpd 0x45,%xmm5 + +// CHECK: subpd 32493, %xmm5 + subpd 0x7eed,%xmm5 + +// CHECK: subpd 3133065982, %xmm5 + subpd 0xbabecafe,%xmm5 + +// CHECK: subpd 305419896, %xmm5 + subpd 0x12345678,%xmm5 + +// CHECK: subpd %xmm5, %xmm5 + subpd %xmm5,%xmm5 + +// CHECK: subsd 3735928559(%ebx,%ecx,8), %xmm5 + subsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: subsd 69, %xmm5 + subsd 0x45,%xmm5 + +// CHECK: subsd 32493, %xmm5 + subsd 0x7eed,%xmm5 + +// CHECK: subsd 3133065982, %xmm5 + subsd 0xbabecafe,%xmm5 + +// CHECK: subsd 305419896, %xmm5 + subsd 0x12345678,%xmm5 + +// CHECK: subsd %xmm5, %xmm5 + subsd %xmm5,%xmm5 + +// CHECK: ucomisd 3735928559(%ebx,%ecx,8), %xmm5 + ucomisd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: ucomisd 69, %xmm5 + ucomisd 0x45,%xmm5 + +// CHECK: ucomisd 32493, %xmm5 + ucomisd 0x7eed,%xmm5 + +// CHECK: ucomisd 3133065982, %xmm5 + ucomisd 0xbabecafe,%xmm5 + +// CHECK: ucomisd 305419896, %xmm5 + ucomisd 0x12345678,%xmm5 + +// CHECK: ucomisd %xmm5, %xmm5 + ucomisd %xmm5,%xmm5 + +// CHECK: unpckhpd 3735928559(%ebx,%ecx,8), %xmm5 + unpckhpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: unpckhpd 69, %xmm5 + unpckhpd 0x45,%xmm5 + +// CHECK: unpckhpd 32493, %xmm5 + unpckhpd 0x7eed,%xmm5 + +// CHECK: unpckhpd 3133065982, %xmm5 + unpckhpd 0xbabecafe,%xmm5 + +// CHECK: unpckhpd 305419896, %xmm5 + unpckhpd 0x12345678,%xmm5 + +// CHECK: unpckhpd %xmm5, %xmm5 + unpckhpd %xmm5,%xmm5 + +// CHECK: unpcklpd 3735928559(%ebx,%ecx,8), %xmm5 + unpcklpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: unpcklpd 69, %xmm5 + unpcklpd 0x45,%xmm5 + +// CHECK: unpcklpd 32493, %xmm5 + unpcklpd 0x7eed,%xmm5 + +// CHECK: unpcklpd 3133065982, %xmm5 + unpcklpd 0xbabecafe,%xmm5 + +// CHECK: unpcklpd 305419896, %xmm5 + unpcklpd 0x12345678,%xmm5 + +// CHECK: unpcklpd %xmm5, %xmm5 + unpcklpd %xmm5,%xmm5 + +// CHECK: xorpd 3735928559(%ebx,%ecx,8), %xmm5 + xorpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: xorpd 69, %xmm5 + xorpd 0x45,%xmm5 + +// CHECK: xorpd 32493, %xmm5 + xorpd 0x7eed,%xmm5 + +// CHECK: xorpd 3133065982, %xmm5 + xorpd 0xbabecafe,%xmm5 + +// CHECK: xorpd 305419896, %xmm5 + xorpd 0x12345678,%xmm5 + +// CHECK: xorpd %xmm5, %xmm5 + xorpd %xmm5,%xmm5 + +// CHECK: cvtdq2pd 3735928559(%ebx,%ecx,8), %xmm5 + cvtdq2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtdq2pd 69, %xmm5 + cvtdq2pd 0x45,%xmm5 + +// CHECK: cvtdq2pd 32493, %xmm5 + cvtdq2pd 0x7eed,%xmm5 + +// CHECK: cvtdq2pd 3133065982, %xmm5 + cvtdq2pd 0xbabecafe,%xmm5 + +// CHECK: cvtdq2pd 305419896, %xmm5 + cvtdq2pd 0x12345678,%xmm5 + +// CHECK: cvtdq2pd %xmm5, %xmm5 + cvtdq2pd %xmm5,%xmm5 + +// CHECK: cvtpd2dq 3735928559(%ebx,%ecx,8), %xmm5 + cvtpd2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtpd2dq 69, %xmm5 + cvtpd2dq 0x45,%xmm5 + +// CHECK: cvtpd2dq 32493, %xmm5 + cvtpd2dq 0x7eed,%xmm5 + +// CHECK: cvtpd2dq 3133065982, %xmm5 + cvtpd2dq 0xbabecafe,%xmm5 + +// CHECK: cvtpd2dq 305419896, %xmm5 + cvtpd2dq 0x12345678,%xmm5 + +// CHECK: cvtpd2dq %xmm5, %xmm5 + cvtpd2dq %xmm5,%xmm5 + +// CHECK: cvtdq2ps 3735928559(%ebx,%ecx,8), %xmm5 + cvtdq2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtdq2ps 69, %xmm5 + cvtdq2ps 0x45,%xmm5 + +// CHECK: cvtdq2ps 32493, %xmm5 + cvtdq2ps 0x7eed,%xmm5 + +// CHECK: cvtdq2ps 3133065982, %xmm5 + cvtdq2ps 0xbabecafe,%xmm5 + +// CHECK: cvtdq2ps 305419896, %xmm5 + cvtdq2ps 0x12345678,%xmm5 + +// CHECK: cvtdq2ps %xmm5, %xmm5 + cvtdq2ps %xmm5,%xmm5 + +// CHECK: cvtpd2pi 3735928559(%ebx,%ecx,8), %mm3 + cvtpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: cvtpd2pi 69, %mm3 + cvtpd2pi 0x45,%mm3 + +// CHECK: cvtpd2pi 32493, %mm3 + cvtpd2pi 0x7eed,%mm3 + +// CHECK: cvtpd2pi 3133065982, %mm3 + cvtpd2pi 0xbabecafe,%mm3 + +// CHECK: cvtpd2pi 305419896, %mm3 + cvtpd2pi 0x12345678,%mm3 + +// CHECK: cvtpd2pi %xmm5, %mm3 + cvtpd2pi %xmm5,%mm3 + +// CHECK: cvtpd2ps 3735928559(%ebx,%ecx,8), %xmm5 + cvtpd2ps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtpd2ps 69, %xmm5 + cvtpd2ps 0x45,%xmm5 + +// CHECK: cvtpd2ps 32493, %xmm5 + cvtpd2ps 0x7eed,%xmm5 + +// CHECK: cvtpd2ps 3133065982, %xmm5 + cvtpd2ps 0xbabecafe,%xmm5 + +// CHECK: cvtpd2ps 305419896, %xmm5 + cvtpd2ps 0x12345678,%xmm5 + +// CHECK: cvtpd2ps %xmm5, %xmm5 + cvtpd2ps %xmm5,%xmm5 + +// CHECK: cvtps2pd 3735928559(%ebx,%ecx,8), %xmm5 + cvtps2pd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtps2pd 69, %xmm5 + cvtps2pd 0x45,%xmm5 + +// CHECK: cvtps2pd 32493, %xmm5 + cvtps2pd 0x7eed,%xmm5 + +// CHECK: cvtps2pd 3133065982, %xmm5 + cvtps2pd 0xbabecafe,%xmm5 + +// CHECK: cvtps2pd 305419896, %xmm5 + cvtps2pd 0x12345678,%xmm5 + +// CHECK: cvtps2pd %xmm5, %xmm5 + cvtps2pd %xmm5,%xmm5 + +// CHECK: cvtps2dq 3735928559(%ebx,%ecx,8), %xmm5 + cvtps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtps2dq 69, %xmm5 + cvtps2dq 0x45,%xmm5 + +// CHECK: cvtps2dq 32493, %xmm5 + cvtps2dq 0x7eed,%xmm5 + +// CHECK: cvtps2dq 3133065982, %xmm5 + cvtps2dq 0xbabecafe,%xmm5 + +// CHECK: cvtps2dq 305419896, %xmm5 + cvtps2dq 0x12345678,%xmm5 + +// CHECK: cvtps2dq %xmm5, %xmm5 + cvtps2dq %xmm5,%xmm5 + +// CHECK: cvtsd2ss 3735928559(%ebx,%ecx,8), %xmm5 + cvtsd2ss 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtsd2ss 69, %xmm5 + cvtsd2ss 0x45,%xmm5 + +// CHECK: cvtsd2ss 32493, %xmm5 + cvtsd2ss 0x7eed,%xmm5 + +// CHECK: cvtsd2ss 3133065982, %xmm5 + cvtsd2ss 0xbabecafe,%xmm5 + +// CHECK: cvtsd2ss 305419896, %xmm5 + cvtsd2ss 0x12345678,%xmm5 + +// CHECK: cvtsd2ss %xmm5, %xmm5 + cvtsd2ss %xmm5,%xmm5 + +// CHECK: cvtss2sd 3735928559(%ebx,%ecx,8), %xmm5 + cvtss2sd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvtss2sd 69, %xmm5 + cvtss2sd 0x45,%xmm5 + +// CHECK: cvtss2sd 32493, %xmm5 + cvtss2sd 0x7eed,%xmm5 + +// CHECK: cvtss2sd 3133065982, %xmm5 + cvtss2sd 0xbabecafe,%xmm5 + +// CHECK: cvtss2sd 305419896, %xmm5 + cvtss2sd 0x12345678,%xmm5 + +// CHECK: cvtss2sd %xmm5, %xmm5 + cvtss2sd %xmm5,%xmm5 + +// CHECK: cvttpd2pi 3735928559(%ebx,%ecx,8), %mm3 + cvttpd2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: cvttpd2pi 69, %mm3 + cvttpd2pi 0x45,%mm3 + +// CHECK: cvttpd2pi 32493, %mm3 + cvttpd2pi 0x7eed,%mm3 + +// CHECK: cvttpd2pi 3133065982, %mm3 + cvttpd2pi 0xbabecafe,%mm3 + +// CHECK: cvttpd2pi 305419896, %mm3 + cvttpd2pi 0x12345678,%mm3 + +// CHECK: cvttpd2pi %xmm5, %mm3 + cvttpd2pi %xmm5,%mm3 + +// CHECK: cvttsd2si 3735928559(%ebx,%ecx,8), %ecx + cvttsd2si 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: cvttsd2si 69, %ecx + cvttsd2si 0x45,%ecx + +// CHECK: cvttsd2si 32493, %ecx + cvttsd2si 0x7eed,%ecx + +// CHECK: cvttsd2si 3133065982, %ecx + cvttsd2si 0xbabecafe,%ecx + +// CHECK: cvttsd2si 305419896, %ecx + cvttsd2si 0x12345678,%ecx + +// CHECK: cvttsd2si %xmm5, %ecx + cvttsd2si %xmm5,%ecx + +// CHECK: cvttps2dq 3735928559(%ebx,%ecx,8), %xmm5 + cvttps2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: cvttps2dq 69, %xmm5 + cvttps2dq 0x45,%xmm5 + +// CHECK: cvttps2dq 32493, %xmm5 + cvttps2dq 0x7eed,%xmm5 + +// CHECK: cvttps2dq 3133065982, %xmm5 + cvttps2dq 0xbabecafe,%xmm5 + +// CHECK: cvttps2dq 305419896, %xmm5 + cvttps2dq 0x12345678,%xmm5 + +// CHECK: cvttps2dq %xmm5, %xmm5 + cvttps2dq %xmm5,%xmm5 + +// CHECK: maskmovdqu %xmm5, %xmm5 + maskmovdqu %xmm5,%xmm5 + +// CHECK: movdqa 3735928559(%ebx,%ecx,8), %xmm5 + movdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movdqa 69, %xmm5 + movdqa 0x45,%xmm5 + +// CHECK: movdqa 32493, %xmm5 + movdqa 0x7eed,%xmm5 + +// CHECK: movdqa 3133065982, %xmm5 + movdqa 0xbabecafe,%xmm5 + +// CHECK: movdqa 305419896, %xmm5 + movdqa 0x12345678,%xmm5 + +// CHECK: movdqa %xmm5, %xmm5 + movdqa %xmm5,%xmm5 + +// CHECK: movdqa %xmm5, 3735928559(%ebx,%ecx,8) + movdqa %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movdqa %xmm5, 69 + movdqa %xmm5,0x45 + +// CHECK: movdqa %xmm5, 32493 + movdqa %xmm5,0x7eed + +// CHECK: movdqa %xmm5, 3133065982 + movdqa %xmm5,0xbabecafe + +// CHECK: movdqa %xmm5, 305419896 + movdqa %xmm5,0x12345678 + +// CHECK: movdqa %xmm5, %xmm5 + movdqa %xmm5,%xmm5 + +// CHECK: movdqu 3735928559(%ebx,%ecx,8), %xmm5 + movdqu 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movdqu 69, %xmm5 + movdqu 0x45,%xmm5 + +// CHECK: movdqu 32493, %xmm5 + movdqu 0x7eed,%xmm5 + +// CHECK: movdqu 3133065982, %xmm5 + movdqu 0xbabecafe,%xmm5 + +// CHECK: movdqu 305419896, %xmm5 + movdqu 0x12345678,%xmm5 + +// CHECK: movdqu %xmm5, 3735928559(%ebx,%ecx,8) + movdqu %xmm5,0xdeadbeef(%ebx,%ecx,8) + +// CHECK: movdqu %xmm5, 69 + movdqu %xmm5,0x45 + +// CHECK: movdqu %xmm5, 32493 + movdqu %xmm5,0x7eed + +// CHECK: movdqu %xmm5, 3133065982 + movdqu %xmm5,0xbabecafe + +// CHECK: movdqu %xmm5, 305419896 + movdqu %xmm5,0x12345678 + +// CHECK: movdq2q %xmm5, %mm3 + movdq2q %xmm5,%mm3 + +// CHECK: movq2dq %mm3, %xmm5 + movq2dq %mm3,%xmm5 + +// CHECK: pmuludq 3735928559(%ebx,%ecx,8), %mm3 + pmuludq 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmuludq 69, %mm3 + pmuludq 0x45,%mm3 + +// CHECK: pmuludq 32493, %mm3 + pmuludq 0x7eed,%mm3 + +// CHECK: pmuludq 3133065982, %mm3 + pmuludq 0xbabecafe,%mm3 + +// CHECK: pmuludq 305419896, %mm3 + pmuludq 0x12345678,%mm3 + +// CHECK: pmuludq %mm3, %mm3 + pmuludq %mm3,%mm3 + +// CHECK: pmuludq 3735928559(%ebx,%ecx,8), %xmm5 + pmuludq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmuludq 69, %xmm5 + pmuludq 0x45,%xmm5 + +// CHECK: pmuludq 32493, %xmm5 + pmuludq 0x7eed,%xmm5 + +// CHECK: pmuludq 3133065982, %xmm5 + pmuludq 0xbabecafe,%xmm5 + +// CHECK: pmuludq 305419896, %xmm5 + pmuludq 0x12345678,%xmm5 + +// CHECK: pmuludq %xmm5, %xmm5 + pmuludq %xmm5,%xmm5 + +// CHECK: pslldq $127, %xmm5 + pslldq $0x7f,%xmm5 + +// CHECK: psrldq $127, %xmm5 + psrldq $0x7f,%xmm5 + +// CHECK: punpckhqdq 3735928559(%ebx,%ecx,8), %xmm5 + punpckhqdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: punpckhqdq 69, %xmm5 + punpckhqdq 0x45,%xmm5 + +// CHECK: punpckhqdq 32493, %xmm5 + punpckhqdq 0x7eed,%xmm5 + +// CHECK: punpckhqdq 3133065982, %xmm5 + punpckhqdq 0xbabecafe,%xmm5 + +// CHECK: punpckhqdq 305419896, %xmm5 + punpckhqdq 0x12345678,%xmm5 + +// CHECK: punpckhqdq %xmm5, %xmm5 + punpckhqdq %xmm5,%xmm5 + +// CHECK: punpcklqdq 3735928559(%ebx,%ecx,8), %xmm5 + punpcklqdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: punpcklqdq 69, %xmm5 + punpcklqdq 0x45,%xmm5 + +// CHECK: punpcklqdq 32493, %xmm5 + punpcklqdq 0x7eed,%xmm5 + +// CHECK: punpcklqdq 3133065982, %xmm5 + punpcklqdq 0xbabecafe,%xmm5 + +// CHECK: punpcklqdq 305419896, %xmm5 + punpcklqdq 0x12345678,%xmm5 + +// CHECK: punpcklqdq %xmm5, %xmm5 + punpcklqdq %xmm5,%xmm5 + +// CHECK: addsubpd 3735928559(%ebx,%ecx,8), %xmm5 + addsubpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: addsubpd 69, %xmm5 + addsubpd 0x45,%xmm5 + +// CHECK: addsubpd 32493, %xmm5 + addsubpd 0x7eed,%xmm5 + +// CHECK: addsubpd 3133065982, %xmm5 + addsubpd 0xbabecafe,%xmm5 + +// CHECK: addsubpd 305419896, %xmm5 + addsubpd 0x12345678,%xmm5 + +// CHECK: addsubpd %xmm5, %xmm5 + addsubpd %xmm5,%xmm5 + +// CHECK: addsubps 3735928559(%ebx,%ecx,8), %xmm5 + addsubps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: addsubps 69, %xmm5 + addsubps 0x45,%xmm5 + +// CHECK: addsubps 32493, %xmm5 + addsubps 0x7eed,%xmm5 + +// CHECK: addsubps 3133065982, %xmm5 + addsubps 0xbabecafe,%xmm5 + +// CHECK: addsubps 305419896, %xmm5 + addsubps 0x12345678,%xmm5 + +// CHECK: addsubps %xmm5, %xmm5 + addsubps %xmm5,%xmm5 + +// CHECK: fisttpl 3735928559(%ebx,%ecx,8) + fisttpl 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: fisttpl 3133065982 + fisttpl 0xbabecafe + +// CHECK: fisttpl 305419896 + fisttpl 0x12345678 + +// CHECK: haddpd 3735928559(%ebx,%ecx,8), %xmm5 + haddpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: haddpd 69, %xmm5 + haddpd 0x45,%xmm5 + +// CHECK: haddpd 32493, %xmm5 + haddpd 0x7eed,%xmm5 + +// CHECK: haddpd 3133065982, %xmm5 + haddpd 0xbabecafe,%xmm5 + +// CHECK: haddpd 305419896, %xmm5 + haddpd 0x12345678,%xmm5 + +// CHECK: haddpd %xmm5, %xmm5 + haddpd %xmm5,%xmm5 + +// CHECK: haddps 3735928559(%ebx,%ecx,8), %xmm5 + haddps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: haddps 69, %xmm5 + haddps 0x45,%xmm5 + +// CHECK: haddps 32493, %xmm5 + haddps 0x7eed,%xmm5 + +// CHECK: haddps 3133065982, %xmm5 + haddps 0xbabecafe,%xmm5 + +// CHECK: haddps 305419896, %xmm5 + haddps 0x12345678,%xmm5 + +// CHECK: haddps %xmm5, %xmm5 + haddps %xmm5,%xmm5 + +// CHECK: hsubpd 3735928559(%ebx,%ecx,8), %xmm5 + hsubpd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: hsubpd 69, %xmm5 + hsubpd 0x45,%xmm5 + +// CHECK: hsubpd 32493, %xmm5 + hsubpd 0x7eed,%xmm5 + +// CHECK: hsubpd 3133065982, %xmm5 + hsubpd 0xbabecafe,%xmm5 + +// CHECK: hsubpd 305419896, %xmm5 + hsubpd 0x12345678,%xmm5 + +// CHECK: hsubpd %xmm5, %xmm5 + hsubpd %xmm5,%xmm5 + +// CHECK: hsubps 3735928559(%ebx,%ecx,8), %xmm5 + hsubps 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: hsubps 69, %xmm5 + hsubps 0x45,%xmm5 + +// CHECK: hsubps 32493, %xmm5 + hsubps 0x7eed,%xmm5 + +// CHECK: hsubps 3133065982, %xmm5 + hsubps 0xbabecafe,%xmm5 + +// CHECK: hsubps 305419896, %xmm5 + hsubps 0x12345678,%xmm5 + +// CHECK: hsubps %xmm5, %xmm5 + hsubps %xmm5,%xmm5 + +// CHECK: lddqu 3735928559(%ebx,%ecx,8), %xmm5 + lddqu 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: lddqu 69, %xmm5 + lddqu 0x45,%xmm5 + +// CHECK: lddqu 32493, %xmm5 + lddqu 0x7eed,%xmm5 + +// CHECK: lddqu 3133065982, %xmm5 + lddqu 0xbabecafe,%xmm5 + +// CHECK: lddqu 305419896, %xmm5 + lddqu 0x12345678,%xmm5 + +// CHECK: monitor + monitor + +// CHECK: movddup 3735928559(%ebx,%ecx,8), %xmm5 + movddup 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movddup 69, %xmm5 + movddup 0x45,%xmm5 + +// CHECK: movddup 32493, %xmm5 + movddup 0x7eed,%xmm5 + +// CHECK: movddup 3133065982, %xmm5 + movddup 0xbabecafe,%xmm5 + +// CHECK: movddup 305419896, %xmm5 + movddup 0x12345678,%xmm5 + +// CHECK: movddup %xmm5, %xmm5 + movddup %xmm5,%xmm5 + +// CHECK: movshdup 3735928559(%ebx,%ecx,8), %xmm5 + movshdup 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movshdup 69, %xmm5 + movshdup 0x45,%xmm5 + +// CHECK: movshdup 32493, %xmm5 + movshdup 0x7eed,%xmm5 + +// CHECK: movshdup 3133065982, %xmm5 + movshdup 0xbabecafe,%xmm5 + +// CHECK: movshdup 305419896, %xmm5 + movshdup 0x12345678,%xmm5 + +// CHECK: movshdup %xmm5, %xmm5 + movshdup %xmm5,%xmm5 + +// CHECK: movsldup 3735928559(%ebx,%ecx,8), %xmm5 + movsldup 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movsldup 69, %xmm5 + movsldup 0x45,%xmm5 + +// CHECK: movsldup 32493, %xmm5 + movsldup 0x7eed,%xmm5 + +// CHECK: movsldup 3133065982, %xmm5 + movsldup 0xbabecafe,%xmm5 + +// CHECK: movsldup 305419896, %xmm5 + movsldup 0x12345678,%xmm5 + +// CHECK: movsldup %xmm5, %xmm5 + movsldup %xmm5,%xmm5 + +// CHECK: mwait + mwait + +// CHECK: vmcall + vmcall + +// CHECK: vmclear 3735928559(%ebx,%ecx,8) + vmclear 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: vmclear 32493 + vmclear 0x7eed + +// CHECK: vmclear 3133065982 + vmclear 0xbabecafe + +// CHECK: vmclear 305419896 + vmclear 0x12345678 + +// CHECK: vmlaunch + vmlaunch + +// CHECK: vmresume + vmresume + +// CHECK: vmptrld 3735928559(%ebx,%ecx,8) + vmptrld 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: vmptrld 32493 + vmptrld 0x7eed + +// CHECK: vmptrld 3133065982 + vmptrld 0xbabecafe + +// CHECK: vmptrld 305419896 + vmptrld 0x12345678 + +// CHECK: vmptrst 3735928559(%ebx,%ecx,8) + vmptrst 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: vmptrst 32493 + vmptrst 0x7eed + +// CHECK: vmptrst 3133065982 + vmptrst 0xbabecafe + +// CHECK: vmptrst 305419896 + vmptrst 0x12345678 + +// CHECK: vmxoff + vmxoff + +// CHECK: vmxon 3735928559(%ebx,%ecx,8) + vmxon 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: vmxon 32493 + vmxon 0x7eed + +// CHECK: vmxon 3133065982 + vmxon 0xbabecafe + +// CHECK: vmxon 305419896 + vmxon 0x12345678 + +// CHECK: phaddw 3735928559(%ebx,%ecx,8), %mm3 + phaddw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: phaddw 69, %mm3 + phaddw 0x45,%mm3 + +// CHECK: phaddw 32493, %mm3 + phaddw 0x7eed,%mm3 + +// CHECK: phaddw 3133065982, %mm3 + phaddw 0xbabecafe,%mm3 + +// CHECK: phaddw 305419896, %mm3 + phaddw 0x12345678,%mm3 + +// CHECK: phaddw %mm3, %mm3 + phaddw %mm3,%mm3 + +// CHECK: phaddw 3735928559(%ebx,%ecx,8), %xmm5 + phaddw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: phaddw 69, %xmm5 + phaddw 0x45,%xmm5 + +// CHECK: phaddw 32493, %xmm5 + phaddw 0x7eed,%xmm5 + +// CHECK: phaddw 3133065982, %xmm5 + phaddw 0xbabecafe,%xmm5 + +// CHECK: phaddw 305419896, %xmm5 + phaddw 0x12345678,%xmm5 + +// CHECK: phaddw %xmm5, %xmm5 + phaddw %xmm5,%xmm5 + +// CHECK: phaddd 3735928559(%ebx,%ecx,8), %mm3 + phaddd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: phaddd 69, %mm3 + phaddd 0x45,%mm3 + +// CHECK: phaddd 32493, %mm3 + phaddd 0x7eed,%mm3 + +// CHECK: phaddd 3133065982, %mm3 + phaddd 0xbabecafe,%mm3 + +// CHECK: phaddd 305419896, %mm3 + phaddd 0x12345678,%mm3 + +// CHECK: phaddd %mm3, %mm3 + phaddd %mm3,%mm3 + +// CHECK: phaddd 3735928559(%ebx,%ecx,8), %xmm5 + phaddd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: phaddd 69, %xmm5 + phaddd 0x45,%xmm5 + +// CHECK: phaddd 32493, %xmm5 + phaddd 0x7eed,%xmm5 + +// CHECK: phaddd 3133065982, %xmm5 + phaddd 0xbabecafe,%xmm5 + +// CHECK: phaddd 305419896, %xmm5 + phaddd 0x12345678,%xmm5 + +// CHECK: phaddd %xmm5, %xmm5 + phaddd %xmm5,%xmm5 + +// CHECK: phaddsw 3735928559(%ebx,%ecx,8), %mm3 + phaddsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: phaddsw 69, %mm3 + phaddsw 0x45,%mm3 + +// CHECK: phaddsw 32493, %mm3 + phaddsw 0x7eed,%mm3 + +// CHECK: phaddsw 3133065982, %mm3 + phaddsw 0xbabecafe,%mm3 + +// CHECK: phaddsw 305419896, %mm3 + phaddsw 0x12345678,%mm3 + +// CHECK: phaddsw %mm3, %mm3 + phaddsw %mm3,%mm3 + +// CHECK: phaddsw 3735928559(%ebx,%ecx,8), %xmm5 + phaddsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: phaddsw 69, %xmm5 + phaddsw 0x45,%xmm5 + +// CHECK: phaddsw 32493, %xmm5 + phaddsw 0x7eed,%xmm5 + +// CHECK: phaddsw 3133065982, %xmm5 + phaddsw 0xbabecafe,%xmm5 + +// CHECK: phaddsw 305419896, %xmm5 + phaddsw 0x12345678,%xmm5 + +// CHECK: phaddsw %xmm5, %xmm5 + phaddsw %xmm5,%xmm5 + +// CHECK: phsubw 3735928559(%ebx,%ecx,8), %mm3 + phsubw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: phsubw 69, %mm3 + phsubw 0x45,%mm3 + +// CHECK: phsubw 32493, %mm3 + phsubw 0x7eed,%mm3 + +// CHECK: phsubw 3133065982, %mm3 + phsubw 0xbabecafe,%mm3 + +// CHECK: phsubw 305419896, %mm3 + phsubw 0x12345678,%mm3 + +// CHECK: phsubw %mm3, %mm3 + phsubw %mm3,%mm3 + +// CHECK: phsubw 3735928559(%ebx,%ecx,8), %xmm5 + phsubw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: phsubw 69, %xmm5 + phsubw 0x45,%xmm5 + +// CHECK: phsubw 32493, %xmm5 + phsubw 0x7eed,%xmm5 + +// CHECK: phsubw 3133065982, %xmm5 + phsubw 0xbabecafe,%xmm5 + +// CHECK: phsubw 305419896, %xmm5 + phsubw 0x12345678,%xmm5 + +// CHECK: phsubw %xmm5, %xmm5 + phsubw %xmm5,%xmm5 + +// CHECK: phsubd 3735928559(%ebx,%ecx,8), %mm3 + phsubd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: phsubd 69, %mm3 + phsubd 0x45,%mm3 + +// CHECK: phsubd 32493, %mm3 + phsubd 0x7eed,%mm3 + +// CHECK: phsubd 3133065982, %mm3 + phsubd 0xbabecafe,%mm3 + +// CHECK: phsubd 305419896, %mm3 + phsubd 0x12345678,%mm3 + +// CHECK: phsubd %mm3, %mm3 + phsubd %mm3,%mm3 + +// CHECK: phsubd 3735928559(%ebx,%ecx,8), %xmm5 + phsubd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: phsubd 69, %xmm5 + phsubd 0x45,%xmm5 + +// CHECK: phsubd 32493, %xmm5 + phsubd 0x7eed,%xmm5 + +// CHECK: phsubd 3133065982, %xmm5 + phsubd 0xbabecafe,%xmm5 + +// CHECK: phsubd 305419896, %xmm5 + phsubd 0x12345678,%xmm5 + +// CHECK: phsubd %xmm5, %xmm5 + phsubd %xmm5,%xmm5 + +// CHECK: phsubsw 3735928559(%ebx,%ecx,8), %mm3 + phsubsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: phsubsw 69, %mm3 + phsubsw 0x45,%mm3 + +// CHECK: phsubsw 32493, %mm3 + phsubsw 0x7eed,%mm3 + +// CHECK: phsubsw 3133065982, %mm3 + phsubsw 0xbabecafe,%mm3 + +// CHECK: phsubsw 305419896, %mm3 + phsubsw 0x12345678,%mm3 + +// CHECK: phsubsw %mm3, %mm3 + phsubsw %mm3,%mm3 + +// CHECK: phsubsw 3735928559(%ebx,%ecx,8), %xmm5 + phsubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: phsubsw 69, %xmm5 + phsubsw 0x45,%xmm5 + +// CHECK: phsubsw 32493, %xmm5 + phsubsw 0x7eed,%xmm5 + +// CHECK: phsubsw 3133065982, %xmm5 + phsubsw 0xbabecafe,%xmm5 + +// CHECK: phsubsw 305419896, %xmm5 + phsubsw 0x12345678,%xmm5 + +// CHECK: phsubsw %xmm5, %xmm5 + phsubsw %xmm5,%xmm5 + +// CHECK: pmaddubsw 3735928559(%ebx,%ecx,8), %mm3 + pmaddubsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmaddubsw 69, %mm3 + pmaddubsw 0x45,%mm3 + +// CHECK: pmaddubsw 32493, %mm3 + pmaddubsw 0x7eed,%mm3 + +// CHECK: pmaddubsw 3133065982, %mm3 + pmaddubsw 0xbabecafe,%mm3 + +// CHECK: pmaddubsw 305419896, %mm3 + pmaddubsw 0x12345678,%mm3 + +// CHECK: pmaddubsw %mm3, %mm3 + pmaddubsw %mm3,%mm3 + +// CHECK: pmaddubsw 3735928559(%ebx,%ecx,8), %xmm5 + pmaddubsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmaddubsw 69, %xmm5 + pmaddubsw 0x45,%xmm5 + +// CHECK: pmaddubsw 32493, %xmm5 + pmaddubsw 0x7eed,%xmm5 + +// CHECK: pmaddubsw 3133065982, %xmm5 + pmaddubsw 0xbabecafe,%xmm5 + +// CHECK: pmaddubsw 305419896, %xmm5 + pmaddubsw 0x12345678,%xmm5 + +// CHECK: pmaddubsw %xmm5, %xmm5 + pmaddubsw %xmm5,%xmm5 + +// CHECK: pmulhrsw 3735928559(%ebx,%ecx,8), %mm3 + pmulhrsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pmulhrsw 69, %mm3 + pmulhrsw 0x45,%mm3 + +// CHECK: pmulhrsw 32493, %mm3 + pmulhrsw 0x7eed,%mm3 + +// CHECK: pmulhrsw 3133065982, %mm3 + pmulhrsw 0xbabecafe,%mm3 + +// CHECK: pmulhrsw 305419896, %mm3 + pmulhrsw 0x12345678,%mm3 + +// CHECK: pmulhrsw %mm3, %mm3 + pmulhrsw %mm3,%mm3 + +// CHECK: pmulhrsw 3735928559(%ebx,%ecx,8), %xmm5 + pmulhrsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmulhrsw 69, %xmm5 + pmulhrsw 0x45,%xmm5 + +// CHECK: pmulhrsw 32493, %xmm5 + pmulhrsw 0x7eed,%xmm5 + +// CHECK: pmulhrsw 3133065982, %xmm5 + pmulhrsw 0xbabecafe,%xmm5 + +// CHECK: pmulhrsw 305419896, %xmm5 + pmulhrsw 0x12345678,%xmm5 + +// CHECK: pmulhrsw %xmm5, %xmm5 + pmulhrsw %xmm5,%xmm5 + +// CHECK: pshufb 3735928559(%ebx,%ecx,8), %mm3 + pshufb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pshufb 69, %mm3 + pshufb 0x45,%mm3 + +// CHECK: pshufb 32493, %mm3 + pshufb 0x7eed,%mm3 + +// CHECK: pshufb 3133065982, %mm3 + pshufb 0xbabecafe,%mm3 + +// CHECK: pshufb 305419896, %mm3 + pshufb 0x12345678,%mm3 + +// CHECK: pshufb %mm3, %mm3 + pshufb %mm3,%mm3 + +// CHECK: pshufb 3735928559(%ebx,%ecx,8), %xmm5 + pshufb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pshufb 69, %xmm5 + pshufb 0x45,%xmm5 + +// CHECK: pshufb 32493, %xmm5 + pshufb 0x7eed,%xmm5 + +// CHECK: pshufb 3133065982, %xmm5 + pshufb 0xbabecafe,%xmm5 + +// CHECK: pshufb 305419896, %xmm5 + pshufb 0x12345678,%xmm5 + +// CHECK: pshufb %xmm5, %xmm5 + pshufb %xmm5,%xmm5 + +// CHECK: psignb 3735928559(%ebx,%ecx,8), %mm3 + psignb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psignb 69, %mm3 + psignb 0x45,%mm3 + +// CHECK: psignb 32493, %mm3 + psignb 0x7eed,%mm3 + +// CHECK: psignb 3133065982, %mm3 + psignb 0xbabecafe,%mm3 + +// CHECK: psignb 305419896, %mm3 + psignb 0x12345678,%mm3 + +// CHECK: psignb %mm3, %mm3 + psignb %mm3,%mm3 + +// CHECK: psignb 3735928559(%ebx,%ecx,8), %xmm5 + psignb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psignb 69, %xmm5 + psignb 0x45,%xmm5 + +// CHECK: psignb 32493, %xmm5 + psignb 0x7eed,%xmm5 + +// CHECK: psignb 3133065982, %xmm5 + psignb 0xbabecafe,%xmm5 + +// CHECK: psignb 305419896, %xmm5 + psignb 0x12345678,%xmm5 + +// CHECK: psignb %xmm5, %xmm5 + psignb %xmm5,%xmm5 + +// CHECK: psignw 3735928559(%ebx,%ecx,8), %mm3 + psignw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psignw 69, %mm3 + psignw 0x45,%mm3 + +// CHECK: psignw 32493, %mm3 + psignw 0x7eed,%mm3 + +// CHECK: psignw 3133065982, %mm3 + psignw 0xbabecafe,%mm3 + +// CHECK: psignw 305419896, %mm3 + psignw 0x12345678,%mm3 + +// CHECK: psignw %mm3, %mm3 + psignw %mm3,%mm3 + +// CHECK: psignw 3735928559(%ebx,%ecx,8), %xmm5 + psignw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psignw 69, %xmm5 + psignw 0x45,%xmm5 + +// CHECK: psignw 32493, %xmm5 + psignw 0x7eed,%xmm5 + +// CHECK: psignw 3133065982, %xmm5 + psignw 0xbabecafe,%xmm5 + +// CHECK: psignw 305419896, %xmm5 + psignw 0x12345678,%xmm5 + +// CHECK: psignw %xmm5, %xmm5 + psignw %xmm5,%xmm5 + +// CHECK: psignd 3735928559(%ebx,%ecx,8), %mm3 + psignd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: psignd 69, %mm3 + psignd 0x45,%mm3 + +// CHECK: psignd 32493, %mm3 + psignd 0x7eed,%mm3 + +// CHECK: psignd 3133065982, %mm3 + psignd 0xbabecafe,%mm3 + +// CHECK: psignd 305419896, %mm3 + psignd 0x12345678,%mm3 + +// CHECK: psignd %mm3, %mm3 + psignd %mm3,%mm3 + +// CHECK: psignd 3735928559(%ebx,%ecx,8), %xmm5 + psignd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: psignd 69, %xmm5 + psignd 0x45,%xmm5 + +// CHECK: psignd 32493, %xmm5 + psignd 0x7eed,%xmm5 + +// CHECK: psignd 3133065982, %xmm5 + psignd 0xbabecafe,%xmm5 + +// CHECK: psignd 305419896, %xmm5 + psignd 0x12345678,%xmm5 + +// CHECK: psignd %xmm5, %xmm5 + psignd %xmm5,%xmm5 + +// CHECK: pabsb 3735928559(%ebx,%ecx,8), %mm3 + pabsb 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pabsb 69, %mm3 + pabsb 0x45,%mm3 + +// CHECK: pabsb 32493, %mm3 + pabsb 0x7eed,%mm3 + +// CHECK: pabsb 3133065982, %mm3 + pabsb 0xbabecafe,%mm3 + +// CHECK: pabsb 305419896, %mm3 + pabsb 0x12345678,%mm3 + +// CHECK: pabsb %mm3, %mm3 + pabsb %mm3,%mm3 + +// CHECK: pabsb 3735928559(%ebx,%ecx,8), %xmm5 + pabsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pabsb 69, %xmm5 + pabsb 0x45,%xmm5 + +// CHECK: pabsb 32493, %xmm5 + pabsb 0x7eed,%xmm5 + +// CHECK: pabsb 3133065982, %xmm5 + pabsb 0xbabecafe,%xmm5 + +// CHECK: pabsb 305419896, %xmm5 + pabsb 0x12345678,%xmm5 + +// CHECK: pabsb %xmm5, %xmm5 + pabsb %xmm5,%xmm5 + +// CHECK: pabsw 3735928559(%ebx,%ecx,8), %mm3 + pabsw 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pabsw 69, %mm3 + pabsw 0x45,%mm3 + +// CHECK: pabsw 32493, %mm3 + pabsw 0x7eed,%mm3 + +// CHECK: pabsw 3133065982, %mm3 + pabsw 0xbabecafe,%mm3 + +// CHECK: pabsw 305419896, %mm3 + pabsw 0x12345678,%mm3 + +// CHECK: pabsw %mm3, %mm3 + pabsw %mm3,%mm3 + +// CHECK: pabsw 3735928559(%ebx,%ecx,8), %xmm5 + pabsw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pabsw 69, %xmm5 + pabsw 0x45,%xmm5 + +// CHECK: pabsw 32493, %xmm5 + pabsw 0x7eed,%xmm5 + +// CHECK: pabsw 3133065982, %xmm5 + pabsw 0xbabecafe,%xmm5 + +// CHECK: pabsw 305419896, %xmm5 + pabsw 0x12345678,%xmm5 + +// CHECK: pabsw %xmm5, %xmm5 + pabsw %xmm5,%xmm5 + +// CHECK: pabsd 3735928559(%ebx,%ecx,8), %mm3 + pabsd 0xdeadbeef(%ebx,%ecx,8),%mm3 + +// CHECK: pabsd 69, %mm3 + pabsd 0x45,%mm3 + +// CHECK: pabsd 32493, %mm3 + pabsd 0x7eed,%mm3 + +// CHECK: pabsd 3133065982, %mm3 + pabsd 0xbabecafe,%mm3 + +// CHECK: pabsd 305419896, %mm3 + pabsd 0x12345678,%mm3 + +// CHECK: pabsd %mm3, %mm3 + pabsd %mm3,%mm3 + +// CHECK: pabsd 3735928559(%ebx,%ecx,8), %xmm5 + pabsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pabsd 69, %xmm5 + pabsd 0x45,%xmm5 + +// CHECK: pabsd 32493, %xmm5 + pabsd 0x7eed,%xmm5 + +// CHECK: pabsd 3133065982, %xmm5 + pabsd 0xbabecafe,%xmm5 + +// CHECK: pabsd 305419896, %xmm5 + pabsd 0x12345678,%xmm5 + +// CHECK: pabsd %xmm5, %xmm5 + pabsd %xmm5,%xmm5 + +// CHECK: femms + femms + +// CHECK: movntdqa 3735928559(%ebx,%ecx,8), %xmm5 + movntdqa 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: movntdqa 69, %xmm5 + movntdqa 0x45,%xmm5 + +// CHECK: movntdqa 32493, %xmm5 + movntdqa 0x7eed,%xmm5 + +// CHECK: movntdqa 3133065982, %xmm5 + movntdqa 0xbabecafe,%xmm5 + +// CHECK: movntdqa 305419896, %xmm5 + movntdqa 0x12345678,%xmm5 + +// CHECK: packusdw 3735928559(%ebx,%ecx,8), %xmm5 + packusdw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: packusdw 69, %xmm5 + packusdw 0x45,%xmm5 + +// CHECK: packusdw 32493, %xmm5 + packusdw 0x7eed,%xmm5 + +// CHECK: packusdw 3133065982, %xmm5 + packusdw 0xbabecafe,%xmm5 + +// CHECK: packusdw 305419896, %xmm5 + packusdw 0x12345678,%xmm5 + +// CHECK: packusdw %xmm5, %xmm5 + packusdw %xmm5,%xmm5 + +// CHECK: pcmpeqq 3735928559(%ebx,%ecx,8), %xmm5 + pcmpeqq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pcmpeqq 69, %xmm5 + pcmpeqq 0x45,%xmm5 + +// CHECK: pcmpeqq 32493, %xmm5 + pcmpeqq 0x7eed,%xmm5 + +// CHECK: pcmpeqq 3133065982, %xmm5 + pcmpeqq 0xbabecafe,%xmm5 + +// CHECK: pcmpeqq 305419896, %xmm5 + pcmpeqq 0x12345678,%xmm5 + +// CHECK: pcmpeqq %xmm5, %xmm5 + pcmpeqq %xmm5,%xmm5 + +// CHECK: phminposuw 3735928559(%ebx,%ecx,8), %xmm5 + phminposuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: phminposuw 69, %xmm5 + phminposuw 0x45,%xmm5 + +// CHECK: phminposuw 32493, %xmm5 + phminposuw 0x7eed,%xmm5 + +// CHECK: phminposuw 3133065982, %xmm5 + phminposuw 0xbabecafe,%xmm5 + +// CHECK: phminposuw 305419896, %xmm5 + phminposuw 0x12345678,%xmm5 + +// CHECK: phminposuw %xmm5, %xmm5 + phminposuw %xmm5,%xmm5 + +// CHECK: pmaxsb 3735928559(%ebx,%ecx,8), %xmm5 + pmaxsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmaxsb 69, %xmm5 + pmaxsb 0x45,%xmm5 + +// CHECK: pmaxsb 32493, %xmm5 + pmaxsb 0x7eed,%xmm5 + +// CHECK: pmaxsb 3133065982, %xmm5 + pmaxsb 0xbabecafe,%xmm5 + +// CHECK: pmaxsb 305419896, %xmm5 + pmaxsb 0x12345678,%xmm5 + +// CHECK: pmaxsb %xmm5, %xmm5 + pmaxsb %xmm5,%xmm5 + +// CHECK: pmaxsd 3735928559(%ebx,%ecx,8), %xmm5 + pmaxsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmaxsd 69, %xmm5 + pmaxsd 0x45,%xmm5 + +// CHECK: pmaxsd 32493, %xmm5 + pmaxsd 0x7eed,%xmm5 + +// CHECK: pmaxsd 3133065982, %xmm5 + pmaxsd 0xbabecafe,%xmm5 + +// CHECK: pmaxsd 305419896, %xmm5 + pmaxsd 0x12345678,%xmm5 + +// CHECK: pmaxsd %xmm5, %xmm5 + pmaxsd %xmm5,%xmm5 + +// CHECK: pmaxud 3735928559(%ebx,%ecx,8), %xmm5 + pmaxud 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmaxud 69, %xmm5 + pmaxud 0x45,%xmm5 + +// CHECK: pmaxud 32493, %xmm5 + pmaxud 0x7eed,%xmm5 + +// CHECK: pmaxud 3133065982, %xmm5 + pmaxud 0xbabecafe,%xmm5 + +// CHECK: pmaxud 305419896, %xmm5 + pmaxud 0x12345678,%xmm5 + +// CHECK: pmaxud %xmm5, %xmm5 + pmaxud %xmm5,%xmm5 + +// CHECK: pmaxuw 3735928559(%ebx,%ecx,8), %xmm5 + pmaxuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmaxuw 69, %xmm5 + pmaxuw 0x45,%xmm5 + +// CHECK: pmaxuw 32493, %xmm5 + pmaxuw 0x7eed,%xmm5 + +// CHECK: pmaxuw 3133065982, %xmm5 + pmaxuw 0xbabecafe,%xmm5 + +// CHECK: pmaxuw 305419896, %xmm5 + pmaxuw 0x12345678,%xmm5 + +// CHECK: pmaxuw %xmm5, %xmm5 + pmaxuw %xmm5,%xmm5 + +// CHECK: pminsb 3735928559(%ebx,%ecx,8), %xmm5 + pminsb 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pminsb 69, %xmm5 + pminsb 0x45,%xmm5 + +// CHECK: pminsb 32493, %xmm5 + pminsb 0x7eed,%xmm5 + +// CHECK: pminsb 3133065982, %xmm5 + pminsb 0xbabecafe,%xmm5 + +// CHECK: pminsb 305419896, %xmm5 + pminsb 0x12345678,%xmm5 + +// CHECK: pminsb %xmm5, %xmm5 + pminsb %xmm5,%xmm5 + +// CHECK: pminsd 3735928559(%ebx,%ecx,8), %xmm5 + pminsd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pminsd 69, %xmm5 + pminsd 0x45,%xmm5 + +// CHECK: pminsd 32493, %xmm5 + pminsd 0x7eed,%xmm5 + +// CHECK: pminsd 3133065982, %xmm5 + pminsd 0xbabecafe,%xmm5 + +// CHECK: pminsd 305419896, %xmm5 + pminsd 0x12345678,%xmm5 + +// CHECK: pminsd %xmm5, %xmm5 + pminsd %xmm5,%xmm5 + +// CHECK: pminud 3735928559(%ebx,%ecx,8), %xmm5 + pminud 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pminud 69, %xmm5 + pminud 0x45,%xmm5 + +// CHECK: pminud 32493, %xmm5 + pminud 0x7eed,%xmm5 + +// CHECK: pminud 3133065982, %xmm5 + pminud 0xbabecafe,%xmm5 + +// CHECK: pminud 305419896, %xmm5 + pminud 0x12345678,%xmm5 + +// CHECK: pminud %xmm5, %xmm5 + pminud %xmm5,%xmm5 + +// CHECK: pminuw 3735928559(%ebx,%ecx,8), %xmm5 + pminuw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pminuw 69, %xmm5 + pminuw 0x45,%xmm5 + +// CHECK: pminuw 32493, %xmm5 + pminuw 0x7eed,%xmm5 + +// CHECK: pminuw 3133065982, %xmm5 + pminuw 0xbabecafe,%xmm5 + +// CHECK: pminuw 305419896, %xmm5 + pminuw 0x12345678,%xmm5 + +// CHECK: pminuw %xmm5, %xmm5 + pminuw %xmm5,%xmm5 + +// CHECK: pmovsxbw 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxbw 69, %xmm5 + pmovsxbw 0x45,%xmm5 + +// CHECK: pmovsxbw 32493, %xmm5 + pmovsxbw 0x7eed,%xmm5 + +// CHECK: pmovsxbw 3133065982, %xmm5 + pmovsxbw 0xbabecafe,%xmm5 + +// CHECK: pmovsxbw 305419896, %xmm5 + pmovsxbw 0x12345678,%xmm5 + +// CHECK: pmovsxbw %xmm5, %xmm5 + pmovsxbw %xmm5,%xmm5 + +// CHECK: pmovsxbd 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxbd 69, %xmm5 + pmovsxbd 0x45,%xmm5 + +// CHECK: pmovsxbd 32493, %xmm5 + pmovsxbd 0x7eed,%xmm5 + +// CHECK: pmovsxbd 3133065982, %xmm5 + pmovsxbd 0xbabecafe,%xmm5 + +// CHECK: pmovsxbd 305419896, %xmm5 + pmovsxbd 0x12345678,%xmm5 + +// CHECK: pmovsxbd %xmm5, %xmm5 + pmovsxbd %xmm5,%xmm5 + +// CHECK: pmovsxbq 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxbq 69, %xmm5 + pmovsxbq 0x45,%xmm5 + +// CHECK: pmovsxbq 32493, %xmm5 + pmovsxbq 0x7eed,%xmm5 + +// CHECK: pmovsxbq 3133065982, %xmm5 + pmovsxbq 0xbabecafe,%xmm5 + +// CHECK: pmovsxbq 305419896, %xmm5 + pmovsxbq 0x12345678,%xmm5 + +// CHECK: pmovsxbq %xmm5, %xmm5 + pmovsxbq %xmm5,%xmm5 + +// CHECK: pmovsxwd 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxwd 69, %xmm5 + pmovsxwd 0x45,%xmm5 + +// CHECK: pmovsxwd 32493, %xmm5 + pmovsxwd 0x7eed,%xmm5 + +// CHECK: pmovsxwd 3133065982, %xmm5 + pmovsxwd 0xbabecafe,%xmm5 + +// CHECK: pmovsxwd 305419896, %xmm5 + pmovsxwd 0x12345678,%xmm5 + +// CHECK: pmovsxwd %xmm5, %xmm5 + pmovsxwd %xmm5,%xmm5 + +// CHECK: pmovsxwq 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxwq 69, %xmm5 + pmovsxwq 0x45,%xmm5 + +// CHECK: pmovsxwq 32493, %xmm5 + pmovsxwq 0x7eed,%xmm5 + +// CHECK: pmovsxwq 3133065982, %xmm5 + pmovsxwq 0xbabecafe,%xmm5 + +// CHECK: pmovsxwq 305419896, %xmm5 + pmovsxwq 0x12345678,%xmm5 + +// CHECK: pmovsxwq %xmm5, %xmm5 + pmovsxwq %xmm5,%xmm5 + +// CHECK: pmovsxdq 3735928559(%ebx,%ecx,8), %xmm5 + pmovsxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovsxdq 69, %xmm5 + pmovsxdq 0x45,%xmm5 + +// CHECK: pmovsxdq 32493, %xmm5 + pmovsxdq 0x7eed,%xmm5 + +// CHECK: pmovsxdq 3133065982, %xmm5 + pmovsxdq 0xbabecafe,%xmm5 + +// CHECK: pmovsxdq 305419896, %xmm5 + pmovsxdq 0x12345678,%xmm5 + +// CHECK: pmovsxdq %xmm5, %xmm5 + pmovsxdq %xmm5,%xmm5 + +// CHECK: pmovzxbw 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxbw 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxbw 69, %xmm5 + pmovzxbw 0x45,%xmm5 + +// CHECK: pmovzxbw 32493, %xmm5 + pmovzxbw 0x7eed,%xmm5 + +// CHECK: pmovzxbw 3133065982, %xmm5 + pmovzxbw 0xbabecafe,%xmm5 + +// CHECK: pmovzxbw 305419896, %xmm5 + pmovzxbw 0x12345678,%xmm5 + +// CHECK: pmovzxbw %xmm5, %xmm5 + pmovzxbw %xmm5,%xmm5 + +// CHECK: pmovzxbd 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxbd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxbd 69, %xmm5 + pmovzxbd 0x45,%xmm5 + +// CHECK: pmovzxbd 32493, %xmm5 + pmovzxbd 0x7eed,%xmm5 + +// CHECK: pmovzxbd 3133065982, %xmm5 + pmovzxbd 0xbabecafe,%xmm5 + +// CHECK: pmovzxbd 305419896, %xmm5 + pmovzxbd 0x12345678,%xmm5 + +// CHECK: pmovzxbd %xmm5, %xmm5 + pmovzxbd %xmm5,%xmm5 + +// CHECK: pmovzxbq 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxbq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxbq 69, %xmm5 + pmovzxbq 0x45,%xmm5 + +// CHECK: pmovzxbq 32493, %xmm5 + pmovzxbq 0x7eed,%xmm5 + +// CHECK: pmovzxbq 3133065982, %xmm5 + pmovzxbq 0xbabecafe,%xmm5 + +// CHECK: pmovzxbq 305419896, %xmm5 + pmovzxbq 0x12345678,%xmm5 + +// CHECK: pmovzxbq %xmm5, %xmm5 + pmovzxbq %xmm5,%xmm5 + +// CHECK: pmovzxwd 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxwd 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxwd 69, %xmm5 + pmovzxwd 0x45,%xmm5 + +// CHECK: pmovzxwd 32493, %xmm5 + pmovzxwd 0x7eed,%xmm5 + +// CHECK: pmovzxwd 3133065982, %xmm5 + pmovzxwd 0xbabecafe,%xmm5 + +// CHECK: pmovzxwd 305419896, %xmm5 + pmovzxwd 0x12345678,%xmm5 + +// CHECK: pmovzxwd %xmm5, %xmm5 + pmovzxwd %xmm5,%xmm5 + +// CHECK: pmovzxwq 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxwq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxwq 69, %xmm5 + pmovzxwq 0x45,%xmm5 + +// CHECK: pmovzxwq 32493, %xmm5 + pmovzxwq 0x7eed,%xmm5 + +// CHECK: pmovzxwq 3133065982, %xmm5 + pmovzxwq 0xbabecafe,%xmm5 + +// CHECK: pmovzxwq 305419896, %xmm5 + pmovzxwq 0x12345678,%xmm5 + +// CHECK: pmovzxwq %xmm5, %xmm5 + pmovzxwq %xmm5,%xmm5 + +// CHECK: pmovzxdq 3735928559(%ebx,%ecx,8), %xmm5 + pmovzxdq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmovzxdq 69, %xmm5 + pmovzxdq 0x45,%xmm5 + +// CHECK: pmovzxdq 32493, %xmm5 + pmovzxdq 0x7eed,%xmm5 + +// CHECK: pmovzxdq 3133065982, %xmm5 + pmovzxdq 0xbabecafe,%xmm5 + +// CHECK: pmovzxdq 305419896, %xmm5 + pmovzxdq 0x12345678,%xmm5 + +// CHECK: pmovzxdq %xmm5, %xmm5 + pmovzxdq %xmm5,%xmm5 + +// CHECK: pmuldq 3735928559(%ebx,%ecx,8), %xmm5 + pmuldq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmuldq 69, %xmm5 + pmuldq 0x45,%xmm5 + +// CHECK: pmuldq 32493, %xmm5 + pmuldq 0x7eed,%xmm5 + +// CHECK: pmuldq 3133065982, %xmm5 + pmuldq 0xbabecafe,%xmm5 + +// CHECK: pmuldq 305419896, %xmm5 + pmuldq 0x12345678,%xmm5 + +// CHECK: pmuldq %xmm5, %xmm5 + pmuldq %xmm5,%xmm5 + +// CHECK: pmulld 3735928559(%ebx,%ecx,8), %xmm5 + pmulld 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pmulld 69, %xmm5 + pmulld 0x45,%xmm5 + +// CHECK: pmulld 32493, %xmm5 + pmulld 0x7eed,%xmm5 + +// CHECK: pmulld 3133065982, %xmm5 + pmulld 0xbabecafe,%xmm5 + +// CHECK: pmulld 305419896, %xmm5 + pmulld 0x12345678,%xmm5 + +// CHECK: pmulld %xmm5, %xmm5 + pmulld %xmm5,%xmm5 + +// CHECK: ptest 3735928559(%ebx,%ecx,8), %xmm5 + ptest 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: ptest 69, %xmm5 + ptest 0x45,%xmm5 + +// CHECK: ptest 32493, %xmm5 + ptest 0x7eed,%xmm5 + +// CHECK: ptest 3133065982, %xmm5 + ptest 0xbabecafe,%xmm5 + +// CHECK: ptest 305419896, %xmm5 + ptest 0x12345678,%xmm5 + +// CHECK: ptest %xmm5, %xmm5 + ptest %xmm5,%xmm5 + +// CHECK: crc32b %bl, %eax + crc32b %bl, %eax + +// CHECK: crc32b 4(%ebx), %eax + crc32b 4(%ebx), %eax + +// CHECK: crc32w %bx, %eax + crc32w %bx, %eax + +// CHECK: crc32w 4(%ebx), %eax + crc32w 4(%ebx), %eax + +// CHECK: crc32l %ebx, %eax + crc32l %ebx, %eax + +// CHECK: crc32l 4(%ebx), %eax + crc32l 4(%ebx), %eax + +// CHECK: crc32l 3735928559(%ebx,%ecx,8), %ecx + crc32l 0xdeadbeef(%ebx,%ecx,8),%ecx + +// CHECK: crc32l 69, %ecx + crc32l 0x45,%ecx + +// CHECK: crc32l 32493, %ecx + crc32l 0x7eed,%ecx + +// CHECK: crc32l 3133065982, %ecx + crc32l 0xbabecafe,%ecx + +// CHECK: crc32l %ecx, %ecx + crc32l %ecx,%ecx + +// CHECK: pcmpgtq 3735928559(%ebx,%ecx,8), %xmm5 + pcmpgtq 0xdeadbeef(%ebx,%ecx,8),%xmm5 + +// CHECK: pcmpgtq 69, %xmm5 + pcmpgtq 0x45,%xmm5 + +// CHECK: pcmpgtq 32493, %xmm5 + pcmpgtq 0x7eed,%xmm5 + +// CHECK: pcmpgtq 3133065982, %xmm5 + pcmpgtq 0xbabecafe,%xmm5 + +// CHECK: pcmpgtq 305419896, %xmm5 + pcmpgtq 0x12345678,%xmm5 + +// CHECK: pcmpgtq %xmm5, %xmm5 + pcmpgtq %xmm5,%xmm5 + +// CHECK: aesimc %xmm0, %xmm1 + aesimc %xmm0,%xmm1 + +// CHECK: aesimc (%eax), %xmm1 + aesimc (%eax),%xmm1 + +// CHECK: aesenc %xmm1, %xmm2 + aesenc %xmm1,%xmm2 + +// CHECK: aesenc 4(%ebx), %xmm2 + aesenc 4(%ebx),%xmm2 + +// CHECK: aesenclast %xmm3, %xmm4 + aesenclast %xmm3,%xmm4 + +// CHECK: aesenclast 4(%edx,%edi), %xmm4 + aesenclast 4(%edx,%edi),%xmm4 + +// CHECK: aesdec %xmm5, %xmm6 + aesdec %xmm5,%xmm6 + +// CHECK: aesdec 4(%ecx,%eax,8), %xmm6 + aesdec 4(%ecx,%eax,8),%xmm6 + +// CHECK: aesdeclast %xmm7, %xmm0 + aesdeclast %xmm7,%xmm0 + +// CHECK: aesdeclast 3405691582, %xmm0 + aesdeclast 0xcafebabe,%xmm0 + +// CHECK: aeskeygenassist $125, %xmm1, %xmm2 + aeskeygenassist $125, %xmm1, %xmm2 + +// CHECK: aeskeygenassist $125, (%edx,%eax,4), %xmm2 + aeskeygenassist $125, (%edx,%eax,4), %xmm2 diff --git a/test/MC/AsmParser/X86/x86_32-fma3-encoding.s b/test/MC/X86/x86-32-fma3.s index db7efecfb51b..db7efecfb51b 100644 --- a/test/MC/AsmParser/X86/x86_32-fma3-encoding.s +++ b/test/MC/X86/x86-32-fma3.s diff --git a/test/MC/AsmParser/X86/x86_32-new-encoder.s b/test/MC/X86/x86-32.s index e3aa1887ef81..de6b96389ead 100644 --- a/test/MC/AsmParser/X86/x86_32-new-encoder.s +++ b/test/MC/X86/x86-32.s @@ -15,9 +15,15 @@ monitor // CHECK: monitor // CHECK: encoding: [0x0f,0x01,0xc8] + monitor %eax, %ecx, %edx +// CHECK: monitor +// CHECK: encoding: [0x0f,0x01,0xc8] mwait // CHECK: mwait // CHECK: encoding: [0x0f,0x01,0xc9] + mwait %eax, %ecx +// CHECK: mwait +// CHECK: encoding: [0x0f,0x01,0xc9] vmcall // CHECK: vmcall @@ -57,6 +63,11 @@ rdtscp // CHECK: shrl %eax # encoding: [0xd1,0xe8] shrl $1, %eax +// CHECK: shll %eax # encoding: [0xd1,0xe0] + sall $1, %eax +// CHECK: shll %eax # encoding: [0xd1,0xe0] + sal $1, %eax + // moffset forms of moves, rdar://7947184 movb 0, %al // CHECK: movb 0, %al # encoding: [0xa0,A,A,A,A] movw 0, %ax // CHECK: movw 0, %ax # encoding: [0x66,0xa1,A,A,A,A] @@ -107,6 +118,10 @@ retl // CHECK: encoding: [0x0f,0x42,0xd0] cmovbl %eax,%edx +// CHECK: cmovbw %bx, %bx +cmovnae %bx,%bx + + // CHECK: cmovbel %eax, %edx // CHECK: encoding: [0x0f,0x46,0xd0] cmovbel %eax,%edx @@ -423,3 +438,373 @@ retl // CHECK: lcalll $2, $4660 // CHECK: encoding: [0x9a,0x34,0x12,0x00,0x00,0x02,0x00] lcalll $0x2, $0x1234 + + +// rdar://8061602 +L1: + jcxz L1 +// CHECK: jcxz L1 +// CHECK: encoding: [0x67,0xe3,A] + jecxz L1 +// CHECK: jecxz L1 +// CHECK: encoding: [0xe3,A] + +// rdar://8403974 +iret +// CHECK: iretl +// CHECK: encoding: [0xcf] +iretw +// CHECK: iretw +// CHECK: encoding: [0x66,0xcf] +iretl +// CHECK: iretl +// CHECK: encoding: [0xcf] + +// rdar://8403907 +sysret +// CHECK: sysretl +// CHECK: encoding: [0x0f,0x07] +sysretl +// CHECK: sysretl +// CHECK: encoding: [0x0f,0x07] + +// rdar://8018260 +testl %ecx, -24(%ebp) +// CHECK: testl -24(%ebp), %ecx +testl -24(%ebp), %ecx +// CHECK: testl -24(%ebp), %ecx + + +// rdar://8407242 +push %cs +// CHECK: pushl %cs +// CHECK: encoding: [0x0e] +push %ds +// CHECK: pushl %ds +// CHECK: encoding: [0x1e] +push %ss +// CHECK: pushl %ss +// CHECK: encoding: [0x16] +push %es +// CHECK: pushl %es +// CHECK: encoding: [0x06] +push %fs +// CHECK: pushl %fs +// CHECK: encoding: [0x0f,0xa0] +push %gs +// CHECK: pushl %gs +// CHECK: encoding: [0x0f,0xa8] + +pushw %cs +// CHECK: pushw %cs +// CHECK: encoding: [0x66,0x0e] +pushw %ds +// CHECK: pushw %ds +// CHECK: encoding: [0x66,0x1e] +pushw %ss +// CHECK: pushw %ss +// CHECK: encoding: [0x66,0x16] +pushw %es +// CHECK: pushw %es +// CHECK: encoding: [0x66,0x06] +pushw %fs +// CHECK: pushw %fs +// CHECK: encoding: [0x66,0x0f,0xa0] +pushw %gs +// CHECK: pushw %gs +// CHECK: encoding: [0x66,0x0f,0xa8] + +pop %ss +// CHECK: popl %ss +// CHECK: encoding: [0x17] +pop %ds +// CHECK: popl %ds +// CHECK: encoding: [0x1f] +pop %es +// CHECK: popl %es +// CHECK: encoding: [0x07] + +// rdar://8408129 +pushfd +// CHECK: pushfl +popfd +// CHECK: popfl +pushfl +// CHECK: pushfl +popfl +// CHECK: popfl + + +// rdar://8416805 + setc %bl + setnae %bl + setnb %bl + setnc %bl + setna %bl + setnbe %bl + setpe %bl + setpo %bl + setnge %bl + setnl %bl + setng %bl + setnle %bl + +// PR8686 + setneb %cl // CHECK: setne %cl + setcb %bl // CHECK: setb %bl + setnaeb %bl // CHECK: setb %bl + + +// CHECK: lcalll $31438, $31438 +// CHECK: lcalll $31438, $31438 +// CHECK: ljmpl $31438, $31438 +// CHECK: ljmpl $31438, $31438 + +calll $0x7ace,$0x7ace +lcalll $0x7ace,$0x7ace +jmpl $0x7ace,$0x7ace +ljmpl $0x7ace,$0x7ace + +// CHECK: lcalll $31438, $31438 +// CHECK: lcalll $31438, $31438 +// CHECK: ljmpl $31438, $31438 +// CHECK: ljmpl $31438, $31438 + +call $0x7ace,$0x7ace +lcall $0x7ace,$0x7ace +jmp $0x7ace,$0x7ace +ljmp $0x7ace,$0x7ace + +// rdar://8456370 +// CHECK: calll a + calll a + +// CHECK: incb %al # encoding: [0xfe,0xc0] + incb %al + +// CHECK: incw %ax # encoding: [0x66,0x40] + incw %ax + +// CHECK: incl %eax # encoding: [0x40] + incl %eax + +// CHECK: decb %al # encoding: [0xfe,0xc8] + decb %al + +// CHECK: decw %ax # encoding: [0x66,0x48] + decw %ax + +// CHECK: decl %eax # encoding: [0x48] + decl %eax + +// CHECK: pshufw $14, %mm4, %mm0 # encoding: [0x0f,0x70,0xc4,0x0e] +pshufw $14, %mm4, %mm0 + +// CHECK: pshufw $90, %mm4, %mm0 # encoding: [0x0f,0x70,0xc4,0x5a] +// PR8288 +pshufw $90, %mm4, %mm0 + +// rdar://8416805 +// CHECK: aaa +// CHECK: encoding: [0x37] + aaa + +// CHECK: aad $1 +// CHECK: encoding: [0xd5,0x01] + aad $1 + +// CHECK: aad $10 +// CHECK: encoding: [0xd5,0x0a] + aad $0xA + +// CHECK: aad $10 +// CHECK: encoding: [0xd5,0x0a] + aad + +// CHECK: aam $2 +// CHECK: encoding: [0xd4,0x02] + aam $2 + +// CHECK: aam $10 +// CHECK: encoding: [0xd4,0x0a] + aam $0xA + +// CHECK: aam $10 +// CHECK: encoding: [0xd4,0x0a] + aam + +// CHECK: aas +// CHECK: encoding: [0x3f] + aas + +// CHECK: daa +// CHECK: encoding: [0x27] + daa + +// CHECK: das +// CHECK: encoding: [0x2f] + das + +// CHECK: retw $31438 +// CHECK: encoding: [0x66,0xc2,0xce,0x7a] + retw $0x7ace + +// CHECK: lretw $31438 +// CHECK: encoding: [0x66,0xca,0xce,0x7a] + lretw $0x7ace + +// CHECK: bound 2(%eax), %bx +// CHECK: encoding: [0x66,0x62,0x58,0x02] + bound 2(%eax),%bx + +// CHECK: bound 4(%ebx), %ecx +// CHECK: encoding: [0x62,0x4b,0x04] + bound 4(%ebx),%ecx + +// CHECK: arpl %bx, %bx +// CHECK: encoding: [0x63,0xdb] + arpl %bx,%bx + +// CHECK: arpl %bx, 6(%ecx) +// CHECK: encoding: [0x63,0x59,0x06] + arpl %bx,6(%ecx) + +// CHECK: lgdtw 4(%eax) +// CHECK: encoding: [0x66,0x0f,0x01,0x50,0x04] + lgdtw 4(%eax) + +// CHECK: lgdt 4(%eax) +// CHECK: encoding: [0x0f,0x01,0x50,0x04] + lgdt 4(%eax) + +// CHECK: lgdt 4(%eax) +// CHECK: encoding: [0x0f,0x01,0x50,0x04] + lgdtl 4(%eax) + +// CHECK: lidtw 4(%eax) +// CHECK: encoding: [0x66,0x0f,0x01,0x58,0x04] + lidtw 4(%eax) + +// CHECK: lidt 4(%eax) +// CHECK: encoding: [0x0f,0x01,0x58,0x04] + lidt 4(%eax) + +// CHECK: lidt 4(%eax) +// CHECK: encoding: [0x0f,0x01,0x58,0x04] + lidtl 4(%eax) + +// CHECK: sgdtw 4(%eax) +// CHECK: encoding: [0x66,0x0f,0x01,0x40,0x04] + sgdtw 4(%eax) + +// CHECK: sgdt 4(%eax) +// CHECK: encoding: [0x0f,0x01,0x40,0x04] + sgdt 4(%eax) + +// CHECK: sgdt 4(%eax) +// CHECK: encoding: [0x0f,0x01,0x40,0x04] + sgdtl 4(%eax) + +// CHECK: sidtw 4(%eax) +// CHECK: encoding: [0x66,0x0f,0x01,0x48,0x04] + sidtw 4(%eax) + +// CHECK: sidt 4(%eax) +// CHECK: encoding: [0x0f,0x01,0x48,0x04] + sidt 4(%eax) + +// CHECK: sidt 4(%eax) +// CHECK: encoding: [0x0f,0x01,0x48,0x04] + sidtl 4(%eax) + +// CHECK: fcompi %st(2) +// CHECK: encoding: [0xdf,0xf2] + fcompi %st(2), %st + +// CHECK: fcompi %st(2) +// CHECK: encoding: [0xdf,0xf2] + fcompi %st(2) + +// CHECK: fcompi %st(1) +// CHECK: encoding: [0xdf,0xf1] + fcompi + +// CHECK: fucompi %st(2) +// CHECK: encoding: [0xdf,0xea] + fucompi %st(2),%st + +// CHECK: fucompi %st(2) +// CHECK: encoding: [0xdf,0xea] + fucompi %st(2) + +// CHECK: fucompi %st(1) +// CHECK: encoding: [0xdf,0xe9] + fucompi + +// CHECK: fldcw 32493 +// CHECK: encoding: [0xd9,0x2d,0xed,0x7e,0x00,0x00] + fldcww 0x7eed + +// CHECK: fldcw 32493 +// CHECK: encoding: [0xd9,0x2d,0xed,0x7e,0x00,0x00] + fldcw 0x7eed + +// CHECK: fnstcw 32493 +// CHECK: encoding: [0xd9,0x3d,0xed,0x7e,0x00,0x00] + fnstcww 0x7eed + +// CHECK: fnstcw 32493 +// CHECK: encoding: [0xd9,0x3d,0xed,0x7e,0x00,0x00] + fnstcw 0x7eed + +// CHECK: wait +// CHECK: encoding: [0x9b] + fstcww 0x7eed + +// CHECK: wait +// CHECK: encoding: [0x9b] + fstcw 0x7eed + +// CHECK: fnstsw 32493 +// CHECK: encoding: [0xdd,0x3d,0xed,0x7e,0x00,0x00] + fnstsww 0x7eed + +// CHECK: fnstsw 32493 +// CHECK: encoding: [0xdd,0x3d,0xed,0x7e,0x00,0x00] + fnstsw 0x7eed + +// CHECK: wait +// CHECK: encoding: [0x9b] + fstsww 0x7eed + +// CHECK: wait +// CHECK: encoding: [0x9b] + fstsw 0x7eed + +// CHECK: verr 32493 +// CHECK: encoding: [0x0f,0x00,0x25,0xed,0x7e,0x00,0x00] + verrw 0x7eed + +// CHECK: verr 32493 +// CHECK: encoding: [0x0f,0x00,0x25,0xed,0x7e,0x00,0x00] + verr 0x7eed + +// CHECK: wait +// CHECK: encoding: [0x9b] + fclex + +// CHECK: fnclex +// CHECK: encoding: [0xdb,0xe2] + fnclex + +// CHECK: ud2 +// CHECK: encoding: [0x0f,0x0b] + ud2 + +// CHECK: ud2 +// CHECK: encoding: [0x0f,0x0b] + ud2a + +// CHECK: ud2b +// CHECK: encoding: [0x0f,0xb9] + ud2b diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s new file mode 100644 index 000000000000..c8b6414d59a6 --- /dev/null +++ b/test/MC/X86/x86-64.s @@ -0,0 +1,944 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -show-encoding %s > %t 2> %t.err +// RUN: FileCheck < %t %s +// RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s + + monitor +// CHECK: monitor +// CHECK: encoding: [0x0f,0x01,0xc8] + monitor %rax, %rcx, %rdx +// CHECK: monitor +// CHECK: encoding: [0x0f,0x01,0xc8] + mwait +// CHECK: mwait +// CHECK: encoding: [0x0f,0x01,0xc9] + mwait %rax, %rcx +// CHECK: mwait +// CHECK: encoding: [0x0f,0x01,0xc9] + +// Suffix inference: + +// CHECK: addl $0, %eax + add $0, %eax +// CHECK: addb $255, %al + add $0xFF, %al +// CHECK: orq %rax, %rdx + or %rax, %rdx +// CHECK: shlq $3, %rax + shl $3, %rax + + +// CHECK: subb %al, %al + subb %al, %al + +// CHECK: addl $24, %eax + addl $24, %eax + +// CHECK: movl %eax, 10(%ebp) + movl %eax, 10(%ebp) +// CHECK: movl %eax, 10(%ebp,%ebx) + movl %eax, 10(%ebp, %ebx) +// CHECK: movl %eax, 10(%ebp,%ebx,4) + movl %eax, 10(%ebp, %ebx, 4) +// CHECK: movl %eax, 10(,%ebx,4) + movl %eax, 10(, %ebx, 4) + +// CHECK: movl 0, %eax + movl 0, %eax +// CHECK: movl $0, %eax + movl $0, %eax + +// CHECK: ret + ret + +// FIXME: Check that this matches SUB32ri8 +// CHECK: subl $1, %eax + subl $1, %eax + +// FIXME: Check that this matches SUB32ri8 +// CHECK: subl $-1, %eax + subl $-1, %eax + +// FIXME: Check that this matches SUB32ri +// CHECK: subl $256, %eax + subl $256, %eax + +// FIXME: Check that this matches XOR64ri8 +// CHECK: xorq $1, %rax + xorq $1, %rax + +// FIXME: Check that this matches XOR64ri32 +// CHECK: xorq $256, %rax + xorq $256, %rax + +// FIXME: Check that this matches SUB8rr +// CHECK: subb %al, %bl + subb %al, %bl + +// FIXME: Check that this matches SUB16rr +// CHECK: subw %ax, %bx + subw %ax, %bx + +// FIXME: Check that this matches SUB32rr +// CHECK: subl %eax, %ebx + subl %eax, %ebx + +// FIXME: Check that this matches the correct instruction. +// CHECK: callq *%rax + call *%rax + +// FIXME: Check that this matches the correct instruction. +// CHECK: shldl %cl, %eax, %ebx + shldl %cl, %eax, %ebx + +// CHECK: shll $2, %eax + shll $2, %eax + +// CHECK: shll $2, %eax + sall $2, %eax + +// CHECK: rep +// CHECK: insb + rep;insb + +// CHECK: rep +// CHECK: outsb + rep;outsb + +// CHECK: rep +// CHECK: movsb + rep;movsb + + +// rdar://8470918 +smovb // CHECK: movsb +smovw // CHECK: movsw +smovl // CHECK: movsl +smovq // CHECK: movsq + +// rdar://8456361 +// CHECK: rep +// CHECK: movsl + rep movsd + +// CHECK: rep +// CHECK: lodsb + rep;lodsb + +// CHECK: rep +// CHECK: stosb + rep;stosb + +// NOTE: repz and repe have the same opcode as rep +// CHECK: rep +// CHECK: cmpsb + repz;cmpsb + +// NOTE: repnz has the same opcode as repne +// CHECK: repne +// CHECK: cmpsb + repnz;cmpsb + +// NOTE: repe and repz have the same opcode as rep +// CHECK: rep +// CHECK: scasb + repe;scasb + +// CHECK: repne +// CHECK: scasb + repne;scasb + +// CHECK: lock +// CHECK: cmpxchgb %al, (%ebx) + lock;cmpxchgb %al, 0(%ebx) + +// CHECK: cs +// CHECK: movb (%eax), %al + cs;movb 0(%eax), %al + +// CHECK: ss +// CHECK: movb (%eax), %al + ss;movb 0(%eax), %al + +// CHECK: ds +// CHECK: movb (%eax), %al + ds;movb 0(%eax), %al + +// CHECK: es +// CHECK: movb (%eax), %al + es;movb 0(%eax), %al + +// CHECK: fs +// CHECK: movb (%eax), %al + fs;movb 0(%eax), %al + +// CHECK: gs +// CHECK: movb (%eax), %al + gs;movb 0(%eax), %al + +// CHECK: fadd %st(0) +// CHECK: fadd %st(1) +// CHECK: fadd %st(7) + +fadd %st(0) +fadd %st(1) +fadd %st(7) + +// CHECK: leal 0, %eax + leal 0, %eax + +// rdar://7986634 - Insensitivity on opcodes. +// CHECK: int3 +INT3 + + +// Allow scale factor without index register. +// CHECK: movaps %xmm3, (%esi) +// CHECK-STDERR: warning: scale factor without index register is ignored +movaps %xmm3, (%esi, 2) + +// CHECK: imull $12, %eax, %eax +imul $12, %eax + +// CHECK: imull %ecx, %eax +imull %ecx, %eax + + +// rdar://8208481 +// CHECK: outb %al, $161 +outb %al, $161 +// CHECK: outw %ax, $128 +outw %ax, $128 +// CHECK: inb $161, %al +inb $161, %al + +// rdar://8017621 +// CHECK: pushq $1 +push $1 + +// rdar://8017530 +// CHECK: sldtw 4 +sldt 4 + +// rdar://8208499 +// CHECK: cmovnew %bx, %ax +cmovnz %bx, %ax +// CHECK: cmovneq %rbx, %rax +cmovnzq %rbx, %rax + + +// rdar://8407928 +// CHECK: inb $127, %al +// CHECK: inw %dx, %ax +// CHECK: outb %al, $127 +// CHECK: outw %ax, %dx +// CHECK: inl %dx, %eax +inb $0x7f +inw %dx +outb $0x7f +outw %dx +inl %dx + + +// PR8114 +// CHECK: outb %al, %dx +// CHECK: outw %ax, %dx +// CHECK: outl %eax, %dx + +out %al, (%dx) +out %ax, (%dx) +outl %eax, (%dx) + + +// rdar://8431422 + +// CHECK: fxch %st(1) +// CHECK: fucom %st(1) +// CHECK: fucomp %st(1) +// CHECK: faddp %st(1) +// CHECK: faddp %st(0) +// CHECK: fsubp %st(1) +// CHECK: fsubrp %st(1) +// CHECK: fmulp %st(1) +// CHECK: fdivp %st(1) +// CHECK: fdivrp %st(1) + +fxch +fucom +fucomp +faddp +faddp %st +fsubp +fsubrp +fmulp +fdivp +fdivrp + +// CHECK: fcomi %st(1) +// CHECK: fcomi %st(2) +// CHECK: fucomi %st(1) +// CHECK: fucomi %st(2) +// CHECK: fucomi %st(2) + +fcomi +fcomi %st(2) +fucomi +fucomi %st(2) +fucomi %st(2), %st + +// CHECK: fnstsw %ax +// CHECK: fnstsw %ax +// CHECK: fnstsw %ax +// CHECK: fnstsw %ax + +fnstsw +fnstsw %ax +fnstsw %eax +fnstsw %al + +// rdar://8431880 +// CHECK: rclb %bl +// CHECK: rcll 3735928559(%ebx,%ecx,8) +// CHECK: rcrl %ecx +// CHECK: rcrl 305419896 +rcl %bl +rcll 0xdeadbeef(%ebx,%ecx,8) +rcr %ecx +rcrl 0x12345678 + +rclb %bl // CHECK: rclb %bl # encoding: [0xd0,0xd3] +rclb $1, %bl // CHECK: rclb %bl # encoding: [0xd0,0xd3] +rclb $2, %bl // CHECK: rclb $2, %bl # encoding: [0xc0,0xd3,0x02] + +// rdar://8418316 +// CHECK: shldw $1, %bx, %bx +// CHECK: shldw $1, %bx, %bx +// CHECK: shrdw $1, %bx, %bx +// CHECK: shrdw $1, %bx, %bx + +shld %bx,%bx +shld $1, %bx,%bx +shrd %bx,%bx +shrd $1, %bx,%bx + +// CHECK: sldtl %ecx +// CHECK: encoding: [0x0f,0x00,0xc1] +// CHECK: sldtw %cx +// CHECK: encoding: [0x66,0x0f,0x00,0xc1] + +sldt %ecx +sldt %cx + +// CHECK: lcalll *3135175374 +// CHECK: ljmpl *3135175374 +lcall *0xbadeface +ljmp *0xbadeface + + +// rdar://8444631 +// CHECK: enter $31438, $0 +// CHECK: encoding: [0xc8,0xce,0x7a,0x00] +// CHECK: enter $31438, $1 +// CHECK: encoding: [0xc8,0xce,0x7a,0x01] +// CHECK: enter $31438, $127 +// CHECK: encoding: [0xc8,0xce,0x7a,0x7f] +enter $0x7ace,$0 +enter $0x7ace,$1 +enter $0x7ace,$0x7f + + +// rdar://8456364 +// CHECK: movw %cs, %ax +mov %CS, %ax + +// rdar://8456391 +fcmovb %st(1), %st(0) // CHECK: fcmovb %st(1), %st(0) +fcmove %st(1), %st(0) // CHECK: fcmove %st(1), %st(0) +fcmovbe %st(1), %st(0) // CHECK: fcmovbe %st(1), %st(0) +fcmovu %st(1), %st(0) // CHECK: fcmovu %st(1), %st(0) + +fcmovnb %st(1), %st(0) // CHECK: fcmovnb %st(1), %st(0) +fcmovne %st(1), %st(0) // CHECK: fcmovne %st(1), %st(0) +fcmovnbe %st(1), %st(0) // CHECK: fcmovnbe %st(1), %st(0) +fcmovnu %st(1), %st(0) // CHECK: fcmovnu %st(1), %st(0) + +fcmovnae %st(1), %st(0) // CHECK: fcmovb %st(1), %st(0) +fcmovna %st(1), %st(0) // CHECK: fcmovbe %st(1), %st(0) + +fcmovae %st(1), %st(0) // CHECK: fcmovnb %st(1), %st(0) +fcmova %st(1), %st(0) // CHECK: fcmovnbe %st(1), %st(0) + +// rdar://8456417 +.byte 88 + 1 & 15 // CHECK: .byte 9 + +// rdar://8456412 +mov %rdx, %cr0 +// CHECK: movq %rdx, %cr0 +// CHECK: encoding: [0x0f,0x22,0xc2] +mov %rdx, %cr4 +// CHECK: movq %rdx, %cr4 +// CHECK: encoding: [0x0f,0x22,0xe2] +mov %rdx, %cr8 +// CHECK: movq %rdx, %cr8 +// CHECK: encoding: [0x44,0x0f,0x22,0xc2] +mov %rdx, %cr15 +// CHECK: movq %rdx, %cr15 +// CHECK: encoding: [0x44,0x0f,0x22,0xfa] + +// rdar://8456371 - Handle commutable instructions written backward. +// CHECK: faddp %st(1) +// CHECK: fmulp %st(2) +faddp %st, %st(1) +fmulp %st, %st(2) + +// rdar://8468087 - Encode these accurately, they are not synonyms. +// CHECK: fmul %st(0), %st(1) +// CHECK: encoding: [0xdc,0xc9] +// CHECK: fmul %st(1) +// CHECK: encoding: [0xd8,0xc9] +fmul %st, %st(1) +fmul %st(1), %st + +// CHECK: fadd %st(0), %st(1) +// CHECK: encoding: [0xdc,0xc1] +// CHECK: fadd %st(1) +// CHECK: encoding: [0xd8,0xc1] +fadd %st, %st(1) +fadd %st(1), %st + + +// rdar://8416805 +// CHECK: xorb %al, %al +// CHECK: encoding: [0x30,0xc0] +// CHECK: xorw %di, %di +// CHECK: encoding: [0x66,0x31,0xff] +// CHECK: xorl %esi, %esi +// CHECK: encoding: [0x31,0xf6] +// CHECK: xorq %rsi, %rsi +// CHECK: encoding: [0x48,0x31,0xf6] +clrb %al +clr %di +clr %esi +clr %rsi + +// rdar://8456378 +cltq // CHECK: cltq +cdqe // CHECK: cltq +cwde // CHECK: cwtl +cwtl // CHECK: cwtl + +// rdar://8416805 +cbw // CHECK: cbtw +cwd // CHECK: cwtd +cdq // CHECK: cltd + +// rdar://8456378 and PR7557 - fstsw +fstsw %ax +// CHECK: wait +// CHECK: fnstsw %ax +fstsw (%rax) +// CHECK: wait +// CHECK: fnstsw (%rax) + +// PR8259 +fstcw (%rsp) +// CHECK: wait +// CHECK: fnstcw (%rsp) + +// PR8259 +fstcw (%rsp) +// CHECK: wait +// CHECK: fnstcw (%rsp) + +// PR8258 +finit +// CHECK: wait +// CHECK: fninit + +fsave 32493 +// CHECK: wait +// CHECK: fnsave 32493 + + +// rdar://8456382 - cvtsd2si support. +cvtsd2si %xmm1, %rax +// CHECK: cvtsd2siq %xmm1, %rax +// CHECK: encoding: [0xf2,0x48,0x0f,0x2d,0xc1] +cvtsd2si %xmm1, %eax +// CHECK: cvtsd2sil %xmm1, %eax +// CHECK: encoding: [0xf2,0x0f,0x2d,0xc1] + +cvtsd2siq %xmm0, %rax // CHECK: cvtsd2siq %xmm0, %rax +cvtsd2sil %xmm0, %eax // CHECK: cvtsd2sil %xmm0, %eax +cvtsd2si %xmm0, %rax // CHECK: cvtsd2siq %xmm0, %rax + + +cvttpd2dq %xmm1, %xmm0 // CHECK: cvttpd2dq %xmm1, %xmm0 +cvttpd2dq (%rax), %xmm0 // CHECK: cvttpd2dq (%rax), %xmm0 + +cvttps2dq %xmm1, %xmm0 // CHECK: cvttps2dq %xmm1, %xmm0 +cvttps2dq (%rax), %xmm0 // CHECK: cvttps2dq (%rax), %xmm0 + +// rdar://8456376 - llvm-mc rejects 'roundss' +roundss $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x0a,0xc0,0x0e] +roundps $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x08,0xc0,0x0e] +roundsd $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x0b,0xc0,0x0e] +roundpd $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x09,0xc0,0x0e] + + +// rdar://8482675 - 32-bit mem operand support in 64-bit mode (0x67 prefix) +leal 8(%eax), %esi +// CHECK: leal 8(%eax), %esi +// CHECK: encoding: [0x67,0x8d,0x70,0x08] +leaq 8(%eax), %rsi +// CHECK: leaq 8(%eax), %rsi +// CHECK: encoding: [0x67,0x48,0x8d,0x70,0x08] +leaq 8(%rax), %rsi +// CHECK: leaq 8(%rax), %rsi +// CHECK: encoding: [0x48,0x8d,0x70,0x08] + + +cvttpd2dq 0xdeadbeef(%ebx,%ecx,8),%xmm5 +// CHECK: cvttpd2dq 3735928559(%ebx,%ecx,8), %xmm5 +// CHECK: encoding: [0x67,0x66,0x0f,0xe6,0xac,0xcb,0xef,0xbe,0xad,0xde] + +// rdar://8490728 - llvm-mc rejects 'movmskpd' +movmskpd %xmm6, %rax +// CHECK: movmskpd %xmm6, %rax +// CHECK: encoding: [0x66,0x48,0x0f,0x50,0xc6] +movmskpd %xmm6, %eax +// CHECK: movmskpd %xmm6, %eax +// CHECK: encoding: [0x66,0x0f,0x50,0xc6] + +// rdar://8491845 - Gas supports commuted forms of non-commutable instructions. +fdivrp %st(0), %st(1) // CHECK: encoding: [0xde,0xf9] +fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9] + +fsubrp %ST(0), %ST(1) // CHECK: encoding: [0xde,0xe9] +fsubrp %ST(1), %ST(0) // CHECK: encoding: [0xde,0xe9] + +// also PR8861 +fdivp %st(0), %st(1) // CHECK: encoding: [0xde,0xf1] +fdivp %st(1), %st(0) // CHECK: encoding: [0xde,0xf1] + + +movl foo(%rip), %eax +// CHECK: movl foo(%rip), %eax +// CHECK: encoding: [0x8b,0x05,A,A,A,A] +// CHECK: fixup A - offset: 2, value: foo-4, kind: reloc_riprel_4byte + +movb $12, foo(%rip) +// CHECK: movb $12, foo(%rip) +// CHECK: encoding: [0xc6,0x05,A,A,A,A,0x0c] +// CHECK: fixup A - offset: 2, value: foo-5, kind: reloc_riprel_4byte + +movw $12, foo(%rip) +// CHECK: movw $12, foo(%rip) +// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,0x0c,0x00] +// CHECK: fixup A - offset: 3, value: foo-6, kind: reloc_riprel_4byte + +movl $12, foo(%rip) +// CHECK: movl $12, foo(%rip) +// CHECK: encoding: [0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00] +// CHECK: fixup A - offset: 2, value: foo-8, kind: reloc_riprel_4byte + +movq $12, foo(%rip) +// CHECK: movq $12, foo(%rip) +// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00] +// CHECK: fixup A - offset: 3, value: foo-8, kind: reloc_riprel_4byte + +// CHECK: addq $-424, %rax +// CHECK: encoding: [0x48,0x05,0x58,0xfe,0xff,0xff] +addq $-424, %rax + + +// CHECK: movq _foo@GOTPCREL(%rip), %rax +// CHECK: encoding: [0x48,0x8b,0x05,A,A,A,A] +// CHECK: fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load +movq _foo@GOTPCREL(%rip), %rax + +// CHECK: movq _foo@GOTPCREL(%rip), %r14 +// CHECK: encoding: [0x4c,0x8b,0x35,A,A,A,A] +// CHECK: fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load +movq _foo@GOTPCREL(%rip), %r14 + + +// CHECK: movq (%r13,%rax,8), %r13 +// CHECK: encoding: [0x4d,0x8b,0x6c,0xc5,0x00] +movq 0x00(%r13,%rax,8),%r13 + +// CHECK: testq %rax, %rbx +// CHECK: encoding: [0x48,0x85,0xd8] +testq %rax, %rbx + +// CHECK: cmpq %rbx, %r14 +// CHECK: encoding: [0x49,0x39,0xde] + cmpq %rbx, %r14 + +// rdar://7947167 + +movsq +// CHECK: movsq +// CHECK: encoding: [0x48,0xa5] + +movsl +// CHECK: movsl +// CHECK: encoding: [0xa5] + +stosq +// CHECK: stosq +// CHECK: encoding: [0x48,0xab] +stosl +// CHECK: stosl +// CHECK: encoding: [0xab] + + +// Not moffset forms of moves, they are x86-32 only! rdar://7947184 +movb 0, %al // CHECK: movb 0, %al # encoding: [0x8a,0x04,0x25,0x00,0x00,0x00,0x00] +movw 0, %ax // CHECK: movw 0, %ax # encoding: [0x66,0x8b,0x04,0x25,0x00,0x00,0x00,0x00] +movl 0, %eax // CHECK: movl 0, %eax # encoding: [0x8b,0x04,0x25,0x00,0x00,0x00,0x00] + +// CHECK: pushfq # encoding: [0x9c] + pushf +// CHECK: pushfq # encoding: [0x9c] + pushfq +// CHECK: popfq # encoding: [0x9d] + popf +// CHECK: popfq # encoding: [0x9d] + popfq + +// CHECK: movabsq $-281474976710654, %rax +// CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff] + movabsq $0xFFFF000000000002, %rax + +// CHECK: movabsq $-281474976710654, %rax +// CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff] + movq $0xFFFF000000000002, %rax + +// CHECK: movq $-65536, %rax +// CHECK: encoding: [0x48,0xc7,0xc0,0x00,0x00,0xff,0xff] + movq $0xFFFFFFFFFFFF0000, %rax + +// CHECK: movq $-256, %rax +// CHECK: encoding: [0x48,0xc7,0xc0,0x00,0xff,0xff,0xff] + movq $0xFFFFFFFFFFFFFF00, %rax + +// CHECK: movq $10, %rax +// CHECK: encoding: [0x48,0xc7,0xc0,0x0a,0x00,0x00,0x00] + movq $10, %rax + +// rdar://8014869 +// +// CHECK: ret +// CHECK: encoding: [0xc3] + retq + +// CHECK: sete %al +// CHECK: encoding: [0x0f,0x94,0xc0] + setz %al + +// CHECK: setne %al +// CHECK: encoding: [0x0f,0x95,0xc0] + setnz %al + +// CHECK: je 0 +// CHECK: encoding: [0x74,A] + jz 0 + +// CHECK: jne +// CHECK: encoding: [0x75,A] + jnz 0 + +// PR9264 +btl $1, 0 // CHECK: btl $1, 0 # encoding: [0x0f,0xba,0x24,0x25,0x00,0x00,0x00,0x00,0x01] +bt $1, 0 // CHECK: btl $1, 0 # encoding: [0x0f,0xba,0x24,0x25,0x00,0x00,0x00,0x00,0x01] + +// rdar://8017515 +btq $0x01,%rdx +// CHECK: btq $1, %rdx +// CHECK: encoding: [0x48,0x0f,0xba,0xe2,0x01] + +//rdar://8017633 +// CHECK: movzbl %al, %esi +// CHECK: encoding: [0x0f,0xb6,0xf0] + movzx %al, %esi + +// CHECK: movzbq %al, %rsi +// CHECK: encoding: [0x48,0x0f,0xb6,0xf0] + movzx %al, %rsi + +// CHECK: movsbw %al, %ax +// CHECK: encoding: [0x66,0x0f,0xbe,0xc0] +movsx %al, %ax + +// CHECK: movsbl %al, %eax +// CHECK: encoding: [0x0f,0xbe,0xc0] +movsx %al, %eax + +// CHECK: movswl %ax, %eax +// CHECK: encoding: [0x0f,0xbf,0xc0] +movsx %ax, %eax + +// CHECK: movsbq %bl, %rax +// CHECK: encoding: [0x48,0x0f,0xbe,0xc3] +movsx %bl, %rax + +// CHECK: movswq %cx, %rax +// CHECK: encoding: [0x48,0x0f,0xbf,0xc1] +movsx %cx, %rax + +// CHECK: movslq %edi, %rax +// CHECK: encoding: [0x48,0x63,0xc7] +movsx %edi, %rax + +// CHECK: movzbw %al, %ax +// CHECK: encoding: [0x66,0x0f,0xb6,0xc0] +movzx %al, %ax + +// CHECK: movzbl %al, %eax +// CHECK: encoding: [0x0f,0xb6,0xc0] +movzx %al, %eax + +// CHECK: movzwl %ax, %eax +// CHECK: encoding: [0x0f,0xb7,0xc0] +movzx %ax, %eax + +// CHECK: movzbq %bl, %rax +// CHECK: encoding: [0x48,0x0f,0xb6,0xc3] +movzx %bl, %rax + +// CHECK: movzwq %cx, %rax +// CHECK: encoding: [0x48,0x0f,0xb7,0xc1] +movzx %cx, %rax + +// CHECK: movsbw (%rax), %ax +// CHECK: encoding: [0x66,0x0f,0xbe,0x00] +movsx (%rax), %ax + +// CHECK: movzbw (%rax), %ax +// CHECK: encoding: [0x66,0x0f,0xb6,0x00] +movzx (%rax), %ax + + +// rdar://7873482 +// CHECK: [0x65,0x8b,0x04,0x25,0x7c,0x00,0x00,0x00] + movl %gs:124, %eax + +// CHECK: jmpq *8(%rax) +// CHECK: encoding: [0xff,0x60,0x08] + jmp *8(%rax) + +// CHECK: btq $61, -216(%rbp) +// CHECK: encoding: [0x48,0x0f,0xba,0xa5,0x28,0xff,0xff,0xff,0x3d] + btq $61, -216(%rbp) + + +// rdar://8061602 +L1: + jecxz L1 +// CHECK: jecxz L1 +// CHECK: encoding: [0x67,0xe3,A] + jrcxz L1 +// CHECK: jrcxz L1 +// CHECK: encoding: [0xe3,A] + +// PR8061 +xchgl 368(%rax),%ecx +// CHECK: xchgl %ecx, 368(%rax) +xchgl %ecx, 368(%rax) +// CHECK: xchgl %ecx, 368(%rax) + +// rdar://8407548 +xchg 0xdeadbeef(%rbx,%rcx,8),%bl +// CHECK: xchgb %bl, 3735928559(%rbx,%rcx,8) + + + +// PR7254 +lock incl 1(%rsp) +// CHECK: lock +// CHECK: incl 1(%rsp) + +// rdar://8741045 +lock/incl 1(%rsp) +// CHECK: lock +// CHECK: incl 1(%rsp) + +// rdar://8033482 +rep movsl +// CHECK: rep +// CHECK: encoding: [0xf3] +// CHECK: movsl +// CHECK: encoding: [0xa5] + + +// rdar://8403974 +iret +// CHECK: iretl +// CHECK: encoding: [0xcf] +iretw +// CHECK: iretw +// CHECK: encoding: [0x66,0xcf] +iretl +// CHECK: iretl +// CHECK: encoding: [0xcf] +iretq +// CHECK: iretq +// CHECK: encoding: [0x48,0xcf] + +// rdar://8416805 +// CHECK: retw $31438 +// CHECK: encoding: [0x66,0xc2,0xce,0x7a] + retw $0x7ace + +// CHECK: lretw $31438 +// CHECK: encoding: [0x66,0xca,0xce,0x7a] + lretw $0x7ace + +// PR8592 +lretq // CHECK: lretq # encoding: [0x48,0xcb] +lretl // CHECK: lretl # encoding: [0xcb] +lret // CHECK: lretl # encoding: [0xcb] + +// rdar://8403907 +sysret +// CHECK: sysretl +// CHECK: encoding: [0x0f,0x07] +sysretl +// CHECK: sysretl +// CHECK: encoding: [0x0f,0x07] +sysretq +// CHECK: sysretq +// CHECK: encoding: [0x48,0x0f,0x07] + +// rdar://8407242 +push %fs +// CHECK: pushq %fs +// CHECK: encoding: [0x0f,0xa0] +push %gs +// CHECK: pushq %gs +// CHECK: encoding: [0x0f,0xa8] + +pushw %fs +// CHECK: pushw %fs +// CHECK: encoding: [0x66,0x0f,0xa0] +pushw %gs +// CHECK: pushw %gs +// CHECK: encoding: [0x66,0x0f,0xa8] + + +pop %fs +// CHECK: popq %fs +// CHECK: encoding: [0x0f,0xa1] +pop %gs +// CHECK: popq %gs +// CHECK: encoding: [0x0f,0xa9] + +popw %fs +// CHECK: popw %fs +// CHECK: encoding: [0x66,0x0f,0xa1] +popw %gs +// CHECK: popw %gs +// CHECK: encoding: [0x66,0x0f,0xa9] + +// rdar://8438816 +fildq -8(%rsp) +fildll -8(%rsp) +// CHECK: fildll -8(%rsp) +// CHECK: encoding: [0xdf,0x6c,0x24,0xf8] +// CHECK: fildll -8(%rsp) +// CHECK: encoding: [0xdf,0x6c,0x24,0xf8] + +// CHECK: callq a + callq a + +// CHECK: leaq -40(%rbp), %r15 + leaq -40(%rbp), %r15 + + + +// rdar://8013734 - Alias dr6=db6 +mov %dr6, %rax +mov %db6, %rax +// CHECK: movq %dr6, %rax +// CHECK: movq %dr6, %rax + + +// INC/DEC encodings. +incb %al // CHECK: incb %al # encoding: [0xfe,0xc0] +incw %ax // CHECK: incw %ax # encoding: [0x66,0xff,0xc0] +incl %eax // CHECK: incl %eax # encoding: [0xff,0xc0] +decb %al // CHECK: decb %al # encoding: [0xfe,0xc8] +decw %ax // CHECK: decw %ax # encoding: [0x66,0xff,0xc8] +decl %eax // CHECK: decl %eax # encoding: [0xff,0xc8] + +// rdar://8416805 +// CHECK: lgdt 4(%rax) +// CHECK: encoding: [0x0f,0x01,0x50,0x04] + lgdt 4(%rax) + +// CHECK: lgdt 4(%rax) +// CHECK: encoding: [0x0f,0x01,0x50,0x04] + lgdtq 4(%rax) + +// CHECK: lidt 4(%rax) +// CHECK: encoding: [0x0f,0x01,0x58,0x04] + lidt 4(%rax) + +// CHECK: lidt 4(%rax) +// CHECK: encoding: [0x0f,0x01,0x58,0x04] + lidtq 4(%rax) + +// CHECK: sgdt 4(%rax) +// CHECK: encoding: [0x0f,0x01,0x40,0x04] + sgdt 4(%rax) + +// CHECK: sgdt 4(%rax) +// CHECK: encoding: [0x0f,0x01,0x40,0x04] + sgdtq 4(%rax) + +// CHECK: sidt 4(%rax) +// CHECK: encoding: [0x0f,0x01,0x48,0x04] + sidt 4(%rax) + +// CHECK: sidt 4(%rax) +// CHECK: encoding: [0x0f,0x01,0x48,0x04] + sidtq 4(%rax) + + +// rdar://8208615 +mov (%rsi), %gs // CHECK: movl (%rsi), %gs # encoding: [0x8e,0x2e] +mov %gs, (%rsi) // CHECK: movl %gs, (%rsi) # encoding: [0x8c,0x2e] + + +// rdar://8431864 + div %bl,%al + div %bx,%ax + div %ecx,%eax + div 0xdeadbeef(%ebx,%ecx,8),%eax + div 0x45,%eax + div 0x7eed,%eax + div 0xbabecafe,%eax + div 0x12345678,%eax + idiv %bl,%al + idiv %bx,%ax + idiv %ecx,%eax + idiv 0xdeadbeef(%ebx,%ecx,8),%eax + idiv 0x45,%eax + idiv 0x7eed,%eax + idiv 0xbabecafe,%eax + idiv 0x12345678,%eax + +// PR8524 +movd %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8] +movd %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb] +movq %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8] +movq %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb] + +rex64 // CHECK: rex64 # encoding: [0x48] +data16 // CHECK: data16 # encoding: [0x66] + +// PR8855 +movq 18446744073709551615,%rbx // CHECK: movq -1, %rbx + +// PR8946 +movdqu %xmm0, %xmm1 // CHECK: movdqu %xmm0, %xmm1 # encoding: [0xf3,0x0f,0x6f,0xc8] diff --git a/test/MC/AsmParser/X86/x86_64-avx-clmul-encoding.s b/test/MC/X86/x86_64-avx-clmul-encoding.s index 67e82c6cd0d2..67e82c6cd0d2 100644 --- a/test/MC/AsmParser/X86/x86_64-avx-clmul-encoding.s +++ b/test/MC/X86/x86_64-avx-clmul-encoding.s diff --git a/test/MC/AsmParser/X86/x86_64-avx-encoding.s b/test/MC/X86/x86_64-avx-encoding.s index 7a96bb5a2b48..7a96bb5a2b48 100644 --- a/test/MC/AsmParser/X86/x86_64-avx-encoding.s +++ b/test/MC/X86/x86_64-avx-encoding.s diff --git a/test/MC/AsmParser/X86/x86_64-encoding.s b/test/MC/X86/x86_64-encoding.s index f45b0a23d5e8..756da4dc352d 100644 --- a/test/MC/AsmParser/X86/x86_64-encoding.s +++ b/test/MC/X86/x86_64-encoding.s @@ -140,3 +140,18 @@ pshufb CPI1_0(%rip), %xmm1 // CHECK: encoding: [0x48,0x8b,0x04,0xe1] movq (%rcx,%riz,8), %rax +// CHECK: fxsaveq (%rax) +// CHECK: encoding: [0x48,0x0f,0xae,0x00] + fxsaveq (%rax) + +// CHECK: fxrstorq (%rax) +// CHECK: encoding: [0x48,0x0f,0xae,0x08] + fxrstorq (%rax) + +// CHECK: leave +// CHECK: encoding: [0xc9] + leave + +// CHECK: leave +// CHECK: encoding: [0xc9] + leaveq diff --git a/test/MC/AsmParser/X86/x86_64-fma3-encoding.s b/test/MC/X86/x86_64-fma3-encoding.s index d08a7329a09f..d08a7329a09f 100644 --- a/test/MC/AsmParser/X86/x86_64-fma3-encoding.s +++ b/test/MC/X86/x86_64-fma3-encoding.s diff --git a/test/MC/AsmParser/X86/x86_64-imm-widths.s b/test/MC/X86/x86_64-imm-widths.s index 6243717ba829..97b60ff3aff8 100644 --- a/test/MC/AsmParser/X86/x86_64-imm-widths.s +++ b/test/MC/X86/x86_64-imm-widths.s @@ -84,11 +84,11 @@ // CHECK: encoding: [0x48,0x05,0xff,0xff,0x00,0x00] addq $0xFFFF, %rax -// CHECK: movq $4294967168, %rax +// CHECK: movabsq $4294967168, %rax // CHECK: encoding: [0x48,0xb8,0x80,0xff,0xff,0xff,0x00,0x00,0x00,0x00] movq $0xFFFFFF80, %rax -// CHECK: movq $4294967295, %rax +// CHECK: movabsq $4294967295, %rax // CHECK: encoding: [0x48,0xb8,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00] movq $0xFFFFFFFF, %rax diff --git a/test/MC/AsmParser/X86/x86_word_directive.s b/test/MC/X86/x86_directives.s index 2950c8cd5f12..2950c8cd5f12 100644 --- a/test/MC/AsmParser/X86/x86_word_directive.s +++ b/test/MC/X86/x86_directives.s diff --git a/test/MC/AsmParser/X86/x86_instruction_errors.s b/test/MC/X86/x86_errors.s index 183306be2c11..183306be2c11 100644 --- a/test/MC/AsmParser/X86/x86_instruction_errors.s +++ b/test/MC/X86/x86_errors.s diff --git a/test/MC/AsmParser/X86/x86_operands.s b/test/MC/X86/x86_operands.s index ddadf7931895..b34713db8637 100644 --- a/test/MC/AsmParser/X86/x86_operands.s +++ b/test/MC/X86/x86_operands.s @@ -46,11 +46,11 @@ addl $1, 1(,%ebx,(2+2)) # '*' -# CHECK: call a +# CHECK: calll a call a -# CHECK: call *%eax +# CHECK: calll *%eax call *%eax -# CHECK: call *4(%eax) +# CHECK: calll *4(%eax) call *4(%eax) # CHECK: movl %gs:8, %eax diff --git a/test/Makefile b/test/Makefile index 7ca46beccc3f..b37bbfcc6f2a 100644 --- a/test/Makefile +++ b/test/Makefile @@ -33,6 +33,11 @@ else LIT_ARGS := -s -v endif +# -jN causes crash on Cygwin's python. +ifneq (,$(filter $(HOST_OS),Cygwin)) + LIT_ARGS += -j1 +endif + ifdef TESTSUITE LIT_TESTSUITE := $(TESTSUITE) CLEANED_TESTSUITE := $(patsubst %/,%,$(TESTSUITE)) @@ -59,7 +64,7 @@ LIT_ALL_TESTSUITES += $(PROJ_OBJ_DIR)/../tools/clang/test # Force creation of Clang's lit.site.cfg. clang-lit-site-cfg: FORCE - $(MAKE) -C $(PROJ_OBJ_DIR)/../tools/clang/test lit.site.cfg + $(MAKE) -C $(PROJ_OBJ_DIR)/../tools/clang/test lit.site.cfg Unit/lit.site.cfg extra-lit-site-cfgs:: clang-lit-site-cfg endif endif @@ -138,6 +143,7 @@ site.exp: FORCE @echo 'set llvmgcc_langs "$(LLVMGCC_LANGS)"' >> site.tmp @echo 'set llvmtoolsdir "$(ToolDir)"' >>site.tmp @echo 'set llvmlibsdir "$(LibDir)"' >>site.tmp + @echo 'set llvmshlibdir "$(SharedLibDir)"' >>site.tmp @echo 'set llvm_bindings "$(BINDINGS_TO_BUILD)"' >> site.tmp @echo 'set srcroot "$(LLVM_SRC_ROOT)"' >>site.tmp @echo 'set objroot "$(LLVM_OBJ_ROOT)"' >>site.tmp @@ -157,6 +163,7 @@ site.exp: FORCE @echo 'set grep "$(GREP)"' >>site.tmp @echo 'set gas "$(GAS)"' >>site.tmp @echo 'set llvmdsymutil "$(DSYMUTIL)"' >>site.tmp + @echo 'set emitir "$(LLVMCC_EMITIR_FLAG)"' >>site.tmp @echo '## All variables above are generated by configure. Do Not Edit ## ' >>site.tmp @test ! -f site.exp || \ sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp @@ -170,6 +177,7 @@ lit.site.cfg: site.exp -e "s#@LLVM_BINARY_DIR@#$(LLVM_OBJ_ROOT)#g" \ -e "s#@LLVM_TOOLS_DIR@#$(ToolDir)#g" \ -e "s#@LLVMGCCDIR@#$(LLVMGCCDIR)#g" \ + -e "s#@ENABLE_SHARED@#$(ENABLE_SHARED)#g" \ $(PROJ_SRC_DIR)/lit.site.cfg.in > $@ Unit/lit.site.cfg: $(PROJ_OBJ_DIR)/Unit/.dir FORCE @@ -180,6 +188,7 @@ Unit/lit.site.cfg: $(PROJ_OBJ_DIR)/Unit/.dir FORCE -e "s#@LLVMGCCDIR@#$(LLVMGCCDIR)#g" \ -e "s#@LLVM_BUILD_MODE@#$(BuildMode)#g" \ -e "s#@ENABLE_SHARED@#$(ENABLE_SHARED)#g" \ + -e "s#@SHLIBDIR@#$(SharedLibDir)#g" \ -e "s#@SHLIBPATH_VAR@#$(SHLIBPATH_VAR)#g" \ $(PROJ_SRC_DIR)/Unit/lit.site.cfg.in > $@ diff --git a/test/Object/TestObjectFiles/trivial-object-test.coff-i386 b/test/Object/TestObjectFiles/trivial-object-test.coff-i386 Binary files differnew file mode 100644 index 000000000000..8cfd9949b1bd --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.coff-i386 diff --git a/test/Object/TestObjectFiles/trivial-object-test.coff-x86-64 b/test/Object/TestObjectFiles/trivial-object-test.coff-x86-64 Binary files differnew file mode 100644 index 000000000000..077591482cea --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.coff-x86-64 diff --git a/test/Object/TestObjectFiles/trivial-object-test.elf-i386 b/test/Object/TestObjectFiles/trivial-object-test.elf-i386 Binary files differnew file mode 100644 index 000000000000..1a0ea40dfe12 --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.elf-i386 diff --git a/test/Object/TestObjectFiles/trivial-object-test.elf-x86-64 b/test/Object/TestObjectFiles/trivial-object-test.elf-x86-64 Binary files differnew file mode 100644 index 000000000000..889f5d96a699 --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.elf-x86-64 diff --git a/test/Object/TestObjectFiles/trivial-object-test.macho-i386 b/test/Object/TestObjectFiles/trivial-object-test.macho-i386 Binary files differnew file mode 100644 index 000000000000..099bd1ebf23b --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.macho-i386 diff --git a/test/Object/TestObjectFiles/trivial-object-test.macho-x86-64 b/test/Object/TestObjectFiles/trivial-object-test.macho-x86-64 Binary files differnew file mode 100644 index 000000000000..93eeb5deceb0 --- /dev/null +++ b/test/Object/TestObjectFiles/trivial-object-test.macho-x86-64 diff --git a/test/Object/dg.exp b/test/Object/dg.exp new file mode 100644 index 000000000000..be82c513920e --- /dev/null +++ b/test/Object/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{test}]] diff --git a/test/Object/nm-trivial-object.test-broken b/test/Object/nm-trivial-object.test-broken new file mode 100644 index 000000000000..6de1780a1608 --- /dev/null +++ b/test/Object/nm-trivial-object.test-broken @@ -0,0 +1,19 @@ +RUN: llvm-nm %p/TestObjectFiles/trivial-object-test.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF +RUN: llvm-nm %p/TestObjectFiles/trivial-object-test.coff-x86-64 \ +RUN: | FileCheck %s -check-prefix COFF +RUN: llvm-nm %p/TestObjectFiles/trivial-object-test.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF +RUN: llvm-nm %p/TestObjectFiles/trivial-object-test.elf-x86-64 \ +RUN: | FileCheck %s -check-prefix ELF + +COFF: 00000000 d .data +COFF: 00000000 t .text +COFF: 00000000 d L{{_?}}.str +COFF: U {{_?}}SomeOtherFunction +COFF: 00000000 T {{_?}}main +COFF: U {{_?}}puts + +ELF: U SomeOtherFunction +ELF: 00000000 T main +ELF: U puts diff --git a/test/Object/objdump-trivial-object.test-broken b/test/Object/objdump-trivial-object.test-broken new file mode 100644 index 000000000000..c4855fdfd682 --- /dev/null +++ b/test/Object/objdump-trivial-object.test-broken @@ -0,0 +1,54 @@ +RUN: llvm-objdump -d %p/TestObjectFiles/trivial-object-test.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF-i386 +RUN: llvm-objdump -d %p/TestObjectFiles/trivial-object-test.coff-x86-64 \ +RUN: | FileCheck %s -check-prefix COFF-x86-64 +RUN: llvm-objdump -d %p/TestObjectFiles/trivial-object-test.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF-i386 +RUN: llvm-objdump -d %p/TestObjectFiles/trivial-object-test.elf-x86-64 \ +RUN: | FileCheck %s -check-prefix ELF-x86-64 + +COFF-i386: file format COFF-i386 +COFF-i386: Disassembly of section .text: +COFF-i386: 0: 83 ec 0c subl $12, %esp +COFF-i386: 3: c7 44 24 08 00 00 00 00 movl $0, 8(%esp) +COFF-i386: b: c7 04 24 00 00 00 00 movl $0, (%esp) +COFF-i386: 12: e8 00 00 00 00 calll 0 +COFF-i386: 17: e8 00 00 00 00 calll 0 +COFF-i386: 1c: 8b 44 24 08 movl 8(%esp), %eax +COFF-i386: 20: 83 c4 0c addl $12, %esp +COFF-i386: 23: c3 ret + +COFF-x86-64: file format COFF-x86-64 +COFF-x86-64: Disassembly of section .text: +COFF-x86-64: 0: 48 83 ec 28 subq $40, %rsp +COFF-x86-64: 4: c7 44 24 24 00 00 00 00 movl $0, 36(%rsp) +COFF-x86-64: c: 48 8d 0d 00 00 00 00 leaq (%rip), %rcx +COFF-x86-64: 13: e8 00 00 00 00 callq 0 +COFF-x86-64: 18: e8 00 00 00 00 callq 0 +COFF-x86-64: 1d: 8b 44 24 24 movl 36(%rsp), %eax +COFF-x86-64: 21: 48 83 c4 28 addq $40, %rsp +COFF-x86-64: 25: c3 ret + + +ELF-i386: file format ELF32-i386 +ELF-i386: Disassembly of section .text: +ELF-i386: 0: 83 ec 0c subl $12, %esp +ELF-i386: 3: c7 44 24 08 00 00 00 00 movl $0, 8(%esp) +ELF-i386: b: c7 04 24 00 00 00 00 movl $0, (%esp) +ELF-i386: 12: e8 fc ff ff ff calll -4 +ELF-i386: 17: e8 fc ff ff ff calll -4 +ELF-i386: 1c: 8b 44 24 08 movl 8(%esp), %eax +ELF-i386: 20: 83 c4 0c addl $12, %esp +ELF-i386: 23: c3 ret + +ELF-x86-64: file format ELF64-x86-64 +ELF-x86-64: Disassembly of section .text: +ELF-x86-64: 0: 48 83 ec 08 subq $8, %rsp +ELF-x86-64: 4: c7 44 24 04 00 00 00 00 movl $0, 4(%rsp) +ELF-x86-64: c: bf 00 00 00 00 movl $0, %edi +ELF-x86-64: 11: e8 00 00 00 00 callq 0 +ELF-x86-64: 16: 30 c0 xorb %al, %al +ELF-x86-64: 18: e8 00 00 00 00 callq 0 +ELF-x86-64: 1d: 8b 44 24 04 movl 4(%rsp), %eax +ELF-x86-64: 21: 48 83 c4 08 addq $8, %rsp +ELF-x86-64: 25: c3 ret diff --git a/test/Other/2008-08-14-PassManager.ll b/test/Other/2008-08-14-PassManager.ll deleted file mode 100644 index 8d6a6d825f10..000000000000 --- a/test/Other/2008-08-14-PassManager.ll +++ /dev/null @@ -1,5 +0,0 @@ -; RUN: opt < %s -loop-deletion -loop-index-split -disable-output -; PR2640 -define i32 @test1() { - ret i32 0 -} diff --git a/test/Other/close-stderr.ll b/test/Other/close-stderr.ll index 60fab3df0d9f..40a01cc3143e 100644 --- a/test/Other/close-stderr.ll +++ b/test/Other/close-stderr.ll @@ -4,6 +4,8 @@ ; RUN: " | FileCheck %s ; CHECK: {{^1$}} ; CHECK: {{^0$}} +; XFAIL: vg_leak +; REQUIRES: shell ; Test that the error handling when writing to stderr fails exits the ; program cleanly rather than aborting. diff --git a/test/Other/extract.ll b/test/Other/extract.ll new file mode 100644 index 000000000000..57573ed76f9a --- /dev/null +++ b/test/Other/extract.ll @@ -0,0 +1,27 @@ +; RUN: llvm-extract -func foo -S < %s | FileCheck %s +; RUN: llvm-extract -delete -func foo -S < %s | FileCheck --check-prefix=DELETE %s +; RUN: llvm-as < %s > %t +; RUN: llvm-extract -func foo -S %t | FileCheck %s +; RUN: llvm-extract -delete -func foo -S %t | FileCheck --check-prefix=DELETE %s + +; llvm-extract uses lazy bitcode loading, so make sure it correctly reads +; from bitcode files in addition to assembly files. + +; CHECK: define void @foo() { +; CHECK: ret void +; CHECK: } + +; The linkonce_odr linkage for foo() should be changed to external linkage. +; DELETE: declare void @foo() +; DELETE: define void @bar() { +; DELETE: call void @foo() +; DELETE: ret void +; DELETE: } + +define linkonce_odr void @foo() { + ret void +} +define void @bar() { + call void @foo() + ret void +} diff --git a/test/Other/lint.ll b/test/Other/lint.ll index fcef7ee2d571..4aa984e2e1b7 100644 --- a/test/Other/lint.ll +++ b/test/Other/lint.ll @@ -1,4 +1,4 @@ -; RUN: opt -lint -disable-output < %s |& FileCheck %s +; RUN: opt -basicaa -lint -disable-output < %s |& FileCheck %s target datalayout = "e-p:64:64:64" declare fastcc void @bar() diff --git a/test/Scripts/coff-dump.py b/test/Scripts/coff-dump.py index 0af3d368d5d0..36ec53932c63 100755 --- a/test/Scripts/coff-dump.py +++ b/test/Scripts/coff-dump.py @@ -13,216 +13,217 @@ # def string_table_entry (offset): - return ('ptr', '+ + PointerToSymbolTable * NumberOfSymbols 18 %s' % offset, ('scalar', 'cstr', '%s')) + return ('ptr', '+ + PointerToSymbolTable * NumberOfSymbols 18 %s' % offset, ('scalar', 'cstr', '%s')) def secname(value): - if value[0] == '/': - return string_table_entry (value [1:].rstrip('\0')) - else: - return '%s' + if value[0] == '/': + return string_table_entry(value[1:].rstrip('\0')) + else: + return '%s' def symname(value): - parts = struct.unpack("<2L", value) - if parts [0] == 0: - return string_table_entry (parts [1]) - else: - return '%s' + parts = struct.unpack("<2L", value) + if parts[0] == 0: + return string_table_entry(parts[1]) + else: + return '%s' file = ('struct', [ - ('MachineType', ('enum', '<H', '0x%X', { - 0x0: 'IMAGE_FILE_MACHINE_UNKNOWN', - 0x1d3: 'IMAGE_FILE_MACHINE_AM33', - 0x8664: 'IMAGE_FILE_MACHINE_AMD64', - 0x1c0: 'IMAGE_FILE_MACHINE_ARM', - 0xebc: 'IMAGE_FILE_MACHINE_EBC', - 0x14c: 'IMAGE_FILE_MACHINE_I386', - 0x200: 'IMAGE_FILE_MACHINE_IA64', - 0x904: 'IMAGE_FILE_MACHINE_M32R', - 0x266: 'IMAGE_FILE_MACHINE_MIPS16', - 0x366: 'IMAGE_FILE_MACHINE_MIPSFPU', - 0x466: 'IMAGE_FILE_MACHINE_MIPSFPU16', - 0x1f0: 'IMAGE_FILE_MACHINE_POWERPC', - 0x1f1: 'IMAGE_FILE_MACHINE_POWERPCFP', - 0x166: 'IMAGE_FILE_MACHINE_R4000', - 0x1a2: 'IMAGE_FILE_MACHINE_SH3', - 0x1a3: 'IMAGE_FILE_MACHINE_SH3DSP', - 0x1a6: 'IMAGE_FILE_MACHINE_SH4', - 0x1a8: 'IMAGE_FILE_MACHINE_SH5', - 0x1c2: 'IMAGE_FILE_MACHINE_THUMB', - 0x169: 'IMAGE_FILE_MACHINE_WCEMIPSV2', - })), - ('NumberOfSections', ('scalar', '<H', '%d')), - ('TimeDateStamp', ('scalar', '<L', '%d')), - ('PointerToSymbolTable', ('scalar', '<L', '0x%0X')), - ('NumberOfSymbols', ('scalar', '<L', '%d')), - ('SizeOfOptionalHeader', ('scalar', '<H', '%d')), - ('Characteristics', ('flags', '<H', '0x%x', [ - (0x0001, 'IMAGE_FILE_RELOCS_STRIPPED', ), - (0x0002, 'IMAGE_FILE_EXECUTABLE_IMAGE', ), - (0x0004, 'IMAGE_FILE_LINE_NUMS_STRIPPED', ), - (0x0008, 'IMAGE_FILE_LOCAL_SYMS_STRIPPED', ), - (0x0010, 'IMAGE_FILE_AGGRESSIVE_WS_TRIM', ), - (0x0020, 'IMAGE_FILE_LARGE_ADDRESS_AWARE', ), - (0x0080, 'IMAGE_FILE_BYTES_REVERSED_LO', ), - (0x0100, 'IMAGE_FILE_32BIT_MACHINE', ), - (0x0200, 'IMAGE_FILE_DEBUG_STRIPPED', ), - (0x0400, 'IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP', ), - (0x0800, 'IMAGE_FILE_NET_RUN_FROM_SWAP', ), - (0x1000, 'IMAGE_FILE_SYSTEM', ), - (0x2000, 'IMAGE_FILE_DLL', ), - (0x4000, 'IMAGE_FILE_UP_SYSTEM_ONLY', ), - (0x8000, 'IMAGE_FILE_BYTES_REVERSED_HI', ), - ])), - ('Sections', ('array', 'NumberOfSections', ('struct', [ - ('Name', ('scalar', '<8s', secname)), - ('VirtualSize', ('scalar', '<L', '%d' )), - ('VirtualAddress', ('scalar', '<L', '%d' )), - ('SizeOfRawData', ('scalar', '<L', '%d' )), - ('PointerToRawData', ('scalar', '<L', '0x%X' )), - ('PointerToRelocations', ('scalar', '<L', '0x%X' )), - ('PointerToLineNumbers', ('scalar', '<L', '0x%X' )), - ('NumberOfRelocations', ('scalar', '<H', '%d' )), - ('NumberOfLineNumbers', ('scalar', '<H', '%d' )), - ('Charateristics', ('flags', '<L', '0x%X', [ - (0x00000008, 'IMAGE_SCN_TYPE_NO_PAD'), - (0x00000020, 'IMAGE_SCN_CNT_CODE'), - (0x00000040, 'IMAGE_SCN_CNT_INITIALIZED_DATA'), - (0x00000080, 'IMAGE_SCN_CNT_UNINITIALIZED_DATA'), - (0x00000100, 'IMAGE_SCN_LNK_OTHER'), - (0x00000200, 'IMAGE_SCN_LNK_INFO'), - (0x00000800, 'IMAGE_SCN_LNK_REMOVE'), - (0x00001000, 'IMAGE_SCN_LNK_COMDAT'), - (0x00008000, 'IMAGE_SCN_GPREL'), - (0x00020000, 'IMAGE_SCN_MEM_PURGEABLE'), - (0x00020000, 'IMAGE_SCN_MEM_16BIT'), - (0x00040000, 'IMAGE_SCN_MEM_LOCKED'), - (0x00080000, 'IMAGE_SCN_MEM_PRELOAD'), - (0x00F00000, 'IMAGE_SCN_ALIGN', { - 0x00100000: 'IMAGE_SCN_ALIGN_1BYTES', - 0x00200000: 'IMAGE_SCN_ALIGN_2BYTES', - 0x00300000: 'IMAGE_SCN_ALIGN_4BYTES', - 0x00400000: 'IMAGE_SCN_ALIGN_8BYTES', - 0x00500000: 'IMAGE_SCN_ALIGN_16BYTES', - 0x00600000: 'IMAGE_SCN_ALIGN_32BYTES', - 0x00700000: 'IMAGE_SCN_ALIGN_64BYTES', - 0x00800000: 'IMAGE_SCN_ALIGN_128BYTES', - 0x00900000: 'IMAGE_SCN_ALIGN_256BYTES', - 0x00A00000: 'IMAGE_SCN_ALIGN_512BYTES', - 0x00B00000: 'IMAGE_SCN_ALIGN_1024BYTES', - 0x00C00000: 'IMAGE_SCN_ALIGN_2048BYTES', - 0x00D00000: 'IMAGE_SCN_ALIGN_4096BYTES', - 0x00E00000: 'IMAGE_SCN_ALIGN_8192BYTES', - }), - (0x01000000, 'IMAGE_SCN_LNK_NRELOC_OVFL'), - (0x02000000, 'IMAGE_SCN_MEM_DISCARDABLE'), - (0x04000000, 'IMAGE_SCN_MEM_NOT_CACHED'), - (0x08000000, 'IMAGE_SCN_MEM_NOT_PAGED'), - (0x10000000, 'IMAGE_SCN_MEM_SHARED'), - (0x20000000, 'IMAGE_SCN_MEM_EXECUTE'), - (0x40000000, 'IMAGE_SCN_MEM_READ'), - (0x80000000, 'IMAGE_SCN_MEM_WRITE'), - ])), - ('SectionData', ('ptr', 'PointerToRawData', ('blob', 'SizeOfRawData'))), - ('Relocations', ('ptr', 'PointerToRelocations', ('array', 'NumberOfRelocations', ('struct', [ - ('VirtualAddress', ('scalar', '<L', '0x%X')), - ('SymbolTableIndex', ('scalar', '<L', '%d' )), - ('Type', ('enum', '<H', '%d', ('MachineType', { - 0x14c: { - 0x0000: 'IMAGE_REL_I386_ABSOLUTE', - 0x0001: 'IMAGE_REL_I386_DIR16', - 0x0002: 'IMAGE_REL_I386_REL16', - 0x0006: 'IMAGE_REL_I386_DIR32', - 0x0007: 'IMAGE_REL_I386_DIR32NB', - 0x0009: 'IMAGE_REL_I386_SEG12', - 0x000A: 'IMAGE_REL_I386_SECTION', - 0x000B: 'IMAGE_REL_I386_SECREL', - 0x000C: 'IMAGE_REL_I386_TOKEN', - 0x000D: 'IMAGE_REL_I386_SECREL7', - 0x0014: 'IMAGE_REL_I386_REL32', - }, - 0x8664: { - 0x0000: 'IMAGE_REL_AMD64_ABSOLUTE', - 0x0001: 'IMAGE_REL_AMD64_ADDR64', - 0x0002: 'IMAGE_REL_AMD64_ADDR32', - 0x0003: 'IMAGE_REL_AMD64_ADDR32NB', - 0x0004: 'IMAGE_REL_AMD64_REL32', - 0x0005: 'IMAGE_REL_AMD64_REL32_1', - 0x0006: 'IMAGE_REL_AMD64_REL32_2', - 0x0007: 'IMAGE_REL_AMD64_REL32_3', - 0x0008: 'IMAGE_REL_AMD64_REL32_4', - 0x0009: 'IMAGE_REL_AMD64_REL32_5', - 0x000A: 'IMAGE_REL_AMD64_SECTION', - 0x000B: 'IMAGE_REL_AMD64_SECREL', - 0x000C: 'IMAGE_REL_AMD64_SECREL7', - 0x000D: 'IMAGE_REL_AMD64_TOKEN', - 0x000E: 'IMAGE_REL_AMD64_SREL32', - 0x000F: 'IMAGE_REL_AMD64_PAIR', - 0x0010: 'IMAGE_REL_AMD64_SSPAN32', - }, - }))), - ('SymbolName', ('ptr', '+ PointerToSymbolTable * - SymbolTableIndex 1 18', ('scalar', '<8s', symname))) - ])))), - ]))), - ('Symbols', ('ptr', 'PointerToSymbolTable', ('byte-array', '* NumberOfSymbols 18', ('struct', [ - ('Name', ('scalar', '<8s', symname)), - ('Value', ('scalar', '<L', '%d' )), - ('SectionNumber', ('scalar', '<H', '%d' )), - ('SimpleType', ('enum', '<B', '%d', { - 0: 'IMAGE_SYM_TYPE_NULL', - 1: 'IMAGE_SYM_TYPE_VOID', - 2: 'IMAGE_SYM_TYPE_CHAR', - 3: 'IMAGE_SYM_TYPE_SHORT', - 4: 'IMAGE_SYM_TYPE_INT', - 5: 'IMAGE_SYM_TYPE_LONG', - 6: 'IMAGE_SYM_TYPE_FLOAT', - 7: 'IMAGE_SYM_TYPE_DOUBLE', - 8: 'IMAGE_SYM_TYPE_STRUCT', - 9: 'IMAGE_SYM_TYPE_UNION', - 10: 'IMAGE_SYM_TYPE_ENUM', - 11: 'IMAGE_SYM_TYPE_MOE', - 12: 'IMAGE_SYM_TYPE_BYTE', - 13: 'IMAGE_SYM_TYPE_WORD', - 14: 'IMAGE_SYM_TYPE_UINT', - 15: 'IMAGE_SYM_TYPE_DWORD', - })), - ('ComplexType', ('enum', '<B', '%d', { - 0: 'IMAGE_SYM_DTYPE_NULL', - 1: 'IMAGE_SYM_DTYPE_POINTER', - 2: 'IMAGE_SYM_DTYPE_FUNCTION', - 3: 'IMAGE_SYM_DTYPE_ARRAY', - })), - ('StorageClass', ('enum', '<B', '%d', { - -1: 'IMAGE_SYM_CLASS_END_OF_FUNCTION', - 0: 'IMAGE_SYM_CLASS_NULL', - 1: 'IMAGE_SYM_CLASS_AUTOMATIC', - 2: 'IMAGE_SYM_CLASS_EXTERNAL', - 3: 'IMAGE_SYM_CLASS_STATIC', - 4: 'IMAGE_SYM_CLASS_REGISTER', - 5: 'IMAGE_SYM_CLASS_EXTERNAL_DEF', - 6: 'IMAGE_SYM_CLASS_LABEL', - 7: 'IMAGE_SYM_CLASS_UNDEFINED_LABEL', - 8: 'IMAGE_SYM_CLASS_MEMBER_OF_STRUCT', - 9: 'IMAGE_SYM_CLASS_ARGUMENT', - 10: 'IMAGE_SYM_CLASS_STRUCT_TAG', - 11: 'IMAGE_SYM_CLASS_MEMBER_OF_UNION', - 12: 'IMAGE_SYM_CLASS_UNION_TAG', - 13: 'IMAGE_SYM_CLASS_TYPE_DEFINITION', - 14: 'IMAGE_SYM_CLASS_UNDEFINED_STATIC', - 15: 'IMAGE_SYM_CLASS_ENUM_TAG', - 16: 'IMAGE_SYM_CLASS_MEMBER_OF_ENUM', - 17: 'IMAGE_SYM_CLASS_REGISTER_PARAM', - 18: 'IMAGE_SYM_CLASS_BIT_FIELD', - 100: 'IMAGE_SYM_CLASS_BLOCK', - 101: 'IMAGE_SYM_CLASS_FUNCTION', - 102: 'IMAGE_SYM_CLASS_END_OF_STRUCT', - 103: 'IMAGE_SYM_CLASS_FILE', - 104: 'IMAGE_SYM_CLASS_SECTION', - 105: 'IMAGE_SYM_CLASS_WEAK_EXTERNAL', - 107: 'IMAGE_SYM_CLASS_CLR_TOKEN', - })), - ('NumberOfAuxSymbols', ('scalar', '<B', '%d' )), - ('AuxillaryData', ('blob', '* NumberOfAuxSymbols 18')), - ])))), + ('MachineType', ('enum', '<H', '0x%X', { + 0x0: 'IMAGE_FILE_MACHINE_UNKNOWN', + 0x1d3: 'IMAGE_FILE_MACHINE_AM33', + 0x8664: 'IMAGE_FILE_MACHINE_AMD64', + 0x1c0: 'IMAGE_FILE_MACHINE_ARM', + 0xebc: 'IMAGE_FILE_MACHINE_EBC', + 0x14c: 'IMAGE_FILE_MACHINE_I386', + 0x200: 'IMAGE_FILE_MACHINE_IA64', + 0x904: 'IMAGE_FILE_MACHINE_M32R', + 0x266: 'IMAGE_FILE_MACHINE_MIPS16', + 0x366: 'IMAGE_FILE_MACHINE_MIPSFPU', + 0x466: 'IMAGE_FILE_MACHINE_MIPSFPU16', + 0x1f0: 'IMAGE_FILE_MACHINE_POWERPC', + 0x1f1: 'IMAGE_FILE_MACHINE_POWERPCFP', + 0x166: 'IMAGE_FILE_MACHINE_R4000', + 0x1a2: 'IMAGE_FILE_MACHINE_SH3', + 0x1a3: 'IMAGE_FILE_MACHINE_SH3DSP', + 0x1a6: 'IMAGE_FILE_MACHINE_SH4', + 0x1a8: 'IMAGE_FILE_MACHINE_SH5', + 0x1c2: 'IMAGE_FILE_MACHINE_THUMB', + 0x169: 'IMAGE_FILE_MACHINE_WCEMIPSV2', + })), + ('NumberOfSections', ('scalar', '<H', '%d')), + ('TimeDateStamp', ('scalar', '<L', '%d')), + ('PointerToSymbolTable', ('scalar', '<L', '0x%0X')), + ('NumberOfSymbols', ('scalar', '<L', '%d')), + ('SizeOfOptionalHeader', ('scalar', '<H', '%d')), + ('Characteristics', ('flags', '<H', '0x%x', [ + (0x0001, 'IMAGE_FILE_RELOCS_STRIPPED', ), + (0x0002, 'IMAGE_FILE_EXECUTABLE_IMAGE', ), + (0x0004, 'IMAGE_FILE_LINE_NUMS_STRIPPED', ), + (0x0008, 'IMAGE_FILE_LOCAL_SYMS_STRIPPED', ), + (0x0010, 'IMAGE_FILE_AGGRESSIVE_WS_TRIM', ), + (0x0020, 'IMAGE_FILE_LARGE_ADDRESS_AWARE', ), + (0x0080, 'IMAGE_FILE_BYTES_REVERSED_LO', ), + (0x0100, 'IMAGE_FILE_32BIT_MACHINE', ), + (0x0200, 'IMAGE_FILE_DEBUG_STRIPPED', ), + (0x0400, 'IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP', ), + (0x0800, 'IMAGE_FILE_NET_RUN_FROM_SWAP', ), + (0x1000, 'IMAGE_FILE_SYSTEM', ), + (0x2000, 'IMAGE_FILE_DLL', ), + (0x4000, 'IMAGE_FILE_UP_SYSTEM_ONLY', ), + (0x8000, 'IMAGE_FILE_BYTES_REVERSED_HI', ), + ])), + ('Sections', ('array', '1', 'NumberOfSections', ('struct', [ + ('Name', ('scalar', '<8s', secname)), + ('VirtualSize', ('scalar', '<L', '%d' )), + ('VirtualAddress', ('scalar', '<L', '%d' )), + ('SizeOfRawData', ('scalar', '<L', '%d' )), + ('PointerToRawData', ('scalar', '<L', '0x%X' )), + ('PointerToRelocations', ('scalar', '<L', '0x%X' )), + ('PointerToLineNumbers', ('scalar', '<L', '0x%X' )), + ('NumberOfRelocations', ('scalar', '<H', '%d' )), + ('NumberOfLineNumbers', ('scalar', '<H', '%d' )), + ('Charateristics', ('flags', '<L', '0x%X', [ + (0x00000008, 'IMAGE_SCN_TYPE_NO_PAD'), + (0x00000020, 'IMAGE_SCN_CNT_CODE'), + (0x00000040, 'IMAGE_SCN_CNT_INITIALIZED_DATA'), + (0x00000080, 'IMAGE_SCN_CNT_UNINITIALIZED_DATA'), + (0x00000100, 'IMAGE_SCN_LNK_OTHER'), + (0x00000200, 'IMAGE_SCN_LNK_INFO'), + (0x00000800, 'IMAGE_SCN_LNK_REMOVE'), + (0x00001000, 'IMAGE_SCN_LNK_COMDAT'), + (0x00008000, 'IMAGE_SCN_GPREL'), + (0x00020000, 'IMAGE_SCN_MEM_PURGEABLE'), + (0x00020000, 'IMAGE_SCN_MEM_16BIT'), + (0x00040000, 'IMAGE_SCN_MEM_LOCKED'), + (0x00080000, 'IMAGE_SCN_MEM_PRELOAD'), + (0x00F00000, 'IMAGE_SCN_ALIGN', { + 0x00100000: 'IMAGE_SCN_ALIGN_1BYTES', + 0x00200000: 'IMAGE_SCN_ALIGN_2BYTES', + 0x00300000: 'IMAGE_SCN_ALIGN_4BYTES', + 0x00400000: 'IMAGE_SCN_ALIGN_8BYTES', + 0x00500000: 'IMAGE_SCN_ALIGN_16BYTES', + 0x00600000: 'IMAGE_SCN_ALIGN_32BYTES', + 0x00700000: 'IMAGE_SCN_ALIGN_64BYTES', + 0x00800000: 'IMAGE_SCN_ALIGN_128BYTES', + 0x00900000: 'IMAGE_SCN_ALIGN_256BYTES', + 0x00A00000: 'IMAGE_SCN_ALIGN_512BYTES', + 0x00B00000: 'IMAGE_SCN_ALIGN_1024BYTES', + 0x00C00000: 'IMAGE_SCN_ALIGN_2048BYTES', + 0x00D00000: 'IMAGE_SCN_ALIGN_4096BYTES', + 0x00E00000: 'IMAGE_SCN_ALIGN_8192BYTES', + }), + (0x01000000, 'IMAGE_SCN_LNK_NRELOC_OVFL'), + (0x02000000, 'IMAGE_SCN_MEM_DISCARDABLE'), + (0x04000000, 'IMAGE_SCN_MEM_NOT_CACHED'), + (0x08000000, 'IMAGE_SCN_MEM_NOT_PAGED'), + (0x10000000, 'IMAGE_SCN_MEM_SHARED'), + (0x20000000, 'IMAGE_SCN_MEM_EXECUTE'), + (0x40000000, 'IMAGE_SCN_MEM_READ'), + (0x80000000, 'IMAGE_SCN_MEM_WRITE'), + ])), + ('SectionData', ('ptr', 'PointerToRawData', ('blob', 'SizeOfRawData'))), + ('Relocations', ('ptr', 'PointerToRelocations', ('array', '0', 'NumberOfRelocations', ('struct', [ + ('VirtualAddress', ('scalar', '<L', '0x%X')), + ('SymbolTableIndex', ('scalar', '<L', '%d' )), + ('Type', ('enum', '<H', '%d', ('MachineType', { + 0x14c: { + 0x0000: 'IMAGE_REL_I386_ABSOLUTE', + 0x0001: 'IMAGE_REL_I386_DIR16', + 0x0002: 'IMAGE_REL_I386_REL16', + 0x0006: 'IMAGE_REL_I386_DIR32', + 0x0007: 'IMAGE_REL_I386_DIR32NB', + 0x0009: 'IMAGE_REL_I386_SEG12', + 0x000A: 'IMAGE_REL_I386_SECTION', + 0x000B: 'IMAGE_REL_I386_SECREL', + 0x000C: 'IMAGE_REL_I386_TOKEN', + 0x000D: 'IMAGE_REL_I386_SECREL7', + 0x0014: 'IMAGE_REL_I386_REL32', + }, + 0x8664: { + 0x0000: 'IMAGE_REL_AMD64_ABSOLUTE', + 0x0001: 'IMAGE_REL_AMD64_ADDR64', + 0x0002: 'IMAGE_REL_AMD64_ADDR32', + 0x0003: 'IMAGE_REL_AMD64_ADDR32NB', + 0x0004: 'IMAGE_REL_AMD64_REL32', + 0x0005: 'IMAGE_REL_AMD64_REL32_1', + 0x0006: 'IMAGE_REL_AMD64_REL32_2', + 0x0007: 'IMAGE_REL_AMD64_REL32_3', + 0x0008: 'IMAGE_REL_AMD64_REL32_4', + 0x0009: 'IMAGE_REL_AMD64_REL32_5', + 0x000A: 'IMAGE_REL_AMD64_SECTION', + 0x000B: 'IMAGE_REL_AMD64_SECREL', + 0x000C: 'IMAGE_REL_AMD64_SECREL7', + 0x000D: 'IMAGE_REL_AMD64_TOKEN', + 0x000E: 'IMAGE_REL_AMD64_SREL32', + 0x000F: 'IMAGE_REL_AMD64_PAIR', + 0x0010: 'IMAGE_REL_AMD64_SSPAN32', + }, + }))), + ('SymbolName', ('ptr', '+ PointerToSymbolTable * SymbolTableIndex 18', ('scalar', '<8s', symname))) + ])))), + ]))), + ('Symbols', ('ptr', 'PointerToSymbolTable', ('byte-array', '18', '* NumberOfSymbols 18', ('struct', [ + ('Name', ('scalar', '<8s', symname)), + ('Value', ('scalar', '<L', '%d' )), + ('SectionNumber', ('scalar', '<H', '%d' )), + ('_Type', ('scalar', '<H', None )), + ('SimpleType', ('enum', '& _Type 15', '%d', { + 0: 'IMAGE_SYM_TYPE_NULL', + 1: 'IMAGE_SYM_TYPE_VOID', + 2: 'IMAGE_SYM_TYPE_CHAR', + 3: 'IMAGE_SYM_TYPE_SHORT', + 4: 'IMAGE_SYM_TYPE_INT', + 5: 'IMAGE_SYM_TYPE_LONG', + 6: 'IMAGE_SYM_TYPE_FLOAT', + 7: 'IMAGE_SYM_TYPE_DOUBLE', + 8: 'IMAGE_SYM_TYPE_STRUCT', + 9: 'IMAGE_SYM_TYPE_UNION', + 10: 'IMAGE_SYM_TYPE_ENUM', + 11: 'IMAGE_SYM_TYPE_MOE', + 12: 'IMAGE_SYM_TYPE_BYTE', + 13: 'IMAGE_SYM_TYPE_WORD', + 14: 'IMAGE_SYM_TYPE_UINT', + 15: 'IMAGE_SYM_TYPE_DWORD', + })), # (Type & 0xF0) >> 4 + ('ComplexType', ('enum', '>> & _Type 240 4', '%d', { + 0: 'IMAGE_SYM_DTYPE_NULL', + 1: 'IMAGE_SYM_DTYPE_POINTER', + 2: 'IMAGE_SYM_DTYPE_FUNCTION', + 3: 'IMAGE_SYM_DTYPE_ARRAY', + })), + ('StorageClass', ('enum', '<B', '%d', { + -1: 'IMAGE_SYM_CLASS_END_OF_FUNCTION', + 0: 'IMAGE_SYM_CLASS_NULL', + 1: 'IMAGE_SYM_CLASS_AUTOMATIC', + 2: 'IMAGE_SYM_CLASS_EXTERNAL', + 3: 'IMAGE_SYM_CLASS_STATIC', + 4: 'IMAGE_SYM_CLASS_REGISTER', + 5: 'IMAGE_SYM_CLASS_EXTERNAL_DEF', + 6: 'IMAGE_SYM_CLASS_LABEL', + 7: 'IMAGE_SYM_CLASS_UNDEFINED_LABEL', + 8: 'IMAGE_SYM_CLASS_MEMBER_OF_STRUCT', + 9: 'IMAGE_SYM_CLASS_ARGUMENT', + 10: 'IMAGE_SYM_CLASS_STRUCT_TAG', + 11: 'IMAGE_SYM_CLASS_MEMBER_OF_UNION', + 12: 'IMAGE_SYM_CLASS_UNION_TAG', + 13: 'IMAGE_SYM_CLASS_TYPE_DEFINITION', + 14: 'IMAGE_SYM_CLASS_UNDEFINED_STATIC', + 15: 'IMAGE_SYM_CLASS_ENUM_TAG', + 16: 'IMAGE_SYM_CLASS_MEMBER_OF_ENUM', + 17: 'IMAGE_SYM_CLASS_REGISTER_PARAM', + 18: 'IMAGE_SYM_CLASS_BIT_FIELD', + 100: 'IMAGE_SYM_CLASS_BLOCK', + 101: 'IMAGE_SYM_CLASS_FUNCTION', + 102: 'IMAGE_SYM_CLASS_END_OF_STRUCT', + 103: 'IMAGE_SYM_CLASS_FILE', + 104: 'IMAGE_SYM_CLASS_SECTION', + 105: 'IMAGE_SYM_CLASS_WEAK_EXTERNAL', + 107: 'IMAGE_SYM_CLASS_CLR_TOKEN', + })), + ('NumberOfAuxSymbols', ('scalar', '<B', '%d' )), + ('AuxillaryData', ('blob', '* NumberOfAuxSymbols 18')), + ])))), ]) # @@ -239,328 +240,351 @@ Indent = 0 NewLine = True def indent(): - global Indent - Indent += 1 + global Indent + Indent += 1 def dedent(): - global Indent - Indent -= 1 + global Indent + Indent -= 1 def write(input): - global NewLine - output = "" - - for char in input: - - if NewLine: - output += Indent * ' ' - NewLine = False - - output += char - - if char == '\n': - NewLine = True - - sys.stdout.write (output) + global NewLine + output = "" + + for char in input: + + if NewLine: + output += Indent * ' ' + NewLine = False + + output += char + + if char == '\n': + NewLine = True + + sys.stdout.write(output) def read(format): - return struct.unpack (format, Input.read(struct.calcsize(format))) - -def read_cstr (): - output = "" - while True: - char = Input.read (1) - if len (char) == 0: - raise RuntimeError ("EOF while reading cstr") - if char == '\0': - break - output += char - return output + return struct.unpack(format, Input.read(struct.calcsize(format))) + +def read_cstr(): + output = "" + while True: + char = Input.read(1) + if len(char) == 0: + raise RuntimeError ("EOF while reading cstr") + if char == '\0': + break + output += char + return output def push_pos(seek_to = None): - Stack [0:0] = [Input.tell ()] - if seek_to: - Input.seek (seek_to) + Stack [0:0] = [Input.tell()] + if seek_to: + Input.seek(seek_to) def pop_pos(): - assert(len (Stack) > 0) - Input.seek (Stack [0]) - del Stack [0] + assert(len(Stack) > 0) + Input.seek(Stack[0]) + del Stack[0] def print_binary_data(size): - value = "" - while size > 0: - if size >= 16: - data = Input.read(16) - size -= 16 - else: - data = Input.read(size) - size = 0 - value += data - bytes = "" - text = "" - for index in xrange (16): - if index < len (data): - if index == 8: - bytes += "- " - ch = ord (data [index]) - bytes += "%02X " % ch - if ch >= 0x20 and ch <= 0x7F: - text += data [index] - else: - text += "." - else: - if index == 8: - bytes += " " - bytes += " " - - write ("%s|%s|\n" % (bytes, text)) - return value - -idlit = re.compile ("[a-zA-Z][a-zA-Z0-9_-]*") -numlit = re.compile ("[0-9]+") + value = "" + while size > 0: + if size >= 16: + data = Input.read(16) + size -= 16 + else: + data = Input.read(size) + size = 0 + value += data + bytes = "" + text = "" + for index in xrange(16): + if index < len(data): + if index == 8: + bytes += "- " + ch = ord(data[index]) + bytes += "%02X " % ch + if ch >= 0x20 and ch <= 0x7F: + text += data[index] + else: + text += "." + else: + if index == 8: + bytes += " " + bytes += " " + + write("%s|%s|\n" % (bytes, text)) + return value + +idlit = re.compile("[a-zA-Z_][a-zA-Z0-9_-]*") +numlit = re.compile("[0-9]+") def read_value(expr): - input = iter (expr.split ()) - - def eval(): - - token = input.next () - - if expr == 'cstr': - return read_cstr () - if expr == 'true': - return True - if expr == 'false': - return False - - if len (token) > 1 and token [0] in ('=', '@', '<', '!', '>'): - val = read(expr) - assert (len (val) == 1) - return val [0] - - if token == '+': - return eval () + eval () - if token == '-': - return eval () - eval () - if token == '*': - return eval () * eval () - if token == '/': - return eval () / eval () - - if idlit.match (token): - return Fields [token] - if numlit.match (token): - return int (token) - - raise RuntimeError ("unexpected token %s" % repr(token)) - - value = eval () - - try: - input.next () - except StopIteration: - return value - raise RuntimeError("unexpected input at end of expression") + input = iter(expr.split()) + + def eval(): + + token = input.next() + + if expr == 'cstr': + return read_cstr() + if expr == 'true': + return True + if expr == 'false': + return False + + if token == '+': + return eval() + eval() + if token == '-': + return eval() - eval() + if token == '*': + return eval() * eval() + if token == '/': + return eval() / eval() + if token == '&': + return eval() & eval() + if token == '|': + return eval() | eval() + if token == '>>': + return eval() >> eval() + if token == '<<': + return eval() << eval() + + if len(token) > 1 and token[0] in ('=', '@', '<', '!', '>'): + val = read(expr) + assert(len(val) == 1) + return val[0] + + if idlit.match(token): + return Fields[token] + if numlit.match(token): + return int(token) + + raise RuntimeError("unexpected token %s" % repr(token)) + + value = eval() + + try: + input.next() + except StopIteration: + return value + raise RuntimeError("unexpected input at end of expression") def write_value(format,value): - format_type = type (format) - if format_type is types.StringType: - write (format%value) - elif format_type is types.FunctionType: - write_value (format (value), value) - elif format_type is types.TupleType: - Fields ['this'] = value - handle_element (format) - else: - raise RuntimeError("unexpected type: %s" % repr(format_type)) + format_type = type(format) + if format_type is types.StringType: + write(format % value) + elif format_type is types.FunctionType: + write_value(format(value), value) + elif format_type is types.TupleType: + Fields['this'] = value + handle_element(format) + elif format_type is types.NoneType: + pass + else: + raise RuntimeError("unexpected type: %s" % repr(format_type)) def handle_scalar(entry): - iformat = entry [1] - oformat = entry [2] - - value = read_value (iformat) - - write_value (oformat, value) - - return value + iformat = entry[1] + oformat = entry[2] + + value = read_value(iformat) + + write_value(oformat, value) + + return value def handle_enum(entry): - iformat = entry [1] - oformat = entry [2] - definitions = entry [3] - - value = read_value (iformat) - - if type (definitions) is types.TupleType: - selector = read_value (definitions [0]) - definitions = definitions [1] [selector] - - if value in definitions: - description = definitions[value] - else: - description = "unknown" - - write ("%s (" % description) - write_value (oformat, value) - write (")") - - return value + iformat = entry[1] + oformat = entry[2] + definitions = entry[3] + + value = read_value(iformat) + + if type(definitions) is types.TupleType: + selector = read_value(definitions[0]) + definitions = definitions[1][selector] + + if value in definitions: + description = definitions[value] + else: + description = "unknown" + + write("%s (" % description) + write_value(oformat, value) + write(")") + + return value def handle_flags(entry): - iformat = entry [1] - oformat = entry [2] - definitions = entry [3] - - value = read_value (iformat) - - write_value (oformat, value) - - indent () - for entry in definitions: - mask = entry [0] - name = entry [1] - if len (entry) == 3: - map = entry [2] - selection = value & mask - if selection in map: - write("\n%s" % map[selection]) - else: - write("\n%s <%d>" % (name, selection)) - elif len (entry) == 2: - if value & mask != 0: - write("\n%s" % name) - dedent () - - return value + iformat = entry[1] + oformat = entry[2] + definitions = entry[3] + + value = read_value(iformat) + + write_value(oformat, value) + + indent() + for entry in definitions: + mask = entry[0] + name = entry[1] + if len (entry) == 3: + map = entry[2] + selection = value & mask + if selection in map: + write("\n%s" % map[selection]) + else: + write("\n%s <%d>" % (name, selection)) + elif len(entry) == 2: + if value & mask != 0: + write("\n%s" % name) + dedent() + + return value def handle_struct(entry): - global Fields - members = entry [1] - - newFields = {} - - write ("{\n"); - indent () - - for member in members: - name = member [0] - type = member [1] - - write("%s = "%name.ljust(24)) - - value = handle_element(type) - - write("\n") - - Fields [name] = value - newFields [name] = value - - dedent () - write ("}") - - return newFields + global Fields + members = entry[1] + + newFields = {} + + write("{\n"); + indent() + + for member in members: + name = member[0] + type = member[1] + + if name[0] != "_": + write("%s = " % name.ljust(24)) + + value = handle_element(type) + + if name[0] != "_": + write("\n") + + Fields[name] = value + newFields[name] = value + + dedent() + write("}") + + return newFields def handle_array(entry): - length = entry [1] - element = entry [2] - - newItems = [] - - write ("[\n") - indent () - - value = read_value (length) - - for index in xrange (value): - write ("%d = "%index) - value = handle_element(element) - write ("\n") - newItems.append (value) - - dedent () - write ("]") - - return newItems + start_index = entry[1] + length = entry[2] + element = entry[3] + + newItems = [] + + write("[\n") + indent() + + start_index = read_value(start_index) + value = read_value(length) + + for index in xrange(value): + write("%d = " % (index + start_index)) + value = handle_element(element) + write("\n") + newItems.append(value) + + dedent() + write("]") + + return newItems def handle_byte_array(entry): - length = entry [1] - element = entry [2] - - newItems = [] - - write ("[\n") - indent () - - value = read_value (length) - end_of_array = Input.tell () + value - - index = 0 - while Input.tell () < end_of_array: - write ("%d = "%index) - value = handle_element(element) - write ("\n") - newItems.append (value) - index += 1 - - dedent () - write ("]") - - return newItems + ent_size = entry[1] + length = entry[2] + element = entry[3] + + newItems = [] + + write("[\n") + indent() + + item_size = read_value(ent_size) + value = read_value(length) + end_of_array = Input.tell() + value + + prev_loc = Input.tell() + index = 0 + while Input.tell() < end_of_array: + write("%d = " % index) + value = handle_element(element) + write("\n") + newItems.append(value) + index += (Input.tell() - prev_loc) / item_size + prev_loc = Input.tell() + + dedent() + write("]") + + return newItems def handle_ptr(entry): - offset = entry[1] - element = entry [2] - - value = None - offset = read_value (offset) - - if offset != 0: - - push_pos (offset) - - value = handle_element (element) - - pop_pos () - - else: - write ("None") - - return value + offset = entry[1] + element = entry[2] + + value = None + offset = read_value(offset) + + if offset != 0: + + push_pos(offset) + + value = handle_element(element) + + pop_pos() + + else: + write("None") + + return value def handle_blob(entry): - length = entry [1] - - write ("\n") - indent () - - value = print_binary_data (read_value (length)) - - dedent () - - return value + length = entry[1] + + write("\n") + indent() + + value = print_binary_data(read_value(length)) + + dedent() + + return value def handle_element(entry): - handlers = { - 'struct': handle_struct, - 'scalar': handle_scalar, - 'enum': handle_enum, - 'flags': handle_flags, - 'ptr': handle_ptr, - 'blob': handle_blob, - 'array': handle_array, - 'byte-array': handle_byte_array, - } - - if not entry [0] in handlers: - raise RuntimeError ("unexpected type '%s'" % str (entry[0])) - - return handlers [entry [0]] (entry) - -Input = open (sys.argv [1], "rb") + handlers = { + 'struct': handle_struct, + 'scalar': handle_scalar, + 'enum': handle_enum, + 'flags': handle_flags, + 'ptr': handle_ptr, + 'blob': handle_blob, + 'array': handle_array, + 'byte-array': handle_byte_array, + } + + if not entry[0] in handlers: + raise RuntimeError ("unexpected type '%s'" % str (entry[0])) + + return handlers[entry[0]](entry) + +if len(sys.argv) <= 1 or sys.argv[1] == '-': + import StringIO + Input = StringIO.StringIO(sys.stdin.read()) +else: + Input = open (sys.argv[1], "rb") + try: - handle_element (file) + handle_element(file) finally: - Input.close () - Input = None + Input.close() + Input = None diff --git a/test/Scripts/coff-dump.py.bat b/test/Scripts/coff-dump.py.bat index cc83eba1c446..56428e1a605c 100644 --- a/test/Scripts/coff-dump.py.bat +++ b/test/Scripts/coff-dump.py.bat @@ -1,4 +1,7 @@ @echo off -%PYTHON_EXECUTABLE% %LLVM_SRC_ROOT%\test\Scripts\coff-dump.py %1 %2 %3 %4 %5 %6 %7 %8 %9 +@rem We need to set -u to treat stdin as binary. Python 3 has support for doing +@rem this in code, but I haven't found a way to do this in 2.6 yet. + +%PYTHON_EXECUTABLE% -u %LLVM_SRC_ROOT%\test\Scripts\coff-dump.py %1 %2 %3 %4 %5 %6 %7 %8 %9 diff --git a/test/Scripts/common_dump.py b/test/Scripts/common_dump.py new file mode 100644 index 000000000000..3d69c3fb27f2 --- /dev/null +++ b/test/Scripts/common_dump.py @@ -0,0 +1,46 @@ +def dataToHex(d): + """ Convert the raw data in 'd' to an hex string with a space every 4 bytes. + """ + bytes = [] + for i,c in enumerate(d): + byte = ord(c) + hex_byte = hex(byte)[2:] + if byte <= 0xf: + hex_byte = '0' + hex_byte + if i % 4 == 3: + hex_byte += ' ' + bytes.append(hex_byte) + return ''.join(bytes).strip() + +def dataToHexUnified(d): + """ Convert the raw data in 'd' to an hex string with a space every 4 bytes. + Each 4byte number is prefixed with 0x for easy sed/rx + Fixme: convert all MC tests to use this routine instead of the above + """ + bytes = [] + for i,c in enumerate(d): + byte = ord(c) + hex_byte = hex(byte)[2:] + if byte <= 0xf: + hex_byte = '0' + hex_byte + if i % 4 == 0: + hex_byte = '0x' + hex_byte + if i % 4 == 3: + hex_byte += ' ' + bytes.append(hex_byte) + return ''.join(bytes).strip() + + +def HexDump(val, numBits=32): + """ + 1. do not print 'L' + 2. Handle negatives and large numbers by mod (2^numBits) + 3. print fixed length, prepend with zeros. + Length is exactly 2+(numBits/4) + 4. Do print 0x Why? + so that they can be easily distinguished using sed/rx + """ + val = val & (( 1 << numBits) - 1) + newFmt = "0x%0" + "%d" % (numBits / 4) + "x" + return newFmt % val + diff --git a/test/Scripts/elf-dump b/test/Scripts/elf-dump new file mode 100755 index 000000000000..76cdbf91c73f --- /dev/null +++ b/test/Scripts/elf-dump @@ -0,0 +1,231 @@ +#!/usr/bin/env python + +import struct +import sys +import StringIO + +import common_dump + +class Reader: + def __init__(self, path): + if path == "-": + # Snarf all the data so we can seek. + self.file = StringIO.StringIO(sys.stdin.read()) + else: + self.file = open(path, "rb") + self.isLSB = None + self.is64Bit = None + + def seek(self, pos): + self.file.seek(pos) + + def read(self, N): + data = self.file.read(N) + if len(data) != N: + raise ValueError, "Out of data!" + return data + + def read8(self): + return ord(self.read(1)) + + def read16(self): + return struct.unpack('><'[self.isLSB] + 'H', self.read(2))[0] + + def read32(self): + return struct.unpack('><'[self.isLSB] + 'I', self.read(4))[0] + + def read32S(self): + return struct.unpack('><'[self.isLSB] + 'i', self.read(4))[0] + + def read64(self): + return struct.unpack('><'[self.isLSB] + 'Q', self.read(8))[0] + + def read64S(self): + return struct.unpack('><'[self.isLSB] + 'q', self.read(8))[0] + + def readWord(self): + if self.is64Bit: + return self.read64() + else: + return self.read32() + + def readWordS(self): + if self.is64Bit: + return self.read64S() + else: + return self.read32S() + +class StringTable: + def __init__(self, strings): + self.string_table = strings + + def __getitem__(self, index): + end = self.string_table.index('\x00', index) + return self.string_table[index:end] + +class Section: + def __init__(self, f): + self.sh_name = f.read32() + self.sh_type = f.read32() + self.sh_flags = f.readWord() + self.sh_addr = f.readWord() + self.sh_offset = f.readWord() + self.sh_size = f.readWord() + self.sh_link = f.read32() + self.sh_info = f.read32() + self.sh_addralign = f.readWord() + self.sh_entsize = f.readWord() + + def dump(self, shstrtab, f, strtab, dumpdata): + print " (('sh_name', %s)" % common_dump.HexDump(self.sh_name), "# %r" % shstrtab[self.sh_name] + print " ('sh_type', %s)" % common_dump.HexDump(self.sh_type) + print " ('sh_flags', %s)" % common_dump.HexDump(self.sh_flags) + print " ('sh_addr', %s)" % common_dump.HexDump(self.sh_addr) + print " ('sh_offset', %s)" % common_dump.HexDump(self.sh_offset) + print " ('sh_size', %s)" % common_dump.HexDump(self.sh_size) + print " ('sh_link', %s)" % common_dump.HexDump(self.sh_link) + print " ('sh_info', %s)" % common_dump.HexDump(self.sh_info) + print " ('sh_addralign', %s)" % common_dump.HexDump(self.sh_addralign) + print " ('sh_entsize', %s)" % common_dump.HexDump(self.sh_entsize) + if self.sh_type == 2: # SHT_SYMTAB + print " ('_symbols', [" + dumpSymtab(f, self, strtab) + print " ])" + elif self.sh_type == 4 or self.sh_type == 9: # SHT_RELA / SHT_REL + print " ('_relocations', [" + dumpRel(f, self, self.sh_type == 4) + print " ])" + elif dumpdata: + f.seek(self.sh_offset) + if self.sh_type != 8: # != SHT_NOBITS + data = f.read(self.sh_size) + print " ('_section_data', '%s')" % common_dump.dataToHex(data) + else: + print " ('_section_data', '')" + print " )," + +def dumpSymtab(f, section, strtab): + entries = section.sh_size // section.sh_entsize + + for index in range(entries): + f.seek(section.sh_offset + index * section.sh_entsize) + print " # Symbol %s" % common_dump.HexDump(index) + name = f.read32() + print " (('st_name', %s)" % common_dump.HexDump(name), "# %r" % strtab[name] + if not f.is64Bit: + print " ('st_value', %s)" % common_dump.HexDump(f.read32()) + print " ('st_size', %s)" % common_dump.HexDump(f.read32()) + st_info = f.read8() + print " ('st_bind', %s)" % common_dump.HexDump((st_info >> 4)) + print " ('st_type', %s)" % common_dump.HexDump((st_info & 0xf)) + print " ('st_other', %s)" % common_dump.HexDump(f.read8()) + print " ('st_shndx', %s)" % common_dump.HexDump(f.read16()) + if f.is64Bit: + print " ('st_value', %s)" % common_dump.HexDump(f.read64(), 64) + print " ('st_size', %s)" % common_dump.HexDump(f.read64(), 64) + print " )," + +def dumpRel(f, section, dumprela = False): + entries = section.sh_size // section.sh_entsize + + for index in range(entries): + f.seek(section.sh_offset + index * section.sh_entsize) + print " # Relocation %s" % common_dump.HexDump(index) + print " (('r_offset', %s)" % common_dump.HexDump(f.readWord()) + r_info = f.readWord() + if f.is64Bit: + print " ('r_sym', %s)" % common_dump.HexDump((r_info >> 32)) + print " ('r_type', %s)" % common_dump.HexDump((r_info & 0xffffffff)) + else: + print " ('r_sym', %s)" % common_dump.HexDump((r_info >> 8)) + print " ('r_type', %s)" % common_dump.HexDump((r_info & 0xff)) + if dumprela: + print " ('r_addend', %s)" % common_dump.HexDump(f.readWordS()) + print " )," + +def dumpELF(path, opts): + f = Reader(path) + + magic = f.read(4) + assert magic == '\x7FELF' + + fileclass = f.read8() + if fileclass == 1: # ELFCLASS32 + f.is64Bit = False + elif fileclass == 2: # ELFCLASS64 + f.is64Bit = True + else: + raise ValueError, "Unknown file class %s" % common_dump.HexDump(fileclass) + print "('e_indent[EI_CLASS]', %s)" % common_dump.HexDump(fileclass) + + byteordering = f.read8() + if byteordering == 1: # ELFDATA2LSB + f.isLSB = True + elif byteordering == 2: # ELFDATA2MSB + f.isLSB = False + else: + raise ValueError, "Unknown byte ordering %s" % common_dump.HexDump(byteordering) + print "('e_indent[EI_DATA]', %s)" % common_dump.HexDump(byteordering) + + print "('e_indent[EI_VERSION]', %s)" % common_dump.HexDump(f.read8()) + print "('e_indent[EI_OSABI]', %s)" % common_dump.HexDump(f.read8()) + print "('e_indent[EI_ABIVERSION]', %s)" % common_dump.HexDump(f.read8()) + + f.seek(16) # Seek to end of e_ident. + + print "('e_type', %s)" % common_dump.HexDump(f.read16()) + print "('e_machine', %s)" % common_dump.HexDump(f.read16()) + print "('e_version', %s)" % common_dump.HexDump(f.read32()) + print "('e_entry', %s)" % common_dump.HexDump(f.readWord()) + print "('e_phoff', %s)" % common_dump.HexDump(f.readWord()) + e_shoff = f.readWord() + print "('e_shoff', %s)" % common_dump.HexDump(e_shoff) + print "('e_flags', %s)" % common_dump.HexDump(f.read32()) + print "('e_ehsize', %s)" % common_dump.HexDump(f.read16()) + print "('e_phentsize', %s)" % common_dump.HexDump(f.read16()) + print "('e_phnum', %s)" % common_dump.HexDump(f.read16()) + e_shentsize = f.read16() + print "('e_shentsize', %s)" % common_dump.HexDump(e_shentsize) + e_shnum = f.read16() + print "('e_shnum', %s)" % common_dump.HexDump(e_shnum) + e_shstrndx = f.read16() + print "('e_shstrndx', %s)" % common_dump.HexDump(e_shstrndx) + + # Read all section headers + sections = [] + for index in range(e_shnum): + f.seek(e_shoff + index * e_shentsize) + s = Section(f) + sections.append(s) + + # Read .shstrtab so we can resolve section names + f.seek(sections[e_shstrndx].sh_offset) + shstrtab = StringTable(f.read(sections[e_shstrndx].sh_size)) + + # Get the symbol string table + strtab = None + for section in sections: + if shstrtab[section.sh_name] == ".strtab": + f.seek(section.sh_offset) + strtab = StringTable(f.read(section.sh_size)) + break + + print "('_sections', [" + for index in range(e_shnum): + print " # Section %s" % common_dump.HexDump(index) + sections[index].dump(shstrtab, f, strtab, opts.dumpSectionData) + print "])" + +if __name__ == "__main__": + from optparse import OptionParser, OptionGroup + parser = OptionParser("usage: %prog [options] {files}") + parser.add_option("", "--dump-section-data", dest="dumpSectionData", + help="Dump the contents of sections", + action="store_true", default=False) + (opts, args) = parser.parse_args() + + if not args: + args.append('-') + + for arg in args: + dumpELF(arg, opts) diff --git a/test/Scripts/elf-dump.bat b/test/Scripts/elf-dump.bat new file mode 100644 index 000000000000..9c708083b302 --- /dev/null +++ b/test/Scripts/elf-dump.bat @@ -0,0 +1,7 @@ +@echo off + +@rem We need to set -u to treat stdin as binary. Python 3 has support for doing +@rem this in code, but I haven't found a way to do this in 2.6 yet. + +%PYTHON_EXECUTABLE% -u %LLVM_SRC_ROOT%\test\Scripts\elf-dump %1 %2 %3 %4 %5 %6 %7 %8 %9 + diff --git a/test/Scripts/macho-dump b/test/Scripts/macho-dumpx index 72f833975d04..71e06d837b90 100755 --- a/test/Scripts/macho-dump +++ b/test/Scripts/macho-dumpx @@ -4,6 +4,8 @@ import struct import sys import StringIO +import common_dump + class Reader: def __init__(self, path): if path == '-': @@ -41,7 +43,10 @@ class Reader: return int(Value) def read64(self): - return struct.unpack('><'[self.isLSB] + 'Q', self.read(8))[0] + Value = struct.unpack('><'[self.isLSB] + 'Q', self.read(8))[0] + if Value == int(Value): + Value = int(Value) + return Value def registerStringTable(self, strings): if self.string_table is not None: @@ -77,7 +82,7 @@ def dumpmacho(path, opts): print "('filetype', %r)" % filetype numLoadCommands = f.read32() - print "('num_load_commands', %r)" % filetype + print "('num_load_commands', %r)" % numLoadCommands loadCommandsSize = f.read32() print "('load_commands_size', %r)" % loadCommandsSize @@ -267,7 +272,7 @@ def dumpSection(f, i, opts, is64Bit): if opts.dumpSectionData: f.seek(offset) - print " ('_section_data', %r)" % f.read(size) + print " ('_section_data', '%s')" % common_dump.dataToHex(f.read(size)) f.seek(prev_pos) diff --git a/test/Scripts/macho-dump.bat b/test/Scripts/macho-dumpx.bat index 81484f67d702..81484f67d702 100644 --- a/test/Scripts/macho-dump.bat +++ b/test/Scripts/macho-dumpx.bat diff --git a/test/TableGen/Dag.td b/test/TableGen/Dag.td new file mode 100644 index 000000000000..d3481a550c34 --- /dev/null +++ b/test/TableGen/Dag.td @@ -0,0 +1,71 @@ +// RUN: tblgen %s | FileCheck %s +// XFAIL: vg_leak + +//===----------------------------------------------------------------------===// +// Substitution of an int. +def X1; + +class C1<int N> { + dag d = (X1 N); +} + +def VAL1 : C1<13>; + +// CHECK: def VAL1 { +// CHECK-NEXT: dag d = (X1 13) + + +//===----------------------------------------------------------------------===// +// Substitution of a DAG. +def X2; + +class yclass; +def Y2 : yclass; + +class C2<yclass N> { + dag d = (X2 N); + dag e = (N X2); +} + +def VAL2 : C2<Y2>; + +// CHECK: def VAL2 { +// CHECK-NEXT: dag d = (X2 Y2) +// CHECK-NEXT: dag e = (Y2 X2) + + +//===----------------------------------------------------------------------===// +// Complex dag operator (F.TheOp). + +class operator; +def somedef1 : operator; +def somedef2 : operator; + +class foo<operator a> { + operator TheOp = a; +} + +class bar<foo F, operator a> { + dag Dag1 = (somedef1 1); + dag Dag2 = (a 2); + dag Dag3 = (F.TheOp 2); +} + +def foo1 : foo<somedef1>; +def foo2 : foo<somedef2>; + +def VAL3 : bar<foo1, somedef1>; + +// CHECK: def VAL3 { // bar +// CHECK-NEXT: dag Dag1 = (somedef1 1); +// CHECK-NEXT: dag Dag2 = (somedef1 2); +// CHECK-NEXT: dag Dag3 = (somedef1 2); +// CHECK-NEXT: } + + +def VAL4 : bar<foo2, somedef2>; +// CHECK: def VAL4 { +// CHECK-NEXT: dag Dag1 = (somedef1 1); +// CHECK-NEXT: dag Dag2 = (somedef2 2); +// CHECK-NEXT: dag Dag3 = (somedef2 2); +// CHECK-NEXT: } diff --git a/test/TableGen/DagDefSubst.td b/test/TableGen/DagDefSubst.td deleted file mode 100644 index 92a207f41829..000000000000 --- a/test/TableGen/DagDefSubst.td +++ /dev/null @@ -1,16 +0,0 @@ -// RUN: tblgen %s | grep {dag d = (X Y)} -// RUN: tblgen %s | grep {dag e = (Y X)} -// XFAIL: vg_leak -def X; - -class yclass; -def Y : yclass; - -class C<yclass N> { - dag d = (X N); - dag e = (N X); -} - -def VAL : C<Y>; - - diff --git a/test/TableGen/DagIntSubst.td b/test/TableGen/DagIntSubst.td deleted file mode 100644 index 00fde694e7dc..000000000000 --- a/test/TableGen/DagIntSubst.td +++ /dev/null @@ -1,11 +0,0 @@ -// RUN: tblgen %s | grep {dag d = (X 13)} -// XFAIL: vg_leak -def X; - -class C<int N> { - dag d = (X N); -} - -def VAL : C<13>; - - diff --git a/test/TableGen/FieldAccess.td b/test/TableGen/FieldAccess.td index ad652e79ea7c..8b4dc83e0a5b 100644 --- a/test/TableGen/FieldAccess.td +++ b/test/TableGen/FieldAccess.td @@ -1,4 +1,6 @@ // RUN: tblgen %s +// XFAIL: vg_leak + class Bla<string t> { string blu = t; diff --git a/test/TableGen/ListManip.td b/test/TableGen/ListManip.td index c221bb1335b6..6b1e491cd25f 100644 --- a/test/TableGen/ListManip.td +++ b/test/TableGen/ListManip.td @@ -1,10 +1,12 @@ // RUN: tblgen %s +// XFAIL: vg_leak + class Bli<string _t> { string t = _t; } class Bla<list<Bli> _bli> -: Bli<!car(_bli).t> +: Bli<!head(_bli).t> { } diff --git a/test/TableGen/Slice.td b/test/TableGen/Slice.td index 22bf7fbfe8cf..13d9da2b9fd6 100644 --- a/test/TableGen/Slice.td +++ b/test/TableGen/Slice.td @@ -66,19 +66,19 @@ def not : SDNode; multiclass scalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> { def SSrr : Inst<opcode, (outs FR32:$dst), (ins FR32:$src), !strconcat(asmstr, "\t$dst, $src"), - !if(!null(patterns),[]<dag>,patterns[0])>; + !if(!empty(patterns),[]<dag>,patterns[0])>; def SSrm : Inst<opcode, (outs FR32:$dst), (ins FR32:$src), !strconcat(asmstr, "\t$dst, $src"), - !if(!null(patterns),[]<dag>,!if(!null(!cdr(patterns)),patterns[0],patterns[1]))>; + !if(!empty(patterns),[]<dag>,!if(!empty(!tail(patterns)),patterns[0],patterns[1]))>; } multiclass vscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> { def V#NAME#SSrr : Inst<opcode, (outs FR32:$dst), (ins FR32:$src), !strconcat(asmstr, "\t$dst, $src"), - !if(!null(patterns),[]<dag>,patterns[0])>; + !if(!empty(patterns),[]<dag>,patterns[0])>; def V#NAME#SSrm : Inst<opcode, (outs FR32:$dst), (ins FR32:$src), !strconcat(asmstr, "\t$dst, $src"), - !if(!null(patterns),[]<dag>,!if(!null(!cdr(patterns)),patterns[0],patterns[1]))>; + !if(!empty(patterns),[]<dag>,!if(!empty(!tail(patterns)),patterns[0],patterns[1]))>; } multiclass myscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> : diff --git a/test/TableGen/defmclass.td b/test/TableGen/defmclass.td index 55482da4d072..57972b6dae54 100644 --- a/test/TableGen/defmclass.td +++ b/test/TableGen/defmclass.td @@ -36,3 +36,15 @@ multiclass Y { // CHECK: int check = 0; defm Instr : Y, VEX; + + +// Anonymous defm. + +multiclass SomeAnonymous<int x> { + def rm; + def mr; +} + +// These multiclasses shouldn't conflict. +defm : SomeAnonymous<1>; +defm : SomeAnonymous<2>;
\ No newline at end of file diff --git a/test/TableGen/if.td b/test/TableGen/if.td index 0bac0bac3e98..c4d953ea2245 100644 --- a/test/TableGen/if.td +++ b/test/TableGen/if.td @@ -1,20 +1,44 @@ -// RUN: tblgen %s | grep {\\\[1, 2, 3\\\]} | count 4 -// RUN: tblgen %s | grep {\\\[4, 5, 6\\\]} | count 2 +// RUN: tblgen %s | FileCheck %s // XFAIL: vg_leak +// Support for an `!if' operator as part of a `let' statement. +// CHECK: class C +// CHECK-NEXT: bits<16> n = { ?, ?, ?, ?, ?, ?, ?, !if({ C:x{2} }, 0, 1), !if({ C:x{2} }, 1, 1), !if({ C:x{2} }, 0, 0), !if({ C:x{1} }, C:y{3}, 0), !if({ C:x{1} }, C:y{2}, 1), !if({ C:x{0} }, C:y{3}, C:z), !if({ C:x{0} }, C:y{2}, C:y{2}), !if({ C:x{0} }, C:y{1}, C:y{1}), !if({ C:x{0} }, C:y{0}, C:y{0}) }; +class C<bits<3> x, bits<4> y, bit z> { + bits<16> n; + + let n{8-6} = !if(x{2}, 0b010, 0b110); + let n{5-4} = !if(x{1}, y{3-2}, {0, 1}); + let n{3-0} = !if(x{0}, y{3-0}, {z, y{2}, y{1}, y{0}}); +} + +// CHECK: def One +// CHECK-NEXT: list<int> first = [1, 2, 3]; +// CHECK-NEXT: list<int> rest = [1, 2, 3]; + +// CHECK: def OneB +// CHECK-NEXT: list<int> vals = [1, 2, 3]; + +// CHECK: def Two +// CHECK-NEXT: list<int> first = [1, 2, 3]; +// CHECK-NEXT: list<int> rest = [4, 5, 6]; + +// CHECK: def TwoB +// CHECK-NEXT: list<int> vals = [4, 5, 6]; + class A<list<list<int>> vals> { list<int> first = vals[0]; - list<int> rest = !if(!null(!cdr(vals)), vals[0], vals[1]); + list<int> rest = !if(!empty(!tail(vals)), vals[0], vals[1]); } def One : A<[[1,2,3]]>; -def Two : A<[[1,2,3],[4,5,6]]>; +def Two : A<[[1,2,3], [4,5,6]]>; class B<list<int> v> { list<int> vals = v; } -class BB<list<list<int>> vals> : B<!if(!null(!cdr(vals)), vals[0], vals[1])>; +class BB<list<list<int>> vals> : B<!if(!empty(!tail(vals)), vals[0], vals[1])>; class BBB<list<list<int>> vals> : BB<vals>; def OneB : BBB<[[1,2,3]]>; diff --git a/test/TableGen/lisp.td b/test/TableGen/lisp.td index b521e04c8913..bbed8690dd5d 100644 --- a/test/TableGen/lisp.td +++ b/test/TableGen/lisp.td @@ -15,7 +15,7 @@ class CDR<list<string> r, int n> { } class NameList<list<string> Names> : - List<Names>, CAR<!car(Names)>, CDR<!cdr(Names), !null(!cdr(Names))>; + List<Names>, CAR<!head(Names)>, CDR<!tail(Names), !empty(!tail(Names))>; def Three : NameList<["Tom", "Dick", "Harry"]>; diff --git a/test/TableGen/nameconcat.td b/test/TableGen/nameconcat.td deleted file mode 100644 index fd2880a80dff..000000000000 --- a/test/TableGen/nameconcat.td +++ /dev/null @@ -1,91 +0,0 @@ -// RUN: tblgen %s | grep {add_ps} | count 3 -// XFAIL: vg_leak - -class ValueType<int size, int value> { - int Size = size; - int Value = value; -} - -def v2i64 : ValueType<128, 22>; // 2 x i64 vector value -def v2f64 : ValueType<128, 28>; // 2 x f64 vector value - -class Intrinsic<string name> { - string Name = name; -} - -class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr, - list<dag> pattern> { - bits<8> Opcode = opcode; - dag OutOperands = oopnds; - dag InOperands = iopnds; - string AssemblyString = asmstr; - list<dag> Pattern = pattern; -} - -def ops; -def outs; -def ins; - -def set; - -// Define registers -class Register<string n> { - string Name = n; -} - -class RegisterClass<list<ValueType> regTypes, list<Register> regList> { - list<ValueType> RegTypes = regTypes; - list<Register> MemberList = regList; -} - -def XMM0: Register<"xmm0">; -def XMM1: Register<"xmm1">; -def XMM2: Register<"xmm2">; -def XMM3: Register<"xmm3">; -def XMM4: Register<"xmm4">; -def XMM5: Register<"xmm5">; -def XMM6: Register<"xmm6">; -def XMM7: Register<"xmm7">; -def XMM8: Register<"xmm8">; -def XMM9: Register<"xmm9">; -def XMM10: Register<"xmm10">; -def XMM11: Register<"xmm11">; -def XMM12: Register<"xmm12">; -def XMM13: Register<"xmm13">; -def XMM14: Register<"xmm14">; -def XMM15: Register<"xmm15">; - -def VR128 : RegisterClass<[v2i64, v2f64], - [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, - XMM8, XMM9, XMM10, XMM11, - XMM12, XMM13, XMM14, XMM15]>; - -// Define intrinsics -def int_x86_sse2_add_ps : Intrinsic<"addps">; -def int_x86_sse2_add_pd : Intrinsic<"addpd">; - -multiclass arith<bits<8> opcode, string asmstr, string Intr> { - def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - !strconcat(asmstr, "\t$dst, $src1, $src2"), - [(set VR128:$dst, (!nameconcat<Intrinsic>(Intr, "_ps") VR128:$src1, VR128:$src2))]>; - - def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - !strconcat(asmstr, "\t$dst, $src1, $src2"), - [(set VR128:$dst, (!nameconcat<Intrinsic>(Intr, "_pd") VR128:$src1, VR128:$src2))]>; -} - -defm ADD : arith<0x58, "add", "int_x86_sse2_add">; - -class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> : - Inst<opcode,(outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - !strconcat(asmstr, "\t$dst, $src1, $src2"), - [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>; - - -multiclass arith_int<bits<8> opcode, string asmstr, string Intr> { - def PS_Int : IntInst<opcode, asmstr, !nameconcat<Intrinsic>(Intr, "_ps")>; - - def PD_Int : IntInst<opcode, asmstr, !nameconcat<Intrinsic>(Intr, "_pd")>; -} - -defm ADD : arith_int<0x58, "add", "int_x86_sse2_add">; diff --git a/test/Transforms/ArgumentPromotion/basictest.ll b/test/Transforms/ArgumentPromotion/basictest.ll index ac9d7bf5abb6..d3d21fcabee1 100644 --- a/test/Transforms/ArgumentPromotion/basictest.ll +++ b/test/Transforms/ArgumentPromotion/basictest.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -argpromotion -mem2reg -S | not grep alloca +; RUN: opt < %s -basicaa -argpromotion -mem2reg -S | not grep alloca target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" define internal i32 @test(i32* %X, i32* %Y) { %A = load i32* %X ; <i32> [#uses=1] diff --git a/test/Transforms/ArgumentPromotion/crash.ll b/test/Transforms/ArgumentPromotion/crash.ll index e2d3d4de9edb..fed002aa98a9 100644 --- a/test/Transforms/ArgumentPromotion/crash.ll +++ b/test/Transforms/ArgumentPromotion/crash.ll @@ -36,3 +36,24 @@ entry: ret i1 undef } + +; PR8932 - infinite promotion. +%0 = type { %0* } + +define i32 @test2(i32 %a) { +init: + %0 = alloca %0 + %1 = alloca %0 + %2 = call i32 @"clay_assign(Chain, Chain)"(%0* %0, %0* %1) + ret i32 0 +} + +define internal i32 @"clay_assign(Chain, Chain)"(%0* %c, %0* %d) { +init: + %0 = getelementptr %0* %d, i32 0, i32 0 + %1 = load %0** %0 + %2 = getelementptr %0* %c, i32 0, i32 0 + %3 = load %0** %2 + %4 = call i32 @"clay_assign(Chain, Chain)"(%0* %3, %0* %1) + ret i32 0 +} diff --git a/test/Transforms/CodeGenPrepare/basic.ll b/test/Transforms/CodeGenPrepare/basic.ll new file mode 100644 index 000000000000..3b1fca328c5b --- /dev/null +++ b/test/Transforms/CodeGenPrepare/basic.ll @@ -0,0 +1,29 @@ +; RUN: opt -codegenprepare %s -S -o - | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; CHECK: @test1 +; objectsize should fold to a constant, which causes the branch to fold to an +; uncond branch. +; rdar://8785296 +define i32 @test1(i8* %ptr) nounwind ssp noredzone align 2 { +entry: + %0 = tail call i64 @llvm.objectsize.i64(i8* %ptr, i1 false) + %1 = icmp ugt i64 %0, 3 + br i1 %1, label %T, label %trap + +; CHECK: entry: +; HECK-NEXT: ret i32 4 + +trap: ; preds = %0, %entry + tail call void @llvm.trap() noreturn nounwind + unreachable + +T: + ret i32 4 +} + +declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readonly + +declare void @llvm.trap() nounwind diff --git a/test/Transforms/ConstProp/basictest.ll b/test/Transforms/ConstProp/basictest.ll index 14580c1eab28..df57fb6870b8 100644 --- a/test/Transforms/ConstProp/basictest.ll +++ b/test/Transforms/ConstProp/basictest.ll @@ -31,3 +31,12 @@ bb: ; CHECK: @test2 ; CHECK: ret i1 true } + +define i1 @TNAN() { +; CHECK: @TNAN +; CHECK: ret i1 true + %A = fcmp uno double 0x7FF8000000000000, 1.000000e+00 + %B = fcmp uno double 1.230000e+02, 1.000000e+00 + %C = or i1 %A, %B + ret i1 %C +} diff --git a/test/Transforms/ConstProp/bitcast.ll b/test/Transforms/ConstProp/bitcast.ll index bf943c971f3a..53239c7e4fe0 100644 --- a/test/Transforms/ConstProp/bitcast.ll +++ b/test/Transforms/ConstProp/bitcast.ll @@ -1,2 +1,10 @@ -; RUN: llvm-as < %s | llvm-dis | grep 0x36A0000000000000 -@A = global float 0x36A0000000000000 ; <float*> [#uses=0] +; RUN: opt < %s -constprop -S | FileCheck %s +; PR2165 + +define <1 x i64> @test1() { + %A = bitcast i64 63 to <1 x i64> + ret <1 x i64> %A +; CHECK: @test1 +; CHECK: ret <1 x i64> <i64 63> +} + diff --git a/test/Transforms/ConstProp/bitcast2.ll b/test/Transforms/ConstProp/bitcast2.ll deleted file mode 100644 index 5c5eab1879c3..000000000000 --- a/test/Transforms/ConstProp/bitcast2.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep bitcast -; PR2165 - -define <1 x i64> @test() { - %A = bitcast i64 63 to <1 x i64> - ret <1 x i64> %A -} - diff --git a/test/Transforms/ConstProp/calls.ll b/test/Transforms/ConstProp/calls.ll index 3c266fe62ed8..82d73245ad15 100644 --- a/test/Transforms/ConstProp/calls.ll +++ b/test/Transforms/ConstProp/calls.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -constprop -S | not grep call +; RUN: opt < %s -constprop -S | FileCheck %s declare double @cos(double) @@ -8,23 +8,49 @@ declare double @tan(double) declare double @sqrt(double) -declare i1 @llvm.isunordered.f64(double, double) - define double @T() { - %A = call double @cos( double 0.000000e+00 ) ; <double> [#uses=1] - %B = call double @sin( double 0.000000e+00 ) ; <double> [#uses=1] - %a = fadd double %A, %B ; <double> [#uses=1] - %C = call double @tan( double 0.000000e+00 ) ; <double> [#uses=1] - %b = fadd double %a, %C ; <double> [#uses=1] - %D = call double @sqrt( double 4.000000e+00 ) ; <double> [#uses=1] - %c = fadd double %b, %D ; <double> [#uses=1] - ret double %c +; CHECK: @T +; CHECK-NOT: call +; CHECK: ret + %A = call double @cos(double 0.000000e+00) + %B = call double @sin(double 0.000000e+00) + %a = fadd double %A, %B + %C = call double @tan(double 0.000000e+00) + %b = fadd double %a, %C + %D = call double @sqrt(double 4.000000e+00) + %c = fadd double %b, %D + ret double %c } -define i1 @TNAN() { - %A = fcmp uno double 0x7FF8000000000000, 1.000000e+00 ; <i1> [#uses=1] - %B = fcmp uno double 1.230000e+02, 1.000000e+00 ; <i1> [#uses=1] - %C = or i1 %A, %B ; <i1> [#uses=1] - ret i1 %C +define i1 @test_sse_cvt() nounwind readnone { +; CHECK: @test_sse_cvt +; CHECK-NOT: call +; CHECK: ret i1 true +entry: + %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind + %i1 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind + %i2 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind + %i3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind + %i4 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 1.75, double undef>) nounwind + %i5 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> <double 1.75, double undef>) nounwind + %i6 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 1.75, double undef>) nounwind + %i7 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> <double 1.75, double undef>) nounwind + %sum11 = add i32 %i0, %i1 + %sum12 = add i32 %i4, %i5 + %sum1 = add i32 %sum11, %sum12 + %sum21 = add i64 %i2, %i3 + %sum22 = add i64 %i6, %i7 + %sum2 = add i64 %sum21, %sum22 + %sum1.sext = sext i32 %sum1 to i64 + %b = icmp eq i64 %sum1.sext, %sum2 + ret i1 %b } +declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone +declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone +declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone +declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone +declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone +declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone +declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone +declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone diff --git a/test/Transforms/ConstProp/constant-expr.ll b/test/Transforms/ConstProp/constant-expr.ll index 556ed1f652af..1088fa6959ad 100644 --- a/test/Transforms/ConstProp/constant-expr.ll +++ b/test/Transforms/ConstProp/constant-expr.ll @@ -65,3 +65,47 @@ ; No check line. This used to crash llvm-as. @T6 = global <2 x i1> fcmp ole (<2 x float> fdiv (<2 x float> undef, <2 x float> <float 1.000000e+00, float 1.000000e+00>), <2 x float> zeroinitializer) + + +; PR9011 + +@pr9011_1 = constant <4 x i32> zext (<4 x i8> zeroinitializer to <4 x i32>) +; CHECK: pr9011_1 = constant <4 x i32> zeroinitializer +@pr9011_2 = constant <4 x i32> sext (<4 x i8> zeroinitializer to <4 x i32>) +; CHECK: pr9011_2 = constant <4 x i32> zeroinitializer +@pr9011_3 = constant <4 x i32> bitcast (<16 x i8> zeroinitializer to <4 x i32>) +; CHECK: pr9011_3 = constant <4 x i32> zeroinitializer +@pr9011_4 = constant <4 x float> uitofp (<4 x i8> zeroinitializer to <4 x float>) +; CHECK: pr9011_4 = constant <4 x float> zeroinitializer +@pr9011_5 = constant <4 x float> sitofp (<4 x i8> zeroinitializer to <4 x float>) +; CHECK: pr9011_5 = constant <4 x float> zeroinitializer +@pr9011_6 = constant <4 x i32> fptosi (<4 x float> zeroinitializer to <4 x i32>) +; CHECK: pr9011_6 = constant <4 x i32> zeroinitializer +@pr9011_7 = constant <4 x i32> fptoui (<4 x float> zeroinitializer to <4 x i32>) +; CHECK: pr9011_7 = constant <4 x i32> zeroinitializer +@pr9011_8 = constant <4 x float> fptrunc (<4 x double> zeroinitializer to <4 x float>) +; CHECK: pr9011_8 = constant <4 x float> zeroinitializer +@pr9011_9 = constant <4 x double> fpext (<4 x float> zeroinitializer to <4 x double>) +; CHECK: pr9011_9 = constant <4 x double> zeroinitializer + +@pr9011_10 = constant <4 x double> bitcast (i256 0 to <4 x double>) +; CHECK: pr9011_10 = constant <4 x double> zeroinitializer +@pr9011_11 = constant <4 x float> bitcast (i128 0 to <4 x float>) +; CHECK: pr9011_11 = constant <4 x float> zeroinitializer +@pr9011_12 = constant <4 x i32> bitcast (i128 0 to <4 x i32>) +; CHECK: pr9011_12 = constant <4 x i32> zeroinitializer +@pr9011_13 = constant i256 bitcast (<4 x double> zeroinitializer to i256) +; CHECK: pr9011_13 = constant i256 0 +@pr9011_14 = constant i128 bitcast (<4 x float> zeroinitializer to i128) +; CHECK: pr9011_14 = constant i128 0 +@pr9011_15 = constant i128 bitcast (<4 x i32> zeroinitializer to i128) +; CHECK: pr9011_15 = constant i128 0 + +@select = internal constant + i32 select (i1 icmp ult (i32 ptrtoint (i8* @X to i32), + i32 ptrtoint (i8* @Y to i32)), + i32 select (i1 icmp ult (i32 ptrtoint (i8* @X to i32), + i32 ptrtoint (i8* @Y to i32)), + i32 10, i32 20), + i32 30) +; CHECK: select = internal constant i32 select {{.*}} i32 10, i32 30 diff --git a/test/Transforms/ConstProp/extractvalue.ll b/test/Transforms/ConstProp/extractvalue.ll new file mode 100644 index 000000000000..32d529181b1f --- /dev/null +++ b/test/Transforms/ConstProp/extractvalue.ll @@ -0,0 +1,68 @@ +; RUN: opt < %s -constprop -S | FileCheck %s + +%struct = type { i32, [4 x i8] } +%array = type [3 x %struct] + +define i32 @test1() { + %A = extractvalue %struct { i32 2, [4 x i8] c"foo\00" }, 0 + ret i32 %A +; CHECK: @test1 +; CHECK: ret i32 2 +} + +define i8 @test2() { + %A = extractvalue %struct { i32 2, [4 x i8] c"foo\00" }, 1, 2 + ret i8 %A +; CHECK: @test2 +; CHECK: ret i8 111 +} + +define i32 @test3() { + %A = extractvalue %array [ %struct { i32 0, [4 x i8] c"aaaa" }, %struct { i32 1, [4 x i8] c"bbbb" }, %struct { i32 2, [4 x i8] c"cccc" } ], 1, 0 + ret i32 %A +; CHECK: @test3 +; CHECK: ret i32 1 +} + +define i32 @zeroinitializer-test1() { + %A = extractvalue %struct zeroinitializer, 0 + ret i32 %A +; CHECK: @zeroinitializer-test1 +; CHECK: ret i32 0 +} + +define i8 @zeroinitializer-test2() { + %A = extractvalue %struct zeroinitializer, 1, 2 + ret i8 %A +; CHECK: @zeroinitializer-test2 +; CHECK: ret i8 0 +} + +define i32 @zeroinitializer-test3() { + %A = extractvalue %array zeroinitializer, 1, 0 + ret i32 %A +; CHECK: @zeroinitializer-test3 +; CHECK: ret i32 0 +} + +define i32 @undef-test1() { + %A = extractvalue %struct undef, 0 + ret i32 %A +; CHECK: @undef-test1 +; CHECK: ret i32 undef +} + +define i8 @undef-test2() { + %A = extractvalue %struct undef, 1, 2 + ret i8 %A +; CHECK: @undef-test2 +; CHECK: ret i8 undef +} + +define i32 @undef-test3() { + %A = extractvalue %array undef, 1, 0 + ret i32 %A +; CHECK: @undef-test3 +; CHECK: ret i32 undef +} + diff --git a/test/Transforms/ConstProp/insertvalue.ll b/test/Transforms/ConstProp/insertvalue.ll new file mode 100644 index 000000000000..f0eb553b2144 --- /dev/null +++ b/test/Transforms/ConstProp/insertvalue.ll @@ -0,0 +1,68 @@ +; RUN: opt < %s -constprop -S | FileCheck %s + +%struct = type { i32, [4 x i8] } +%array = type [3 x %struct] + +define %struct @test1() { + %A = insertvalue %struct { i32 2, [4 x i8] c"foo\00" }, i32 1, 0 + ret %struct %A +; CHECK: @test1 +; CHECK: ret %struct { i32 1, [4 x i8] c"foo\00" } +} + +define %struct @test2() { + %A = insertvalue %struct { i32 2, [4 x i8] c"foo\00" }, i8 1, 1, 2 + ret %struct %A +; CHECK: @test2 +; CHECK: ret %struct { i32 2, [4 x i8] c"fo\01\00" } +} + +define %array @test3() { + %A = insertvalue %array [ %struct { i32 0, [4 x i8] c"aaaa" }, %struct { i32 1, [4 x i8] c"bbbb" }, %struct { i32 2, [4 x i8] c"cccc" } ], i32 -1, 1, 0 + ret %array %A +; CHECK: @test3 +; CHECK:ret %array [%struct { i32 0, [4 x i8] c"aaaa" }, %struct { i32 -1, [4 x i8] c"bbbb" }, %struct { i32 2, [4 x i8] c"cccc" }] +} + +define %struct @zeroinitializer-test1() { + %A = insertvalue %struct zeroinitializer, i32 1, 0 + ret %struct %A +; CHECK: @zeroinitializer-test1 +; CHECK: ret %struct { i32 1, [4 x i8] zeroinitializer } +} + +define %struct @zeroinitializer-test2() { + %A = insertvalue %struct zeroinitializer, i8 1, 1, 2 + ret %struct %A +; CHECK: @zeroinitializer-test2 +; CHECK: ret %struct { i32 0, [4 x i8] c"\00\00\01\00" } +} + +define %array @zeroinitializer-test3() { + %A = insertvalue %array zeroinitializer, i32 1, 1, 0 + ret %array %A +; CHECK: @zeroinitializer-test3 +; CHECK: ret %array [%struct zeroinitializer, %struct { i32 1, [4 x i8] zeroinitializer }, %struct zeroinitializer] +} + +define %struct @undef-test1() { + %A = insertvalue %struct undef, i32 1, 0 + ret %struct %A +; CHECK: @undef-test1 +; CHECK: ret %struct { i32 1, [4 x i8] undef } +} + +define %struct @undef-test2() { + %A = insertvalue %struct undef, i8 0, 1, 2 + ret %struct %A +; CHECK: @undef-test2 +; CHECK: ret %struct { i32 undef, [4 x i8] [i8 undef, i8 undef, i8 0, i8 undef] } +} + +define %array @undef-test3() { + %A = insertvalue %array undef, i32 0, 1, 0 + ret %array %A +; CHECK: @undef-test3 +; CHECK: ret %array [%struct undef, %struct { i32 0, [4 x i8] undef }, %struct undef] +} + diff --git a/test/Transforms/ConstProp/loads.ll b/test/Transforms/ConstProp/loads.ll index 9fbba2b35528..74d80aa18729 100644 --- a/test/Transforms/ConstProp/loads.ll +++ b/test/Transforms/ConstProp/loads.ll @@ -120,3 +120,20 @@ define i1 @test13() { ; CHECK: @test13 ; CHECK: ret i1 false } + +@g6 = constant [2 x i8*] [i8* inttoptr (i64 1 to i8*), i8* inttoptr (i64 2 to i8*)] +define i64 @test14() nounwind { +entry: + %tmp = load i64* bitcast ([2 x i8*]* @g6 to i64*) + ret i64 %tmp +; CHECK: @test14 +; CHECK: ret i64 1 +} + +define i64 @test15() nounwind { +entry: + %tmp = load i64* bitcast (i8** getelementptr inbounds ([2 x i8*]* @g6, i32 0, i64 1) to i64*) + ret i64 %tmp +; CHECK: @test15 +; CHECK: ret i64 2 +} diff --git a/test/Transforms/ConstProp/logicaltest.ll b/test/Transforms/ConstProp/logicaltest.ll index 7a90a7199f8d..c74296aa2c0c 100644 --- a/test/Transforms/ConstProp/logicaltest.ll +++ b/test/Transforms/ConstProp/logicaltest.ll @@ -1,7 +1,7 @@ ; Ensure constant propogation of logical instructions is working correctly. -; RUN: opt < %s -constprop -die -S | \ -; RUN: not egrep {and|or|xor} +; RUN: opt < %s -constprop -die -S | FileCheck %s +; CHECK-NOT: {{and|or|xor}} define i32 @test1() { %R = and i32 4, 1234 ; <i32> [#uses=1] diff --git a/test/Transforms/ConstProp/nottest.ll b/test/Transforms/ConstProp/nottest.ll deleted file mode 100644 index 799cecaae60a..000000000000 --- a/test/Transforms/ConstProp/nottest.ll +++ /dev/null @@ -1,19 +0,0 @@ -; Ensure constant propogation of 'not' instructions is working correctly. - -; RUN: opt < %s -constprop -die -S | not grep xor - -define i32 @test1() { - %R = xor i32 4, -1 ; <i32> [#uses=1] - ret i32 %R -} - -define i32 @test2() { - %R = xor i32 -23, -1 ; <i32> [#uses=1] - ret i32 %R -} - -define i1 @test3() { - %R = xor i1 true, true ; <i1> [#uses=1] - ret i1 %R -} - diff --git a/test/Transforms/ConstProp/overflow-ops.ll b/test/Transforms/ConstProp/overflow-ops.ll index 1547a4d0f5b8..5587e9b62330 100644 --- a/test/Transforms/ConstProp/overflow-ops.ll +++ b/test/Transforms/ConstProp/overflow-ops.ll @@ -170,3 +170,14 @@ declare {i8, i1} @llvm.usub.with.overflow.i8(i8, i8) declare {i8, i1} @llvm.sadd.with.overflow.i8(i8, i8) declare {i8, i1} @llvm.ssub.with.overflow.i8(i8, i8) +declare {i8, i1} @llvm.smul.with.overflow.i8(i8, i8) + +; rdar://8501501 +define {i8, i1} @smul_1() nounwind { +entry: + %t = call {i8, i1} @llvm.smul.with.overflow.i8(i8 -20, i8 -10) + ret {i8, i1} %t + +; CHECK: @smul_1 +; CHECK: ret %i8i1 { i8 -56, i1 true } +} diff --git a/test/Transforms/ConstantMerge/2011-01-15-EitherOrder.ll b/test/Transforms/ConstantMerge/2011-01-15-EitherOrder.ll new file mode 100644 index 000000000000..f561daf66781 --- /dev/null +++ b/test/Transforms/ConstantMerge/2011-01-15-EitherOrder.ll @@ -0,0 +1,18 @@ +; RUN: opt -constmerge %s -S -o - | FileCheck %s +; PR8978 + +declare i32 @zed(%struct.foobar*, %struct.foobar*) + +%struct.foobar = type { i32 } +; CHECK: bar.d +@bar.d = unnamed_addr constant %struct.foobar zeroinitializer, align 4 +; CHECK-NOT: foo.d +@foo.d = internal constant %struct.foobar zeroinitializer, align 4 +define i32 @main() nounwind ssp { +entry: +; CHECK: bar.d + %call2 = tail call i32 @zed(%struct.foobar* @foo.d, %struct.foobar* @bar.d) +nounwind + ret i32 0 +} + diff --git a/test/Transforms/ConstantMerge/merge-both.ll b/test/Transforms/ConstantMerge/merge-both.ll new file mode 100644 index 000000000000..0282f464aeee --- /dev/null +++ b/test/Transforms/ConstantMerge/merge-both.ll @@ -0,0 +1,26 @@ +; RUN: opt -constmerge %s -S -o - | FileCheck %s +; Test that in one run var3 is merged into var2 and var1 into var4. + +declare void @zed(%struct.foobar*, %struct.foobar*) + +%struct.foobar = type { i32 } + +@var1 = internal constant %struct.foobar { i32 2 } +@var2 = unnamed_addr constant %struct.foobar { i32 2 } +@var3 = internal constant %struct.foobar { i32 2 } +@var4 = unnamed_addr constant %struct.foobar { i32 2 } + +; CHECK: %struct.foobar = type { i32 } +; CHECK-NOT: @ +; CHECK: @var2 = constant %struct.foobar { i32 2 } +; CHECK-NEXT: @var4 = constant %struct.foobar { i32 2 } +; CHECK-NOT: @ +; CHECK: declare void @zed(%struct.foobar*, %struct.foobar*) + +define i32 @main() { +entry: + call void @zed(%struct.foobar* @var1, %struct.foobar* @var2) + call void @zed(%struct.foobar* @var3, %struct.foobar* @var4) + ret i32 0 +} + diff --git a/test/Transforms/ConstantMerge/unnamed-addr.ll b/test/Transforms/ConstantMerge/unnamed-addr.ll new file mode 100644 index 000000000000..24100837aabd --- /dev/null +++ b/test/Transforms/ConstantMerge/unnamed-addr.ll @@ -0,0 +1,40 @@ +; RUN: opt -constmerge %s -S -o - | FileCheck %s +; Test which corresponding x and y are merged and that unnamed_addr +; is correctly set. + +declare void @zed(%struct.foobar*, %struct.foobar*) + +%struct.foobar = type { i32 } + +@test1.x = internal constant %struct.foobar { i32 1 } +@test1.y = constant %struct.foobar { i32 1 } + +@test2.x = internal constant %struct.foobar { i32 2 } +@test2.y = unnamed_addr constant %struct.foobar { i32 2 } + +@test3.x = internal unnamed_addr constant %struct.foobar { i32 3 } +@test3.y = constant %struct.foobar { i32 3 } + +@test4.x = internal unnamed_addr constant %struct.foobar { i32 4 } +@test4.y = unnamed_addr constant %struct.foobar { i32 4 } + + +; CHECK: %struct.foobar = type { i32 } +; CHECK-NOT: @ +; CHECK: @test1.x = internal constant %struct.foobar { i32 1 } +; CHECK-NEXT: @test1.y = constant %struct.foobar { i32 1 } +; CHECK-NEXT: @test2.y = constant %struct.foobar { i32 2 } +; CHECK-NEXT: @test3.y = constant %struct.foobar { i32 3 } +; CHECK-NEXT: @test4.y = unnamed_addr constant %struct.foobar { i32 4 } +; CHECK-NOT: @ +; CHECK: declare void @zed(%struct.foobar*, %struct.foobar*) + +define i32 @main() { +entry: + call void @zed(%struct.foobar* @test1.x, %struct.foobar* @test1.y) + call void @zed(%struct.foobar* @test2.x, %struct.foobar* @test2.y) + call void @zed(%struct.foobar* @test3.x, %struct.foobar* @test3.y) + call void @zed(%struct.foobar* @test4.x, %struct.foobar* @test4.y) + ret i32 0 +} + diff --git a/test/Transforms/CorrelatedValuePropagation/2010-09-26-MergeConstantRange.ll b/test/Transforms/CorrelatedValuePropagation/2010-09-26-MergeConstantRange.ll new file mode 100644 index 000000000000..9ccc7870631e --- /dev/null +++ b/test/Transforms/CorrelatedValuePropagation/2010-09-26-MergeConstantRange.ll @@ -0,0 +1,82 @@ +; RUN: opt < %s -jump-threading -correlated-propagation + +%struct.S2 = type {} + +@g_128 = external global %struct.S2, align 1 +@g_106 = external global i16, align 2 + +define void @int328(i16 signext %p_82) noreturn nounwind ssp { +entry: + %tobool3 = icmp eq i16 %p_82, 0 + br label %for.cond.outer + +for.cond.outer: ; preds = %for.cond.loopexit, %entry + br label %for.cond + +for.cond.loopexit: ; preds = %bb.nph, %for.cond9.preheader + br label %for.cond.outer + +for.cond.loopexit4.us-lcssa: ; preds = %if.then + br label %for.cond.loopexit4 + +for.cond.loopexit4: ; preds = %for.cond.loopexit4.us-lcssa.us, %for.cond.loopexit4.us-lcssa + br label %for.cond.backedge + +for.cond: ; preds = %for.cond.backedge, %for.cond.outer + br i1 %tobool3, label %for.cond.split.us, label %for.cond.for.cond.split_crit_edge + +for.cond.for.cond.split_crit_edge: ; preds = %for.cond + br label %lbl_133 + +for.cond.split.us: ; preds = %for.cond + br label %lbl_133.us + +lbl_133.us: ; preds = %lbl_134.us, %for.cond.split.us + br i1 undef, label %if.else14.us-lcssa.us, label %if.then.us + +lbl_134.us: ; preds = %if.then.us + br i1 icmp eq (i16 ptrtoint (%struct.S2* @g_128 to i16), i16 0), label %for.cond9.preheader.us-lcssa.us, label %lbl_133.us + +if.then.us: ; preds = %lbl_133.us + br i1 true, label %for.cond.loopexit4.us-lcssa.us, label %lbl_134.us + +if.else14.us-lcssa.us: ; preds = %lbl_133.us + br label %if.else14 + +for.cond9.preheader.us-lcssa.us: ; preds = %lbl_134.us + br label %for.cond9.preheader + +for.cond.loopexit4.us-lcssa.us: ; preds = %if.then.us + br label %for.cond.loopexit4 + +lbl_133: ; preds = %lbl_134, %for.cond.for.cond.split_crit_edge + %l_109.0 = phi i16 [ 0, %for.cond.for.cond.split_crit_edge ], [ ptrtoint (%struct.S2* @g_128 to i16), %lbl_134 ] + %tobool = icmp eq i32 undef, 0 + br i1 %tobool, label %if.else14.us-lcssa, label %if.then + +if.then: ; preds = %lbl_133 + br i1 false, label %for.cond.loopexit4.us-lcssa, label %lbl_134 + +lbl_134: ; preds = %if.then + br i1 icmp eq (i16 ptrtoint (%struct.S2* @g_128 to i16), i16 0), label %for.cond9.preheader.us-lcssa, label %lbl_133 + +for.cond9.preheader.us-lcssa: ; preds = %lbl_134 + br label %for.cond9.preheader + +for.cond9.preheader: ; preds = %for.cond9.preheader.us-lcssa, %for.cond9.preheader.us-lcssa.us + br i1 undef, label %bb.nph, label %for.cond.loopexit + +bb.nph: ; preds = %for.cond9.preheader + br label %for.cond.loopexit + +if.else14.us-lcssa: ; preds = %lbl_133 + br label %if.else14 + +if.else14: ; preds = %if.else14.us-lcssa, %if.else14.us-lcssa.us + %l_109.0.lcssa = phi i16 [ %l_109.0, %if.else14.us-lcssa ], [ 0, %if.else14.us-lcssa.us ] + store i16 undef, i16* @g_106, align 2 + br label %for.cond.backedge + +for.cond.backedge: ; preds = %if.else14, %for.cond.loopexit4 + br label %for.cond +} diff --git a/test/Transforms/CorrelatedValuePropagation/basic.ll b/test/Transforms/CorrelatedValuePropagation/basic.ll index 24666e901e9e..270c048e2f98 100644 --- a/test/Transforms/CorrelatedValuePropagation/basic.ll +++ b/test/Transforms/CorrelatedValuePropagation/basic.ll @@ -52,9 +52,8 @@ bb: ; preds = %entry ret i8 0 bb2: ; preds = %entry -; CHECK-NOT: load i8* %a +; CHECK: %should_be_const = load i8* @gv %should_be_const = load i8* %a -; CHECK: ret i8 7 ret i8 %should_be_const } diff --git a/test/Transforms/CorrelatedValuePropagation/crash.ll b/test/Transforms/CorrelatedValuePropagation/crash.ll new file mode 100644 index 000000000000..80c43d0f1da5 --- /dev/null +++ b/test/Transforms/CorrelatedValuePropagation/crash.ll @@ -0,0 +1,37 @@ +; RUN: opt < %s -correlated-propagation + +; PR8161 +define void @test1() nounwind ssp { +entry: + br label %for.end + +for.cond.us.us: ; preds = %for.cond.us.us + %cmp6.i.us.us = icmp sgt i32 1, 0 + %lor.ext.i.us.us = zext i1 %cmp6.i.us.us to i32 + %lor.ext.add.i.us.us = select i1 %cmp6.i.us.us, i32 %lor.ext.i.us.us, i32 undef + %conv.i.us.us = trunc i32 %lor.ext.add.i.us.us to i16 + %sext.us.us = shl i16 %conv.i.us.us, 8 + %conv6.us.us = ashr i16 %sext.us.us, 8 + %and.us.us = and i16 %conv6.us.us, %and.us.us + br i1 false, label %for.end, label %for.cond.us.us + +for.end: ; preds = %for.cond.us, %for.cond.us.us, %entry + ret void +} + +; PR 8790 +define void @test2() nounwind ssp { +entry: + br label %func_29.exit + +sdf.exit.i: + %l_44.1.mux.i = select i1 %tobool5.not.i, i8 %l_44.1.mux.i, i8 1 + br label %srf.exit.i + +srf.exit.i: + %tobool5.not.i = icmp ne i8 undef, 0 + br i1 %tobool5.not.i, label %sdf.exit.i, label %func_29.exit + +func_29.exit: + ret void +} diff --git a/test/Transforms/CorrelatedValuePropagation/non-null.ll b/test/Transforms/CorrelatedValuePropagation/non-null.ll new file mode 100644 index 000000000000..b14abd83694a --- /dev/null +++ b/test/Transforms/CorrelatedValuePropagation/non-null.ll @@ -0,0 +1,103 @@ +; RUN: opt < %s -correlated-propagation -S | FileCheck %s + +define void @test1(i8* %ptr) { +; CHECK: test1 + %A = load i8* %ptr + br label %bb +bb: + icmp ne i8* %ptr, null +; CHECK-NOT: icmp + ret void +} + +define void @test2(i8* %ptr) { +; CHECK: test2 + store i8 0, i8* %ptr + br label %bb +bb: + icmp ne i8* %ptr, null +; CHECK-NOT: icmp + ret void +} + +define void @test3() { +; CHECK: test3 + %ptr = alloca i8 + br label %bb +bb: + icmp ne i8* %ptr, null +; CHECK-NOT: icmp + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) +define void @test4(i8* %dest, i8* %src) { +; CHECK: test4 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 1, i32 1, i1 false) + br label %bb +bb: + icmp ne i8* %dest, null + icmp ne i8* %src, null +; CHECK-NOT: icmp + ret void +} + +declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) +define void @test5(i8* %dest, i8* %src) { +; CHECK: test5 + call void @llvm.memmove.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 1, i32 1, i1 false) + br label %bb +bb: + icmp ne i8* %dest, null + icmp ne i8* %src, null +; CHECK-NOT: icmp + ret void +} + +declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i32, i1) +define void @test6(i8* %dest) { +; CHECK: test6 + call void @llvm.memset.p0i8.i32(i8* %dest, i8 255, i32 1, i32 1, i1 false) + br label %bb +bb: + icmp ne i8* %dest, null +; CHECK-NOT: icmp + ret void +} + +define void @test7(i8* %dest, i8* %src, i32 %len) { +; CHECK: test7 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i32 1, i1 false) + br label %bb +bb: + %KEEP1 = icmp ne i8* %dest, null +; CHECK: KEEP1 + %KEEP2 = icmp ne i8* %src, null +; CHECK: KEEP2 + ret void +} + +declare void @llvm.memcpy.p1i8.p1i8.i32(i8 addrspace(1) *, i8 addrspace(1) *, i32, i32, i1) +define void @test8(i8 addrspace(1) * %dest, i8 addrspace(1) * %src) { +; CHECK: test8 + call void @llvm.memcpy.p1i8.p1i8.i32(i8 addrspace(1) * %dest, i8 addrspace(1) * %src, i32 1, i32 1, i1 false) + br label %bb +bb: + %KEEP1 = icmp ne i8 addrspace(1) * %dest, null +; CHECK: KEEP1 + %KEEP2 = icmp ne i8 addrspace(1) * %src, null +; CHECK: KEEP2 + ret void +} + +define void @test9(i8* %dest, i8* %src) { +; CHECK: test9 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 1, i32 1, i1 true) + br label %bb +bb: + %KEEP1 = icmp ne i8* %dest, null +; CHECK: KEEP1 + %KEEP2 = icmp ne i8* %src, null +; CHECK: KEEP2 + ret void +} diff --git a/test/Transforms/DeadArgElim/deadexternal.ll b/test/Transforms/DeadArgElim/deadexternal.ll index 7256b93af1a2..5a80aba6e2db 100644 --- a/test/Transforms/DeadArgElim/deadexternal.ll +++ b/test/Transforms/DeadArgElim/deadexternal.ll @@ -1,5 +1,4 @@ ; RUN: opt -deadargelim -S %s | FileCheck %s -; XFAIL: * define void @test(i32) { ret void @@ -11,3 +10,30 @@ define void @foo() { ; CHECK: @foo ; CHECK: i32 undef } + +define void @f(i32 %X) { +entry: + tail call void @sideeffect() nounwind + ret void +} + +declare void @sideeffect() + +define void @g(i32 %n) { +entry: + %add = add nsw i32 %n, 1 +; CHECK: tail call void @f(i32 undef) + tail call void @f(i32 %add) + ret void +} + +define void @h() { +entry: + %i = alloca i32, align 4 + volatile store i32 10, i32* %i, align 4 +; CHECK: %tmp = volatile load i32* %i, align 4 +; CHECK-next: call void @f(i32 undef) + %tmp = volatile load i32* %i, align 4 + call void @f(i32 %tmp) + ret void +} diff --git a/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll b/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll deleted file mode 100644 index d1a9dd8fb59a..000000000000 --- a/test/Transforms/DeadStoreElimination/2004-11-28-LiveStoreDeleted.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: opt < %s -dse -scalarrepl -instcombine | \ -; RUN: llvm-dis | not grep {ret i32 undef} - -define i32 @test(double %__x) { - %__u = alloca { [3 x i32] } ; <{ [3 x i32] }*> [#uses=2] - %tmp.1 = bitcast { [3 x i32] }* %__u to double* ; <double*> [#uses=1] - store double %__x, double* %tmp.1 - %tmp.4 = getelementptr { [3 x i32] }* %__u, i32 0, i32 0, i32 1 ; <i32*> [#uses=1] - %tmp.5 = load i32* %tmp.4 ; <i32> [#uses=1] - %tmp.6 = icmp slt i32 %tmp.5, 0 ; <i1> [#uses=1] - %tmp.7 = zext i1 %tmp.6 to i32 ; <i32> [#uses=1] - ret i32 %tmp.7 -} - diff --git a/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll b/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll deleted file mode 100644 index cae2a6f50a50..000000000000 --- a/test/Transforms/DeadStoreElimination/2004-12-28-PartialStore.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: opt < %s -dse -S | \ -; RUN: grep {store i32 1234567} - -; Do not delete stores that are only partially killed. - -define i32 @test() { - %V = alloca i32 ; <i32*> [#uses=3] - store i32 1234567, i32* %V - %V2 = bitcast i32* %V to i8* ; <i8*> [#uses=1] - store i8 0, i8* %V2 - %X = load i32* %V ; <i32> [#uses=1] - ret i32 %X -} diff --git a/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll b/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll deleted file mode 100644 index 147ec84efe55..000000000000 --- a/test/Transforms/DeadStoreElimination/2005-11-30-vaarg.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: opt < %s -dse -S | grep store - -define double @foo(i8* %X) { - %X_addr = alloca i8* ; <i8**> [#uses=2] - store i8* %X, i8** %X_addr - %tmp.0 = va_arg i8** %X_addr, double ; <double> [#uses=1] - ret double %tmp.0 -} - diff --git a/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll b/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll deleted file mode 100644 index 0b0830685f44..000000000000 --- a/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll +++ /dev/null @@ -1,1113 +0,0 @@ -; RUN: opt < %s -globalsmodref-aa -dse -disable-output -target datalayout = "E-p:32:32" -target triple = "powerpc-apple-darwin8" - %struct.ECacheType = type { i32, i32, i32 } - %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } - %struct.QTType = type { i8, i8, i16, i32, i32, i32 } - %struct.TType = type { i8, i8, i8, i8, i16, i32, i32, i32 } - %struct._RuneEntry = type { i32, i32, i32, i32* } - %struct._RuneLocale = type { [8 x i8], [32 x i8], i32 (i8*, i32, i8**)*, i32 (i32, i8*, i32, i8**)*, i32, [256 x i32], [256 x i32], [256 x i32], %struct._RuneRange, %struct._RuneRange, %struct._RuneRange, i8*, i32 } - %struct._RuneRange = type { i32, %struct._RuneEntry* } - %struct.__sFILEX = type opaque - %struct.__sbuf = type { i8*, i32 } - %struct.move_s = type { i32, i32, i32, i32, i32, i32 } - %struct.move_x = type { i32, i32, i32, i32 } - %struct.node_t = type { i8, i8, i8, i8, i32, i32, %struct.node_t**, %struct.node_t*, %struct.move_s } - %struct.see_data = type { i32, i32 } -@rook_o.2925 = internal global [4 x i32] [ i32 12, i32 -12, i32 1, i32 -1 ] ; <[4 x i32]*> [#uses=0] -@bishop_o.2926 = internal global [4 x i32] [ i32 11, i32 -11, i32 13, i32 -13 ] ; <[4 x i32]*> [#uses=0] -@knight_o.2927 = internal global [8 x i32] [ i32 10, i32 -10, i32 14, i32 -14, i32 23, i32 -23, i32 25, i32 -25 ] ; <[8 x i32]*> [#uses=0] -@board = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0] -@holding = internal global [2 x [16 x i32]] zeroinitializer ; <[2 x [16 x i32]]*> [#uses=0] -@hold_hash = internal global i32 0 ; <i32*> [#uses=0] -@white_hand_eval = internal global i32 0 ; <i32*> [#uses=0] -@black_hand_eval = internal global i32 0 ; <i32*> [#uses=0] -@num_holding = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0] -@zobrist = internal global [14 x [144 x i32]] zeroinitializer ; <[14 x [144 x i32]]*> [#uses=0] -@Variant = internal global i32 0 ; <i32*> [#uses=7] -@userealholdings.b = internal global i1 false ; <i1*> [#uses=1] -@realholdings = internal global [255 x i8] zeroinitializer ; <[255 x i8]*> [#uses=0] -@comp_color = internal global i32 0 ; <i32*> [#uses=0] -@C.97.3177 = internal global [13 x i32] [ i32 0, i32 2, i32 1, i32 4, i32 3, i32 0, i32 0, i32 8, i32 7, i32 10, i32 9, i32 12, i32 11 ] ; <[13 x i32]*> [#uses=0] -@str = internal global [30 x i8] c"%s:%u: failed assertion `%s'\0A\00" ; <[30 x i8]*> [#uses=0] -@str.upgrd.1 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/crazy.c\00" ; <[81 x i8]*> [#uses=0] -@str.upgrd.2 = internal global [32 x i8] c"piece > frame && piece < npiece\00" ; <[32 x i8]*> [#uses=0] -@C.101.3190 = internal global [13 x i32] [ i32 0, i32 2, i32 1, i32 2, i32 1, i32 0, i32 0, i32 2, i32 1, i32 2, i32 1, i32 2, i32 1 ] ; <[13 x i32]*> [#uses=0] -@hand_value = internal global [13 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 0, i32 0, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230 ] ; <[13 x i32]*> [#uses=0] -@material = internal global [14 x i32] zeroinitializer ; <[14 x i32]*> [#uses=0] -@Material = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.3 = internal global [23 x i8] c"holding[who][what] > 0\00" ; <[23 x i8]*> [#uses=0] -@str.upgrd.4 = internal global [24 x i8] c"holding[who][what] < 20\00" ; <[24 x i8]*> [#uses=0] -@fifty = internal global i32 0 ; <i32*> [#uses=0] -@move_number = internal global i32 0 ; <i32*> [#uses=1] -@ply = internal global i32 0 ; <i32*> [#uses=2] -@hash_history = internal global [600 x i32] zeroinitializer ; <[600 x i32]*> [#uses=1] -@hash = internal global i32 0 ; <i32*> [#uses=1] -@ECacheSize.b = internal global i1 false ; <i1*> [#uses=1] -@ECache = internal global %struct.ECacheType* null ; <%struct.ECacheType**> [#uses=1] -@ECacheProbes = internal global i32 0 ; <i32*> [#uses=1] -@ECacheHits = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.5 = internal global [34 x i8] c"Out of memory allocating ECache.\0A\00" ; <[34 x i8]*> [#uses=0] -@rankoffsets.2930 = internal global [8 x i32] [ i32 110, i32 98, i32 86, i32 74, i32 62, i32 50, i32 38, i32 26 ] ; <[8 x i32]*> [#uses=0] -@white_castled = internal global i32 0 ; <i32*> [#uses=0] -@black_castled = internal global i32 0 ; <i32*> [#uses=0] -@book_ply = internal global i32 0 ; <i32*> [#uses=0] -@bking_loc = internal global i32 0 ; <i32*> [#uses=1] -@wking_loc = internal global i32 0 ; <i32*> [#uses=1] -@white_to_move = internal global i32 0 ; <i32*> [#uses=3] -@moved = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0] -@ep_square = internal global i32 0 ; <i32*> [#uses=0] -@_DefaultRuneLocale = external global %struct._RuneLocale ; <%struct._RuneLocale*> [#uses=0] -@str.upgrd.6 = internal global [3 x i8] c"bm\00" ; <[3 x i8]*> [#uses=0] -@str1 = internal global [3 x i8] c"am\00" ; <[3 x i8]*> [#uses=0] -@str1.upgrd.7 = internal global [34 x i8] c"No best-move or avoid-move found!\00" ; <[34 x i8]*> [#uses=0] -@str.upgrd.8 = internal global [25 x i8] c"\0AName of EPD testsuite: \00" ; <[25 x i8]*> [#uses=0] -@__sF = external global [0 x %struct.FILE] ; <[0 x %struct.FILE]*> [#uses=0] -@str.upgrd.9 = internal global [21 x i8] c"\0ATime per move (s): \00" ; <[21 x i8]*> [#uses=0] -@str.upgrd.10 = internal global [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=0] -@str2 = internal global [2 x i8] c"r\00" ; <[2 x i8]*> [#uses=0] -@root_to_move = internal global i32 0 ; <i32*> [#uses=1] -@forcedwin.b = internal global i1 false ; <i1*> [#uses=2] -@fixed_time = internal global i32 0 ; <i32*> [#uses=1] -@nodes = internal global i32 0 ; <i32*> [#uses=1] -@qnodes = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.11 = internal global [29 x i8] c"\0ANodes: %i (%0.2f%% qnodes)\0A\00" ; <[29 x i8]*> [#uses=0] -@str.upgrd.12 = internal global [54 x i8] c"ECacheProbes : %u ECacheHits : %u HitRate : %f%%\0A\00" ; <[54 x i8]*> [#uses=0] -@TTStores = internal global i32 0 ; <i32*> [#uses=1] -@TTProbes = internal global i32 0 ; <i32*> [#uses=1] -@TTHits = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.13 = internal global [60 x i8] c"TTStores : %u TTProbes : %u TTHits : %u HitRate : %f%%\0A\00" ; <[60 x i8]*> [#uses=0] -@NTries = internal global i32 0 ; <i32*> [#uses=1] -@NCuts = internal global i32 0 ; <i32*> [#uses=1] -@TExt = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.14 = internal global [51 x i8] c"NTries : %u NCuts : %u CutRate : %f%% TExt: %u\0A\00" ; <[51 x i8]*> [#uses=0] -@ext_check = internal global i32 0 ; <i32*> [#uses=1] -@razor_drop = internal global i32 0 ; <i32*> [#uses=1] -@razor_material = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.15 = internal global [61 x i8] c"Check extensions: %u Razor drops : %u Razor Material : %u\0A\00" ; <[61 x i8]*> [#uses=0] -@FHF = internal global i32 0 ; <i32*> [#uses=1] -@FH = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.16 = internal global [22 x i8] c"Move ordering : %f%%\0A\00" ; <[22 x i8]*> [#uses=0] -@maxposdiff = internal global i32 0 ; <i32*> [#uses=1] -@str.upgrd.17 = internal global [47 x i8] c"Material score: %d Eval : %d MaxPosDiff: %d\0A\00" ; <[47 x i8]*> [#uses=0] -@str.upgrd.18 = internal global [17 x i8] c"Solution found.\0A\00" ; <[17 x i8]*> [#uses=0] -@str3 = internal global [21 x i8] c"Solution not found.\0A\00" ; <[21 x i8]*> [#uses=0] -@str.upgrd.19 = internal global [15 x i8] c"Solved: %d/%d\0A\00" ; <[15 x i8]*> [#uses=0] -@str.upgrd.20 = internal global [9 x i8] c"EPD: %s\0A\00" ; <[9 x i8]*> [#uses=0] -@str4 = internal global [21 x i8] c"Searching to %d ply\0A\00" ; <[21 x i8]*> [#uses=0] -@maxdepth = internal global i32 0 ; <i32*> [#uses=0] -@std_material = internal global [14 x i32] [ i32 0, i32 100, i32 -100, i32 310, i32 -310, i32 4000, i32 -4000, i32 500, i32 -500, i32 900, i32 -900, i32 325, i32 -325, i32 0 ] ; <[14 x i32]*> [#uses=0] -@zh_material = internal global [14 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 4000, i32 -4000, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230, i32 0 ] ; <[14 x i32]*> [#uses=0] -@suicide_material = internal global [14 x i32] [ i32 0, i32 15, i32 -15, i32 150, i32 -150, i32 500, i32 -500, i32 150, i32 -150, i32 50, i32 -50, i32 0, i32 0, i32 0 ] ; <[14 x i32]*> [#uses=0] -@losers_material = internal global [14 x i32] [ i32 0, i32 80, i32 -80, i32 320, i32 -320, i32 1000, i32 -1000, i32 350, i32 -350, i32 400, i32 -400, i32 270, i32 -270, i32 0 ] ; <[14 x i32]*> [#uses=0] -@Xfile = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@Xrank = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 0, i32 0, i32 0, i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@Xdiagl = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 0, i32 0, i32 0, i32 0, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 0, i32 0, i32 0, i32 0, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 0, i32 0, i32 0, i32 0, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@Xdiagr = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 0, i32 0, i32 0, i32 0, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 0, i32 0, i32 0, i32 0, i32 13, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 12, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 0, i32 0, i32 0, i32 0, i32 11, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 0, i32 0, i32 0, i32 0, i32 10, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 0, i32 0, i32 0, i32 0, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@sqcolor = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@pcsqbishop = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 10, i32 5, i32 10, i32 10, i32 5, i32 10, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 5, i32 6, i32 15, i32 15, i32 6, i32 5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 3, i32 15, i32 10, i32 10, i32 15, i32 3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 3, i32 15, i32 10, i32 10, i32 15, i32 3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 5, i32 6, i32 15, i32 15, i32 6, i32 5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 10, i32 5, i32 10, i32 10, i32 5, i32 10, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 -10, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_knight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 25, i32 25, i32 25, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 35, i32 35, i32 35, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 10, i32 25, i32 20, i32 25, i32 25, i32 10, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 20, i32 20, i32 20, i32 20, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -35, i32 -10, i32 -10, i32 -10, i32 -10, i32 -35, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_knight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -35, i32 -10, i32 -10, i32 -10, i32 -10, i32 -35, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 20, i32 20, i32 20, i32 20, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 10, i32 25, i32 20, i32 25, i32 25, i32 10, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 35, i32 35, i32 35, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 15, i32 25, i32 25, i32 25, i32 25, i32 15, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 25, i32 35, i32 5, i32 5, i32 50, i32 45, i32 30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 14, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 20, i32 20, i32 10, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 12, i32 18, i32 18, i32 27, i32 27, i32 18, i32 18, i32 18, i32 0, i32 0, i32 0, i32 0, i32 25, i32 30, i32 30, i32 35, i32 35, i32 35, i32 30, i32 25, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 30, i32 30, i32 30, i32 35, i32 35, i32 35, i32 30, i32 25, i32 0, i32 0, i32 0, i32 0, i32 12, i32 18, i32 18, i32 27, i32 27, i32 18, i32 18, i32 18, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 20, i32 20, i32 10, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 14, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 7, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 25, i32 35, i32 5, i32 5, i32 50, i32 45, i32 30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -100, i32 7, i32 4, i32 0, i32 10, i32 4, i32 7, i32 -100, i32 0, i32 0, i32 0, i32 0, i32 -250, i32 -200, i32 -150, i32 -100, i32 -100, i32 -150, i32 -200, i32 -250, i32 0, i32 0, i32 0, i32 0, i32 -350, i32 -300, i32 -300, i32 -250, i32 -250, i32 -300, i32 -300, i32 -350, i32 0, i32 0, i32 0, i32 0, i32 -400, i32 -400, i32 -400, i32 -350, i32 -350, i32 -400, i32 -400, i32 -400, i32 0, i32 0, i32 0, i32 0, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 -500, i32 0, i32 0, i32 0, i32 0, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 -450, i32 0, i32 0, i32 0, i32 0, i32 -400, i32 -400, i32 -400, i32 -350, i32 -350, i32 -400, i32 -400, i32 -400, i32 0, i32 0, i32 0, i32 0, i32 -350, i32 -300, i32 -300, i32 -250, i32 -250, i32 -300, i32 -300, i32 -350, i32 0, i32 0, i32 0, i32 0, i32 -250, i32 -200, i32 -150, i32 -100, i32 -100, i32 -150, i32 -200, i32 -250, i32 0, i32 0, i32 0, i32 0, i32 -100, i32 7, i32 4, i32 0, i32 10, i32 4, i32 7, i32 -100, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_queen = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 10, i32 10, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 0, i32 0, i32 0, i32 0, i32 -60, i32 -40, i32 -40, i32 -60, i32 -60, i32 -40, i32 -40, i32 -60, i32 0, i32 0, i32 0, i32 0, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_queen = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 -40, i32 0, i32 0, i32 0, i32 0, i32 -60, i32 -40, i32 -40, i32 -60, i32 -60, i32 -40, i32 -40, i32 -60, i32 0, i32 0, i32 0, i32 0, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 -30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 5, i32 5, i32 5, i32 10, i32 10, i32 5, i32 5, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@black_rook = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 25, i32 25, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -30, i32 -30, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@white_rook = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 7, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 -15, i32 -15, i32 -10, i32 -10, i32 -15, i32 -15, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -30, i32 -30, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 15, i32 20, i32 25, i32 25, i32 20, i32 15, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@upscale = internal global [64 x i32] [ i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117 ] ; <[64 x i32]*> [#uses=0] -@pre_p_tropism = internal global [9 x i32] [ i32 9999, i32 40, i32 20, i32 10, i32 3, i32 1, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@pre_r_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 40, i32 15, i32 5, i32 1, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@pre_n_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 70, i32 35, i32 10, i32 2, i32 1, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@pre_q_tropism = internal global [9 x i32] [ i32 9999, i32 100, i32 60, i32 20, i32 5, i32 2, i32 0, i32 0, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@pre_b_tropism = internal global [9 x i32] [ i32 9999, i32 50, i32 25, i32 15, i32 5, i32 2, i32 2, i32 2, i32 9999 ] ; <[9 x i32]*> [#uses=0] -@rookdistance = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0] -@distance = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0] -@p_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@b_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@n_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@r_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@q_tropism = internal global [144 x [144 x i8]] zeroinitializer ; <[144 x [144 x i8]]*> [#uses=0] -@cfg_devscale.b = internal global i1 false ; <i1*> [#uses=0] -@pieces = internal global [62 x i32] zeroinitializer ; <[62 x i32]*> [#uses=0] -@piece_count = internal global i32 0 ; <i32*> [#uses=1] -@cfg_smarteval.b = internal global i1 false ; <i1*> [#uses=0] -@lcentral = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 30, i32 30, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 30, i32 30, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 15, i32 15, i32 15, i32 15, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -15, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -15, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -15, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@str3.upgrd.21 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/leval.c\00" ; <[81 x i8]*> [#uses=0] -@str5 = internal global [21 x i8] c"(i > 0) && (i < 145)\00" ; <[21 x i8]*> [#uses=0] -@kingcap.b = internal global i1 false ; <i1*> [#uses=0] -@numb_moves = internal global i32 0 ; <i32*> [#uses=2] -@genfor = internal global %struct.move_s* null ; <%struct.move_s**> [#uses=0] -@captures = internal global i32 0 ; <i32*> [#uses=1] -@fcaptures.b = internal global i1 false ; <i1*> [#uses=0] -@gfrom = internal global i32 0 ; <i32*> [#uses=0] -@Giveaway.b = internal global i1 false ; <i1*> [#uses=0] -@path_x = internal global [300 x %struct.move_x] zeroinitializer ; <[300 x %struct.move_x]*> [#uses=0] -@str7 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/moves.c\00" ; <[81 x i8]*> [#uses=0] -@str8 = internal global [15 x i8] c"find_slot < 63\00" ; <[15 x i8]*> [#uses=0] -@is_promoted = internal global [62 x i32] zeroinitializer ; <[62 x i32]*> [#uses=0] -@squares = internal global [144 x i32] zeroinitializer ; <[144 x i32]*> [#uses=0] -@str.upgrd.22 = internal global [38 x i8] c"promoted > frame && promoted < npiece\00" ; <[38 x i8]*> [#uses=0] -@str1.upgrd.23 = internal global [38 x i8] c"promoted < npiece && promoted > frame\00" ; <[38 x i8]*> [#uses=0] -@evalRoutines = internal global [7 x i32 (i32, i32)*] [ i32 (i32, i32)* @ErrorIt, i32 (i32, i32)* @Pawn, i32 (i32, i32)* @Knight, i32 (i32, i32)* @King, i32 (i32, i32)* @Rook, i32 (i32, i32)* @Queen, i32 (i32, i32)* @Bishop ] ; <[7 x i32 (i32, i32)*]*> [#uses=0] -@sbishop = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 8, i32 5, i32 5, i32 5, i32 5, i32 8, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 3, i32 3, i32 5, i32 5, i32 3, i32 3, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 2, i32 5, i32 4, i32 4, i32 5, i32 2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 2, i32 5, i32 4, i32 4, i32 5, i32 2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 3, i32 3, i32 5, i32 5, i32 3, i32 3, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 8, i32 5, i32 5, i32 5, i32 5, i32 8, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 -2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@sknight = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 5, i32 5, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 10, i32 10, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 10, i32 10, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 5, i32 5, i32 5, i32 5, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 3, i32 3, i32 0, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@swhite_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 10, i32 10, i32 3, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 2, i32 4, i32 6, i32 12, i32 12, i32 6, i32 4, i32 2, i32 0, i32 0, i32 0, i32 0, i32 3, i32 6, i32 9, i32 14, i32 14, i32 9, i32 6, i32 3, i32 0, i32 0, i32 0, i32 0, i32 10, i32 12, i32 14, i32 16, i32 16, i32 14, i32 12, i32 10, i32 0, i32 0, i32 0, i32 0, i32 20, i32 22, i32 24, i32 26, i32 26, i32 24, i32 22, i32 20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@sblack_pawn = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 22, i32 24, i32 26, i32 26, i32 24, i32 22, i32 20, i32 0, i32 0, i32 0, i32 0, i32 10, i32 12, i32 14, i32 16, i32 16, i32 14, i32 12, i32 10, i32 0, i32 0, i32 0, i32 0, i32 3, i32 6, i32 9, i32 14, i32 14, i32 9, i32 6, i32 3, i32 0, i32 0, i32 0, i32 0, i32 2, i32 4, i32 6, i32 12, i32 12, i32 6, i32 4, i32 2, i32 0, i32 0, i32 0, i32 0, i32 1, i32 2, i32 3, i32 10, i32 10, i32 3, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@swhite_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 14, i32 0, i32 0, i32 0, i32 9, i32 14, i32 2, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 -5, i32 -6, i32 -6, i32 -6, i32 -6, i32 -5, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -8, i32 -8, i32 -8, i32 -8, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -8, i32 -8, i32 -13, i32 -13, i32 -13, i32 -13, i32 -8, i32 -8, i32 0, i32 0, i32 0, i32 0, i32 -13, i32 -13, i32 -21, i32 -21, i32 -21, i32 -21, i32 -13, i32 -13, i32 0, i32 0, i32 0, i32 0, i32 -21, i32 -21, i32 -34, i32 -34, i32 -34, i32 -34, i32 -21, i32 -21, i32 0, i32 0, i32 0, i32 0, i32 -34, i32 -34, i32 -55, i32 -55, i32 -55, i32 -55, i32 -34, i32 -34, i32 0, i32 0, i32 0, i32 0, i32 -55, i32 -55, i32 -89, i32 -89, i32 -89, i32 -89, i32 -55, i32 -55, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@sblack_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -55, i32 -55, i32 -89, i32 -89, i32 -89, i32 -89, i32 -55, i32 -55, i32 0, i32 0, i32 0, i32 0, i32 -34, i32 -34, i32 -55, i32 -55, i32 -55, i32 -55, i32 -34, i32 -34, i32 0, i32 0, i32 0, i32 0, i32 -21, i32 -21, i32 -34, i32 -34, i32 -34, i32 -34, i32 -21, i32 -21, i32 0, i32 0, i32 0, i32 0, i32 -13, i32 -13, i32 -21, i32 -21, i32 -21, i32 -21, i32 -13, i32 -13, i32 0, i32 0, i32 0, i32 0, i32 -8, i32 -8, i32 -13, i32 -13, i32 -13, i32 -13, i32 -8, i32 -8, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -5, i32 -8, i32 -8, i32 -8, i32 -8, i32 -5, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 -5, i32 -6, i32 -6, i32 -6, i32 -6, i32 -5, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 2, i32 14, i32 0, i32 0, i32 0, i32 9, i32 14, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@send_king = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -3, i32 -1, i32 0, i32 0, i32 -1, i32 -3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -1, i32 10, i32 25, i32 25, i32 25, i32 25, i32 10, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 25, i32 50, i32 50, i32 25, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 25, i32 50, i32 50, i32 25, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -1, i32 10, i32 25, i32 25, i32 25, i32 25, i32 10, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 -3, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 -3, i32 0, i32 0, i32 0, i32 0, i32 -5, i32 -3, i32 -1, i32 0, i32 0, i32 -1, i32 -3, i32 -5, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@srev_rank = internal global [9 x i32] [ i32 0, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1 ] ; <[9 x i32]*> [#uses=0] -@std_p_tropism = internal global [8 x i32] [ i32 9999, i32 15, i32 10, i32 7, i32 2, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0] -@std_own_p_tropism = internal global [8 x i32] [ i32 9999, i32 30, i32 10, i32 2, i32 0, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0] -@std_r_tropism = internal global [16 x i32] [ i32 9999, i32 0, i32 15, i32 5, i32 2, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[16 x i32]*> [#uses=0] -@std_n_tropism = internal global [8 x i32] [ i32 9999, i32 14, i32 9, i32 6, i32 1, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0] -@std_q_tropism = internal global [8 x i32] [ i32 9999, i32 200, i32 50, i32 15, i32 3, i32 2, i32 1, i32 0 ] ; <[8 x i32]*> [#uses=0] -@std_b_tropism = internal global [8 x i32] [ i32 9999, i32 12, i32 7, i32 5, i32 0, i32 0, i32 0, i32 0 ] ; <[8 x i32]*> [#uses=0] -@phase = internal global i32 0 ; <i32*> [#uses=1] -@dir.3001 = internal global [4 x i32] [ i32 -13, i32 -11, i32 11, i32 13 ] ; <[4 x i32]*> [#uses=0] -@dir.3021 = internal global [4 x i32] [ i32 -1, i32 1, i32 12, i32 -12 ] ; <[4 x i32]*> [#uses=0] -@king_locs = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0] -@square_d1.3081 = internal global [2 x i32] [ i32 29, i32 113 ] ; <[2 x i32]*> [#uses=0] -@wmat = internal global i32 0 ; <i32*> [#uses=0] -@bmat = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.24 = internal global [35 x i8] c"Illegal piece detected sq=%i c=%i\0A\00" ; <[35 x i8]*> [#uses=0] -@str10 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/neval.c\00" ; <[81 x i8]*> [#uses=0] -@std_hand_value = internal global [13 x i32] [ i32 0, i32 100, i32 -100, i32 210, i32 -210, i32 0, i32 0, i32 250, i32 -250, i32 450, i32 -450, i32 230, i32 -230 ] ; <[13 x i32]*> [#uses=0] -@xb_mode = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.25 = internal global [69 x i8] c"tellics ptell Hello! I am Sjeng and hope you enjoy playing with me.\0A\00" ; <[69 x i8]*> [#uses=0] -@str.upgrd.26 = internal global [76 x i8] c"tellics ptell For help on some commands that I understand, ptell me 'help'\0A\00" ; <[76 x i8]*> [#uses=0] -@str12 = internal global [3 x i8] c"%s\00" ; <[3 x i8]*> [#uses=0] -@my_partner = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0] -@str13 = internal global [25 x i8] c"tellics set f5 bughouse\0A\00" ; <[25 x i8]*> [#uses=0] -@str.upgrd.27 = internal global [16 x i8] c"tellics unseek\0A\00" ; <[16 x i8]*> [#uses=0] -@str.upgrd.28 = internal global [20 x i8] c"tellics set f5 1=1\0A\00" ; <[20 x i8]*> [#uses=0] -@str.upgrd.29 = internal global [80 x i8] c"is...uh...what did you say?\0A\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" ; <[80 x i8]*> [#uses=0] -@str.upgrd.30 = internal global [5 x i8] c"help\00" ; <[5 x i8]*> [#uses=0] -@str.upgrd.31 = internal global [147 x i8] c"tellics ptell Commands that I understand are : sit, go, fast, slow, abort, flag, +/++/+++/-/--/---{p,n,b,r,q,d,h,trades}, x, dead, formula, help.\0A\00" ; <[147 x i8]*> [#uses=0] -@str.upgrd.32 = internal global [6 x i8] c"sorry\00" ; <[6 x i8]*> [#uses=0] -@str.upgrd.33 = internal global [59 x i8] c"tellics ptell Sorry, but I'm not playing a bughouse game.\0A\00" ; <[59 x i8]*> [#uses=0] -@str.upgrd.34 = internal global [4 x i8] c"sit\00" ; <[4 x i8]*> [#uses=0] -@str.upgrd.35 = internal global [56 x i8] c"tellics ptell Ok, I sit next move. Tell me when to go.\0A\00" ; <[56 x i8]*> [#uses=0] -@must_sit.b = internal global i1 false ; <i1*> [#uses=0] -@str114 = internal global [3 x i8] c"go\00" ; <[3 x i8]*> [#uses=0] -@str2.upgrd.36 = internal global [5 x i8] c"move\00" ; <[5 x i8]*> [#uses=0] -@str.upgrd.37 = internal global [31 x i8] c"tellics ptell Ok, I'm moving.\0A\00" ; <[31 x i8]*> [#uses=0] -@str3.upgrd.38 = internal global [5 x i8] c"fast\00" ; <[5 x i8]*> [#uses=0] -@str4.upgrd.39 = internal global [5 x i8] c"time\00" ; <[5 x i8]*> [#uses=0] -@str15 = internal global [35 x i8] c"tellics ptell Ok, I'm going FAST!\0A\00" ; <[35 x i8]*> [#uses=0] -@go_fast.b = internal global i1 false ; <i1*> [#uses=0] -@str5.upgrd.40 = internal global [5 x i8] c"slow\00" ; <[5 x i8]*> [#uses=0] -@str16 = internal global [36 x i8] c"tellics ptell Ok, moving normally.\0A\00" ; <[36 x i8]*> [#uses=0] -@str6 = internal global [6 x i8] c"abort\00" ; <[6 x i8]*> [#uses=0] -@str7.upgrd.41 = internal global [35 x i8] c"tellics ptell Requesting abort...\0A\00" ; <[35 x i8]*> [#uses=0] -@str17 = internal global [15 x i8] c"tellics abort\0A\00" ; <[15 x i8]*> [#uses=0] -@str8.upgrd.42 = internal global [5 x i8] c"flag\00" ; <[5 x i8]*> [#uses=0] -@str.upgrd.43 = internal global [27 x i8] c"tellics ptell Flagging...\0A\00" ; <[27 x i8]*> [#uses=0] -@str.upgrd.44 = internal global [14 x i8] c"tellics flag\0A\00" ; <[14 x i8]*> [#uses=0] -@str18 = internal global [2 x i8] c"+\00" ; <[2 x i8]*> [#uses=0] -@str9 = internal global [6 x i8] c"trade\00" ; <[6 x i8]*> [#uses=0] -@str10.upgrd.45 = internal global [35 x i8] c"tellics ptell Ok, trading is GOOD\0A\00" ; <[35 x i8]*> [#uses=0] -@str11 = internal global [4 x i8] c"+++\00" ; <[4 x i8]*> [#uses=0] -@str12.upgrd.46 = internal global [6 x i8] c"mates\00" ; <[6 x i8]*> [#uses=0] -@str13.upgrd.47 = internal global [3 x i8] c"++\00" ; <[3 x i8]*> [#uses=0] -@str.upgrd.48 = internal global [49 x i8] c"is VERY good (ptell me 'x' to play normal again)\00" ; <[49 x i8]*> [#uses=0] -@str.upgrd.49 = internal global [44 x i8] c"is good (ptell me 'x' to play normal again)\00" ; <[44 x i8]*> [#uses=0] -@str19 = internal global [29 x i8] c"tellics ptell Ok, Knight %s\0A\00" ; <[29 x i8]*> [#uses=0] -@str14 = internal global [29 x i8] c"tellics ptell Ok, Bishop %s\0A\00" ; <[29 x i8]*> [#uses=0] -@str15.upgrd.50 = internal global [27 x i8] c"tellics ptell Ok, Rook %s\0A\00" ; <[27 x i8]*> [#uses=0] -@str.upgrd.51 = internal global [28 x i8] c"tellics ptell Ok, Queen %s\0A\00" ; <[28 x i8]*> [#uses=0] -@str16.upgrd.52 = internal global [27 x i8] c"tellics ptell Ok, Pawn %s\0A\00" ; <[27 x i8]*> [#uses=0] -@str17.upgrd.53 = internal global [31 x i8] c"tellics ptell Ok, Diagonal %s\0A\00" ; <[31 x i8]*> [#uses=0] -@str18.upgrd.54 = internal global [28 x i8] c"tellics ptell Ok, Heavy %s\0A\00" ; <[28 x i8]*> [#uses=0] -@str20 = internal global [34 x i8] c"tellics ptell Ok, trading is BAD\0A\00" ; <[34 x i8]*> [#uses=0] -@str20.upgrd.55 = internal global [4 x i8] c"---\00" ; <[4 x i8]*> [#uses=0] -@str.upgrd.56 = internal global [53 x i8] c"mates you (ptell me 'x' when it no longer mates you)\00" ; <[53 x i8]*> [#uses=0] -@str21 = internal global [3 x i8] c"--\00" ; <[3 x i8]*> [#uses=0] -@str.upgrd.57 = internal global [52 x i8] c"is VERY bad (ptell me 'x' when it is no longer bad)\00" ; <[52 x i8]*> [#uses=0] -@str21.upgrd.58 = internal global [47 x i8] c"is bad (ptell me 'x' when it is no longer bad)\00" ; <[47 x i8]*> [#uses=0] -@str23 = internal global [16 x i8] c"mate me anymore\00" ; <[16 x i8]*> [#uses=0] -@str24 = internal global [6 x i8] c"never\00" ; <[6 x i8]*> [#uses=0] -@str25 = internal global [5 x i8] c"mind\00" ; <[5 x i8]*> [#uses=0] -@str22 = internal global [9 x i8] c"ptell me\00" ; <[9 x i8]*> [#uses=0] -@str.upgrd.59 = internal global [55 x i8] c"tellics ptell Ok, reverting to STANDARD piece values!\0A\00" ; <[55 x i8]*> [#uses=0] -@partnerdead.b = internal global i1 false ; <i1*> [#uses=0] -@piecedead.b = internal global i1 false ; <i1*> [#uses=0] -@str.upgrd.60 = internal global [26 x i8] c"i'll have to sit...(dead)\00" ; <[26 x i8]*> [#uses=0] -@str27 = internal global [5 x i8] c"dead\00" ; <[5 x i8]*> [#uses=0] -@str28 = internal global [27 x i8] c"i'll have to sit...(piece)\00" ; <[27 x i8]*> [#uses=0] -@str29 = internal global [3 x i8] c"ok\00" ; <[3 x i8]*> [#uses=0] -@str30 = internal global [3 x i8] c"hi\00" ; <[3 x i8]*> [#uses=0] -@str31 = internal global [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=0] -@str32 = internal global [26 x i8] c"tellics ptell Greetings.\0A\00" ; <[26 x i8]*> [#uses=0] -@str.upgrd.61 = internal global [8 x i8] c"formula\00" ; <[8 x i8]*> [#uses=0] -@str.upgrd.62 = internal global [87 x i8] c"tellics ptell Setting formula, if you are still interrupted, complain to my operator.\0A\00" ; <[87 x i8]*> [#uses=0] -@str33 = internal global [59 x i8] c"tellics ptell Sorry, but I don't understand that command.\0A\00" ; <[59 x i8]*> [#uses=0] -@pawnmated.3298 = internal global i32 0 ; <i32*> [#uses=0] -@knightmated.3299 = internal global i32 0 ; <i32*> [#uses=0] -@bishopmated.3300 = internal global i32 0 ; <i32*> [#uses=0] -@rookmated.3301 = internal global i32 0 ; <i32*> [#uses=0] -@queenmated.3302 = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.63 = internal global [41 x i8] c"tellics ptell p doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str34 = internal global [41 x i8] c"tellics ptell n doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str35 = internal global [41 x i8] c"tellics ptell b doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str36 = internal global [41 x i8] c"tellics ptell r doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str37 = internal global [41 x i8] c"tellics ptell q doesn't mate me anymore\0A\00" ; <[41 x i8]*> [#uses=0] -@str38 = internal global [20 x i8] c"tellics ptell ---p\0A\00" ; <[20 x i8]*> [#uses=0] -@str39 = internal global [20 x i8] c"tellics ptell ---n\0A\00" ; <[20 x i8]*> [#uses=0] -@str40 = internal global [20 x i8] c"tellics ptell ---b\0A\00" ; <[20 x i8]*> [#uses=0] -@str41 = internal global [20 x i8] c"tellics ptell ---r\0A\00" ; <[20 x i8]*> [#uses=0] -@str42 = internal global [20 x i8] c"tellics ptell ---q\0A\00" ; <[20 x i8]*> [#uses=0] -@str23.upgrd.64 = internal global [17 x i8] c"tellics ptell x\0A\00" ; <[17 x i8]*> [#uses=0] -@str.upgrd.65 = internal global [18 x i8] c"tellics ptell go\0A\00" ; <[18 x i8]*> [#uses=0] -@bufftop = internal global i32 0 ; <i32*> [#uses=2] -@membuff = internal global i8* null ; <i8**> [#uses=3] -@maxply = internal global i32 0 ; <i32*> [#uses=1] -@forwards = internal global i32 0 ; <i32*> [#uses=1] -@nodecount = internal global i32 0 ; <i32*> [#uses=1] -@frees = internal global i32 0 ; <i32*> [#uses=0] -@PBSize.b = internal global i1 false ; <i1*> [#uses=1] -@alllosers.b = internal global i1 false ; <i1*> [#uses=1] -@rootlosers = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=1] -@pn_move = internal global %struct.move_s zeroinitializer ; <%struct.move_s*> [#uses=7] -@iters = internal global i32 0 ; <i32*> [#uses=1] -@kibitzed.b = internal global i1 false ; <i1*> [#uses=0] -@str24.upgrd.66 = internal global [28 x i8] c"tellics kibitz Forced win!\0A\00" ; <[28 x i8]*> [#uses=0] -@str25.upgrd.67 = internal global [34 x i8] c"tellics kibitz Forced win! (alt)\0A\00" ; <[34 x i8]*> [#uses=0] -@pn_time = internal global i32 0 ; <i32*> [#uses=1] -@post = internal global i32 0 ; <i32*> [#uses=0] -@str.upgrd.68 = internal global [94 x i8] c"tellics whisper proof %d, disproof %d, %d losers, highest depth %d, primary %d, secondary %d\0A\00" ; <[94 x i8]*> [#uses=0] -@str26 = internal global [30 x i8] c"tellics whisper Forced reply\0A\00" ; <[30 x i8]*> [#uses=0] -@str27.upgrd.69 = internal global [60 x i8] c"P: %d D: %d N: %d S: %d Mem: %2.2fM Iters: %d MaxDepth: %d\0A\00" ; <[60 x i8]*> [#uses=0] -@str.upgrd.70 = internal global [90 x i8] c"tellics whisper proof %d, disproof %d, %d nodes, %d forwards, %d iters, highest depth %d\0A\00" ; <[90 x i8]*> [#uses=0] -@str.upgrd.71 = internal global [11 x i8] c"Time : %f\0A\00" ; <[11 x i8]*> [#uses=0] -@str28.upgrd.72 = internal global [23 x i8] c"This position is WON.\0A\00" ; <[23 x i8]*> [#uses=0] -@str29.upgrd.73 = internal global [5 x i8] c"PV: \00" ; <[5 x i8]*> [#uses=0] -@str30.upgrd.74 = internal global [4 x i8] c"%s \00" ; <[4 x i8]*> [#uses=0] -@str31.upgrd.75 = internal global [2 x i8] c" \00" ; <[2 x i8]*> [#uses=0] -@str32.upgrd.76 = internal global [41 x i8] c"\0Atellics kibitz Forced win in %d moves.\0A\00" ; <[41 x i8]*> [#uses=0] -@str33.upgrd.77 = internal global [20 x i8] c"\0A1-0 {White mates}\0A\00" ; <[20 x i8]*> [#uses=0] -@result = internal global i32 0 ; <i32*> [#uses=4] -@str1.upgrd.78 = internal global [20 x i8] c"\0A0-1 {Black mates}\0A\00" ; <[20 x i8]*> [#uses=0] -@str35.upgrd.79 = internal global [24 x i8] c"This position is LOST.\0A\00" ; <[24 x i8]*> [#uses=0] -@str36.upgrd.80 = internal global [27 x i8] c"This position is UNKNOWN.\0A\00" ; <[27 x i8]*> [#uses=0] -@str37.upgrd.81 = internal global [47 x i8] c"P: %d D: %d N: %d S: %d Mem: %2.2fM Iters: %d\0A\00" ; <[47 x i8]*> [#uses=0] -@s_threat.b = internal global i1 false ; <i1*> [#uses=0] -@TTSize.b = internal global i1 false ; <i1*> [#uses=3] -@cfg_razordrop.b = internal global i1 false ; <i1*> [#uses=0] -@cfg_futprune.b = internal global i1 false ; <i1*> [#uses=0] -@cfg_onerep.b = internal global i1 false ; <i1*> [#uses=0] -@setcode = internal global [30 x i8] zeroinitializer ; <[30 x i8]*> [#uses=0] -@str38.upgrd.82 = internal global [3 x i8] c"%u\00" ; <[3 x i8]*> [#uses=0] -@searching_pv.b = internal global i1 false ; <i1*> [#uses=0] -@pv = internal global [300 x [300 x %struct.move_s]] zeroinitializer ; <[300 x [300 x %struct.move_s]]*> [#uses=0] -@i_depth = internal global i32 0 ; <i32*> [#uses=0] -@history_h = internal global [144 x [144 x i32]] zeroinitializer ; <[144 x [144 x i32]]*> [#uses=0] -@killer1 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0] -@killer2 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0] -@killer3 = internal global [300 x %struct.move_s] zeroinitializer ; <[300 x %struct.move_s]*> [#uses=0] -@rootnodecount = internal global [512 x i32] zeroinitializer ; <[512 x i32]*> [#uses=0] -@raw_nodes = internal global i32 0 ; <i32*> [#uses=0] -@pv_length = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@time_exit.b = internal global i1 false ; <i1*> [#uses=0] -@time_for_move = internal global i32 0 ; <i32*> [#uses=3] -@failed = internal global i32 0 ; <i32*> [#uses=0] -@extendedtime.b = internal global i1 false ; <i1*> [#uses=1] -@time_left = internal global i32 0 ; <i32*> [#uses=0] -@str39.upgrd.83 = internal global [38 x i8] c"Extended from %d to %d, time left %d\0A\00" ; <[38 x i8]*> [#uses=0] -@checks = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@singular = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@recaps = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@ext_onerep = internal global i32 0 ; <i32*> [#uses=1] -@FULL = internal global i32 0 ; <i32*> [#uses=1] -@PVS = internal global i32 0 ; <i32*> [#uses=1] -@PVSF = internal global i32 0 ; <i32*> [#uses=1] -@killer_scores = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@killer_scores2 = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@killer_scores3 = internal global [300 x i32] zeroinitializer ; <[300 x i32]*> [#uses=0] -@time_failure.b = internal global i1 false ; <i1*> [#uses=0] -@cur_score = internal global i32 0 ; <i32*> [#uses=0] -@legals = internal global i32 0 ; <i32*> [#uses=3] -@movetotal = internal global i32 0 ; <i32*> [#uses=0] -@searching_move = internal global [20 x i8] zeroinitializer ; <[20 x i8]*> [#uses=0] -@is_pondering.b = internal global i1 false ; <i1*> [#uses=6] -@true_i_depth = internal global i8 0 ; <i8*> [#uses=1] -@is_analyzing.b = internal global i1 false ; <i1*> [#uses=0] -@inc = internal global i32 0 ; <i32*> [#uses=1] -@time_cushion = internal global i32 0 ; <i32*> [#uses=2] -@str40.upgrd.84 = internal global [16 x i8] c"Opening phase.\0A\00" ; <[16 x i8]*> [#uses=1] -@str.upgrd.85 = internal global [19 x i8] c"Middlegame phase.\0A\00" ; <[19 x i8]*> [#uses=1] -@str1.upgrd.86 = internal global [16 x i8] c"Endgame phase.\0A\00" ; <[16 x i8]*> [#uses=1] -@str43 = internal global [20 x i8] c"Time for move : %d\0A\00" ; <[20 x i8]*> [#uses=1] -@postpv = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0] -@str44 = internal global [49 x i8] c"tellics whisper %d restart(s), ended up with %s\0A\00" ; <[49 x i8]*> [#uses=0] -@moves_to_tc = internal global i32 0 ; <i32*> [#uses=0] -@str45 = internal global [27 x i8] c"tellics kibitz Mate in %d\0A\00" ; <[27 x i8]*> [#uses=0] -@str46 = internal global [52 x i8] c"tellics ptell Mate in %d, give him no more pieces.\0A\00" ; <[52 x i8]*> [#uses=0] -@tradefreely.b = internal global i1 false ; <i1*> [#uses=0] -@str.upgrd.87 = internal global [37 x i8] c"tellics ptell You can trade freely.\0A\00" ; <[37 x i8]*> [#uses=0] -@str47 = internal global [25 x i8] c"tellics ptell ---trades\0A\00" ; <[25 x i8]*> [#uses=0] -@str2.upgrd.88 = internal global [49 x i8] c"tellics kibitz Both players dead...resigning...\0A\00" ; <[49 x i8]*> [#uses=0] -@str3.upgrd.89 = internal global [16 x i8] c"tellics resign\0A\00" ; <[16 x i8]*> [#uses=0] -@str48 = internal global [81 x i8] c"tellics ptell I am forcedly mated (dead). Tell me 'go' to start moving into it.\0A\00" ; <[81 x i8]*> [#uses=0] -@str.upgrd.90 = internal global [62 x i8] c"tellics ptell I'll have to sit...(lose piece that mates you)\0A\00" ; <[62 x i8]*> [#uses=0] -@see_num_attackers = internal global [2 x i32] zeroinitializer ; <[2 x i32]*> [#uses=0] -@see_attackers = internal global [2 x [16 x %struct.see_data]] zeroinitializer ; <[2 x [16 x %struct.see_data]]*> [#uses=0] -@scentral = internal global [144 x i32] [ i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 2, i32 15, i32 15, i32 15, i32 15, i32 2, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 7, i32 15, i32 25, i32 25, i32 15, i32 7, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 7, i32 15, i32 25, i32 25, i32 15, i32 7, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 2, i32 15, i32 15, i32 15, i32 15, i32 2, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -10, i32 0, i32 3, i32 5, i32 5, i32 3, i32 0, i32 -10, i32 0, i32 0, i32 0, i32 0, i32 -20, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -10, i32 -20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ] ; <[144 x i32]*> [#uses=0] -@str51 = internal global [81 x i8] c"/Volumes/Stuff/src/speccpu2006-091-llvm/benchspec//CPU2006/458.sjeng/src/seval.c\00" ; <[81 x i8]*> [#uses=0] -@divider = internal global [50 x i8] c"-------------------------------------------------\00" ; <[50 x i8]*> [#uses=0] -@min_per_game = internal global i32 0 ; <i32*> [#uses=0] -@opp_rating = internal global i32 0 ; <i32*> [#uses=0] -@my_rating = internal global i32 0 ; <i32*> [#uses=0] -@str53 = internal global [15 x i8] c"SPEC Workload\0A\00" ; <[15 x i8]*> [#uses=0] -@opening_history = internal global [256 x i8] zeroinitializer ; <[256 x i8]*> [#uses=0] -@str60 = internal global [81 x i8] c"Material score: %d Eval : %d MaxPosDiff: %d White hand: %d Black hand : %d\0A\00" ; <[81 x i8]*> [#uses=0] -@str61 = internal global [26 x i8] c"Hash : %X HoldHash : %X\0A\00" ; <[26 x i8]*> [#uses=0] -@str62 = internal global [9 x i8] c"move %s\0A\00" ; <[9 x i8]*> [#uses=0] -@str63 = internal global [5 x i8] c"\0A%s\0A\00" ; <[5 x i8]*> [#uses=0] -@str64 = internal global [19 x i8] c"0-1 {Black Mates}\0A\00" ; <[19 x i8]*> [#uses=0] -@str1.upgrd.91 = internal global [19 x i8] c"1-0 {White Mates}\0A\00" ; <[19 x i8]*> [#uses=0] -@str65 = internal global [27 x i8] c"1/2-1/2 {Fifty move rule}\0A\00" ; <[27 x i8]*> [#uses=0] -@str2.upgrd.92 = internal global [29 x i8] c"1/2-1/2 {3 fold repetition}\0A\00" ; <[29 x i8]*> [#uses=0] -@str66 = internal global [16 x i8] c"1/2-1/2 {Draw}\0A\00" ; <[16 x i8]*> [#uses=0] -@str68 = internal global [8 x i8] c"Sjeng: \00" ; <[8 x i8]*> [#uses=0] -@str69 = internal global [18 x i8] c"Illegal move: %s\0A\00" ; <[18 x i8]*> [#uses=0] -@str3.upgrd.93 = internal global [9 x i8] c"setboard\00" ; <[9 x i8]*> [#uses=0] -@str470 = internal global [5 x i8] c"quit\00" ; <[5 x i8]*> [#uses=0] -@str571 = internal global [5 x i8] c"exit\00" ; <[5 x i8]*> [#uses=0] -@str6.upgrd.94 = internal global [8 x i8] c"diagram\00" ; <[8 x i8]*> [#uses=0] -@str7.upgrd.95 = internal global [2 x i8] c"d\00" ; <[2 x i8]*> [#uses=0] -@str72 = internal global [6 x i8] c"perft\00" ; <[6 x i8]*> [#uses=0] -@str73 = internal global [3 x i8] c"%d\00" ; <[3 x i8]*> [#uses=0] -@str74 = internal global [28 x i8] c"Raw nodes for depth %d: %i\0A\00" ; <[28 x i8]*> [#uses=0] -@str.upgrd.96 = internal global [13 x i8] c"Time : %.2f\0A\00" ; <[13 x i8]*> [#uses=0] -@str75 = internal global [4 x i8] c"new\00" ; <[4 x i8]*> [#uses=0] -@str.upgrd.97 = internal global [40 x i8] c"tellics set 1 Sjeng SPEC 1.0 (SPEC/%s)\0A\00" ; <[40 x i8]*> [#uses=0] -@str.upgrd.98 = internal global [7 x i8] c"xboard\00" ; <[7 x i8]*> [#uses=0] -@str8.upgrd.99 = internal global [6 x i8] c"nodes\00" ; <[6 x i8]*> [#uses=0] -@str77 = internal global [38 x i8] c"Number of nodes: %i (%0.2f%% qnodes)\0A\00" ; <[38 x i8]*> [#uses=0] -@str9.upgrd.100 = internal global [5 x i8] c"post\00" ; <[5 x i8]*> [#uses=0] -@str10.upgrd.101 = internal global [7 x i8] c"nopost\00" ; <[7 x i8]*> [#uses=0] -@str11.upgrd.102 = internal global [7 x i8] c"random\00" ; <[7 x i8]*> [#uses=0] -@str12.upgrd.103 = internal global [5 x i8] c"hard\00" ; <[5 x i8]*> [#uses=0] -@str13.upgrd.104 = internal global [5 x i8] c"easy\00" ; <[5 x i8]*> [#uses=0] -@str14.upgrd.105 = internal global [2 x i8] c"?\00" ; <[2 x i8]*> [#uses=0] -@str15.upgrd.106 = internal global [6 x i8] c"white\00" ; <[6 x i8]*> [#uses=0] -@str16.upgrd.107 = internal global [6 x i8] c"black\00" ; <[6 x i8]*> [#uses=0] -@str17.upgrd.108 = internal global [6 x i8] c"force\00" ; <[6 x i8]*> [#uses=0] -@str18.upgrd.109 = internal global [5 x i8] c"eval\00" ; <[5 x i8]*> [#uses=0] -@str.upgrd.110 = internal global [10 x i8] c"Eval: %d\0A\00" ; <[10 x i8]*> [#uses=0] -@str2178 = internal global [3 x i8] c"%i\00" ; <[3 x i8]*> [#uses=0] -@str22.upgrd.111 = internal global [5 x i8] c"otim\00" ; <[5 x i8]*> [#uses=0] -@opp_time = internal global i32 0 ; <i32*> [#uses=0] -@str23.upgrd.112 = internal global [6 x i8] c"level\00" ; <[6 x i8]*> [#uses=0] -@str.upgrd.113 = internal global [12 x i8] c"%i %i:%i %i\00" ; <[12 x i8]*> [#uses=0] -@sec_per_game = internal global i32 0 ; <i32*> [#uses=0] -@str24.upgrd.114 = internal global [9 x i8] c"%i %i %i\00" ; <[9 x i8]*> [#uses=0] -@str25.upgrd.115 = internal global [7 x i8] c"rating\00" ; <[7 x i8]*> [#uses=0] -@str26.upgrd.116 = internal global [6 x i8] c"%i %i\00" ; <[6 x i8]*> [#uses=0] -@str27.upgrd.117 = internal global [8 x i8] c"holding\00" ; <[8 x i8]*> [#uses=0] -@str28.upgrd.118 = internal global [8 x i8] c"variant\00" ; <[8 x i8]*> [#uses=0] -@str29.upgrd.119 = internal global [7 x i8] c"normal\00" ; <[7 x i8]*> [#uses=0] -@str79 = internal global [11 x i8] c"crazyhouse\00" ; <[11 x i8]*> [#uses=0] -@str30.upgrd.120 = internal global [9 x i8] c"bughouse\00" ; <[9 x i8]*> [#uses=0] -@str31.upgrd.121 = internal global [8 x i8] c"suicide\00" ; <[8 x i8]*> [#uses=0] -@str32.upgrd.122 = internal global [9 x i8] c"giveaway\00" ; <[9 x i8]*> [#uses=0] -@str33.upgrd.123 = internal global [7 x i8] c"losers\00" ; <[7 x i8]*> [#uses=0] -@str34.upgrd.124 = internal global [8 x i8] c"analyze\00" ; <[8 x i8]*> [#uses=0] -@str35.upgrd.125 = internal global [5 x i8] c"undo\00" ; <[5 x i8]*> [#uses=0] -@str36.upgrd.126 = internal global [18 x i8] c"Move number : %d\0A\00" ; <[18 x i8]*> [#uses=0] -@str37.upgrd.127 = internal global [7 x i8] c"remove\00" ; <[7 x i8]*> [#uses=0] -@str38.upgrd.128 = internal global [5 x i8] c"edit\00" ; <[5 x i8]*> [#uses=0] -@str41.upgrd.129 = internal global [2 x i8] c"#\00" ; <[2 x i8]*> [#uses=0] -@str42.upgrd.130 = internal global [8 x i8] c"partner\00" ; <[8 x i8]*> [#uses=0] -@str43.upgrd.131 = internal global [9 x i8] c"$partner\00" ; <[9 x i8]*> [#uses=0] -@str44.upgrd.132 = internal global [6 x i8] c"ptell\00" ; <[6 x i8]*> [#uses=0] -@str45.upgrd.133 = internal global [5 x i8] c"test\00" ; <[5 x i8]*> [#uses=0] -@str46.upgrd.134 = internal global [3 x i8] c"st\00" ; <[3 x i8]*> [#uses=0] -@str47.upgrd.135 = internal global [7 x i8] c"result\00" ; <[7 x i8]*> [#uses=0] -@str48.upgrd.136 = internal global [6 x i8] c"prove\00" ; <[6 x i8]*> [#uses=0] -@str49 = internal global [26 x i8] c"\0AMax time to search (s): \00" ; <[26 x i8]*> [#uses=0] -@str50 = internal global [5 x i8] c"ping\00" ; <[5 x i8]*> [#uses=0] -@str51.upgrd.137 = internal global [9 x i8] c"pong %d\0A\00" ; <[9 x i8]*> [#uses=0] -@str52 = internal global [6 x i8] c"fritz\00" ; <[6 x i8]*> [#uses=0] -@str53.upgrd.138 = internal global [6 x i8] c"reset\00" ; <[6 x i8]*> [#uses=0] -@str54 = internal global [3 x i8] c"sd\00" ; <[3 x i8]*> [#uses=0] -@str55 = internal global [26 x i8] c"New max depth set to: %d\0A\00" ; <[26 x i8]*> [#uses=0] -@str56 = internal global [5 x i8] c"auto\00" ; <[5 x i8]*> [#uses=0] -@str57 = internal global [9 x i8] c"protover\00" ; <[9 x i8]*> [#uses=0] -@str.upgrd.139 = internal global [63 x i8] c"feature ping=0 setboard=1 playother=0 san=0 usermove=0 time=1\0A\00" ; <[63 x i8]*> [#uses=0] -@str80 = internal global [53 x i8] c"feature draw=0 sigint=0 sigterm=0 reuse=1 analyze=0\0A\00" ; <[53 x i8]*> [#uses=0] -@str.upgrd.140 = internal global [33 x i8] c"feature myname=\22Sjeng SPEC 1.0\22\0A\00" ; <[33 x i8]*> [#uses=0] -@str.upgrd.141 = internal global [71 x i8] c"feature variants=\22normal,bughouse,crazyhouse,suicide,giveaway,losers\22\0A\00" ; <[71 x i8]*> [#uses=0] -@str.upgrd.142 = internal global [46 x i8] c"feature colors=1 ics=0 name=0 pause=0 done=1\0A\00" ; <[46 x i8]*> [#uses=0] -@str58 = internal global [9 x i8] c"accepted\00" ; <[9 x i8]*> [#uses=0] -@str59 = internal global [9 x i8] c"rejected\00" ; <[9 x i8]*> [#uses=0] -@str.upgrd.143 = internal global [65 x i8] c"Interface does not support a required feature...expect trouble.\0A\00" ; <[65 x i8]*> [#uses=0] -@str61.upgrd.144 = internal global [6 x i8] c"\0A%s\0A\0A\00" ; <[6 x i8]*> [#uses=0] -@str81 = internal global [41 x i8] c"diagram/d: toggle diagram display\0A\00" ; <[41 x i8]*> [#uses=0] -@str82 = internal global [34 x i8] c"exit/quit: terminate Sjeng\0A\00" ; <[34 x i8]*> [#uses=0] -@str62.upgrd.145 = internal global [51 x i8] c"go: make Sjeng play the side to move\0A\00" ; <[51 x i8]*> [#uses=0] -@str83 = internal global [35 x i8] c"new: start a new game\0A\00" ; <[35 x i8]*> [#uses=0] -@str84 = internal global [55 x i8] c"level <x>: the xboard style command to set time\0A\00" ; <[55 x i8]*> [#uses=0] -@str85 = internal global [49 x i8] c" <x> should be in the form: <a> <b> <c> where:\0A\00" ; <[49 x i8]*> [#uses=0] -@str63.upgrd.146 = internal global [49 x i8] c" a -> moves to TC (0 if using an ICS style TC)\0A\00" ; <[49 x i8]*> [#uses=0] -@str86 = internal global [25 x i8] c" b -> minutes per game\0A\00" ; <[25 x i8]*> [#uses=0] -@str64.upgrd.147 = internal global [29 x i8] c" c -> increment in seconds\0A\00" ; <[29 x i8]*> [#uses=0] -@str65.upgrd.148 = internal global [55 x i8] c"nodes: outputs the number of nodes searched\0A\00" ; <[55 x i8]*> [#uses=0] -@str87 = internal global [47 x i8] c"perft <x>: compute raw nodes to depth x\0A\00" ; <[47 x i8]*> [#uses=0] -@str.upgrd.149 = internal global [42 x i8] c"post: toggles thinking output\0A\00" ; <[42 x i8]*> [#uses=0] -@str.upgrd.150 = internal global [45 x i8] c"xboard: put Sjeng into xboard mode\0A\00" ; <[45 x i8]*> [#uses=0] -@str.upgrd.151 = internal global [39 x i8] c"test: run an EPD testsuite\0A\00" ; <[39 x i8]*> [#uses=0] -@str88 = internal global [52 x i8] c"speed: test movegen and evaluation speed\0A\00" ; <[52 x i8]*> [#uses=0] -@str89 = internal global [59 x i8] c"proof: try to prove or disprove the current pos\0A\00" ; <[59 x i8]*> [#uses=0] -@str90 = internal global [44 x i8] c"sd <x>: limit thinking to depth x\0A\00" ; <[44 x i8]*> [#uses=0] -@str66.upgrd.152 = internal global [51 x i8] c"st <x>: limit thinking to x centiseconds\0A\00" ; <[51 x i8]*> [#uses=0] -@str67 = internal global [54 x i8] c"setboard <FEN>: set board to a specified FEN string\0A\00" ; <[54 x i8]*> [#uses=0] -@str68.upgrd.153 = internal global [38 x i8] c"undo: back up a half move\0A\00" ; <[38 x i8]*> [#uses=0] -@str69.upgrd.154 = internal global [38 x i8] c"remove: back up a full move\0A\00" ; <[38 x i8]*> [#uses=0] -@str70 = internal global [42 x i8] c"force: disable computer moving\0A\00" ; <[42 x i8]*> [#uses=0] -@str71 = internal global [44 x i8] c"auto: computer plays both sides\0A\00" ; <[44 x i8]*> [#uses=0] -@DP_TTable = internal global %struct.TType* null ; <%struct.TType**> [#uses=1] -@AS_TTable = internal global %struct.TType* null ; <%struct.TType**> [#uses=1] -@QS_TTable = internal global %struct.QTType* null ; <%struct.QTType**> [#uses=1] -@str93 = internal global [38 x i8] c"Out of memory allocating hashtables.\0A\00" ; <[38 x i8]*> [#uses=0] -@type_to_char.3058 = internal global [14 x i32] [ i32 70, i32 80, i32 80, i32 78, i32 78, i32 75, i32 75, i32 82, i32 82, i32 81, i32 81, i32 66, i32 66, i32 69 ] ; <[14 x i32]*> [#uses=0] -@str94 = internal global [8 x i8] c"%c@%c%d\00" ; <[8 x i8]*> [#uses=0] -@str95 = internal global [5 x i8] c"%c%d\00" ; <[5 x i8]*> [#uses=0] -@str1.upgrd.155 = internal global [8 x i8] c"%c%d=%c\00" ; <[8 x i8]*> [#uses=0] -@str2.upgrd.156 = internal global [8 x i8] c"%cx%c%d\00" ; <[8 x i8]*> [#uses=0] -@str96 = internal global [11 x i8] c"%cx%c%d=%c\00" ; <[11 x i8]*> [#uses=0] -@str97 = internal global [4 x i8] c"O-O\00" ; <[4 x i8]*> [#uses=0] -@str98 = internal global [6 x i8] c"O-O-O\00" ; <[6 x i8]*> [#uses=0] -@str99 = internal global [9 x i8] c"%c%c%c%d\00" ; <[9 x i8]*> [#uses=0] -@str3100 = internal global [9 x i8] c"%c%d%c%d\00" ; <[9 x i8]*> [#uses=0] -@str101 = internal global [10 x i8] c"%c%cx%c%d\00" ; <[10 x i8]*> [#uses=0] -@str4.upgrd.157 = internal global [10 x i8] c"%c%dx%c%d\00" ; <[10 x i8]*> [#uses=0] -@str102 = internal global [7 x i8] c"%c%c%d\00" ; <[7 x i8]*> [#uses=0] -@str5103 = internal global [5 x i8] c"illg\00" ; <[5 x i8]*> [#uses=0] -@type_to_char.3190 = internal global [14 x i32] [ i32 70, i32 80, i32 112, i32 78, i32 110, i32 75, i32 107, i32 82, i32 114, i32 81, i32 113, i32 66, i32 98, i32 69 ] ; <[14 x i32]*> [#uses=0] -@str7.upgrd.158 = internal global [10 x i8] c"%c%d%c%dn\00" ; <[10 x i8]*> [#uses=0] -@str8.upgrd.159 = internal global [10 x i8] c"%c%d%c%dr\00" ; <[10 x i8]*> [#uses=0] -@str9.upgrd.160 = internal global [10 x i8] c"%c%d%c%db\00" ; <[10 x i8]*> [#uses=0] -@str10.upgrd.161 = internal global [10 x i8] c"%c%d%c%dk\00" ; <[10 x i8]*> [#uses=0] -@str11.upgrd.162 = internal global [10 x i8] c"%c%d%c%dq\00" ; <[10 x i8]*> [#uses=0] -@C.88.3251 = internal global [14 x i8*] [ i8* getelementptr ([3 x i8]* @str105, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str12106, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str13107, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str141, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str152, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str163, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str174, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str185, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str19108, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str206, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str21109, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str227, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str238, i32 0, i32 0), i8* getelementptr ([3 x i8]* @str249, i32 0, i32 0) ] ; <[14 x i8*]*> [#uses=0] -@str105 = internal global [3 x i8] c"!!\00" ; <[3 x i8]*> [#uses=1] -@str12106 = internal global [3 x i8] c" P\00" ; <[3 x i8]*> [#uses=1] -@str13107 = internal global [3 x i8] c"*P\00" ; <[3 x i8]*> [#uses=1] -@str141 = internal global [3 x i8] c" N\00" ; <[3 x i8]*> [#uses=1] -@str152 = internal global [3 x i8] c"*N\00" ; <[3 x i8]*> [#uses=1] -@str163 = internal global [3 x i8] c" K\00" ; <[3 x i8]*> [#uses=1] -@str174 = internal global [3 x i8] c"*K\00" ; <[3 x i8]*> [#uses=1] -@str185 = internal global [3 x i8] c" R\00" ; <[3 x i8]*> [#uses=1] -@str19108 = internal global [3 x i8] c"*R\00" ; <[3 x i8]*> [#uses=1] -@str206 = internal global [3 x i8] c" Q\00" ; <[3 x i8]*> [#uses=1] -@str21109 = internal global [3 x i8] c"*Q\00" ; <[3 x i8]*> [#uses=1] -@str227 = internal global [3 x i8] c" B\00" ; <[3 x i8]*> [#uses=1] -@str238 = internal global [3 x i8] c"*B\00" ; <[3 x i8]*> [#uses=1] -@str249 = internal global [3 x i8] c" \00" ; <[3 x i8]*> [#uses=1] -@str110 = internal global [42 x i8] c"+----+----+----+----+----+----+----+----+\00" ; <[42 x i8]*> [#uses=0] -@str25.upgrd.163 = internal global [6 x i8] c" %s\0A\00" ; <[6 x i8]*> [#uses=0] -@str26.upgrd.164 = internal global [5 x i8] c"%d |\00" ; <[5 x i8]*> [#uses=0] -@str27.upgrd.165 = internal global [6 x i8] c" %s |\00" ; <[6 x i8]*> [#uses=0] -@str28.upgrd.166 = internal global [7 x i8] c"\0A %s\0A\00" ; <[7 x i8]*> [#uses=0] -@str111 = internal global [45 x i8] c"\0A a b c d e f g h\0A\0A\00" ; <[45 x i8]*> [#uses=0] -@str29.upgrd.167 = internal global [45 x i8] c"\0A h g f e d c b a\0A\0A\00" ; <[45 x i8]*> [#uses=0] -@str33.upgrd.168 = internal global [2 x i8] c"<\00" ; <[2 x i8]*> [#uses=0] -@str34.upgrd.169 = internal global [3 x i8] c"> \00" ; <[3 x i8]*> [#uses=0] -@str114.upgrd.170 = internal global [18 x i8] c"%2i %7i %5i %8i \00" ; <[18 x i8]*> [#uses=0] -@str115 = internal global [20 x i8] c"%2i %c%1i.%02i %9i \00" ; <[20 x i8]*> [#uses=0] -@str39.upgrd.171 = internal global [5 x i8] c"%s !\00" ; <[5 x i8]*> [#uses=0] -@str40.upgrd.172 = internal global [6 x i8] c"%s !!\00" ; <[6 x i8]*> [#uses=0] -@str41.upgrd.173 = internal global [6 x i8] c"%s ??\00" ; <[6 x i8]*> [#uses=0] -@str124 = internal global [71 x i8] c"\0ASjeng version SPEC 1.0, Copyright (C) 2000-2005 Gian-Carlo Pascutto\0A\0A\00" ; <[71 x i8]*> [#uses=0] -@state = internal global [625 x i32] zeroinitializer ; <[625 x i32]*> [#uses=0] - -declare fastcc i32 @calc_attackers(i32, i32) - -declare fastcc i32 @is_attacked(i32, i32) - -declare fastcc void @ProcessHoldings(i8*) - -declare void @llvm.memset.i32(i8*, i8, i32, i32) - -declare i8* @strncpy(i8*, i8*, i32) - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -declare void @__eprintf(i8*, i8*, i32, i8*) - -declare fastcc void @addHolding(i32, i32) - -declare fastcc void @removeHolding(i32, i32) - -declare fastcc void @DropremoveHolding(i32, i32) - -declare i32 @printf(i8*, ...) - -declare fastcc i32 @is_draw() - -declare void @exit(i32) - -declare fastcc void @setup_epd_line(i8*) - -declare i32 @atoi(i8*) - -declare fastcc void @reset_piece_square() - -declare fastcc void @initialize_hash() - -declare i32 @__maskrune(i32, i32) - -declare fastcc void @comp_to_san(i64, i64, i64, i8*) - -declare i8* @strstr(i8*, i8*) - -declare i32 @atol(i8*) - -declare %struct.FILE* @fopen(i8*, i8*) - -declare fastcc void @display_board(i32) - -define internal void @think(%struct.move_s* sret %agg.result) { -entry: - %output.i = alloca [8 x i8], align 8 ; <[8 x i8]*> [#uses=0] - %comp_move = alloca %struct.move_s, align 16 ; <%struct.move_s*> [#uses=7] - %temp_move = alloca %struct.move_s, align 16 ; <%struct.move_s*> [#uses=6] - %moves = alloca [512 x %struct.move_s], align 16 ; <[512 x %struct.move_s]*> [#uses=7] - %output = alloca [8 x i8], align 8 ; <[8 x i8]*> [#uses=1] - store i1 false, i1* @userealholdings.b - %tmp = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0 ; <%struct.move_s*> [#uses=3] - %tmp362 = getelementptr %struct.move_s* %comp_move, i32 0, i32 0 ; <i32*> [#uses=0] - %tmp365 = getelementptr %struct.move_s* %comp_move, i32 0, i32 1 ; <i32*> [#uses=0] - %tmp368 = getelementptr %struct.move_s* %comp_move, i32 0, i32 2 ; <i32*> [#uses=0] - %tmp371 = getelementptr %struct.move_s* %comp_move, i32 0, i32 3 ; <i32*> [#uses=0] - %tmp374 = getelementptr %struct.move_s* %comp_move, i32 0, i32 4 ; <i32*> [#uses=0] - %tmp377 = getelementptr %struct.move_s* %comp_move, i32 0, i32 5 ; <i32*> [#uses=0] - %tmp.upgrd.174 = bitcast %struct.move_s* %comp_move to { i64, i64, i64 }* ; <{ i64, i64, i64 }*> [#uses=3] - %tmp.upgrd.175 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 0 ; <i64*> [#uses=0] - %tmp829 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 1 ; <i64*> [#uses=0] - %tmp832 = getelementptr { i64, i64, i64 }* %tmp.upgrd.174, i32 0, i32 2 ; <i64*> [#uses=0] - %output.upgrd.176 = getelementptr [8 x i8]* %output, i32 0, i32 0 ; <i8*> [#uses=0] - %tmp573 = getelementptr %struct.move_s* %temp_move, i32 0, i32 0 ; <i32*> [#uses=0] - %tmp576 = getelementptr %struct.move_s* %temp_move, i32 0, i32 1 ; <i32*> [#uses=0] - %tmp579 = getelementptr %struct.move_s* %temp_move, i32 0, i32 2 ; <i32*> [#uses=0] - %tmp582 = getelementptr %struct.move_s* %temp_move, i32 0, i32 3 ; <i32*> [#uses=0] - %tmp585 = getelementptr %struct.move_s* %temp_move, i32 0, i32 4 ; <i32*> [#uses=0] - %tmp588 = getelementptr %struct.move_s* %temp_move, i32 0, i32 5 ; <i32*> [#uses=0] - %pn_restart.0.ph = bitcast i32 0 to i32 ; <i32> [#uses=2] - %tmp21362 = icmp eq i32 0, 0 ; <i1> [#uses=2] - %tmp216 = sitofp i32 %pn_restart.0.ph to float ; <float> [#uses=1] - %tmp216.upgrd.177 = fpext float %tmp216 to double ; <double> [#uses=1] - %tmp217 = fadd double %tmp216.upgrd.177, 1.000000e+00 ; <double> [#uses=1] - %tmp835 = icmp sgt i32 %pn_restart.0.ph, 9 ; <i1> [#uses=0] - store i32 0, i32* @nodes - store i32 0, i32* @qnodes - store i32 1, i32* @ply - store i32 0, i32* @ECacheProbes - store i32 0, i32* @ECacheHits - store i32 0, i32* @TTProbes - store i32 0, i32* @TTHits - store i32 0, i32* @TTStores - store i32 0, i32* @NCuts - store i32 0, i32* @NTries - store i32 0, i32* @TExt - store i32 0, i32* @FH - store i32 0, i32* @FHF - store i32 0, i32* @PVS - store i32 0, i32* @FULL - store i32 0, i32* @PVSF - store i32 0, i32* @ext_check - store i32 0, i32* @ext_onerep - store i32 0, i32* @razor_drop - store i32 0, i32* @razor_material - store i1 false, i1* @extendedtime.b - store i1 false, i1* @forcedwin.b - store i32 200, i32* @maxposdiff - store i8 0, i8* @true_i_depth - store i32 0, i32* @legals - %tmp48 = load i32* @Variant ; <i32> [#uses=1] - %tmp49 = icmp eq i32 %tmp48, 4 ; <i1> [#uses=1] - %storemerge = zext i1 %tmp49 to i32 ; <i32> [#uses=1] - store i32 %storemerge, i32* @captures - call fastcc void @gen( %struct.move_s* %tmp ) - %tmp53 = load i32* @numb_moves ; <i32> [#uses=1] - %tmp.i = load i32* @Variant ; <i32> [#uses=1] - %tmp.i.upgrd.178 = icmp eq i32 %tmp.i, 3 ; <i1> [#uses=1] - br i1 %tmp.i.upgrd.178, label %in_check.exit, label %cond_next.i - -cond_next.i: ; preds = %entry - %tmp2.i5 = load i32* @white_to_move ; <i32> [#uses=1] - %tmp3.i = icmp eq i32 %tmp2.i5, 1 ; <i1> [#uses=0] - ret void - -in_check.exit: ; preds = %entry - %tmp7637 = icmp sgt i32 %tmp53, 0 ; <i1> [#uses=1] - br i1 %tmp7637, label %cond_true77, label %bb80 - -cond_true77: ; preds = %in_check.exit - %l.1.0 = bitcast i32 0 to i32 ; <i32> [#uses=2] - call fastcc void @make( %struct.move_s* %tmp, i32 %l.1.0 ) - %tmp61 = call fastcc i32 @check_legal( %struct.move_s* %tmp, i32 %l.1.0, i32 0 ) ; <i32> [#uses=1] - %tmp62 = icmp eq i32 %tmp61, 0 ; <i1> [#uses=0] - ret void - -bb80: ; preds = %in_check.exit - %tmp81 = load i32* @Variant ; <i32> [#uses=1] - %tmp82 = icmp eq i32 %tmp81, 4 ; <i1> [#uses=1] - br i1 %tmp82, label %cond_true83, label %cond_next118 - -cond_true83: ; preds = %bb80 - %tmp84 = load i32* @legals ; <i32> [#uses=1] - %tmp85 = icmp eq i32 %tmp84, 0 ; <i1> [#uses=0] - ret void - -cond_next118: ; preds = %bb80 - %tmp119 = load i32* @Variant ; <i32> [#uses=1] - %tmp120 = icmp eq i32 %tmp119, 1 ; <i1> [#uses=1] - br i1 %tmp120, label %cond_next176, label %cond_true121 - -cond_true121: ; preds = %cond_next118 - %tmp122.b = load i1* @is_pondering.b ; <i1> [#uses=1] - br i1 %tmp122.b, label %cond_next176, label %cond_true124 - -cond_true124: ; preds = %cond_true121 - %tmp125 = load i32* @legals ; <i32> [#uses=1] - %tmp126 = icmp eq i32 %tmp125, 1 ; <i1> [#uses=1] - br i1 %tmp126, label %cond_true127, label %cond_next176 - -cond_true127: ; preds = %cond_true124 - %tmp128 = load i32* @inc ; <i32> [#uses=1] - %tmp129 = mul i32 %tmp128, 100 ; <i32> [#uses=1] - %tmp130 = load i32* @time_cushion ; <i32> [#uses=1] - %tmp131 = add i32 %tmp129, %tmp130 ; <i32> [#uses=1] - store i32 %tmp131, i32* @time_cushion - %tmp134 = getelementptr %struct.move_s* %agg.result, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp135 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp136 = load i32* %tmp135 ; <i32> [#uses=1] - store i32 %tmp136, i32* %tmp134 - %tmp137 = getelementptr %struct.move_s* %agg.result, i32 0, i32 1 ; <i32*> [#uses=1] - %tmp138 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 1 ; <i32*> [#uses=1] - %tmp139 = load i32* %tmp138 ; <i32> [#uses=1] - store i32 %tmp139, i32* %tmp137 - %tmp140 = getelementptr %struct.move_s* %agg.result, i32 0, i32 2 ; <i32*> [#uses=1] - %tmp141 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 2 ; <i32*> [#uses=1] - %tmp142 = load i32* %tmp141 ; <i32> [#uses=1] - store i32 %tmp142, i32* %tmp140 - %tmp143 = getelementptr %struct.move_s* %agg.result, i32 0, i32 3 ; <i32*> [#uses=1] - %tmp144 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 3 ; <i32*> [#uses=1] - %tmp145 = load i32* %tmp144 ; <i32> [#uses=1] - store i32 %tmp145, i32* %tmp143 - %tmp146 = getelementptr %struct.move_s* %agg.result, i32 0, i32 4 ; <i32*> [#uses=1] - %tmp147 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 4 ; <i32*> [#uses=1] - %tmp148 = load i32* %tmp147 ; <i32> [#uses=1] - store i32 %tmp148, i32* %tmp146 - %tmp149 = getelementptr %struct.move_s* %agg.result, i32 0, i32 5 ; <i32*> [#uses=1] - %tmp150 = getelementptr [512 x %struct.move_s]* %moves, i32 0, i32 0, i32 5 ; <i32*> [#uses=1] - %tmp151 = load i32* %tmp150 ; <i32> [#uses=1] - store i32 %tmp151, i32* %tmp149 - ret void - -cond_next176: ; preds = %cond_true124, %cond_true121, %cond_next118 - call fastcc void @check_phase( ) - %tmp177 = load i32* @phase ; <i32> [#uses=1] - switch i32 %tmp177, label %bb187 [ - i32 0, label %bb178 - i32 1, label %bb180 - i32 2, label %bb183 - ] - -bb178: ; preds = %cond_next176 - %tmp179 = call i32 (i8*, ...)* @printf( i8* getelementptr ([16 x i8]* @str40.upgrd.84, i32 0, i64 0) ) ; <i32> [#uses=0] - %tmp18854.b = load i1* @is_pondering.b ; <i1> [#uses=1] - br i1 %tmp18854.b, label %cond_false210, label %cond_true190 - -bb180: ; preds = %cond_next176 - %tmp182 = call i32 (i8*, ...)* @printf( i8* getelementptr ([19 x i8]* @str.upgrd.85, i32 0, i64 0) ) ; <i32> [#uses=0] - %tmp18856.b = load i1* @is_pondering.b ; <i1> [#uses=0] - ret void - -bb183: ; preds = %cond_next176 - %tmp185 = call i32 (i8*, ...)* @printf( i8* getelementptr ([16 x i8]* @str1.upgrd.86, i32 0, i64 0) ) ; <i32> [#uses=0] - %tmp18858.b = load i1* @is_pondering.b ; <i1> [#uses=0] - ret void - -bb187: ; preds = %cond_next176 - %tmp188.b = load i1* @is_pondering.b ; <i1> [#uses=0] - ret void - -cond_true190: ; preds = %bb178 - %tmp191 = load i32* @fixed_time ; <i32> [#uses=1] - %tmp192 = icmp eq i32 %tmp191, 0 ; <i1> [#uses=0] - ret void - -cond_false210: ; preds = %bb178 - store i32 999999, i32* @time_for_move - br i1 %tmp21362, label %cond_true226.critedge, label %bb287.critedge - -cond_true226.critedge: ; preds = %cond_false210 - %tmp223.c = call i32 (i8*, ...)* @printf( i8* getelementptr ([20 x i8]* @str43, i32 0, i64 0), i32 999999 ) ; <i32> [#uses=0] - %tmp.i.upgrd.179 = load %struct.TType** @DP_TTable ; <%struct.TType*> [#uses=1] - %tmp.i7.b = load i1* @TTSize.b ; <i1> [#uses=1] - %tmp1.i = select i1 %tmp.i7.b, i32 60000000, i32 0 ; <i32> [#uses=1] - %tmp.i.sb = getelementptr %struct.TType* %tmp.i.upgrd.179, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %tmp.i.sb, i8 0, i32 %tmp1.i, i32 4 ) - %tmp2.i = load %struct.TType** @AS_TTable ; <%struct.TType*> [#uses=1] - %tmp3.i8.b = load i1* @TTSize.b ; <i1> [#uses=1] - %tmp4.i = select i1 %tmp3.i8.b, i32 60000000, i32 0 ; <i32> [#uses=1] - %tmp2.i.upgrd.180 = getelementptr %struct.TType* %tmp2.i, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %tmp2.i.upgrd.180, i8 0, i32 %tmp4.i, i32 4 ) - %tmp.i.QTT = load %struct.QTType** @QS_TTable ; <%struct.QTType*> [#uses=1] - %tmp5.i9.b = load i1* @TTSize.b ; <i1> [#uses=1] - %tmp6.i10 = select i1 %tmp5.i9.b, i32 48000000, i32 0 ; <i32> [#uses=1] - %tmp7.i = getelementptr %struct.QTType* %tmp.i.QTT, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %tmp7.i, i8 0, i32 %tmp6.i10, i32 4 ) - %tmp.i.ECache = load %struct.ECacheType** @ECache ; <%struct.ECacheType*> [#uses=1] - %tmp.i14.b = load i1* @ECacheSize.b ; <i1> [#uses=1] - %tmp1.i16 = select i1 %tmp.i14.b, i32 12000000, i32 0 ; <i32> [#uses=1] - %tmp.i17 = bitcast %struct.ECacheType* %tmp.i.ECache to i8* ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %tmp.i17, i8 0, i32 %tmp1.i16, i32 4 ) - call void @llvm.memset.i32( i8* bitcast ([300 x i32]* @rootlosers to i8*), i8 0, i32 1200, i32 4 ) - %tmp234.b = load i1* @is_pondering.b ; <i1> [#uses=1] - br i1 %tmp234.b, label %bb263, label %cond_next238 - -cond_next238: ; preds = %cond_true226.critedge - %tmp239 = load i32* @Variant ; <i32> [#uses=2] - switch i32 %tmp239, label %bb263 [ - i32 3, label %bb249 - i32 4, label %bb249 - ] - -bb249: ; preds = %cond_next238, %cond_next238 - %tmp250 = load i32* @piece_count ; <i32> [#uses=1] - %tmp251 = icmp sgt i32 %tmp250, 3 ; <i1> [#uses=1] - %tmp240.not = icmp ne i32 %tmp239, 3 ; <i1> [#uses=1] - %brmerge = or i1 %tmp251, %tmp240.not ; <i1> [#uses=1] - br i1 %brmerge, label %bb260, label %bb263 - -bb260: ; preds = %bb249 - %tmp261 = load i32* @time_for_move ; <i32> [#uses=1] - %tmp261.upgrd.181 = sitofp i32 %tmp261 to float ; <float> [#uses=1] - %tmp261.upgrd.182 = fpext float %tmp261.upgrd.181 to double ; <double> [#uses=1] - %tmp262 = fdiv double %tmp261.upgrd.182, 3.000000e+00 ; <double> [#uses=1] - %tmp262.upgrd.183 = fptosi double %tmp262 to i32 ; <i32> [#uses=1] - store i32 %tmp262.upgrd.183, i32* @pn_time - %tmp1.b.i = load i1* @PBSize.b ; <i1> [#uses=1] - %tmp1.i1 = select i1 %tmp1.b.i, i32 200000, i32 0 ; <i32> [#uses=1] - %tmp.i2 = call i8* @calloc( i32 %tmp1.i1, i32 44 ) ; <i8*> [#uses=1] - %tmp.i.ub = bitcast i8* %tmp.i2 to i8* ; <i8*> [#uses=1] - store i8* %tmp.i.ub, i8** @membuff - %tmp2.i3 = call i8* @calloc( i32 1, i32 44 ) ; <i8*> [#uses=3] - %tmp2.i.upgrd.184 = bitcast i8* %tmp2.i3 to %struct.node_t* ; <%struct.node_t*> [#uses=6] - %tmp.i.move_s = getelementptr [512 x %struct.move_s]* null, i32 0, i32 0 ; <%struct.move_s*> [#uses=3] - call fastcc void @gen( %struct.move_s* %tmp.i.move_s ) - %tmp3.i4 = load i32* @numb_moves ; <i32> [#uses=4] - %tmp3.i5 = bitcast i32 %tmp3.i4 to i32 ; <i32> [#uses=0] - store i1 false, i1* @alllosers.b - call void @llvm.memset.i32( i8* bitcast ([300 x i32]* @rootlosers to i8*), i8 0, i32 1200, i32 4 ) - %nodesspent.i = bitcast [512 x i32]* null to i8* ; <i8*> [#uses=1] - call void @llvm.memset.i32( i8* %nodesspent.i, i8 0, i32 2048, i32 16 ) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5) - %tmp.i.i = load i32* @Variant ; <i32> [#uses=1] - %tmp.i.i.upgrd.185 = icmp eq i32 %tmp.i.i, 3 ; <i1> [#uses=1] - br i1 %tmp.i.i.upgrd.185, label %in_check.exit.i, label %cond_next.i.i - -cond_next.i.i: ; preds = %bb260 - %tmp2.i.i = load i32* @white_to_move ; <i32> [#uses=1] - %tmp3.i.i = icmp eq i32 %tmp2.i.i, 1 ; <i1> [#uses=1] - br i1 %tmp3.i.i, label %cond_true4.i.i, label %cond_false12.i.i - -cond_true4.i.i: ; preds = %cond_next.i.i - %tmp5.i.i = load i32* @wking_loc ; <i32> [#uses=1] - %tmp6.i.i = call fastcc i32 @is_attacked( i32 %tmp5.i.i, i32 0 ) ; <i32> [#uses=1] - %not.tmp7.i.i = icmp ne i32 %tmp6.i.i, 0 ; <i1> [#uses=1] - %tmp217.i = zext i1 %not.tmp7.i.i to i32 ; <i32> [#uses=1] - %tmp4219.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=1] - br i1 %tmp4219.i, label %cond_true43.i, label %bb46.i - -cond_false12.i.i: ; preds = %cond_next.i.i - %tmp13.i.i = load i32* @bking_loc ; <i32> [#uses=1] - %tmp14.i.i = call fastcc i32 @is_attacked( i32 %tmp13.i.i, i32 1 ) ; <i32> [#uses=1] - %not.tmp15.i.i = icmp ne i32 %tmp14.i.i, 0 ; <i1> [#uses=1] - %tmp2120.i = zext i1 %not.tmp15.i.i to i32 ; <i32> [#uses=1] - %tmp4222.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=1] - br i1 %tmp4222.i, label %cond_true43.i, label %bb46.i - -in_check.exit.i: ; preds = %bb260 - %tmp4224.i = icmp sgt i32 %tmp3.i4, 0 ; <i1> [#uses=0] - ret void - -cond_true43.i: ; preds = %cond_false12.i.i, %cond_true4.i.i - %tmp21.0.ph.i = phi i32 [ %tmp217.i, %cond_true4.i.i ], [ %tmp2120.i, %cond_false12.i.i ] ; <i32> [#uses=1] - %i.0.0.i = bitcast i32 0 to i32 ; <i32> [#uses=2] - call fastcc void @make( %struct.move_s* %tmp.i.move_s, i32 %i.0.0.i ) - %tmp27.i = call fastcc i32 @check_legal( %struct.move_s* %tmp.i.move_s, i32 %i.0.0.i, i32 %tmp21.0.ph.i ) ; <i32> [#uses=1] - %tmp.i6 = icmp eq i32 %tmp27.i, 0 ; <i1> [#uses=0] - ret void - -bb46.i: ; preds = %cond_false12.i.i, %cond_true4.i.i - %tmp48.i = icmp eq i32 0, 0 ; <i1> [#uses=1] - br i1 %tmp48.i, label %cond_true49.i, label %cond_next53.i - -cond_true49.i: ; preds = %bb46.i - store i32 0, i32* @bufftop - %tmp50.i = load i8** @membuff ; <i8*> [#uses=1] - free i8* %tmp50.i - free i8* %tmp2.i3 - ret void - -cond_next53.i: ; preds = %bb46.i - store i32 1, i32* @nodecount - store i32 0, i32* @iters - store i32 0, i32* @maxply - store i32 0, i32* @forwards - %tmp54.i = load i32* @move_number ; <i32> [#uses=1] - %tmp55.i = load i32* @ply ; <i32> [#uses=1] - %tmp56.i = add i32 %tmp54.i, -1 ; <i32> [#uses=1] - %tmp57.i = add i32 %tmp56.i, %tmp55.i ; <i32> [#uses=1] - %tmp58.i = load i32* @hash ; <i32> [#uses=1] - %tmp.i.upgrd.186 = getelementptr [600 x i32]* @hash_history, i32 0, i32 %tmp57.i ; <i32*> [#uses=1] - store i32 %tmp58.i, i32* %tmp.i.upgrd.186 - %tmp59.i = load i32* @white_to_move ; <i32> [#uses=1] - %tmp60.i = icmp eq i32 %tmp59.i, 0 ; <i1> [#uses=1] - %tmp60.i.upgrd.187 = zext i1 %tmp60.i to i32 ; <i32> [#uses=1] - store i32 %tmp60.i.upgrd.187, i32* @root_to_move - %tmp.i4.i = load i32* @Variant ; <i32> [#uses=2] - %tmp.i5.i = icmp eq i32 %tmp.i4.i, 3 ; <i1> [#uses=1] - br i1 %tmp.i5.i, label %cond_true.i.i, label %cond_false.i.i - -cond_true.i.i: ; preds = %cond_next53.i - call fastcc void @suicide_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 ) - %tmp6328.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=1] - %tmp29.i = load i8* %tmp6328.i ; <i8> [#uses=1] - %tmp6430.i = icmp eq i8 %tmp29.i, 1 ; <i1> [#uses=0] - ret void - -cond_false.i.i: ; preds = %cond_next53.i - %tmp2.i.i.upgrd.188 = icmp eq i32 %tmp.i4.i, 4 ; <i1> [#uses=1] - %tmp63.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=2] - br i1 %tmp2.i.i.upgrd.188, label %cond_true3.i.i, label %cond_false5.i.i - -cond_true3.i.i: ; preds = %cond_false.i.i - call fastcc void @losers_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 ) - %tmp31.i = load i8* %tmp63.i ; <i8> [#uses=1] - %tmp6432.i = icmp eq i8 %tmp31.i, 1 ; <i1> [#uses=1] - br i1 %tmp6432.i, label %bb75.i, label %cond_next67.i - -cond_false5.i.i: ; preds = %cond_false.i.i - call fastcc void @std_pn_eval( %struct.node_t* %tmp2.i.upgrd.184 ) - %tmp.i.upgrd.189 = load i8* %tmp63.i ; <i8> [#uses=1] - %tmp64.i = icmp eq i8 %tmp.i.upgrd.189, 1 ; <i1> [#uses=0] - ret void - -cond_next67.i: ; preds = %cond_true3.i.i - %tmp69.i = getelementptr %struct.node_t* %tmp2.i.upgrd.184, i32 0, i32 0 ; <i8*> [#uses=1] - %tmp70.i = load i8* %tmp69.i ; <i8> [#uses=1] - %tmp71.i = icmp eq i8 %tmp70.i, 0 ; <i1> [#uses=0] - ret void - -bb75.i: ; preds = %cond_true3.i.i - store i32 0, i32* @bufftop - %tmp76.i = load i8** @membuff ; <i8*> [#uses=1] - free i8* %tmp76.i - free i8* %tmp2.i3 - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5) - %tmp28869 = load i32* @result ; <i32> [#uses=1] - %tmp28970 = icmp eq i32 %tmp28869, 0 ; <i1> [#uses=1] - br i1 %tmp28970, label %cond_next337, label %cond_true290 - -bb263: ; preds = %bb249, %cond_next238, %cond_true226.critedge - br i1 %tmp21362, label %cond_true266, label %bb287 - -cond_true266: ; preds = %bb263 - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 0) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 1) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 2) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 3) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 4) - store i32 0, i32* getelementptr (%struct.move_s* @pn_move, i64 0, i32 5) - %tmp28871 = load i32* @result ; <i32> [#uses=1] - %tmp28972 = icmp eq i32 %tmp28871, 0 ; <i1> [#uses=0] - ret void - -bb287.critedge: ; preds = %cond_false210 - %tmp218.c = fdiv double 1.999998e+06, %tmp217 ; <double> [#uses=1] - %tmp218.c.upgrd.190 = fptosi double %tmp218.c to i32 ; <i32> [#uses=2] - store i32 %tmp218.c.upgrd.190, i32* @time_for_move - %tmp22367.c = call i32 (i8*, ...)* @printf( i8* getelementptr ([20 x i8]* @str43, i32 0, i64 0), i32 %tmp218.c.upgrd.190 ) ; <i32> [#uses=0] - ret void - -bb287: ; preds = %bb263 - %tmp288 = load i32* @result ; <i32> [#uses=1] - %tmp289 = icmp eq i32 %tmp288, 0 ; <i1> [#uses=0] - ret void - -cond_true290: ; preds = %bb75.i - %tmp292 = load i32* getelementptr (%struct.move_s* @pn_move, i32 0, i32 1) ; <i32> [#uses=1] - %tmp295 = icmp eq i32 %tmp292, 0 ; <i1> [#uses=0] - ret void - -cond_next337: ; preds = %bb75.i - %tmp338.b = load i1* @forcedwin.b ; <i1> [#uses=1] - br i1 %tmp338.b, label %bb348, label %cond_next342 - -cond_next342: ; preds = %cond_next337 - %tmp343 = load i32* @result ; <i32> [#uses=1] - %tmp344 = icmp eq i32 %tmp343, 0 ; <i1> [#uses=0] - ret void - -bb348: ; preds = %cond_next337 - %tmp350 = load i32* getelementptr (%struct.move_s* @pn_move, i32 0, i32 1) ; <i32> [#uses=1] - %tmp353 = icmp eq i32 %tmp350, 0 ; <i1> [#uses=0] - ret void -} - -declare fastcc i32 @eval(i32, i32) - -declare i8* @fgets(i8*, i32, %struct.FILE*) - -declare i32 @fclose(%struct.FILE*) - -declare fastcc i32 @losers_eval() - -declare fastcc i32 @l_bishop_mobility(i32) - -declare fastcc i32 @l_rook_mobility(i32) - -declare fastcc i32 @check_legal(%struct.move_s*, i32, i32) - -declare fastcc void @gen(%struct.move_s*) - -declare fastcc void @push_pawn(i32, i32) - -declare fastcc void @push_knighT(i32) - -declare fastcc void @push_slidE(i32) - -declare fastcc void @push_king(i32) - -declare fastcc i32 @f_in_check(%struct.move_s*, i32) - -declare fastcc void @make(%struct.move_s*, i32) - -declare fastcc void @add_capture(i32, i32, i32) - -declare fastcc void @unmake(%struct.move_s*, i32) - -declare i32 @ErrorIt(i32, i32) - -declare i32 @Pawn(i32, i32) - -declare i32 @Knight(i32, i32) - -declare i32 @King(i32, i32) - -declare i32 @Rook(i32, i32) - -declare i32 @Queen(i32, i32) - -declare i32 @Bishop(i32, i32) - -declare fastcc void @check_phase() - -declare fastcc i32 @bishop_mobility(i32) - -declare fastcc i32 @rook_mobility(i32) - -declare i32 @sscanf(i8*, i8*, ...) - -declare i32 @strncmp(i8*, i8*, i32) - -declare i8* @strchr(i8*, i32) - -declare fastcc void @CheckBadFlow(i32) - -declare fastcc void @suicide_pn_eval(%struct.node_t*) - -declare fastcc void @losers_pn_eval(%struct.node_t*) - -declare fastcc void @std_pn_eval(%struct.node_t*) - -declare fastcc %struct.node_t* @select_most_proving(%struct.node_t*) - -declare fastcc void @set_proof_and_disproof_numbers(%struct.node_t*) - -declare fastcc void @StoreTT(i32, i32, i32, i32, i32, i32) - -declare fastcc void @develop_node(%struct.node_t*) - -declare fastcc void @update_ancestors(%struct.node_t*) - -declare i8* @calloc(i32, i32) - -declare fastcc void @comp_to_coord(i64, i64, i64, i8*) - -declare i8* @strcat(i8*, i8*) - -declare i32 @sprintf(i8*, i8*, ...) - -declare fastcc void @order_moves(%struct.move_s*, i32*, i32*, i32, i32) - -declare fastcc i32 @see(i32, i32, i32) - -declare fastcc void @perft(i32) - -declare fastcc i32 @qsearch(i32, i32, i32) - -declare fastcc i32 @allocate_time() - -declare fastcc void @QStoreTT(i32, i32, i32, i32) - -declare fastcc i32 @search(i32, i32, i32, i32) - -declare fastcc i32 @ProbeTT(i32*, i32, i32*, i32*, i32*, i32) - -declare void @search_root(%struct.move_s* sret , i32, i32, i32) - -declare fastcc void @post_fh_thinking(i32, %struct.move_s*) - -declare fastcc void @post_thinking(i32) - -declare i32 @fprintf(%struct.FILE*, i8*, ...) - -declare fastcc i32 @s_bishop_mobility(i32) - -declare fastcc i32 @s_rook_mobility(i32) - -declare fastcc i32 @suicide_mid_eval() - -declare i32 @main(i32, i8**) - -declare fastcc void @init_game() - -declare void @setbuf(%struct.FILE*, i8*) - -declare i8* @strcpy(i8*, i8*) - -declare i32 @__tolower(i32) - -declare i32 @strcmp(i8*, i8*) - -declare void (i32)* @signal(i32, void (i32)*) - -declare fastcc void @hash_extract_pv(i32, i8*) - -declare double @difftime(i32, i32) - -declare i32 @getc(%struct.FILE*) - -declare i32 @strlen(i8*) - -declare i32 @fwrite(i8*, i32, i32, %struct.FILE*) diff --git a/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll b/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll deleted file mode 100644 index 9fcbf078c8b4..000000000000 --- a/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: opt < %s -dse -S | not grep tmp5 -; PR2599 -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" - -define void @foo({ i32, i32 }* %x) nounwind { -entry: - %tmp4 = getelementptr { i32, i32 }* %x, i32 0, i32 0 ; <i32*> [#uses=2] - %tmp5 = load i32* %tmp4, align 4 ; <i32> [#uses=1] - %tmp7 = getelementptr { i32, i32 }* %x, i32 0, i32 1 ; <i32*> [#uses=2] - %tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1] - %tmp17 = sub i32 0, %tmp8 ; <i32> [#uses=1] - store i32 %tmp5, i32* %tmp4, align 4 - store i32 %tmp17, i32* %tmp7, align 4 - ret void -} diff --git a/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll b/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll deleted file mode 100644 index 5958c6c50800..000000000000 --- a/test/Transforms/DeadStoreElimination/2008-11-28-MemDepUpdate.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: opt < %s -dse | llvm-dis -; PR3141 - %struct.ada__tags__dispatch_table = type { [1 x i32] } - %struct.f393a00_1__object = type { %struct.ada__tags__dispatch_table*, i8 } - %struct.f393a00_2__windmill = type { %struct.f393a00_1__object, i16 } - -define void @f393a00_2__swap(%struct.f393a00_2__windmill* %a, %struct.f393a00_2__windmill* %b) { -entry: - %t = alloca %struct.f393a00_2__windmill ; <%struct.f393a00_2__windmill*> [#uses=1] - %0 = getelementptr %struct.f393a00_2__windmill* %t, i32 0, i32 0, i32 0 ; <%struct.ada__tags__dispatch_table**> [#uses=1] - %1 = load %struct.ada__tags__dispatch_table** null, align 4 ; <%struct.ada__tags__dispatch_table*> [#uses=1] - %2 = load %struct.ada__tags__dispatch_table** %0, align 8 ; <%struct.ada__tags__dispatch_table*> [#uses=1] - store %struct.ada__tags__dispatch_table* %2, %struct.ada__tags__dispatch_table** null, align 4 - store %struct.ada__tags__dispatch_table* %1, %struct.ada__tags__dispatch_table** null, align 4 - ret void -} diff --git a/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll b/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll deleted file mode 100644 index c320a3eb6f7a..000000000000 --- a/test/Transforms/DeadStoreElimination/2008-11-29-OffEndOfBlock.ll +++ /dev/null @@ -1,27 +0,0 @@ -; RUN: opt < %s -dse | llvm-dis - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin7" - %struct.cab_archive = type { i32, i16, i16, i16, i16, i8, %struct.cab_folder*, %struct.cab_file* } - %struct.cab_file = type { i32, i16, i64, i8*, i32, i32, i32, %struct.cab_folder*, %struct.cab_file*, %struct.cab_archive*, %struct.cab_state* } - %struct.cab_folder = type { i16, i16, %struct.cab_archive*, i64, %struct.cab_folder* } - %struct.cab_state = type { i8*, i8*, [38912 x i8], i16, i16, i8*, i16 } - %struct.lzx_stream = type { i32, i32, i8, i64, i64, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i8, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, [84 x i8], [720 x i8], [314 x i8], [72 x i8], [104 x i16], [5408 x i16], [4596 x i16], [144 x i16], [51 x i32], [51 x i8], [32768 x i8], %struct.cab_file*, i32 (%struct.cab_file*, i8*, i32)* } - -declare fastcc i32 @lzx_read_lens(%struct.lzx_stream*, i8*, i32, i32) nounwind - -define i32 @lzx_decompress(%struct.lzx_stream* %lzx, i64 %out_bytes) nounwind { -bb13: ; preds = %entry - %0 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 25 ; <i8**> [#uses=2] - %1 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 26 ; <i8**> [#uses=2] - %2 = getelementptr %struct.lzx_stream* %lzx, i32 0, i32 29 ; <i32*> [#uses=0] - br label %bb14 - -bb14: ; preds = %bb13 - %3 = load i8** %0, align 4 ; <i8*> [#uses=1] - %4 = load i8** %1, align 4 ; <i8*> [#uses=1] - store i8* %3, i8** %0, align 4 - store i8* %4, i8** %1, align 4 - %5 = call fastcc i32 @lzx_read_lens(%struct.lzx_stream* %lzx, i8* null, i32 256, i32 0) nounwind ; <i32> [#uses=0] - unreachable -} diff --git a/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll b/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll deleted file mode 100644 index 9a943b476029..000000000000 --- a/test/Transforms/DeadStoreElimination/2009-11-10-Trampoline.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: opt -S -dse < %s | FileCheck %s - -declare i8* @llvm.init.trampoline(i8*, i8*, i8*) - -declare void @f() - -define void @unused_trampoline() { -; CHECK: @unused_trampoline - %storage = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1] -; CHECK-NOT: alloca - %cast = getelementptr [10 x i8]* %storage, i32 0, i32 0 ; <i8*> [#uses=1] - %tramp = call i8* @llvm.init.trampoline( i8* %cast, i8* bitcast (void ()* @f to i8*), i8* null ) ; <i8*> [#uses=1] -; CHECK-NOT: trampoline - ret void -; CHECK: ret void -} diff --git a/test/Transforms/DeadStoreElimination/PartialStore.ll b/test/Transforms/DeadStoreElimination/PartialStore.ll index ab1edf5b4731..7ac1e0844ed4 100644 --- a/test/Transforms/DeadStoreElimination/PartialStore.ll +++ b/test/Transforms/DeadStoreElimination/PartialStore.ll @@ -1,14 +1,71 @@ -; RUN: opt < %s -dse -S | \ -; RUN: not grep {store i8} +; RUN: opt < %s -basicaa -dse -S | FileCheck %s +target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" + ; Ensure that the dead store is deleted in this case. It is wholely ; overwritten by the second store. -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" -define i32 @test() { - %V = alloca i32 ; <i32*> [#uses=3] +define void @test1(i32 *%V) { %V2 = bitcast i32* %V to i8* ; <i8*> [#uses=1] store i8 0, i8* %V2 store i32 1234567, i32* %V - %X = load i32* %V ; <i32> [#uses=1] - ret i32 %X + ret void +; CHECK: @test1 +; CHECK-NEXT: store i32 1234567 +} + +; Note that we could do better by merging the two stores into one. +define void @test2(i32* %P) { +; CHECK: @test2 + store i32 0, i32* %P +; CHECK: store i32 + %Q = bitcast i32* %P to i16* + store i16 1, i16* %Q +; CHECK: store i16 + ret void +} + + +define i32 @test3(double %__x) { +; CHECK: @test3 +; CHECK: store double + %__u = alloca { [3 x i32] } + %tmp.1 = bitcast { [3 x i32] }* %__u to double* + store double %__x, double* %tmp.1 + %tmp.4 = getelementptr { [3 x i32] }* %__u, i32 0, i32 0, i32 1 + %tmp.5 = load i32* %tmp.4 + %tmp.6 = icmp slt i32 %tmp.5, 0 + %tmp.7 = zext i1 %tmp.6 to i32 + ret i32 %tmp.7 +} + +; PR6043 +define void @test4(i8* %P) { +; CHECK: @test4 +; CHECK-NEXT: bitcast +; CHECK-NEXT: store double + + store i8 19, i8* %P ;; dead + %A = getelementptr i8* %P, i32 3 + + store i8 42, i8* %A ;; dead + + %Q = bitcast i8* %P to double* + store double 0.0, double* %Q + ret void } +; PR8657 +declare void @test5a(i32*) +define void @test5(i32 %i) nounwind ssp { + %A = alloca i32 + %B = bitcast i32* %A to i8* + %C = getelementptr i8* %B, i32 %i + store i8 10, i8* %C ;; Dead store to variable index. + store i32 20, i32* %A + + call void @test5a(i32* %A) + ret void +; CHECK: @test5( +; CHECK-NEXT: alloca +; CHECK-NEXT: store i32 20 +; CHECK-NEXT: call void @test5a +} diff --git a/test/Transforms/DeadStoreElimination/alloca.ll b/test/Transforms/DeadStoreElimination/alloca.ll deleted file mode 100644 index b6818eb3824f..000000000000 --- a/test/Transforms/DeadStoreElimination/alloca.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: opt < %s -dse -S | not grep DEAD - -define void @test(i32* %Q) { - %P = alloca i32 ; <i32*> [#uses=1] - %DEAD = load i32* %Q ; <i32> [#uses=1] - store i32 %DEAD, i32* %P - ret void -} - diff --git a/test/Transforms/DeadStoreElimination/byval.ll b/test/Transforms/DeadStoreElimination/byval.ll deleted file mode 100644 index fa651b1ee382..000000000000 --- a/test/Transforms/DeadStoreElimination/byval.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: opt < %s -dse -S | not grep store - -%struct.x = type { i32, i32, i32, i32 } - -define i32 @foo(%struct.x* byval %a) nounwind { -entry: - %tmp2 = getelementptr %struct.x* %a, i32 0, i32 0 - store i32 1, i32* %tmp2, align 4 - ret i32 1 -} diff --git a/test/Transforms/DeadStoreElimination/const-pointers.ll b/test/Transforms/DeadStoreElimination/const-pointers.ll index 728a118944d6..7d57804631da 100644 --- a/test/Transforms/DeadStoreElimination/const-pointers.ll +++ b/test/Transforms/DeadStoreElimination/const-pointers.ll @@ -1,4 +1,4 @@ -; RUN: opt %s -dse -S | FileCheck %s +; RUN: opt %s -basicaa -dse -S | FileCheck %s %t = type { i32 } diff --git a/test/Transforms/DeadStoreElimination/context-sensitive.ll b/test/Transforms/DeadStoreElimination/context-sensitive.ll deleted file mode 100644 index 7954310f56bd..000000000000 --- a/test/Transforms/DeadStoreElimination/context-sensitive.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: opt < %s -dse -S | not grep DEAD -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" - -declare void @ext() - -define i32* @caller() { - %P = malloc i32 ; <i32*> [#uses=4] - %DEAD = load i32* %P ; <i32> [#uses=1] - %DEAD2 = add i32 %DEAD, 1 ; <i32> [#uses=1] - store i32 %DEAD2, i32* %P - call void @ext( ) - store i32 0, i32* %P - ret i32* %P -} - diff --git a/test/Transforms/DeadStoreElimination/crash.ll b/test/Transforms/DeadStoreElimination/crash.ll index 5aac877a9ecf..bb279cdb97f0 100644 --- a/test/Transforms/DeadStoreElimination/crash.ll +++ b/test/Transforms/DeadStoreElimination/crash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -dse -S +; RUN: opt < %s -basicaa -dse -S target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin10.0" @@ -55,3 +55,20 @@ dead: store i32 4, i32* %Q2 br label %dead } + + +; PR3141 +%struct.ada__tags__dispatch_table = type { [1 x i32] } +%struct.f393a00_1__object = type { %struct.ada__tags__dispatch_table*, i8 } +%struct.f393a00_2__windmill = type { %struct.f393a00_1__object, i16 } + +define void @test4(%struct.f393a00_2__windmill* %a, %struct.f393a00_2__windmill* %b) { +entry: + %t = alloca %struct.f393a00_2__windmill ; <%struct.f393a00_2__windmill*> [#uses=1] + %0 = getelementptr %struct.f393a00_2__windmill* %t, i32 0, i32 0, i32 0 ; <%struct.ada__tags__dispatch_table**> [#uses=1] + %1 = load %struct.ada__tags__dispatch_table** null, align 4 ; <%struct.ada__tags__dispatch_table*> [#uses=1] + %2 = load %struct.ada__tags__dispatch_table** %0, align 8 ; <%struct.ada__tags__dispatch_table*> [#uses=1] + store %struct.ada__tags__dispatch_table* %2, %struct.ada__tags__dispatch_table** null, align 4 + store %struct.ada__tags__dispatch_table* %1, %struct.ada__tags__dispatch_table** null, align 4 + ret void +} diff --git a/test/Transforms/DeadStoreElimination/free.ll b/test/Transforms/DeadStoreElimination/free.ll index 8b81ee353033..3c980ccac6b4 100644 --- a/test/Transforms/DeadStoreElimination/free.ll +++ b/test/Transforms/DeadStoreElimination/free.ll @@ -1,5 +1,11 @@ -; RUN: opt < %s -dse -S | not grep DEAD +; RUN: opt < %s -basicaa -dse -S | FileCheck %s +target datalayout = "e-p:64:64:64" + +; CHECK: @test +; CHECK-NEXT: bitcast +; CHECK-NEXT: @free +; CHECK-NEXT: ret void define void @test(i32* %Q, i32* %P) { %DEAD = load i32* %Q ; <i32> [#uses=1] store i32 %DEAD, i32* %P @@ -7,9 +13,28 @@ define void @test(i32* %Q, i32* %P) { ret void } +; CHECK: @test2 +; CHECK-NEXT: bitcast +; CHECK-NEXT: @free +; CHECK-NEXT: ret void define void @test2({i32, i32}* %P) { %Q = getelementptr {i32, i32} *%P, i32 0, i32 1 store i32 4, i32* %Q free {i32,i32}* %P ret void } + +; CHECK: @test4 +; CHECK-NOT: store +; CHECK: ret void +define void @test4() { + %m = call i8* @malloc(i64 24) + store i8 0, i8* %m + %m1 = getelementptr i8* %m, i64 1 + store i8 1, i8* %m1 + call void @free(i8* %m) + ret void +} + +declare void @free(i8*) +declare i8* @malloc(i64) diff --git a/test/Transforms/DeadStoreElimination/lifetime.ll b/test/Transforms/DeadStoreElimination/lifetime.ll index fd127d9f51bc..2b5cc5aedb7f 100644 --- a/test/Transforms/DeadStoreElimination/lifetime.ll +++ b/test/Transforms/DeadStoreElimination/lifetime.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -dse < %s | FileCheck %s +; RUN: opt -S -basicaa -dse < %s | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" diff --git a/test/Transforms/DeadStoreElimination/memcpy.ll b/test/Transforms/DeadStoreElimination/memcpy.ll deleted file mode 100644 index 8d996318ba8c..000000000000 --- a/test/Transforms/DeadStoreElimination/memcpy.ll +++ /dev/null @@ -1,52 +0,0 @@ -; RUN: opt < %s -dse -S | not grep alloca -; ModuleID = 'placeholder.adb' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" - %struct.placeholder__T5b = type { i32, [1 x i32] } - %struct.placeholder__an_interval___PAD = type { %struct.placeholder__interval, [4 x i32] } - %struct.placeholder__interval = type { i32, i32 } - %struct.placeholder__s__s__the_interval___PAD = type { %struct.placeholder__interval } - -define void @_ada_placeholder() nounwind { -entry: - %an_interval = alloca %struct.placeholder__an_interval___PAD ; <%struct.placeholder__an_interval___PAD*> [#uses=3] - %tmp34 = bitcast %struct.placeholder__an_interval___PAD* %an_interval to %struct.placeholder__T5b* ; <%struct.placeholder__T5b*> [#uses=1] - %tmp5 = getelementptr %struct.placeholder__an_interval___PAD* %an_interval, i32 0, i32 0, i32 0 ; <i32*> [#uses=2] - store i32 1, i32* %tmp5, align 8 - %tmp10 = getelementptr %struct.placeholder__T5b* %tmp34, i32 0, i32 1, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp10, align 4 - %tmp82 = load i32* %tmp5, align 8 ; <i32> [#uses=5] - %tmp83 = icmp slt i32 %tmp82, 6 ; <i1> [#uses=1] - %min84 = select i1 %tmp83, i32 %tmp82, i32 5 ; <i32> [#uses=3] - %tmp85 = icmp sgt i32 %min84, -1 ; <i1> [#uses=2] - %min84.cast193 = zext i32 %min84 to i64 ; <i64> [#uses=1] - %min84.cast193.op = shl i64 %min84.cast193, 33 ; <i64> [#uses=1] - %tmp104 = icmp sgt i32 %tmp82, -1 ; <i1> [#uses=2] - %tmp103.cast192 = zext i32 %tmp82 to i64 ; <i64> [#uses=1] - %tmp103.cast192.op = shl i64 %tmp103.cast192, 33 ; <i64> [#uses=1] - %min84.cast193.op.op = ashr i64 %min84.cast193.op, 28 ; <i64> [#uses=1] - %sextr121 = select i1 %tmp85, i64 %min84.cast193.op.op, i64 0 ; <i64> [#uses=2] - %tmp103.cast192.op.op = ashr i64 %tmp103.cast192.op, 28 ; <i64> [#uses=1] - %sextr123 = select i1 %tmp104, i64 %tmp103.cast192.op.op, i64 0 ; <i64> [#uses=2] - %tmp124 = icmp sle i64 %sextr121, %sextr123 ; <i1> [#uses=1] - %min125 = select i1 %tmp124, i64 %sextr121, i64 %sextr123 ; <i64> [#uses=1] - %sextr131194 = and i64 %min125, 34359738336 ; <i64> [#uses=1] - %tmp134 = add i64 %sextr131194, 63 ; <i64> [#uses=1] - lshr i64 %tmp134, 3 ; <i64>:0 [#uses=1] - %tmp150188.shrunk = trunc i64 %0 to i32 ; <i32> [#uses=1] - %tmp159 = and i32 %tmp150188.shrunk, -4 ; <i32> [#uses=1] - %tmp161 = alloca i8, i32 %tmp159 ; <i8*> [#uses=1] - %min167.op = shl i32 %min84, 2 ; <i32> [#uses=1] - %tmp170 = select i1 %tmp85, i32 %min167.op, i32 0 ; <i32> [#uses=2] - %tmp173.op = shl i32 %tmp82, 2 ; <i32> [#uses=1] - %tmp176 = select i1 %tmp104, i32 %tmp173.op, i32 0 ; <i32> [#uses=2] - %tmp177 = icmp sle i32 %tmp170, %tmp176 ; <i1> [#uses=1] - %min178 = select i1 %tmp177, i32 %tmp170, i32 %tmp176 ; <i32> [#uses=1] - %tmp179 = add i32 %min178, 7 ; <i32> [#uses=1] - %tmp180 = and i32 %tmp179, -4 ; <i32> [#uses=1] - %tmp183185 = bitcast %struct.placeholder__an_interval___PAD* %an_interval to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %tmp161, i8* %tmp183185, i32 %tmp180, i32 4 ) - ret void -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind diff --git a/test/Transforms/DeadStoreElimination/no-targetdata.ll b/test/Transforms/DeadStoreElimination/no-targetdata.ll index 7e8f52a085bf..6c7f940316a0 100644 --- a/test/Transforms/DeadStoreElimination/no-targetdata.ll +++ b/test/Transforms/DeadStoreElimination/no-targetdata.ll @@ -1,4 +1,4 @@ -; RUN: opt %s -dse -S | FileCheck %s +; RUN: opt %s -basicaa -dse -S | FileCheck %s declare void @test1f() diff --git a/test/Transforms/DeadStoreElimination/partial-overwrite.ll b/test/Transforms/DeadStoreElimination/partial-overwrite.ll deleted file mode 100644 index 048d4645fcc5..000000000000 --- a/test/Transforms/DeadStoreElimination/partial-overwrite.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: opt -dse -S %s | FileCheck %s -; Note that we could do better by merging the two stores into one. - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-unknown-linux-gnu" - -define void @test(i32* %P) { - store i32 0, i32* %P -; CHECK: store i32 - %Q = bitcast i32* %P to i16* - store i16 1, i16* %Q -; CHECK: store i16 - ret void -} diff --git a/test/Transforms/DeadStoreElimination/simple.ll b/test/Transforms/DeadStoreElimination/simple.ll index d8596401b30c..a61eac9729e8 100644 --- a/test/Transforms/DeadStoreElimination/simple.ll +++ b/test/Transforms/DeadStoreElimination/simple.ll @@ -1,10 +1,238 @@ -; RUN: opt < %s -dse -S | not grep DEAD +; RUN: opt < %s -basicaa -dse -S | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" -define void @test(i32* %Q, i32* %P) { - %DEAD = load i32* %Q ; <i32> [#uses=1] +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind +declare void @llvm.memset.i64(i8*, i8, i64, i32) +declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) +declare i8* @llvm.init.trampoline(i8*, i8*, i8*) + +define void @test1(i32* %Q, i32* %P) { + %DEAD = load i32* %Q store i32 %DEAD, i32* %P store i32 0, i32* %P ret void +; CHECK: @test1 +; CHECK-NEXT: store i32 0, i32* %P +; CHECK-NEXT: ret void +} + +; PR8576 - Should delete store of 10 even though p/q are may aliases. +define void @test2(i32 *%p, i32 *%q) { + store i32 10, i32* %p, align 4 + store i32 20, i32* %q, align 4 + store i32 30, i32* %p, align 4 + ret void +; CHECK: @test2 +; CHECK-NEXT: store i32 20 +} + + +; PR8677 +@g = global i32 1 + +define i32 @test3(i32* %g_addr) nounwind { +; CHECK: @test3 +; CHECK: load i32* %g_addr + %g_value = load i32* %g_addr, align 4 + store i32 -1, i32* @g, align 4 + store i32 %g_value, i32* %g_addr, align 4 + %tmp3 = load i32* @g, align 4 + ret i32 %tmp3 +} + + +define void @test4(i32* %Q) { + %a = load i32* %Q + volatile store i32 %a, i32* %Q + ret void +; CHECK: @test4 +; CHECK-NEXT: load i32 +; CHECK-NEXT: volatile store +; CHECK-NEXT: ret void +} + +define void @test5(i32* %Q) { + %a = volatile load i32* %Q + store i32 %a, i32* %Q + ret void +; CHECK: @test5 +; CHECK-NEXT: volatile load +; CHECK-NEXT: ret void +} + +; Should delete store of 10 even though memset is a may-store to P (P and Q may +; alias). +define void @test6(i32 *%p, i8 *%q) { + store i32 10, i32* %p, align 4 ;; dead. + call void @llvm.memset.i64(i8* %q, i8 42, i64 900, i32 1) + store i32 30, i32* %p, align 4 + ret void +; CHECK: @test6 +; CHECK-NEXT: call void @llvm.memset +} + +; Should delete store of 10 even though memcpy is a may-store to P (P and Q may +; alias). +define void @test7(i32 *%p, i8 *%q, i8* noalias %r) { + store i32 10, i32* %p, align 4 ;; dead. + call void @llvm.memcpy.i64(i8* %q, i8* %r, i64 900, i32 1) + store i32 30, i32* %p, align 4 + ret void +; CHECK: @test7 +; CHECK-NEXT: call void @llvm.memcpy +} + +; Do not delete stores that are only partially killed. +define i32 @test8() { + %V = alloca i32 + store i32 1234567, i32* %V + %V2 = bitcast i32* %V to i8* + store i8 0, i8* %V2 + %X = load i32* %V + ret i32 %X + +; CHECK: @test8 +; CHECK: store i32 1234567 +} + + +; Test for byval handling. +%struct.x = type { i32, i32, i32, i32 } +define void @test9(%struct.x* byval %a) nounwind { + %tmp2 = getelementptr %struct.x* %a, i32 0, i32 0 + store i32 1, i32* %tmp2, align 4 + ret void +; CHECK: @test9 +; CHECK-NEXT: ret void +} + +; va_arg has fuzzy dependence, the store shouldn't be zapped. +define double @test10(i8* %X) { + %X_addr = alloca i8* + store i8* %X, i8** %X_addr + %tmp.0 = va_arg i8** %X_addr, double + ret double %tmp.0 +; CHECK: @test10 +; CHECK: store +} + + +; DSE should delete the dead trampoline. +declare void @test11f() +define void @test11() { +; CHECK: @test11 + %storage = alloca [10 x i8], align 16 ; <[10 x i8]*> [#uses=1] +; CHECK-NOT: alloca + %cast = getelementptr [10 x i8]* %storage, i32 0, i32 0 ; <i8*> [#uses=1] + %tramp = call i8* @llvm.init.trampoline( i8* %cast, i8* bitcast (void ()* @test11f to i8*), i8* null ) ; <i8*> [#uses=1] +; CHECK-NOT: trampoline + ret void +; CHECK: ret void +} + + +; PR2599 - load -> store to same address. +define void @test12({ i32, i32 }* %x) nounwind { + %tmp4 = getelementptr { i32, i32 }* %x, i32 0, i32 0 + %tmp5 = load i32* %tmp4, align 4 + %tmp7 = getelementptr { i32, i32 }* %x, i32 0, i32 1 + %tmp8 = load i32* %tmp7, align 4 + %tmp17 = sub i32 0, %tmp8 + store i32 %tmp5, i32* %tmp4, align 4 + store i32 %tmp17, i32* %tmp7, align 4 + ret void +; CHECK: @test12 +; CHECK-NOT: tmp5 +; CHECK: ret void +} + + +; %P doesn't escape, the DEAD instructions should be removed. +declare void @test13f() +define i32* @test13() { + %p = tail call i8* @malloc(i32 4) + %P = bitcast i8* %p to i32* + %DEAD = load i32* %P + %DEAD2 = add i32 %DEAD, 1 + store i32 %DEAD2, i32* %P + call void @test13f( ) + store i32 0, i32* %P + ret i32* %P +; CHECK: @test13() +; CHECK-NEXT: malloc +; CHECK-NEXT: bitcast +; CHECK-NEXT: call void +} + +declare noalias i8* @malloc(i32) + + + +define void @test14(i32* %Q) { + %P = alloca i32 + %DEAD = load i32* %Q + store i32 %DEAD, i32* %P + ret void + +; CHECK: @test14 +; CHECK-NEXT: ret void } + +; PR8701 + +;; Fully dead overwrite of memcpy. +define void @test15(i8* %P, i8* %Q) nounwind ssp { + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + ret void +; CHECK: @test15 +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} + +;; Full overwrite of smaller memcpy. +define void @test16(i8* %P, i8* %Q) nounwind ssp { + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 8, i32 1) + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + ret void +; CHECK: @test16 +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} + +;; Overwrite of memset by memcpy. +define void @test17(i8* %P, i8* noalias %Q) nounwind ssp { + tail call void @llvm.memset.i64(i8* %P, i8 42, i64 8, i32 1) + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + ret void +; CHECK: @test17 +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} + +; Should not delete the volatile memset. +define void @test17v(i8* %P, i8* %Q) nounwind ssp { + tail call void @llvm.memset.p0i8.i64(i8* %P, i8 42, i64 8, i32 1, i1 true) + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false) + ret void +; CHECK: @test17v +; CHECK-NEXT: call void @llvm.memset +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} + +; PR8728 +; Do not delete instruction where possible situation is: +; A = B +; A = A +define void @test18(i8* %P, i8* %Q, i8* %R) nounwind ssp { + tail call void @llvm.memcpy.i64(i8* %P, i8* %Q, i64 12, i32 1) + tail call void @llvm.memcpy.i64(i8* %P, i8* %R, i64 12, i32 1) + ret void +; CHECK: @test18 +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret +} diff --git a/test/Transforms/DeadStoreElimination/volatile-load.ll b/test/Transforms/DeadStoreElimination/volatile-load.ll deleted file mode 100644 index 59a1129348b9..000000000000 --- a/test/Transforms/DeadStoreElimination/volatile-load.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: opt < %s -dse -S | grep {volatile load} - -@g_1 = global i32 0 - -define void @foo() nounwind { - %t = volatile load i32* @g_1 - ret void -} diff --git a/test/Transforms/EarlyCSE/basic.ll b/test/Transforms/EarlyCSE/basic.ll new file mode 100644 index 000000000000..e3c75f97dcfc --- /dev/null +++ b/test/Transforms/EarlyCSE/basic.ll @@ -0,0 +1,121 @@ +; RUN: opt < %s -S -early-cse | FileCheck %s + + +; CHECK: @test1 +define void @test1(i8 %V, i32 *%P) { + %A = bitcast i64 42 to double ;; dead + %B = add i32 4, 19 ;; constant folds + store i32 %B, i32* %P + ; CHECK-NEXT: store i32 23, i32* %P + + %C = zext i8 %V to i32 + %D = zext i8 %V to i32 ;; CSE + volatile store i32 %C, i32* %P + volatile store i32 %D, i32* %P + ; CHECK-NEXT: %C = zext i8 %V to i32 + ; CHECK-NEXT: volatile store i32 %C + ; CHECK-NEXT: volatile store i32 %C + + %E = add i32 %C, %C + %F = add i32 %C, %C + volatile store i32 %E, i32* %P + volatile store i32 %F, i32* %P + ; CHECK-NEXT: %E = add i32 %C, %C + ; CHECK-NEXT: volatile store i32 %E + ; CHECK-NEXT: volatile store i32 %E + + %G = add nuw i32 %C, %C ;; not a CSE with E + volatile store i32 %G, i32* %P + ; CHECK-NEXT: %G = add nuw i32 %C, %C + ; CHECK-NEXT: volatile store i32 %G + ret void +} + + +;; Simple load value numbering. +; CHECK: @test2 +define i32 @test2(i32 *%P) { + %V1 = load i32* %P + %V2 = load i32* %P + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: ret i32 0 +} + +;; Cross block load value numbering. +; CHECK: @test3 +define i32 @test3(i32 *%P, i1 %Cond) { + %V1 = load i32* %P + br i1 %Cond, label %T, label %F +T: + store i32 4, i32* %P + ret i32 42 +F: + %V2 = load i32* %P + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: F: + ; CHECK: ret i32 0 +} + +;; Cross block load value numbering stops when stores happen. +; CHECK: @test4 +define i32 @test4(i32 *%P, i1 %Cond) { + %V1 = load i32* %P + br i1 %Cond, label %T, label %F +T: + ret i32 42 +F: + ; Clobbers V1 + store i32 42, i32* %P + + %V2 = load i32* %P + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: F: + ; CHECK: ret i32 %Diff +} + +declare i32 @func(i32 *%P) readonly + +;; Simple call CSE'ing. +; CHECK: @test5 +define i32 @test5(i32 *%P) { + %V1 = call i32 @func(i32* %P) + %V2 = call i32 @func(i32* %P) + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: ret i32 0 +} + +;; Trivial Store->load forwarding +; CHECK: @test6 +define i32 @test6(i32 *%P) { + store i32 42, i32* %P + %V1 = load i32* %P + ret i32 %V1 + ; CHECK: ret i32 42 +} + +;; Trivial dead store elimination. +; CHECK: @test7 +define void @test7(i32 *%P) { + store i32 42, i32* %P + store i32 45, i32* %P + ret void + ; CHECK-NEXT: store i32 45 + ; CHECK-NEXT: ret void +} + +;; Readnone functions aren't invalidated by stores. +; CHECK: @test8 +define i32 @test8(i32 *%P) { + %V1 = call i32 @func(i32* %P) readnone + store i32 4, i32* %P + %V2 = call i32 @func(i32* %P) readnone + %Diff = sub i32 %V1, %V2 + ret i32 %Diff + ; CHECK: ret i32 0 +} + + diff --git a/test/Transforms/EarlyCSE/dg.exp b/test/Transforms/EarlyCSE/dg.exp new file mode 100644 index 000000000000..de42dad163fd --- /dev/null +++ b/test/Transforms/EarlyCSE/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.ll]] diff --git a/test/Transforms/FunctionAttrs/2008-09-03-ReadNone.ll b/test/Transforms/FunctionAttrs/2008-09-03-ReadNone.ll index 535a1d0fba6b..946453f586ed 100644 --- a/test/Transforms/FunctionAttrs/2008-09-03-ReadNone.ll +++ b/test/Transforms/FunctionAttrs/2008-09-03-ReadNone.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -functionattrs -S | grep readnone | count 4 +; RUN: opt < %s -basicaa -functionattrs -S | grep readnone | count 4 @x = global i32 0 declare i32 @e() readnone diff --git a/test/Transforms/FunctionAttrs/2008-09-03-ReadOnly.ll b/test/Transforms/FunctionAttrs/2008-09-03-ReadOnly.ll index b455fdd8c3ec..22eca1320415 100644 --- a/test/Transforms/FunctionAttrs/2008-09-03-ReadOnly.ll +++ b/test/Transforms/FunctionAttrs/2008-09-03-ReadOnly.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -functionattrs -S | grep readonly | count 2 +; RUN: opt < %s -basicaa -functionattrs -S | grep readonly | count 2 define i32 @f() { entry: diff --git a/test/Transforms/FunctionAttrs/2008-10-04-LocalMemory.ll b/test/Transforms/FunctionAttrs/2008-10-04-LocalMemory.ll index c6c2e13e33e1..faac1184b601 100644 --- a/test/Transforms/FunctionAttrs/2008-10-04-LocalMemory.ll +++ b/test/Transforms/FunctionAttrs/2008-10-04-LocalMemory.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -functionattrs -S | FileCheck %s +; RUN: opt < %s -basicaa -functionattrs -S | FileCheck %s %struct.X = type { i32*, i32* } diff --git a/test/Transforms/FunctionAttrs/2008-12-29-Constant.ll b/test/Transforms/FunctionAttrs/2008-12-29-Constant.ll index 672b5e1392b7..9655da45c646 100644 --- a/test/Transforms/FunctionAttrs/2008-12-29-Constant.ll +++ b/test/Transforms/FunctionAttrs/2008-12-29-Constant.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -functionattrs -S | grep readnone +; RUN: opt < %s -basicaa -functionattrs -S | grep readnone @s = external constant i8 ; <i8*> [#uses=1] diff --git a/test/Transforms/FunctionAttrs/2010-10-30-volatile.ll b/test/Transforms/FunctionAttrs/2010-10-30-volatile.ll new file mode 100644 index 000000000000..f21fabc493c7 --- /dev/null +++ b/test/Transforms/FunctionAttrs/2010-10-30-volatile.ll @@ -0,0 +1,10 @@ +; RUN: opt < %s -functionattrs -S | FileCheck %s +; PR8279 + +@g = constant i32 1 + +define void @foo() { +; CHECK: void @foo() { + %tmp = volatile load i32* @g + ret void +} diff --git a/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll b/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll index 2e0a1015caf5..9983374b154e 100644 --- a/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll +++ b/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | not grep {tmp10 =} +; RUN: opt < %s -basicaa -gvn -S | not grep {tmp10 =} %struct.INT2 = type { i32, i32 } @blkshifts = external global %struct.INT2* ; <%struct.INT2**> [#uses=2] diff --git a/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll b/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll index 0be33791f617..14cb91b53167 100644 --- a/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll +++ b/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll @@ -1,30 +1,33 @@ -; RUN: opt < %s -gvn -S | grep {tmp17625.* = phi i32. } -; RUN: opt < %s -gvn -S | grep {tmp17631.* = phi i32. } +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s -@last = external global [65 x i32*] ; <[65 x i32*]*> [#uses=1] +@last = external global [65 x i32*] define i32 @NextRootMove(i32 %wtm) { -cond_next95: ; preds = %cond_true85, %cond_true79, %cond_true73, %bb68 - %tmp17618 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 ; <i32*> [#uses=0] +entry: + %tmp17618 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 +; CHECK: entry: +; CHECK-NEXT: %tmp17618 = load +; CHECK-NOT: load +; CHECK-NOT: phi br label %cond_true116 -cond_true116: ; preds = %cond_true111 +cond_true116: br i1 false, label %cond_true128, label %cond_true145 -cond_true128: ; preds = %cond_true121 - %tmp17625 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 ; <i32*> [#uses=0] +cond_true128: + %tmp17625 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 br i1 false, label %bb98.backedge, label %return.loopexit -bb98.backedge: ; preds = %bb171, %cond_true145, %cond_true128 +bb98.backedge: br label %cond_true116 -cond_true145: ; preds = %cond_false - %tmp17631 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 ; <i32*> [#uses=0] +cond_true145: + %tmp17631 = load i32** getelementptr ([65 x i32*]* @last, i32 0, i32 1), align 4 br i1 false, label %bb98.backedge, label %return.loopexit -return.loopexit: ; preds = %bb171, %cond_true145, %cond_true128 +return.loopexit: br label %return -return: ; preds = %return.loopexit, %cond_next95, %cond_true85 +return: ret i32 0 } diff --git a/test/Transforms/GVN/2007-07-31-NoDomInherit.ll b/test/Transforms/GVN/2007-07-31-NoDomInherit.ll index faa1157dd8be..f2c001296f63 100644 --- a/test/Transforms/GVN/2007-07-31-NoDomInherit.ll +++ b/test/Transforms/GVN/2007-07-31-NoDomInherit.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | grep {tmp47 = phi i32 } +; RUN: opt < %s -basicaa -gvn -S | grep {tmp47 = phi i32 } %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* } @debug = external constant i32 ; <i32*> [#uses=0] diff --git a/test/Transforms/GVN/2007-07-31-RedundantPhi.ll b/test/Transforms/GVN/2007-07-31-RedundantPhi.ll index 0d1d8bced000..a570e3571ee0 100644 --- a/test/Transforms/GVN/2007-07-31-RedundantPhi.ll +++ b/test/Transforms/GVN/2007-07-31-RedundantPhi.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | not grep {tmp701 =} +; RUN: opt < %s -basicaa -gvn -S | not grep {tmp701 =} @img_width = external global i16 ; <i16*> [#uses=2] diff --git a/test/Transforms/GVN/2008-07-02-Unreachable.ll b/test/Transforms/GVN/2008-07-02-Unreachable.ll index 361c1557f24f..be69cfc0319c 100644 --- a/test/Transforms/GVN/2008-07-02-Unreachable.ll +++ b/test/Transforms/GVN/2008-07-02-Unreachable.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | grep {ret i8 \[%\]tmp3} +; RUN: opt < %s -basicaa -gvn -S | grep {ret i8 \[%\]tmp3} ; PR2503 @g_3 = external global i8 ; <i8*> [#uses=2] diff --git a/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll b/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll index 066e3038b087..d6e1c6b76d0b 100644 --- a/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll +++ b/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll @@ -1,4 +1,7 @@ -; RUN: opt < %s -gvn -enable-full-load-pre -S | FileCheck %s +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s + +; CHECK-NOT: load +; CHECK-NOT: phi define i8* @cat(i8* %s1, ...) nounwind { entry: @@ -29,18 +32,11 @@ bb10: ; preds = %bb8 br label %bb11 bb11: ; preds = %bb10, %bb9 -; CHECK: bb11: -; CHECK: phi -; CHECK-NOT: phi br label %bb12 bb12: ; preds = %bb11, %bb6 -; CHECK: bb12: -; CHECK: phi -; CHECK-NOT: phi br i1 undef, label %bb8, label %bb13 bb13: ; preds = %bb12 -; CHECK: bb13: ret i8* undef } diff --git a/test/Transforms/GVN/2010-11-13-Simplify.ll b/test/Transforms/GVN/2010-11-13-Simplify.ll new file mode 100644 index 000000000000..07585a20b6ca --- /dev/null +++ b/test/Transforms/GVN/2010-11-13-Simplify.ll @@ -0,0 +1,15 @@ +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s + +declare i32 @foo(i32) readnone + +define i1 @bar() { +; CHECK: @bar + %a = call i32 @foo (i32 0) readnone + %b = call i32 @foo (i32 0) readnone + %c = and i32 %a, %b + %x = call i32 @foo (i32 %a) readnone + %y = call i32 @foo (i32 %c) readnone + %z = icmp eq i32 %x, %y + ret i1 %z +; CHECK: ret i1 true +} diff --git a/test/Transforms/GVN/calls-nonlocal.ll b/test/Transforms/GVN/calls-nonlocal.ll index f0edf09bff98..24ef2e9ec412 100644 --- a/test/Transforms/GVN/calls-nonlocal.ll +++ b/test/Transforms/GVN/calls-nonlocal.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | grep strlen | count 2 +; RUN: opt < %s -basicaa -gvn -S | grep strlen | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9" diff --git a/test/Transforms/GVN/condprop.ll b/test/Transforms/GVN/condprop.ll index e212d791ae5a..be6c3498fe40 100644 --- a/test/Transforms/GVN/condprop.ll +++ b/test/Transforms/GVN/condprop.ll @@ -1,52 +1,55 @@ -; RUN: opt < %s -gvn -S | grep {br i1 false} +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s @a = external global i32 ; <i32*> [#uses=7] +; CHECK: @foo define i32 @foo() nounwind { entry: - %0 = load i32* @a, align 4 ; <i32> [#uses=1] - %1 = icmp eq i32 %0, 4 ; <i1> [#uses=1] + %0 = load i32* @a, align 4 + %1 = icmp eq i32 %0, 4 br i1 %1, label %bb, label %bb1 bb: ; preds = %entry br label %bb8 bb1: ; preds = %entry - %2 = load i32* @a, align 4 ; <i32> [#uses=1] - %3 = icmp eq i32 %2, 5 ; <i1> [#uses=1] + %2 = load i32* @a, align 4 + %3 = icmp eq i32 %2, 5 br i1 %3, label %bb2, label %bb3 bb2: ; preds = %bb1 br label %bb8 bb3: ; preds = %bb1 - %4 = load i32* @a, align 4 ; <i32> [#uses=1] - %5 = icmp eq i32 %4, 4 ; <i1> [#uses=1] + %4 = load i32* @a, align 4 + %5 = icmp eq i32 %4, 4 +; CHECK: br i1 false, label %bb4, label %bb5 br i1 %5, label %bb4, label %bb5 bb4: ; preds = %bb3 - %6 = load i32* @a, align 4 ; <i32> [#uses=1] - %7 = add i32 %6, 5 ; <i32> [#uses=1] + %6 = load i32* @a, align 4 + %7 = add i32 %6, 5 br label %bb8 bb5: ; preds = %bb3 - %8 = load i32* @a, align 4 ; <i32> [#uses=1] - %9 = icmp eq i32 %8, 5 ; <i1> [#uses=1] + %8 = load i32* @a, align 4 + %9 = icmp eq i32 %8, 5 +; CHECK: br i1 false, label %bb6, label %bb7 br i1 %9, label %bb6, label %bb7 bb6: ; preds = %bb5 - %10 = load i32* @a, align 4 ; <i32> [#uses=1] - %11 = add i32 %10, 4 ; <i32> [#uses=1] + %10 = load i32* @a, align 4 + %11 = add i32 %10, 4 br label %bb8 bb7: ; preds = %bb5 - %12 = load i32* @a, align 4 ; <i32> [#uses=1] + %12 = load i32* @a, align 4 br label %bb8 bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb - %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] ; <i32> [#uses=1] + %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] br label %return return: ; preds = %bb8 ret i32 %.0 -} +}
\ No newline at end of file diff --git a/test/Transforms/GVN/invariant-simple.ll b/test/Transforms/GVN/invariant-simple.ll index 0a4182c410ae..98ea48cdde32 100644 --- a/test/Transforms/GVN/invariant-simple.ll +++ b/test/Transforms/GVN/invariant-simple.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | FileCheck %s +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin7" diff --git a/test/Transforms/GVN/lifetime-simple.ll b/test/Transforms/GVN/lifetime-simple.ll index 48e5bc8bb63f..02f7bcc9e857 100644 --- a/test/Transforms/GVN/lifetime-simple.ll +++ b/test/Transforms/GVN/lifetime-simple.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | FileCheck %s +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin7" diff --git a/test/Transforms/GVN/load-constant-mem.ll b/test/Transforms/GVN/load-constant-mem.ll index 87f33eaadadb..314c8069cace 100644 --- a/test/Transforms/GVN/load-constant-mem.ll +++ b/test/Transforms/GVN/load-constant-mem.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -instcombine -S | grep {ret i32 0} +; RUN: opt < %s -basicaa -gvn -instcombine -S | grep {ret i32 0} ; PR4189 @G = external constant [4 x i32] diff --git a/test/Transforms/GVN/load-pre-licm.ll b/test/Transforms/GVN/load-pre-licm.ll new file mode 100644 index 000000000000..63541ad181d1 --- /dev/null +++ b/test/Transforms/GVN/load-pre-licm.ll @@ -0,0 +1,39 @@ +; RUN: opt -S -basicaa -gvn < %s | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" +target triple = "i386-apple-darwin11.0.0" + +@sortlist = external global [5001 x i32], align 4 + +define void @Bubble() nounwind noinline { +; CHECK: entry: +; CHECK-NEXT: %tmp7.pre = load i32 +entry: + br label %while.body5 + +; CHECK: while.body5: +; CHECK: %tmp7 = phi i32 +; CHECK-NOT: %tmp7 = load i32 +while.body5: + %indvar = phi i32 [ 0, %entry ], [ %tmp6, %if.end ] + %tmp5 = add i32 %indvar, 2 + %arrayidx9 = getelementptr [5001 x i32]* @sortlist, i32 0, i32 %tmp5 + %tmp6 = add i32 %indvar, 1 + %arrayidx = getelementptr [5001 x i32]* @sortlist, i32 0, i32 %tmp6 + %tmp7 = load i32* %arrayidx, align 4 + %tmp10 = load i32* %arrayidx9, align 4 + %cmp11 = icmp sgt i32 %tmp7, %tmp10 + br i1 %cmp11, label %if.then, label %if.end + +; CHECK: if.then: +if.then: + store i32 %tmp10, i32* %arrayidx, align 4 + store i32 %tmp7, i32* %arrayidx9, align 4 + br label %if.end + +if.end: + %exitcond = icmp eq i32 %tmp6, 100 + br i1 %exitcond, label %while.end.loopexit, label %while.body5 + +while.end.loopexit: + ret void +} diff --git a/test/Transforms/GVN/lpre-call-wrap-2.ll b/test/Transforms/GVN/lpre-call-wrap-2.ll index 79512a33d993..e39f3ed87d1c 100644 --- a/test/Transforms/GVN/lpre-call-wrap-2.ll +++ b/test/Transforms/GVN/lpre-call-wrap-2.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -gvn -enable-load-pre %s | FileCheck %s +; RUN: opt -S -basicaa -gvn -enable-load-pre %s | FileCheck %s ; ; The partially redundant load in bb1 should be hoisted to "bb". This comes ; from this C code (GCC PR 23455): diff --git a/test/Transforms/GVN/mixed.ll b/test/Transforms/GVN/mixed.ll index 5152f68f0efb..6bfada2f4d5c 100644 --- a/test/Transforms/GVN/mixed.ll +++ b/test/Transforms/GVN/mixed.ll @@ -1,5 +1,5 @@ -; RUN: opt < %s -gvn -S | not grep DEADLOAD -; RUN: opt < %s -gvn -S | not grep DEADGEP +; RUN: opt < %s -basicaa -gvn -S | not grep DEADLOAD +; RUN: opt < %s -basicaa -gvn -S | not grep DEADGEP define i32 @main(i32** %p) { block1: diff --git a/test/Transforms/GVN/non-local-offset.ll b/test/Transforms/GVN/non-local-offset.ll new file mode 100644 index 000000000000..8eaa99933ab9 --- /dev/null +++ b/test/Transforms/GVN/non-local-offset.ll @@ -0,0 +1,59 @@ +; RUN: opt -basicaa -gvn -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; GVN should ignore the store to p[1] to see that the load from p[0] is +; fully redundant. + +; CHECK: @yes +; CHECK: if.then: +; CHECK-NEXT: store i32 0, i32* %q +; CHECK-NEXT: ret void + +define void @yes(i1 %c, i32* %p, i32* %q) nounwind { +entry: + store i32 0, i32* %p + %p1 = getelementptr inbounds i32* %p, i64 1 + store i32 1, i32* %p1 + br i1 %c, label %if.else, label %if.then + +if.then: + %t = load i32* %p + store i32 %t, i32* %q + ret void + +if.else: + ret void +} + +; GVN should ignore the store to p[1] to see that the first load from p[0] is +; fully redundant. However, the second load is larger, so it's not a simple +; redundancy. + +; CHECK: @watch_out_for_size_change +; CHECK: if.then: +; CHECK-NEXT: store i32 0, i32* %q +; CHECK-NEXT: ret void +; CHECK: if.else: +; CHECK: load i64* %pc +; CHECK: store i64 + +define void @watch_out_for_size_change(i1 %c, i32* %p, i32* %q) nounwind { +entry: + store i32 0, i32* %p + %p1 = getelementptr inbounds i32* %p, i64 1 + store i32 1, i32* %p1 + br i1 %c, label %if.else, label %if.then + +if.then: + %t = load i32* %p + store i32 %t, i32* %q + ret void + +if.else: + %pc = bitcast i32* %p to i64* + %qc = bitcast i32* %q to i64* + %t64 = load i64* %pc + store i64 %t64, i64* %qc + ret void +} diff --git a/test/Transforms/GVN/nonescaping-malloc.ll b/test/Transforms/GVN/nonescaping-malloc.ll index 5a42d9536ca1..1d50205c6851 100644 --- a/test/Transforms/GVN/nonescaping-malloc.ll +++ b/test/Transforms/GVN/nonescaping-malloc.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -stats -disable-output |& grep {Number of loads deleted} +; RUN: opt < %s -basicaa -gvn -stats -disable-output |& grep {Number of loads deleted} ; rdar://7363102 ; GVN should be able to eliminate load %tmp22.i, because it is redundant with diff --git a/test/Transforms/GVN/null-aliases-nothing.ll b/test/Transforms/GVN/null-aliases-nothing.ll index 4d533bbc4064..9e4ae18c710c 100644 --- a/test/Transforms/GVN/null-aliases-nothing.ll +++ b/test/Transforms/GVN/null-aliases-nothing.ll @@ -1,4 +1,4 @@ -; RUN: opt %s -gvn -S | FileCheck %s +; RUN: opt %s -basicaa -gvn -S | FileCheck %s %t = type { i32 } declare void @test1f(i8*) diff --git a/test/Transforms/GVN/phi-translate.ll b/test/Transforms/GVN/phi-translate.ll new file mode 100644 index 000000000000..f10537e0c930 --- /dev/null +++ b/test/Transforms/GVN/phi-translate.ll @@ -0,0 +1,31 @@ +; RUN: opt -basicaa -gvn -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; CHECK: @foo +; CHECK: entry.end_crit_edge: +; CHECK: %n.pre = load i32* %q.phi.trans.insert +; CHECK: then: +; CHECK: store i32 %z +; CHECK: end: +; CHECK: %n = phi i32 [ %n.pre, %entry.end_crit_edge ], [ %z, %then ] +; CHECK: ret i32 %n + +@G = external global [100 x i32] +define i32 @foo(i32 %x, i32 %z) { +entry: + %tobool = icmp eq i32 %x, 0 + br i1 %tobool, label %end, label %then + +then: + %i = sext i32 %x to i64 + %p = getelementptr [100 x i32]* @G, i64 0, i64 %i + store i32 %z, i32* %p + br label %end + +end: + %j = sext i32 %x to i64 + %q = getelementptr [100 x i32]* @G, i64 0, i64 %j + %n = load i32* %q + ret i32 %n +} diff --git a/test/Transforms/GVN/pre-load.ll b/test/Transforms/GVN/pre-load.ll index d40a467bf677..bf4add42e80b 100644 --- a/test/Transforms/GVN/pre-load.ll +++ b/test/Transforms/GVN/pre-load.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -enable-load-pre -S | FileCheck %s +; RUN: opt < %s -basicaa -gvn -enable-load-pre -S | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" define i32 @test1(i32* %p, i1 %C) { diff --git a/test/Transforms/GVN/pre-single-pred.ll b/test/Transforms/GVN/pre-single-pred.ll index 706a16b7bdd2..f1f5c71a93ab 100644 --- a/test/Transforms/GVN/pre-single-pred.ll +++ b/test/Transforms/GVN/pre-single-pred.ll @@ -1,4 +1,13 @@ -; RUN: opt < %s -gvn -enable-load-pre -S | not grep {tmp3 = load} +; RUN: opt < %s -gvn -enable-load-pre -S | FileCheck %s +; This testcase assumed we'll PRE the load into %for.cond, but we don't actually +; verify that doing so is safe. If there didn't _happen_ to be a load in +; %for.end, we would actually be lengthening the execution on some paths, and +; we were never actually checking that case. Now we actually do perform some +; conservative checking to make sure we don't make paths longer, but we don't +; currently get this case, which we got lucky on previously. +; +; Now that that faulty assumption is corrected, test that we DON'T incorrectly +; hoist the load. Doing the right thing for the wrong reasons is still a bug. @p = external global i32 define i32 @f(i32 %n) nounwind { @@ -13,6 +22,8 @@ for.cond: ; preds = %for.inc, %entry for.cond.for.end_crit_edge: ; preds = %for.cond br label %for.end +; CHECK: for.body: +; CHECK-NEXT: %tmp3 = load i32* @p for.body: ; preds = %for.cond %tmp3 = load i32* @p ; <i32> [#uses=1] %dec = add i32 %tmp3, -1 ; <i32> [#uses=2] @@ -20,6 +31,7 @@ for.body: ; preds = %for.cond %cmp6 = icmp slt i32 %dec, 0 ; <i1> [#uses=1] br i1 %cmp6, label %for.body.for.end_crit_edge, label %for.inc +; CHECK: for.body.for.end_crit_edge: for.body.for.end_crit_edge: ; preds = %for.body br label %for.end diff --git a/test/Transforms/GVN/preserve-tbaa.ll b/test/Transforms/GVN/preserve-tbaa.ll new file mode 100644 index 000000000000..2fcfc471c5d2 --- /dev/null +++ b/test/Transforms/GVN/preserve-tbaa.ll @@ -0,0 +1,28 @@ +; RUN: opt -tbaa -basicaa -gvn -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +; GVN should preserve the TBAA tag on loads when doing PRE. + +; CHECK: @test +; CHECK: %tmp33.pre = load i16* undef, align 2, !tbaa !0 +; CHECK: br label %for.body +define void @test() nounwind { +entry: + br i1 undef, label %bb.nph, label %for.end + +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %for.body, %bb.nph + %tmp33 = load i16* undef, align 2, !tbaa !0 + store i16 undef, i16* undef, align 2, !tbaa !0 + br i1 false, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +} + +!0 = metadata !{metadata !"short", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Transforms/GVN/rle-must-alias.ll b/test/Transforms/GVN/rle-must-alias.ll index d61eb81b0691..479724063e0b 100644 --- a/test/Transforms/GVN/rle-must-alias.ll +++ b/test/Transforms/GVN/rle-must-alias.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | grep {DEAD = phi i32 } +; RUN: opt < %s -basicaa -gvn -S | grep {DEAD = phi i32 } ; GVN should eliminate the fully redundant %9 GEP which ; allows DEAD to be removed. This is PR3198. diff --git a/test/Transforms/GVN/rle-nonlocal.ll b/test/Transforms/GVN/rle-nonlocal.ll index 5c73dad399e6..6b74e9a946d1 100644 --- a/test/Transforms/GVN/rle-nonlocal.ll +++ b/test/Transforms/GVN/rle-nonlocal.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | FileCheck %s +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s define i32 @main(i32** %p) { block1: diff --git a/test/Transforms/GVN/rle-semidominated.ll b/test/Transforms/GVN/rle-semidominated.ll index 04e8c3856845..c6cd1fdc00c5 100644 --- a/test/Transforms/GVN/rle-semidominated.ll +++ b/test/Transforms/GVN/rle-semidominated.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | grep {DEAD = phi i32 } +; RUN: opt < %s -basicaa -gvn -S | grep {DEAD = phi i32 } define i32 @main(i32* %p) { block1: diff --git a/test/Transforms/GVN/rle.ll b/test/Transforms/GVN/rle.ll index d656c1a5fcc7..2e4332175070 100644 --- a/test/Transforms/GVN/rle.ll +++ b/test/Transforms/GVN/rle.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -gvn -S | FileCheck %s +; RUN: opt < %s -basicaa -gvn -S | FileCheck %s ; 32-bit little endian target. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll b/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll index cfc9f302ff00..5b06fea5d92c 100644 --- a/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll +++ b/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll @@ -2,9 +2,9 @@ ; alignments. Elements 0 and 2 must be 16-byte aligned, and element ; 1 must be at least 8 byte aligned (but could be more). -; RUN: opt < %s -globalopt -S | grep {@G.0 = internal global .*align 16} -; RUN: opt < %s -globalopt -S | grep {@G.1 = internal global .*align 8} -; RUN: opt < %s -globalopt -S | grep {@G.2 = internal global .*align 16} +; RUN: opt < %s -globalopt -S | grep {@G.0 = internal unnamed_addr global .*align 16} +; RUN: opt < %s -globalopt -S | grep {@G.1 = internal unnamed_addr global .*align 8} +; RUN: opt < %s -globalopt -S | grep {@G.2 = internal unnamed_addr global .*align 16} ; rdar://5891920 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll b/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll index e024fc27ecb6..d645ce49438b 100644 --- a/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll +++ b/test/Transforms/GlobalOpt/2009-03-07-PromotePtrToBool.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -globalopt -S | grep {@X = internal global i32} +; RUN: opt < %s -globalopt -S | grep {@X = internal unnamed_addr global i32} target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin7" @X = internal global i32* null ; <i32**> [#uses=2] diff --git a/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll b/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll index c43565af635b..b73f62ba148b 100644 --- a/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll +++ b/test/Transforms/GlobalOpt/2009-11-16-MallocSingleStoreToGlobalVar.ll @@ -8,7 +8,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-darwin10.0" @TOP = internal global i64* null ; <i64**> [#uses=2] -; CHECK: @TOP = internal global i64* null +; CHECK: @TOP = internal unnamed_addr global i64* null @channelColumns = internal global i64 0 ; <i64*> [#uses=2] ; Derived from @DescribeChannel() in yacr2 diff --git a/test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll b/test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll new file mode 100644 index 000000000000..ad5b440a5abe --- /dev/null +++ b/test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll @@ -0,0 +1,16 @@ +; RUN: opt < %s -globalopt -S | FileCheck %s + +; PR8389: Globals with weak_odr linkage type must not be modified + +; CHECK: weak_odr global i32 0 + +@SomeVar = weak_odr global i32 0 + +@llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR } ] + +define internal void @CTOR() { + store i32 23, i32* @SomeVar + ret void +} + + diff --git a/test/Transforms/GlobalOpt/crash.ll b/test/Transforms/GlobalOpt/crash.ll index bb1fc84f46f9..9da5a5e3c935 100644 --- a/test/Transforms/GlobalOpt/crash.ll +++ b/test/Transforms/GlobalOpt/crash.ll @@ -55,3 +55,12 @@ entry: ret void } + + + +@data8 = internal global [8000 x i8] zeroinitializer, align 16 +define void @memset_with_strange_user() ssp { + call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds ([8000 x i8]* @data8, i64 0, i64 0), i8 undef, i64 ptrtoint (i8* getelementptr ([8000 x i8]* @data8, i64 1, i64 sub (i64 0, i64 ptrtoint ([8000 x i8]* @data8 to i64))) to i64), i32 16, i1 false) + ret void +} +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/Transforms/GlobalOpt/ctor-list-opt-constexpr.ll b/test/Transforms/GlobalOpt/ctor-list-opt-constexpr.ll new file mode 100644 index 000000000000..204f979ed3e1 --- /dev/null +++ b/test/Transforms/GlobalOpt/ctor-list-opt-constexpr.ll @@ -0,0 +1,23 @@ +; RUN: opt -globalopt %s -S | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +%0 = type { i32, void ()* } +%struct.foo = type { i32* } + +@G = global i32 0, align 4 +@H = global i32 0, align 4 +@X = global %struct.foo zeroinitializer, align 8 +@llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @init }] + +; PR8710 - GlobalOpt shouldn't change the global's initializer to have this +; arbitrary constant expression, the code generator can't handle it. +define internal void @init() { +entry: + %tmp = getelementptr inbounds %struct.foo* @X, i32 0, i32 0 + store i32* inttoptr (i64 sdiv (i64 ptrtoint (i32* @G to i64), i64 ptrtoint (i32* @H to i64)) to i32*), i32** %tmp, align 8 + ret void +} + +; CHECK: @init +; CHECK: store i32* diff --git a/test/Transforms/GlobalOpt/ctor-list-opt.ll b/test/Transforms/GlobalOpt/ctor-list-opt.ll index 887e7ee643c5..542c786762ea 100644 --- a/test/Transforms/GlobalOpt/ctor-list-opt.ll +++ b/test/Transforms/GlobalOpt/ctor-list-opt.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -globalopt -S | not grep CTOR -@llvm.global_ctors = appending global [10 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR2 }, { i32, void ()* } { i32 65535, void ()* @CTOR3 }, { i32, void ()* } { i32 65535, void ()* @CTOR4 }, { i32, void ()* } { i32 65535, void ()* @CTOR5 }, { i32, void ()* } { i32 65535, void ()* @CTOR6 }, { i32, void ()* } { i32 65535, void ()* @CTOR7 }, { i32, void ()* } { i32 65535, void ()* @CTOR8 }, { i32, void ()* } { i32 2147483647, void ()* null } ] ; <[10 x { i32, void ()* }]*> [#uses=0] +@llvm.global_ctors = appending global [11 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR1 }, { i32, void ()* } { i32 65535, void ()* @CTOR2 }, { i32, void ()* } { i32 65535, void ()* @CTOR3 }, { i32, void ()* } { i32 65535, void ()* @CTOR4 }, { i32, void ()* } { i32 65535, void ()* @CTOR5 }, { i32, void ()* } { i32 65535, void ()* @CTOR6 }, { i32, void ()* } { i32 65535, void ()* @CTOR7 }, { i32, void ()* } { i32 65535, void ()* @CTOR8 }, { i32, void ()* } { i32 65535, void ()* @CTOR9 }, { i32, void ()* } { i32 2147483647, void ()* null } ] ; <[10 x { i32, void ()* }]*> [#uses=0] @G = global i32 0 ; <i32*> [#uses=1] @G2 = global i32 0 ; <i32*> [#uses=1] @G3 = global i32 -123 ; <i32*> [#uses=2] @@ -74,7 +74,7 @@ define void @setto(i32* %P, i32 %V) { declare double @cos(double) define internal void @CTOR8() { - %X = call double @cos( double 1.000000e+00 ) ; <double> [#uses=1] + %X = call double @cos( double 0.000000e+00 ) ; <double> [#uses=1] store double %X, double* @D ret void } @@ -83,3 +83,18 @@ define i1 @accessor() { %V = load i1* @CTORGV ; <i1> [#uses=1] ret i1 %V } + +%struct.A = type { i32 } +%struct.B = type { i32 (...)**, i8*, [4 x i8] } +@GV1 = global %struct.B zeroinitializer, align 8 +@GV2 = constant [3 x i8*] [i8* inttoptr (i64 16 to i8*), i8* null, i8* bitcast ({ i8*, i8*, i32, i32, i8*, i64 }* null to i8*)] +; CHECK-NOT: CTOR9 +define internal void @CTOR9() { +entry: + %0 = bitcast %struct.B* @GV1 to i8* + %1 = getelementptr inbounds i8* %0, i64 16 + %2 = bitcast i8* %1 to %struct.A* + %3 = bitcast %struct.B* @GV1 to i8*** + store i8** getelementptr inbounds ([3 x i8*]* @GV2, i64 1, i64 0), i8*** %3 + ret void +} diff --git a/test/Transforms/GlobalOpt/globalsra-unknown-index.ll b/test/Transforms/GlobalOpt/globalsra-unknown-index.ll index 9397a1236551..1e0db6a998bd 100644 --- a/test/Transforms/GlobalOpt/globalsra-unknown-index.ll +++ b/test/Transforms/GlobalOpt/globalsra-unknown-index.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -globalopt -S > %t -; RUN: grep {@Y = internal global \\\[3 x \[%\]struct.X\\\] zeroinitializer} %t +; RUN: grep {@Y = internal unnamed_addr global \\\[3 x \[%\]struct.X\\\] zeroinitializer} %t ; RUN: grep load %t | count 6 ; RUN: grep {add i32 \[%\]a, \[%\]b} %t | count 3 diff --git a/test/Transforms/GlobalOpt/memcpy.ll b/test/Transforms/GlobalOpt/memcpy.ll index 335f5ec3a368..8f063a2fe420 100644 --- a/test/Transforms/GlobalOpt/memcpy.ll +++ b/test/Transforms/GlobalOpt/memcpy.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -globalopt -S | \ -; RUN: grep {G1 = internal constant} +; RUN: grep {G1 = internal unnamed_addr constant} @G1 = internal global [58 x i8] c"asdlfkajsdlfkajsd;lfkajds;lfkjasd;flkajsd;lkfja;sdlkfjasd\00" ; <[58 x i8]*> [#uses=1] diff --git a/test/Transforms/GlobalOpt/unnamed-addr.ll b/test/Transforms/GlobalOpt/unnamed-addr.ll new file mode 100644 index 000000000000..be0282122775 --- /dev/null +++ b/test/Transforms/GlobalOpt/unnamed-addr.ll @@ -0,0 +1,54 @@ +; RUN: opt %s -globalopt -S | FileCheck %s + +@a = internal global i32 0, align 4 +@b = internal global i32 0, align 4 +@c = internal global i32 0, align 4 +@d = internal constant [4 x i8] c"foo\00", align 1 + +; CHECK: @a = internal global i32 0, align 4 +; CHECK: @b = internal global i32 0, align 4 +; CHECK: @c = internal unnamed_addr global i32 0, align 4 +; CHECK: @d = internal unnamed_addr constant [4 x i8] c"foo\00", align 1 + +define i1 @bah(i64 %i) nounwind readonly optsize ssp { +entry: + %arrayidx4 = getelementptr inbounds [4 x i8]* @d, i64 0, i64 %i + %tmp5 = load i8* %arrayidx4, align 1 + %cmp = icmp eq i8 %tmp5, 42 + ret i1 %cmp +} + +define void @baz(i32 %x) { +entry: + store i32 %x, i32* @a, align 4 + store i32 %x, i32* @b, align 4 + store i32 %x, i32* @c, align 4 + ret void +} + +define i32 @foo(i32* %x) nounwind readnone optsize ssp { +entry: + %cmp = icmp eq i32* %x, @a + %conv = zext i1 %cmp to i32 + ret i32 %conv +} + +define i32 @bar() { +entry: + switch i64 ptrtoint (i32* @b to i64), label %sw.epilog [ + i64 1, label %return + i64 0, label %return + ] + +sw.epilog: + ret i32 0 + +return: + ret i32 1 +} + +define i32 @zed() { +entry: + %tmp1 = load i32* @c, align 4 + ret i32 %tmp1 +} diff --git a/test/Transforms/IndVarSimplify/loop-invariant-step.ll b/test/Transforms/IndVarSimplify/loop-invariant-step.ll deleted file mode 100644 index 2d2d1fe264ab..000000000000 --- a/test/Transforms/IndVarSimplify/loop-invariant-step.ll +++ /dev/null @@ -1,33 +0,0 @@ -; RUN: opt < %s -loop-index-split -instcombine -indvars -disable-output -; PR4455 - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" - -declare i8* @fast_memcpy(i8*, i8*, i64) - -define void @dvdsub_decode() nounwind { -entry: ; preds = %bb1 - br label %LoopA - -LoopA: ; preds = %LoopA, %entry - %x1.0.i17 = phi i32 [ %t0, %LoopA ], [ 0, %entry ] ; <i32> [#uses=2] - %t0 = add i32 %x1.0.i17, 1 ; <i32> [#uses=1] - br i1 undef, label %LoopA, label %middle - -middle: ; preds = %LoopA - %t1 = sub i32 0, %x1.0.i17 ; <i32> [#uses=1] - %t2 = add i32 %t1, 1 ; <i32> [#uses=1] - br label %LoopB - -LoopB: ; preds = %LoopB, %bb.nph.i27 - %y.029.i = phi i32 [ 0, %middle ], [ %t7, %LoopB ] ; <i32> [#uses=2] - %t3 = mul i32 %y.029.i, %t2 ; <i32> [#uses=1] - %t4 = sext i32 %t3 to i64 ; <i64> [#uses=1] - %t5 = getelementptr i8* null, i64 %t4 ; <i8*> [#uses=1] - %t6 = call i8* @fast_memcpy(i8* %t5, i8* undef, i64 undef) nounwind ; <i8*> [#uses=0] - %t7 = add i32 %y.029.i, 1 ; <i32> [#uses=1] - br i1 undef, label %LoopB, label %exit - -exit: - ret void -} diff --git a/test/Transforms/Inline/basictest.ll b/test/Transforms/Inline/basictest.ll index 6531b9e277e1..609a3d4e153e 100644 --- a/test/Transforms/Inline/basictest.ll +++ b/test/Transforms/Inline/basictest.ll @@ -43,5 +43,5 @@ define i32 @test2(i1 %cond) { ; CHECK: @test2( ; CHECK-NOT: = alloca -; CHECK: ret i32 42 +; CHECK: ret i32 } diff --git a/test/Transforms/Inline/byval.ll b/test/Transforms/Inline/byval.ll index c3552f696433..e601faf2bb37 100644 --- a/test/Transforms/Inline/byval.ll +++ b/test/Transforms/Inline/byval.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -inline -S | grep {llvm.memcpy} +; RUN: opt < %s -inline -S | FileCheck %s ; Inlining a byval struct should cause an explicit copy into an alloca. @@ -16,7 +16,7 @@ entry: declare i32 @printf(i8*, ...) nounwind -define i32 @main() nounwind { +define i32 @test1() nounwind { entry: %S = alloca %struct.ss ; <%struct.ss*> [#uses=4] %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] @@ -25,4 +25,82 @@ entry: store i64 2, i64* %tmp4, align 4 call void @f( %struct.ss* byval %S ) nounwind ret i32 0 +; CHECK: @test1() +; CHECK: %S1 = alloca %struct.ss +; CHECK: %S = alloca %struct.ss +; CHECK: call void @llvm.memcpy +; CHECK: ret i32 0 } + +; Inlining a byval struct should NOT cause an explicit copy +; into an alloca if the function is readonly + +define internal i32 @f2(%struct.ss* byval %b) nounwind readonly { +entry: + %tmp = getelementptr %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2] + %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1] + %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1] + ret i32 %tmp2 +} + +define i32 @test2() nounwind { +entry: + %S = alloca %struct.ss ; <%struct.ss*> [#uses=4] + %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %tmp1, align 8 + %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1] + store i64 2, i64* %tmp4, align 4 + %X = call i32 @f2( %struct.ss* byval %S ) nounwind + ret i32 %X +; CHECK: @test2() +; CHECK: %S = alloca %struct.ss +; CHECK-NOT: call void @llvm.memcpy +; CHECK: ret i32 +} + + +; Inlining a byval with an explicit alignment needs to use *at least* that +; alignment on the generated alloca. +; PR8769 +declare void @g3(%struct.ss* %p) + +define internal void @f3(%struct.ss* byval align 64 %b) nounwind { + call void @g3(%struct.ss* %b) ;; Could make alignment assumptions! + ret void +} + +define void @test3() nounwind { +entry: + %S = alloca %struct.ss, align 1 ;; May not be aligned. + call void @f3( %struct.ss* byval align 64 %S) nounwind + ret void +; CHECK: @test3() +; CHECK: %S1 = alloca %struct.ss, align 64 +; CHECK: %S = alloca %struct.ss +; CHECK: call void @llvm.memcpy +; CHECK: call void @g3(%struct.ss* %S1) +; CHECK: ret void +} + + +; Inlining a byval struct should NOT cause an explicit copy +; into an alloca if the function is readonly, but should increase an alloca's +; alignment to satisfy an explicit alignment request. + +define internal i32 @f4(%struct.ss* byval align 64 %b) nounwind readonly { + call void @g3(%struct.ss* %b) + ret i32 4 +} + +define i32 @test4() nounwind { +entry: + %S = alloca %struct.ss, align 2 ; <%struct.ss*> [#uses=4] + %X = call i32 @f4( %struct.ss* byval align 64 %S ) nounwind + ret i32 %X +; CHECK: @test4() +; CHECK: %S = alloca %struct.ss, align 64 +; CHECK-NOT: call void @llvm.memcpy +; CHECK: call void @g3 +; CHECK: ret i32 4 +} + diff --git a/test/Transforms/Inline/byval2.ll b/test/Transforms/Inline/byval2.ll deleted file mode 100644 index a7ab77cb562c..000000000000 --- a/test/Transforms/Inline/byval2.ll +++ /dev/null @@ -1,28 +0,0 @@ -; RUN: opt < %s -inline -S | not grep {llvm.memcpy} - -; Inlining a byval struct should NOT cause an explicit copy -; into an alloca if the function is readonly - - %struct.ss = type { i32, i64 } -@.str = internal constant [10 x i8] c"%d, %lld\0A\00" ; <[10 x i8]*> [#uses=1] - -define internal i32 @f(%struct.ss* byval %b) nounwind readonly { -entry: - %tmp = getelementptr %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2] - %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1] - %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1] - ret i32 %tmp2 -} - -declare i32 @printf(i8*, ...) nounwind - -define i32 @main() nounwind { -entry: - %S = alloca %struct.ss ; <%struct.ss*> [#uses=4] - %tmp1 = getelementptr %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp1, align 8 - %tmp4 = getelementptr %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1] - store i64 2, i64* %tmp4, align 4 - %X = call i32 @f( %struct.ss* byval %S ) nounwind - ret i32 %X -} diff --git a/test/Transforms/Inline/devirtualize-3.ll b/test/Transforms/Inline/devirtualize-3.ll index 0a50786498df..c32be4e024a3 100644 --- a/test/Transforms/Inline/devirtualize-3.ll +++ b/test/Transforms/Inline/devirtualize-3.ll @@ -1,4 +1,4 @@ -; RUN: opt -inline -S -scalarrepl -gvn -instcombine %s | FileCheck %s +; RUN: opt -basicaa -inline -S -scalarrepl -gvn -instcombine %s | FileCheck %s ; PR5009 ; CHECK: define i32 @main() diff --git a/test/Transforms/Inline/devirtualize.ll b/test/Transforms/Inline/devirtualize.ll index 9ed4b6958c38..51ea4baa3866 100644 --- a/test/Transforms/Inline/devirtualize.ll +++ b/test/Transforms/Inline/devirtualize.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -inline -scalarrepl -instcombine -simplifycfg -instcombine -gvn -globaldce %s | FileCheck %s +; RUN: opt -S -basicaa -inline -scalarrepl -instcombine -simplifycfg -instcombine -gvn -globaldce %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.0.0" diff --git a/test/Transforms/Inline/gvn-inline-iteration.ll b/test/Transforms/Inline/gvn-inline-iteration.ll index 32144d4ebba5..e502fd5777d5 100644 --- a/test/Transforms/Inline/gvn-inline-iteration.ll +++ b/test/Transforms/Inline/gvn-inline-iteration.ll @@ -1,4 +1,4 @@ -; RUN: opt -inline -gvn %s -S -max-cg-scc-iterations=1 | FileCheck %s +; RUN: opt -basicaa -inline -gvn %s -S -max-cg-scc-iterations=1 | FileCheck %s ; rdar://6295824 and PR6724 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" diff --git a/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll b/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll index 6d227547c8d5..c02d33ccc1b7 100644 --- a/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll +++ b/test/Transforms/InstCombine/2003-08-12-AllocaNonNull.ll @@ -1,7 +1,6 @@ ; This testcase can be simplified by "realizing" that alloca can never return ; null. -; RUN: opt < %s -instcombine -simplifycfg | \ -; RUN: llvm-dis | not grep br +; RUN: opt < %s -instcombine -simplifycfg -S | not grep br declare i32 @bitmap_clear(...) diff --git a/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll b/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll index c337ea781e4b..baaafefa81de 100644 --- a/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll +++ b/test/Transforms/InstCombine/2006-04-28-ShiftShiftLongLong.ll @@ -6,7 +6,7 @@ define i64 @test(i64 %X) { %Y = shl i64 %X, 16 ; <i64> [#uses=1] ; CHECK: %Y = shl i64 %X, 16 %Z = ashr i64 %Y, 16 ; <i64> [#uses=1] -; CHECK: %Z = ashr i64 %Y, 16 +; CHECK: %Z = ashr exact i64 %Y, 16 ret i64 %Z ; CHECK: ret i64 %Z } diff --git a/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll b/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll index 5bcb54306065..807efcf29f19 100644 --- a/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll +++ b/test/Transforms/InstCombine/2007-03-26-BadShiftMask.ll @@ -1,7 +1,6 @@ ; PR1271 ; RUN: opt < %s -instcombine -S | \ -; RUN: grep {ashr i32 %.mp137, 2} -; END. +; RUN: grep {ashr exact i32 %.mp137, 2} target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-pc-linux-gnu" diff --git a/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll b/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll index b2774d6522df..43af190abcea 100644 --- a/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll +++ b/test/Transforms/InstCombine/2008-11-20-DivMulRem.ll @@ -1,34 +1,67 @@ -; RUN: opt < %s -instcombine -S > %t -; RUN: grep urem %t | count 3 -; RUN: grep srem %t | count 1 -; RUN: grep sub %t | count 2 -; RUN: grep add %t | count 1 +; RUN: opt < %s -instcombine -S | FileCheck %s ; PR3103 define i8 @test1(i8 %x, i8 %y) { +; CHECK: @test1 %A = udiv i8 %x, %y +; CHECK-NEXT: urem %B = mul i8 %A, %y %C = sub i8 %x, %B ret i8 %C +; CHECK-NEXT: ret } define i8 @test2(i8 %x, i8 %y) { +; CHECK: @test2 %A = sdiv i8 %x, %y +; CHECK-NEXT: srem %B = mul i8 %A, %y %C = sub i8 %x, %B ret i8 %C +; CHECK-NEXT: ret } define i8 @test3(i8 %x, i8 %y) { +; CHECK: @test3 %A = udiv i8 %x, %y +; CHECK-NEXT: urem %B = mul i8 %A, %y %C = sub i8 %B, %x +; CHECK-NEXT: sub ret i8 %C +; CHECK-NEXT: ret } define i8 @test4(i8 %x) { +; CHECK: @test4 %A = udiv i8 %x, 3 +; CHECK-NEXT: urem %B = mul i8 %A, -3 +; CHECK-NEXT: sub %C = sub i8 %x, %B +; CHECK-NEXT: add ret i8 %C +; CHECK-NEXT: ret +} + +define i32 @test5(i32 %x, i32 %y) { +; CHECK: @test5 +; (((X / Y) * Y) / Y) -> X / Y + %div = sdiv i32 %x, %y +; CHECK-NEXT: sdiv + %mul = mul i32 %div, %y + %r = sdiv i32 %mul, %y + ret i32 %r +; CHECK-NEXT: ret +} + +define i32 @test6(i32 %x, i32 %y) { +; CHECK: @test6 +; (((X / Y) * Y) / Y) -> X / Y + %div = udiv i32 %x, %y +; CHECK-NEXT: udiv + %mul = mul i32 %div, %y + %r = udiv i32 %mul, %y + ret i32 %r +; CHECK-NEXT: ret } diff --git a/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll b/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll new file mode 100644 index 000000000000..441d5f9b0b64 --- /dev/null +++ b/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll @@ -0,0 +1,46 @@ +; RUN: opt -instcombine -S < %s | FileCheck %s + +; <rdar://problem/8606771> +; CHECK: @main +define i32 @main(i32 %argc) nounwind ssp { +entry: + %tmp3151 = trunc i32 %argc to i8 +; CHECK: %tmp3162 = shl i8 %tmp3151, 5 +; CHECK: and i8 %tmp3162, 64 +; CHECK-NOT: shl +; CHECK-NOT: shr + %tmp3161 = or i8 %tmp3151, -17 + %tmp3162 = and i8 %tmp3151, 122 + %tmp3163 = xor i8 %tmp3162, -17 + %tmp4114 = shl i8 %tmp3163, 6 + %tmp4115 = xor i8 %tmp4114, %tmp3163 + %tmp4120 = xor i8 %tmp3161, %tmp4115 + %tmp4126 = lshr i8 %tmp4120, 7 + %tmp4127 = mul i8 %tmp4126, 64 + %tmp4086 = zext i8 %tmp4127 to i32 +; CHECK: ret i32 + ret i32 %tmp4086 +} + +; rdar://8739316 +; CHECK: @foo +define i8 @foo(i8 %arg, i8 %arg1) nounwind { +bb: + %tmp = shl i8 %arg, 7 + %tmp2 = and i8 %arg1, 84 + %tmp3 = and i8 %arg1, -118 + %tmp4 = and i8 %arg1, 33 + %tmp5 = sub i8 -88, %tmp2 + %tmp6 = and i8 %tmp5, 84 + %tmp7 = or i8 %tmp4, %tmp6 + %tmp8 = xor i8 %tmp, %tmp3 + %tmp9 = or i8 %tmp7, %tmp8 + %tmp10 = lshr i8 %tmp8, 7 + %tmp11 = shl i8 %tmp10, 5 + +; CHECK: %0 = lshr i8 %tmp8, 2 +; CHECK: %tmp11 = and i8 %0, 32 + + %tmp12 = xor i8 %tmp11, %tmp9 + ret i8 %tmp12 +} diff --git a/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll b/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll new file mode 100644 index 000000000000..720365c4d6b2 --- /dev/null +++ b/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll @@ -0,0 +1,17 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" + +define {}* @foo({}* %x, i32 %n) { +; CHECK: @foo +; CHECK-NOT: getelementptr + %p = getelementptr {}* %x, i32 %n + ret {}* %p +} + +define i8* @bar(i64 %n, {{}, [0 x {[0 x i8]}]}* %p) { +; CHECK: @bar + %g = getelementptr {{}, [0 x {[0 x i8]}]}* %p, i64 %n, i32 1, i64 %n, i32 0, i64 %n +; CHECK: %p, i64 0, i32 1, i64 0, i32 0, i64 %n + ret i8* %g +} diff --git a/test/Transforms/InstCombine/2010-11-23-Distributed.ll b/test/Transforms/InstCombine/2010-11-23-Distributed.ll new file mode 100644 index 000000000000..4f8e8dc713b4 --- /dev/null +++ b/test/Transforms/InstCombine/2010-11-23-Distributed.ll @@ -0,0 +1,23 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +define i32 @foo(i32 %x, i32 %y) { +; CHECK: @foo + %add = add nsw i32 %y, %x + %mul = mul nsw i32 %add, %y + %square = mul nsw i32 %y, %y + %res = sub i32 %mul, %square + ret i32 %res +; CHECK-NEXT: mul i32 %x, %y +; CHECK-NEXT: ret i32 +} + +define i1 @bar(i64 %x, i64 %y) { +; CHECK: @bar + %a = and i64 %y, %x +; CHECK: and +; CHECK-NOT: and + %not = xor i64 %a, -1 + %b = and i64 %y, %not + %r = icmp eq i64 %b, 0 + ret i1 %r +; CHECK: ret i1 +} diff --git a/test/Transforms/InstCombine/2011-02-14-InfLoop.ll b/test/Transforms/InstCombine/2011-02-14-InfLoop.ll new file mode 100644 index 000000000000..6d8a7ddbe46f --- /dev/null +++ b/test/Transforms/InstCombine/2011-02-14-InfLoop.ll @@ -0,0 +1,19 @@ +; This testcase causes an infinite loop in the instruction combiner, +; because it changes a pattern and the original pattern is almost +; identical to the newly-generated pattern. +; RUN: opt < %s -instcombine -disable-output + +;PR PR9216 + +target triple = "x86_64-unknown-linux-gnu" + +define <4 x float> @m_387(i8* noalias nocapture %A, i8* nocapture %B, <4 x i1> %C) nounwind { +entry: + %movcsext20 = sext <4 x i1> %C to <4 x i32> + %tmp2389 = xor <4 x i32> %movcsext20, <i32 -1, i32 -1, i32 -1, i32 -1> + %movcand25 = and <4 x i32> %tmp2389, <i32 undef, i32 undef, i32 undef, i32 -1> + %movcor26 = or <4 x i32> %movcand25, zeroinitializer + %L2 = bitcast <4 x i32> %movcor26 to <4 x float> + %L3 = shufflevector <4 x float> zeroinitializer, <4 x float> %L2, <4 x i32> <i32 0, i32 1, i32 2, i32 7> + ret <4 x float> %L3 +} diff --git a/test/Transforms/InstCombine/2011-02-16-InsertelementHang.ll b/test/Transforms/InstCombine/2011-02-16-InsertelementHang.ll new file mode 100644 index 000000000000..2f6034e158a3 --- /dev/null +++ b/test/Transforms/InstCombine/2011-02-16-InsertelementHang.ll @@ -0,0 +1,11 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; PR9218 + +%vec2x2 = type { <2 x double>, <2 x double> } + +define %vec2x2 @split(double) nounwind alwaysinline { +; CHECK: @split +; CHECK: ret %vec2x2 undef + %vba = insertelement <2 x double> undef, double %0, i32 2 + ret <2 x double> %vba, <2 x double> %vba +} diff --git a/test/Transforms/InstCombine/add.ll b/test/Transforms/InstCombine/add.ll index 4719809d6d36..a316d06894ac 100644 --- a/test/Transforms/InstCombine/add.ll +++ b/test/Transforms/InstCombine/add.ll @@ -275,3 +275,27 @@ define i32 @test36(i32 %a) { %q = and i32 %z, 1 ; always zero ret i32 %q } + +define i1 @test37(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %a, %b + %cmp = icmp eq i32 %add, %a + ret i1 %cmp +} + +define i1 @test38(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %a, %b + %cmp = icmp eq i32 %add, %b + ret i1 %cmp +} + +define i1 @test39(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %b, %a + %cmp = icmp eq i32 %add, %a + ret i1 %cmp +} + +define i1 @test40(i32 %a, i32 %b) nounwind readnone { + %add = add i32 %b, %a + %cmp = icmp eq i32 %add, %b + ret i1 %cmp +} diff --git a/test/Transforms/InstCombine/add2.ll b/test/Transforms/InstCombine/add2.ll index 1cbdd3a3cd54..c5109c528857 100644 --- a/test/Transforms/InstCombine/add2.ll +++ b/test/Transforms/InstCombine/add2.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -instcombine -S | not grep add +; RUN: opt < %s -instcombine -S | FileCheck %s define i64 @test1(i64 %A, i32 %B) { %tmp12 = zext i32 %B to i64 @@ -6,19 +6,38 @@ define i64 @test1(i64 %A, i32 %B) { %tmp5 = add i64 %tmp3, %A %tmp6 = and i64 %tmp5, 123 ret i64 %tmp6 +; CHECK: @test1 +; CHECK-NEXT: and i64 %A, 123 +; CHECK-NEXT: ret i64 } -define i32 @test3(i32 %A) { +define i32 @test2(i32 %A) { %B = and i32 %A, 7 %C = and i32 %A, 32 %F = add i32 %B, %C ret i32 %F +; CHECK: @test2 +; CHECK-NEXT: and i32 %A, 39 +; CHECK-NEXT: ret i32 } -define i32 @test4(i32 %A) { +define i32 @test3(i32 %A) { %B = and i32 %A, 128 %C = lshr i32 %A, 30 %F = add i32 %B, %C ret i32 %F +; CHECK: @test3 +; CHECK-NEXT: and +; CHECK-NEXT: lshr +; CHECK-NEXT: or i32 %B, %C +; CHECK-NEXT: ret i32 +} + +define i32 @test4(i32 %A) { + %B = add nuw i32 %A, %A + ret i32 %B +; CHECK: @test4 +; CHECK-NEXT: %B = shl nuw i32 %A, 1 +; CHECK-NEXT: ret i32 %B } diff --git a/test/Transforms/InstCombine/and2.ll b/test/Transforms/InstCombine/and2.ll index a5a6574e9f46..d898ea3b037a 100644 --- a/test/Transforms/InstCombine/and2.ll +++ b/test/Transforms/InstCombine/and2.ll @@ -8,3 +8,21 @@ define i1 @test1(double %X, double %Y) { ret i1 %bothcond ; CHECK: fcmp ord double %Y, %X } + +define i1 @test2(i1 %X, i1 %Y) { + %a = and i1 %X, %Y + %b = and i1 %a, %X + ret i1 %b +; CHECK: @test2 +; CHECK-NEXT: and i1 %X, %Y +; CHECK-NEXT: ret +} + +define i32 @test3(i32 %X, i32 %Y) { + %a = and i32 %X, %Y + %b = and i32 %Y, %a + ret i32 %b +; CHECK: @test3 +; CHECK-NEXT: and i32 %X, %Y +; CHECK-NEXT: ret +} diff --git a/test/Transforms/InstCombine/bit-checks.ll b/test/Transforms/InstCombine/bit-checks.ll index d774c0972def..79a096ff0f19 100644 --- a/test/Transforms/InstCombine/bit-checks.ll +++ b/test/Transforms/InstCombine/bit-checks.ll @@ -23,4 +23,350 @@ entry: %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] ret i32 %storemerge -}
\ No newline at end of file +} + +; tests to check combining (icmp eq (A & B), C) & (icmp eq (A & D), E) +; tests to check if (icmp eq (A & B), 0) is treated like (icmp eq (A & B), B) +; if B is a single bit constant + +; (icmp eq (A & B), 0) & (icmp eq (A & D), 0) -> (icmp eq (A & (B|D)), 0) +define i32 @main3(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 0 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main3b(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 16 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main3e_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 0 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp ne (A & B), 0) | (icmp ne (A & D), 0) -> (icmp ne (A & (B|D)), 0) +define i32 @main3c(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 0 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main3d(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 16 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main3f_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 0 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 0 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp eq (A & B), B) & (icmp eq (A & D), D) -> (icmp eq (A & (B|D)), (B|D)) +define i32 @main4(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 48 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main4b(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 0 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main4e_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, %argc2 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %argc3 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp ne (A & B), B) | (icmp ne (A & D), D) -> (icmp ne (A & (B|D)), (B|D)) +define i32 @main4c(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 48 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main4d(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 0 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main4f_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, %argc2 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, %argc3 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp eq (A & B), A) & (icmp eq (A & D), A) -> (icmp eq (A & (B&D)), A) +define i32 @main5_like(i32 %argc, i32 %argc2, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc2, 7 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 7 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main5e_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, %argc ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %argc ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp ne (A & B), A) | (icmp ne (A & D), A) -> (icmp ne (A & (B&D)), A) +define i32 @main5c_like(i32 %argc, i32 %argc2, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 7 ; <i1> [#uses=1] + %and2 = and i32 %argc2, 7 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 7 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main5f_like(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, %argc ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, %argc ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp eq (A & B), C) & (icmp eq (A & D), E) -> (icmp eq (A & (B|D)), (C|E)) +; if B, C, D, E are constant, and it's possible +define i32 @main6(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 3 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 16 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main6b(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp eq i32 %and, 3 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 0 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (icmp ne (A & B), C) | (icmp ne (A & D), E) -> (icmp ne (A & (B|D)), (C|E)) +; if B, C, D, E are constant, and it's possible +define i32 @main6c(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 3 ; <i1> [#uses=1] + %and2 = and i32 %argc, 48 ; <i32> [#uses=1] + %tobool3 = icmp ne i32 %and2, 16 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +define i32 @main6d(i32 %argc, i8** nocapture %argv) nounwind readnone ssp { +entry: + %and = and i32 %argc, 7 ; <i32> [#uses=1] + %tobool = icmp ne i32 %and, 3 ; <i1> [#uses=1] + %and2 = and i32 %argc, 16 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, 0 ; <i1> [#uses=1] + %or.cond = or i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; test parameter permutations +; (B & A) == B & (D & A) == D +define i32 @main7a(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and1 = and i32 %argc2, %argc ; <i32> [#uses=1] + %tobool = icmp eq i32 %and1, %argc2 ; <i1> [#uses=1] + %and2 = and i32 %argc3, %argc ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %argc3 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; B == (A & B) & D == (A & D) +define i32 @main7b(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and1 = and i32 %argc, %argc2 ; <i32> [#uses=1] + %tobool = icmp eq i32 %argc2, %and1 ; <i1> [#uses=1] + %and2 = and i32 %argc, %argc3 ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %argc3, %and2 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; B == (B & A) & D == (D & A) +define i32 @main7c(i32 %argc, i32 %argc2, i32 %argc3, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %and1 = and i32 %argc2, %argc ; <i32> [#uses=1] + %tobool = icmp eq i32 %argc2, %and1 ; <i1> [#uses=1] + %and2 = and i32 %argc3, %argc ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %argc3, %and2 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (A & (B & C)) == (B & C) & (A & (D & E)) == (D & E) +define i32 @main7d(i32 %argc, i32 %argc2, i32 %argc3, + i32 %argc4, i32 %argc5, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %bc = and i32 %argc2, %argc4 ; <i32> [#uses=1] + %de = and i32 %argc3, %argc5 ; <i32> [#uses=1] + %and1 = and i32 %argc, %bc ; <i32> [#uses=1] + %tobool = icmp eq i32 %and1, %bc ; <i1> [#uses=1] + %and2 = and i32 %argc, %de ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %de ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; ((B & C) & A) == (B & C) & ((D & E) & A) == (D & E) +define i32 @main7e(i32 %argc, i32 %argc2, i32 %argc3, + i32 %argc4, i32 %argc5, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %bc = and i32 %argc2, %argc4 ; <i32> [#uses=1] + %de = and i32 %argc3, %argc5 ; <i32> [#uses=1] + %and1 = and i32 %bc, %argc ; <i32> [#uses=1] + %tobool = icmp eq i32 %and1, %bc ; <i1> [#uses=1] + %and2 = and i32 %de, %argc ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %and2, %de ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (B & C) == (A & (B & C)) & (D & E) == (A & (D & E)) +define i32 @main7f(i32 %argc, i32 %argc2, i32 %argc3, + i32 %argc4, i32 %argc5, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %bc = and i32 %argc2, %argc4 ; <i32> [#uses=1] + %de = and i32 %argc3, %argc5 ; <i32> [#uses=1] + %and1 = and i32 %argc, %bc ; <i32> [#uses=1] + %tobool = icmp eq i32 %bc, %and1 ; <i1> [#uses=1] + %and2 = and i32 %argc, %de ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %de, %and2 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} + +; (B & C) == ((B & C) & A) & (D & E) == ((D & E) & A) +define i32 @main7g(i32 %argc, i32 %argc2, i32 %argc3, + i32 %argc4, i32 %argc5, i8** nocapture %argv) + nounwind readnone ssp { +entry: + %bc = and i32 %argc2, %argc4 ; <i32> [#uses=1] + %de = and i32 %argc3, %argc5 ; <i32> [#uses=1] + %and1 = and i32 %bc, %argc ; <i32> [#uses=1] + %tobool = icmp eq i32 %bc, %and1 ; <i1> [#uses=1] + %and2 = and i32 %de, %argc ; <i32> [#uses=1] + %tobool3 = icmp eq i32 %de, %and2 ; <i1> [#uses=1] + %and.cond = and i1 %tobool, %tobool3 ; <i1> [#uses=1] + %storemerge = select i1 %and.cond, i32 0, i32 1 ; <i32> [#uses=1] + ret i32 %storemerge +} diff --git a/test/Transforms/InstCombine/bitcast-store.ll b/test/Transforms/InstCombine/bitcast-store.ll new file mode 100644 index 000000000000..e4a61e98e4f5 --- /dev/null +++ b/test/Transforms/InstCombine/bitcast-store.ll @@ -0,0 +1,21 @@ +; RUN: opt -S -instcombine < %s | FileCheck %s + +; Instcombine should preserve metadata and alignment while +; folding a bitcast into a store. + +; CHECK: store i32 (...)** bitcast (i8** getelementptr inbounds ([5 x i8*]* @G, i64 0, i64 2) to i32 (...)**), i32 (...)*** %0, align 16, !tag !0 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + +%struct.A = type { i32 (...)** } + +@G = external constant [5 x i8*] + +define void @foo(%struct.A* %a) nounwind { +entry: + %0 = bitcast %struct.A* %a to i8*** + store i8** getelementptr inbounds ([5 x i8*]* @G, i64 0, i64 2), i8*** %0, align 16, !tag !0 + ret void +} + +!0 = metadata !{metadata !"hello"} diff --git a/test/Transforms/InstCombine/bitcast-vec-uniform.ll b/test/Transforms/InstCombine/bitcast-vec-uniform.ll new file mode 100644 index 000000000000..5975f1ec396e --- /dev/null +++ b/test/Transforms/InstCombine/bitcast-vec-uniform.ll @@ -0,0 +1,70 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +; CHECK: @a +; CHECK-NOT: bitcast +; CHECK: ret +define <4 x i32> @a(<1 x i64> %y) { + %c = bitcast <2 x i64> <i64 0, i64 0> to <4 x i32> + ret <4 x i32> %c +} + +; CHECK: @b +; CHECK-NOT: bitcast +; CHECK: ret + +define <4 x i32> @b(<1 x i64> %y) { + %c = bitcast <2 x i64> <i64 -1, i64 -1> to <4 x i32> + ret <4 x i32> %c +} + +; CHECK: @foo +; CHECK-NOT: bitcast +; CHECK: ret + +; from MultiSource/Benchmarks/Bullet +define <2 x float> @foo() { + %cast = bitcast i64 -1 to <2 x float> + ret <2 x float> %cast +} + + +; CHECK: @foo2 +; CHECK-NOT: bitcast +; CHECK: ret +define <2 x double> @foo2() { + %cast = bitcast i128 -1 to <2 x double> + ret <2 x double> %cast +} + +; CHECK: @foo3 +; CHECK-NOT: bitcast +; CHECK: ret +define <1 x float> @foo3() { + %cast = bitcast i32 -1 to <1 x float> + ret <1 x float> %cast +} + +; CHECK: @foo4 +; CHECK-NOT: bitcast +; CHECK: ret +define float @foo4() { + %cast = bitcast <1 x i32 ><i32 -1> to float + ret float %cast +} + +; CHECK: @foo5 +; CHECK-NOT: bitcast +; CHECK: ret +define double @foo5() { + %cast = bitcast <2 x i32 ><i32 -1, i32 -1> to double + ret double %cast +} + + +; CHECK: @foo6 +; CHECK-NOT: bitcast +; CHECK: ret +define <2 x double> @foo6() { + %cast = bitcast <4 x i32><i32 -1, i32 -1, i32 -1, i32 -1> to <2 x double> + ret <2 x double> %cast +} diff --git a/test/Transforms/InstCombine/cast.ll b/test/Transforms/InstCombine/cast.ll index 102d2f048f1c..bc5e3655c19a 100644 --- a/test/Transforms/InstCombine/cast.ll +++ b/test/Transforms/InstCombine/cast.ll @@ -437,8 +437,8 @@ define i64 @test47(i8 %A) { ret i64 %E ; CHECK: @test47 ; CHECK-NEXT: %B = sext i8 %A to i64 -; CHECK-NEXT: %C = or i64 %B, 42 -; CHECK-NEXT: %E = and i64 %C, 4294967295 +; CHECK-NEXT: %C = and i64 %B, 4294967253 +; CHECK-NEXT: %E = or i64 %C, 42 ; CHECK-NEXT: ret i64 %E } @@ -452,7 +452,7 @@ define i64 @test48(i8 %A, i8 %a) { ; CHECK: @test48 ; CHECK-NEXT: %b = zext i8 %a to i64 ; CHECK-NEXT: %B = zext i8 %A to i64 -; CHECK-NEXT: %C = shl i64 %B, 8 +; CHECK-NEXT: %C = shl nuw nsw i64 %B, 8 ; CHECK-NEXT: %D = or i64 %C, %b ; CHECK-NEXT: ret i64 %D } @@ -464,7 +464,7 @@ define i64 @test49(i64 %A) { ret i64 %D ; CHECK: @test49 ; CHECK-NEXT: %C = shl i64 %A, 32 -; CHECK-NEXT: ashr i64 %C, 32 +; CHECK-NEXT: ashr exact i64 %C, 32 ; CHECK-NEXT: %D = or i64 {{.*}}, 1 ; CHECK-NEXT: ret i64 %D } @@ -478,8 +478,8 @@ define i64 @test50(i64 %A) { ; CHECK: @test50 ; CHECK-NEXT: shl i64 %A, 30 ; CHECK-NEXT: add i64 {{.*}}, -4294967296 -; CHECK-NEXT: %E = ashr i64 {{.*}}, 32 -; CHECK-NEXT: ret i64 %E +; CHECK-NEXT: %sext = ashr i64 {{.*}}, 32 +; CHECK-NEXT: ret i64 %sext } define i64 @test51(i64 %A, i1 %cond) { @@ -508,8 +508,8 @@ define i32 @test52(i64 %A) { ret i32 %E ; CHECK: @test52 ; CHECK-NEXT: %B = trunc i64 %A to i32 -; CHECK-NEXT: %C = or i32 %B, 32962 -; CHECK-NEXT: %D = and i32 %C, 40186 +; CHECK-NEXT: %C = and i32 %B, 7224 +; CHECK-NEXT: %D = or i32 %C, 32962 ; CHECK-NEXT: ret i32 %D } @@ -521,8 +521,8 @@ define i64 @test53(i32 %A) { ret i64 %E ; CHECK: @test53 ; CHECK-NEXT: %B = zext i32 %A to i64 -; CHECK-NEXT: %C = or i64 %B, 32962 -; CHECK-NEXT: %D = and i64 %C, 40186 +; CHECK-NEXT: %C = and i64 %B, 7224 +; CHECK-NEXT: %D = or i64 %C, 32962 ; CHECK-NEXT: ret i64 %D } @@ -534,8 +534,8 @@ define i32 @test54(i64 %A) { ret i32 %E ; CHECK: @test54 ; CHECK-NEXT: %B = trunc i64 %A to i32 -; CHECK-NEXT: %C = or i32 %B, -32574 -; CHECK-NEXT: %D = and i32 %C, -25350 +; CHECK-NEXT: %C = and i32 %B, 7224 +; CHECK-NEXT: %D = or i32 %C, -32574 ; CHECK-NEXT: ret i32 %D } @@ -547,8 +547,8 @@ define i64 @test55(i32 %A) { ret i64 %E ; CHECK: @test55 ; CHECK-NEXT: %B = zext i32 %A to i64 -; CHECK-NEXT: %C = or i64 %B, -32574 -; CHECK-NEXT: %D = and i64 %C, -25350 +; CHECK-NEXT: %C = and i64 %B, 7224 +; CHECK-NEXT: %D = or i64 %C, -32574 ; CHECK-NEXT: ret i64 %D } @@ -584,8 +584,8 @@ define i64 @test58(i64 %A) nounwind { ; CHECK: @test58 ; CHECK-NEXT: %C = lshr i64 %A, 8 -; CHECK-NEXT: %D = or i64 %C, 128 -; CHECK-NEXT: %E = and i64 %D, 16777215 +; CHECK-NEXT: %D = and i64 %C, 16777087 +; CHECK-NEXT: %E = or i64 %D, 128 ; CHECK-NEXT: ret i64 %E } diff --git a/test/Transforms/InstCombine/constant-fold-gep.ll b/test/Transforms/InstCombine/constant-fold-gep.ll index 4be1a9c838d2..c679226d4a9d 100644 --- a/test/Transforms/InstCombine/constant-fold-gep.ll +++ b/test/Transforms/InstCombine/constant-fold-gep.ll @@ -53,3 +53,22 @@ define void @frob() { store i32 1, i32* getelementptr ([3 x %struct.X]* @Y, i64 0, i64 0, i32 0, i64 19), align 8 ret void } + + +; PR8883 - Constant fold exotic gep subtract +; CHECK: @test2 +@X = global [1000 x i8] zeroinitializer, align 16 + +define i64 @test2() { +entry: + %A = bitcast i8* getelementptr inbounds ([1000 x i8]* @X, i64 1, i64 0) to i8* + %B = bitcast i8* getelementptr inbounds ([1000 x i8]* @X, i64 0, i64 0) to i8* + + %B2 = ptrtoint i8* %B to i64 + %C = sub i64 0, %B2 + %D = getelementptr i8* %A, i64 %C + %E = ptrtoint i8* %D to i64 + + ret i64 %E + ; CHECK: ret i64 1000 +} diff --git a/test/Transforms/InstCombine/crash.ll b/test/Transforms/InstCombine/crash.ll index 30d467e0ca85..e17774d7b0e2 100644 --- a/test/Transforms/InstCombine/crash.ll +++ b/test/Transforms/InstCombine/crash.ll @@ -252,3 +252,121 @@ entry: %conv6 = zext i1 %cmp5 to i32 ; <i32> [#uses=0] ret void } + +%s1 = type { %s2, %s2, [6 x %s2], i32, i32, i32, [1 x i32], [0 x i8] } +%s2 = type { i64 } +define void @test13() nounwind ssp { +entry: + %0 = getelementptr inbounds %s1* null, i64 0, i32 2, i64 0, i32 0 + %1 = bitcast i64* %0 to i32* + %2 = getelementptr inbounds %s1* null, i64 0, i32 2, i64 1, i32 0 + %.pre = load i32* %1, align 8 + %3 = lshr i32 %.pre, 19 + %brmerge = or i1 undef, undef + %4 = and i32 %3, 3 + %5 = add nsw i32 %4, 1 + %6 = shl i32 %5, 19 + %7 = add i32 %6, 1572864 + %8 = and i32 %7, 1572864 + %9 = load i64* %2, align 8 + %trunc156 = trunc i64 %9 to i32 + %10 = and i32 %trunc156, -1537 + %11 = and i32 %10, -6145 + %12 = or i32 %11, 2048 + %13 = and i32 %12, -24577 + %14 = or i32 %13, 16384 + %15 = or i32 %14, 98304 + store i32 %15, i32* undef, align 8 + %16 = and i32 %15, -1572865 + %17 = or i32 %16, %8 + store i32 %17, i32* undef, align 8 + %18 = and i32 %17, -449 + %19 = or i32 %18, 64 + store i32 %19, i32* undef, align 8 + unreachable +} + + +; PR8807 +declare i32 @test14f(i8* (i8*)*) nounwind + +define void @test14() nounwind readnone { +entry: + %tmp = bitcast i32 (i8* (i8*)*)* @test14f to i32 (i32*)* + %call10 = call i32 %tmp(i32* byval undef) + ret void +} + + +; PR8896 +@g_54 = external global [7 x i16] + +define void @test15(i32* %p_92) nounwind { +entry: +%0 = load i32* %p_92, align 4 +%1 = icmp ne i32 %0, 0 +%2 = zext i1 %1 to i32 +%3 = call i32 @func_14() nounwind +%4 = trunc i32 %3 to i16 +%5 = sext i16 %4 to i32 +%6 = trunc i32 %5 to i16 +br i1 undef, label %"3", label %"5" + +"3": ; preds = %entry +%7 = sext i16 %6 to i32 +%8 = ashr i32 %7, -1649554541 +%9 = trunc i32 %8 to i16 +br label %"5" + +"5": ; preds = %"3", %entry +%10 = phi i16 [ %9, %"3" ], [ %6, %entry ] +%11 = sext i16 %10 to i32 +%12 = xor i32 %2, %11 +%13 = sext i32 %12 to i64 +%14 = icmp ne i64 %13, 0 +br i1 %14, label %return, label %"7" + +"7": ; preds = %"5" +ret void + +return: ; preds = %"5" +ret void +} + +declare i32 @func_14() + + +define double @test16(i32 %a) nounwind { + %cmp = icmp slt i32 %a, 2 + %select = select i1 %cmp, double 2.000000e+00, double 3.141592e+00 + ret double %select +} + + +; PR8983 +%struct.basic_ios = type { i8 } + +define %struct.basic_ios *@test17() ssp { +entry: + %add.ptr.i = getelementptr i8* null, i64 undef + %0 = bitcast i8* %add.ptr.i to %struct.basic_ios* + ret %struct.basic_ios* %0 +} + +; PR9013 +define void @test18() nounwind ssp { +entry: + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %l_197.0 = phi i32 [ 0, %entry ], [ %sub.i, %for.inc ] + br label %for.inc + +for.inc: ; preds = %for.cond + %conv = and i32 %l_197.0, 255 + %sub.i = add nsw i32 %conv, -1 + br label %for.cond + +return: ; No predecessors! + ret void +} diff --git a/test/Transforms/InstCombine/div-cmp-overflow.ll b/test/Transforms/InstCombine/div-cmp-overflow.ll deleted file mode 100644 index 6f63adcd2e17..000000000000 --- a/test/Transforms/InstCombine/div-cmp-overflow.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep sdiv -; PR2740 - -define i1 @func_75(i32 %i2) nounwind { - %i3 = sdiv i32 %i2, -1328634635 - %i4 = icmp eq i32 %i3, -1 - ret i1 %i4 -} diff --git a/test/Transforms/InstCombine/exact-sdiv.ll b/test/Transforms/InstCombine/exact-sdiv.ll deleted file mode 100644 index e5677541e952..000000000000 --- a/test/Transforms/InstCombine/exact-sdiv.ll +++ /dev/null @@ -1,52 +0,0 @@ -; RUN: opt < %s -instcombine -S | FileCheck %s - -; CHECK: define i32 @foo -; CHECK: sdiv i32 %x, 8 -define i32 @foo(i32 %x) { - %y = sdiv i32 %x, 8 - ret i32 %y -} - -; CHECK: define i32 @bar -; CHECK: ashr i32 %x, 3 -define i32 @bar(i32 %x) { - %y = sdiv exact i32 %x, 8 - ret i32 %y -} - -; CHECK: i32 @a0 -; CHECK: %y = srem i32 %x, 3 -; CHECK: %z = sub i32 %x, %y -; CHECK: ret i32 %z -define i32 @a0(i32 %x) { - %y = sdiv i32 %x, 3 - %z = mul i32 %y, 3 - ret i32 %z -} - -; CHECK: i32 @b0 -; CHECK: ret i32 %x -define i32 @b0(i32 %x) { - %y = sdiv exact i32 %x, 3 - %z = mul i32 %y, 3 - ret i32 %z -} - -; CHECK: i32 @a1 -; CHECK: %y = srem i32 %x, 3 -; CHECK: %z = sub i32 %y, %x -; CHECK: ret i32 %z -define i32 @a1(i32 %x) { - %y = sdiv i32 %x, 3 - %z = mul i32 %y, -3 - ret i32 %z -} - -; CHECK: i32 @b1 -; CHECK: %z = sub i32 0, %x -; CHECK: ret i32 %z -define i32 @b1(i32 %x) { - %y = sdiv exact i32 %x, 3 - %z = mul i32 %y, -3 - ret i32 %z -} diff --git a/test/Transforms/InstCombine/exact.ll b/test/Transforms/InstCombine/exact.ll new file mode 100644 index 000000000000..58f8b5d5bcd8 --- /dev/null +++ b/test/Transforms/InstCombine/exact.ll @@ -0,0 +1,154 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +; CHECK: @sdiv1 +; CHECK: sdiv i32 %x, 8 +define i32 @sdiv1(i32 %x) { + %y = sdiv i32 %x, 8 + ret i32 %y +} + +; CHECK: @sdiv2 +; CHECK: ashr exact i32 %x, 3 +define i32 @sdiv2(i32 %x) { + %y = sdiv exact i32 %x, 8 + ret i32 %y +} + +; CHECK: @sdiv3 +; CHECK: %y = srem i32 %x, 3 +; CHECK: %z = sub i32 %x, %y +; CHECK: ret i32 %z +define i32 @sdiv3(i32 %x) { + %y = sdiv i32 %x, 3 + %z = mul i32 %y, 3 + ret i32 %z +} + +; CHECK: @sdiv4 +; CHECK: ret i32 %x +define i32 @sdiv4(i32 %x) { + %y = sdiv exact i32 %x, 3 + %z = mul i32 %y, 3 + ret i32 %z +} + +; CHECK: i32 @sdiv5 +; CHECK: %y = srem i32 %x, 3 +; CHECK: %z = sub i32 %y, %x +; CHECK: ret i32 %z +define i32 @sdiv5(i32 %x) { + %y = sdiv i32 %x, 3 + %z = mul i32 %y, -3 + ret i32 %z +} + +; CHECK: @sdiv6 +; CHECK: %z = sub i32 0, %x +; CHECK: ret i32 %z +define i32 @sdiv6(i32 %x) { + %y = sdiv exact i32 %x, 3 + %z = mul i32 %y, -3 + ret i32 %z +} + +; CHECK: @udiv1 +; CHECK: ret i32 %x +define i32 @udiv1(i32 %x, i32 %w) { + %y = udiv exact i32 %x, %w + %z = mul i32 %y, %w + ret i32 %z +} + +; CHECK: @udiv2 +; CHECK: %z = lshr exact i32 %x, %w +; CHECK: ret i32 %z +define i32 @udiv2(i32 %x, i32 %w) { + %y = shl i32 1, %w + %z = udiv exact i32 %x, %y + ret i32 %z +} + +; CHECK: @ashr1 +; CHECK: %B = ashr exact i64 %A, 2 +; CHECK: ret i64 %B +define i64 @ashr1(i64 %X) nounwind { + %A = shl i64 %X, 8 + %B = ashr i64 %A, 2 ; X/4 + ret i64 %B +} + +; PR9120 +; CHECK: @ashr_icmp1 +; CHECK: %B = icmp eq i64 %X, 0 +; CHECK: ret i1 %B +define i1 @ashr_icmp1(i64 %X) nounwind { + %A = ashr exact i64 %X, 2 ; X/4 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @ashr_icmp2 +; CHECK: %Z = icmp slt i64 %X, 16 +; CHECK: ret i1 %Z +define i1 @ashr_icmp2(i64 %X) nounwind { + %Y = ashr exact i64 %X, 2 ; x / 4 + %Z = icmp slt i64 %Y, 4 ; x < 16 + ret i1 %Z +} + +; CHECK: @udiv_icmp1 +; CHECK: icmp ne i64 %X, 0 +define i1 @udiv_icmp1(i64 %X) nounwind { + %A = udiv exact i64 %X, 5 ; X/5 + %B = icmp ne i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp1 +; CHECK: icmp eq i64 %X, 0 +define i1 @sdiv_icmp1(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == 0 --> x == 0 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp2 +; CHECK: icmp eq i64 %X, 5 +define i1 @sdiv_icmp2(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == 1 --> x == 5 + %B = icmp eq i64 %A, 1 + ret i1 %B +} + +; CHECK: @sdiv_icmp3 +; CHECK: icmp eq i64 %X, -5 +define i1 @sdiv_icmp3(i64 %X) nounwind { + %A = sdiv exact i64 %X, 5 ; X/5 == -1 --> x == -5 + %B = icmp eq i64 %A, -1 + ret i1 %B +} + +; CHECK: @sdiv_icmp4 +; CHECK: icmp eq i64 %X, 0 +define i1 @sdiv_icmp4(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 0 --> x == 0 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @sdiv_icmp5 +; CHECK: icmp eq i64 %X, -5 +define i1 @sdiv_icmp5(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == -5 + %B = icmp eq i64 %A, 1 + ret i1 %B +} + +; CHECK: @sdiv_icmp6 +; CHECK: icmp eq i64 %X, 5 +define i1 @sdiv_icmp6(i64 %X) nounwind { + %A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == 5 + %B = icmp eq i64 %A, -1 + ret i1 %B +} + diff --git a/test/Transforms/InstCombine/extractvalue.ll b/test/Transforms/InstCombine/extractvalue.ll index 875f860b3d7f..64edc18d4507 100644 --- a/test/Transforms/InstCombine/extractvalue.ll +++ b/test/Transforms/InstCombine/extractvalue.ll @@ -1,13 +1,16 @@ -; RUN: opt < %s -instcombine -S | not grep extractvalue +; RUN: opt < %s -instcombine -S | FileCheck %s -; Instcombine should fold various combinations of insertvalue and extractvalue -; together declare void @bar({i32, i32} %a) +declare i32 @baz(i32 %a) -define i32 @foo() { +; CHECK: define i32 @foo +; CHECK-NOT: extractvalue +define i32 @foo(i32 %a, i32 %b) { +; Instcombine should fold various combinations of insertvalue and extractvalue +; together ; Build a simple struct and pull values out again - %s1.1 = insertvalue {i32, i32} undef, i32 0, 0 - %s1 = insertvalue {i32, i32} %s1.1, i32 1, 1 + %s1.1 = insertvalue {i32, i32} undef, i32 %a, 0 + %s1 = insertvalue {i32, i32} %s1.1, i32 %b, 1 %v1 = extractvalue {i32, i32} %s1, 0 %v2 = extractvalue {i32, i32} %s1, 1 @@ -36,3 +39,69 @@ define i32 @foo() { ret i32 %v5 } +; CHECK: define i32 @extract2gep +; CHECK-NEXT: [[GEP:%[a-z0-9]+]] = getelementptr inbounds {{.*}}* %pair, i32 0, i32 1 +; CHECK-NEXT: [[LOAD:%[A-Za-z0-9]+]] = load i32* [[GEP]] +; CHECK-NEXT: store +; CHECK-NEXT: br label %loop +; CHECK-NOT: extractvalue +; CHECK: call {{.*}}(i32 [[LOAD]]) +; CHECK-NOT: extractvalue +; CHECK: ret i32 [[LOAD]] +define i32 @extract2gep({i32, i32}* %pair, i32* %P) { + ; The load + extractvalue should be converted + ; to an inbounds gep + smaller load. + ; The new load should be in the same spot as the old load. + %L = load {i32, i32}* %pair + store i32 0, i32* %P + br label %loop + +loop: + %E = extractvalue {i32, i32} %L, 1 + %C = call i32 @baz(i32 %E) + store i32 %C, i32* %P + %cond = icmp eq i32 %C, 0 + br i1 %cond, label %end, label %loop + +end: + ret i32 %E +} + +; CHECK: define i32 @doubleextract2gep +; CHECK-NEXT: [[GEP:%[a-z0-9]+]] = getelementptr inbounds {{.*}}* %arg, i32 0, i32 1, i32 1 +; CHECK-NEXT: [[LOAD:%[A-Za-z0-9]+]] = load i32* [[GEP]] +; CHECK-NEXT: ret i32 [[LOAD]] +define i32 @doubleextract2gep({i32, {i32, i32}}* %arg) { + ; The load + extractvalues should be converted + ; to a 3-index inbounds gep + smaller load. + %L = load {i32, {i32, i32}}* %arg + %E1 = extractvalue {i32, {i32, i32}} %L, 1 + %E2 = extractvalue {i32, i32} %E1, 1 + ret i32 %E2 +} + +; CHECK: define i32 @nogep-multiuse +; CHECK-NEXT: load {{.*}} %pair +; CHECK-NEXT: extractvalue +; CHECK-NEXT: extractvalue +; CHECK-NEXT: add +; CHECK-NEXT: ret +define i32 @nogep-multiuse({i32, i32}* %pair) { + ; The load should be left unchanged since both parts are needed. + %L = volatile load {i32, i32}* %pair + %LHS = extractvalue {i32, i32} %L, 0 + %RHS = extractvalue {i32, i32} %L, 1 + %R = add i32 %LHS, %RHS + ret i32 %R +} + +; CHECK: define i32 @nogep-volatile +; CHECK-NEXT: volatile load {{.*}} %pair +; CHECK-NEXT: extractvalue +; CHECK-NEXT: ret +define i32 @nogep-volatile({i32, i32}* %pair) { + ; The volatile load should be left unchanged. + %L = volatile load {i32, i32}* %pair + %E = extractvalue {i32, i32} %L, 1 + ret i32 %E +} diff --git a/test/Transforms/InstCombine/fold-calls.ll b/test/Transforms/InstCombine/fold-calls.ll new file mode 100644 index 000000000000..504f874beaeb --- /dev/null +++ b/test/Transforms/InstCombine/fold-calls.ll @@ -0,0 +1,19 @@ +; RUN: opt -instcombine -S < %s | FileCheck %s + +; This shouldn't fold, because sin(inf) is invalid. +; CHECK: @foo +; CHECK: %t = call double @sin(double 0x7FF0000000000000) +define double @foo() { + %t = call double @sin(double 0x7FF0000000000000) + ret double %t +} + +; This should fold. +; CHECK: @bar +; CHECK: ret double 0.0 +define double @bar() { + %t = call double @sin(double 0.0) + ret double %t +} + +declare double @sin(double) diff --git a/test/Transforms/InstCombine/fold-vector-select.ll b/test/Transforms/InstCombine/fold-vector-select.ll new file mode 100644 index 000000000000..3f22522a6ce4 --- /dev/null +++ b/test/Transforms/InstCombine/fold-vector-select.ll @@ -0,0 +1,13 @@ +; RUN: opt < %s -instcombine -S | not grep select + +define void @foo(<4 x i32> *%A, <4 x i32> *%B, <4 x i32> *%C, <4 x i32> *%D) { + %r = select <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> <i32 1, i32 2, i32 3, i32 4>, <4 x i32> zeroinitializer + %g = select <4 x i1> <i1 false, i1 false, i1 false, i1 false>, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 6, i32 9, i32 1> + %b = select <4 x i1> <i1 false, i1 true, i1 false, i1 true>, <4 x i32> zeroinitializer, <4 x i32> <i32 7, i32 1, i32 4, i32 9> + %a = select <4 x i1> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 2, i32 8, i32 5> + store <4 x i32> %r, <4 x i32>* %A + store <4 x i32> %g, <4 x i32>* %B + store <4 x i32> %b, <4 x i32>* %C + store <4 x i32> %a, <4 x i32>* %D + ret void +} diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll index 802957f47b3a..3150883e7d71 100644 --- a/test/Transforms/InstCombine/icmp.ll +++ b/test/Transforms/InstCombine/icmp.ll @@ -1,5 +1,8 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = +"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + define i32 @test1(i32 %X) { entry: icmp slt i32 %X, 0 ; <i1>:0 [#uses=1] @@ -154,3 +157,223 @@ entry: ; CHECK: @test16 ; CHECK: ret i1 undef } + +define i1 @test17(i32 %x) nounwind { + %shl = shl i32 1, %x + %and = and i32 %shl, 8 + %cmp = icmp eq i32 %and, 0 + ret i1 %cmp +; CHECK: @test17 +; CHECK-NEXT: %cmp = icmp ne i32 %x, 3 +} + + +define i1 @test18(i32 %x) nounwind { + %sh = lshr i32 8, %x + %and = and i32 %sh, 1 + %cmp = icmp eq i32 %and, 0 + ret i1 %cmp +; CHECK: @test18 +; CHECK-NEXT: %cmp = icmp ne i32 %x, 3 +} + +define i1 @test19(i32 %x) nounwind { + %shl = shl i32 1, %x + %and = and i32 %shl, 8 + %cmp = icmp eq i32 %and, 8 + ret i1 %cmp +; CHECK: @test19 +; CHECK-NEXT: %cmp = icmp eq i32 %x, 3 +} + +define i1 @test20(i32 %x) nounwind { + %shl = shl i32 1, %x + %and = and i32 %shl, 8 + %cmp = icmp ne i32 %and, 0 + ret i1 %cmp +; CHECK: @test20 +; CHECK-NEXT: %cmp = icmp eq i32 %x, 3 +} + +define i1 @test21(i8 %x, i8 %y) { +; CHECK: @test21 +; CHECK-NOT: or i8 +; CHECK: icmp ugt + %A = or i8 %x, 1 + %B = icmp ugt i8 %A, 3 + ret i1 %B +} + +define i1 @test22(i8 %x, i8 %y) { +; CHECK: @test22 +; CHECK-NOT: or i8 +; CHECK: icmp ult + %A = or i8 %x, 1 + %B = icmp ult i8 %A, 4 + ret i1 %B +} + +; PR2740 +; CHECK: @test23 +; CHECK: icmp sgt i32 %x, 1328634634 +define i1 @test23(i32 %x) nounwind { + %i3 = sdiv i32 %x, -1328634635 + %i4 = icmp eq i32 %i3, -1 + ret i1 %i4 +} + +@X = global [1000 x i32] zeroinitializer + +; PR8882 +; CHECK: @test24 +; CHECK: %cmp = icmp eq i64 %i, 1000 +; CHECK: ret i1 %cmp +define i1 @test24(i64 %i) { + %p1 = getelementptr inbounds i32* getelementptr inbounds ([1000 x i32]* @X, i64 0, i64 0), i64 %i + %cmp = icmp eq i32* %p1, getelementptr inbounds ([1000 x i32]* @X, i64 1, i64 0) + ret i1 %cmp +} + +; CHECK: @test25 +; X + Z > Y + Z -> X > Y if there is no overflow. +; CHECK: %c = icmp sgt i32 %x, %y +; CHECK: ret i1 %c +define i1 @test25(i32 %x, i32 %y, i32 %z) { + %lhs = add nsw i32 %x, %z + %rhs = add nsw i32 %y, %z + %c = icmp sgt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test26 +; X + Z > Y + Z -> X > Y if there is no overflow. +; CHECK: %c = icmp ugt i32 %x, %y +; CHECK: ret i1 %c +define i1 @test26(i32 %x, i32 %y, i32 %z) { + %lhs = add nuw i32 %x, %z + %rhs = add nuw i32 %y, %z + %c = icmp ugt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test27 +; X - Z > Y - Z -> X > Y if there is no overflow. +; CHECK: %c = icmp sgt i32 %x, %y +; CHECK: ret i1 %c +define i1 @test27(i32 %x, i32 %y, i32 %z) { + %lhs = sub nsw i32 %x, %z + %rhs = sub nsw i32 %y, %z + %c = icmp sgt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test28 +; X - Z > Y - Z -> X > Y if there is no overflow. +; CHECK: %c = icmp ugt i32 %x, %y +; CHECK: ret i1 %c +define i1 @test28(i32 %x, i32 %y, i32 %z) { + %lhs = sub nuw i32 %x, %z + %rhs = sub nuw i32 %y, %z + %c = icmp ugt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test29 +; X + Y > X -> Y > 0 if there is no overflow. +; CHECK: %c = icmp sgt i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test29(i32 %x, i32 %y) { + %lhs = add nsw i32 %x, %y + %c = icmp sgt i32 %lhs, %x + ret i1 %c +} + +; CHECK: @test30 +; X + Y > X -> Y > 0 if there is no overflow. +; CHECK: %c = icmp ne i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test30(i32 %x, i32 %y) { + %lhs = add nuw i32 %x, %y + %c = icmp ugt i32 %lhs, %x + ret i1 %c +} + +; CHECK: @test31 +; X > X + Y -> 0 > Y if there is no overflow. +; CHECK: %c = icmp slt i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test31(i32 %x, i32 %y) { + %rhs = add nsw i32 %x, %y + %c = icmp sgt i32 %x, %rhs + ret i1 %c +} + +; CHECK: @test32 +; X > X + Y -> 0 > Y if there is no overflow. +; CHECK: ret i1 false +define i1 @test32(i32 %x, i32 %y) { + %rhs = add nuw i32 %x, %y + %c = icmp ugt i32 %x, %rhs + ret i1 %c +} + +; CHECK: @test33 +; X - Y > X -> 0 > Y if there is no overflow. +; CHECK: %c = icmp slt i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test33(i32 %x, i32 %y) { + %lhs = sub nsw i32 %x, %y + %c = icmp sgt i32 %lhs, %x + ret i1 %c +} + +; CHECK: @test34 +; X - Y > X -> 0 > Y if there is no overflow. +; CHECK: ret i1 false +define i1 @test34(i32 %x, i32 %y) { + %lhs = sub nuw i32 %x, %y + %c = icmp ugt i32 %lhs, %x + ret i1 %c +} + +; CHECK: @test35 +; X > X - Y -> Y > 0 if there is no overflow. +; CHECK: %c = icmp sgt i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test35(i32 %x, i32 %y) { + %rhs = sub nsw i32 %x, %y + %c = icmp sgt i32 %x, %rhs + ret i1 %c +} + +; CHECK: @test36 +; X > X - Y -> Y > 0 if there is no overflow. +; CHECK: %c = icmp ne i32 %y, 0 +; CHECK: ret i1 %c +define i1 @test36(i32 %x, i32 %y) { + %rhs = sub nuw i32 %x, %y + %c = icmp ugt i32 %x, %rhs + ret i1 %c +} + +; CHECK: @test37 +; X - Y > X - Z -> Z > Y if there is no overflow. +; CHECK: %c = icmp sgt i32 %z, %y +; CHECK: ret i1 %c +define i1 @test37(i32 %x, i32 %y, i32 %z) { + %lhs = sub nsw i32 %x, %y + %rhs = sub nsw i32 %x, %z + %c = icmp sgt i32 %lhs, %rhs + ret i1 %c +} + +; CHECK: @test38 +; X - Y > X - Z -> Z > Y if there is no overflow. +; CHECK: %c = icmp ugt i32 %z, %y +; CHECK: ret i1 %c +define i1 @test38(i32 %x, i32 %y, i32 %z) { + %lhs = sub nuw i32 %x, %y + %rhs = sub nuw i32 %x, %z + %c = icmp ugt i32 %lhs, %rhs + ret i1 %c +} diff --git a/test/Transforms/InstCombine/intrinsics.ll b/test/Transforms/InstCombine/intrinsics.ll index d672d8c1535e..50e7f1f7c92d 100644 --- a/test/Transforms/InstCombine/intrinsics.ll +++ b/test/Transforms/InstCombine/intrinsics.ll @@ -71,6 +71,25 @@ define i8 @uaddtest5(i8 %A, i1* %overflowPtr) { ; CHECK: ret i8 %A } +define i1 @uaddtest6(i8 %A, i8 %B) { + %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 -4) + %z = extractvalue %overflow.result %x, 1 + ret i1 %z +; CHECK: @uaddtest6 +; CHECK-NEXT: %z = icmp ugt i8 %A, 3 +; CHECK-NEXT: ret i1 %z +} + +define i8 @uaddtest7(i8 %A, i8 %B) { + %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B) + %z = extractvalue %overflow.result %x, 0 + ret i8 %z +; CHECK: @uaddtest7 +; CHECK-NEXT: %z = add i8 %A, %B +; CHECK-NEXT: ret i8 %z +} + + define i8 @umultest1(i8 %A, i1* %overflowPtr) { %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A) %y = extractvalue %overflow.result %x, 0 diff --git a/test/Transforms/InstCombine/memcpy.ll b/test/Transforms/InstCombine/memcpy.ll index 2e7b2c0bb41d..8a2e3aaad027 100644 --- a/test/Transforms/InstCombine/memcpy.ll +++ b/test/Transforms/InstCombine/memcpy.ll @@ -1,10 +1,19 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind -define void @test4(i8* %a) { - tail call void @llvm.memcpy.i32( i8* %a, i8* %a, i32 100, i32 1 ) +define void @test1(i8* %a) { + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 100, i32 1, i1 false) ret void -} -; CHECK: define void @test4 +; CHECK: define void @test1 ; CHECK-NEXT: ret void +} + + +; PR8267 +define void @test2(i8* %a) { + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 100, i32 1, i1 true) + ret void +; CHECK: define void @test2 +; CHECK-NEXT: call void @llvm.memcpy +} diff --git a/test/Transforms/InstCombine/memset2.ll b/test/Transforms/InstCombine/memset2.ll new file mode 100644 index 000000000000..87639f0d6a22 --- /dev/null +++ b/test/Transforms/InstCombine/memset2.ll @@ -0,0 +1,15 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +; Test to check that instcombine doesn't drop the address space when optimizing +; memset. +%struct.Moves = type { [9 x i8], i8, i8, i8, [5 x i8] } + +define i32 @test(%struct.Moves addrspace(1)* nocapture %moves) { +entry: +; CHECK: bitcast i8 addrspace(1)* %gep to i64 addrspace(1)* + %gep = getelementptr inbounds %struct.Moves addrspace(1)* %moves, i32 1, i32 0, i32 9 + call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %gep, i8 0, i64 8, i32 1, i1 false) + ret i32 0 +} + +declare void @llvm.memset.p1i8.i64(i8addrspace(1)* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/Transforms/InstCombine/neon-intrinsics.ll b/test/Transforms/InstCombine/neon-intrinsics.ll new file mode 100644 index 000000000000..3ad09cc6c694 --- /dev/null +++ b/test/Transforms/InstCombine/neon-intrinsics.ll @@ -0,0 +1,25 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +; The alignment arguments for NEON load/store intrinsics can be increased +; by instcombine. Check for this. + +; CHECK: vld4.v2i32({{.*}}, i32 32) +; CHECK: vst4.v2i32({{.*}}, i32 16) + +@x = common global [8 x i32] zeroinitializer, align 32 +@y = common global [8 x i32] zeroinitializer, align 16 + +%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } + +define void @test() nounwind ssp { + %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* bitcast ([8 x i32]* @x to i8*), i32 1) + %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 1 + %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2 + %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 3 + call void @llvm.arm.neon.vst4.v2i32(i8* bitcast ([8 x i32]* @y to i8*), <2 x i32> %tmp2, <2 x i32> %tmp3, <2 x i32> %tmp4, <2 x i32> %tmp5, i32 1) + ret void +} + +declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8*, i32) nounwind readonly +declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind diff --git a/test/Transforms/InstCombine/nsw.ll b/test/Transforms/InstCombine/nsw.ll index 821cebed30bb..681bdc234b7d 100644 --- a/test/Transforms/InstCombine/nsw.ll +++ b/test/Transforms/InstCombine/nsw.ll @@ -1,20 +1,39 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s -; CHECK: define i32 @foo -; %y = sub i32 0, %x -; %z = sdiv i32 %y, 337 -; ret i32 %y -define i32 @foo(i32 %x) { +; CHECK: @sub1 +; CHECK: %y = sub i32 0, %x +; CHECK: %z = sdiv i32 %y, 337 +; CHECK: ret i32 %z +define i32 @sub1(i32 %x) { %y = sub i32 0, %x %z = sdiv i32 %y, 337 - ret i32 %y + ret i32 %z } -; CHECK: define i32 @bar -; %y = sdiv i32 %x, -337 -; ret i32 %y -define i32 @bar(i32 %x) { +; CHECK: @sub2 +; CHECK: %z = sdiv i32 %x, -337 +; CHECK: ret i32 %z +define i32 @sub2(i32 %x) { %y = sub nsw i32 0, %x %z = sdiv i32 %y, 337 - ret i32 %y + ret i32 %z +} + +; CHECK: @shl_icmp +; CHECK: %B = icmp eq i64 %X, 0 +; CHECK: ret i1 %B +define i1 @shl_icmp(i64 %X) nounwind { + %A = shl nuw i64 %X, 2 ; X/4 + %B = icmp eq i64 %A, 0 + ret i1 %B +} + +; CHECK: @shl1 +; CHECK: %B = shl nuw nsw i64 %A, 8 +; CHECK: ret i64 %B +define i64 @shl1(i64 %X, i64* %P) nounwind { + %A = and i64 %X, 312 + store i64 %A, i64* %P ; multiple uses of A. + %B = shl i64 %A, 8 + ret i64 %B } diff --git a/test/Transforms/InstCombine/objsize.ll b/test/Transforms/InstCombine/objsize.ll index 664701bf2114..043525b75556 100644 --- a/test/Transforms/InstCombine/objsize.ll +++ b/test/Transforms/InstCombine/objsize.ll @@ -150,3 +150,13 @@ declare i8* @__memset_chk(i8*, i32, i32, i32) nounwind declare noalias i8* @malloc(i32) nounwind declare i32 @llvm.objectsize.i32(i8*, i1) nounwind readonly + +define i32 @test7() { +; CHECK: @test7 + %alloc = call noalias i8* @malloc(i32 48) nounwind + %gep = getelementptr inbounds i8* %alloc, i32 16 + %objsize = call i32 @llvm.objectsize.i32(i8* %gep, i1 false) nounwind readonly +; CHECK-NEXT: ret i32 32 + ret i32 %objsize +} + diff --git a/test/Transforms/InstCombine/or-fcmp.ll b/test/Transforms/InstCombine/or-fcmp.ll index 9692bfcc5970..09a3c994d93e 100644 --- a/test/Transforms/InstCombine/or-fcmp.ll +++ b/test/Transforms/InstCombine/or-fcmp.ll @@ -1,34 +1,58 @@ -; RUN: opt < %s -instcombine -S | grep fcmp | count 3 -; RUN: opt < %s -instcombine -S | grep ret | grep 1 +; RUN: opt < %s -instcombine -S | FileCheck %s +; CHECK: @t1 define zeroext i8 @t1(float %x, float %y) nounwind { %a = fcmp ueq float %x, %y ; <i1> [#uses=1] %b = fcmp uno float %x, %y ; <i1> [#uses=1] %c = or i1 %a, %b +; CHECK-NOT: fcmp uno +; CHECK: fcmp ueq %retval = zext i1 %c to i8 ret i8 %retval } +; CHECK: @t2 define zeroext i8 @t2(float %x, float %y) nounwind { %a = fcmp olt float %x, %y ; <i1> [#uses=1] %b = fcmp oeq float %x, %y ; <i1> [#uses=1] +; CHECK-NOT: fcmp olt +; CHECK-NOT: fcmp oeq +; CHECK: fcmp ole %c = or i1 %a, %b %retval = zext i1 %c to i8 ret i8 %retval } +; CHECK: @t3 define zeroext i8 @t3(float %x, float %y) nounwind { %a = fcmp ult float %x, %y ; <i1> [#uses=1] %b = fcmp uge float %x, %y ; <i1> [#uses=1] %c = or i1 %a, %b %retval = zext i1 %c to i8 +; CHECK: ret i8 1 ret i8 %retval } +; CHECK: @t4 define zeroext i8 @t4(float %x, float %y) nounwind { %a = fcmp ult float %x, %y ; <i1> [#uses=1] %b = fcmp ugt float %x, %y ; <i1> [#uses=1] %c = or i1 %a, %b +; CHECK-NOT: fcmp ult +; CHECK-NOT: fcmp ugt +; CHECK: fcmp une + %retval = zext i1 %c to i8 + ret i8 %retval +} + +; CHECK: @t5 +define zeroext i8 @t5(float %x, float %y) nounwind { + %a = fcmp olt float %x, %y ; <i1> [#uses=1] + %b = fcmp oge float %x, %y ; <i1> [#uses=1] + %c = or i1 %a, %b +; CHECK-NOT: fcmp olt +; CHECK-NOT: fcmp oge +; CHECK: fcmp ord %retval = zext i1 %c to i8 ret i8 %retval } diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll index c3526b77f6a5..f82f9faab2d5 100644 --- a/test/Transforms/InstCombine/or.ll +++ b/test/Transforms/InstCombine/or.ll @@ -316,8 +316,8 @@ entry: %E = or i32 %D, %C ret i32 %E ; CHECK: @test30 -; CHECK: %B = or i32 %A, 32962 -; CHECK: %E = and i32 %B, -25350 +; CHECK: %D = and i32 %A, -58312 +; CHECK: %E = or i32 %D, 32962 ; CHECK: ret i32 %E } @@ -332,8 +332,8 @@ define i64 @test31(i64 %A) nounwind readnone ssp noredzone { %F = or i64 %D, %E ret i64 %F ; CHECK: @test31 -; CHECK-NEXT: %bitfield = or i64 %A, 32962 -; CHECK-NEXT: %F = and i64 %bitfield, 4294941946 +; CHECK-NEXT: %E1 = and i64 %A, 4294908984 +; CHECK-NEXT: %F = or i64 %E1, 32962 ; CHECK-NEXT: ret i64 %F } @@ -350,3 +350,43 @@ define <4 x i32> @test32(<4 x i1> %and.i1352, <4 x i32> %vecinit6.i176, <4 x i32 ; CHECK: or <4 x i32> %and.i, %and.i129 } +define i1 @test33(i1 %X, i1 %Y) { + %a = or i1 %X, %Y + %b = or i1 %a, %X + ret i1 %b +; CHECK: @test33 +; CHECK-NEXT: or i1 %X, %Y +; CHECK-NEXT: ret +} + +define i32 @test34(i32 %X, i32 %Y) { + %a = or i32 %X, %Y + %b = or i32 %Y, %a + ret i32 %b +; CHECK: @test34 +; CHECK-NEXT: or i32 %X, %Y +; CHECK-NEXT: ret +} + +define i32 @test35(i32 %a, i32 %b) { + %1 = or i32 %a, 1135 + %2 = or i32 %1, %b + ret i32 %2 + ; CHECK: @test35 + ; CHECK-NEXT: or i32 %a, %b + ; CHECK-NEXT: or i32 %1, 1135 +} + +define i1 @test36(i32 %x) { + %cmp1 = icmp eq i32 %x, 23 + %cmp2 = icmp eq i32 %x, 24 + %ret1 = or i1 %cmp1, %cmp2 + %cmp3 = icmp eq i32 %x, 25 + %ret2 = or i1 %ret1, %cmp3 + ret i1 %ret2 +; CHECK: @test36 +; CHECK-NEXT: %x.off = add i32 %x, -23 +; CHECK-NEXT: icmp ult i32 %x.off, 3 +; CHECK-NEXT: ret i1 +} + diff --git a/test/Transforms/InstCombine/overflow.ll b/test/Transforms/InstCombine/overflow.ll new file mode 100644 index 000000000000..9123283988de --- /dev/null +++ b/test/Transforms/InstCombine/overflow.ll @@ -0,0 +1,133 @@ +; RUN: opt -S -instcombine < %s | FileCheck %s +; <rdar://problem/8558713> + +declare void @throwAnExceptionOrWhatever() + +; CHECK: @test1 +define i32 @test1(i32 %a, i32 %b) nounwind ssp { +entry: +; CHECK-NOT: sext + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %add = add nsw i64 %conv2, %conv + %add.off = add i64 %add, 2147483648 +; CHECK: llvm.sadd.with.overflow.i32 + %0 = icmp ugt i64 %add.off, 4294967295 + br i1 %0, label %if.then, label %if.end + +if.then: + tail call void @throwAnExceptionOrWhatever() nounwind + br label %if.end + +if.end: +; CHECK-NOT: trunc + %conv9 = trunc i64 %add to i32 +; CHECK: ret i32 + ret i32 %conv9 +} + +; CHECK: @test2 +; This form should not be promoted for two reasons: 1) it is unprofitable to +; promote it since the add.off instruction has another use, and 2) it is unsafe +; because the add-with-off makes the high bits of the original add live. +define i32 @test2(i32 %a, i32 %b, i64* %P) nounwind ssp { +entry: + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %add = add nsw i64 %conv2, %conv + %add.off = add i64 %add, 2147483648 + + store i64 %add.off, i64* %P + +; CHECK-NOT: llvm.sadd.with.overflow + %0 = icmp ugt i64 %add.off, 4294967295 + br i1 %0, label %if.then, label %if.end + +if.then: + tail call void @throwAnExceptionOrWhatever() nounwind + br label %if.end + +if.end: + %conv9 = trunc i64 %add to i32 +; CHECK: ret i32 + ret i32 %conv9 +} + +; CHECK: test3 +; PR8816 +; This is illegal to transform because the high bits of the original add are +; live out. +define i64 @test3(i32 %a, i32 %b) nounwind ssp { +entry: + %conv = sext i32 %a to i64 + %conv2 = sext i32 %b to i64 + %add = add nsw i64 %conv2, %conv + %add.off = add i64 %add, 2147483648 +; CHECK-NOT: llvm.sadd.with.overflow + %0 = icmp ugt i64 %add.off, 4294967295 + br i1 %0, label %if.then, label %if.end + +if.then: + tail call void @throwAnExceptionOrWhatever() nounwind + br label %if.end + +if.end: + ret i64 %add +; CHECK: ret i64 +} + +; CHECK: @test4 +; Should be able to form an i8 sadd computed in an i32. +define zeroext i8 @test4(i8 signext %a, i8 signext %b) nounwind ssp { +entry: + %conv = sext i8 %a to i32 + %conv2 = sext i8 %b to i32 + %add = add nsw i32 %conv2, %conv + %add4 = add nsw i32 %add, 128 + %cmp = icmp ugt i32 %add4, 255 + br i1 %cmp, label %if.then, label %if.end +; CHECK: llvm.sadd.with.overflow.i8 +if.then: ; preds = %entry + tail call void @throwAnExceptionOrWhatever() nounwind + unreachable + +if.end: ; preds = %entry + %conv7 = trunc i32 %add to i8 + ret i8 %conv7 +; CHECK: ret i8 +} + +; CHECK: @test5 +; CHECK: llvm.uadd.with.overflow +; CHECK: ret i64 +define i64 @test5(i64 %a, i64 %b) nounwind ssp { +entry: + %add = add i64 %b, %a + %cmp = icmp ult i64 %add, %a + %Q = select i1 %cmp, i64 %b, i64 42 + ret i64 %Q +} + +; CHECK: @test6 +; CHECK: llvm.uadd.with.overflow +; CHECK: ret i64 +define i64 @test6(i64 %a, i64 %b) nounwind ssp { +entry: + %add = add i64 %b, %a + %cmp = icmp ult i64 %add, %b + %Q = select i1 %cmp, i64 %b, i64 42 + ret i64 %Q +} + +; CHECK: @test7 +; CHECK: llvm.uadd.with.overflow +; CHECK: ret i64 +define i64 @test7(i64 %a, i64 %b) nounwind ssp { +entry: + %add = add i64 %b, %a + %cmp = icmp ugt i64 %b, %add + %Q = select i1 %cmp, i64 %b, i64 42 + ret i64 %Q +} + + diff --git a/test/Transforms/InstCombine/phi.ll b/test/Transforms/InstCombine/phi.ll index c6c3f2ff6a68..62c6a63a7e58 100644 --- a/test/Transforms/InstCombine/phi.ll +++ b/test/Transforms/InstCombine/phi.ll @@ -125,7 +125,7 @@ Exit: ; preds = %Loop define i32* @test8({ i32, i32 } *%A, i1 %b) { BB0: - %X = getelementptr { i32, i32 } *%A, i32 0, i32 1 + %X = getelementptr inbounds { i32, i32 } *%A, i32 0, i32 1 br i1 %b, label %BB1, label %BB2 BB1: @@ -139,7 +139,7 @@ BB2: ; CHECK: @test8 ; CHECK-NOT: phi ; CHECK: BB2: -; CHECK-NEXT: %B = getelementptr +; CHECK-NEXT: %B = getelementptr %0 ; CHECK-NEXT: ret i32* %B } @@ -423,3 +423,124 @@ bb2: ; preds = %bb1, %entry ret i32 %res } +define i1 @test18(i1 %cond) { + %zero = alloca i32 + %one = alloca i32 + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %ptr = phi i32* [ %zero, %true ] , [ %one, %false ] + %isnull = icmp eq i32* %ptr, null + ret i1 %isnull +; CHECK: @test18 +; CHECK: ret i1 false +} + +define i1 @test19(i1 %cond, double %x) { + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %p = phi double [ %x, %true ], [ 0x7FF0000000000000, %false ]; RHS = +infty + %cmp = fcmp ule double %x, %p + ret i1 %cmp +; CHECK: @test19 +; CHECK: ret i1 true +} + +define i1 @test20(i1 %cond) { + %a = alloca i32 + %b = alloca i32 + %c = alloca i32 + br i1 %cond, label %true, label %false +true: + br label %ret +false: + br label %ret +ret: + %p = phi i32* [ %a, %true ], [ %b, %false ] + %r = icmp eq i32* %p, %c + ret i1 %r +; CHECK: @test20 +; CHECK: ret i1 false +} + +define i1 @test21(i1 %c1, i1 %c2) { + %a = alloca i32 + %b = alloca i32 + %c = alloca i32 + br i1 %c1, label %true, label %false +true: + br label %loop +false: + br label %loop +loop: + %p = phi i32* [ %a, %true ], [ %b, %false ], [ %p, %loop ] + %r = icmp eq i32* %p, %c + br i1 %c2, label %ret, label %loop +ret: + ret i1 %r +; CHECK: @test21 +; CHECK: ret i1 false +} + +define void @test22() { +; CHECK: @test22 +entry: + br label %loop +loop: + %phi = phi i32 [ 0, %entry ], [ %y, %loop ] + %y = add i32 %phi, 1 + %o = or i32 %y, %phi + %e = icmp eq i32 %o, %y + br i1 %e, label %loop, label %ret +; CHECK: br i1 %e +ret: + ret void +} + +define i32 @test23(i32 %A, i1 %b, i32 * %P) { +BB0: + br label %Loop + +Loop: ; preds = %Loop, %BB0 + ; PHI has same value always. + %B = phi i32 [ %A, %BB0 ], [ 42, %Loop ] + %D = add i32 %B, 19 + store i32 %D, i32* %P + br i1 %b, label %Loop, label %Exit + +Exit: ; preds = %Loop + %E = add i32 %B, 19 + ret i32 %E +; CHECK: @test23 +; CHECK: %phitmp = add i32 %A, 19 +; CHECK: Loop: +; CHECK-NEXT: %B = phi i32 [ %phitmp, %BB0 ], [ 61, %Loop ] +; CHECK: Exit: +; CHECK-NEXT: ret i32 %B +} + +define i32 @test24(i32 %A, i1 %cond) { +BB0: + %X = add nuw nsw i32 %A, 1 + br i1 %cond, label %BB1, label %BB2 + +BB1: + %Y = add nuw i32 %A, 1 + br label %BB2 + +BB2: + %C = phi i32 [ %X, %BB0 ], [ %Y, %BB1 ] + ret i32 %C +; CHECK: @test24 +; CHECK-NOT: phi +; CHECK: BB2: +; CHECK-NEXT: %C = add nuw i32 %A, 1 +; CHECK-NEXT: ret i32 %C +} diff --git a/test/Transforms/InstCombine/pr8547.ll b/test/Transforms/InstCombine/pr8547.ll new file mode 100644 index 000000000000..485f4d9644f3 --- /dev/null +++ b/test/Transforms/InstCombine/pr8547.ll @@ -0,0 +1,26 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; Converting the 2 shifts to SHL 6 without the AND is wrong. PR 8547. + +@g_2 = global i32 0, align 4 +@.str = constant [10 x i8] c"g_2 = %d\0A\00" + +declare i32 @printf(i8*, ...) + +define i32 @main() nounwind { +codeRepl: + br label %for.cond + +for.cond: ; preds = %for.cond, %codeRepl + %storemerge = phi i32 [ 0, %codeRepl ], [ 5, %for.cond ] + store i32 %storemerge, i32* @g_2, align 4 + %shl = shl i32 %storemerge, 30 + %conv2 = lshr i32 %shl, 24 +; CHECK: %0 = shl nuw nsw i32 %storemerge, 6 +; CHECK: %conv2 = and i32 %0, 64 + %tobool = icmp eq i32 %conv2, 0 + br i1 %tobool, label %for.cond, label %codeRepl2 + +codeRepl2: ; preds = %for.cond + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([10 x i8]* @.str, i64 0, i64 0), i32 %conv2) nounwind + ret i32 0 +}
\ No newline at end of file diff --git a/test/Transforms/InstCombine/rem.ll b/test/Transforms/InstCombine/rem.ll index bac248e58d7a..b421b7c0e8b4 100644 --- a/test/Transforms/InstCombine/rem.ll +++ b/test/Transforms/InstCombine/rem.ll @@ -81,3 +81,8 @@ define i32 @test12(i32 %i) { %tmp.5 = srem i32 %tmp.1, 2 ret i32 %tmp.5 } + +define i32 @test13(i32 %i) { + %x = srem i32 %i, %i + ret i32 %x +} diff --git a/test/Transforms/InstCombine/select-crash.ll b/test/Transforms/InstCombine/select-crash.ll new file mode 100644 index 000000000000..8ee33690d8ce --- /dev/null +++ b/test/Transforms/InstCombine/select-crash.ll @@ -0,0 +1,20 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; Formerly crashed, PR8490. + +define fastcc double @gimp_operation_color_balance_map(float %value, double %highlights) nounwind readnone inlinehint { +entry: +; CHECK: gimp_operation_color_balance_map +; CHECK: fsub double -0.000000 + %conv = fpext float %value to double + %div = fdiv double %conv, 1.600000e+01 + %add = fadd double %div, 1.000000e+00 + %div1 = fdiv double 1.000000e+00, %add + %sub = fsub double 1.075000e+00, %div1 + %sub24 = fsub double 1.000000e+00, %sub + %add26 = fadd double %sub, 1.000000e+00 + %cmp86 = fcmp ogt double %highlights, 0.000000e+00 + %cond90 = select i1 %cmp86, double %sub24, double %add26 + %mul91 = fmul double %highlights, %cond90 + %add94 = fadd double undef, %mul91 + ret double %add94 +} diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll index 246a7bc59783..ba9d99c97dd5 100644 --- a/test/Transforms/InstCombine/select.ll +++ b/test/Transforms/InstCombine/select.ll @@ -223,6 +223,81 @@ define i32 @test15d(i32 %X) { ; CHECK: ret i32 %t1 } +;; (a & 128) ? 256 : 0 +define i32 @test15e(i32 %X) { + %t1 = and i32 %X, 128 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 256, i32 0 + ret i32 %t3 +; CHECK: @test15e +; CHECK: %t1 = shl i32 %X, 1 +; CHECK: and i32 %t1, 256 +; CHECK: ret i32 +} + +;; (a & 128) ? 0 : 256 +define i32 @test15f(i32 %X) { + %t1 = and i32 %X, 128 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 0, i32 256 + ret i32 %t3 +; CHECK: @test15f +; CHECK: %t1 = shl i32 %X, 1 +; CHECK: and i32 %t1, 256 +; CHECK: xor i32 %{{.*}}, 256 +; CHECK: ret i32 +} + +;; (a & 8) ? -1 : -9 +define i32 @test15g(i32 %X) { + %t1 = and i32 %X, 8 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 -1, i32 -9 + ret i32 %t3 +; CHECK: @test15g +; CHECK-NEXT: %1 = or i32 %X, -9 +; CHECK-NEXT: ret i32 %1 +} + +;; (a & 8) ? -9 : -1 +define i32 @test15h(i32 %X) { + %t1 = and i32 %X, 8 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 -9, i32 -1 + ret i32 %t3 +; CHECK: @test15h +; CHECK-NEXT: %1 = or i32 %X, -9 +; CHECK-NEXT: %2 = xor i32 %1, 8 +; CHECK-NEXT: ret i32 %2 +} + +;; (a & 2) ? 577 : 1089 +define i32 @test15i(i32 %X) { + %t1 = and i32 %X, 2 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 577, i32 1089 + ret i32 %t3 +; CHECK: @test15i +; CHECK-NEXT: %t1 = shl i32 %X, 8 +; CHECK-NEXT: %1 = and i32 %t1, 512 +; CHECK-NEXT: %2 = xor i32 %1, 512 +; CHECK-NEXT: %3 = add i32 %2, 577 +; CHECK-NEXT: ret i32 %3 +} + +;; (a & 2) ? 1089 : 577 +define i32 @test15j(i32 %X) { + %t1 = and i32 %X, 2 + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 1089, i32 577 + ret i32 %t3 +; CHECK: @test15j +; CHECK-NEXT: %t1 = shl i32 %X, 8 +; CHECK-NEXT: %1 = and i32 %t1, 512 +; CHECK-NEXT: %2 = add i32 %1, 577 +; CHECK-NEXT: ret i32 %2 +} + define i32 @test16(i1 %C, i32* %P) { %P2 = select i1 %C, i32* %P, i32* null %V = load i32* %P2 @@ -470,3 +545,172 @@ define i32 @test37(i32 %x) { ; CHECK: or i32 {{.*}}, 1 ; CHECK: ret } + +define i1 @test38(i1 %cond) { + %zero = alloca i32 + %one = alloca i32 + %ptr = select i1 %cond, i32* %zero, i32* %one + %isnull = icmp eq i32* %ptr, null + ret i1 %isnull +; CHECK: @test38 +; CHECK: ret i1 false +} + +define i1 @test39(i1 %cond, double %x) { + %s = select i1 %cond, double %x, double 0x7FF0000000000000 ; RHS = +infty + %cmp = fcmp ule double %x, %s + ret i1 %cmp +; CHECK: @test39 +; CHECK: ret i1 true +} + +define i1 @test40(i1 %cond) { + %a = alloca i32 + %b = alloca i32 + %c = alloca i32 + %s = select i1 %cond, i32* %a, i32* %b + %r = icmp eq i32* %s, %c + ret i1 %r +; CHECK: @test40 +; CHECK: ret i1 false +} + +define i32 @test41(i1 %cond, i32 %x, i32 %y) { + %z = and i32 %x, %y + %s = select i1 %cond, i32 %y, i32 %z + %r = and i32 %x, %s + ret i32 %r +; CHECK: @test41 +; CHECK-NEXT: and i32 %x, %y +; CHECK-NEXT: ret i32 +} + +define i32 @test42(i32 %x, i32 %y) { + %b = add i32 %y, -1 + %cond = icmp eq i32 %x, 0 + %c = select i1 %cond, i32 %b, i32 %y + ret i32 %c +; CHECK: @test42 +; CHECK-NEXT: %cond = icmp eq i32 %x, 0 +; CHECK-NEXT: %b = sext i1 %cond to i32 +; CHECK-NEXT: %c = add i32 %b, %y +; CHECK-NEXT: ret i32 %c +} + +define i64 @test43(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonnegative = icmp sgt i32 %a, -1 + %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 0 + ret i64 %max +; CHECK: @test43 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonnegative = icmp slt i64 %a_ext, 0 +; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 0, i64 %a_ext +; CHECK-NEXT: ret i64 %max +} + +define i64 @test44(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonpositive = icmp slt i32 %a, 1 + %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 0 + ret i64 %min +; CHECK: @test44 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp sgt i64 %a_ext, 0 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 0, i64 %a_ext +; CHECK-NEXT: ret i64 %min +} +define i64 @test45(i32 %a) nounwind { + %a_ext = zext i32 %a to i64 + %is_a_nonnegative = icmp ugt i32 %a, 2 + %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3 + ret i64 %max +; CHECK: @test45 +; CHECK-NEXT: %a_ext = zext i32 %a to i64 +; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3 +; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext +; CHECK-NEXT: ret i64 %max +} + +define i64 @test46(i32 %a) nounwind { + %a_ext = zext i32 %a to i64 + %is_a_nonpositive = icmp ult i32 %a, 3 + %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 + ret i64 %min +; CHECK: @test46 +; CHECK-NEXT: %a_ext = zext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext +; CHECK-NEXT: ret i64 %min +} +define i64 @test47(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonnegative = icmp ugt i32 %a, 2 + %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3 + ret i64 %max +; CHECK: @test47 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonnegative = icmp ult i64 %a_ext, 3 +; CHECK-NEXT: %max = select i1 %is_a_nonnegative, i64 3, i64 %a_ext +; CHECK-NEXT: ret i64 %max +} + +define i64 @test48(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonpositive = icmp ult i32 %a, 3 + %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 + ret i64 %min +; CHECK: @test48 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext +; CHECK-NEXT: ret i64 %min +} + +define i64 @test49(i32 %a) nounwind { + %a_ext = sext i32 %a to i64 + %is_a_nonpositive = icmp ult i32 %a, 3 + %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext + ret i64 %min +; CHECK: @test49 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 +; CHECK-NEXT: ret i64 %min +} +define i64 @test50(i32 %a) nounwind { + %is_a_nonpositive = icmp ult i32 %a, 3 + %a_ext = sext i32 %a to i64 + %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext + ret i64 %min +; CHECK: @test50 +; CHECK-NEXT: %a_ext = sext i32 %a to i64 +; CHECK-NEXT: %is_a_nonpositive = icmp ugt i64 %a_ext, 2 +; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 +; CHECK-NEXT: ret i64 %min +} + +; PR8994 + +; This select instruction can't be eliminated because trying to do so would +; change the number of vector elements. This used to assert. +define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) { +; CHECK: @test51 + %select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp +; CHECK: select <3 x i1> + %tmp2 = bitcast <3 x i16> %select to i48 + ret i48 %tmp2 +} + +; PR8575 + +define i32 @test52(i32 %n, i32 %m) nounwind { +; CHECK: @test52 + %cmp = icmp sgt i32 %n, %m + %. = select i1 %cmp, i32 1, i32 3 + %add = add nsw i32 %., 3 + %storemerge = select i1 %cmp, i32 %., i32 %add +; CHECK: select i1 %cmp, i32 1, i32 6 + ret i32 %storemerge +} + diff --git a/test/Transforms/InstCombine/sext.ll b/test/Transforms/InstCombine/sext.ll index 6deee1ff5653..60669b7a109f 100644 --- a/test/Transforms/InstCombine/sext.ll +++ b/test/Transforms/InstCombine/sext.ll @@ -110,7 +110,7 @@ entry: ret i32 %b ; CHECK: @test10 ; CHECK: shl i32 %i, 30 -; CHECK-NEXT: ashr i32 +; CHECK-NEXT: ashr exact i32 ; CHECK-NEXT: ret i32 } diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll index 871e9fe070e7..7fab1d2cab54 100644 --- a/test/Transforms/InstCombine/shift.ll +++ b/test/Transforms/InstCombine/shift.ll @@ -35,18 +35,32 @@ define i32 @test4(i8 %A) { define i32 @test5(i32 %A) { ; CHECK: @test5 -; CHECK: ret i32 0 +; CHECK: ret i32 undef %B = lshr i32 %A, 32 ;; shift all bits out ret i32 %B } define i32 @test5a(i32 %A) { ; CHECK: @test5a -; CHECK: ret i32 0 +; CHECK: ret i32 undef %B = shl i32 %A, 32 ;; shift all bits out ret i32 %B } +define i32 @test5b() { +; CHECK: @test5b +; CHECK: ret i32 -1 + %B = ashr i32 undef, 2 ;; top two bits must be equal, so not undef + ret i32 %B +} + +define i32 @test5b2(i32 %A) { +; CHECK: @test5b2 +; CHECK: ret i32 -1 + %B = ashr i32 undef, %A ;; top %A bits must be equal, so not undef + ret i32 %B +} + define i32 @test6(i32 %A) { ; CHECK: @test6 ; CHECK-NEXT: mul i32 %A, 6 @@ -437,7 +451,37 @@ entry: ret i64 %tmp46 ; CHECK: @test37 -; CHECK: %tmp23 = shl i128 %tmp22, 32 +; CHECK: %tmp23 = shl nuw nsw i128 %tmp22, 32 ; CHECK: %ins = or i128 %tmp23, %A ; CHECK: %tmp46 = trunc i128 %ins to i64 } + +define i32 @test38(i32 %x) nounwind readnone { + %rem = srem i32 %x, 32 + %shl = shl i32 1, %rem + ret i32 %shl +; CHECK: @test38 +; CHECK-NEXT: and i32 %x, 31 +; CHECK-NEXT: shl i32 1 +; CHECK-NEXT: ret i32 +} + +; <rdar://problem/8756731> +; CHECK: @test39 +define i8 @test39(i32 %a0) { +entry: + %tmp4 = trunc i32 %a0 to i8 +; CHECK: and i8 %tmp49, 64 + %tmp5 = shl i8 %tmp4, 5 + %tmp48 = and i8 %tmp5, 32 + %tmp49 = lshr i8 %tmp48, 5 + %tmp50 = mul i8 %tmp49, 64 + %tmp51 = xor i8 %tmp50, %tmp5 +; CHECK: and i8 %0, 16 + %tmp52 = and i8 %tmp51, -128 + %tmp53 = lshr i8 %tmp52, 7 + %tmp54 = mul i8 %tmp53, 16 + %tmp55 = xor i8 %tmp54, %tmp51 +; CHECK: ret i8 %tmp551 + ret i8 %tmp55 +} diff --git a/test/Transforms/InstCombine/signext.ll b/test/Transforms/InstCombine/signext.ll index 49384d6275e8..ecee9830cd57 100644 --- a/test/Transforms/InstCombine/signext.ll +++ b/test/Transforms/InstCombine/signext.ll @@ -9,7 +9,7 @@ define i32 @test1(i32 %x) { ret i32 %tmp.3 ; CHECK: @test1 ; CHECK: %sext = shl i32 %x, 16 -; CHECK: %tmp.3 = ashr i32 %sext, 16 +; CHECK: %tmp.3 = ashr exact i32 %sext, 16 ; CHECK: ret i32 %tmp.3 } @@ -20,7 +20,7 @@ define i32 @test2(i32 %x) { ret i32 %tmp.3 ; CHECK: @test2 ; CHECK: %sext = shl i32 %x, 16 -; CHECK: %tmp.3 = ashr i32 %sext, 16 +; CHECK: %tmp.3 = ashr exact i32 %sext, 16 ; CHECK: ret i32 %tmp.3 } @@ -51,7 +51,7 @@ define i32 @test5(i32 %x) { ret i32 %tmp.3 ; CHECK: @test5 ; CHECK: %sext = shl i32 %x, 24 -; CHECK: %tmp.3 = ashr i32 %sext, 24 +; CHECK: %tmp.3 = ashr exact i32 %sext, 24 ; CHECK: ret i32 %tmp.3 } @@ -61,7 +61,7 @@ define i32 @test6(i32 %x) { ret i32 %tmp.4 ; CHECK: @test6 ; CHECK: %tmp.2 = shl i32 %x, 16 -; CHECK: %tmp.4 = ashr i32 %tmp.2, 16 +; CHECK: %tmp.4 = ashr exact i32 %tmp.2, 16 ; CHECK: ret i32 %tmp.4 } @@ -82,6 +82,6 @@ entry: %sub = add i32 %xor, -67108864 ; <i32> [#uses=1] ret i32 %sub ; CHECK: @test8 -; CHECK: %sub = ashr i32 %x, 5 -; CHECK: ret i32 %sub +; CHECK: %shr = ashr i32 %x, 5 +; CHECK: ret i32 %shr } diff --git a/test/Transforms/InstCombine/sub.ll b/test/Transforms/InstCombine/sub.ll index 29bd7be2ff84..9656a7e862a8 100644 --- a/test/Transforms/InstCombine/sub.ll +++ b/test/Transforms/InstCombine/sub.ll @@ -40,7 +40,7 @@ define i32 @test5(i32 %A, i32 %B, i32 %C) { %E = sub i32 %A, %D ret i32 %E ; CHECK: @test5 -; CHECK: %D = sub i32 %C, %B +; CHECK: %D1 = sub i32 %C, %B ; CHECK: %E = add ; CHECK: ret i32 %E } @@ -209,7 +209,7 @@ define i1 @test22(i32 %a, i32 %b) zeroext nounwind { %tmp5 = icmp eq i32 %tmp2, %tmp4 ret i1 %tmp5 ; CHECK: @test22 -; CHECK: %tmp5 = icmp eq i32 %a, %b +; CHECK: %tmp5 = icmp eq i32 %b, %a ; CHECK: ret i1 %tmp5 } @@ -256,7 +256,7 @@ define i64 @test24b(i8* %P, i64 %A){ %G = sub i64 %C, ptrtoint ([42 x i16]* @Arr to i64) ret i64 %G ; CHECK: @test24b -; CHECK-NEXT: shl i64 %A, 1 +; CHECK-NEXT: shl nuw i64 %A, 1 ; CHECK-NEXT: ret i64 } @@ -267,7 +267,7 @@ define i64 @test25(i8* %P, i64 %A){ %G = sub i64 %C, ptrtoint (i16* getelementptr ([42 x i16]* @Arr, i64 1, i64 0) to i64) ret i64 %G ; CHECK: @test25 -; CHECK-NEXT: shl i64 %A, 1 +; CHECK-NEXT: shl nuw i64 %A, 1 ; CHECK-NEXT: add i64 {{.*}}, -84 ; CHECK-NEXT: ret i64 } @@ -281,3 +281,23 @@ define i32 @test26(i32 %x) { ; CHECK-NEXT: ret i32 } +define i32 @test27(i32 %x, i32 %y) { + %mul = mul i32 %y, -8 + %sub = sub i32 %x, %mul + ret i32 %sub +; CHECK: @test27 +; CHECK-NEXT: shl i32 %y, 3 +; CHECK-NEXT: add i32 +; CHECK-NEXT: ret i32 +} + +define i32 @test28(i32 %x, i32 %y, i32 %z) { + %neg = sub i32 0, %z + %mul = mul i32 %neg, %y + %sub = sub i32 %x, %mul + ret i32 %sub +; CHECK: @test28 +; CHECK-NEXT: mul i32 %z, %y +; CHECK-NEXT: add i32 +; CHECK-NEXT: ret i32 +} diff --git a/test/Transforms/InstCombine/trunc.ll b/test/Transforms/InstCombine/trunc.ll index f98bfd9236cd..6ec342a4f5c1 100644 --- a/test/Transforms/InstCombine/trunc.ll +++ b/test/Transforms/InstCombine/trunc.ll @@ -24,7 +24,7 @@ define i64 @test2(i64 %a) { ret i64 %d ; CHECK: @test2 ; CHECK: shl i64 %a, 36 -; CHECK: %d = ashr i64 {{.*}}, 36 +; CHECK: %d = ashr exact i64 {{.*}}, 36 ; CHECK: ret i64 %d } define i64 @test3(i64 %a) { @@ -92,8 +92,28 @@ define i64 @test8(i32 %A, i32 %B) { ; CHECK: @test8 ; CHECK: %tmp38 = zext i32 %A to i64 ; CHECK: %tmp32 = zext i32 %B to i64 -; CHECK: %tmp33 = shl i64 %tmp32, 32 +; CHECK: %tmp33 = shl nuw i64 %tmp32, 32 ; CHECK: %ins35 = or i64 %tmp33, %tmp38 ; CHECK: ret i64 %ins35 } +define i8 @test9(i32 %X) { + %Y = and i32 %X, 42 + %Z = trunc i32 %Y to i8 + ret i8 %Z +; CHECK: @test9 +; CHECK: trunc +; CHECK: and +; CHECK: ret +} + +; rdar://8808586 +define i8 @test10(i32 %X) { + %Y = trunc i32 %X to i8 + %Z = and i8 %Y, 42 + ret i8 %Z +; CHECK: @test10 +; CHECK: trunc +; CHECK: and +; CHECK: ret +} diff --git a/test/Transforms/InstCombine/vec_demanded_elts-2.ll b/test/Transforms/InstCombine/vec_demanded_elts-2.ll deleted file mode 100644 index 41593612e55f..000000000000 --- a/test/Transforms/InstCombine/vec_demanded_elts-2.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep extractelement - -define void @get_image() nounwind { -entry: - %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1] - %1 = trunc i32 %0 to i8 ; <i8> [#uses=1] - %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1] - %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1] - %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1] - br i1 %2, label %bb2, label %bb3 - -bb2: ; preds = %entry - br label %bb3 - -bb3: ; preds = %bb2, %entry - unreachable -} - -declare i32 @fgetc(i8*) diff --git a/test/Transforms/InstCombine/vec_demanded_elts-3.ll b/test/Transforms/InstCombine/vec_demanded_elts-3.ll deleted file mode 100644 index 62e43701d24e..000000000000 --- a/test/Transforms/InstCombine/vec_demanded_elts-3.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep load -; PR4340 - -define void @vac(<4 x float>* nocapture %a) nounwind { -entry: - %tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1] - %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1] - %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1] - %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1] - %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1] - store <4 x float> %vecins8, <4 x float>* %a - ret void -} - diff --git a/test/Transforms/InstCombine/vec_demanded_elts.ll b/test/Transforms/InstCombine/vec_demanded_elts.ll index 2009a776b151..9f308aa093ed 100644 --- a/test/Transforms/InstCombine/vec_demanded_elts.ll +++ b/test/Transforms/InstCombine/vec_demanded_elts.ll @@ -1,17 +1,13 @@ -; RUN: opt < %s -instcombine -S | \ -; RUN: grep {fadd float} -; RUN: opt < %s -instcombine -S | \ -; RUN: grep {fmul float} -; RUN: opt < %s -instcombine -S | \ -; RUN: not grep {insertelement.*0.00} -; RUN: opt < %s -instcombine -S | \ -; RUN: not grep {call.*llvm.x86.sse.mul} -; RUN: opt < %s -instcombine -S | \ -; RUN: not grep {call.*llvm.x86.sse.sub} -; END. +; RUN: opt < %s -instcombine -S | FileCheck %s define i16 @test1(float %f) { entry: +; CHECK: @test1 +; CHECK: fmul float +; CHECK-NOT: insertelement {{.*}} 0.00 +; CHECK-NOT: call {{.*}} @llvm.x86.sse.mul +; CHECK-NOT: call {{.*}} @llvm.x86.sse.sub +; CHECK: ret %tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1] %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1] %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1] @@ -26,16 +22,104 @@ entry: } define i32 @test2(float %f) { - %tmp5 = fmul float %f, %f - %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0 - %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1 - %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 - %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 - %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32> - %tmp21 = extractelement <4 x i32> %tmp19, i32 0 - ret i32 %tmp21 +; CHECK: @test2 +; CHECK-NOT: insertelement +; CHECK-NOT: extractelement +; CHECK: ret + %tmp5 = fmul float %f, %f + %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0 + %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1 + %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 + %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 + %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32> + %tmp21 = extractelement <4 x i32> %tmp19, i32 0 + ret i32 %tmp21 } +define i64 @test3(float %f, double %d) { +; CHECK: @test3 +; CHECK-NOT: insertelement {{.*}} 0.00 +; CHECK: ret +entry: + %v00 = insertelement <4 x float> undef, float %f, i32 0 + %v01 = insertelement <4 x float> %v00, float 0.000000e+00, i32 1 + %v02 = insertelement <4 x float> %v01, float 0.000000e+00, i32 2 + %v03 = insertelement <4 x float> %v02, float 0.000000e+00, i32 3 + %tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03) + %v10 = insertelement <4 x float> undef, float %f, i32 0 + %v11 = insertelement <4 x float> %v10, float 0.000000e+00, i32 1 + %v12 = insertelement <4 x float> %v11, float 0.000000e+00, i32 2 + %v13 = insertelement <4 x float> %v12, float 0.000000e+00, i32 3 + %tmp1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %v13) + %v20 = insertelement <4 x float> undef, float %f, i32 0 + %v21 = insertelement <4 x float> %v20, float 0.000000e+00, i32 1 + %v22 = insertelement <4 x float> %v21, float 0.000000e+00, i32 2 + %v23 = insertelement <4 x float> %v22, float 0.000000e+00, i32 3 + %tmp2 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %v23) + %v30 = insertelement <4 x float> undef, float %f, i32 0 + %v31 = insertelement <4 x float> %v30, float 0.000000e+00, i32 1 + %v32 = insertelement <4 x float> %v31, float 0.000000e+00, i32 2 + %v33 = insertelement <4 x float> %v32, float 0.000000e+00, i32 3 + %tmp3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %v33) + %v40 = insertelement <2 x double> undef, double %d, i32 0 + %v41 = insertelement <2 x double> %v40, double 0.000000e+00, i32 1 + %tmp4 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %v41) + %v50 = insertelement <2 x double> undef, double %d, i32 0 + %v51 = insertelement <2 x double> %v50, double 0.000000e+00, i32 1 + %tmp5 = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %v51) + %v60 = insertelement <2 x double> undef, double %d, i32 0 + %v61 = insertelement <2 x double> %v60, double 0.000000e+00, i32 1 + %tmp6 = tail call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %v61) + %v70 = insertelement <2 x double> undef, double %d, i32 0 + %v71 = insertelement <2 x double> %v70, double 0.000000e+00, i32 1 + %tmp7 = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %v71) + %tmp8 = add i32 %tmp0, %tmp2 + %tmp9 = add i32 %tmp4, %tmp6 + %tmp10 = add i32 %tmp8, %tmp9 + %tmp11 = sext i32 %tmp10 to i64 + %tmp12 = add i64 %tmp1, %tmp3 + %tmp13 = add i64 %tmp5, %tmp7 + %tmp14 = add i64 %tmp12, %tmp13 + %tmp15 = add i64 %tmp11, %tmp14 + ret i64 %tmp15 +} + +define void @get_image() nounwind { +; CHECK: @get_image +; CHECK-NOT: extractelement +; CHECK: unreachable +entry: + %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1] + %1 = trunc i32 %0 to i8 ; <i8> [#uses=1] + %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1] + %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1] + %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1] + br i1 %2, label %bb2, label %bb3 + +bb2: ; preds = %entry + br label %bb3 + +bb3: ; preds = %bb2, %entry + unreachable +} + +; PR4340 +define void @vac(<4 x float>* nocapture %a) nounwind { +; CHECK: @vac +; CHECK-NOT: load +; CHECK: ret +entry: + %tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1] + %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1] + %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1] + %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1] + %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1] + store <4 x float> %vecins8, <4 x float>* %a + ret void +} + +declare i32 @fgetc(i8*) + declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) @@ -44,4 +128,11 @@ declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) +declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) +declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) +declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) +declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) +declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) +declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) +declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) diff --git a/test/Transforms/InstCombine/vec_sext.ll b/test/Transforms/InstCombine/vec_sext.ll new file mode 100644 index 000000000000..d7ab96b9cfd8 --- /dev/null +++ b/test/Transforms/InstCombine/vec_sext.ll @@ -0,0 +1,22 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +define <4 x i32> @psignd_3(<4 x i32> %a, <4 x i32> %b) nounwind ssp { +entry: + %cmp = icmp slt <4 x i32> %b, zeroinitializer + %sext = sext <4 x i1> %cmp to <4 x i32> + %sub = sub nsw <4 x i32> zeroinitializer, %a + %0 = icmp slt <4 x i32> %sext, zeroinitializer + %sext3 = sext <4 x i1> %0 to <4 x i32> + %1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1> + %2 = and <4 x i32> %a, %1 + %3 = and <4 x i32> %sext3, %sub + %cond = or <4 x i32> %2, %3 + ret <4 x i32> %cond + +; CHECK: ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31> +; CHECK: sub nsw <4 x i32> zeroinitializer, %a +; CHECK: xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1> +; CHECK: and <4 x i32> %a, %0 +; CHECK: and <4 x i32> %b.lobit, %sub +; CHECK: or <4 x i32> %1, %2 +} diff --git a/test/Transforms/InstCombine/vec_shuffle.ll b/test/Transforms/InstCombine/vec_shuffle.ll index 5132a8ff9bd1..bd36e9ecb1eb 100644 --- a/test/Transforms/InstCombine/vec_shuffle.ll +++ b/test/Transforms/InstCombine/vec_shuffle.ll @@ -87,3 +87,26 @@ define <4 x i8> @test9(<16 x i8> %tmp6) nounwind { %tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1] ret <4 x i8> %tmp9 } + +; Same as test9, but make sure that "undef" mask values are not confused with +; mask values of 2*N, where N is the mask length. These shuffles should not +; be folded (because [8,9,4,8] may not be a mask supported by the target). +define <4 x i8> @test9a(<16 x i8> %tmp6) nounwind { +; CHECK: @test9a +; CHECK-NEXT: shufflevector +; CHECK-NEXT: shufflevector +; CHECK-NEXT: ret + %tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 undef, i32 9, i32 4, i32 8 > ; <<4 x i8>> [#uses=1] + %tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1] + ret <4 x i8> %tmp9 +} + +; Redundant vector splats should be removed. Radar 8597790. +define <4 x i32> @test10(<4 x i32> %tmp5) nounwind { +; CHECK: @test10 +; CHECK-NEXT: shufflevector +; CHECK-NEXT: ret + %tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> + %tmp7 = shufflevector <4 x i32> %tmp6, <4 x i32> undef, <4 x i32> zeroinitializer + ret <4 x i32> %tmp7 +} diff --git a/test/Transforms/InstCombine/vector-casts.ll b/test/Transforms/InstCombine/vector-casts.ll index 24bd04dcb2db..e931dc79ef41 100644 --- a/test/Transforms/InstCombine/vector-casts.ll +++ b/test/Transforms/InstCombine/vector-casts.ll @@ -121,3 +121,31 @@ define <2 x double> @fc(<2 x double> %t) { %b = sitofp <2 x i64> %a to <2 x double> ret <2 x double> %b } + +; PR9228 +; This was a crasher, so no CHECK statements. +define <4 x float> @f(i32 %a) nounwind alwaysinline { +; CHECK: @f +entry: + %dim = insertelement <4 x i32> undef, i32 %a, i32 0 + %dim30 = insertelement <4 x i32> %dim, i32 %a, i32 1 + %dim31 = insertelement <4 x i32> %dim30, i32 %a, i32 2 + %dim32 = insertelement <4 x i32> %dim31, i32 %a, i32 3 + + %offset_ptr = getelementptr <4 x float>* null, i32 1 + %offset_int = ptrtoint <4 x float>* %offset_ptr to i64 + %sizeof32 = trunc i64 %offset_int to i32 + + %smearinsert33 = insertelement <4 x i32> undef, i32 %sizeof32, i32 0 + %smearinsert34 = insertelement <4 x i32> %smearinsert33, i32 %sizeof32, i32 1 + %smearinsert35 = insertelement <4 x i32> %smearinsert34, i32 %sizeof32, i32 2 + %smearinsert36 = insertelement <4 x i32> %smearinsert35, i32 %sizeof32, i32 3 + + %delta_scale = mul <4 x i32> %dim32, %smearinsert36 + %offset_delta = add <4 x i32> zeroinitializer, %delta_scale + + %offset_varying_delta = add <4 x i32> %offset_delta, undef + + ret <4 x float> undef +} + diff --git a/test/Transforms/InstCombine/xor2.ll b/test/Transforms/InstCombine/xor2.ll index 67f05efa23d4..89f00bd68475 100644 --- a/test/Transforms/InstCombine/xor2.ll +++ b/test/Transforms/InstCombine/xor2.ll @@ -34,7 +34,7 @@ define i32 @test2(i32 %tmp1) { define i32 @test3(i32 %tmp1) { ; CHECK: @test3 ; CHECK-NEXT: and i32 %tmp1, 32 -; CHECK-NEXT: or i32 %tmp, 8 +; CHECK-NEXT: or i32 %ovm, 8 ; CHECK-NEXT: ret i32 %ovm = or i32 %tmp1, 145 %ov31 = and i32 %ovm, 177 diff --git a/test/Transforms/InstSimplify/2010-12-20-Boolean.ll b/test/Transforms/InstSimplify/2010-12-20-Boolean.ll new file mode 100644 index 000000000000..3aa1bd60cfd6 --- /dev/null +++ b/test/Transforms/InstSimplify/2010-12-20-Boolean.ll @@ -0,0 +1,29 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define i1 @add(i1 %x) { +; CHECK: @add + %z = add i1 %x, %x + ret i1 %z +; CHECK: ret i1 false +} + +define i1 @sub(i1 %x) { +; CHECK: @sub + %z = sub i1 false, %x + ret i1 %z +; CHECK: ret i1 %x +} + +define i1 @mul(i1 %x) { +; CHECK: @mul + %z = mul i1 %x, %x + ret i1 %z +; CHECK: ret i1 %x +} + +define i1 @ne(i1 %x) { +; CHECK: @ne + %z = icmp ne i1 %x, 0 + ret i1 %z +; CHECK: ret i1 %x +} diff --git a/test/Transforms/InstSimplify/2010-12-20-Distribute.ll b/test/Transforms/InstSimplify/2010-12-20-Distribute.ll new file mode 100644 index 000000000000..d20abd68c200 --- /dev/null +++ b/test/Transforms/InstSimplify/2010-12-20-Distribute.ll @@ -0,0 +1,62 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define i32 @factorize(i32 %x, i32 %y) { +; CHECK: @factorize +; (X | 1) & (X | 2) -> X | (1 & 2) -> X + %l = or i32 %x, 1 + %r = or i32 %x, 2 + %z = and i32 %l, %r + ret i32 %z +; CHECK: ret i32 %x +} + +define i32 @factorize2(i32 %x) { +; CHECK: @factorize2 +; 3*X - 2*X -> X + %l = mul i32 3, %x + %r = mul i32 2, %x + %z = sub i32 %l, %r + ret i32 %z +; CHECK: ret i32 %x +} + +define i32 @factorize3(i32 %x, i32 %a, i32 %b) { +; CHECK: @factorize3 +; (X | (A|B)) & (X | B) -> X | ((A|B) & B) -> X | B + %aORb = or i32 %a, %b + %l = or i32 %x, %aORb + %r = or i32 %x, %b + %z = and i32 %l, %r + ret i32 %z +; CHECK: ret i32 %r +} + +define i32 @factorize4(i32 %x, i32 %y) { +; CHECK: @factorize4 + %sh = shl i32 %y, 1 + %ml = mul i32 %sh, %x + %mr = mul i32 %x, %y + %s = sub i32 %ml, %mr + ret i32 %s +; CHECK: ret i32 %mr +} + +define i32 @factorize5(i32 %x, i32 %y) { +; CHECK: @factorize5 + %sh = mul i32 %y, 2 + %ml = mul i32 %sh, %x + %mr = mul i32 %x, %y + %s = sub i32 %ml, %mr + ret i32 %s +; CHECK: ret i32 %mr +} + +define i32 @expand(i32 %x) { +; CHECK: @expand +; ((X & 1) | 2) & 1 -> ((X & 1) & 1) | (2 & 1) -> (X & 1) | 0 -> X & 1 + %a = and i32 %x, 1 + %b = or i32 %a, 2 + %c = and i32 %b, 1 + ret i32 %c +; CHECK: ret i32 %a +} diff --git a/test/Transforms/InstSimplify/2011-01-14-Thread.ll b/test/Transforms/InstSimplify/2011-01-14-Thread.ll new file mode 100644 index 000000000000..8fc4dc5d5bb7 --- /dev/null +++ b/test/Transforms/InstSimplify/2011-01-14-Thread.ll @@ -0,0 +1,9 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define i32 @shift_select(i1 %cond) { +; CHECK: @shift_select + %s = select i1 %cond, i32 0, i32 1 + %r = lshr i32 %s, 1 + ret i32 %r +; CHECK: ret i32 0 +} diff --git a/test/Transforms/InstSimplify/2011-02-01-Vector.ll b/test/Transforms/InstSimplify/2011-02-01-Vector.ll new file mode 100644 index 000000000000..3039a663fa45 --- /dev/null +++ b/test/Transforms/InstSimplify/2011-02-01-Vector.ll @@ -0,0 +1,8 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define <2 x i32> @sdiv(<2 x i32> %x) { +; CHECK: @sdiv + %div = sdiv <2 x i32> %x, <i32 1, i32 1> + ret <2 x i32> %div +; CHECK: ret <2 x i32> %x +} diff --git a/test/Transforms/InstSimplify/compare.ll b/test/Transforms/InstSimplify/compare.ll new file mode 100644 index 000000000000..250e44ce340f --- /dev/null +++ b/test/Transforms/InstSimplify/compare.ll @@ -0,0 +1,189 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s +target datalayout = "p:32:32" + +define i1 @ptrtoint() { +; CHECK: @ptrtoint + %a = alloca i8 + %tmp = ptrtoint i8* %a to i32 + %r = icmp eq i32 %tmp, 0 + ret i1 %r +; CHECK: ret i1 false +} + +define i1 @zext(i32 %x) { +; CHECK: @zext + %e1 = zext i32 %x to i64 + %e2 = zext i32 %x to i64 + %r = icmp eq i64 %e1, %e2 + ret i1 %r +; CHECK: ret i1 true +} + +define i1 @zext2(i1 %x) { +; CHECK: @zext2 + %e = zext i1 %x to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 %x +} + +define i1 @zext3() { +; CHECK: @zext3 + %e = zext i1 1 to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @sext(i32 %x) { +; CHECK: @sext + %e1 = sext i32 %x to i64 + %e2 = sext i32 %x to i64 + %r = icmp eq i64 %e1, %e2 + ret i1 %r +; CHECK: ret i1 true +} + +define i1 @sext2(i1 %x) { +; CHECK: @sext2 + %e = sext i1 %x to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 %x +} + +define i1 @sext3() { +; CHECK: @sext3 + %e = sext i1 1 to i32 + %c = icmp ne i32 %e, 0 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @add(i32 %x, i32 %y) { +; CHECK: @add + %l = lshr i32 %x, 1 + %q = lshr i32 %y, 1 + %r = or i32 %q, 1 + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @add2(i8 %x, i8 %y) { +; CHECK: @add2 + %l = or i8 %x, 128 + %r = or i8 %y, 129 + %s = add i8 %l, %r + %c = icmp eq i8 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @add3(i8 %x, i8 %y) { +; CHECK: @add3 + %l = zext i8 %x to i32 + %r = zext i8 %y to i32 + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %c +} + +define i1 @add4(i32 %x, i32 %y) { +; CHECK: @add4 + %z = add nsw i32 %y, 1 + %s1 = add nsw i32 %x, %y + %s2 = add nsw i32 %x, %z + %c = icmp slt i32 %s1, %s2 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @add5(i32 %x, i32 %y) { +; CHECK: @add5 + %z = add nuw i32 %y, 1 + %s1 = add nuw i32 %x, %z + %s2 = add nuw i32 %x, %y + %c = icmp ugt i32 %s1, %s2 + ret i1 %c +; CHECK: ret i1 true +} + +define i1 @addpowtwo(i32 %x, i32 %y) { +; CHECK: @addpowtwo + %l = lshr i32 %x, 1 + %r = shl i32 1, %y + %s = add i32 %l, %r + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @or(i32 %x) { +; CHECK: @or + %o = or i32 %x, 1 + %c = icmp eq i32 %o, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @shl(i32 %x) { +; CHECK: @shl + %s = shl i32 1, %x + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @lshr(i32 %x) { +; CHECK: @lshr + %s = lshr i32 -1, %x + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @ashr(i32 %x) { +; CHECK: @ashr + %s = ashr i32 -1, %x + %c = icmp eq i32 %s, 0 + ret i1 %c +; CHECK: ret i1 false +} + +define i1 @select1(i1 %cond) { +; CHECK: @select1 + %s = select i1 %cond, i32 1, i32 0 + %c = icmp eq i32 %s, 1 + ret i1 %c +; CHECK: ret i1 %cond +} + +define i1 @select2(i1 %cond) { +; CHECK: @select2 + %x = zext i1 %cond to i32 + %s = select i1 %cond, i32 %x, i32 0 + %c = icmp ne i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %cond +} + +define i1 @select3(i1 %cond) { +; CHECK: @select3 + %x = zext i1 %cond to i32 + %s = select i1 %cond, i32 1, i32 %x + %c = icmp ne i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %cond +} + +define i1 @select4(i1 %cond) { +; CHECK: @select4 + %invert = xor i1 %cond, 1 + %s = select i1 %invert, i32 0, i32 1 + %c = icmp ne i32 %s, 0 + ret i1 %c +; CHECK: ret i1 %cond +} diff --git a/test/Transforms/LoopIndexSplit/dg.exp b/test/Transforms/InstSimplify/dg.exp index f2005891a59a..f2005891a59a 100644 --- a/test/Transforms/LoopIndexSplit/dg.exp +++ b/test/Transforms/InstSimplify/dg.exp diff --git a/test/Transforms/InstSimplify/exact-nsw-nuw.ll b/test/Transforms/InstSimplify/exact-nsw-nuw.ll new file mode 100644 index 000000000000..f3a804eb5b5e --- /dev/null +++ b/test/Transforms/InstSimplify/exact-nsw-nuw.ll @@ -0,0 +1,44 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +; PR8862 + +; CHECK: @shift1 +; CHECK: ret i32 %A +define i32 @shift1(i32 %A, i32 %B) { + %C = lshr exact i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift2 +; CHECK: lshr +; CHECK: ret i32 %D +define i32 @shift2(i32 %A, i32 %B) { + %C = lshr i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift3 +; CHECK: ret i32 %A +define i32 @shift3(i32 %A, i32 %B) { + %C = ashr exact i32 %A, %B + %D = shl nuw i32 %C, %B + ret i32 %D +} + +; CHECK: @shift4 +; CHECK: ret i32 %A +define i32 @shift4(i32 %A, i32 %B) { + %C = shl nuw i32 %A, %B + %D = lshr i32 %C, %B + ret i32 %D +} + +; CHECK: @shift5 +; CHECK: ret i32 %A +define i32 @shift5(i32 %A, i32 %B) { + %C = shl nsw i32 %A, %B + %D = ashr i32 %C, %B + ret i32 %D +} diff --git a/test/Transforms/InstSimplify/fdiv.ll b/test/Transforms/InstSimplify/fdiv.ll new file mode 100644 index 000000000000..9d85154b240f --- /dev/null +++ b/test/Transforms/InstSimplify/fdiv.ll @@ -0,0 +1,17 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define double @fdiv_of_undef(double %X) { +; CHECK: @fdiv_of_undef +; undef / X -> undef + %r = fdiv double undef, %X + ret double %r +; CHECK: ret double undef +} + +define double @fdiv_by_undef(double %X) { +; CHECK: @fdiv_by_undef +; X / undef -> undef + %r = fdiv double %X, undef + ret double %r +; CHECK: ret double undef +} diff --git a/test/Transforms/InstSimplify/reassociate.ll b/test/Transforms/InstSimplify/reassociate.ll new file mode 100644 index 000000000000..3c8169e5e283 --- /dev/null +++ b/test/Transforms/InstSimplify/reassociate.ll @@ -0,0 +1,186 @@ +; RUN: opt < %s -instsimplify -S | FileCheck %s + +define i32 @add1(i32 %x) { +; CHECK: @add1 +; (X + -1) + 1 -> X + %l = add i32 %x, -1 + %r = add i32 %l, 1 + ret i32 %r +; CHECK: ret i32 %x +} + +define i32 @and1(i32 %x, i32 %y) { +; CHECK: @and1 +; (X & Y) & X -> X & Y + %l = and i32 %x, %y + %r = and i32 %l, %x + ret i32 %r +; CHECK: ret i32 %l +} + +define i32 @and2(i32 %x, i32 %y) { +; CHECK: @and2 +; X & (X & Y) -> X & Y + %r = and i32 %x, %y + %l = and i32 %x, %r + ret i32 %l +; CHECK: ret i32 %r +} + +define i32 @or1(i32 %x, i32 %y) { +; CHECK: @or1 +; (X | Y) | X -> X | Y + %l = or i32 %x, %y + %r = or i32 %l, %x + ret i32 %r +; CHECK: ret i32 %l +} + +define i32 @or2(i32 %x, i32 %y) { +; CHECK: @or2 +; X | (X | Y) -> X | Y + %r = or i32 %x, %y + %l = or i32 %x, %r + ret i32 %l +; CHECK: ret i32 %r +} + +define i32 @xor1(i32 %x, i32 %y) { +; CHECK: @xor1 +; (X ^ Y) ^ X = Y + %l = xor i32 %x, %y + %r = xor i32 %l, %x + ret i32 %r +; CHECK: ret i32 %y +} + +define i32 @xor2(i32 %x, i32 %y) { +; CHECK: @xor2 +; X ^ (X ^ Y) = Y + %r = xor i32 %x, %y + %l = xor i32 %x, %r + ret i32 %l +; CHECK: ret i32 %y +} + +define i32 @sub1(i32 %x, i32 %y) { +; CHECK: @sub1 + %d = sub i32 %x, %y + %r = sub i32 %x, %d + ret i32 %r +; CHECK: ret i32 %y +} + +define i32 @sub2(i32 %x) { +; CHECK: @sub2 +; X - (X + 1) -> -1 + %xp1 = add i32 %x, 1 + %r = sub i32 %x, %xp1 + ret i32 %r +; CHECK: ret i32 -1 +} + +define i32 @sub3(i32 %x, i32 %y) { +; CHECK: @sub3 +; ((X + 1) + Y) - (Y + 1) -> X + %xp1 = add i32 %x, 1 + %lhs = add i32 %xp1, %y + %rhs = add i32 %y, 1 + %r = sub i32 %lhs, %rhs + ret i32 %r +; CHECK: ret i32 %x +} + +define i32 @sdiv1(i32 %x, i32 %y) { +; CHECK: @sdiv1 +; (no overflow X * Y) / Y -> X + %mul = mul nsw i32 %x, %y + %r = sdiv i32 %mul, %y + ret i32 %r +; CHECK: ret i32 %x +} + +define i32 @sdiv2(i32 %x, i32 %y) { +; CHECK: @sdiv2 +; (((X / Y) * Y) / Y) -> X / Y + %div = sdiv i32 %x, %y + %mul = mul i32 %div, %y + %r = sdiv i32 %mul, %y + ret i32 %r +; CHECK: ret i32 %div +} + +define i32 @sdiv3(i32 %x, i32 %y) { +; CHECK: @sdiv3 +; (X rem Y) / Y -> 0 + %rem = srem i32 %x, %y + %div = sdiv i32 %rem, %y + ret i32 %div +; CHECK: ret i32 0 +} + +define i32 @sdiv4(i32 %x, i32 %y) { +; CHECK: @sdiv4 +; (X / Y) * Y -> X if the division is exact + %div = sdiv exact i32 %x, %y + %mul = mul i32 %div, %y + ret i32 %mul +; CHECK: ret i32 %x +} + +define i32 @sdiv5(i32 %x, i32 %y) { +; CHECK: @sdiv5 +; Y * (X / Y) -> X if the division is exact + %div = sdiv exact i32 %x, %y + %mul = mul i32 %y, %div + ret i32 %mul +; CHECK: ret i32 %x +} + + +define i32 @udiv1(i32 %x, i32 %y) { +; CHECK: @udiv1 +; (no overflow X * Y) / Y -> X + %mul = mul nuw i32 %x, %y + %r = udiv i32 %mul, %y + ret i32 %r +; CHECK: ret i32 %x +} + +define i32 @udiv2(i32 %x, i32 %y) { +; CHECK: @udiv2 +; (((X / Y) * Y) / Y) -> X / Y + %div = udiv i32 %x, %y + %mul = mul i32 %div, %y + %r = udiv i32 %mul, %y + ret i32 %r +; CHECK: ret i32 %div +} + +define i32 @udiv3(i32 %x, i32 %y) { +; CHECK: @udiv3 +; (X rem Y) / Y -> 0 + %rem = urem i32 %x, %y + %div = udiv i32 %rem, %y + ret i32 %div +; CHECK: ret i32 0 +} + +define i32 @udiv4(i32 %x, i32 %y) { +; CHECK: @udiv4 +; (X / Y) * Y -> X if the division is exact + %div = udiv exact i32 %x, %y + %mul = mul i32 %div, %y + ret i32 %mul +; CHECK: ret i32 %x +} + +define i32 @udiv5(i32 %x, i32 %y) { +; CHECK: @udiv5 +; Y * (X / Y) -> X if the division is exact + %div = udiv exact i32 %x, %y + %mul = mul i32 %y, %div + ret i32 %mul +; CHECK: ret i32 %x +} + diff --git a/test/Transforms/JumpThreading/2010-08-26-and.ll b/test/Transforms/JumpThreading/2010-08-26-and.ll index 17a0aba2faef..2d6caf752e09 100644 --- a/test/Transforms/JumpThreading/2010-08-26-and.ll +++ b/test/Transforms/JumpThreading/2010-08-26-and.ll @@ -1,4 +1,4 @@ -; RUN: opt -jump-threading -enable-jump-threading-lvi -S < %s | FileCheck %s +; RUN: opt -jump-threading -S < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.0.0" diff --git a/test/Transforms/JumpThreading/and-and-cond.ll b/test/Transforms/JumpThreading/and-and-cond.ll index e6db9ee5a325..765d940cc7c3 100644 --- a/test/Transforms/JumpThreading/and-and-cond.ll +++ b/test/Transforms/JumpThreading/and-and-cond.ll @@ -1,14 +1,14 @@ -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1} -; There should be no uncond branches left. -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label} +; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s declare i32 @f1() declare i32 @f2() declare void @f3() define i32 @test(i1 %cond, i1 %cond2, i1 %cond3) { +; CHECK: test br i1 %cond, label %T1, label %F1 +; CHECK-NOT: T1: T1: %v1 = call i32 @f1() br label %Merge @@ -18,6 +18,10 @@ F1: br label %Merge Merge: +; CHECK: Merge: +; CHECK: %v1 = call i32 @f1() +; CHECK-NEXT: %D = and i1 %cond2, %cond3 +; CHECK-NEXT: br i1 %D %A = phi i1 [true, %T1], [false, %F1] %B = phi i32 [%v1, %T1], [%v2, %F1] %C = and i1 %A, %cond2 diff --git a/test/Transforms/JumpThreading/and-cond.ll b/test/Transforms/JumpThreading/and-cond.ll index 58dbec72a76e..0159bb3bb761 100644 --- a/test/Transforms/JumpThreading/and-cond.ll +++ b/test/Transforms/JumpThreading/and-cond.ll @@ -1,14 +1,14 @@ -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1} -; There should be no uncond branches left. -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label} +; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s declare i32 @f1() declare i32 @f2() declare void @f3() define i32 @test(i1 %cond, i1 %cond2) { +; CHECK: test br i1 %cond, label %T1, label %F1 +; CHECK-NOT: T1 T1: %v1 = call i32 @f1() br label %Merge @@ -18,6 +18,9 @@ F1: br label %Merge Merge: +; CHECK: Merge: +; CHECK: %v1 = call i32 @f1() +; CHECK-NEXT: br i1 %cond2 %A = phi i1 [true, %T1], [false, %F1] %B = phi i32 [%v1, %T1], [%v2, %F1] %C = and i1 %A, %cond2 diff --git a/test/Transforms/JumpThreading/basic.ll b/test/Transforms/JumpThreading/basic.ll index cd274e78c9fc..46271379bd0d 100644 --- a/test/Transforms/JumpThreading/basic.ll +++ b/test/Transforms/JumpThreading/basic.ll @@ -1,4 +1,4 @@ -; RUN: opt %s -jump-threading -S -enable-jump-threading-lvi | FileCheck %s +; RUN: opt %s -jump-threading -S | FileCheck %s declare i32 @f1() declare i32 @f2() diff --git a/test/Transforms/JumpThreading/crash.ll b/test/Transforms/JumpThreading/crash.ll index 751bc6518a1a..aed51a1c9ee9 100644 --- a/test/Transforms/JumpThreading/crash.ll +++ b/test/Transforms/JumpThreading/crash.ll @@ -484,3 +484,30 @@ bb269.us.us: bb288.bb289.loopexit_crit_edge: unreachable } + +; PR 8247 +%struct.S1 = type { i8, i8 } +@func_89.l_245 = internal constant %struct.S1 { i8 33, i8 6 }, align 1 +define void @func_89(i16 zeroext %p_90, %struct.S1* nocapture %p_91, i32* nocapture %p_92) nounwind ssp { +entry: + store i32 0, i32* %p_92, align 4 + br i1 false, label %lbl_260, label %if.else + +if.else: ; preds = %entry + br label %for.cond + +for.cond: ; preds = %lbl_260, %if.else + %l_245.0 = phi i16 [ %l_245.1, %lbl_260 ], [ 33, %if.else ] + %l_261.0 = phi i32 [ %and, %lbl_260 ], [ 255, %if.else ] + %tobool21 = icmp ult i16 %l_245.0, 256 + br i1 %tobool21, label %if.end, label %lbl_260 + +lbl_260: ; preds = %for.cond, %entry + %l_245.1 = phi i16 [ 1569, %entry ], [ %l_245.0, %for.cond ] + %l_261.1 = phi i32 [ 255, %entry ], [ %l_261.0, %for.cond ] + %and = and i32 %l_261.1, 1 + br label %for.cond + +if.end: ; preds = %for.cond + ret void +} diff --git a/test/Transforms/JumpThreading/degenerate-phi.ll b/test/Transforms/JumpThreading/degenerate-phi.ll new file mode 100644 index 000000000000..35d9fdec4281 --- /dev/null +++ b/test/Transforms/JumpThreading/degenerate-phi.ll @@ -0,0 +1,24 @@ +; RUN: opt -jump-threading -disable-output %s +; PR9112 + +; This is actually a test for value tracking. Jump threading produces +; "%phi = phi i16" when it removes all edges leading to %unreachable. +; The .ll parser won't let us write that directly since it's invalid code. + +define void @func() nounwind { +entry: + br label %bb + +bb: + br label %bb + +unreachable: + %phi = phi i16 [ %add, %unreachable ], [ 0, %next ] + %add = add i16 0, %phi + %cmp = icmp slt i16 %phi, 0 + br i1 %cmp, label %unreachable, label %next + +next: + br label %unreachable +} + diff --git a/test/Transforms/JumpThreading/indirectbr.ll b/test/Transforms/JumpThreading/indirectbr.ll new file mode 100644 index 000000000000..141277fec626 --- /dev/null +++ b/test/Transforms/JumpThreading/indirectbr.ll @@ -0,0 +1,94 @@ +; RUN: opt -S < %s -jump-threading | FileCheck %s + +; Keep block addresses alive. +@addresses = constant [4 x i8*] [ + i8* blockaddress(@test1, %L1), i8* blockaddress(@test1, %L2), + i8* blockaddress(@test2, %L1), i8* blockaddress(@test2, %L2) +] + +declare void @bar() +declare void @baz() + + + +; Check basic jump threading for indirectbr instructions. + +; CHECK: void @test1 +; CHECK: br i1 %tobool, label %L1, label %indirectgoto +; CHECK-NOT: if.else: +; CHECK: L1: +; CHECK: indirectbr i8* %address, [label %L1, label %L2] +define void @test1(i32 %i, i8* %address) nounwind { +entry: + %rem = srem i32 %i, 2 + %tobool = icmp ne i32 %rem, 0 + br i1 %tobool, label %indirectgoto, label %if.else + +if.else: ; preds = %entry + br label %indirectgoto + +L1: ; preds = %indirectgoto + call void @bar() + ret void + +L2: ; preds = %indirectgoto + call void @baz() + ret void + +indirectgoto: ; preds = %if.else, %entry + %indirect.goto.dest = phi i8* [ %address, %if.else ], [ blockaddress(@test1, %L1), %entry ] + indirectbr i8* %indirect.goto.dest, [label %L1, label %L2] +} + + +; Check constant folding of indirectbr + +; CHECK: void @test2 +; CHECK: entry: +; CHECK-NEXT: br label %L1 +; CHECK: L1: +; CHECK-NEXT: call void @bar +; CHECK-NEXT: ret void +define void @test2() nounwind { +entry: + indirectbr i8* blockaddress(@test2, %L1), [label %L1, label %L2] + +L1: ; preds = %indirectgoto + call void @bar() + ret void + +L2: ; preds = %indirectgoto + call void @baz() + ret void +} + + +; PR4151 +; Don't merge address-taken blocks. +@.str = private unnamed_addr constant [4 x i8] c"%p\0A\00" + +; CHECK: @test3 +; CHECK: __here: +; CHECK: blockaddress(@test3, %__here) +; CHECK: __here1: +; CHECK: blockaddress(@test3, %__here1) +; CHECK: __here3: +; CHECK: blockaddress(@test3, %__here3) +define void @test3() nounwind ssp noredzone { +entry: + br label %__here + +__here: ; preds = %entry + %call = call i32 (...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i64 ptrtoint (i8* blockaddress(@test3, %__here) to i64)) nounwind noredzone + br label %__here1 + +__here1: ; preds = %__here + %call2 = call i32 (...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i64 ptrtoint (i8* blockaddress(@test3, %__here1) to i64)) nounwind noredzone + br label %__here3 + +__here3: ; preds = %__here1 + %call4 = call i32 (...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i64 ptrtoint (i8* blockaddress(@test3, %__here3) to i64)) nounwind noredzone + ret void +} + +declare i32 @printf(...) noredzone diff --git a/test/Transforms/JumpThreading/lvi-load.ll b/test/Transforms/JumpThreading/lvi-load.ll index 0bf4187d544b..2a4cf925102f 100644 --- a/test/Transforms/JumpThreading/lvi-load.ll +++ b/test/Transforms/JumpThreading/lvi-load.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -jump-threading -enable-jump-threading-lvi -dce < %s | FileCheck %s +; RUN: opt -S -jump-threading -dce < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.4" diff --git a/test/Transforms/JumpThreading/select.ll b/test/Transforms/JumpThreading/select.ll new file mode 100644 index 000000000000..8a81857736a7 --- /dev/null +++ b/test/Transforms/JumpThreading/select.ll @@ -0,0 +1,123 @@ +; RUN: opt -S -jump-threading < %s | FileCheck %s + +declare void @foo() +declare void @bar() +declare void @baz() +declare void @quux() + + +; Jump threading of branch with select as condition. +; Mostly theoretical since instruction combining simplifies all selects of +; booleans where at least one operand is true/false/undef. + +; CHECK: @test_br +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L1, +define void @test_br(i1 %cond, i1 %value) nounwind { +entry: + br i1 %cond, label %L0, label %L3 +L0: + %expr = select i1 %cond, i1 true, i1 %value + br i1 %expr, label %L1, label %L2 + +L1: + call void @foo() + ret void +L2: + call void @bar() + ret void +L3: + call void @baz() + br label %L0 +} + + +; Jump threading of switch with select as condition. + +; CHECK: @test_switch +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L1, +define void @test_switch(i1 %cond, i8 %value) nounwind { +entry: + br i1 %cond, label %L0, label %L4 +L0: + %expr = select i1 %cond, i8 1, i8 %value + switch i8 %expr, label %L3 [i8 1, label %L1 i8 2, label %L2] + +L1: + call void @foo() + ret void +L2: + call void @bar() + ret void +L3: + call void @baz() + ret void +L4: + call void @quux() + br label %L0 +} + +; Make sure the blocks in the indirectbr test aren't trivially removable as +; successors by taking their addresses. +@anchor = constant [3 x i8*] [ + i8* blockaddress(@test_indirectbr, %L1), + i8* blockaddress(@test_indirectbr, %L2), + i8* blockaddress(@test_indirectbr, %L3) +] + + +; Jump threading of indirectbr with select as address. + +; CHECK: @test_indirectbr +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L1, label %L3 +define void @test_indirectbr(i1 %cond, i8* %address) nounwind { +entry: + br i1 %cond, label %L0, label %L3 +L0: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@test_indirectbr, %L1), i8* %address + indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3] + +L1: + call void @foo() + ret void +L2: + call void @bar() + ret void +L3: + call void @baz() + ret void +} + + +; A more complicated case: the condition is a select based on a comparison. + +; CHECK: @test_switch_cmp +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L0, label %[[THREADED:[A-Za-z.0-9]+]] +; CHECK: [[THREADED]]: +; CHECK-NEXT: call void @quux +; CHECK-NEXT: br label %L1 +define void @test_switch_cmp(i1 %cond, i32 %val, i8 %value) nounwind { +entry: + br i1 %cond, label %L0, label %L4 +L0: + %val.phi = phi i32 [%val, %entry], [-1, %L4] + %cmp = icmp slt i32 %val.phi, 0 + %expr = select i1 %cmp, i8 1, i8 %value + switch i8 %expr, label %L3 [i8 1, label %L1 i8 2, label %L2] + +L1: + call void @foo() + ret void +L2: + call void @bar() + ret void +L3: + call void @baz() + ret void +L4: + call void @quux() + br label %L0 +} diff --git a/test/Transforms/JumpThreading/thread-loads.ll b/test/Transforms/JumpThreading/thread-loads.ll index 96ba701046d8..cce23ea319c8 100644 --- a/test/Transforms/JumpThreading/thread-loads.ll +++ b/test/Transforms/JumpThreading/thread-loads.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -jump-threading -simplifycfg -S | grep {ret i32 1} +; RUN: opt < %s -jump-threading -S | FileCheck %s ; rdar://6402033 ; Test that we can thread through the block with the partially redundant load (%2). @@ -6,12 +6,16 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 target triple = "i386-apple-darwin7" define i32 @foo(i32* %P) nounwind { +; CHECK: foo entry: %0 = tail call i32 (...)* @f1() nounwind ; <i32> [#uses=1] %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] br i1 %1, label %bb1, label %bb bb: ; preds = %entry +; CHECK: bb1.thread: +; CHECK: store +; CHECK: br label %bb3 store i32 42, i32* %P, align 4 br label %bb1 @@ -26,6 +30,9 @@ bb2: ; preds = %bb1 ret i32 %res.0 bb3: ; preds = %bb1 +; CHECK: bb3: +; CHECK: %res.01 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ] +; CHECK: ret i32 %res.01 ret i32 %res.0 } diff --git a/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll b/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll index 5381c88aea63..7a80f8052b0d 100644 --- a/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll +++ b/test/Transforms/LCSSA/2006-06-03-IncorrectIDFPhis.ll @@ -1,6 +1,6 @@ -; RUN: opt < %s -loopsimplify -lcssa -S | \ +; RUN: opt < %s -loop-simplify -lcssa -S | \ ; RUN: grep {%%SJE.0.0.lcssa = phi .struct.SetJmpMapEntry} -; RUN: opt < %s -loopsimplify -lcssa -S | \ +; RUN: opt < %s -loop-simplify -lcssa -S | \ ; RUN: grep {%%SJE.0.0.lcssa1 = phi .struct.SetJmpMapEntry} %struct.SetJmpMapEntry = type { i8*, i32, %struct.SetJmpMapEntry* } diff --git a/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll b/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll index 4782bd17f893..4559e3101792 100644 --- a/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll +++ b/test/Transforms/LICM/2003-02-27-NestedLoopExitBlocks.ll @@ -1,6 +1,6 @@ ; Exit blocks need to be updated for all nested loops... -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @yyparse() { bb0: diff --git a/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll b/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll index 10b00bab8fd9..d4df26e67abc 100644 --- a/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll +++ b/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -licm -S | FileCheck %s +; RUN: opt < %s -basicaa -licm -S | FileCheck %s @a = external constant float* diff --git a/test/Transforms/LICM/2009-03-25-AliasSetTracker.ll b/test/Transforms/LICM/2009-03-25-AliasSetTracker.ll deleted file mode 100644 index d1fe48c2357a..000000000000 --- a/test/Transforms/LICM/2009-03-25-AliasSetTracker.ll +++ /dev/null @@ -1,39 +0,0 @@ - -; RUN: opt < %s -licm -loop-index-split -instcombine -disable-output - - %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } - %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 } -@"\01LC81" = external constant [4 x i8] ; <[4 x i8]*> [#uses=1] - -define fastcc void @hex_dump_internal(i8* %avcl, %struct.FILE* %f, i32 %level, i8* nocapture %buf, i32 %size) nounwind { -entry: - br i1 false, label %bb4, label %return - -bb4: ; preds = %bb30, %entry - br label %bb6 - -bb6: ; preds = %bb15, %bb4 - %j.0.reg2mem.0 = phi i32 [ %2, %bb15 ], [ 0, %bb4 ] ; <i32> [#uses=2] - %0 = icmp slt i32 %j.0.reg2mem.0, 0 ; <i1> [#uses=1] - br i1 %0, label %bb7, label %bb13 - -bb7: ; preds = %bb6 - br label %bb15 - -bb13: ; preds = %bb6 - %1 = tail call i32 @fwrite(i8* getelementptr ([4 x i8]* @"\01LC81", i32 0, i32 0), i32 1, i32 3, i8* null) nounwind ; <i32> [#uses=0] - br label %bb15 - -bb15: ; preds = %bb13, %bb7 - %2 = add i32 %j.0.reg2mem.0, 1 ; <i32> [#uses=2] - %3 = icmp sgt i32 %2, 15 ; <i1> [#uses=1] - br i1 %3, label %bb30, label %bb6 - -bb30: ; preds = %bb15 - br i1 false, label %bb4, label %return - -return: ; preds = %bb30, %entry - ret void -} - -declare i32 @fwrite(i8* nocapture, i32, i32, i8* nocapture) nounwind diff --git a/test/Transforms/LICM/crash.ll b/test/Transforms/LICM/crash.ll index 88be5c41ccc5..ff7fa0b19a82 100644 --- a/test/Transforms/LICM/crash.ll +++ b/test/Transforms/LICM/crash.ll @@ -59,3 +59,16 @@ for.end: ; preds = %for.cond, %entry } declare i32* @test3helper(i32*) + + +; PR8602 +@g_47 = external global i32, align 4 + +define void @test4() noreturn nounwind { + br label %1 + +; <label>:1 ; preds = %1, %0 + volatile store i32* @g_47, i32** undef, align 8 + store i32 undef, i32* @g_47, align 4 + br label %1 +} diff --git a/test/Transforms/LICM/scalar_promote.ll b/test/Transforms/LICM/scalar_promote.ll index c1d2b24b0bba..d8acdc1a3ad7 100644 --- a/test/Transforms/LICM/scalar_promote.ll +++ b/test/Transforms/LICM/scalar_promote.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -licm -S | FileCheck %s +; RUN: opt < %s -basicaa -licm -S | FileCheck %s target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" @X = global i32 7 ; <i32*> [#uses=4] @@ -118,3 +118,33 @@ exit: ret void } +define void @test5(i32 %i, i32** noalias %P2) { +Entry: + br label %Loop +; CHECK: @test5 +; CHECK: Entry: +; CHECK-NEXT: load i32* @X +; CHECK-NEXT: br label %Loop + + +Loop: ; preds = %Loop, %0 + %j = phi i32 [ 0, %Entry ], [ %Next, %Loop ] ; <i32> [#uses=1] + %x = load i32* @X ; <i32> [#uses=1] + %x2 = add i32 %x, 1 ; <i32> [#uses=1] + store i32 %x2, i32* @X + + volatile store i32* @X, i32** %P2 + + %Next = add i32 %j, 1 ; <i32> [#uses=2] + %cond = icmp eq i32 %Next, 0 ; <i1> [#uses=1] + br i1 %cond, label %Out, label %Loop + +Out: + ret void +; CHECK: Out: +; CHECK-NEXT: store i32 %x2, i32* @X +; CHECK-NEXT: ret void + +} + + diff --git a/test/Transforms/LoopIdiom/basic.ll b/test/Transforms/LoopIdiom/basic.ll new file mode 100644 index 000000000000..485114c8d480 --- /dev/null +++ b/test/Transforms/LoopIdiom/basic.ll @@ -0,0 +1,349 @@ +; RUN: opt -basicaa -loop-idiom < %s -S | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +define void @test1(i8* %Base, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + store i8 0, i8* %I.0.014, align 1 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test1 +; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 %Size, i32 1, i1 false) +; CHECK-NOT: store +} + +; This is a loop that was rotated but where the blocks weren't merged. This +; shouldn't perturb us. +define void @test1a(i8* %Base, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body.cont ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + store i8 0, i8* %I.0.014, align 1 + %indvar.next = add i64 %indvar, 1 + br label %for.body.cont +for.body.cont: + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test1a +; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 %Size, i32 1, i1 false) +; CHECK-NOT: store +} + + +define void @test2(i32* %Base, i64 %Size) nounwind ssp { +entry: + %cmp10 = icmp eq i64 %Size, 0 + br i1 %cmp10, label %for.end, label %for.body + +for.body: ; preds = %entry, %for.body + %i.011 = phi i64 [ %inc, %for.body ], [ 0, %entry ] + %add.ptr.i = getelementptr i32* %Base, i64 %i.011 + store i32 16843009, i32* %add.ptr.i, align 4 + %inc = add nsw i64 %i.011, 1 + %exitcond = icmp eq i64 %inc, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test2 +; CHECK: br i1 %cmp10, +; CHECK: %tmp = mul i64 %Size, 4 +; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base1, i8 1, i64 %tmp, i32 4, i1 false) +; CHECK-NOT: store +} + +; This is a case where there is an extra may-aliased store in the loop, we can't +; promote the memset. +define void @test3(i32* %Base, i64 %Size, i8 *%MayAlias) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %i.011 = phi i64 [ %inc, %for.body ], [ 0, %entry ] + %add.ptr.i = getelementptr i32* %Base, i64 %i.011 + store i32 16843009, i32* %add.ptr.i, align 4 + + store i8 42, i8* %MayAlias + %inc = add nsw i64 %i.011, 1 + %exitcond = icmp eq i64 %inc, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %entry + ret void +; CHECK: @test3 +; CHECK-NOT: memset +; CHECK: ret void +} + + +;; TODO: We should be able to promote this memset. Not yet though. +define void @test4(i8* %Base) nounwind ssp { +bb.nph: ; preds = %entry + %Base100 = getelementptr i8* %Base, i64 1000 + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + store i8 0, i8* %I.0.014, align 1 + + ;; Store beyond the range memset, should be safe to promote. + store i8 42, i8* %Base100 + + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 100 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK-TODO: @test4 +; CHECK-TODO: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 100, i32 1, i1 false) +; CHECK-TODO-NOT: store +} + +; This can't be promoted: the memset is a store of a loop variant value. +define void @test5(i8* %Base, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + + %V = trunc i64 %indvar to i8 + store i8 %V, i8* %I.0.014, align 1 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test5 +; CHECK-NOT: memset +; CHECK: ret void +} + + +;; memcpy formation +define void @test6(i64 %Size) nounwind ssp { +bb.nph: + %Base = alloca i8, i32 10000 + %Dest = alloca i8, i32 10000 + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + %DestI = getelementptr i8* %Dest, i64 %indvar + %V = load i8* %I.0.014, align 1 + store i8 %V, i8* %DestI, align 1 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test6 +; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %Dest, i8* %Base, i64 %Size, i32 1, i1 false) +; CHECK-NOT: store +; CHECK: ret void +} + + +; This is a loop that was rotated but where the blocks weren't merged. This +; shouldn't perturb us. +define void @test7(i8* %Base, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body.cont ] + br label %for.body.cont +for.body.cont: + %I.0.014 = getelementptr i8* %Base, i64 %indvar + store i8 0, i8* %I.0.014, align 1 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test7 +; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 %Size, i32 1, i1 false) +; CHECK-NOT: store +} + +; This is a loop should not be transformed, it only executes one iteration. +define void @test8(i64* %Ptr, i64 %Size) nounwind ssp { +bb.nph: ; preds = %entry + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %PI = getelementptr i64* %Ptr, i64 %indvar + store i64 0, i64 *%PI + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 1 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test8 +; CHECK: store i64 0, i64* %PI +} + +declare i8* @external(i8*) + +;; This cannot be transformed into a memcpy, because the read-from location is +;; mutated by the loop. +define void @test9(i64 %Size) nounwind ssp { +bb.nph: + %Base = alloca i8, i32 10000 + %Dest = alloca i8, i32 10000 + + %BaseAlias = call i8* @external(i8* %Base) + br label %for.body + +for.body: ; preds = %bb.nph, %for.body + %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.body ] + %I.0.014 = getelementptr i8* %Base, i64 %indvar + %DestI = getelementptr i8* %Dest, i64 %indvar + %V = load i8* %I.0.014, align 1 + store i8 %V, i8* %DestI, align 1 + + ;; This store can clobber the input. + store i8 4, i8* %BaseAlias + + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, %Size + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +; CHECK: @test9 +; CHECK-NOT: llvm.memcpy +; CHECK: ret void +} + +; Two dimensional nested loop should be promoted to one big memset. +define void @test10(i8* %X) nounwind ssp { +entry: + br label %bb.nph + +bb.nph: ; preds = %entry, %for.inc10 + %i.04 = phi i32 [ 0, %entry ], [ %inc12, %for.inc10 ] + br label %for.body5 + +for.body5: ; preds = %for.body5, %bb.nph + %j.02 = phi i32 [ 0, %bb.nph ], [ %inc, %for.body5 ] + %mul = mul nsw i32 %i.04, 100 + %add = add nsw i32 %j.02, %mul + %idxprom = sext i32 %add to i64 + %arrayidx = getelementptr inbounds i8* %X, i64 %idxprom + store i8 0, i8* %arrayidx, align 1 + %inc = add nsw i32 %j.02, 1 + %cmp4 = icmp eq i32 %inc, 100 + br i1 %cmp4, label %for.inc10, label %for.body5 + +for.inc10: ; preds = %for.body5 + %inc12 = add nsw i32 %i.04, 1 + %cmp = icmp eq i32 %inc12, 100 + br i1 %cmp, label %for.end13, label %bb.nph + +for.end13: ; preds = %for.inc10 + ret void +; CHECK: @test10 +; CHECK: entry: +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* %X, i8 0, i64 10000, i32 1, i1 false) +; CHECK-NOT: store +; CHECK: ret void +} + +; On darwin10 (which is the triple in this .ll file) this loop can be turned +; into a memset_pattern call. +; rdar://9009151 +define void @test11_pattern(i32* nocapture %P) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.body ] + %arrayidx = getelementptr i32* %P, i64 %indvar + store i32 1, i32* %arrayidx, align 4 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 10000 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +; CHECK: @test11_pattern +; CHECK-NEXT: entry: +; CHECK-NEXT: bitcast +; CHECK-NEXT: memset_pattern +; CHECK-NOT: store +; CHECK: ret void +} + +; Store of null should turn into memset of zero. +define void @test12(i32** nocapture %P) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.body ] + %arrayidx = getelementptr i32** %P, i64 %indvar + store i32* null, i32** %arrayidx, align 4 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 10000 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +; CHECK: @test12 +; CHECK-NEXT: entry: +; CHECK-NEXT: bitcast +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* %P1, i8 0, i64 80000, i32 4, i1 false) +; CHECK-NOT: store +; CHECK: ret void +} + +@G = global i32 5 + +; This store-of-address loop can be turned into a memset_pattern call. +; rdar://9009151 +define void @test13_pattern(i32** nocapture %P) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %for.body ] + %arrayidx = getelementptr i32** %P, i64 %indvar + store i32* @G, i32** %arrayidx, align 4 + %indvar.next = add i64 %indvar, 1 + %exitcond = icmp eq i64 %indvar.next, 10000 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +; CHECK: @test13_pattern +; CHECK-NEXT: entry: +; CHECK-NEXT: bitcast +; CHECK-NEXT: memset_pattern +; CHECK-NOT: store +; CHECK: ret void +} diff --git a/test/Transforms/PartialSpecialize/dg.exp b/test/Transforms/LoopIdiom/dg.exp index f2005891a59a..f2005891a59a 100644 --- a/test/Transforms/PartialSpecialize/dg.exp +++ b/test/Transforms/LoopIdiom/dg.exp diff --git a/test/Transforms/LoopIndexSplit/2007-09-21-LoopBound.ll b/test/Transforms/LoopIndexSplit/2007-09-21-LoopBound.ll deleted file mode 100644 index d922ecbd4f5f..000000000000 --- a/test/Transforms/LoopIndexSplit/2007-09-21-LoopBound.ll +++ /dev/null @@ -1,63 +0,0 @@ -; PR1692 -; RUN: opt < %s -loop-index-split -disable-output - %struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_NODE*, %struct.LIST_NODE*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 } - %struct.LIST_NODE = type { %struct.LIST_NODE*, i8* } - %struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* } - %struct.anon = type { %struct.LIST_NODE* } - %struct.st = type { %struct.subst*, %struct.LIST_NODE*, %struct.LIST_NODE*, i16, i16 } - %struct.subst = type { %struct.subst*, i32, %struct.term* } - %struct.term = type { i32, %struct.anon, %struct.LIST_NODE*, i32, i32 } - -define %struct.LIST_NODE* @inf_HyperResolvents(%struct.CLAUSE_HELP* %Clause, %struct.subst* %Subst, %struct.LIST_NODE* %Restlits, i32 %GlobalMaxVar, %struct.LIST_NODE* %FoundMap, i32 %StrictlyMaximal, { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }* %Index, i32* %Flags, i32* %Precedence) { -entry: - br i1 false, label %cond_next44, label %bb37 - -bb37: ; preds = %entry - ret %struct.LIST_NODE* null - -cond_next44: ; preds = %entry - br i1 false, label %bb29.i, label %bb.i31 - -bb.i31: ; preds = %cond_next44 - ret %struct.LIST_NODE* null - -bb29.i: ; preds = %cond_next44 - br i1 false, label %cond_next89.i, label %bb34.i - -bb34.i: ; preds = %bb29.i - ret %struct.LIST_NODE* null - -cond_next89.i: ; preds = %bb29.i - br i1 false, label %clause_LiteralGetIndex.exit70.i, label %bb.i59.i - -bb.i59.i: ; preds = %cond_next89.i - ret %struct.LIST_NODE* null - -clause_LiteralGetIndex.exit70.i: ; preds = %cond_next89.i - br label %bb3.i.i - -bb3.i.i: ; preds = %bb3.i.i, %clause_LiteralGetIndex.exit70.i - br i1 false, label %bb40.i.i, label %bb3.i.i - -subst_Apply.exit.i.i: ; preds = %bb40.i.i - %tmp21.i.i = icmp sgt i32 %j.0.i.i, 0 ; <i1> [#uses=1] - br i1 %tmp21.i.i, label %cond_false.i47.i, label %cond_true24.i.i - -cond_true24.i.i: ; preds = %subst_Apply.exit.i.i - br label %cond_next37.i.i - -cond_false.i47.i: ; preds = %subst_Apply.exit.i.i - br label %cond_next37.i.i - -cond_next37.i.i: ; preds = %cond_false.i47.i, %cond_true24.i.i - %tmp39.i.i = add i32 %j.0.i.i, 1 ; <i32> [#uses=1] - br label %bb40.i.i - -bb40.i.i: ; preds = %cond_next37.i.i, %bb3.i.i - %j.0.i.i = phi i32 [ %tmp39.i.i, %cond_next37.i.i ], [ 0, %bb3.i.i ] ; <i32> [#uses=3] - %tmp43.i.i = icmp sgt i32 %j.0.i.i, 0 ; <i1> [#uses=1] - br i1 %tmp43.i.i, label %inf_CopyHyperElectron.exit.i, label %subst_Apply.exit.i.i - -inf_CopyHyperElectron.exit.i: ; preds = %bb40.i.i - ret %struct.LIST_NODE* null -} diff --git a/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll b/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll deleted file mode 100644 index 3ebd9b3401f5..000000000000 --- a/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll +++ /dev/null @@ -1,57 +0,0 @@ - -; Update loop iteraton space to eliminate condition inside loop. -; RUN: opt < %s -loop-index-split -S | not grep bothcond -define void @test(float* %x, i32 %ndat, float** %y, float %xcen, i32 %xmin, i32 %xmax, float %sigmal, float %contribution) { -entry: - %tmp519 = icmp sgt i32 %xmin, %xmax ; <i1> [#uses=1] - br i1 %tmp519, label %return, label %bb.preheader - -bb.preheader: ; preds = %entry - %tmp3031 = fpext float %contribution to double ; <double> [#uses=1] - %tmp32 = fmul double %tmp3031, 5.000000e-01 ; <double> [#uses=1] - %tmp3839 = fpext float %sigmal to double ; <double> [#uses=1] - br label %bb - -bb: ; preds = %bb.preheader, %cond_next45 - %i.01.0 = phi i32 [ %tmp47, %cond_next45 ], [ 0, %bb.preheader ] ; <i32> [#uses=6] - %tmp2 = icmp sgt i32 %i.01.0, -1 ; <i1> [#uses=1] - %tmp6 = icmp slt i32 %i.01.0, %ndat ; <i1> [#uses=1] - %bothcond = and i1 %tmp2, %tmp6 ; <i1> [#uses=1] - br i1 %bothcond, label %cond_true9, label %cond_next45 - -cond_true9: ; preds = %bb - %tmp12 = getelementptr float* %x, i32 %i.01.0 ; <float*> [#uses=1] - %tmp13 = load float* %tmp12, align 4 ; <float> [#uses=1] - %tmp15 = fsub float %xcen, %tmp13 ; <float> [#uses=1] - %tmp16 = tail call float @fabsf( float %tmp15 ) ; <float> [#uses=1] - %tmp18 = fdiv float %tmp16, %sigmal ; <float> [#uses=1] - %tmp21 = load float** %y, align 4 ; <float*> [#uses=2] - %tmp27 = getelementptr float* %tmp21, i32 %i.01.0 ; <float*> [#uses=1] - %tmp28 = load float* %tmp27, align 4 ; <float> [#uses=1] - %tmp2829 = fpext float %tmp28 to double ; <double> [#uses=1] - %tmp34 = fsub float -0.000000e+00, %tmp18 ; <float> [#uses=1] - %tmp3435 = fpext float %tmp34 to double ; <double> [#uses=1] - %tmp36 = tail call double @exp( double %tmp3435 ) ; <double> [#uses=1] - %tmp37 = fmul double %tmp32, %tmp36 ; <double> [#uses=1] - %tmp40 = fdiv double %tmp37, %tmp3839 ; <double> [#uses=1] - %tmp41 = fadd double %tmp2829, %tmp40 ; <double> [#uses=1] - %tmp4142 = fptrunc double %tmp41 to float ; <float> [#uses=1] - %tmp44 = getelementptr float* %tmp21, i32 %i.01.0 ; <float*> [#uses=1] - store float %tmp4142, float* %tmp44, align 4 - br label %cond_next45 - -cond_next45: ; preds = %bb, %cond_true9 - %tmp47 = add i32 %i.01.0, 1 ; <i32> [#uses=2] - %tmp51 = icmp sgt i32 %tmp47, %xmax ; <i1> [#uses=1] - br i1 %tmp51, label %return.loopexit, label %bb - -return.loopexit: ; preds = %cond_next45 - br label %return - -return: ; preds = %return.loopexit, %entry - ret void -} - -declare float @fabsf(float) - -declare double @exp(double) diff --git a/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll b/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll deleted file mode 100644 index 8f4ee24c1233..000000000000 --- a/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll +++ /dev/null @@ -1,60 +0,0 @@ -; PR714 -; Update loop iteraton space to eliminate condition inside loop. -; RUN: opt < %s -loop-index-split -S | not grep bothcond - -define void @test(float* %x, i32 %ndat, float** %y, float %xcen, i32 %xmin, i32 %xmax, float %sigmal, float %contribution) { -entry: - %tmp5310 = icmp sgt i32 %xmin, %xmax ; <i1> [#uses=1] - br i1 %tmp5310, label %return, label %bb.preheader - -bb.preheader: ; preds = %entry - %tmp3031 = fpext float %contribution to double ; <double> [#uses=1] - %tmp32 = fmul double %tmp3031, 5.000000e-01 ; <double> [#uses=1] - %tmp3839 = fpext float %sigmal to double ; <double> [#uses=1] - br label %bb - -bb: ; preds = %cond_next45, %bb.preheader - %k.06.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %cond_next45 ] ; <i32> [#uses=4] - %i.01.0 = add i32 %k.06.0, %xmin ; <i32> [#uses=4] - %tmp2 = icmp sgt i32 %i.01.0, -1 ; <i1> [#uses=1] - %tmp6 = icmp slt i32 %i.01.0, %ndat ; <i1> [#uses=1] - %bothcond = and i1 %tmp2, %tmp6 ; <i1> [#uses=1] - br i1 %bothcond, label %cond_true9, label %cond_next45 - -cond_true9: ; preds = %bb - %tmp12 = getelementptr float* %x, i32 %i.01.0 ; <float*> [#uses=1] - %tmp13 = load float* %tmp12, align 4 ; <float> [#uses=1] - %tmp15 = fsub float %xcen, %tmp13 ; <float> [#uses=1] - %tmp16 = tail call float @fabsf(float %tmp15) ; <float> [#uses=1] - %tmp18 = fdiv float %tmp16, %sigmal ; <float> [#uses=1] - %tmp21 = load float** %y, align 4 ; <float*> [#uses=2] - %tmp27 = getelementptr float* %tmp21, i32 %k.06.0 ; <float*> [#uses=1] - %tmp28 = load float* %tmp27, align 4 ; <float> [#uses=1] - %tmp2829 = fpext float %tmp28 to double ; <double> [#uses=1] - %tmp34 = fsub float -0.000000e+00, %tmp18 ; <float> [#uses=1] - %tmp3435 = fpext float %tmp34 to double ; <double> [#uses=1] - %tmp36 = tail call double @exp(double %tmp3435) ; <double> [#uses=1] - %tmp37 = fmul double %tmp32, %tmp36 ; <double> [#uses=1] - %tmp40 = fdiv double %tmp37, %tmp3839 ; <double> [#uses=1] - %tmp41 = fadd double %tmp2829, %tmp40 ; <double> [#uses=1] - %tmp4142 = fptrunc double %tmp41 to float ; <float> [#uses=1] - %tmp44 = getelementptr float* %tmp21, i32 %k.06.0 ; <float*> [#uses=1] - store float %tmp4142, float* %tmp44, align 4 - br label %cond_next45 - -cond_next45: ; preds = %cond_true9, %bb - %tmp47 = add i32 %i.01.0, 1 ; <i32> [#uses=1] - %tmp53 = icmp sgt i32 %tmp47, %xmax ; <i1> [#uses=1] - %indvar.next = add i32 %k.06.0, 1 ; <i32> [#uses=1] - br i1 %tmp53, label %return.loopexit, label %bb - -return.loopexit: ; preds = %cond_next45 - br label %return - -return: ; preds = %return.loopexit, %entry - ret void -} - -declare float @fabsf(float) - -declare double @exp(double) diff --git a/test/Transforms/LoopIndexSplit/2008-01-28-IndDecrement.ll b/test/Transforms/LoopIndexSplit/2008-01-28-IndDecrement.ll deleted file mode 100644 index 1550bc7abb5d..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-01-28-IndDecrement.ll +++ /dev/null @@ -1,46 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output -stats |& \ -; RUN: not grep "loop-index-split" - -; Induction variable decrement is not yet handled. -; pr1912.bc -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i686-apple-darwin9" - %struct.cset = type { i8*, i8, i8, i32, i8* } - %struct.parse = type { i8*, i8*, i32, i32*, i32, i32, i32, %struct.re_guts*, [10 x i32], [10 x i32] } - %struct.re_guts = type { i32, i32*, i32, i32, %struct.cset*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, [1 x i8] } - -define fastcc void @p_bracket(%struct.parse* %p) { -entry: - br i1 false, label %bb160, label %bb195 - -bb160: ; preds = %entry - br i1 false, label %bb.i169, label %bb9.i - -bb195: ; preds = %entry - ret void - -bb.i169: ; preds = %bb160 - br i1 false, label %bb372, label %bb565 - -bb9.i: ; preds = %bb160 - ret void - -bb372: ; preds = %bb418, %bb.i169 - %i1.0.reg2mem.0 = phi i32 [ %i1.0, %bb418 ], [ 0, %bb.i169 ] ; <i32> [#uses=2] - %tmp3.i.i.i170 = icmp ult i32 %i1.0.reg2mem.0, 128 ; <i1> [#uses=1] - br i1 %tmp3.i.i.i170, label %bb.i.i173, label %bb13.i.i - -bb.i.i173: ; preds = %bb372 - br label %bb418 - -bb13.i.i: ; preds = %bb372 - br label %bb418 - -bb418: ; preds = %bb13.i.i, %bb.i.i173 - %i1.0 = add i32 %i1.0.reg2mem.0, -1 ; <i32> [#uses=2] - %tmp420 = icmp sgt i32 %i1.0, -1 ; <i1> [#uses=1] - br i1 %tmp420, label %bb372, label %bb565 - -bb565: ; preds = %bb418, %bb.i169 - ret void -} diff --git a/test/Transforms/LoopIndexSplit/2008-02-08-Crash.ll b/test/Transforms/LoopIndexSplit/2008-02-08-Crash.ll deleted file mode 100644 index 3cfd6c96b7b2..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-02-08-Crash.ll +++ /dev/null @@ -1,48 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output -; PR 1995 - -define void @add_blkdev_randomness(i32 %major) nounwind { -entry: - br label %bb - -bb: ; preds = %bb39, %entry - %A.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %TEMP.0, %bb39 ] ; <i32> [#uses=1] - %D.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %C.0.reg2mem.0, %bb39 ] ; <i32> [#uses=3] - %C.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %tmp34, %bb39 ] ; <i32> [#uses=4] - %TEMP.1.reg2mem.0 = phi i32 [ undef, %entry ], [ %TEMP.0, %bb39 ] ; <i32> [#uses=1] - %i.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp38, %bb39 ] ; <i32> [#uses=3] - %B.0.reg2mem.0 = phi i32 [ undef, %entry ], [ %A.0.reg2mem.0, %bb39 ] ; <i32> [#uses=5] - %tmp1 = icmp slt i32 %i.0.reg2mem.0, 40 ; <i1> [#uses=1] - br i1 %tmp1, label %bb3, label %bb12 - -bb3: ; preds = %bb - %tmp6 = xor i32 %C.0.reg2mem.0, %D.0.reg2mem.0 ; <i32> [#uses=1] - %tmp8 = and i32 %B.0.reg2mem.0, %tmp6 ; <i32> [#uses=1] - %tmp10 = xor i32 %tmp8, %D.0.reg2mem.0 ; <i32> [#uses=1] - %tmp11 = add i32 %tmp10, 1518500249 ; <i32> [#uses=1] - br label %bb39 - -bb12: ; preds = %bb - %tmp14 = icmp slt i32 %i.0.reg2mem.0, 60 ; <i1> [#uses=1] - br i1 %tmp14, label %bb17, label %bb39 - -bb17: ; preds = %bb12 - %tmp20 = and i32 %B.0.reg2mem.0, %C.0.reg2mem.0 ; <i32> [#uses=1] - %tmp23 = xor i32 %B.0.reg2mem.0, %C.0.reg2mem.0 ; <i32> [#uses=1] - %tmp25 = and i32 %tmp23, %D.0.reg2mem.0 ; <i32> [#uses=1] - %tmp26 = add i32 %tmp20, -1894007588 ; <i32> [#uses=1] - %tmp27 = add i32 %tmp26, %tmp25 ; <i32> [#uses=1] - br label %bb39 - -bb39: ; preds = %bb12, %bb3, %bb17 - %TEMP.0 = phi i32 [ %tmp27, %bb17 ], [ %tmp11, %bb3 ], [ %TEMP.1.reg2mem.0, %bb12 ] ; <i32> [#uses=2] - %tmp31 = lshr i32 %B.0.reg2mem.0, 2 ; <i32> [#uses=1] - %tmp33 = shl i32 %B.0.reg2mem.0, 30 ; <i32> [#uses=1] - %tmp34 = or i32 %tmp31, %tmp33 ; <i32> [#uses=1] - %tmp38 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2] - %tmp41 = icmp slt i32 %tmp38, 80 ; <i1> [#uses=1] - br i1 %tmp41, label %bb, label %return - -return: ; preds = %bb39 - ret void -} diff --git a/test/Transforms/LoopIndexSplit/2008-02-13-ExitValueNum.ll b/test/Transforms/LoopIndexSplit/2008-02-13-ExitValueNum.ll deleted file mode 100644 index 980a42f20aa9..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-02-13-ExitValueNum.ll +++ /dev/null @@ -1,67 +0,0 @@ -; RUN: opt < %s -disable-output -loop-index-split -; PR 2011 - %struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_NODE*, %struct.LIST_NODE*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 } - %struct.LIST_NODE = type { %struct.LIST_NODE*, i8* } - %struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* } - %struct.anon = type { %struct.LIST_NODE* } - %struct.st = type { %struct.subst*, %struct.LIST_NODE*, %struct.LIST_NODE*, i16, i16 } - %struct.subst = type { %struct.subst*, i32, %struct.term* } - %struct.term = type { i32, %struct.anon, %struct.LIST_NODE*, i32, i32 } - -define fastcc %struct.LIST_NODE* @inf_HyperResolvents(%struct.CLAUSE_HELP* %Clause, %struct.subst* %Subst, %struct.LIST_NODE* %Restlits, i32 %GlobalMaxVar, %struct.LIST_NODE* %FoundMap, i32 %StrictlyMaximal, { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }* %Index, i32* %Flags, i32* %Precedence) nounwind { -entry: - br i1 false, label %bb960, label %bb885 - -bb885: ; preds = %entry - ret %struct.LIST_NODE* null - -bb960: ; preds = %entry - br i1 false, label %bb1097, label %bb1005.preheader - -bb1005.preheader: ; preds = %bb960 - ret %struct.LIST_NODE* null - -bb1097: ; preds = %bb960 - br i1 false, label %bb1269.preheader, label %bb1141.preheader - -bb1141.preheader: ; preds = %bb1097 - ret %struct.LIST_NODE* null - -bb1269.preheader: ; preds = %bb1097 - br i1 false, label %bb1318, label %bb1281 - -bb1281: ; preds = %bb1269.preheader - ret %struct.LIST_NODE* null - -bb1318: ; preds = %bb1269.preheader - br i1 false, label %bb1459, label %bb.nph52 - -bb.nph52: ; preds = %bb1318 - ret %struct.LIST_NODE* null - -bb1459: ; preds = %bb1318 - br i1 false, label %bb1553, label %bb.nph62 - -bb.nph62: ; preds = %bb1459 - ret %struct.LIST_NODE* null - -bb1553: ; preds = %bb1669, %bb1459 - %j295.0.reg2mem.0 = phi i32 [ %storemerge110, %bb1669 ], [ 0, %bb1459 ] ; <i32> [#uses=2] - %tmp1629 = icmp sgt i32 %j295.0.reg2mem.0, 0 ; <i1> [#uses=1] - br i1 %tmp1629, label %bb1649, label %bb1632 - -bb1632: ; preds = %bb1553 - br label %bb1669 - -bb1649: ; preds = %bb1553 - br label %bb1669 - -bb1669: ; preds = %bb1649, %bb1632 - %storemerge110 = add i32 %j295.0.reg2mem.0, 1 ; <i32> [#uses=2] - %tmp1672 = icmp sgt i32 %storemerge110, 0 ; <i1> [#uses=1] - br i1 %tmp1672, label %bb1678, label %bb1553 - -bb1678: ; preds = %bb1669 - ret %struct.LIST_NODE* null -} - diff --git a/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatch.ll b/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatch.ll deleted file mode 100644 index 9351cafcf646..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatch.ll +++ /dev/null @@ -1,72 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output -; PR 2011 - %struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_NODE*, %struct.LIST_NODE*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 } - %struct.LIST_NODE = type { %struct.LIST_NODE*, i8* } - %struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* } - %struct.anon = type { %struct.LIST_NODE* } - %struct.st = type { %struct.subst*, %struct.LIST_NODE*, %struct.LIST_NODE*, i16, i16 } - %struct.subst = type { %struct.subst*, i32, %struct.term* } - %struct.term = type { i32, %struct.anon, %struct.LIST_NODE*, i32, i32 } - -define fastcc %struct.LIST_NODE* @inf_HyperResolvents(%struct.CLAUSE_HELP* %Clause, %struct.subst* %Subst, %struct.LIST_NODE* %Restlits, i32 %GlobalMaxVar, %struct.LIST_NODE* %FoundMap, i32 %StrictlyMaximal, { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }* %Index, i32* %Flags, i32* %Precedence) nounwind { -entry: - br i1 false, label %bb960, label %bb885 - -bb885: ; preds = %entry - ret %struct.LIST_NODE* null - -bb960: ; preds = %entry - br i1 false, label %bb1097, label %bb1005.preheader - -bb1005.preheader: ; preds = %bb960 - ret %struct.LIST_NODE* null - -bb1097: ; preds = %bb960 - br i1 false, label %bb1269.preheader, label %bb1141.preheader - -bb1141.preheader: ; preds = %bb1097 - ret %struct.LIST_NODE* null - -bb1269.preheader: ; preds = %bb1097 - br i1 false, label %bb1318, label %bb1281 - -bb1281: ; preds = %bb1269.preheader - ret %struct.LIST_NODE* null - -bb1318: ; preds = %bb1269.preheader - br i1 false, label %bb1459, label %bb.nph52 - -bb.nph52: ; preds = %bb1318 - ret %struct.LIST_NODE* null - -bb1459: ; preds = %bb1318 - br i1 false, label %bb1553, label %bb.nph62 - -bb.nph62: ; preds = %bb1459 - ret %struct.LIST_NODE* null - -bb1553: ; preds = %bb1669, %bb1459 - %j295.0.reg2mem.0 = phi i32 [ %storemerge110, %bb1669 ], [ 0, %bb1459 ] ; <i32> [#uses=2] - br i1 false, label %bb1588, label %bb1616 - -bb1588: ; preds = %bb1553 - br label %bb1616 - -bb1616: ; preds = %bb1588, %bb1553 - %tmp1629 = icmp sgt i32 %j295.0.reg2mem.0, 0 ; <i1> [#uses=1] - br i1 %tmp1629, label %bb1649, label %bb1632 - -bb1632: ; preds = %bb1616 - br label %bb1669 - -bb1649: ; preds = %bb1616 - br label %bb1669 - -bb1669: ; preds = %bb1649, %bb1632 - %storemerge110 = add i32 %j295.0.reg2mem.0, 1 ; <i32> [#uses=2] - %tmp1672 = icmp sgt i32 %storemerge110, 0 ; <i1> [#uses=1] - br i1 %tmp1672, label %bb1678, label %bb1553 - -bb1678: ; preds = %bb1669 - ret %struct.LIST_NODE* null -} diff --git a/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatchPHI.ll b/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatchPHI.ll deleted file mode 100644 index 6d6defa85de0..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-02-13-LoopLatchPHI.ll +++ /dev/null @@ -1,74 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output -; PR 2011 - %struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_NODE*, %struct.LIST_NODE*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 } - %struct.LIST_NODE = type { %struct.LIST_NODE*, i8* } - %struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* } - %struct.anon = type { %struct.LIST_NODE* } - %struct.st = type { %struct.subst*, %struct.LIST_NODE*, %struct.LIST_NODE*, i16, i16 } - %struct.subst = type { %struct.subst*, i32, %struct.term* } - %struct.term = type { i32, %struct.anon, %struct.LIST_NODE*, i32, i32 } - -define fastcc %struct.LIST_NODE* @inf_HyperResolvents(%struct.CLAUSE_HELP* %Clause, %struct.subst* %Subst, %struct.LIST_NODE* %Restlits, i32 %GlobalMaxVar, %struct.LIST_NODE* %FoundMap, i32 %StrictlyMaximal, { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }* %Index, i32* %Flags, i32* %Precedence) nounwind { -entry: - br i1 false, label %bb960, label %bb885 - -bb885: ; preds = %entry - ret %struct.LIST_NODE* null - -bb960: ; preds = %entry - br i1 false, label %bb1097, label %bb1005.preheader - -bb1005.preheader: ; preds = %bb960 - ret %struct.LIST_NODE* null - -bb1097: ; preds = %bb960 - br i1 false, label %bb1269.preheader, label %bb1141.preheader - -bb1141.preheader: ; preds = %bb1097 - ret %struct.LIST_NODE* null - -bb1269.preheader: ; preds = %bb1097 - br i1 false, label %bb1318, label %bb1281 - -bb1281: ; preds = %bb1269.preheader - ret %struct.LIST_NODE* null - -bb1318: ; preds = %bb1269.preheader - br i1 false, label %bb1459, label %bb.nph52 - -bb.nph52: ; preds = %bb1318 - ret %struct.LIST_NODE* null - -bb1459: ; preds = %bb1318 - br i1 false, label %bb1553, label %bb.nph62 - -bb.nph62: ; preds = %bb1459 - ret %struct.LIST_NODE* null - -bb1553: ; preds = %bb1669, %bb1459 - %j295.0.reg2mem.0 = phi i32 [ %storemerge110, %bb1669 ], [ 0, %bb1459 ] ; <i32> [#uses=2] - %Constraint403.2.reg2mem.0 = phi %struct.LIST_NODE* [ %Constraint403.1.reg2mem.0, %bb1669 ], [ null, %bb1459 ] ; <%struct.LIST_NODE*> [#uses=1] - br i1 false, label %bb1588, label %bb1616 - -bb1588: ; preds = %bb1553 - br label %bb1616 - -bb1616: ; preds = %bb1588, %bb1553 - %tmp1629 = icmp sgt i32 %j295.0.reg2mem.0, 0 ; <i1> [#uses=1] - br i1 %tmp1629, label %bb1649, label %bb1632 - -bb1632: ; preds = %bb1616 - br label %bb1669 - -bb1649: ; preds = %bb1616 - br label %bb1669 - -bb1669: ; preds = %bb1649, %bb1632 - %Constraint403.1.reg2mem.0 = phi %struct.LIST_NODE* [ null, %bb1632 ], [ %Constraint403.2.reg2mem.0, %bb1649 ] ; <%struct.LIST_NODE*> [#uses=1] - %storemerge110 = add i32 %j295.0.reg2mem.0, 1 ; <i32> [#uses=2] - %tmp1672 = icmp sgt i32 %storemerge110, 0 ; <i1> [#uses=1] - br i1 %tmp1672, label %bb1678, label %bb1553 - -bb1678: ; preds = %bb1669 - ret %struct.LIST_NODE* null -} diff --git a/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll b/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll deleted file mode 100644 index f1a03e2f18a9..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll +++ /dev/null @@ -1,464 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output -; PR 2030 - %struct.FULL = type { i32, i32, [1000 x float*] } - -define i32 @matgen(%struct.FULL* %a, float** %x, float** %b, float** %bt, i32** %ipvt, i32 %test_case, i32 %scale) { -entry: - br i1 false, label %bb, label %entry.bb30_crit_edge - -entry.bb30_crit_edge: ; preds = %entry - br label %bb30 - -bb: ; preds = %entry - br label %bb14 - -bb6: ; preds = %bb14 - br label %bb14 - -bb14: ; preds = %bb6, %bb - br i1 false, label %bb6, label %bb22 - -bb22: ; preds = %bb14 - br label %bb30 - -bb30: ; preds = %bb22, %entry.bb30_crit_edge - switch i32 %test_case, label %bb648 [ - i32 1, label %bb30.bb32_crit_edge - i32 2, label %bb30.bb32_crit_edge1 - i32 3, label %bb30.bb32_crit_edge2 - i32 4, label %bb30.bb108_crit_edge - i32 5, label %bb30.bb108_crit_edge3 - i32 6, label %bb30.bb142_crit_edge - i32 7, label %bb30.bb142_crit_edge4 - i32 8, label %bb30.bb142_crit_edge5 - i32 9, label %bb234 - i32 10, label %bb292 - i32 11, label %bb353 - i32 12, label %bb419 - i32 13, label %bb485 - i32 14, label %bb567 - ] - -bb30.bb142_crit_edge5: ; preds = %bb30 - br label %bb142 - -bb30.bb142_crit_edge4: ; preds = %bb30 - br label %bb142 - -bb30.bb142_crit_edge: ; preds = %bb30 - br label %bb142 - -bb30.bb108_crit_edge3: ; preds = %bb30 - br label %bb108 - -bb30.bb108_crit_edge: ; preds = %bb30 - br label %bb108 - -bb30.bb32_crit_edge2: ; preds = %bb30 - br label %bb32 - -bb30.bb32_crit_edge1: ; preds = %bb30 - br label %bb32 - -bb30.bb32_crit_edge: ; preds = %bb30 - br label %bb32 - -bb32: ; preds = %bb30.bb32_crit_edge, %bb30.bb32_crit_edge1, %bb30.bb32_crit_edge2 - br i1 false, label %bb53, label %bb52 - -bb52: ; preds = %bb32 - br label %bb739 - -bb53: ; preds = %bb32 - br label %bb101 - -bb58: ; preds = %bb101 - br label %bb92 - -bb64: ; preds = %bb92 - br i1 false, label %bb64.bb87_crit_edge, label %bb72 - -bb64.bb87_crit_edge: ; preds = %bb64 - br label %bb87 - -bb72: ; preds = %bb64 - br i1 false, label %bb72.bb87_crit_edge, label %bb79 - -bb72.bb87_crit_edge: ; preds = %bb72 - br label %bb87 - -bb79: ; preds = %bb72 - br label %bb87 - -bb87: ; preds = %bb79, %bb72.bb87_crit_edge, %bb64.bb87_crit_edge - br label %bb92 - -bb92: ; preds = %bb87, %bb58 - br i1 false, label %bb64, label %bb98 - -bb98: ; preds = %bb92 - br label %bb101 - -bb101: ; preds = %bb98, %bb53 - br i1 false, label %bb58, label %bb107 - -bb107: ; preds = %bb101 - br label %bb651 - -bb108: ; preds = %bb30.bb108_crit_edge, %bb30.bb108_crit_edge3 - br i1 false, label %bb125, label %bb124 - -bb124: ; preds = %bb108 - br label %bb739 - -bb125: ; preds = %bb108 - br i1 false, label %bb138, label %bb139 - -bb138: ; preds = %bb125 - br label %bb140 - -bb139: ; preds = %bb125 - br label %bb140 - -bb140: ; preds = %bb139, %bb138 - br label %bb651 - -bb142: ; preds = %bb30.bb142_crit_edge, %bb30.bb142_crit_edge4, %bb30.bb142_crit_edge5 - br i1 false, label %bb161, label %bb160 - -bb160: ; preds = %bb142 - br label %bb739 - -bb161: ; preds = %bb142 - br i1 false, label %bb170, label %bb161.bb171_crit_edge - -bb161.bb171_crit_edge: ; preds = %bb161 - br label %bb171 - -bb170: ; preds = %bb161 - br label %bb171 - -bb171: ; preds = %bb170, %bb161.bb171_crit_edge - br i1 false, label %bb176, label %bb171.bb177_crit_edge - -bb171.bb177_crit_edge: ; preds = %bb171 - br label %bb177 - -bb176: ; preds = %bb171 - br label %bb177 - -bb177: ; preds = %bb176, %bb171.bb177_crit_edge - br label %bb227 - -bb178: ; preds = %bb227 - br label %bb218 - -bb184: ; preds = %bb218 - br i1 false, label %bb191, label %bb193 - -bb191: ; preds = %bb184 - br label %bb213 - -bb193: ; preds = %bb184 - br i1 false, label %bb200, label %bb203 - -bb200: ; preds = %bb193 - br label %bb213 - -bb203: ; preds = %bb193 - br i1 false, label %bb210, label %bb203.bb213_crit_edge - -bb203.bb213_crit_edge: ; preds = %bb203 - br label %bb213 - -bb210: ; preds = %bb203 - br label %bb213 - -bb213: ; preds = %bb210, %bb203.bb213_crit_edge, %bb200, %bb191 - br label %bb218 - -bb218: ; preds = %bb213, %bb178 - br i1 false, label %bb184, label %bb224 - -bb224: ; preds = %bb218 - br label %bb227 - -bb227: ; preds = %bb224, %bb177 - br i1 false, label %bb178, label %bb233 - -bb233: ; preds = %bb227 - br label %bb651 - -bb234: ; preds = %bb30 - br i1 false, label %bb253, label %bb252 - -bb252: ; preds = %bb234 - br label %bb739 - -bb253: ; preds = %bb234 - br label %bb285 - -bb258: ; preds = %bb285 - br label %bb276 - -bb264: ; preds = %bb276 - br label %bb276 - -bb276: ; preds = %bb264, %bb258 - br i1 false, label %bb264, label %bb282 - -bb282: ; preds = %bb276 - br label %bb285 - -bb285: ; preds = %bb282, %bb253 - br i1 false, label %bb258, label %bb291 - -bb291: ; preds = %bb285 - br label %bb651 - -bb292: ; preds = %bb30 - br i1 false, label %bb311, label %bb310 - -bb310: ; preds = %bb292 - br label %bb739 - -bb311: ; preds = %bb292 - br label %bb346 - -bb316: ; preds = %bb346 - br label %bb337 - -bb322: ; preds = %bb337 - br label %bb337 - -bb337: ; preds = %bb322, %bb316 - br i1 false, label %bb322, label %bb343 - -bb343: ; preds = %bb337 - br label %bb346 - -bb346: ; preds = %bb343, %bb311 - br i1 false, label %bb316, label %bb352 - -bb352: ; preds = %bb346 - br label %bb651 - -bb353: ; preds = %bb30 - br i1 false, label %bb372, label %bb371 - -bb371: ; preds = %bb353 - br label %bb739 - -bb372: ; preds = %bb353 - br label %bb412 - -bb377: ; preds = %bb412 - br label %bb403 - -bb383: ; preds = %bb403 - br i1 false, label %bb395, label %bb389 - -bb389: ; preds = %bb383 - br label %bb396 - -bb395: ; preds = %bb383 - br label %bb396 - -bb396: ; preds = %bb395, %bb389 - br label %bb403 - -bb403: ; preds = %bb396, %bb377 - br i1 false, label %bb383, label %bb409 - -bb409: ; preds = %bb403 - br label %bb412 - -bb412: ; preds = %bb409, %bb372 - br i1 false, label %bb377, label %bb418 - -bb418: ; preds = %bb412 - br label %bb651 - -bb419: ; preds = %bb30 - br i1 false, label %bb438, label %bb437 - -bb437: ; preds = %bb419 - br label %bb739 - -bb438: ; preds = %bb419 - br label %bb478 - -bb443: ; preds = %bb478 - br label %bb469 - -bb449: ; preds = %bb469 - br i1 false, label %bb461, label %bb455 - -bb455: ; preds = %bb449 - br label %bb462 - -bb461: ; preds = %bb449 - br label %bb462 - -bb462: ; preds = %bb461, %bb455 - br label %bb469 - -bb469: ; preds = %bb462, %bb443 - br i1 false, label %bb449, label %bb475 - -bb475: ; preds = %bb469 - br label %bb478 - -bb478: ; preds = %bb475, %bb438 - br i1 false, label %bb443, label %bb484 - -bb484: ; preds = %bb478 - br label %bb651 - -bb485: ; preds = %bb30 - br i1 false, label %bb504, label %bb503 - -bb503: ; preds = %bb485 - br label %bb739 - -bb504: ; preds = %bb485 - br label %bb560 - -bb513: ; preds = %bb560 - br label %bb551 - -bb519: ; preds = %bb551 - br i1 false, label %bb528, label %bb532 - -bb528: ; preds = %bb519 - br label %bb536 - -bb532: ; preds = %bb519 - br label %bb536 - -bb536: ; preds = %bb532, %bb528 - br label %bb551 - -bb551: ; preds = %bb536, %bb513 - br i1 false, label %bb519, label %bb557 - -bb557: ; preds = %bb551 - br label %bb560 - -bb560: ; preds = %bb557, %bb504 - br i1 false, label %bb513, label %bb566 - -bb566: ; preds = %bb560 - br label %bb651 - -bb567: ; preds = %bb30 - br i1 false, label %bb586, label %bb585 - -bb585: ; preds = %bb567 - br label %bb739 - -bb586: ; preds = %bb567 - br label %bb641 - -bb595: ; preds = %bb641 - br label %bb632 - -bb601: ; preds = %bb632 - %tmp604 = icmp sgt i32 %i.7, 0 ; <i1> [#uses=1] - br i1 %tmp604, label %bb607, label %bb611 - -bb607: ; preds = %bb601 - br label %bb615 - -bb611: ; preds = %bb601 - br label %bb615 - -bb615: ; preds = %bb611, %bb607 - %tmp629 = add i32 %i.7, 1 ; <i32> [#uses=1] - %tmp631 = getelementptr float* %col.7, i32 1 ; <float*> [#uses=1] - br label %bb632 - -bb632: ; preds = %bb615, %bb595 - %col.7 = phi float* [ null, %bb595 ], [ %tmp631, %bb615 ] ; <float*> [#uses=1] - %i.7 = phi i32 [ 0, %bb595 ], [ %tmp629, %bb615 ] ; <i32> [#uses=3] - %tmp635 = icmp slt i32 %i.7, 0 ; <i1> [#uses=1] - br i1 %tmp635, label %bb601, label %bb638 - -bb638: ; preds = %bb632 - br label %bb641 - -bb641: ; preds = %bb638, %bb586 - br i1 false, label %bb595, label %bb647 - -bb647: ; preds = %bb641 - br label %bb651 - -bb648: ; preds = %bb30 - br label %bb739 - -bb651: ; preds = %bb647, %bb566, %bb484, %bb418, %bb352, %bb291, %bb233, %bb140, %bb107 - br i1 false, label %bb658, label %bb651.bb661_crit_edge - -bb651.bb661_crit_edge: ; preds = %bb651 - br label %bb661 - -bb658: ; preds = %bb651 - br label %bb661 - -bb661: ; preds = %bb658, %bb651.bb661_crit_edge - br i1 false, label %bb666, label %bb661.bb686_crit_edge - -bb661.bb686_crit_edge: ; preds = %bb661 - br label %bb686 - -bb666: ; preds = %bb661 - br label %bb680 - -bb670: ; preds = %bb680 - br label %bb680 - -bb680: ; preds = %bb670, %bb666 - br i1 false, label %bb670, label %bb680.bb686_crit_edge - -bb680.bb686_crit_edge: ; preds = %bb680 - br label %bb686 - -bb686: ; preds = %bb680.bb686_crit_edge, %bb661.bb686_crit_edge - br i1 false, label %bb699, label %bb696 - -bb696: ; preds = %bb686 - br label %bb739 - -bb699: ; preds = %bb686 - br i1 false, label %bb712, label %bb709 - -bb709: ; preds = %bb699 - br label %bb739 - -bb712: ; preds = %bb699 - br i1 false, label %bb717, label %bb712.bb720_crit_edge - -bb712.bb720_crit_edge: ; preds = %bb712 - br label %bb720 - -bb717: ; preds = %bb712 - br label %bb720 - -bb720: ; preds = %bb717, %bb712.bb720_crit_edge - br i1 false, label %bb725, label %bb720.bb738_crit_edge - -bb720.bb738_crit_edge: ; preds = %bb720 - br label %bb738 - -bb725: ; preds = %bb720 - br label %bb738 - -bb738: ; preds = %bb725, %bb720.bb738_crit_edge - br label %bb739 - -bb739: ; preds = %bb738, %bb709, %bb696, %bb648, %bb585, %bb503, %bb437, %bb371, %bb310, %bb252, %bb160, %bb124, %bb52 - br label %return - -return: ; preds = %bb739 - ret i32 0 -} diff --git a/test/Transforms/LoopIndexSplit/2008-03-24-ExitPhi.ll b/test/Transforms/LoopIndexSplit/2008-03-24-ExitPhi.ll deleted file mode 100644 index ca22e50eadfc..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-03-24-ExitPhi.ll +++ /dev/null @@ -1,69 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output -; Handle Exit block phis that do not have any use inside the loop. - - %struct.ATOM = type { double, double, double, double, double, double, i32, double, double, double, double, i8*, i8, [9 x i8], double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, [200 x i8*], [32 x i8*], [32 x i8], i32 } - %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } - %struct.__sFILEX = type opaque - %struct.__sbuf = type { i8*, i32 } - -define i32 @math([80 x i8]* %tokens, double* %fvalue, i32* %ivalue, %struct.FILE* %ip, %struct.FILE* %op, i32 %echo) nounwind { -entry: - br i1 false, label %bb.i, label %bb35.i -bb.i: ; preds = %entry - br i1 false, label %bb6.i, label %bb9.i -bb9.i: ; preds = %bb.i - ret i32 0 -bb35.i: ; preds = %entry - ret i32 0 -bb6.i: ; preds = %bb.i - br i1 false, label %a_l2_f.exit, label %bb16.i -bb16.i: ; preds = %bb6.i - ret i32 0 -a_l2_f.exit: ; preds = %bb6.i - br i1 false, label %bb7.i97, label %bb6.i71 -bb6.i71: ; preds = %a_l2_f.exit - ret i32 0 -bb7.i97: ; preds = %a_l2_f.exit - br i1 false, label %bb, label %bb18.i102 -bb18.i102: ; preds = %bb7.i97 - ret i32 0 -bb: ; preds = %bb7.i97 - br i1 false, label %bb38, label %AFOUND -bb38: ; preds = %bb - br i1 false, label %bb111, label %bb7.i120 -AFOUND: ; preds = %bb - ret i32 0 -bb7.i120: ; preds = %bb38 - ret i32 0 -bb111: ; preds = %bb38 - switch i32 0, label %bb574 [ - i32 1, label %bb158 - i32 0, label %bb166 - ] -bb158: ; preds = %bb111 - ret i32 0 -bb166: ; preds = %bb111 - ret i32 0 -bb574: ; preds = %bb111 - br i1 false, label %bb11.i249, label %bb600 -bb11.i249: ; preds = %bb574 - br i1 false, label %bb11.i265, label %bb596 -bb11.i265: ; preds = %bb590, %bb11.i249 - %i.1.reg2mem.0 = phi i32 [ %tmp589.reg2mem.0, %bb590 ], [ 0, %bb11.i249 ] ; <i32> [#uses=2] - %tmp13.i264 = icmp slt i32 %i.1.reg2mem.0, 1 ; <i1> [#uses=1] - br i1 %tmp13.i264, label %bb16.i267, label %bb30.i279 -bb16.i267: ; preds = %bb11.i265 - br label %bb590 -bb30.i279: ; preds = %bb11.i265 - br label %bb590 -bb590: ; preds = %bb30.i279, %bb16.i267 - %tmp5876282.reg2mem.0 = phi %struct.ATOM* [ null, %bb30.i279 ], [ null, %bb16.i267 ] ; <%struct.ATOM*> [#uses=1] - %tmp589.reg2mem.0 = add i32 %i.1.reg2mem.0, 1 ; <i32> [#uses=2] - %tmp593 = icmp slt i32 %tmp589.reg2mem.0, 0 ; <i1> [#uses=1] - br i1 %tmp593, label %bb11.i265, label %bb596 -bb596: ; preds = %bb590, %bb11.i249 - %ap.0.reg2mem.0 = phi %struct.ATOM* [ null, %bb11.i249 ], [ %tmp5876282.reg2mem.0, %bb590 ] ; <%struct.ATOM*> [#uses=0] - ret i32 0 -bb600: ; preds = %bb574 - ret i32 0 -} diff --git a/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll b/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll deleted file mode 100644 index 7447e6d4d4f0..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll +++ /dev/null @@ -1,40 +0,0 @@ -; RUN: opt < %s -loop-index-split -stats -disable-output | not grep "loop-index-split" -;PR2294 -@g_2 = external global i16 ; <i16*> [#uses=4] -@g_5 = external global i32 ; <i32*> [#uses=1] -@.str = external constant [4 x i8] ; <[4 x i8]*> [#uses=1] - -declare void @func_1() nounwind - -define i32 @main() nounwind { -entry: - %tmp101.i = load i16* @g_2, align 2 ; <i16> [#uses=1] - %tmp112.i = icmp sgt i16 %tmp101.i, 0 ; <i1> [#uses=1] - br i1 %tmp112.i, label %bb.preheader.i, label %func_1.exit -bb.preheader.i: ; preds = %entry - %g_2.promoted.i = load i16* @g_2 ; <i16> [#uses=1] - br label %bb.i -bb.i: ; preds = %bb6.i, %bb.preheader.i - %g_2.tmp.0.i = phi i16 [ %g_2.promoted.i, %bb.preheader.i ], [ %tmp8.i, %bb6.i ] ; <i16> [#uses=2] - %tmp2.i = icmp eq i16 %g_2.tmp.0.i, 0 ; <i1> [#uses=1] - br i1 %tmp2.i, label %bb4.i, label %bb6.i -bb4.i: ; preds = %bb.i - %tmp5.i = volatile load i32* @g_5, align 4 ; <i32> [#uses=0] - br label %bb6.i -bb6.i: ; preds = %bb4.i, %bb.i - %tmp8.i = add i16 %g_2.tmp.0.i, 1 ; <i16> [#uses=3] - %tmp11.i = icmp sgt i16 %tmp8.i, 42 ; <i1> [#uses=1] - br i1 %tmp11.i, label %bb.i, label %return.loopexit.i -return.loopexit.i: ; preds = %bb6.i - %tmp8.i.lcssa = phi i16 [ %tmp8.i, %bb6.i ] ; <i16> [#uses=1] - store i16 %tmp8.i.lcssa, i16* @g_2 - br label %func_1.exit -func_1.exit: ; preds = %return.loopexit.i, %entry - %tmp1 = load i16* @g_2, align 2 ; <i16> [#uses=1] - %tmp12 = sext i16 %tmp1 to i32 ; <i32> [#uses=1] - %tmp3 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %tmp12 ) nounwind ; <i32> [#uses=0] - ret i32 0 -} - -declare i32 @printf(i8*, ...) nounwind - diff --git a/test/Transforms/LoopIndexSplit/2008-06-03-DomFrontier.ll b/test/Transforms/LoopIndexSplit/2008-06-03-DomFrontier.ll deleted file mode 100644 index 6f691de537b1..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-06-03-DomFrontier.ll +++ /dev/null @@ -1,32 +0,0 @@ -; RUN: opt < %s -loop-rotate -loop-unswitch -loop-index-split -instcombine -disable-output -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin9" - %struct.__CFData = type opaque - %struct.__CFString = type opaque - -define %struct.__CFData* @WirelessCreatePSK(%struct.__CFString* %inPassphrase, %struct.__CFData* %inSSID) nounwind { -entry: - br label %bb52 - -bb52: ; preds = %bb142, %bb52, %entry - br i1 false, label %bb142, label %bb52 - -bb63: ; preds = %bb142, %bb131 - %t.0.reg2mem.0 = phi i32 [ %tmp133, %bb131 ], [ 0, %bb142 ] ; <i32> [#uses=2] - %tmp65 = icmp ult i32 %t.0.reg2mem.0, 16 ; <i1> [#uses=1] - br i1 %tmp65, label %bb68, label %bb89 - -bb68: ; preds = %bb63 - br label %bb131 - -bb89: ; preds = %bb63 - br label %bb131 - -bb131: ; preds = %bb89, %bb68 - %tmp133 = add i32 %t.0.reg2mem.0, 1 ; <i32> [#uses=2] - %tmp136 = icmp ult i32 %tmp133, 80 ; <i1> [#uses=1] - br i1 %tmp136, label %bb63, label %bb142 - -bb142: ; preds = %bb131, %bb52 - br i1 undef, label %bb63, label %bb52 -} diff --git a/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll b/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll deleted file mode 100644 index 1fcd960e0511..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll +++ /dev/null @@ -1,25 +0,0 @@ -; RUN: opt < %s -loop-index-split -stats -disable-output | not grep "1 loop-index-split" -; PR 2487 -@g_6 = external global i32 ; <i32*> [#uses=1] - -define void @func_1() nounwind { -entry: - br label %bb - -bb: ; preds = %bb4, %entry - %l_3.0 = phi i8 [ 0, %entry ], [ %tmp6, %bb4 ] ; <i8> [#uses=2] - %tmp1 = icmp eq i8 %l_3.0, 0 ; <i1> [#uses=1] - br i1 %tmp1, label %bb3, label %bb4 - -bb3: ; preds = %bb - store i32 1, i32* @g_6, align 4 - br label %bb4 - -bb4: ; preds = %bb3, %bb - %tmp6 = add i8 %l_3.0, 1 ; <i8> [#uses=2] - %tmp9 = icmp sgt i8 %tmp6, -1 ; <i1> [#uses=1] - br i1 %tmp9, label %bb, label %return - -return: ; preds = %bb4 - ret void -} diff --git a/test/Transforms/LoopIndexSplit/2008-09-17-IVUse.ll b/test/Transforms/LoopIndexSplit/2008-09-17-IVUse.ll deleted file mode 100644 index ee8e7a3eb863..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-09-17-IVUse.ll +++ /dev/null @@ -1,78 +0,0 @@ -; RUN: opt < %s -loop-index-split -stats -disable-output | not grep "loop-index-split" -; PR 2791 -@g_40 = common global i32 0 ; <i32*> [#uses=1] -@g_192 = common global i32 0 ; <i32*> [#uses=2] -@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1] - -define void @func_29() nounwind { -entry: - %0 = load i32* @g_40, align 4 ; <i32> [#uses=1] - %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1] - %g_192.promoted = load i32* @g_192 ; <i32> [#uses=0] - br i1 %1, label %entry.split.us, label %entry.split - -entry.split.us: ; preds = %entry - br label %bb.us - -bb.us: ; preds = %bb5.us, %entry.split.us - %i.0.reg2mem.0.us = phi i32 [ 0, %entry.split.us ], [ %3, %bb5.us ] ; <i32> [#uses=2] - %2 = icmp eq i32 %i.0.reg2mem.0.us, 0 ; <i1> [#uses=1] - br i1 %2, label %bb1.us, label %bb5.us - -bb5.us: ; preds = %bb1.us, %bb4.us, %bb.us - %iftmp.0.0.us = phi i32 [ 0, %bb4.us ], [ 1, %bb.us ], [ 1, %bb1.us ] ; <i32> [#uses=1] - %3 = add i32 %i.0.reg2mem.0.us, 1 ; <i32> [#uses=3] - %4 = icmp ult i32 %3, 10 ; <i1> [#uses=1] - br i1 %4, label %bb.us, label %bb8.us - -bb4.us: ; preds = %bb1.us - br label %bb5.us - -bb1.us: ; preds = %bb.us - br i1 true, label %bb4.us, label %bb5.us - -bb8.us: ; preds = %bb5.us - %iftmp.0.0.lcssa.us = phi i32 [ %iftmp.0.0.us, %bb5.us ] ; <i32> [#uses=1] - %.lcssa.us = phi i32 [ %3, %bb5.us ] ; <i32> [#uses=1] - br label %bb8.split - -entry.split: ; preds = %entry - br label %bb - -bb: ; preds = %bb5, %entry.split - %i.0.reg2mem.0 = phi i32 [ 0, %entry.split ], [ %6, %bb5 ] ; <i32> [#uses=2] - %5 = icmp eq i32 %i.0.reg2mem.0, 0 ; <i1> [#uses=1] - br i1 %5, label %bb1, label %bb5 - -bb1: ; preds = %bb - br i1 false, label %bb4, label %bb5 - -bb4: ; preds = %bb1 - br label %bb5 - -bb5: ; preds = %bb1, %bb, %bb4 - %iftmp.0.0 = phi i32 [ 0, %bb4 ], [ 1, %bb ], [ 1, %bb1 ] ; <i32> [#uses=1] - %6 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=3] - %7 = icmp ult i32 %6, 10 ; <i1> [#uses=1] - br i1 %7, label %bb, label %bb8 - -bb8: ; preds = %bb5 - %iftmp.0.0.lcssa = phi i32 [ %iftmp.0.0, %bb5 ] ; <i32> [#uses=1] - %.lcssa = phi i32 [ %6, %bb5 ] ; <i32> [#uses=1] - br label %bb8.split - -bb8.split: ; preds = %bb8.us, %bb8 - %iftmp.0.0.lcssa.us-lcssa = phi i32 [ %iftmp.0.0.lcssa, %bb8 ], [ %iftmp.0.0.lcssa.us, %bb8.us ] ; <i32> [#uses=1] - %.lcssa.us-lcssa = phi i32 [ %.lcssa, %bb8 ], [ %.lcssa.us, %bb8.us ] ; <i32> [#uses=1] - store i32 %iftmp.0.0.lcssa.us-lcssa, i32* @g_192 - %8 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), i32 %.lcssa.us-lcssa ) nounwind ; <i32> [#uses=0] - ret void -} - -declare i32 @printf(i8*, ...) nounwind - -define i32 @main() nounwind { -entry: - call void @func_29( ) nounwind - ret i32 0 -} diff --git a/test/Transforms/LoopIndexSplit/2008-09-20-Crash.ll b/test/Transforms/LoopIndexSplit/2008-09-20-Crash.ll deleted file mode 100644 index ef677369cc47..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-09-20-Crash.ll +++ /dev/null @@ -1,38 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output -; PR 2805 -@g_330 = common global i32 0 ; <i32*> [#uses=1] - -define i32 @func_45(i32 %p_47) nounwind { -entry: - br label %bb - -bb: ; preds = %bb3, %entry - %p_47_addr.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %2, %bb3 ] ; <i32> [#uses=2] - %0 = icmp eq i32 %p_47_addr.0.reg2mem.0, 0 ; <i1> [#uses=1] - br i1 %0, label %bb2, label %bb1 - -bb1: ; preds = %bb - %1 = tail call i32 (...)* @func_70( i32 1 ) nounwind ; <i32> [#uses=0] - br label %bb3 - -bb2: ; preds = %bb - store i32 1, i32* @g_330, align 4 - br label %bb3 - -bb3: ; preds = %bb2, %bb1 - %2 = add i32 %p_47_addr.0.reg2mem.0, 1 ; <i32> [#uses=3] - %3 = icmp ult i32 %2, 22 ; <i1> [#uses=1] - br i1 %3, label %bb, label %bb6 - -bb6: ; preds = %bb3 - %.lcssa = phi i32 [ %2, %bb3 ] ; <i32> [#uses=1] - %4 = tail call i32 (...)* @func_95( i32 %.lcssa ) nounwind ; <i32> [#uses=1] - %5 = tail call i32 (...)* @func_56( i32 %4 ) nounwind ; <i32> [#uses=0] - ret i32 undef -} - -declare i32 @func_70(...) - -declare i32 @func_95(...) - -declare i32 @func_56(...) diff --git a/test/Transforms/LoopIndexSplit/2008-10-06-Crash.ll b/test/Transforms/LoopIndexSplit/2008-10-06-Crash.ll deleted file mode 100644 index cca54adb1955..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-10-06-Crash.ll +++ /dev/null @@ -1,31 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output - %struct.RExC_state_t = type { i32, i8*, %struct.regexp*, i8*, i8*, i8*, i32, %struct.regnode*, %struct.regnode*, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.SV = type { i8*, i32, i32 } - %struct.reg_data = type { i32, i8*, [1 x i8*] } - %struct.reg_substr_data = type { [3 x %struct.reg_substr_datum] } - %struct.reg_substr_datum = type { i32, i32, %struct.SV*, %struct.SV* } - %struct.regexp = type { i32*, i32*, %struct.regnode*, %struct.reg_substr_data*, i8*, %struct.reg_data*, i8*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, [1 x %struct.regnode] } - %struct.regnode = type { i8, i8, i16 } - -define fastcc %struct.regnode* @S_regclass(%struct.RExC_state_t* %pRExC_state) nounwind { -entry: - br label %bb439 - -bb439: ; preds = %bb444, %entry - %value23.16.reg2mem.0 = phi i32 [ %3, %bb444 ], [ 0, %entry ] ; <i32> [#uses=3] - %0 = icmp ugt i32 %value23.16.reg2mem.0, 31 ; <i1> [#uses=1] - %1 = icmp ne i32 %value23.16.reg2mem.0, 127 ; <i1> [#uses=1] - %2 = and i1 %0, %1 ; <i1> [#uses=1] - br i1 %2, label %bb443, label %bb444 - -bb443: ; preds = %bb439 - br label %bb444 - -bb444: ; preds = %bb443, %bb439 - %3 = add i32 %value23.16.reg2mem.0, 1 ; <i32> [#uses=2] - %4 = icmp ugt i32 %3, 255 ; <i1> [#uses=1] - br i1 %4, label %bb675, label %bb439 - -bb675: ; preds = %bb444 - unreachable -} diff --git a/test/Transforms/LoopIndexSplit/2008-10-10-OneIteration.ll b/test/Transforms/LoopIndexSplit/2008-10-10-OneIteration.ll deleted file mode 100644 index 372fee51a09b..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-10-10-OneIteration.ll +++ /dev/null @@ -1,66 +0,0 @@ -; RUN: opt < %s -loop-index-split -stats -disable-output |& grep "1 loop-index-split" -; PR 2869 - -@w = external global [2 x [2 x i32]] ; <[2 x [2 x i32]]*> [#uses=5] - -declare i32 @f() nounwind - -define i32 @main() noreturn nounwind { -entry: - br label %bb1.i.outer - -bb1.i.outer: ; preds = %bb5.i, %entry - %i.0.reg2mem.0.ph.i.ph = phi i32 [ 0, %entry ], [ %indvar.next1, %bb5.i ] ; <i32> [#uses=3] - br label %bb1.i - -bb1.i: ; preds = %bb3.i, %bb1.i.outer - %j.0.reg2mem.0.i = phi i32 [ 0, %bb1.i.outer ], [ %indvar.next, %bb3.i ] ; <i32> [#uses=3] - %0 = icmp eq i32 %i.0.reg2mem.0.ph.i.ph, %j.0.reg2mem.0.i ; <i1> [#uses=1] - br i1 %0, label %bb2.i, label %bb3.i - -bb2.i: ; preds = %bb1.i - %1 = getelementptr [2 x [2 x i32]]* @w, i32 0, i32 %i.0.reg2mem.0.ph.i.ph, i32 %j.0.reg2mem.0.i ; <i32*> [#uses=1] - store i32 1, i32* %1, align 4 - br label %bb3.i - -bb3.i: ; preds = %bb2.i, %bb1.i - %indvar.next = add i32 %j.0.reg2mem.0.i, 1 ; <i32> [#uses=2] - %exitcond = icmp eq i32 %indvar.next, 2 ; <i1> [#uses=1] - br i1 %exitcond, label %bb5.i, label %bb1.i - -bb5.i: ; preds = %bb3.i - %indvar.next1 = add i32 %i.0.reg2mem.0.ph.i.ph, 1 ; <i32> [#uses=2] - %exitcond2 = icmp eq i32 %indvar.next1, 2 ; <i1> [#uses=1] - br i1 %exitcond2, label %f.exit, label %bb1.i.outer - -f.exit: ; preds = %bb5.i - %2 = load i32* getelementptr ([2 x [2 x i32]]* @w, i32 0, i32 0, i32 0), align 4 ; <i32> [#uses=1] - %3 = icmp eq i32 %2, 1 ; <i1> [#uses=1] - br i1 %3, label %bb, label %bb3 - -bb: ; preds = %f.exit - %4 = load i32* getelementptr ([2 x [2 x i32]]* @w, i32 0, i32 1, i32 1), align 4 ; <i32> [#uses=1] - %5 = icmp eq i32 %4, 1 ; <i1> [#uses=1] - br i1 %5, label %bb1, label %bb3 - -bb1: ; preds = %bb - %6 = load i32* getelementptr ([2 x [2 x i32]]* @w, i32 0, i32 1, i32 0), align 4 ; <i32> [#uses=1] - %7 = icmp eq i32 %6, 0 ; <i1> [#uses=1] - br i1 %7, label %bb2, label %bb3 - -bb2: ; preds = %bb1 - %8 = load i32* getelementptr ([2 x [2 x i32]]* @w, i32 0, i32 0, i32 1), align 4 ; <i32> [#uses=1] - %9 = icmp eq i32 %8, 0 ; <i1> [#uses=1] - br i1 %9, label %bb4, label %bb3 - -bb3: ; preds = %bb2, %bb1, %bb, %f.exit - tail call void @abort() noreturn nounwind - unreachable - -bb4: ; preds = %bb2 - ret i32 0 -} - -declare void @abort() noreturn nounwind - -declare void @exit(i32) noreturn nounwind diff --git a/test/Transforms/LoopIndexSplit/2008-11-10-Sign.ll b/test/Transforms/LoopIndexSplit/2008-11-10-Sign.ll deleted file mode 100644 index 217ff52bb2c5..000000000000 --- a/test/Transforms/LoopIndexSplit/2008-11-10-Sign.ll +++ /dev/null @@ -1,69 +0,0 @@ -; RUN: opt < %s -loop-index-split -stats | not grep "loop-index-split" -; PR3029 - -@g_138 = common global i32 0 ; <i32*> [#uses=3] -@g_188 = common global i32 0 ; <i32*> [#uses=4] -@g_207 = common global i32 0 ; <i32*> [#uses=3] -@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1] -@g_102 = common global i32 0 ; <i32*> [#uses=0] - -define i32 @func_119() nounwind { -entry: - %0 = volatile load i32* @g_138, align 4 ; <i32> [#uses=1] - ret i32 %0 -} - -define void @func_110(i32 %p_111) nounwind { -entry: - %0 = load i32* @g_188, align 4 ; <i32> [#uses=1] - %1 = icmp ugt i32 %0, -1572397472 ; <i1> [#uses=1] - br i1 %1, label %bb, label %bb1 - -bb: ; preds = %entry - %2 = volatile load i32* @g_138, align 4 ; <i32> [#uses=0] - ret void - -bb1: ; preds = %entry - store i32 1, i32* @g_207, align 4 - ret void -} - -define void @func_34() nounwind { -entry: - store i32 0, i32* @g_188 - %g_188.promoted = load i32* @g_188 ; <i32> [#uses=1] - br label %bb - -bb: ; preds = %func_110.exit, %entry - %g_188.tmp.0 = phi i32 [ %g_188.promoted, %entry ], [ %2, %func_110.exit ] ; <i32> [#uses=2] - %0 = icmp ugt i32 %g_188.tmp.0, -1572397472 ; <i1> [#uses=1] - br i1 %0, label %bb.i, label %bb1.i - -bb.i: ; preds = %bb - %1 = volatile load i32* @g_138, align 4 ; <i32> [#uses=0] - br label %func_110.exit - -bb1.i: ; preds = %bb - store i32 1, i32* @g_207, align 4 - br label %func_110.exit - -func_110.exit: ; preds = %bb.i, %bb1.i - %2 = add i32 %g_188.tmp.0, 1 ; <i32> [#uses=3] - %3 = icmp sgt i32 %2, 1 ; <i1> [#uses=1] - br i1 %3, label %return, label %bb - -return: ; preds = %func_110.exit - %.lcssa = phi i32 [ %2, %func_110.exit ] ; <i32> [#uses=1] - store i32 %.lcssa, i32* @g_188 - ret void -} - -define i32 @main() nounwind { -entry: - call void @func_34() nounwind - %0 = load i32* @g_207, align 4 ; <i32> [#uses=1] - %1 = call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), i32 %0) nounwind ; <i32> [#uses=0] - ret i32 0 -} - -declare i32 @printf(i8*, ...) nounwind diff --git a/test/Transforms/LoopIndexSplit/2009-03-02-UpdateIterationSpace-crash.ll b/test/Transforms/LoopIndexSplit/2009-03-02-UpdateIterationSpace-crash.ll deleted file mode 100644 index 9acf3915c0a2..000000000000 --- a/test/Transforms/LoopIndexSplit/2009-03-02-UpdateIterationSpace-crash.ll +++ /dev/null @@ -1,64 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output - %struct.CGPoint = type { double, double } - %struct.IBCFMutableDictionary = type { %struct.NSMutableArray, %struct.__CFDictionary*, %struct.NSSortDescriptor*, %struct.NSSortDescriptor* } - %struct.IBInspectorMode = type opaque - %struct.IBInspectorModeView = type { %struct.NSView, %struct.NSArray*, %struct.IBCFMutableDictionary*, %struct.IBInspectorMode*, %struct.IBInspectorMode*, %struct.IBInspectorMode*, %struct.objc_selector*, %struct.NSObject* } - %struct.NSArray = type { %struct.NSObject } - %struct.NSImage = type { %struct.NSObject, %struct.NSArray*, %struct.CGPoint, %struct.__imageFlags, %struct.NSObject*, %struct._NSImageAuxiliary* } - %struct.NSMutableArray = type { %struct.NSArray } - %struct.NSObject = type { %struct.objc_class* } - %struct.NSRect = type { %struct.CGPoint, %struct.CGPoint } - %struct.NSResponder = type { %struct.NSObject, %struct.NSObject* } - %struct.NSSortDescriptor = type { %struct.NSObject, i64, %struct.NSArray*, %struct.objc_selector*, %struct.NSObject* } - %struct.NSURL = type { %struct.NSObject, %struct.NSArray*, %struct.NSURL*, i8*, i8* } - %struct.NSView = type { %struct.NSResponder, %struct.NSRect, %struct.NSRect, %struct.NSObject*, %struct.NSObject*, %struct.NSWindow*, %struct.NSObject*, %struct.NSObject*, %struct.NSObject*, %struct.NSObject*, %struct._NSViewAuxiliary*, %struct._VFlags, %struct.__VFlags2 } - %struct.NSWindow = type { %struct.NSResponder, %struct.NSRect, %struct.NSObject*, %struct.NSObject*, %struct.NSResponder*, %struct.NSView*, %struct.NSView*, %struct.NSObject*, %struct.NSObject*, i32, i64, i32, %struct.NSArray*, %struct.NSObject*, i8, i8, i8, i8, i8*, i8*, %struct.NSImage*, i32, %struct.NSMutableArray*, %struct.NSURL*, %struct.CGPoint*, %struct.NSArray*, %struct.NSArray*, %struct.__wFlags, %struct.NSObject*, %struct.NSView*, %struct.NSWindowAuxiliary* } - %struct.NSWindowAuxiliary = type opaque - %struct._NSImageAuxiliary = type opaque - %struct._NSViewAuxiliary = type opaque - %struct._VFlags = type <{ i8, i8, i8, i8 }> - %struct.__CFDictionary = type opaque - %struct.__VFlags2 = type <{ i32 }> - %struct.__imageFlags = type <{ i8, [3 x i8] }> - %struct.__wFlags = type <{ i8, i8, i8, i8, i8, i8, i8, i8 }> - %struct.objc_class = type opaque - %struct.objc_selector = type opaque - -define %struct.NSArray* @"\01-[IBInspectorModeView calculateModeRects]"(%struct.IBInspectorModeView* %self, %struct.objc_selector* %_cmd) optsize ssp { -entry: - br i1 false, label %bb7, label %bb - -bb: ; preds = %entry - br i1 false, label %bb.nph, label %bb7.loopexit - -bb.nph: ; preds = %bb - br label %bb1 - -bb1: ; preds = %bb6, %bb.nph - %midx.01 = phi i64 [ %3, %bb6 ], [ 0, %bb.nph ] ; <i64> [#uses=3] - %0 = icmp sge i64 %midx.01, 0 ; <i1> [#uses=1] - %1 = icmp sle i64 %midx.01, 0 ; <i1> [#uses=1] - %2 = and i1 %0, %1 ; <i1> [#uses=1] - br i1 %2, label %bb4, label %bb5 - -bb4: ; preds = %bb1 - br label %bb5 - -bb5: ; preds = %bb4, %bb1 - %modeWidth.0 = phi double [ 0.000000e+00, %bb1 ], [ 0.000000e+00, %bb4 ] ; <double> [#uses=0] - %3 = add i64 %midx.01, 1 ; <i64> [#uses=1] - br label %bb6 - -bb6: ; preds = %bb5 - %4 = icmp slt i64 0, 0 ; <i1> [#uses=1] - br i1 %4, label %bb1, label %bb6.bb7.loopexit_crit_edge - -bb6.bb7.loopexit_crit_edge: ; preds = %bb6 - br label %bb7.loopexit - -bb7.loopexit: ; preds = %bb6.bb7.loopexit_crit_edge, %bb - br label %bb7 - -bb7: ; preds = %bb7.loopexit, %entry - ret %struct.NSArray* null -} diff --git a/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll b/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll deleted file mode 100644 index deef94128973..000000000000 --- a/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: opt < %s -loop-index-split -S | not grep undef -define i32 @main() { -entry: - br label %header - -header: - %r = phi i32 [ 0, %entry ], [ %r3, %skip ] - %i = phi i32 [ 0, %entry ], [ %i1, %skip ] - %i99 = add i32 %i, 99 - %cond = icmp eq i32 %i99, 3 - br i1 %cond, label %body, label %skip - -body: - br label %skip - -skip: - %r3 = phi i32 [ %r, %header ], [ 3, %body ] - %i1 = add i32 %i, 1 - %exitcond = icmp eq i32 %i1, 10 - br i1 %exitcond, label %exit, label %header - -exit: - ret i32 %r3 -} diff --git a/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll b/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll deleted file mode 100644 index ad2b794218cc..000000000000 --- a/test/Transforms/LoopIndexSplit/Crash-2007-08-17.ll +++ /dev/null @@ -1,52 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output - - %struct._edit_script = type { %struct._edit_script*, i32, i8 } - -define void @align_path(i8* %seq1, i8* %seq2, i32 %i1, i32 %j1, i32 %i2, i32 %j2, i32 %dist, %struct._edit_script** %head, %struct._edit_script** %tail, i32 %M, i32 %N) { -entry: - br label %bb354 - -bb354: ; preds = %bb511, %entry - br i1 false, label %bb495, label %bb368 - -bb368: ; preds = %bb354 - ret void - -bb495: ; preds = %bb495, %bb354 - br i1 false, label %bb511, label %bb495 - -bb511: ; preds = %bb495 - br i1 false, label %xmalloc.exit69, label %bb354 - -xmalloc.exit69: ; preds = %bb511 - br i1 false, label %bb556, label %bb542.preheader - -bb542.preheader: ; preds = %xmalloc.exit69 - ret void - -bb556: ; preds = %xmalloc.exit69 - br label %bb583 - -bb583: ; preds = %cond_next693, %bb556 - %k.4342.0 = phi i32 [ %tmp707, %cond_next693 ], [ 0, %bb556 ] ; <i32> [#uses=2] - %tmp586 = icmp eq i32 %k.4342.0, 0 ; <i1> [#uses=1] - br i1 %tmp586, label %cond_true589, label %cond_false608 - -cond_true589: ; preds = %bb583 - br label %cond_next693 - -cond_false608: ; preds = %bb583 - br i1 false, label %cond_next661, label %cond_next693 - -cond_next661: ; preds = %cond_false608 - br label %cond_next693 - -cond_next693: ; preds = %cond_next661, %cond_false608, %cond_true589 - %tmp705 = getelementptr i32* null, i32 0 ; <i32*> [#uses=0] - %tmp707 = add i32 %k.4342.0, 1 ; <i32> [#uses=2] - %tmp711 = icmp sgt i32 %tmp707, 0 ; <i1> [#uses=1] - br i1 %tmp711, label %bb726.preheader, label %bb583 - -bb726.preheader: ; preds = %cond_next693 - ret void -} diff --git a/test/Transforms/LoopIndexSplit/Crash-2007-12-03.ll b/test/Transforms/LoopIndexSplit/Crash-2007-12-03.ll deleted file mode 100644 index 187484ad0bd0..000000000000 --- a/test/Transforms/LoopIndexSplit/Crash-2007-12-03.ll +++ /dev/null @@ -1,44 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output -; PR1828.bc -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" - %RPyOpaque_RuntimeTypeInfo = type opaque* - %arraytype_Char_1 = type { i32, [0 x i8] } - %arraytype_Signed = type { i32, [0 x i32] } - %functiontype_11 = type %structtype_object* () - %functiontype_360 = type %structtype_rpy_string* (%structtype_pypy.rlib.rbigint.rbigint*, %structtype_rpy_string*, %structtype_rpy_string*, %structtype_rpy_string*) - %structtype_list_18 = type { i32, %arraytype_Signed* } - %structtype_object = type { %structtype_object_vtable* } - %structtype_object_vtable = type { i32, i32, %RPyOpaque_RuntimeTypeInfo*, %arraytype_Char_1*, %functiontype_11* } - %structtype_pypy.rlib.rbigint.rbigint = type { %structtype_object, %structtype_list_18*, i32 } - %structtype_rpy_string = type { i32, %arraytype_Char_1 } - -define fastcc %structtype_rpy_string* @pypy__format(%structtype_pypy.rlib.rbigint.rbigint* %a_1, %structtype_rpy_string* %digits_0, %structtype_rpy_string* %prefix_3, %structtype_rpy_string* %suffix_0) { -block0: - br i1 false, label %block67, label %block13 - -block13: ; preds = %block0 - ret %structtype_rpy_string* null - -block31: ; preds = %block67, %block44 - ret %structtype_rpy_string* null - -block42: ; preds = %block67, %block44 - %j_167.reg2mem.0 = phi i32 [ %v63822, %block44 ], [ 0, %block67 ] ; <i32> [#uses=1] - %v63822 = add i32 %j_167.reg2mem.0, -1 ; <i32> [#uses=3] - %v63823 = icmp slt i32 %v63822, 0 ; <i1> [#uses=1] - br i1 %v63823, label %block46, label %block43 - -block43: ; preds = %block42 - br label %block44 - -block44: ; preds = %block46, %block43 - %v6377959 = icmp sgt i32 %v63822, 0 ; <i1> [#uses=1] - br i1 %v6377959, label %block42, label %block31 - -block46: ; preds = %block42 - br label %block44 - -block67: ; preds = %block0 - br i1 false, label %block42, label %block31 -} diff --git a/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll b/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll deleted file mode 100644 index 098e407a3300..000000000000 --- a/test/Transforms/LoopIndexSplit/Crash2-2007-08-17.ll +++ /dev/null @@ -1,58 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output - - %struct._edit_script = type { %struct._edit_script*, i32, i8 } - -define void @align_path(i8* %seq1, i8* %seq2, i32 %i1, i32 %j1, i32 %i2, i32 %j2, i32 %dist, %struct._edit_script** %head, %struct._edit_script** %tail, i32 %M, i32 %N) { -entry: - br label %bb354 - -bb354: ; preds = %bb511, %entry - br i1 false, label %bb495, label %bb368 - -bb368: ; preds = %bb354 - ret void - -bb495: ; preds = %bb495, %bb354 - br i1 false, label %bb511, label %bb495 - -bb511: ; preds = %bb495 - br i1 false, label %xmalloc.exit69, label %bb354 - -xmalloc.exit69: ; preds = %bb511 - br i1 false, label %bb556, label %bb542.preheader - -bb542.preheader: ; preds = %xmalloc.exit69 - ret void - -bb556: ; preds = %xmalloc.exit69 - br label %bb583 - -bb583: ; preds = %cond_next693, %bb556 - %k.4342.0 = phi i32 [ %tmp707, %cond_next693 ], [ 0, %bb556 ] ; <i32> [#uses=2] - %tmp586 = icmp eq i32 %k.4342.0, 0 ; <i1> [#uses=1] - br i1 %tmp586, label %cond_true589, label %cond_false608 - -cond_true589: ; preds = %bb583 - br label %cond_next693 - -cond_false608: ; preds = %bb583 - br i1 false, label %bb645, label %cond_next693 - -bb645: ; preds = %cond_false608 - br i1 false, label %bb684, label %cond_next661 - -cond_next661: ; preds = %bb645 - br i1 false, label %bb684, label %cond_next693 - -bb684: ; preds = %cond_next661, %bb645 - br label %cond_next693 - -cond_next693: ; preds = %bb684, %cond_next661, %cond_false608, %cond_true589 - %tmp705 = getelementptr i32* null, i32 0 ; <i32*> [#uses=0] - %tmp707 = add i32 %k.4342.0, 1 ; <i32> [#uses=2] - %tmp711 = icmp sgt i32 %tmp707, 0 ; <i1> [#uses=1] - br i1 %tmp711, label %bb726.preheader, label %bb583 - -bb726.preheader: ; preds = %cond_next693 - ret void -} diff --git a/test/Transforms/LoopIndexSplit/ExitCondition-2007-09-10.ll b/test/Transforms/LoopIndexSplit/ExitCondition-2007-09-10.ll deleted file mode 100644 index a04715a7e952..000000000000 --- a/test/Transforms/LoopIndexSplit/ExitCondition-2007-09-10.ll +++ /dev/null @@ -1,50 +0,0 @@ -; RUN: opt < %s -loop-index-split -disable-output - -@k = external global i32 ; <i32*> [#uses=2] - -define void @foobar(i32 %a, i32 %b) { -entry: - br label %bb - -bb: ; preds = %cond_next16, %entry - %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5] - %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3] - %tmp1 = icmp slt i32 %i.01.0, 50 ; <i1> [#uses=1] - br i1 %tmp1, label %cond_true, label %cond_false - -cond_true: ; preds = %bb - %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1] - %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2] - %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1] - %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1] - br i1 %tmp1015, label %cond_next16, label %cond_true13 - -cond_false: ; preds = %bb - %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0] - %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1] - %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1] - br i1 %tmp10, label %cond_next16, label %cond_true13 - -cond_true13: ; preds = %cond_false, %cond_true - %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1] - %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0] - br label %cond_next16 - -cond_next16: ; preds = %cond_false, %cond_true, %cond_true13 - %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2] - %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3] - %tmp21 = icmp eq i32 %tmp18, 100 ; <i1> [#uses=1] - br i1 %tmp21, label %bb, label %bb24 - -bb24: ; preds = %cond_next16 - %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1] - %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1] - %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0] - ret void -} - -declare i32 @foo(i32) - -declare i32 @bar(i32) - -declare i32 @t(i32, i32) diff --git a/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll b/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll deleted file mode 100644 index d18b3b71aeda..000000000000 --- a/test/Transforms/LoopIndexSplit/OneIterLoop-2007-08-17.ll +++ /dev/null @@ -1,67 +0,0 @@ -; Loop is elimianted -; RUN: opt < %s -loop-index-split -disable-output -stats |& \ -; RUN: grep "loop-index-split" | count 1 - %struct.anon = type { i32 } -@S1 = external global i32 ; <i32*> [#uses=1] -@W1 = external global i32 ; <i32*> [#uses=1] -@Y = weak global [100 x %struct.anon] zeroinitializer, align 32 ; <[100 x %struct.anon]*> [#uses=1] -@ti = external global i32 ; <i32*> [#uses=1] -@T2 = external global [100 x [100 x i32]] ; <[100 x [100 x i32]]*> [#uses=1] -@d = external global i32 ; <i32*> [#uses=1] -@T1 = external global i32 ; <i32*> [#uses=2] -@N2 = external global i32 ; <i32*> [#uses=2] - -define void @foo() { -entry: - %tmp = load i32* @S1, align 4 ; <i32> [#uses=4] - %tmp266 = load i32* @N2, align 4 ; <i32> [#uses=1] - %tmp288 = icmp ult i32 %tmp, %tmp266 ; <i1> [#uses=1] - br i1 %tmp288, label %bb.preheader, label %return - -bb.preheader: ; preds = %entry - %tmp1 = load i32* @W1, align 4 ; <i32> [#uses=1] - %tmp13 = load i32* @ti, align 4 ; <i32> [#uses=1] - %tmp18 = load i32* @d, align 4 ; <i32> [#uses=1] - %tmp26 = load i32* @N2, align 4 ; <i32> [#uses=2] - %T1.promoted = load i32* @T1 ; <i32> [#uses=1] - %tmp2 = add i32 %tmp, 1 ; <i32> [#uses=2] - %tmp4 = icmp ugt i32 %tmp2, %tmp26 ; <i1> [#uses=1] - %umax = select i1 %tmp4, i32 %tmp2, i32 %tmp26 ; <i32> [#uses=1] - %tmp5 = sub i32 0, %tmp ; <i32> [#uses=1] - %tmp6 = add i32 %umax, %tmp5 ; <i32> [#uses=1] - br label %bb - -bb: ; preds = %bb25, %bb.preheader - %indvar = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb25 ] ; <i32> [#uses=2] - %T1.tmp.1 = phi i32 [ %T1.promoted, %bb.preheader ], [ %T1.tmp.0, %bb25 ] ; <i32> [#uses=3] - %tj.01.0 = add i32 %indvar, %tmp ; <i32> [#uses=3] - %tmp3 = icmp eq i32 %tj.01.0, %tmp1 ; <i1> [#uses=1] - br i1 %tmp3, label %cond_true, label %bb25 - -cond_true: ; preds = %bb - %tmp7 = getelementptr [100 x %struct.anon]* @Y, i32 0, i32 %tj.01.0, i32 0 ; <i32*> [#uses=1] - %tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1] - %tmp9 = icmp sgt i32 %tmp8, 0 ; <i1> [#uses=1] - br i1 %tmp9, label %cond_true12, label %bb25 - -cond_true12: ; preds = %cond_true - %tmp16 = getelementptr [100 x [100 x i32]]* @T2, i32 0, i32 %tmp13, i32 %tj.01.0 ; <i32*> [#uses=1] - %tmp17 = load i32* %tmp16, align 4 ; <i32> [#uses=1] - %tmp19 = mul i32 %tmp18, %tmp17 ; <i32> [#uses=1] - %tmp21 = add i32 %tmp19, %T1.tmp.1 ; <i32> [#uses=1] - br label %bb25 - -bb25: ; preds = %cond_true12, %cond_true, %bb - %T1.tmp.0 = phi i32 [ %T1.tmp.1, %bb ], [ %T1.tmp.1, %cond_true ], [ %tmp21, %cond_true12 ] ; <i32> [#uses=2] - %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2] - %exitcond = icmp ne i32 %indvar.next, %tmp6 ; <i1> [#uses=1] - br i1 %exitcond, label %bb, label %return.loopexit - -return.loopexit: ; preds = %bb25 - %T1.tmp.0.lcssa = phi i32 [ %T1.tmp.0, %bb25 ] ; <i32> [#uses=1] - store i32 %T1.tmp.0.lcssa, i32* @T1 - br label %return - -return: ; preds = %return.loopexit, %entry - ret void -} diff --git a/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll b/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll deleted file mode 100644 index ff73a5b44b3e..000000000000 --- a/test/Transforms/LoopIndexSplit/OneIterLoop2-2007-08-17.ll +++ /dev/null @@ -1,69 +0,0 @@ -; Loop is elimianted. Save last value assignment. -; RUN: opt < %s -loop-index-split -disable-output -stats |& \ -; RUN: grep "loop-index-split" | count 1 - - %struct.anon = type { i32 } -@S1 = external global i32 ; <i32*> [#uses=1] -@W1 = external global i32 ; <i32*> [#uses=1] -@Y = weak global [100 x %struct.anon] zeroinitializer, align 32 ; <[100 x %struct.anon]*> [#uses=1] -@ti = external global i32 ; <i32*> [#uses=1] -@T2 = external global [100 x [100 x i32]] ; <[100 x [100 x i32]]*> [#uses=1] -@d = external global i32 ; <i32*> [#uses=1] -@T1 = external global i32 ; <i32*> [#uses=2] -@N1 = external global i32 ; <i32*> [#uses=2] - -define void @foo() { -entry: - %tmp = load i32* @S1, align 4 ; <i32> [#uses=4] - %tmp266 = load i32* @N1, align 4 ; <i32> [#uses=1] - %tmp288 = icmp ult i32 %tmp, %tmp266 ; <i1> [#uses=1] - br i1 %tmp288, label %bb.preheader, label %return - -bb.preheader: ; preds = %entry - %tmp1 = load i32* @W1, align 4 ; <i32> [#uses=1] - %tmp13 = load i32* @ti, align 4 ; <i32> [#uses=1] - %tmp18 = load i32* @d, align 4 ; <i32> [#uses=1] - %tmp26 = load i32* @N1, align 4 ; <i32> [#uses=2] - %T1.promoted = load i32* @T1 ; <i32> [#uses=1] - %tmp2 = add i32 %tmp, 1 ; <i32> [#uses=2] - %tmp4 = icmp ugt i32 %tmp2, %tmp26 ; <i1> [#uses=1] - %umax = select i1 %tmp4, i32 %tmp2, i32 %tmp26 ; <i32> [#uses=1] - %tmp5 = sub i32 0, %tmp ; <i32> [#uses=1] - %tmp6 = add i32 %umax, %tmp5 ; <i32> [#uses=1] - br label %bb - -bb: ; preds = %bb25, %bb.preheader - %indvar = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb25 ] ; <i32> [#uses=2] - %T1.tmp.1 = phi i32 [ %T1.promoted, %bb.preheader ], [ %T1.tmp.0, %bb25 ] ; <i32> [#uses=3] - %tj.01.0 = add i32 %indvar, %tmp ; <i32> [#uses=3] - %tmp24 = add i32 %tj.01.0, 1 ; <i32> [#uses=1] - %tmp3 = icmp eq i32 %tmp24, %tmp1 ; <i1> [#uses=1] - br i1 %tmp3, label %cond_true, label %bb25 - -cond_true: ; preds = %bb - %tmp7 = getelementptr [100 x %struct.anon]* @Y, i32 0, i32 %tj.01.0, i32 0 ; <i32*> [#uses=1] - %tmp8 = load i32* %tmp7, align 4 ; <i32> [#uses=1] - %tmp9 = icmp sgt i32 %tmp8, 0 ; <i1> [#uses=1] - br i1 %tmp9, label %cond_true12, label %bb25 - -cond_true12: ; preds = %cond_true - %tmp16 = getelementptr [100 x [100 x i32]]* @T2, i32 0, i32 %tmp13, i32 %tj.01.0 ; <i32*> [#uses=1] - %tmp17 = load i32* %tmp16, align 4 ; <i32> [#uses=1] - %tmp19 = mul i32 %tmp18, %tmp17 ; <i32> [#uses=1] - %tmp21 = add i32 %tmp19, %T1.tmp.1 ; <i32> [#uses=1] - br label %bb25 - -bb25: ; preds = %cond_true12, %cond_true, %bb - %T1.tmp.0 = phi i32 [ %T1.tmp.1, %bb ], [ %T1.tmp.1, %cond_true ], [ %tmp21, %cond_true12 ] ; <i32> [#uses=2] - %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2] - %exitcond = icmp ne i32 %indvar.next, %tmp6 ; <i1> [#uses=1] - br i1 %exitcond, label %bb, label %return.loopexit - -return.loopexit: ; preds = %bb25 - %T1.tmp.0.lcssa = phi i32 [ %T1.tmp.0, %bb25 ] ; <i32> [#uses=1] - store i32 %T1.tmp.0.lcssa, i32* @T1 - br label %return - -return: ; preds = %return.loopexit, %entry - ret void -} diff --git a/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll b/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll deleted file mode 100644 index 6adb26877680..000000000000 --- a/test/Transforms/LoopIndexSplit/OneIterLoop3-2007-08-17.ll +++ /dev/null @@ -1,34 +0,0 @@ -; Loop is elimianted. Save last value assignments, including induction variable. -; RUN: opt < %s -loop-index-split -disable-output -stats | not grep "loop-index-split" - -declare i32 @foo(i32) -declare i32 @bar(i32, i32) - -define void @foobar(i32 %a, i32 %b) { -entry: - br label %bb - -bb: ; preds = %cond_next, %entry - %i.01.0 = phi i32 [ 0, %entry ], [ %tmp8, %cond_next ] ; <i32> [#uses=3] - %tsum.16.0 = phi i32 [ 42, %entry ], [ %tsum.0, %cond_next ] ; <i32> [#uses=2] - %tmp1 = icmp eq i32 %i.01.0, 50 ; <i1> [#uses=1] - br i1 %tmp1, label %cond_true, label %cond_next - -cond_true: ; preds = %bb - %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1] - %tmp6 = add i32 %tmp4, %tsum.16.0 ; <i32> [#uses=1] - br label %cond_next - -cond_next: ; preds = %bb, %cond_true - %tsum.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.16.0, %bb ] ; <i32> [#uses=2] - %tmp8 = add i32 %i.01.0, 1 ; <i32> [#uses=3] - %tmp11 = icmp slt i32 %tmp8, 100 ; <i1> [#uses=1] - br i1 %tmp11, label %bb, label %bb14 - -bb14: ; preds = %cond_next - %tmp8.lcssa = phi i32 [ %tmp8, %cond_next ] ; <i32> [#uses=1] - %tsum.0.lcssa = phi i32 [ %tsum.0, %cond_next ] ; <i32> [#uses=1] - %tmp17 = tail call i32 @bar( i32 %tmp8.lcssa, i32 %tsum.0.lcssa ) ; <i32> [#uses=0] - ret void -} - diff --git a/test/Transforms/LoopIndexSplit/PR3913.ll b/test/Transforms/LoopIndexSplit/PR3913.ll deleted file mode 100644 index a2bf57c05162..000000000000 --- a/test/Transforms/LoopIndexSplit/PR3913.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: opt < %s -loop-index-split -S | not grep "icmp ne" - -define i32 @main() { -entry: - br label %header - -header: - %r = phi i32 [ 0, %entry ], [ %r3, %skip ] - %i = phi i32 [ 0, %entry ], [ %i1, %skip ] - %cond = icmp eq i32 %i, 99 - br i1 %cond, label %body, label %skip - -body: - br label %skip - -skip: - %r3 = phi i32 [ %r, %header ], [ 3, %body ] - %i1 = add i32 %i, 1 - %exitcond = icmp eq i32 %i1, 10 - br i1 %exitcond, label %exit, label %header - -exit: - ret i32 %r3 -} diff --git a/test/Transforms/LoopIndexSplit/PR4174-2.ll b/test/Transforms/LoopIndexSplit/PR4174-2.ll deleted file mode 100644 index cc17bc0a9337..000000000000 --- a/test/Transforms/LoopIndexSplit/PR4174-2.ll +++ /dev/null @@ -1,38 +0,0 @@ -; RUN: llvm-as < %s | opt -loop-index-split | llvm-dis | not grep clone - -declare void @f() - -define fastcc i32 @main() nounwind { -entry: - br label %bb1552 - -bb1552: - %j295.0.reg2mem.0 = phi i32 [ %storemerge110, %bb1669 ], [ 0, %entry ] - br label %bb1553 - -bb1553: - call void @f() - %tmp1628 = icmp sgt i32 %j295.0.reg2mem.0, -3 - br i1 %tmp1628, label %bb1588, label %bb1616 - -bb1588: - br label %bb1616 - -bb1616: - %tmp1629 = icmp sgt i32 %j295.0.reg2mem.0, -3 - br i1 %tmp1629, label %bb1649, label %bb1632 - -bb1632: - br label %bb1669 - -bb1649: - br label %bb1669 - -bb1669: - %storemerge110 = add i32 %j295.0.reg2mem.0, 1 - %tmp1672 = icmp sgt i32 %storemerge110, 3 - br i1 %tmp1672, label %bb1678, label %bb1552 - -bb1678: - ret i32 0 -} diff --git a/test/Transforms/LoopIndexSplit/PR4174.ll b/test/Transforms/LoopIndexSplit/PR4174.ll deleted file mode 100644 index e8f5a737f05b..000000000000 --- a/test/Transforms/LoopIndexSplit/PR4174.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: llvm-as < %s | opt -loop-index-split | llvm-dis | not grep clone - -declare void @f() - -define i32 @main() { -entry: - br label %head -head: - %i = phi i32 [0, %entry], [%i1, %tail] - call void @f() - %splitcond = icmp slt i32 %i, 2 - br i1 %splitcond, label %yes, label %no -yes: - br label %tail -no: - br label %tail -tail: - %i1 = add i32 %i, 1 - %exitcond = icmp slt i32 %i1, 4 - br i1 %exitcond, label %head, label %exit -exit: - ret i32 0 -} diff --git a/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll b/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll deleted file mode 100644 index fc7d9e9862cb..000000000000 --- a/test/Transforms/LoopIndexSplit/SaveLastValue-2007-08-17.ll +++ /dev/null @@ -1,52 +0,0 @@ -; Split loop. Save last value. -; RUN: opt < %s -loop-index-split -disable-output -stats |& \ -; RUN: grep "loop-index-split" | count 1 - -@k = external global i32 ; <i32*> [#uses=2] - -define void @foobar(i32 %a, i32 %b) { -entry: - br label %bb - -bb: ; preds = %cond_next16, %entry - %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5] - %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3] - %tmp1 = icmp slt i32 %i.01.0, 50 ; <i1> [#uses=1] - br i1 %tmp1, label %cond_true, label %cond_false - -cond_true: ; preds = %bb - %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1] - %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2] - %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1] - %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1] - br i1 %tmp1015, label %cond_next16, label %cond_true13 - -cond_false: ; preds = %bb - %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0] - %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1] - %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1] - br i1 %tmp10, label %cond_next16, label %cond_true13 - -cond_true13: ; preds = %cond_false, %cond_true - %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1] - %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0] - br label %cond_next16 - -cond_next16: ; preds = %cond_false, %cond_true, %cond_true13 - %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2] - %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3] - %tmp21 = icmp slt i32 %tmp18, 100 ; <i1> [#uses=1] - br i1 %tmp21, label %bb, label %bb24 - -bb24: ; preds = %cond_next16 - %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1] - %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1] - %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0] - ret void -} - -declare i32 @foo(i32) - -declare i32 @bar(i32) - -declare i32 @t(i32, i32) diff --git a/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24.ll b/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24.ll deleted file mode 100644 index f61d9671409f..000000000000 --- a/test/Transforms/LoopIndexSplit/SplitValue-2007-08-24.ll +++ /dev/null @@ -1,52 +0,0 @@ -; Split loop. Save last value. Split value is off by one in this example. -; RUN: opt < %s -loop-index-split -disable-output -stats |& \ -; RUN: grep "loop-index-split" | count 1 - -@k = external global i32 ; <i32*> [#uses=2] - -define void @foobar(i32 %a, i32 %b) { -entry: - br label %bb - -bb: ; preds = %cond_next16, %entry - %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5] - %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3] - %tmp1 = icmp sgt i32 %i.01.0, 50 ; <i1> [#uses=1] - br i1 %tmp1, label %cond_true, label %cond_false - -cond_true: ; preds = %bb - %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1] - %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2] - %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1] - %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1] - br i1 %tmp1015, label %cond_next16, label %cond_true13 - -cond_false: ; preds = %bb - %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0] - %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1] - %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1] - br i1 %tmp10, label %cond_next16, label %cond_true13 - -cond_true13: ; preds = %cond_false, %cond_true - %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1] - %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0] - br label %cond_next16 - -cond_next16: ; preds = %cond_false, %cond_true, %cond_true13 - %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2] - %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3] - %tmp21 = icmp slt i32 %tmp18, 100 ; <i1> [#uses=1] - br i1 %tmp21, label %bb, label %bb24 - -bb24: ; preds = %cond_next16 - %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1] - %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1] - %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0] - ret void -} - -declare i32 @foo(i32) - -declare i32 @bar(i32) - -declare i32 @t(i32, i32) diff --git a/test/Transforms/LoopIndexSplit/UpperBound-2007-08-24.ll b/test/Transforms/LoopIndexSplit/UpperBound-2007-08-24.ll deleted file mode 100644 index 17f75d7509e7..000000000000 --- a/test/Transforms/LoopIndexSplit/UpperBound-2007-08-24.ll +++ /dev/null @@ -1,52 +0,0 @@ -; Split loop. Split value is a constant and greater then exit value. -; Check whether optimizer inserts proper checkfor split value or not. -; RUN: opt < %s -loop-index-split -S | grep select - -@k = external global i32 ; <i32*> [#uses=2] - -define void @foobar(i32 %a, i32 %b) { -entry: - br label %bb - -bb: ; preds = %cond_next16, %entry - %i.01.0 = phi i32 [ 0, %entry ], [ %tmp18, %cond_next16 ] ; <i32> [#uses=5] - %tsum.18.0 = phi i32 [ 42, %entry ], [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=3] - %tmp1 = icmp slt i32 %i.01.0, 500 ; <i1> [#uses=1] - br i1 %tmp1, label %cond_true, label %cond_false - -cond_true: ; preds = %bb - %tmp4 = tail call i32 @foo( i32 %i.01.0 ) ; <i32> [#uses=1] - %tmp6 = add i32 %tmp4, %tsum.18.0 ; <i32> [#uses=2] - %tmp914 = load i32* @k, align 4 ; <i32> [#uses=1] - %tmp1015 = icmp eq i32 %tmp914, 0 ; <i1> [#uses=1] - br i1 %tmp1015, label %cond_next16, label %cond_true13 - -cond_false: ; preds = %bb - %tmp8 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0] - %tmp9 = load i32* @k, align 4 ; <i32> [#uses=1] - %tmp10 = icmp eq i32 %tmp9, 0 ; <i1> [#uses=1] - br i1 %tmp10, label %cond_next16, label %cond_true13 - -cond_true13: ; preds = %cond_false, %cond_true - %tsum.013.0 = phi i32 [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=1] - %tmp15 = tail call i32 @bar( i32 %i.01.0 ) ; <i32> [#uses=0] - br label %cond_next16 - -cond_next16: ; preds = %cond_false, %cond_true, %cond_true13 - %tsum.013.1 = phi i32 [ %tsum.013.0, %cond_true13 ], [ %tmp6, %cond_true ], [ %tsum.18.0, %cond_false ] ; <i32> [#uses=2] - %tmp18 = add i32 %i.01.0, 1 ; <i32> [#uses=3] - %tmp21 = icmp slt i32 %tmp18, 100 ; <i1> [#uses=1] - br i1 %tmp21, label %bb, label %bb24 - -bb24: ; preds = %cond_next16 - %tmp18.lcssa = phi i32 [ %tmp18, %cond_next16 ] ; <i32> [#uses=1] - %tsum.013.1.lcssa = phi i32 [ %tsum.013.1, %cond_next16 ] ; <i32> [#uses=1] - %tmp27 = tail call i32 @t( i32 %tmp18.lcssa, i32 %tsum.013.1.lcssa ) ; <i32> [#uses=0] - ret void -} - -declare i32 @foo(i32) - -declare i32 @bar(i32) - -declare i32 @t(i32, i32) diff --git a/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll b/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll deleted file mode 100644 index 6eed98177d09..000000000000 --- a/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll +++ /dev/null @@ -1,195 +0,0 @@ -; RUN: opt < %s -inline -reassociate -loop-rotate -loop-index-split -indvars -simplifycfg -verify -; PR4471 - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" - %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.VEC_basic_block_base = type { i32, i32, [1 x %struct.basic_block_def*] } - %struct.VEC_basic_block_gc = type { %struct.VEC_basic_block_base } - %struct.VEC_edge_base = type { i32, i32, [1 x %struct.edge_def*] } - %struct.VEC_edge_gc = type { %struct.VEC_edge_base } - %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] } - %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base } - %struct.VEC_temp_slot_p_base = type { i32, i32, [1 x %struct.temp_slot*] } - %struct.VEC_temp_slot_p_gc = type { %struct.VEC_temp_slot_p_base } - %struct.VEC_tree_base = type { i32, i32, [1 x %struct.tree_node*] } - %struct.VEC_tree_gc = type { %struct.VEC_tree_base } - %struct.__sbuf = type { i8*, i32 } - %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } - %struct.basic_block_def = type { %struct.tree_node*, %struct.VEC_edge_gc*, %struct.VEC_edge_gc*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_il_dependent, %struct.tree_node*, %struct.edge_prediction*, i64, i32, i32, i32, i32 } - %struct.basic_block_il_dependent = type { %struct.rtl_bb_info* } - %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [2 x i64] } - %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* } - %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } - %struct.block_symbol = type { [3 x %struct.rtunion], %struct.object_block*, i64 } - %struct.case_node = type { %struct.case_node*, %struct.case_node*, %struct.case_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } - %struct.control_flow_graph = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.VEC_basic_block_gc*, i32, i32, i32, %struct.VEC_basic_block_gc*, i32 } - %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.__sbuf*, i32, i32, i64, i32 } - %struct.edge_def_insns = type { %struct.rtx_def* } - %struct.edge_prediction = type opaque - %struct.eh_status = type opaque - %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.__sbuf, i32, i8*, %struct.rtx_def** } - %struct.et_node = type opaque - %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } - %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.control_flow_graph*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.VEC_temp_slot_p_gc*, %struct.temp_slot*, %struct.var_refs_queue*, i32, i32, i32, i32, %struct.machine_function*, i32, i32, %struct.language_function*, %struct.htab*, %struct.rtx_def*, i32, i32, %struct.__sbuf, %struct.VEC_tree_gc*, %struct.tree_node*, i8*, i8*, i8*, i8*, i8*, %struct.tree_node*, i8, i8, i8, i8, i8 } - %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i64, i64, i64, i32, i32, i8* (i64, i64)*, void (i8*)*, i8*, i8* (i8*, i64, i64)*, void (i8*, i8*)*, i32 } - %struct.initial_value_struct = type opaque - %struct.lang_decl = type opaque - %struct.language_function = type opaque - %struct.loop = type opaque - %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, [4 x i32], i32, i32, i32 } - %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* } - %struct.obstack = type { i64, %struct._obstack_chunk*, i8*, i8*, i8*, i64, i32, %struct._obstack_chunk* (i8*, i64)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 } - %struct.omp_clause_subcode = type { i32 } - %struct.rtl_bb_info = type { %struct.rtx_def*, %struct.rtx_def*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, %struct.rtx_def*, %struct.rtx_def*, i32 } - %struct.rtunion = type { i8* } - %struct.rtx_def = type { i16, i8, i8, %struct.u } - %struct.section = type { %struct.unnamed_section } - %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } - %struct.stack_local_entry = type opaque - %struct.temp_slot = type opaque - %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8 } - %struct.tree_decl_common = type { %struct.tree_decl_minimal, %struct.tree_node*, i8, i8, i8, i8, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } - %struct.tree_decl_minimal = type { %struct.tree_common, %struct.__sbuf, i32, %struct.tree_node*, %struct.tree_node* } - %struct.tree_decl_non_common = type { %struct.tree_decl_with_vis, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } - %struct.tree_decl_u1 = type { i64 } - %struct.tree_decl_with_rtl = type { %struct.tree_decl_common, %struct.rtx_def* } - %struct.tree_decl_with_vis = type { %struct.tree_decl_with_rtl, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 } - %struct.tree_function_decl = type { %struct.tree_decl_non_common, i8, i8, %struct.function* } - %struct.tree_node = type { %struct.tree_function_decl } - %struct.u = type { %struct.block_symbol } - %struct.unnamed_section = type { %struct.omp_clause_subcode, void (i8*)*, i8*, %struct.section* } - %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } - %struct.varasm_status = type opaque - %union.tree_ann_d = type opaque - -define void @emit_case_bit_tests(%struct.tree_node* %index_type, %struct.tree_node* %index_expr, %struct.tree_node* %minval, %struct.tree_node* %range, %struct.case_node* %nodes, %struct.rtx_def* %default_label) nounwind { -entry: - br label %bb17 - -bb: ; preds = %bb17 - %0 = call i64 @tree_low_cst(%struct.tree_node* undef, i32 1) nounwind ; <i64> [#uses=1] - %1 = trunc i64 %0 to i32 ; <i32> [#uses=1] - br label %bb15 - -bb10: ; preds = %bb15 - %2 = icmp ugt i32 %j.0, 63 ; <i1> [#uses=1] - br i1 %2, label %bb11, label %bb12 - -bb11: ; preds = %bb10 - %3 = zext i32 0 to i64 ; <i64> [#uses=0] - br label %bb14 - -bb12: ; preds = %bb10 - %4 = or i64 undef, undef ; <i64> [#uses=0] - br label %bb14 - -bb14: ; preds = %bb12, %bb11 - %5 = add i32 %j.0, 1 ; <i32> [#uses=1] - br label %bb15 - -bb15: ; preds = %bb14, %bb - %j.0 = phi i32 [ %1, %bb ], [ %5, %bb14 ] ; <i32> [#uses=3] - %6 = icmp ugt i32 %j.0, undef ; <i1> [#uses=1] - br i1 %6, label %bb16, label %bb10 - -bb16: ; preds = %bb15 - br label %bb17 - -bb17: ; preds = %bb16, %entry - br i1 undef, label %bb18, label %bb - -bb18: ; preds = %bb17 - unreachable -} - -declare i64 @tree_low_cst(%struct.tree_node*, i32) - -define void @expand_case(%struct.tree_node* %exp) nounwind { -entry: - br i1 undef, label %bb2, label %bb - -bb: ; preds = %entry - unreachable - -bb2: ; preds = %entry - br i1 undef, label %bb3, label %bb4 - -bb3: ; preds = %bb2 - unreachable - -bb4: ; preds = %bb2 - br i1 undef, label %bb127, label %bb5 - -bb5: ; preds = %bb4 - br i1 undef, label %bb6, label %bb7 - -bb6: ; preds = %bb5 - unreachable - -bb7: ; preds = %bb5 - br i1 undef, label %bb9, label %bb8 - -bb8: ; preds = %bb7 - unreachable - -bb9: ; preds = %bb7 - br i1 undef, label %bb11, label %bb10 - -bb10: ; preds = %bb9 - unreachable - -bb11: ; preds = %bb9 - br i1 undef, label %bb37, label %bb21 - -bb21: ; preds = %bb11 - unreachable - -bb37: ; preds = %bb11 - br i1 undef, label %bb38, label %bb39 - -bb38: ; preds = %bb37 - ret void - -bb39: ; preds = %bb37 - br i1 undef, label %bb59, label %bb40 - -bb40: ; preds = %bb39 - br i1 undef, label %bb41, label %bb59 - -bb41: ; preds = %bb40 - br i1 undef, label %bb42, label %bb59 - -bb42: ; preds = %bb41 - br i1 undef, label %bb43, label %bb59 - -bb43: ; preds = %bb42 - br i1 undef, label %bb59, label %bb44 - -bb44: ; preds = %bb43 - br i1 undef, label %bb56, label %bb58 - -bb56: ; preds = %bb44 - unreachable - -bb58: ; preds = %bb44 - call void @emit_case_bit_tests(%struct.tree_node* undef, %struct.tree_node* undef, %struct.tree_node* null, %struct.tree_node* undef, %struct.case_node* undef, %struct.rtx_def* undef) nounwind - br i1 undef, label %bb126, label %bb125 - -bb59: ; preds = %bb43, %bb42, %bb41, %bb40, %bb39 - br i1 undef, label %bb70, label %bb60 - -bb60: ; preds = %bb59 - unreachable - -bb70: ; preds = %bb59 - unreachable - -bb125: ; preds = %bb58 - unreachable - -bb126: ; preds = %bb58 - unreachable - -bb127: ; preds = %bb4 - ret void -} diff --git a/test/Transforms/LoopRotate/LRCrash-1.ll b/test/Transforms/LoopRotate/LRCrash-1.ll deleted file mode 100644 index f16dd0487d23..000000000000 --- a/test/Transforms/LoopRotate/LRCrash-1.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output - - %struct.relation = type { [4 x i16], i32, [4 x i16], i32, i32 } - -define void @findAllPairs() { -entry: - br i1 false, label %bb139, label %bb10.i44 -bb10.i44: ; preds = %entry - ret void -bb127: ; preds = %bb139 - br label %bb139 -bb139: ; preds = %bb127, %entry - br i1 false, label %bb127, label %bb142 -bb142: ; preds = %bb139 - %r91.0.lcssa = phi %struct.relation* [ null, %bb139 ] ; <%struct.relation*> [#uses=0] - ret void -} - diff --git a/test/Transforms/LoopRotate/LRCrash-2.ll b/test/Transforms/LoopRotate/LRCrash-2.ll deleted file mode 100644 index 0a10989ae103..000000000000 --- a/test/Transforms/LoopRotate/LRCrash-2.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output - -define void @findAllPairs() { -entry: - br i1 false, label %bb139, label %cond_true -cond_true: ; preds = %entry - ret void -bb90: ; preds = %bb139 - br i1 false, label %bb136, label %cond_next121 -cond_next121: ; preds = %bb90 - br i1 false, label %bb136, label %bb127 -bb127: ; preds = %cond_next121 - br label %bb136 -bb136: ; preds = %bb127, %cond_next121, %bb90 - %changes.1 = phi i32 [ %changes.2, %bb90 ], [ %changes.2, %cond_next121 ], [ 1, %bb127 ] ; <i32> [#uses=1] - br label %bb139 -bb139: ; preds = %bb136, %entry - %changes.2 = phi i32 [ %changes.1, %bb136 ], [ 0, %entry ] ; <i32> [#uses=3] - br i1 false, label %bb90, label %bb142 -bb142: ; preds = %bb139 - %changes.2.lcssa = phi i32 [ %changes.2, %bb139 ] ; <i32> [#uses=0] - ret void -} - diff --git a/test/Transforms/LoopRotate/LRCrash-3.ll b/test/Transforms/LoopRotate/LRCrash-3.ll deleted file mode 100644 index 79f21fb40df7..000000000000 --- a/test/Transforms/LoopRotate/LRCrash-3.ll +++ /dev/null @@ -1,29 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output - -define void @_ZN9Classfile4readEv() { -entry: - br i1 false, label %cond_false485, label %bb405 -bb405: ; preds = %entry - ret void -cond_false485: ; preds = %entry - br label %bb830 -bb511: ; preds = %bb830 - br i1 false, label %bb816, label %bb830 -cond_next667: ; preds = %bb816 - br i1 false, label %cond_next695, label %bb680 -bb676: ; preds = %bb680 - br label %bb680 -bb680: ; preds = %bb676, %cond_next667 - %iftmp.68.0 = zext i1 false to i8 ; <i8> [#uses=1] - br i1 false, label %bb676, label %cond_next695 -cond_next695: ; preds = %bb680, %cond_next667 - %iftmp.68.2 = phi i8 [ %iftmp.68.0, %bb680 ], [ undef, %cond_next667 ] ; <i8> [#uses=0] - ret void -bb816: ; preds = %bb816, %bb511 - br i1 false, label %cond_next667, label %bb816 -bb830: ; preds = %bb511, %cond_false485 - br i1 false, label %bb511, label %bb835 -bb835: ; preds = %bb830 - ret void -} - diff --git a/test/Transforms/LoopRotate/LRCrash-4.ll b/test/Transforms/LoopRotate/LRCrash-4.ll deleted file mode 100644 index 7d35c16f337a..000000000000 --- a/test/Transforms/LoopRotate/LRCrash-4.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output - -define void @InterpretSEIMessage(i8* %msg) { -entry: - br label %bb15 -bb6: ; preds = %bb15 - %gep.upgrd.1 = zext i32 %offset.1 to i64 ; <i64> [#uses=1] - %tmp11 = getelementptr i8* %msg, i64 %gep.upgrd.1 ; <i8*> [#uses=0] - br label %bb15 -bb15: ; preds = %bb6, %entry - %offset.1 = add i32 0, 1 ; <i32> [#uses=2] - br i1 false, label %bb6, label %bb17 -bb17: ; preds = %bb15 - %offset.1.lcssa = phi i32 [ %offset.1, %bb15 ] ; <i32> [#uses=0] - %payload_type.1.lcssa = phi i32 [ 0, %bb15 ] ; <i32> [#uses=0] - ret void -} - diff --git a/test/Transforms/LoopRotate/LRCrash-5.ll b/test/Transforms/LoopRotate/LRCrash-5.ll deleted file mode 100644 index 6643cc176c72..000000000000 --- a/test/Transforms/LoopRotate/LRCrash-5.ll +++ /dev/null @@ -1,26 +0,0 @@ -; RUN: opt < %s -loop-rotate -verify-dom-info -verify-loop-info -disable-output -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-apple-darwin9" - %struct.NSArray = type { %struct.NSObject } - %struct.NSObject = type { %struct.objc_class* } - %struct.NSRange = type { i64, i64 } - %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* } - %struct.objc_class = type opaque - %struct.objc_selector = type opaque -@"\01L_OBJC_MESSAGE_REF_26" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1] - -define %struct.NSArray* @"-[NSString(DocSetPrivateAddition) _dsa_stringAsPathComponent]"(%struct.NSArray* %self, %struct._message_ref_t* %_cmd) { -entry: - br label %bb116 - -bb116: ; preds = %bb131, %entry - %tmp123 = call %struct.NSRange null( %struct.NSObject* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_26", %struct.NSArray* null ) ; <%struct.NSRange> [#uses=1] - br i1 false, label %bb141, label %bb131 - -bb131: ; preds = %bb116 - %mrv_gr125 = getresult %struct.NSRange %tmp123, 1 ; <i64> [#uses=0] - br label %bb116 - -bb141: ; preds = %bb116 - ret %struct.NSArray* null -} diff --git a/test/Transforms/LoopRotate/basic.ll b/test/Transforms/LoopRotate/basic.ll new file mode 100644 index 000000000000..b7bcb21d56f8 --- /dev/null +++ b/test/Transforms/LoopRotate/basic.ll @@ -0,0 +1,35 @@ +; RUN: opt -S -loop-rotate %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; PR5319 - The "arrayidx" gep should be hoisted, not duplicated. We should +; end up with one phi node. +define void @test1() nounwind ssp { +; CHECK: @test1 +entry: + %array = alloca [20 x i32], align 16 + br label %for.cond + +for.cond: ; preds = %for.body, %entry + %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %cmp = icmp slt i32 %i.0, 100 + %arrayidx = getelementptr inbounds [20 x i32]* %array, i64 0, i64 0 + br i1 %cmp, label %for.body, label %for.end + +; CHECK: for.body: +; CHECK-NEXT: phi i32 [ 0 +; CHECK-NEXT: store i32 0 + +for.body: ; preds = %for.cond + store i32 0, i32* %arrayidx, align 16 + %inc = add nsw i32 %i.0, 1 + br label %for.cond + +for.end: ; preds = %for.cond + %arrayidx.lcssa = phi i32* [ %arrayidx, %for.cond ] + call void @g(i32* %arrayidx.lcssa) nounwind + ret void +} + +declare void @g(i32*) + diff --git a/test/Transforms/LoopRotate/crash.ll b/test/Transforms/LoopRotate/crash.ll new file mode 100644 index 000000000000..9dc9862d150a --- /dev/null +++ b/test/Transforms/LoopRotate/crash.ll @@ -0,0 +1,139 @@ +; RUN: opt -loop-rotate %s -disable-output -verify-dom-info -verify-loop-info + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; PR8955 - Rotating an outer loop that has a condbr for a latch block. +define void @test1() nounwind ssp { +entry: + br label %lbl_283 + +lbl_283: ; preds = %if.end, %entry + br i1 undef, label %if.else, label %if.then + +if.then: ; preds = %lbl_283 + br i1 undef, label %if.end, label %for.condthread-pre-split + +for.condthread-pre-split: ; preds = %if.then + br label %for.cond + +for.cond: ; preds = %for.cond, %for.condthread-pre-split + br i1 undef, label %lbl_281, label %for.cond + +lbl_281: ; preds = %if.end, %for.cond + br label %if.end + +if.end: ; preds = %lbl_281, %if.then + br i1 undef, label %lbl_283, label %lbl_281 + +if.else: ; preds = %lbl_283 + ret void +} + + %struct.relation = type { [4 x i16], i32, [4 x i16], i32, i32 } + +define void @test2() { +entry: + br i1 false, label %bb139, label %bb10.i44 +bb10.i44: ; preds = %entry + ret void +bb127: ; preds = %bb139 + br label %bb139 +bb139: ; preds = %bb127, %entry + br i1 false, label %bb127, label %bb142 +bb142: ; preds = %bb139 + %r91.0.lcssa = phi %struct.relation* [ null, %bb139 ] ; <%struct.relation*> [#uses=0] + ret void +} + + +define void @test3() { +entry: + br i1 false, label %bb139, label %cond_true +cond_true: ; preds = %entry + ret void +bb90: ; preds = %bb139 + br i1 false, label %bb136, label %cond_next121 +cond_next121: ; preds = %bb90 + br i1 false, label %bb136, label %bb127 +bb127: ; preds = %cond_next121 + br label %bb136 +bb136: ; preds = %bb127, %cond_next121, %bb90 + %changes.1 = phi i32 [ %changes.2, %bb90 ], [ %changes.2, %cond_next121 ], [ 1, %bb127 ] ; <i32> [#uses=1] + br label %bb139 +bb139: ; preds = %bb136, %entry + %changes.2 = phi i32 [ %changes.1, %bb136 ], [ 0, %entry ] ; <i32> [#uses=3] + br i1 false, label %bb90, label %bb142 +bb142: ; preds = %bb139 + %changes.2.lcssa = phi i32 [ %changes.2, %bb139 ] ; <i32> [#uses=0] + ret void +} + +define void @test4() { +entry: + br i1 false, label %cond_false485, label %bb405 +bb405: ; preds = %entry + ret void +cond_false485: ; preds = %entry + br label %bb830 +bb511: ; preds = %bb830 + br i1 false, label %bb816, label %bb830 +cond_next667: ; preds = %bb816 + br i1 false, label %cond_next695, label %bb680 +bb676: ; preds = %bb680 + br label %bb680 +bb680: ; preds = %bb676, %cond_next667 + %iftmp.68.0 = zext i1 false to i8 ; <i8> [#uses=1] + br i1 false, label %bb676, label %cond_next695 +cond_next695: ; preds = %bb680, %cond_next667 + %iftmp.68.2 = phi i8 [ %iftmp.68.0, %bb680 ], [ undef, %cond_next667 ] ; <i8> [#uses=0] + ret void +bb816: ; preds = %bb816, %bb511 + br i1 false, label %cond_next667, label %bb816 +bb830: ; preds = %bb511, %cond_false485 + br i1 false, label %bb511, label %bb835 +bb835: ; preds = %bb830 + ret void +} + + %struct.NSArray = type { %struct.NSObject } + %struct.NSObject = type { %struct.objc_class* } + %struct.NSRange = type { i64, i64 } + %struct._message_ref_t = type { %struct.NSObject* (%struct.NSObject*, %struct._message_ref_t*, ...)*, %struct.objc_selector* } + %struct.objc_class = type opaque + %struct.objc_selector = type opaque +@"\01L_OBJC_MESSAGE_REF_26" = external global %struct._message_ref_t ; <%struct._message_ref_t*> [#uses=1] + +define %struct.NSArray* @test5(%struct.NSArray* %self, %struct._message_ref_t* %_cmd) { +entry: + br label %bb116 + +bb116: ; preds = %bb131, %entry + %tmp123 = call %struct.NSRange null( %struct.NSObject* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_26", %struct.NSArray* null ) ; <%struct.NSRange> [#uses=1] + br i1 false, label %bb141, label %bb131 + +bb131: ; preds = %bb116 + %mrv_gr125 = getresult %struct.NSRange %tmp123, 1 ; <i64> [#uses=0] + br label %bb116 + +bb141: ; preds = %bb116 + ret %struct.NSArray* null +} + +define void @test6(i8* %msg) { +entry: + br label %bb15 +bb6: ; preds = %bb15 + %gep.upgrd.1 = zext i32 %offset.1 to i64 ; <i64> [#uses=1] + %tmp11 = getelementptr i8* %msg, i64 %gep.upgrd.1 ; <i8*> [#uses=0] + br label %bb15 +bb15: ; preds = %bb6, %entry + %offset.1 = add i32 0, 1 ; <i32> [#uses=2] + br i1 false, label %bb6, label %bb17 +bb17: ; preds = %bb15 + %offset.1.lcssa = phi i32 [ %offset.1, %bb15 ] ; <i32> [#uses=0] + %payload_type.1.lcssa = phi i32 [ 0, %bb15 ] ; <i32> [#uses=0] + ret void +} + + diff --git a/test/Transforms/LoopRotate/dbgvalue.ll b/test/Transforms/LoopRotate/dbgvalue.ll new file mode 100644 index 000000000000..92871780a4da --- /dev/null +++ b/test/Transforms/LoopRotate/dbgvalue.ll @@ -0,0 +1,59 @@ +; RUN: opt -S -loop-rotate %s | FileCheck %s + +; CHECK: entry +; CHECK-NEXT: call void @llvm.dbg.value(metadata !{i32 %x} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +define i32 @tak(i32 %x, i32 %y, i32 %z) nounwind ssp { +entry: + br label %tailrecurse + +tailrecurse: ; preds = %if.then, %entry + %x.tr = phi i32 [ %x, %entry ], [ %call, %if.then ] + %y.tr = phi i32 [ %y, %entry ], [ %call9, %if.then ] + %z.tr = phi i32 [ %z, %entry ], [ %call14, %if.then ] + tail call void @llvm.dbg.value(metadata !{i32 %x.tr}, i64 0, metadata !6), !dbg !7 + tail call void @llvm.dbg.value(metadata !{i32 %y.tr}, i64 0, metadata !8), !dbg !9 + tail call void @llvm.dbg.value(metadata !{i32 %z.tr}, i64 0, metadata !10), !dbg !11 + %cmp = icmp slt i32 %y.tr, %x.tr, !dbg !12 + br i1 %cmp, label %if.then, label %if.end, !dbg !12 + +if.then: ; preds = %tailrecurse + %sub = sub nsw i32 %x.tr, 1, !dbg !14 + %call = tail call i32 @tak(i32 %sub, i32 %y.tr, i32 %z.tr), !dbg !14 + %sub6 = sub nsw i32 %y.tr, 1, !dbg !14 + %call9 = tail call i32 @tak(i32 %sub6, i32 %z.tr, i32 %x.tr), !dbg !14 + %sub11 = sub nsw i32 %z.tr, 1, !dbg !14 + %call14 = tail call i32 @tak(i32 %sub11, i32 %x.tr, i32 %y.tr), !dbg !14 + br label %tailrecurse + +if.end: ; preds = %tailrecurse + br label %return, !dbg !16 + +return: ; preds = %if.end + ret i32 %z.tr, !dbg !17 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"tak", metadata !"tak", metadata !"", metadata !1, i32 32, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i32 (i32, i32, i32)* @tak} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/Volumes/Lalgate/cj/llvm/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame/recursive.c", metadata !"/Volumes/Lalgate/cj/D/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/Volumes/Lalgate/cj/llvm/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame/recursive.c", metadata !"/Volumes/Lalgate/cj/D/projects/llvm-test/SingleSource/Benchmarks/BenchmarkGame", metadata !"clang version 2.9 (trunk 125492)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 590081, metadata !0, metadata !"x", metadata !1, i32 32, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!7 = metadata !{i32 32, i32 13, metadata !0, null} +!8 = metadata !{i32 590081, metadata !0, metadata !"y", metadata !1, i32 32, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!9 = metadata !{i32 32, i32 20, metadata !0, null} +!10 = metadata !{i32 590081, metadata !0, metadata !"z", metadata !1, i32 32, metadata !5, i32 0} ; [ DW_TAG_arg_variable ] +!11 = metadata !{i32 32, i32 27, metadata !0, null} +!12 = metadata !{i32 33, i32 3, metadata !13, null} +!13 = metadata !{i32 589835, metadata !0, i32 32, i32 30, metadata !1, i32 6} ; [ DW_TAG_lexical_block ] +!14 = metadata !{i32 34, i32 5, metadata !15, null} +!15 = metadata !{i32 589835, metadata !13, i32 33, i32 14, metadata !1, i32 7} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 36, i32 3, metadata !13, null} +!17 = metadata !{i32 37, i32 1, metadata !13, null} diff --git a/test/Transforms/LoopRotate/phi-duplicate.ll b/test/Transforms/LoopRotate/phi-duplicate.ll index 5403e723ee15..737283092250 100644 --- a/test/Transforms/LoopRotate/phi-duplicate.ll +++ b/test/Transforms/LoopRotate/phi-duplicate.ll @@ -28,20 +28,13 @@ for.end: ; preds = %for.cond ret void } -; Should only end up with one phi. Also, the original for.cond block should -; be moved to the end of the loop so that the new loop header pleasantly -; ends up at the top. - +; Should only end up with one phi. ; CHECK: define void @test ; CHECK-NEXT: entry: -; CHECK-NEXT: icmp slt i64 -; CHECK-NEXT: br i1 -; CHECK-NOT: : -; CHECK: bb.nph: ; CHECK-NEXT: br label %for.body -; CHECK-NOT: : ; CHECK: for.body: -; CHECK-NEXT: %j.02 = phi i64 -; CHECK-NOT: phi -; CHECK: ret void -; CHECK-NEXT: } +; CHECK-NEXT: %j.01 = phi i64 +; CHECK-NOT: br +; CHECK: br i1 %cmp, label %for.body, label %for.end +; CHECK: for.end: +; CHECK-NEXT: ret void diff --git a/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll b/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll index bf862f69e94b..66bf1a0caa97 100644 --- a/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll +++ b/test/Transforms/LoopSimplify/2003-04-25-AssertFail.ll @@ -1,7 +1,7 @@ ; This testcase exposed a problem with the loop identification pass (LoopInfo). ; Basically, it was incorrectly calculating the loop nesting information. ; -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @yylex() { br label %loopentry.0 diff --git a/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll b/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll index cd9749bbf6d0..2b2afae36613 100644 --- a/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll +++ b/test/Transforms/LoopSimplify/2003-05-12-PreheaderExitOfChild.ll @@ -2,7 +2,7 @@ ; inserted for the "fail" loop, but the exit block of a loop is not updated ; to be the preheader instead of the exit loop itself. -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define i32 @re_match_2() { br label %loopentry.1 loopentry.1: ; preds = %endif.82, %0 diff --git a/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll b/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll index a5d0ba7ad76a..aae8476c8300 100644 --- a/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll +++ b/test/Transforms/LoopSimplify/2004-02-05-DominatorInfoCorruption.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -verify -licm -disable-output +; RUN: opt < %s -loop-simplify -verify -licm -disable-output define void @.subst_48() { entry: diff --git a/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll b/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll index dc5c31354641..3e7661ecb572 100644 --- a/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll +++ b/test/Transforms/LoopSimplify/2004-03-15-IncorrectDomUpdate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -licm -disable-output +; RUN: opt < %s -loop-simplify -licm -disable-output define void @main() { entry: br i1 false, label %Out, label %loop diff --git a/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll b/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll index 721f9b3a0340..c29383764af6 100644 --- a/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll +++ b/test/Transforms/LoopSimplify/2004-04-01-IncorrectDomUpdate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -licm -disable-output +; RUN: opt < %s -loop-simplify -licm -disable-output ; This is PR306 diff --git a/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll b/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll index cbdfe8bbc0ae..c522ec9463b7 100644 --- a/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll +++ b/test/Transforms/LoopSimplify/2004-04-12-LoopSimplify-SwitchBackedges.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -disable-output +; RUN: opt < %s -loop-simplify -disable-output define void @test() { loopentry.0: diff --git a/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll b/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll index 4fe6e2156f97..5818808ae0cd 100644 --- a/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll +++ b/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -scalarrepl -loopsimplify -licm -disable-output -verify-dom-info -verify-loop-info +; RUN: opt < %s -scalarrepl -loop-simplify -licm -disable-output -verify-dom-info -verify-loop-info define void @inflate() { entry: diff --git a/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll b/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll index 10202dcf98ce..e73fff18bc5d 100644 --- a/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll +++ b/test/Transforms/LoopSimplify/2007-10-28-InvokeCrash.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -disable-output +; RUN: opt < %s -loop-simplify -disable-output ; PR1752 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32" target triple = "i686-pc-mingw32" diff --git a/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll b/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll index 2a1ee7d1a72f..f179da234cb1 100644 --- a/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll +++ b/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -domfrontier -loopsimplify -domfrontier -verify-dom-info -analyze +; RUN: opt < %s -domfrontier -loop-simplify -domfrontier -verify-dom-info -analyze define void @a() nounwind { diff --git a/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll b/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll new file mode 100644 index 000000000000..00f520bf7975 --- /dev/null +++ b/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll @@ -0,0 +1,43 @@ +; RUN: opt < %s -loop-simplify -S +; PR8702 +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-freebsd9.0" + +declare void @foo(i32 %x) + +define fastcc void @inm_merge() nounwind { +entry: + br label %for.cond + +for.cond: ; preds = %while.cond36.i, %entry + br i1 undef, label %do.body, label %for.body + +for.body: ; preds = %for.cond + br i1 undef, label %while.cond36.i, label %if.end44 + +if.end44: ; preds = %for.body + %call49 = call fastcc i32 @inm_get_source() + br i1 undef, label %if.end54, label %for.cond64 + +if.end54: ; preds = %if.end44 + br label %while.cond36.i + +while.cond36.i: ; preds = %if.end54, %for.body + br label %for.cond + +for.cond64: ; preds = %if.end88, %for.cond64, %if.end44 + %error.161 = phi i32 [ %error.161, %for.cond64 ], [ %error.161, %if.end88 ], [ %call49, %if.end44 ] + call void @foo(i32 %error.161) + br i1 undef, label %for.cond64, label %if.end88 + +if.end88: ; preds = %for.cond64 + br i1 undef, label %for.cond64, label %if.end98 + +if.end98: ; preds = %if.end88 + unreachable + +do.body: ; preds = %for.cond + unreachable +} + +declare fastcc i32 @inm_get_source() nounwind diff --git a/test/Transforms/LoopSimplify/basictest.ll b/test/Transforms/LoopSimplify/basictest.ll index 4241d8ad0895..6b31848a94bd 100644 --- a/test/Transforms/LoopSimplify/basictest.ll +++ b/test/Transforms/LoopSimplify/basictest.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify ; This function should get a preheader inserted before BB3, that is jumped ; to by BB1 & BB2 diff --git a/test/Transforms/LoopSimplify/hardertest.ll b/test/Transforms/LoopSimplify/hardertest.ll index e0a7f81603b0..1ccb396490ca 100644 --- a/test/Transforms/LoopSimplify/hardertest.ll +++ b/test/Transforms/LoopSimplify/hardertest.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify +; RUN: opt < %s -loop-simplify define void @foo(i1 %C) { br i1 %C, label %T, label %F diff --git a/test/Transforms/LoopSimplify/indirectbr-backedge.ll b/test/Transforms/LoopSimplify/indirectbr-backedge.ll index ca6e47fcecd3..7eabc09cd7da 100644 --- a/test/Transforms/LoopSimplify/indirectbr-backedge.ll +++ b/test/Transforms/LoopSimplify/indirectbr-backedge.ll @@ -1,4 +1,4 @@ -; RUN: opt -loopsimplify -S < %s | FileCheck %s +; RUN: opt -loop-simplify -S < %s | FileCheck %s ; LoopSimplify shouldn't split loop backedges that use indirectbr. diff --git a/test/Transforms/LoopSimplify/indirectbr.ll b/test/Transforms/LoopSimplify/indirectbr.ll index 2e4549d1e9c0..9814d4ad93f1 100644 --- a/test/Transforms/LoopSimplify/indirectbr.ll +++ b/test/Transforms/LoopSimplify/indirectbr.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -lcssa -verify-loop-info -verify-dom-info -S \ +; RUN: opt < %s -loop-simplify -lcssa -verify-loop-info -verify-dom-info -S \ ; RUN: | grep -F {indirectbr i8* %x, \[label %L0, label %L1\]} \ ; RUN: | count 6 diff --git a/test/Transforms/LoopSimplify/merge-exits.ll b/test/Transforms/LoopSimplify/merge-exits.ll index 0e15f081a864..93a224744ca3 100644 --- a/test/Transforms/LoopSimplify/merge-exits.ll +++ b/test/Transforms/LoopSimplify/merge-exits.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loopsimplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info > %t +; RUN: opt < %s -loop-simplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info > %t ; RUN: not grep sext %t ; RUN: grep {phi i64} %t | count 1 diff --git a/test/Transforms/LoopSimplify/phi-node-simplify.ll b/test/Transforms/LoopSimplify/phi-node-simplify.ll index 5e957ccbd880..8eb63d9111a7 100644 --- a/test/Transforms/LoopSimplify/phi-node-simplify.ll +++ b/test/Transforms/LoopSimplify/phi-node-simplify.ll @@ -1,5 +1,5 @@ ; Loop Simplify should turn phi nodes like X = phi [X, Y] into just Y, eliminating them. -; RUN: opt < %s -loopsimplify -S | grep phi | count 6 +; RUN: opt < %s -loop-simplify -S | grep phi | count 6 @A = weak global [3000000 x i32] zeroinitializer ; <[3000000 x i32]*> [#uses=1] @B = weak global [20000 x i32] zeroinitializer ; <[20000 x i32]*> [#uses=1] diff --git a/test/Transforms/LoopSimplify/unreachable-loop-pred.ll b/test/Transforms/LoopSimplify/unreachable-loop-pred.ll index faaaf97d72fa..76b7bb21e468 100644 --- a/test/Transforms/LoopSimplify/unreachable-loop-pred.ll +++ b/test/Transforms/LoopSimplify/unreachable-loop-pred.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -loopsimplify -disable-output -verify-loop-info -verify-dom-info < %s +; RUN: opt -S -loop-simplify -disable-output -verify-loop-info -verify-dom-info < %s ; PR5235 ; When loopsimplify inserts a preheader for this loop, it should add the new diff --git a/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll b/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll new file mode 100644 index 000000000000..7982fbc8c4a5 --- /dev/null +++ b/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll @@ -0,0 +1,32 @@ +; RUN: opt < %s -loop-reduce -verify +target triple = "x86_64-apple-darwin10" + +define void @myquicksort(i8* %a) nounwind ssp { +entry: + br i1 undef, label %loop1, label %return + +loop1: ; preds = %bb13.loopexit, %entry + %indvar419 = phi i64 [ %indvar.next420, %loop2.exit ], [ 0, %entry ] + %tmp474 = shl i64 %indvar419, 2 + %tmp484 = add i64 %tmp474, 4 + br label %loop2 + +loop2: ; preds = %loop1, %loop2.backedge + %indvar414 = phi i64 [ %indvar.next415, %loop2.backedge ], [ 0, %loop1 ] + %tmp473 = mul i64 %indvar414, -4 + %tmp485 = add i64 %tmp484, %tmp473 + %storemerge4 = getelementptr i8* %a, i64 %tmp485 + %0 = icmp ugt i8* %storemerge4, %a + br i1 false, label %loop2.exit, label %loop2.backedge + +loop2.backedge: ; preds = %loop2 + %indvar.next415 = add i64 %indvar414, 1 + br label %loop2 + +loop2.exit: ; preds = %loop2 + %indvar.next420 = add i64 %indvar419, 1 + br i1 undef, label %loop1, label %return + +return: ; preds = %loop2.exit, %entry + ret void +} diff --git a/test/Transforms/LoopStrengthReduce/pr2570.ll b/test/Transforms/LoopStrengthReduce/pr2570.ll index aafd24ebba1e..80efb9f87e53 100644 --- a/test/Transforms/LoopStrengthReduce/pr2570.ll +++ b/test/Transforms/LoopStrengthReduce/pr2570.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-reduce -S | grep {phi\\>} | count 10 +; RUN: opt < %s -loop-reduce -S | grep {phi\\>} | count 8 ; PR2570 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll b/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll index a26346b2eb40..374f46d10cb3 100644 --- a/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll +++ b/test/Transforms/LoopUnroll/2005-03-06-BadLoopInfoUpdate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -loop-unroll -loopsimplify -disable-output +; RUN: opt < %s -loop-unroll -loop-simplify -disable-output define void @print_board() { entry: diff --git a/test/Transforms/LoopUnroll/basic.ll b/test/Transforms/LoopUnroll/basic.ll new file mode 100644 index 000000000000..eeb3e9a57b06 --- /dev/null +++ b/test/Transforms/LoopUnroll/basic.ll @@ -0,0 +1,24 @@ +; RUN: opt < %s -loop-unroll -S | FileCheck %s + + +; This should not unroll since the address of the loop header is taken. + +; CHECK: @test1 +; CHECK: store i8* blockaddress(@test1, %l1), i8** %P +; CHECK: l1: +; CHECK-NEXT: phi i32 +; rdar://8287027 +define i32 @test1(i8** %P) nounwind ssp { +entry: + store i8* blockaddress(@test1, %l1), i8** %P + br label %l1 + +l1: ; preds = %l1, %entry + %x.0 = phi i32 [ 0, %entry ], [ %inc, %l1 ] + %inc = add nsw i32 %x.0, 1 + %exitcond = icmp eq i32 %inc, 3 + br i1 %exitcond, label %l2, label %l1 + +l2: ; preds = %l1 + ret i32 0 +} diff --git a/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll b/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll new file mode 100644 index 000000000000..a976d18d4445 --- /dev/null +++ b/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll @@ -0,0 +1,28 @@ +; RUN: opt < %s -loop-unswitch +; PR8622 +@g_38 = external global i32, align 4 + +define void @func_67(i32 %p_68.coerce) nounwind { +entry: + br i1 true, label %for.end12, label %bb.nph + +bb.nph: ; preds = %entry + %g_38.promoted = load i32* @g_38 + br label %for.body + +for.body: ; preds = %for.cond, %bb.nph + %tobool.i = icmp eq i32 %p_68.coerce, 1 + %xor4.i = xor i32 %p_68.coerce, 1 + %call1 = select i1 %tobool.i, i32 0, i32 %xor4.i + br label %for.cond + +for.cond: ; preds = %for.body + br i1 true, label %for.cond.for.end12_crit_edge, label %for.body + +for.cond.for.end12_crit_edge: ; preds = %for.cond + store i32 %call1, i32* @g_38 + br label %for.end12 + +for.end12: ; preds = %for.cond.for.end12_crit_edge, %entry + ret void +} diff --git a/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll b/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll index 30c27137d909..9f1e28046707 100644 --- a/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll +++ b/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -memcpyopt -dse -S | grep {call.*initialize} | not grep memtmp +; RUN: opt < %s -basicaa -memcpyopt -dse -S | grep {call.*initialize} | not grep memtmp ; PR2077 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll b/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll index 38a727148e57..418761e9361c 100644 --- a/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll +++ b/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -memcpyopt -S | not grep {call.*memcpy.} +; RUN: opt < %s -basicaa -memcpyopt -S | not grep {call.*memcpy.} target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" %a = type { i32 } %b = type { float } diff --git a/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll b/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll deleted file mode 100644 index 4fec169fd06a..000000000000 --- a/test/Transforms/MemCpyOpt/2008-04-29-SRetRemoval.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: opt < %s -memcpyopt -S | grep {call.*memcpy.*agg.result} - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin8" -@x = external global { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] - -define void @foo({ x86_fp80, x86_fp80 }* noalias sret %agg.result) nounwind { -entry: - %x.0 = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] - %x.01 = bitcast { x86_fp80, x86_fp80 }* %x.0 to i8* ; <i8*> [#uses=2] - call void @llvm.memcpy.i32( i8* %x.01, i8* bitcast ({ x86_fp80, x86_fp80 }* @x to i8*), i32 32, i32 16 ) - %agg.result2 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %agg.result2, i8* %x.01, i32 32, i32 16 ) - ret void -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind diff --git a/test/Transforms/MemCpyOpt/align.ll b/test/Transforms/MemCpyOpt/align.ll index b0ae5f413a5d..b1f900d9da4c 100644 --- a/test/Transforms/MemCpyOpt/align.ll +++ b/test/Transforms/MemCpyOpt/align.ll @@ -2,9 +2,9 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ; The resulting memset is only 4-byte aligned, despite containing -; a 16-byte alignmed store in the middle. +; a 16-byte aligned store in the middle. -; CHECK: call void @llvm.memset.p0i8.i64(i8* %a01, i8 0, i64 16, i32 4, i1 false) +; CHECK: call void @llvm.memset.p0i8.i64(i8* {{.*}}, i8 0, i64 16, i32 4, i1 false) define void @foo(i32* %p) { %a0 = getelementptr i32* %p, i64 0 diff --git a/test/Transforms/MemCpyOpt/crash.ll b/test/Transforms/MemCpyOpt/crash.ll index bf5b23467577..cc3a6b05278a 100644 --- a/test/Transforms/MemCpyOpt/crash.ll +++ b/test/Transforms/MemCpyOpt/crash.ll @@ -1,5 +1,4 @@ -; RUN: opt < %s -memcpyopt -disable-output -; PR4882 +; RUN: opt < %s -basicaa -memcpyopt -disable-output target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "armv7-eabi" @@ -7,7 +6,8 @@ target triple = "armv7-eabi" %struct.qw = type { [4 x float] } %struct.bar = type { %struct.qw, %struct.qw, %struct.qw, %struct.qw, %struct.qw, float, float} -define arm_aapcs_vfpcc void @test1(%struct.bar* %this) { +; PR4882 +define void @test1(%struct.bar* %this) { entry: %0 = getelementptr inbounds %struct.bar* %this, i32 0, i32 0, i32 0, i32 0 store float 0.000000e+00, float* %0, align 4 @@ -43,3 +43,16 @@ entry: store float 0.000000e+00, float* %15, align 4 unreachable } + +; PR8753 + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, +i1) nounwind + +define void @test2(i32 %cmd) nounwind { + call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* undef, i64 20, i32 1, i1 +false) nounwind + call void @llvm.memcpy.p0i8.p0i8.i64(i8* null, i8* undef, i64 20, i32 1, i1 +false) nounwind + ret void +} diff --git a/test/Transforms/MemCpyOpt/form-memset.ll b/test/Transforms/MemCpyOpt/form-memset.ll index eb8dbe3a614f..1ac97e9e6b91 100644 --- a/test/Transforms/MemCpyOpt/form-memset.ll +++ b/test/Transforms/MemCpyOpt/form-memset.ll @@ -1,12 +1,11 @@ -; RUN: opt < %s -memcpyopt -S | not grep store -; RUN: opt < %s -memcpyopt -S | grep {call.*llvm.memset} +; RUN: opt < %s -memcpyopt -S | FileCheck %s ; All the stores in this example should be merged into a single memset. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" -define void @foo(i8 signext %c) nounwind { +define void @test1(i8 signext %c) nounwind { entry: %x = alloca [19 x i8] ; <[19 x i8]*> [#uses=20] %tmp = getelementptr [19 x i8]* %x, i32 0, i32 0 ; <i8*> [#uses=1] @@ -47,9 +46,177 @@ entry: store i8 %c, i8* %tmp69, align 1 %tmp73 = getelementptr [19 x i8]* %x, i32 0, i32 18 ; <i8*> [#uses=1] store i8 %c, i8* %tmp73, align 1 - %tmp76 = call i32 (...)* @bar( [19 x i8]* %x ) nounwind ; <i32> [#uses=0] + %tmp76 = call i32 (...)* @bar( [19 x i8]* %x ) nounwind ret void +; CHECK: @test1 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64 +; CHECK-NOT: store +; CHECK: ret } declare i32 @bar(...) + + %struct.MV = type { i16, i16 } + +define void @test2() nounwind { +entry: + %ref_idx = alloca [8 x i8] ; <[8 x i8]*> [#uses=8] + %left_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17] + %up_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17] + %tmp20 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 7 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp20, align 1 + %tmp23 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 6 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp23, align 1 + %tmp26 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 5 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp26, align 1 + %tmp29 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 4 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp29, align 1 + %tmp32 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 3 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp32, align 1 + %tmp35 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 2 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp35, align 1 + %tmp38 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 1 ; <i8*> [#uses=1] + store i8 -1, i8* %tmp38, align 1 + %tmp41 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 0 ; <i8*> [#uses=2] + store i8 -1, i8* %tmp41, align 1 + %tmp43 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp43, align 2 + %tmp46 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp46, align 2 + %tmp57 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp57, align 2 + %tmp60 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp60, align 2 + %tmp71 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp71, align 2 + %tmp74 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp74, align 2 + %tmp85 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp85, align 2 + %tmp88 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp88, align 2 + %tmp99 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp99, align 2 + %tmp102 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp102, align 2 + %tmp113 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp113, align 2 + %tmp116 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp116, align 2 + %tmp127 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp127, align 2 + %tmp130 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp130, align 2 + %tmp141 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp141, align 8 + %tmp144 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp144, align 2 + %tmp148 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp148, align 2 + %tmp151 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp151, align 2 + %tmp162 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp162, align 2 + %tmp165 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp165, align 2 + %tmp176 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp176, align 2 + %tmp179 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp179, align 2 + %tmp190 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp190, align 2 + %tmp193 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp193, align 2 + %tmp204 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp204, align 2 + %tmp207 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp207, align 2 + %tmp218 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp218, align 2 + %tmp221 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp221, align 2 + %tmp232 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp232, align 2 + %tmp235 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp235, align 2 + %tmp246 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1] + store i16 0, i16* %tmp246, align 8 + %tmp249 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1] + store i16 0, i16* %tmp249, align 2 + %up_mvd252 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1] + %left_mvd253 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1] + call void @foo( %struct.MV* %up_mvd252, %struct.MV* %left_mvd253, i8* %tmp41 ) nounwind + ret void + +; CHECK: @test2 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %tmp41, i8 -1, i64 8, i32 1, i1 false) +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 32, i32 8, i1 false) +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 32, i32 8, i1 false) +; CHECK-NOT: store +; CHECK: ret +} + +declare void @foo(%struct.MV*, %struct.MV*, i8*) + + +; Store followed by memset. +define void @test3(i32* nocapture %P) nounwind ssp { +entry: + %arrayidx = getelementptr inbounds i32* %P, i64 1 + store i32 0, i32* %arrayidx, align 4 + %add.ptr = getelementptr inbounds i32* %P, i64 2 + %0 = bitcast i32* %add.ptr to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 11, i32 1, i1 false) + ret void +; CHECK: @test3 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 15, i32 4, i1 false) +} + +; store followed by memset, different offset scenario +define void @test4(i32* nocapture %P) nounwind ssp { +entry: + store i32 0, i32* %P, align 4 + %add.ptr = getelementptr inbounds i32* %P, i64 1 + %0 = bitcast i32* %add.ptr to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 11, i32 1, i1 false) + ret void +; CHECK: @test4 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 15, i32 4, i1 false) +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind + +; Memset followed by store. +define void @test5(i32* nocapture %P) nounwind ssp { +entry: + %add.ptr = getelementptr inbounds i32* %P, i64 2 + %0 = bitcast i32* %add.ptr to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 11, i32 1, i1 false) + %arrayidx = getelementptr inbounds i32* %P, i64 1 + store i32 0, i32* %arrayidx, align 4 + ret void +; CHECK: @test5 +; CHECK-NOT: store +; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 15, i32 4, i1 false) +} + +;; Memset followed by memset. +define void @test6(i32* nocapture %P) nounwind ssp { +entry: + %0 = bitcast i32* %P to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 12, i32 1, i1 false) + %add.ptr = getelementptr inbounds i32* %P, i64 3 + %1 = bitcast i32* %add.ptr to i8* + tail call void @llvm.memset.p0i8.i64(i8* %1, i8 0, i64 12, i32 1, i1 false) + ret void +; CHECK: @test6 +; CHECK: call void @llvm.memset.p0i8.i64(i8* %2, i8 0, i64 24, i32 1, i1 false) +} + diff --git a/test/Transforms/MemCpyOpt/form-memset2.ll b/test/Transforms/MemCpyOpt/form-memset2.ll deleted file mode 100644 index c90af9c73ca3..000000000000 --- a/test/Transforms/MemCpyOpt/form-memset2.ll +++ /dev/null @@ -1,99 +0,0 @@ -; RUN: opt < %s -memcpyopt -S | not grep store -; RUN: opt < %s -memcpyopt -S | grep {call.*llvm.memset} | count 3 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin8" - %struct.MV = type { i16, i16 } - -define i32 @t() nounwind { -entry: - %ref_idx = alloca [8 x i8] ; <[8 x i8]*> [#uses=8] - %left_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17] - %up_mvd = alloca [8 x %struct.MV] ; <[8 x %struct.MV]*> [#uses=17] - %tmp20 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 7 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp20, align 1 - %tmp23 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 6 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp23, align 1 - %tmp26 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 5 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp26, align 1 - %tmp29 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 4 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp29, align 1 - %tmp32 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 3 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp32, align 1 - %tmp35 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 2 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp35, align 1 - %tmp38 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 1 ; <i8*> [#uses=1] - store i8 -1, i8* %tmp38, align 1 - %tmp41 = getelementptr [8 x i8]* %ref_idx, i32 0, i32 0 ; <i8*> [#uses=2] - store i8 -1, i8* %tmp41, align 1 - %tmp43 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp43, align 2 - %tmp46 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp46, align 2 - %tmp57 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp57, align 2 - %tmp60 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp60, align 2 - %tmp71 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp71, align 2 - %tmp74 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp74, align 2 - %tmp85 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp85, align 2 - %tmp88 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp88, align 2 - %tmp99 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp99, align 2 - %tmp102 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp102, align 2 - %tmp113 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp113, align 2 - %tmp116 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp116, align 2 - %tmp127 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp127, align 2 - %tmp130 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp130, align 2 - %tmp141 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp141, align 8 - %tmp144 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp144, align 2 - %tmp148 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp148, align 2 - %tmp151 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 7, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp151, align 2 - %tmp162 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp162, align 2 - %tmp165 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 6, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp165, align 2 - %tmp176 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp176, align 2 - %tmp179 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 5, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp179, align 2 - %tmp190 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp190, align 2 - %tmp193 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 4, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp193, align 2 - %tmp204 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp204, align 2 - %tmp207 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 3, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp207, align 2 - %tmp218 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp218, align 2 - %tmp221 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 2, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp221, align 2 - %tmp232 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp232, align 2 - %tmp235 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 1, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp235, align 2 - %tmp246 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 0 ; <i16*> [#uses=1] - store i16 0, i16* %tmp246, align 8 - %tmp249 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0, i32 1 ; <i16*> [#uses=1] - store i16 0, i16* %tmp249, align 2 - %up_mvd252 = getelementptr [8 x %struct.MV]* %up_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1] - %left_mvd253 = getelementptr [8 x %struct.MV]* %left_mvd, i32 0, i32 0 ; <%struct.MV*> [#uses=1] - call void @foo( %struct.MV* %up_mvd252, %struct.MV* %left_mvd253, i8* %tmp41 ) nounwind - ret i32 undef -} - -declare void @foo(%struct.MV*, %struct.MV*, i8*) diff --git a/test/Transforms/MemCpyOpt/loadstore-sret.ll b/test/Transforms/MemCpyOpt/loadstore-sret.ll new file mode 100644 index 000000000000..67e7137e7e49 --- /dev/null +++ b/test/Transforms/MemCpyOpt/loadstore-sret.ll @@ -0,0 +1,25 @@ +; RUN: opt -S < %s -basicaa -memcpyopt | FileCheck %s +; <rdar://problem/8536696> + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +%"class.std::auto_ptr" = type { i32* } + +; CHECK: @_Z3foov +define void @_Z3foov(%"class.std::auto_ptr"* noalias nocapture sret %agg.result) ssp { +_ZNSt8auto_ptrIiED1Ev.exit: + %temp.lvalue = alloca %"class.std::auto_ptr", align 8 +; CHECK: call void @_Z3barv(%"class.std::auto_ptr"* sret %agg.result) + call void @_Z3barv(%"class.std::auto_ptr"* sret %temp.lvalue) + %tmp.i.i = getelementptr inbounds %"class.std::auto_ptr"* %temp.lvalue, i64 0, i32 0 +; CHECK-NOT: load + %tmp2.i.i = load i32** %tmp.i.i, align 8 + %tmp.i.i4 = getelementptr inbounds %"class.std::auto_ptr"* %agg.result, i64 0, i32 0 +; CHECK-NOT: store + store i32* %tmp2.i.i, i32** %tmp.i.i4, align 8 +; CHECK: ret void + ret void +} + +declare void @_Z3barv(%"class.std::auto_ptr"* sret) diff --git a/test/Transforms/MemCpyOpt/memcpy-to-memset.ll b/test/Transforms/MemCpyOpt/memcpy-to-memset.ll new file mode 100644 index 000000000000..b18d176f0030 --- /dev/null +++ b/test/Transforms/MemCpyOpt/memcpy-to-memset.ll @@ -0,0 +1,19 @@ +; RUN: opt -memcpyopt -S < %s | FileCheck %s + +@cst = internal constant [3 x i32] [i32 -1, i32 -1, i32 -1], align 4 + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind +declare void @foo(i32*) nounwind + +define void @test1() nounwind { + %arr = alloca [3 x i32], align 4 + %arr_i8 = bitcast [3 x i32]* %arr to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %arr_i8, i8* bitcast ([3 x i32]* @cst to i8*), i64 12, i32 4, i1 false) + %arraydecay = getelementptr inbounds [3 x i32]* %arr, i64 0, i64 0 + call void @foo(i32* %arraydecay) nounwind + ret void +; CHECK: @test1 +; CHECK: call void @llvm.memset +; CHECK-NOT: call void @llvm.memcpy +; CHECK: ret void +} diff --git a/test/Transforms/MemCpyOpt/memcpy.ll b/test/Transforms/MemCpyOpt/memcpy.ll index 724acfab4750..b387d32a7d5e 100644 --- a/test/Transforms/MemCpyOpt/memcpy.ll +++ b/test/Transforms/MemCpyOpt/memcpy.ll @@ -1,9 +1,9 @@ -; RUN: opt < %s -memcpyopt -dse -S | grep {call.*memcpy} | count 1 +; RUN: opt < %s -basicaa -memcpyopt -dse -S | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" -define void @ccosl({ x86_fp80, x86_fp80 }* sret %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind { +define void @test1({ x86_fp80, x86_fp80 }* sret %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind { entry: %tmp2 = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=1] %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 ; <{ x86_fp80, x86_fp80 }*> [#uses=2] @@ -14,9 +14,98 @@ entry: call void @llvm.memcpy.i32( i8* %tmp219, i8* %memtmp20, i32 32, i32 16 ) %agg.result21 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1] call void @llvm.memcpy.i32( i8* %agg.result21, i8* %tmp219, i32 32, i32 16 ) + +; Check that one of the memcpy's are removed. +;; FIXME: PR 8643 We should be able to eliminate the last memcpy here. + +; CHECK: @test1 +; CHECK: call void @ccoshl +; CHECK: call void @llvm.memcpy +; CHECK-NOT: llvm.memcpy +; CHECK: ret void ret void } declare void @ccoshl({ x86_fp80, x86_fp80 }* sret , x86_fp80, x86_fp80) nounwind declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind + + +; The intermediate alloca and one of the memcpy's should be eliminated, the +; other should be related with a memmove. +define void @test2(i8* %P, i8* %Q) nounwind { + %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 + %R = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8* + call void @llvm.memcpy.i32( i8* %R, i8* %P, i32 32, i32 16 ) + call void @llvm.memcpy.i32( i8* %Q, i8* %R, i32 32, i32 16 ) + ret void + +; CHECK: @test2 +; CHECK-NEXT: call void @llvm.memmove{{.*}}(i8* %Q, i8* %P +; CHECK-NEXT: ret void +} + + + + +@x = external global { x86_fp80, x86_fp80 } + +define void @test3({ x86_fp80, x86_fp80 }* noalias sret %agg.result) nounwind { + %x.0 = alloca { x86_fp80, x86_fp80 } + %x.01 = bitcast { x86_fp80, x86_fp80 }* %x.0 to i8* + call void @llvm.memcpy.i32( i8* %x.01, i8* bitcast ({ x86_fp80, x86_fp80 }* @x to i8*), i32 32, i32 16 ) + %agg.result2 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* + call void @llvm.memcpy.i32( i8* %agg.result2, i8* %x.01, i32 32, i32 16 ) + ret void +; CHECK: @test3 +; CHECK-NEXT: %agg.result2 = bitcast +; CHECK-NEXT: call void @llvm.memcpy +; CHECK-NEXT: ret void +} + + +; PR8644 +define void @test4(i8 *%P) { + %A = alloca {i32, i32} + %a = bitcast {i32, i32}* %A to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %P, i64 8, i32 4, i1 false) + call void @test4a(i8* byval align 1 %a) + ret void +; CHECK: @test4 +; CHECK-NEXT: call void @test4a( +} + +declare void @test4a(i8* byval align 1) +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +%struct.S = type { i128, [4 x i8]} + +@sS = external global %struct.S, align 16 + +declare void @test5a(%struct.S* byval align 16) nounwind ssp + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +; rdar://8713376 - This memcpy can't be eliminated. +define i32 @test5(i32 %x) nounwind ssp { +entry: + %y = alloca %struct.S, align 16 + %tmp = bitcast %struct.S* %y to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp, i8* bitcast (%struct.S* @sS to i8*), i64 32, i32 16, i1 false) + %a = getelementptr %struct.S* %y, i64 0, i32 1, i64 0 + store i8 4, i8* %a + call void @test5a(%struct.S* byval align 16 %y) + ret i32 0 + ; CHECK: @test5( + ; CHECK: store i8 4 + ; CHECK: call void @test5a(%struct.S* byval align 16 %y) +} + +;; Noop memcpy should be zapped. +define void @test6(i8 *%P) { + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %P, i64 8, i32 4, i1 false) + ret void +; CHECK: @test6 +; CHECK-NEXT: ret void +} + diff --git a/test/Transforms/MemCpyOpt/memmove.ll b/test/Transforms/MemCpyOpt/memmove.ll index 73bbf0bd2e4e..8babb04e4b38 100644 --- a/test/Transforms/MemCpyOpt/memmove.ll +++ b/test/Transforms/MemCpyOpt/memmove.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -memcpyopt -S | FileCheck %s +; RUN: opt < %s -basicaa -memcpyopt -S | FileCheck %s ; These memmoves should get optimized to memcpys. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/Transforms/MemCpyOpt/smaller.ll b/test/Transforms/MemCpyOpt/smaller.ll new file mode 100644 index 000000000000..1d35582d993e --- /dev/null +++ b/test/Transforms/MemCpyOpt/smaller.ll @@ -0,0 +1,28 @@ +; RUN: opt -memcpyopt -S < %s | FileCheck %s +; rdar://8875553 + +; Memcpyopt shouldn't optimize the second memcpy using the first +; because the first has a smaller size. + +; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.s* @cell, i32 0, i32 0, i32 0), i32 16, i32 4, i1 false) + +target datalayout = "e-p:32:32:32" + +%struct.s = type { [11 x i8], i32 } + +@.str = private constant [11 x i8] c"0123456789\00" +@cell = external global %struct.s + +declare void @check(%struct.s* byval %p) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind + +define void @foo() nounwind { +entry: + %agg.tmp = alloca %struct.s, align 4 + store i32 99, i32* getelementptr inbounds (%struct.s* @cell, i32 0, i32 1), align 4 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.s* @cell, i32 0, i32 0, i32 0), i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i32 11, i32 1, i1 false) + %tmp = getelementptr inbounds %struct.s* %agg.tmp, i32 0, i32 0, i32 0 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.s* @cell, i32 0, i32 0, i32 0), i32 16, i32 4, i1 false) + call void @check(%struct.s* byval %agg.tmp) + ret void +} diff --git a/test/Transforms/MemCpyOpt/sret.ll b/test/Transforms/MemCpyOpt/sret.ll index 5002875ae328..ddfd0fd1fcce 100644 --- a/test/Transforms/MemCpyOpt/sret.ll +++ b/test/Transforms/MemCpyOpt/sret.ll @@ -1,9 +1,9 @@ -; RUN: opt < %s -memcpyopt -S | not grep {call.*memcpy} +; RUN: opt < %s -basicaa -memcpyopt -S | not grep {call.*memcpy} target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" -define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 }* byval %z) nounwind { +define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 }* byval align 8 %z) nounwind { entry: %iz = alloca { x86_fp80, x86_fp80 } ; <{ x86_fp80, x86_fp80 }*> [#uses=3] %memtmp = alloca { x86_fp80, x86_fp80 }, align 16 ; <{ x86_fp80, x86_fp80 }*> [#uses=2] @@ -16,7 +16,7 @@ entry: %tmp8 = load x86_fp80* %tmp7, align 16 ; <x86_fp80> [#uses=1] store x86_fp80 %tmp3, x86_fp80* %real, align 16 store x86_fp80 %tmp8, x86_fp80* %tmp4, align 16 - call void @ccoshl( { x86_fp80, x86_fp80 }* noalias sret %memtmp, { x86_fp80, x86_fp80 }* byval %iz ) nounwind + call void @ccoshl( { x86_fp80, x86_fp80 }* noalias sret %memtmp, { x86_fp80, x86_fp80 }* byval align 8 %iz ) nounwind %memtmp14 = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8* ; <i8*> [#uses=1] %agg.result15 = bitcast { x86_fp80, x86_fp80 }* %agg.result to i8* ; <i8*> [#uses=1] call void @llvm.memcpy.i32( i8* %agg.result15, i8* %memtmp14, i32 32, i32 16 ) diff --git a/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll b/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll new file mode 100644 index 000000000000..201903e99545 --- /dev/null +++ b/test/Transforms/MergeFunc/2011-02-08-RemoveEqual.ll @@ -0,0 +1,276 @@ +; RUN: opt -mergefunc %s -disable-output +; This used to crash. + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-pc-linux-gnu" + +%"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" } +%"struct.kc::impl_CexpressionDQ" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_CexpressionDQ"* } +%"struct.kc::impl_Ctext" = type { %"struct.kc::impl_Ccode_option", i32, %"struct.kc::impl_casestring__Str"*, %"struct.kc::impl_Ctext_elem"*, %"struct.kc::impl_Ctext"* } +%"struct.kc::impl_Ctext_elem" = type { %"struct.kc::impl_abstract_phylum", i32, %"struct.kc::impl_casestring__Str"* } +%"struct.kc::impl_ID" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_casestring__Str"*, i32, %"struct.kc::impl_casestring__Str"* } +%"struct.kc::impl_abstract_phylum" = type { i32 (...)** } +%"struct.kc::impl_ac_abstract_declarator_AcAbsdeclDirdecl" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_Ccode_option"* } +%"struct.kc::impl_casestring__Str" = type { %"struct.kc::impl_abstract_phylum", i8* } +%"struct.kc::impl_elem_patternrepresentation" = type { %"struct.kc::impl_abstract_phylum", i32, %"struct.kc::impl_casestring__Str"*, %"struct.kc::impl_ID"* } +%"struct.kc::impl_fileline" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_casestring__Str"*, i32 } +%"struct.kc::impl_fileline_FileLine" = type { %"struct.kc::impl_fileline" } +%"struct.kc::impl_outmostpatterns" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_elem_patternrepresentation"*, %"struct.kc::impl_outmostpatterns"* } +%"struct.kc::impl_withcaseinfo_Withcaseinfo" = type { %"struct.kc::impl_Ccode_option", %"struct.kc::impl_outmostpatterns"*, %"struct.kc::impl_outmostpatterns"*, %"struct.kc::impl_Ctext"* } + +@_ZTVN2kc13impl_filelineE = external constant [13 x i32 (...)*], align 32 +@.str = external constant [1 x i8], align 1 +@_ZTVN2kc22impl_fileline_FileLineE = external constant [13 x i32 (...)*], align 32 + +define void @_ZN2kc22impl_fileline_FileLineC2EPNS_20impl_casestring__StrEi(%"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_casestring__Str"* %_file, i32 %_line) align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline_FileLine"*, align 4 + %_file_addr = alloca %"struct.kc::impl_casestring__Str"*, align 4 + %_line_addr = alloca i32, align 4 + %save_filt.150 = alloca i32 + %save_eptr.149 = alloca i8* + %iftmp.99 = alloca %"struct.kc::impl_casestring__Str"* + %eh_exception = alloca i8* + %eh_selector = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_fileline_FileLine"** %this_addr + store %"struct.kc::impl_casestring__Str"* %_file, %"struct.kc::impl_casestring__Str"** %_file_addr + store i32 %_line, i32* %_line_addr + %0 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %0, i32 0, i32 0 + call void @_ZN2kc13impl_filelineC2Ev() nounwind + %2 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %3 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %2, i32 0, i32 0 + %4 = getelementptr inbounds %"struct.kc::impl_fileline"* %3, i32 0, i32 0 + %5 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %4, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc22impl_fileline_FileLineE, i32 0, i32 2), i32 (...)*** %5, align 4 + %6 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + %7 = icmp eq %"struct.kc::impl_casestring__Str"* %6, null + br i1 %7, label %bb, label %bb1 + +bb: ; preds = %entry + %8 = invoke %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() + to label %invcont unwind label %lpad + +invcont: ; preds = %bb + store %"struct.kc::impl_casestring__Str"* %8, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb1: ; preds = %entry + %9 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + store %"struct.kc::impl_casestring__Str"* %9, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb2: ; preds = %bb1, %invcont + %10 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %11 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %10, i32 0, i32 0 + %12 = getelementptr inbounds %"struct.kc::impl_fileline"* %11, i32 0, i32 1 + %13 = load %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + store %"struct.kc::impl_casestring__Str"* %13, %"struct.kc::impl_casestring__Str"** %12, align 4 + %14 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %15 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %14, i32 0, i32 0 + %16 = getelementptr inbounds %"struct.kc::impl_fileline"* %15, i32 0, i32 2 + %17 = load i32* %_line_addr, align 4 + store i32 %17, i32* %16, align 4 + ret void + +lpad: ; preds = %bb + %eh_ptr = call i8* @llvm.eh.exception() + store i8* %eh_ptr, i8** %eh_exception + %eh_ptr4 = load i8** %eh_exception + %eh_select5 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr4, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 0) + store i32 %eh_select5, i32* %eh_selector + %eh_select = load i32* %eh_selector + store i32 %eh_select, i32* %save_filt.150, align 4 + %eh_value = load i8** %eh_exception + store i8* %eh_value, i8** %save_eptr.149, align 4 + %18 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %19 = bitcast %"struct.kc::impl_fileline_FileLine"* %18 to %"struct.kc::impl_fileline"* + call void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %19) nounwind + %20 = load i8** %save_eptr.149, align 4 + store i8* %20, i8** %eh_exception, align 4 + %21 = load i32* %save_filt.150, align 4 + store i32 %21, i32* %eh_selector, align 4 + %eh_ptr6 = load i8** %eh_exception + call void @_Unwind_Resume_or_Rethrow() + unreachable +} + +declare void @_ZN2kc13impl_filelineC2Ev() nounwind align 2 + +define void @_ZN2kc13impl_filelineD1Ev(%"struct.kc::impl_fileline"* %this) nounwind align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline"*, align 4 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline"* %this, %"struct.kc::impl_fileline"** %this_addr + %0 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline"* %0, i32 0, i32 0 + %2 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %1, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc13impl_filelineE, i32 0, i32 2), i32 (...)*** %2, align 4 + %3 = trunc i32 0 to i8 + %toBool = icmp ne i8 %3, 0 + br i1 %toBool, label %bb1, label %return + +bb1: ; preds = %entry + %4 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %5 = bitcast %"struct.kc::impl_fileline"* %4 to i8* + call void @_ZdlPv() nounwind + br label %return + +return: ; preds = %bb1, %entry + ret void +} + +declare void @_ZdlPv() nounwind + +define void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %this) nounwind align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline"*, align 4 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline"* %this, %"struct.kc::impl_fileline"** %this_addr + %0 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline"* %0, i32 0, i32 0 + %2 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %1, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc13impl_filelineE, i32 0, i32 2), i32 (...)*** %2, align 4 + %3 = trunc i32 0 to i8 + %toBool = icmp ne i8 %3, 0 + br i1 %toBool, label %bb1, label %return + +bb1: ; preds = %entry + %4 = load %"struct.kc::impl_fileline"** %this_addr, align 4 + %5 = bitcast %"struct.kc::impl_fileline"* %4 to i8* + call void @_ZdlPv() nounwind + br label %return + +return: ; preds = %bb1, %entry + ret void +} + +define void @_ZN2kc22impl_fileline_FileLineC1EPNS_20impl_casestring__StrEi(%"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_casestring__Str"* %_file, i32 %_line) align 2 { +entry: + %this_addr = alloca %"struct.kc::impl_fileline_FileLine"*, align 4 + %_file_addr = alloca %"struct.kc::impl_casestring__Str"*, align 4 + %_line_addr = alloca i32, align 4 + %save_filt.148 = alloca i32 + %save_eptr.147 = alloca i8* + %iftmp.99 = alloca %"struct.kc::impl_casestring__Str"* + %eh_exception = alloca i8* + %eh_selector = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store %"struct.kc::impl_fileline_FileLine"* %this, %"struct.kc::impl_fileline_FileLine"** %this_addr + store %"struct.kc::impl_casestring__Str"* %_file, %"struct.kc::impl_casestring__Str"** %_file_addr + store i32 %_line, i32* %_line_addr + %0 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %1 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %0, i32 0, i32 0 + call void @_ZN2kc13impl_filelineC2Ev() nounwind + %2 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %3 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %2, i32 0, i32 0 + %4 = getelementptr inbounds %"struct.kc::impl_fileline"* %3, i32 0, i32 0 + %5 = getelementptr inbounds %"struct.kc::impl_abstract_phylum"* %4, i32 0, i32 0 + store i32 (...)** getelementptr inbounds ([13 x i32 (...)*]* @_ZTVN2kc22impl_fileline_FileLineE, i32 0, i32 2), i32 (...)*** %5, align 4 + %6 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + %7 = icmp eq %"struct.kc::impl_casestring__Str"* %6, null + br i1 %7, label %bb, label %bb1 + +bb: ; preds = %entry + %8 = invoke %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() + to label %invcont unwind label %lpad + +invcont: ; preds = %bb + store %"struct.kc::impl_casestring__Str"* %8, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb1: ; preds = %entry + %9 = load %"struct.kc::impl_casestring__Str"** %_file_addr, align 4 + store %"struct.kc::impl_casestring__Str"* %9, %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + br label %bb2 + +bb2: ; preds = %bb1, %invcont + %10 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %11 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %10, i32 0, i32 0 + %12 = getelementptr inbounds %"struct.kc::impl_fileline"* %11, i32 0, i32 1 + %13 = load %"struct.kc::impl_casestring__Str"** %iftmp.99, align 4 + store %"struct.kc::impl_casestring__Str"* %13, %"struct.kc::impl_casestring__Str"** %12, align 4 + %14 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %15 = getelementptr inbounds %"struct.kc::impl_fileline_FileLine"* %14, i32 0, i32 0 + %16 = getelementptr inbounds %"struct.kc::impl_fileline"* %15, i32 0, i32 2 + %17 = load i32* %_line_addr, align 4 + store i32 %17, i32* %16, align 4 + ret void + +lpad: ; preds = %bb + %eh_ptr = call i8* @llvm.eh.exception() + store i8* %eh_ptr, i8** %eh_exception + %eh_ptr4 = load i8** %eh_exception + %eh_select5 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr4, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 0) + store i32 %eh_select5, i32* %eh_selector + %eh_select = load i32* %eh_selector + store i32 %eh_select, i32* %save_filt.148, align 4 + %eh_value = load i8** %eh_exception + store i8* %eh_value, i8** %save_eptr.147, align 4 + %18 = load %"struct.kc::impl_fileline_FileLine"** %this_addr, align 4 + %19 = bitcast %"struct.kc::impl_fileline_FileLine"* %18 to %"struct.kc::impl_fileline"* + call void @_ZN2kc13impl_filelineD2Ev(%"struct.kc::impl_fileline"* %19) nounwind + %20 = load i8** %save_eptr.147, align 4 + store i8* %20, i8** %eh_exception, align 4 + %21 = load i32* %save_filt.148, align 4 + store i32 %21, i32* %eh_selector, align 4 + %eh_ptr6 = load i8** %eh_exception + call void @_Unwind_Resume_or_Rethrow() + unreachable +} + +declare i8* @llvm.eh.exception() nounwind readonly + +declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind + +declare i32 @__gxx_personality_v0(...) + +declare void @_Unwind_Resume_or_Rethrow() + +define void @_ZN2kc21printer_functor_classC2Ev(%"struct.kc::impl_abstract_phylum"* %this) nounwind align 2 { +entry: + unreachable +} + +define %"struct.kc::impl_Ccode_option"* @_ZN2kc11phylum_castIPNS_17impl_withcaseinfoES1_EET_PT0_(%"struct.kc::impl_Ccode_option"* %t) nounwind { +entry: + ret %"struct.kc::impl_Ccode_option"* null +} + +define %"struct.kc::impl_abstract_phylum"* @_ZNK2kc43impl_ac_direct_declarator_AcDirectDeclProto9subphylumEi(%"struct.kc::impl_ac_abstract_declarator_AcAbsdeclDirdecl"* %this, i32 %no) nounwind align 2 { +entry: + ret %"struct.kc::impl_abstract_phylum"* undef +} + +define void @_ZN2kc30impl_withcaseinfo_WithcaseinfoD0Ev(%"struct.kc::impl_withcaseinfo_Withcaseinfo"* %this) nounwind align 2 { +entry: + unreachable +} + +define void @_ZN2kc30impl_withcaseinfo_WithcaseinfoC1EPNS_26impl_patternrepresentationES2_PNS_10impl_CtextE(%"struct.kc::impl_withcaseinfo_Withcaseinfo"* %this, %"struct.kc::impl_outmostpatterns"* %_patternrepresentation_1, %"struct.kc::impl_outmostpatterns"* %_patternrepresentation_2, %"struct.kc::impl_Ctext"* %_Ctext_1) nounwind align 2 { +entry: + unreachable +} + +define void @_ZN2kc21impl_rewriteviewsinfoC2EPNS_20impl_rewriteviewinfoEPS0_(%"struct.kc::impl_CexpressionDQ"* %this, %"struct.kc::impl_Ccode_option"* %p1, %"struct.kc::impl_CexpressionDQ"* %p2) nounwind align 2 { +entry: + unreachable +} + +define %"struct.kc::impl_Ctext_elem"* @_ZN2kc11phylum_castIPNS_9impl_termENS_20impl_abstract_phylumEEET_PT0_(%"struct.kc::impl_abstract_phylum"* %t) nounwind { +entry: + unreachable +} + +define void @_ZN2kc27impl_ac_parameter_type_listD2Ev(%"struct.kc::impl_Ccode_option"* %this) nounwind align 2 { +entry: + ret void +} + +define void @_ZN2kc21impl_ac_operator_nameD2Ev(%"struct.kc::impl_Ctext_elem"* %this) nounwind align 2 { +entry: + ret void +} + +declare %"struct.kc::impl_casestring__Str"* @_ZN2kc12mkcasestringEPKci() diff --git a/test/Transforms/MergeFunc/fold-weak.ll b/test/Transforms/MergeFunc/fold-weak.ll index e12473125c78..23e4d33c3a9f 100644 --- a/test/Transforms/MergeFunc/fold-weak.ll +++ b/test/Transforms/MergeFunc/fold-weak.ll @@ -1,6 +1,10 @@ ; RUN: opt < %s -mergefunc -S > %t ; RUN: grep {define weak} %t | count 2 ; RUN: grep {call} %t | count 2 +; XFAIL: * + +; This test is off for a bit as we change this particular sort of folding to +; only apply on ELF systems and not Mach-O systems. define weak i32 @sum(i32 %x, i32 %y) { %sum = add i32 %x, %y diff --git a/test/Transforms/MergeFunc/vector.ll b/test/Transforms/MergeFunc/vector.ll new file mode 100644 index 000000000000..6954fcec3daf --- /dev/null +++ b/test/Transforms/MergeFunc/vector.ll @@ -0,0 +1,76 @@ +; RUN: opt -mergefunc -stats -disable-output < %s |& grep {functions merged} + +; This test is checks whether we can merge +; vector<intptr_t>::push_back(0) +; and +; vector<void *>::push_back(0) +; . + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" + +%0 = type { i32, void ()* } +%1 = type { i64, i1 } +%"class.std::vector" = type { [24 x i8] } + +@vi = global %"class.std::vector" zeroinitializer, align 8 +@__dso_handle = external unnamed_addr global i8* +@vp = global %"class.std::vector" zeroinitializer, align 8 +@llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I_a }] + +define linkonce_odr void @_ZNSt6vectorIlSaIlEED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 { +entry: + %tmp2.i.i = bitcast %"class.std::vector"* %this to i64** + %tmp3.i.i = load i64** %tmp2.i.i, align 8, !tbaa !0 + %tobool.i.i.i = icmp eq i64* %tmp3.i.i, null + br i1 %tobool.i.i.i, label %_ZNSt6vectorIlSaIlEED2Ev.exit, label %if.then.i.i.i + +if.then.i.i.i: ; preds = %entry + %0 = bitcast i64* %tmp3.i.i to i8* + tail call void @_ZdlPv(i8* %0) nounwind + ret void + +_ZNSt6vectorIlSaIlEED2Ev.exit: ; preds = %entry + ret void +} + +declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) + +define linkonce_odr void @_ZNSt6vectorIPvSaIS0_EED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 { +entry: + %tmp2.i.i = bitcast %"class.std::vector"* %this to i8*** + %tmp3.i.i = load i8*** %tmp2.i.i, align 8, !tbaa !0 + %tobool.i.i.i = icmp eq i8** %tmp3.i.i, null + br i1 %tobool.i.i.i, label %_ZNSt6vectorIPvSaIS0_EED2Ev.exit, label %if.then.i.i.i + +if.then.i.i.i: ; preds = %entry + %0 = bitcast i8** %tmp3.i.i to i8* + tail call void @_ZdlPv(i8* %0) nounwind + ret void + +_ZNSt6vectorIPvSaIS0_EED2Ev.exit: ; preds = %entry + ret void +} + +declare void @_Z1fv() + +declare void @_ZNSt6vectorIPvSaIS0_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS0_S2_EERKS0_(%"class.std::vector"* nocapture %this, i8** %__position.coerce, i8** nocapture %__x) align 2 + +declare void @_ZdlPv(i8*) nounwind + +declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +declare void @_ZSt17__throw_bad_allocv() noreturn + +declare noalias i8* @_Znwm(i64) + +declare void @_ZNSt6vectorIlSaIlEE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPlS1_EERKl(%"class.std::vector"* nocapture %this, i64* %__position.coerce, i64* nocapture %__x) align 2 + +declare void @_GLOBAL__I_a() + +declare %1 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone + +!0 = metadata !{metadata !"any pointer", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} +!3 = metadata !{metadata !"long", metadata !1} diff --git a/test/Transforms/PartialSpecialize/two-specializations.ll b/test/Transforms/PartialSpecialize/two-specializations.ll deleted file mode 100644 index bc3da22e1855..000000000000 --- a/test/Transforms/PartialSpecialize/two-specializations.ll +++ /dev/null @@ -1,37 +0,0 @@ -; If there are two specializations of a function, make sure each callsite -; calls the right one. -; -; RUN: opt -S -partialspecialization -disable-inlining %s | opt -S -inline | FileCheck %s -check-prefix=CORRECT -; RUN: opt -S -partialspecialization -disable-inlining %s | FileCheck %s -declare void @callback1() -declare void @callback2() - -define internal void @UseCallback(void()* %pCallback) { - call void %pCallback() - ret void -} - -define void @foo(void()* %pNonConstCallback) -{ -Entry: -; CORRECT: Entry -; CORRECT-NEXT: call void @callback1() -; CORRECT-NEXT: call void @callback1() -; CORRECT-NEXT: call void @callback2() -; CORRECT-NEXT: call void %pNonConstCallback() -; CORRECT-NEXT: call void @callback1() -; CORRECT-NEXT: call void @callback2() -; CORRECT-NEXT: call void @callback2() -; CHECK: Entry -; CHECK-NOT: call void @UseCallback(void ()* @callback1) -; CHECK-NOT: call void @UseCallback(void ()* @callback2) -; CHECK: ret void - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback2) - call void @UseCallback(void()* %pNonConstCallback) - call void @UseCallback(void()* @callback1) - call void @UseCallback(void()* @callback2) - call void @UseCallback(void()* @callback2) - ret void -} diff --git a/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll b/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll new file mode 100644 index 000000000000..e6c76b344486 --- /dev/null +++ b/test/Transforms/Reassociate/2011-01-26-UseAfterFree.ll @@ -0,0 +1,35 @@ +; RUN: opt < %s -reassociate +; PR9039 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-gnu-linux" + +%ada__tags__T15s = type void () + +define void @exp_averages_intraday__deviation() { +entry: + %0 = load i32* undef, align 4 + %1 = shl i32 %0, 2 + %2 = add nsw i32 undef, %1 + %3 = add nsw i32 %2, undef + %4 = mul nsw i32 %0, 12 + %5 = add nsw i32 %3, %4 + %6 = add nsw i32 %5, %4 + %7 = add nsw i32 %6, undef + br i1 false, label %"4", label %"12" + +"4": ; preds = %entry + br i1 undef, label %"5", label %"8" + +"5": ; preds = %"4" + unreachable + +"8": ; preds = %"4" + %8 = getelementptr inbounds i8* undef, i32 %6 + br i1 undef, label %"13", label %"12" + +"12": ; preds = %"8", %entry + ret void + +"13": ; preds = %"8" + ret void +} diff --git a/test/Transforms/Reassociate/optional-flags.ll b/test/Transforms/Reassociate/optional-flags.ll new file mode 100644 index 000000000000..40f7d5bf5b80 --- /dev/null +++ b/test/Transforms/Reassociate/optional-flags.ll @@ -0,0 +1,29 @@ +; RUN: opt -S -reassociate < %s | FileCheck %s +; rdar://8944681 + +; Reassociate should clear optional flags like nsw when reassociating. + +; CHECK: @test0 +; CHECK: %y = add i64 %b, %a +; CHECK: %z = add i64 %y, %c +define i64 @test0(i64 %a, i64 %b, i64 %c) { + %y = add nsw i64 %c, %b + %z = add i64 %y, %a + ret i64 %z +} + +; CHECK: @test1 +; CHECK: %y = add i64 %b, %a +; CHECK: %z = add i64 %y, %c +define i64 @test1(i64 %a, i64 %b, i64 %c) { + %y = add i64 %c, %b + %z = add nsw i64 %y, %a + ret i64 %z +} + +; PR9215 +; CHECK: %s = add nsw i32 %y, %x +define i32 @test2(i32 %x, i32 %y) { + %s = add nsw i32 %x, %y + ret i32 %s +} diff --git a/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll b/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll deleted file mode 100644 index b147ec960807..000000000000 --- a/test/Transforms/ScalarRepl/2003-05-30-InvalidIndices.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: opt < %s -scalarrepl - -define void @main() { - %E = alloca { { i32, float, double, i64 }, { i32, float, double, i64 } } ; <{ { i32, float, double, i64 }, { i32, float, double, i64 } }*> [#uses=1] - %tmp.151 = getelementptr { { i32, float, double, i64 }, { i32, float, double, i64 } }* %E, i64 0, i32 1, i32 3 ; <i64*> [#uses=0] - ret void -} - diff --git a/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll b/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll deleted file mode 100644 index 89c0b05333a2..000000000000 --- a/test/Transforms/ScalarRepl/2003-05-30-MultiLevel.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: opt < %s -scalarrepl - -define i32 @test() { - %X = alloca { [4 x i32] } ; <{ [4 x i32] }*> [#uses=1] - %Y = getelementptr { [4 x i32] }* %X, i64 0, i32 0, i64 2 ; <i32*> [#uses=2] - store i32 4, i32* %Y - %Z = load i32* %Y ; <i32> [#uses=1] - ret i32 %Z -} - diff --git a/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll b/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll deleted file mode 100644 index ea23c3114682..000000000000 --- a/test/Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll +++ /dev/null @@ -1,28 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output - -target datalayout = "E-p:32:32" - %struct.rtx_def = type { [2 x i8], i32, [1 x %union.rtunion_def] } - %union.rtunion_def = type { i32 } - -define void @find_reloads() { -entry: - %c_addr.i = alloca i8 ; <i8*> [#uses=1] - switch i32 0, label %return [ - i32 36, label %label.7 - i32 34, label %label.7 - i32 41, label %label.5 - ] -label.5: ; preds = %entry - ret void -label.7: ; preds = %entry, %entry - br i1 false, label %then.4, label %switchexit.0 -then.4: ; preds = %label.7 - %tmp.0.i = bitcast i8* %c_addr.i to i32* ; <i32*> [#uses=1] - store i32 44, i32* %tmp.0.i - ret void -switchexit.0: ; preds = %label.7 - ret void -return: ; preds = %entry - ret void -} - diff --git a/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll b/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll deleted file mode 100644 index 03c7452115c1..000000000000 --- a/test/Transforms/ScalarRepl/2006-01-24-IllegalUnionPromoteCrash.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output - -target datalayout = "E-p:32:32" - -define i32 @test(i64 %L) { - %X = alloca i32 ; <i32*> [#uses=2] - %Y = bitcast i32* %X to i64* ; <i64*> [#uses=1] - store i64 0, i64* %Y - %Z = load i32* %X ; <i32> [#uses=1] - ret i32 %Z -} - diff --git a/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll b/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll deleted file mode 100644 index 63840f1b3c03..000000000000 --- a/test/Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output - -define void @output_toc() { -entry: - %buf = alloca [256 x i8], align 16 ; <[256 x i8]*> [#uses=1] - %name = alloca i8*, align 4 ; <i8**> [#uses=1] - %real_name = alloca i8*, align 4 ; <i8**> [#uses=0] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - %buf.upgrd.1 = bitcast [256 x i8]* %buf to i8* ; <i8*> [#uses=1] - store i8* %buf.upgrd.1, i8** %name - call void @abort( ) - unreachable -return: ; No predecessors! - ret void -} - -declare void @abort() - diff --git a/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll b/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll deleted file mode 100644 index dcd7e534f10b..000000000000 --- a/test/Transforms/ScalarRepl/2006-10-23-PointerUnionCrash.ll +++ /dev/null @@ -1,57 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output -; END. -target datalayout = "e-p:32:32" -target triple = "i686-apple-darwin8.7.2" - -define void @glgProcessColor() { -entry: - %source_ptr = alloca i8*, align 4 ; <i8**> [#uses=2] - br i1 false, label %bb1357, label %cond_next583 -cond_next583: ; preds = %entry - ret void -bb1357: ; preds = %entry - br i1 false, label %bb1365, label %bb27055 -bb1365: ; preds = %bb1357 - switch i32 0, label %cond_next10377 [ - i32 0, label %bb4679 - i32 1, label %bb4679 - i32 2, label %bb4679 - i32 3, label %bb4679 - i32 4, label %bb5115 - i32 5, label %bb6651 - i32 6, label %bb7147 - i32 7, label %bb8683 - i32 8, label %bb9131 - i32 9, label %bb9875 - i32 10, label %bb4679 - i32 11, label %bb4859 - i32 12, label %bb4679 - i32 16, label %bb10249 - ] -bb4679: ; preds = %bb1365, %bb1365, %bb1365, %bb1365, %bb1365, %bb1365 - ret void -bb4859: ; preds = %bb1365 - ret void -bb5115: ; preds = %bb1365 - ret void -bb6651: ; preds = %bb1365 - ret void -bb7147: ; preds = %bb1365 - ret void -bb8683: ; preds = %bb1365 - ret void -bb9131: ; preds = %bb1365 - ret void -bb9875: ; preds = %bb1365 - %source_ptr9884 = bitcast i8** %source_ptr to i8** ; <i8**> [#uses=1] - %tmp9885 = load i8** %source_ptr9884 ; <i8*> [#uses=0] - ret void -bb10249: ; preds = %bb1365 - %source_ptr10257 = bitcast i8** %source_ptr to i16** ; <i16**> [#uses=1] - %tmp10258 = load i16** %source_ptr10257 ; <i16*> [#uses=0] - ret void -cond_next10377: ; preds = %bb1365 - ret void -bb27055: ; preds = %bb1357 - ret void -} diff --git a/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll b/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll deleted file mode 100644 index 260620352f31..000000000000 --- a/test/Transforms/ScalarRepl/2006-12-11-SROA-Crash.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output -; PR1045 - -target datalayout = "e-p:32:32" -target triple = "i686-pc-linux-gnu" - %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>" = type { %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"* } - %"struct.__gnu_cxx::bitmap_allocator<char>" = type { i8 } - %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block" = type { [8 x i8] } - -define void @_ZN9__gnu_cxx16bitmap_allocatorIwE27_M_deallocate_single_objectEPw() { -entry: - %this_addr.i = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"**> [#uses=3] - %tmp = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>", align 4 ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] - store %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp, %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i - %tmp.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] - %tmp.i.upgrd.1 = bitcast %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp.i to %"struct.__gnu_cxx::bitmap_allocator<char>"* ; <%"struct.__gnu_cxx::bitmap_allocator<char>"*> [#uses=0] - %tmp1.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] - %tmp.i.upgrd.2 = getelementptr %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp1.i, i32 0, i32 0 ; <%"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"**> [#uses=0] - unreachable -} diff --git a/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll b/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll deleted file mode 100644 index bd4910682f1a..000000000000 --- a/test/Transforms/ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll +++ /dev/null @@ -1,44 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-output - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" -target triple = "arm-apple-darwin8" - %struct.CGPoint = type { float, float } - %struct.aal_big_range_t = type { i32, i32 } - %struct.aal_callback_t = type { i8* (i8*, i32)*, void (i8*, i8*)* } - %struct.aal_edge_pool_t = type { %struct.aal_edge_pool_t*, i32, i32, [0 x %struct.aal_edge_t] } - %struct.aal_edge_t = type { %struct.CGPoint, %struct.CGPoint, i32 } - %struct.aal_range_t = type { i16, i16 } - %struct.aal_span_pool_t = type { %struct.aal_span_pool_t*, [341 x %struct.aal_span_t] } - %struct.aal_span_t = type { %struct.aal_span_t*, %struct.aal_big_range_t } - %struct.aal_spanarray_t = type { [2 x %struct.aal_range_t] } - %struct.aal_spanbucket_t = type { i16, [2 x i8], %struct.anon } - %struct.aal_state_t = type { %struct.CGPoint, %struct.CGPoint, %struct.CGPoint, i32, float, float, float, float, %struct.CGPoint, %struct.CGPoint, float, float, float, float, i32, i32, i32, i32, float, float, i8*, i32, i32, %struct.aal_edge_pool_t*, %struct.aal_edge_pool_t*, i8*, %struct.aal_callback_t*, i32, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_pool_t*, i8, float, i8, i32 } - %struct.anon = type { %struct.aal_spanarray_t } - - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -define fastcc void @aal_insert_span() { -entry: - %SB = alloca %struct.aal_spanbucket_t, align 4 ; <%struct.aal_spanbucket_t*> [#uses=2] - br i1 false, label %cond_true, label %cond_next79 - -cond_true: ; preds = %entry - br i1 false, label %cond_next, label %cond_next114.i - -cond_next114.i: ; preds = %cond_true - ret void - -cond_next: ; preds = %cond_true - %SB19 = bitcast %struct.aal_spanbucket_t* %SB to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %SB19, i8* null, i32 12, i32 0 ) - br i1 false, label %cond_next34, label %cond_next79 - -cond_next34: ; preds = %cond_next - %i.2.reload22 = load i32* null ; <i32> [#uses=1] - %tmp51 = getelementptr %struct.aal_spanbucket_t* %SB, i32 0, i32 2, i32 0, i32 0, i32 %i.2.reload22, i32 1 ; <i16*> [#uses=0] - ret void - -cond_next79: ; preds = %cond_next, %entry - ret void -} diff --git a/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll b/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll deleted file mode 100644 index 62f7d19dbdab..000000000000 --- a/test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: opt < %s -scalarrepl | llvm-dis -; PR3304 - - %struct.c37304a__vrec = type { i8, %struct.c37304a__vrec___disc___XVN } - %struct.c37304a__vrec___disc___XVN = type { -%struct.c37304a__vrec___disc___XVN___O } - %struct.c37304a__vrec___disc___XVN___O = type { } - -define void @_ada_c37304a() { -entry: - %v = alloca %struct.c37304a__vrec - %0 = getelementptr %struct.c37304a__vrec* %v, i32 0, i32 0 - store i8 8, i8* %0, align 1 - unreachable -} diff --git a/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll b/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll deleted file mode 100644 index c5ebf8eb5237..000000000000 --- a/test/Transforms/ScalarRepl/2009-04-21-ZeroLengthMemSet.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: opt < %s -scalarrepl | llvm-dis -; rdar://6808691 -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "x86_64-apple-darwin9.0" - type <{ i32, i16, i8, i8, i64, i64, i16, [0 x i16] }> - -define i32 @foo() { -entry: - %.compoundliteral = alloca %0 - %tmp228 = getelementptr %0* %.compoundliteral, i32 0, i32 7 - %tmp229 = bitcast [0 x i16]* %tmp228 to i8* - call void @llvm.memset.i64(i8* %tmp229, i8 0, i64 0, i32 2) - unreachable -} - -declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind diff --git a/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll b/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll deleted file mode 100644 index aa3487b27707..000000000000 --- a/test/Transforms/ScalarRepl/2009-05-08-I1Crash.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: opt < %s -scalarrepl | llvm-dis -; PR4146 - - %wrapper = type { i1 } - -define void @f() { -entry: - %w = alloca %wrapper, align 8 ; <%wrapper*> [#uses=1] - %0 = getelementptr %wrapper* %w, i64 0, i32 0 ; <i1*> - store i1 true, i1* %0 - ret void -} diff --git a/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll b/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll deleted file mode 100644 index cecbdd4b881a..000000000000 --- a/test/Transforms/ScalarRepl/2009-06-01-BitcastIntPadding.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: opt < %s -scalarrepl -; PR4286 - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "x86_64-undermydesk-freebsd8.0" - %struct.singlebool = type <{ i8 }> - -define zeroext i8 @doit() nounwind { -entry: - %a = alloca %struct.singlebool, align 1 ; <%struct.singlebool*> [#uses=2] - %storetmp.i = bitcast %struct.singlebool* %a to i1* ; <i1*> [#uses=1] - store i1 true, i1* %storetmp.i - %tmp = getelementptr %struct.singlebool* %a, i64 0, i32 0 ; <i8*> [#uses=1] - %tmp1 = load i8* %tmp ; <i8> [#uses=1] - ret i8 %tmp1 -} - diff --git a/test/Transforms/ScalarRepl/2009-08-16-VLA.ll b/test/Transforms/ScalarRepl/2009-08-16-VLA.ll deleted file mode 100644 index d69af114ad90..000000000000 --- a/test/Transforms/ScalarRepl/2009-08-16-VLA.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: opt < %s -scalarrepl -disable-opt - - %struct.Item = type { [4 x i16], %struct.rule* } - %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 } - %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* } - %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* } - %struct.list = type { i8*, %struct.list* } - %struct.stateMap = type { i8*, %struct.plank*, i32, i16* } - %struct.plank = type { i8*, %struct.list*, i32 } - %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] } - %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* } - %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** } - %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* } - %struct.Index_Map = type { i32, %struct.item_set** } - %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* } - %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** } - -define void @addHP_2_0() { -bb4.i: - %0 = malloc [0 x %struct.Item] ; <[0 x %struct.Item]*> [#uses=1] - %.sub.i.c.i = getelementptr [0 x %struct.Item]* %0, i32 0, i32 0 ; <%struct.Item*> [#uses=0] - unreachable -} diff --git a/test/Transforms/ScalarRepl/basictest.ll b/test/Transforms/ScalarRepl/basictest.ll index a26b62d0ad76..9676873c30c0 100644 --- a/test/Transforms/ScalarRepl/basictest.ll +++ b/test/Transforms/ScalarRepl/basictest.ll @@ -1,11 +1,30 @@ -; RUN: opt < %s -scalarrepl -mem2reg -S | not grep alloca +; RUN: opt < %s -scalarrepl -S | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -define i32 @test() { +define i32 @test1() { %X = alloca { i32, float } ; <{ i32, float }*> [#uses=1] %Y = getelementptr { i32, float }* %X, i64 0, i32 0 ; <i32*> [#uses=2] store i32 0, i32* %Y %Z = load i32* %Y ; <i32> [#uses=1] ret i32 %Z +; CHECK: @test1 +; CHECK-NOT: alloca +; CHECK: ret i32 0 +} + +; PR8980 +define i64 @test2(i64 %X) { + %A = alloca [8 x i8] + %B = bitcast [8 x i8]* %A to i64* + + store i64 %X, i64* %B + br label %L2 + +L2: + %Z = load i64* %B ; <i32> [#uses=1] + ret i64 %Z +; CHECK: @test2 +; CHECK-NOT: alloca +; CHECK: ret i64 %X } diff --git a/test/Transforms/ScalarRepl/copy-aggregate.ll b/test/Transforms/ScalarRepl/copy-aggregate.ll index 29924138762f..997da4bdb2fc 100644 --- a/test/Transforms/ScalarRepl/copy-aggregate.ll +++ b/test/Transforms/ScalarRepl/copy-aggregate.ll @@ -1,9 +1,11 @@ -; RUN: opt < %s -scalarrepl -S | not grep alloca +; RUN: opt < %s -scalarrepl -S | FileCheck %s ; PR3290 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" ;; Store of integer to whole alloca struct. define i32 @test1(i64 %V) nounwind { +; CHECK: test1 +; CHECK-NOT: alloca %X = alloca {{i32, i32}} %Y = bitcast {{i32,i32}}* %X to i64* store i64 %V, i64* %Y @@ -18,6 +20,8 @@ define i32 @test1(i64 %V) nounwind { ;; Store of integer to whole struct/array alloca. define float @test2(i128 %V) nounwind { +; CHECK: test2 +; CHECK-NOT: alloca %X = alloca {[4 x float]} %Y = bitcast {[4 x float]}* %X to i128* store i128 %V, i128* %Y @@ -32,6 +36,8 @@ define float @test2(i128 %V) nounwind { ;; Load of whole alloca struct as integer define i64 @test3(i32 %a, i32 %b) nounwind { +; CHECK: test3 +; CHECK-NOT: alloca %X = alloca {{i32, i32}} %A = getelementptr {{i32,i32}}* %X, i32 0, i32 0, i32 0 @@ -46,6 +52,8 @@ define i64 @test3(i32 %a, i32 %b) nounwind { ;; load of integer from whole struct/array alloca. define i128 @test4(float %a, float %b) nounwind { +; CHECK: test4 +; CHECK-NOT: alloca %X = alloca {[4 x float]} %A = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 0 %B = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 3 @@ -56,3 +64,45 @@ define i128 @test4(float %a, float %b) nounwind { %V = load i128* %Y ret i128 %V } + +;; If the elements of a struct or array alloca contain padding, SROA can still +;; split up the alloca as long as there is no padding between the elements. +%padded = type { i16, i8 } +%arr = type [4 x %padded] +define void @test5(%arr* %p, %arr* %q) { +entry: +; CHECK: test5 +; CHECK-NOT: i128 + %var = alloca %arr, align 4 + %vari8 = bitcast %arr* %var to i8* + %pi8 = bitcast %arr* %p to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %vari8, i8* %pi8, i32 16, i32 4, i1 false) + %qi8 = bitcast %arr* %q to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %qi8, i8* %vari8, i32 16, i32 4, i1 false) + ret void +} + +;; Check that an array alloca can be split up when it is also accessed with +;; a load or store as a homogeneous structure with the same element type and +;; number of elements as the array. +%homogeneous = type { <8 x i16>, <8 x i16>, <8 x i16> } +%wrapped_array = type { [3 x <8 x i16>] } +define void @test6(i8* %p, %wrapped_array* %arr) { +entry: +; CHECK: test6 +; CHECK: store <8 x i16> +; CHECK: store <8 x i16> +; CHECK: store <8 x i16> + %var = alloca %wrapped_array, align 16 + %res = call %homogeneous @test6callee(i8* %p) + %varcast = bitcast %wrapped_array* %var to %homogeneous* + store %homogeneous %res, %homogeneous* %varcast + %tmp1 = bitcast %wrapped_array* %arr to i8* + %tmp2 = bitcast %wrapped_array* %var to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp1, i8* %tmp2, i32 48, i32 16, i1 false) + ret void +} + +declare %homogeneous @test6callee(i8* nocapture) nounwind + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/Transforms/ScalarRepl/crash.ll b/test/Transforms/ScalarRepl/crash.ll new file mode 100644 index 000000000000..7b62f09e86db --- /dev/null +++ b/test/Transforms/ScalarRepl/crash.ll @@ -0,0 +1,260 @@ +; RUN: opt -scalarrepl %s -disable-output +; RUN: opt -scalarrepl-ssa %s -disable-output + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; PR9017 +define void @test1() nounwind readnone ssp { +entry: + %l_72 = alloca i32*, align 8 + unreachable + +for.cond: ; preds = %for.cond + %tmp1.i = load i32** %l_72, align 8 + store i32* %tmp1.i, i32** %l_72, align 8 + br label %for.cond + +if.end: ; No predecessors! + ret void +} + + +define void @test2() { + %E = alloca { { i32, float, double, i64 }, { i32, float, double, i64 } } ; <{ { i32, float, double, i64 }, { i32, float, double, i64 } }*> [#uses=1] + %tmp.151 = getelementptr { { i32, float, double, i64 }, { i32, float, double, i64 } }* %E, i64 0, i32 1, i32 3 ; <i64*> [#uses=0] + ret void +} + +define i32 @test3() { + %X = alloca { [4 x i32] } ; <{ [4 x i32] }*> [#uses=1] + %Y = getelementptr { [4 x i32] }* %X, i64 0, i32 0, i64 2 ; <i32*> [#uses=2] + store i32 4, i32* %Y + %Z = load i32* %Y ; <i32> [#uses=1] + ret i32 %Z +} + + +%struct.rtx_def = type { [2 x i8], i32, [1 x %union.rtunion_def] } +%union.rtunion_def = type { i32 } + +define void @test4() { +entry: + %c_addr.i = alloca i8 ; <i8*> [#uses=1] + switch i32 0, label %return [ + i32 36, label %label.7 + i32 34, label %label.7 + i32 41, label %label.5 + ] +label.5: ; preds = %entry + ret void +label.7: ; preds = %entry, %entry + br i1 false, label %then.4, label %switchexit.0 +then.4: ; preds = %label.7 + %tmp.0.i = bitcast i8* %c_addr.i to i32* ; <i32*> [#uses=1] + store i32 44, i32* %tmp.0.i + ret void +switchexit.0: ; preds = %label.7 + ret void +return: ; preds = %entry + ret void +} + + +define void @test5() { +entry: + %source_ptr = alloca i8*, align 4 ; <i8**> [#uses=2] + br i1 false, label %bb1357, label %cond_next583 +cond_next583: ; preds = %entry + ret void +bb1357: ; preds = %entry + br i1 false, label %bb1365, label %bb27055 +bb1365: ; preds = %bb1357 + switch i32 0, label %cond_next10377 [ + i32 0, label %bb4679 + i32 1, label %bb4679 + i32 2, label %bb4679 + i32 3, label %bb4679 + i32 4, label %bb5115 + i32 5, label %bb6651 + i32 6, label %bb7147 + i32 7, label %bb8683 + i32 8, label %bb9131 + i32 9, label %bb9875 + i32 10, label %bb4679 + i32 11, label %bb4859 + i32 12, label %bb4679 + i32 16, label %bb10249 + ] +bb4679: ; preds = %bb1365, %bb1365, %bb1365, %bb1365, %bb1365, %bb1365 + ret void +bb4859: ; preds = %bb1365 + ret void +bb5115: ; preds = %bb1365 + ret void +bb6651: ; preds = %bb1365 + ret void +bb7147: ; preds = %bb1365 + ret void +bb8683: ; preds = %bb1365 + ret void +bb9131: ; preds = %bb1365 + ret void +bb9875: ; preds = %bb1365 + %source_ptr9884 = bitcast i8** %source_ptr to i8** ; <i8**> [#uses=1] + %tmp9885 = load i8** %source_ptr9884 ; <i8*> [#uses=0] + ret void +bb10249: ; preds = %bb1365 + %source_ptr10257 = bitcast i8** %source_ptr to i16** ; <i16**> [#uses=1] + %tmp10258 = load i16** %source_ptr10257 ; <i16*> [#uses=0] + ret void +cond_next10377: ; preds = %bb1365 + ret void +bb27055: ; preds = %bb1357 + ret void +} + + + %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>" = type { %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"* } + %"struct.__gnu_cxx::bitmap_allocator<char>" = type { i8 } + %"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block" = type { [8 x i8] } + +; PR1045 +define void @test6() { +entry: + %this_addr.i = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"**> [#uses=3] + %tmp = alloca %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>", align 4 ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] + store %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp, %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i + %tmp.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] + %tmp.i.upgrd.1 = bitcast %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp.i to %"struct.__gnu_cxx::bitmap_allocator<char>"* ; <%"struct.__gnu_cxx::bitmap_allocator<char>"*> [#uses=0] + %tmp1.i = load %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"** %this_addr.i ; <%"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"*> [#uses=1] + %tmp.i.upgrd.2 = getelementptr %"struct.__gnu_cxx::balloc::_Inclusive_between<__gnu_cxx::bitmap_allocator<char>::_Alloc_block*>"* %tmp1.i, i32 0, i32 0 ; <%"struct.__gnu_cxx::bitmap_allocator<char>::_Alloc_block"**> [#uses=0] + unreachable +} + + %struct.CGPoint = type { float, float } + %struct.aal_big_range_t = type { i32, i32 } %struct.aal_callback_t = type { i8* (i8*, i32)*, void (i8*, i8*)* } %struct.aal_edge_pool_t = type { %struct.aal_edge_pool_t*, i32, i32, [0 x %struct.aal_edge_t] } %struct.aal_edge_t = type { %struct.CGPoint, %struct.CGPoint, i32 } + %struct.aal_range_t = type { i16, i16 } + %struct.aal_span_pool_t = type { %struct.aal_span_pool_t*, [341 x %struct.aal_span_t] } + %struct.aal_span_t = type { %struct.aal_span_t*, %struct.aal_big_range_t } + %struct.aal_spanarray_t = type { [2 x %struct.aal_range_t] } + %struct.aal_spanbucket_t = type { i16, [2 x i8], %struct.anon } + %struct.aal_state_t = type { %struct.CGPoint, %struct.CGPoint, %struct.CGPoint, i32, float, float, float, float, %struct.CGPoint, %struct.CGPoint, float, float, float, float, i32, i32, i32, i32, float, float, i8*, i32, i32, %struct.aal_edge_pool_t*, %struct.aal_edge_pool_t*, i8*, %struct.aal_callback_t*, i32, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_t*, %struct.aal_span_pool_t*, i8, float, i8, i32 } + %struct.anon = type { %struct.aal_spanarray_t } + + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +define fastcc void @test7() { +entry: + %SB = alloca %struct.aal_spanbucket_t, align 4 ; <%struct.aal_spanbucket_t*> [#uses=2] + br i1 false, label %cond_true, label %cond_next79 + +cond_true: ; preds = %entry + br i1 false, label %cond_next, label %cond_next114.i + +cond_next114.i: ; preds = %cond_true + ret void + +cond_next: ; preds = %cond_true + %SB19 = bitcast %struct.aal_spanbucket_t* %SB to i8* ; <i8*> [#uses=1] + call void @llvm.memcpy.i32( i8* %SB19, i8* null, i32 12, i32 0 ) + br i1 false, label %cond_next34, label %cond_next79 + +cond_next34: ; preds = %cond_next + %i.2.reload22 = load i32* null ; <i32> [#uses=1] + %tmp51 = getelementptr %struct.aal_spanbucket_t* %SB, i32 0, i32 2, i32 0, i32 0, i32 %i.2.reload22, i32 1 + ; <i16*> [#uses=0] + ret void + +cond_next79: ; preds = %cond_next, %entry + ret void +} + + + %struct.c37304a__vrec = type { i8, %struct.c37304a__vrec___disc___XVN } + %struct.c37304a__vrec___disc___XVN = type { +%struct.c37304a__vrec___disc___XVN___O } + %struct.c37304a__vrec___disc___XVN___O = type { } + +; PR3304 +define void @test8() { +entry: + %v = alloca %struct.c37304a__vrec + %0 = getelementptr %struct.c37304a__vrec* %v, i32 0, i32 0 + store i8 8, i8* %0, align 1 + unreachable +} + + + +; rdar://6808691 - ZeroLengthMemSet + type <{ i32, i16, i8, i8, i64, i64, i16, [0 x i16] }> + +define i32 @test9() { +entry: + %.compoundliteral = alloca %0 + %tmp228 = getelementptr %0* %.compoundliteral, i32 0, i32 7 + %tmp229 = bitcast [0 x i16]* %tmp228 to i8* + call void @llvm.memset.i64(i8* %tmp229, i8 0, i64 0, i32 2) + unreachable +} + +declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind + + +; PR4146 - i1 handling +%wrapper = type { i1 } +define void @test10() { +entry: + %w = alloca %wrapper, align 8 ; <%wrapper*> [#uses=1] + %0 = getelementptr %wrapper* %w, i64 0, i32 0 ; <i1*> + store i1 true, i1* %0 + ret void +} + + + %struct.singlebool = type <{ i8 }> +; PR4286 +define zeroext i8 @test11() nounwind { +entry: + %a = alloca %struct.singlebool, align 1 ; <%struct.singlebool*> [#uses=2] + %storetmp.i = bitcast %struct.singlebool* %a to i1* ; <i1*> [#uses=1] + store i1 true, i1* %storetmp.i + %tmp = getelementptr %struct.singlebool* %a, i64 0, i32 0 ; <i8*> [#uses=1] + %tmp1 = load i8* %tmp ; <i8> [#uses=1] + ret i8 %tmp1 +} + + + %struct.Item = type { [4 x i16], %struct.rule* } + %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 } + %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* } + %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* } + %struct.list = type { i8*, %struct.list* } + %struct.stateMap = type { i8*, %struct.plank*, i32, i16* } + %struct.plank = type { i8*, %struct.list*, i32 } + %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] } + %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* } + %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** } + %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* } + %struct.Index_Map = type { i32, %struct.item_set** } + %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* } + %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** } + +; VLAs. +define void @test12() { +bb4.i: + %0 = malloc [0 x %struct.Item] ; <[0 x %struct.Item]*> [#uses=1] + %.sub.i.c.i = getelementptr [0 x %struct.Item]* %0, i32 0, i32 0 ; <%struct.Item*> [#uses=0] + unreachable +} + +; PR8680 +define void @test13() nounwind { +entry: + %memtmp = alloca i32, align 4 + %0 = bitcast i32* %memtmp to void ()* + call void %0() nounwind + ret void +} diff --git a/test/Transforms/ScalarRepl/memcpy-from-global.ll b/test/Transforms/ScalarRepl/memcpy-from-global.ll index 81527853c53b..5b258645344d 100644 --- a/test/Transforms/ScalarRepl/memcpy-from-global.ll +++ b/test/Transforms/ScalarRepl/memcpy-from-global.ll @@ -1,12 +1,19 @@ -; RUN: opt < %s -scalarrepl -S | not grep {call.*memcpy} +; RUN: opt < %s -scalarrepl -S | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" @C.0.1248 = internal constant [128 x float] [ float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 ], align 32 ; <[128 x float]*> [#uses=1] -define float @grad4(i32 %hash, float %x, float %y, float %z, float %w) { +define float @test1(i32 %hash, float %x, float %y, float %z, float %w) { entry: %lookupTable = alloca [128 x float], align 16 ; <[128 x float]*> [#uses=5] %lookupTable1 = bitcast [128 x float]* %lookupTable to i8* ; <i8*> [#uses=1] call void @llvm.memcpy.i32( i8* %lookupTable1, i8* bitcast ([128 x float]* @C.0.1248 to i8*), i32 512, i32 16 ) + +; CHECK: @test1 +; CHECK-NOT: alloca +; CHECK-NOT: call{{.*}}@llvm.memcpy +; CHECK: %lookupTable1 = bitcast [128 x float]* @C.0.1248 to i8* +; CHECK-NOT: call{{.*}}@llvm.memcpy + %tmp3 = shl i32 %hash, 2 ; <i32> [#uses=1] %tmp5 = and i32 %tmp3, 124 ; <i32> [#uses=4] %tmp753 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp5 ; <float*> [#uses=1] @@ -32,3 +39,58 @@ entry: } declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + + + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +%T = type { i8, [123 x i8] } + +@G = constant %T {i8 1, [123 x i8] zeroinitializer } + +define void @test2() { + %A = alloca %T + %B = alloca %T + %a = bitcast %T* %A to i8* + %b = bitcast %T* %B to i8* + +; CHECK: @test2 + +; %A alloca is deleted +; CHECK-NEXT: %B = alloca %T + +; use @G instead of %A +; CHECK-NEXT: %a = bitcast %T* @G to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 124, i32 4, i1 false) + call void @bar(i8* %b) + ret void +} + +declare void @bar(i8*) + + +;; Should be able to eliminate the alloca. +define void @test3() { + %A = alloca %T + %a = bitcast %T* %A to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @bar(i8* %a) readonly +; CHECK: @test3 +; CHECK-NEXT: %a = bitcast %T* @G to i8* +; CHECK-NEXT: call void @bar(i8* %a) + ret void +} + +define void @test4() { + %A = alloca %T + %a = bitcast %T* %A to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) + call void @baz(i8* byval %a) +; CHECK: @test4 +; CHECK-NEXT: %a = bitcast %T* @G to i8* +; CHECK-NEXT: call void @baz(i8* byval %a) + ret void +} + +declare void @baz(i8* byval) diff --git a/test/Transforms/ScalarRepl/phi-select.ll b/test/Transforms/ScalarRepl/phi-select.ll new file mode 100644 index 000000000000..fa3972de90a4 --- /dev/null +++ b/test/Transforms/ScalarRepl/phi-select.ll @@ -0,0 +1,153 @@ +; RUN: opt %s -scalarrepl -S | FileCheck %s +; Test promotion of allocas that have phis and select users. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.2" + +%struct.X = type { i32 } +%PairTy = type {i32, i32} + +; CHECK: @test1 +; CHECK: %a.0 = alloca i32 +; CHECK: %b.0 = alloca i32 +define i32 @test1(i32 %x) nounwind readnone ssp { +entry: + %a = alloca %struct.X, align 8 ; <%struct.X*> [#uses=2] + %b = alloca %struct.X, align 8 ; <%struct.X*> [#uses=2] + %0 = getelementptr inbounds %struct.X* %a, i64 0, i32 0 ; <i32*> [#uses=1] + store i32 1, i32* %0, align 8 + %1 = getelementptr inbounds %struct.X* %b, i64 0, i32 0 ; <i32*> [#uses=1] + store i32 2, i32* %1, align 8 + %2 = icmp eq i32 %x, 0 ; <i1> [#uses=1] + %p.0 = select i1 %2, %struct.X* %b, %struct.X* %a ; <%struct.X*> [#uses=1] + %3 = getelementptr inbounds %struct.X* %p.0, i64 0, i32 0 ; <i32*> [#uses=1] + %4 = load i32* %3, align 8 ; <i32> [#uses=1] + ret i32 %4 +} + +; CHECK: @test2 +; CHECK: %X.ld = phi i32 [ 1, %entry ], [ 2, %T ] +; CHECK-NEXT: ret i32 %X.ld +define i32 @test2(i1 %c) { +entry: + %A = alloca {i32, i32} + %B = getelementptr {i32, i32}* %A, i32 0, i32 0 + store i32 1, i32* %B + br i1 %c, label %T, label %F +T: + %C = getelementptr {i32, i32}* %A, i32 0, i32 1 + store i32 2, i32* %C + br label %F +F: + %X = phi i32* [%B, %entry], [%C, %T] + %Q = load i32* %X + ret i32 %Q +} + +; CHECK: @test3 +; CHECK-NEXT: %Q = select i1 %c, i32 1, i32 2 +; CHECK-NEXT: ret i32 %Q +; rdar://8904039 +define i32 @test3(i1 %c) { + %A = alloca {i32, i32} + %B = getelementptr {i32, i32}* %A, i32 0, i32 0 + store i32 1, i32* %B + %C = getelementptr {i32, i32}* %A, i32 0, i32 1 + store i32 2, i32* %C + + %X = select i1 %c, i32* %B, i32* %C + %Q = load i32* %X + ret i32 %Q +} + +;; We can't scalarize this, a use of the select is not an element access. +define i64 @test4(i1 %c) { +entry: + %A = alloca %PairTy + ; CHECK: @test4 + ; CHECK: %A = alloca %PairTy + %B = getelementptr {i32, i32}* %A, i32 0, i32 0 + store i32 1, i32* %B + %C = getelementptr {i32, i32}* %A, i32 0, i32 1 + store i32 2, i32* %B + + %X = select i1 %c, i32* %B, i32* %C + %Y = bitcast i32* %X to i64* + %Q = load i64* %Y + ret i64 %Q +} + + +;; +;; Tests for promoting allocas used by selects. +;; rdar://7339113 +;; + +define i32 @test5(i32 *%P) nounwind readnone ssp { +entry: + %b = alloca i32, align 8 + store i32 2, i32* %b, align 8 + + ;; Select on constant condition should be folded. + %p.0 = select i1 false, i32* %b, i32* %P + store i32 123, i32* %p.0 + + %r = load i32* %b, align 8 + ret i32 %r + +; CHECK: @test5 +; CHECK: store i32 123, i32* %P +; CHECK: ret i32 2 +} + +define i32 @test6(i32 %x, i1 %c) nounwind readnone ssp { + %a = alloca i32, align 8 + %b = alloca i32, align 8 + store i32 1, i32* %a, align 8 + store i32 2, i32* %b, align 8 + %p.0 = select i1 %c, i32* %b, i32* %a + %r = load i32* %p.0, align 8 + ret i32 %r +; CHECK: @test6 +; CHECK-NEXT: %r = select i1 %c, i32 2, i32 1 +; CHECK-NEXT: ret i32 %r +} + +; Verify that the loads happen where the loads are, not where the select is. +define i32 @test7(i32 %x, i1 %c) nounwind readnone ssp { + %a = alloca i32, align 8 + %b = alloca i32, align 8 + store i32 1, i32* %a + store i32 2, i32* %b + %p.0 = select i1 %c, i32* %b, i32* %a + + store i32 0, i32* %a + + %r = load i32* %p.0, align 8 + ret i32 %r +; CHECK: @test7 +; CHECK-NOT: alloca i32 +; CHECK: %r = select i1 %c, i32 2, i32 0 +; CHECK: ret i32 %r +} + +;; Promote allocs that are PHI'd together by moving the loads. +define i32 @test8(i32 %x) nounwind readnone ssp { +; CHECK: @test8 +; CHECK-NOT: load i32 +; CHECK-NOT: store i32 +; CHECK: %p.0.ld = phi i32 [ 2, %entry ], [ 1, %T ] +; CHECK-NEXT: ret i32 %p.0.ld +entry: + %a = alloca i32, align 8 + %b = alloca i32, align 8 + store i32 1, i32* %a, align 8 + store i32 2, i32* %b, align 8 + %c = icmp eq i32 %x, 0 + br i1 %c, label %T, label %Cont +T: + br label %Cont +Cont: + %p.0 = phi i32* [%b, %entry],[%a, %T] + %r = load i32* %p.0, align 8 + ret i32 %r +} diff --git a/test/Transforms/ScalarRepl/vector_promote.ll b/test/Transforms/ScalarRepl/vector_promote.ll index fe55426b24a1..37cb49f539d6 100644 --- a/test/Transforms/ScalarRepl/vector_promote.ll +++ b/test/Transforms/ScalarRepl/vector_promote.ll @@ -87,8 +87,6 @@ define i32 @test5(float %X) { ;; should turn into bitcast. } -;; should not turn into <1 x i64> - It is a banned MMX datatype. -;; rdar://8380055 define i64 @test6(<2 x float> %X) { %X_addr = alloca <2 x float> store <2 x float> %X, <2 x float>* %X_addr @@ -96,7 +94,7 @@ define i64 @test6(<2 x float> %X) { %tmp = load i64* %P ret i64 %tmp ; CHECK: @test6 -; CHECK-NEXT: bitcast <2 x float> %X to i64 -; CHECK-NEXT: ret i64 +; CHECK: bitcast <2 x float> %X to <1 x i64> +; CHECK: ret i64 } diff --git a/test/Transforms/SimplifyCFG/2010-10-24-OnlyUnwindInEntry.ll b/test/Transforms/SimplifyCFG/2010-10-24-OnlyUnwindInEntry.ll new file mode 100644 index 000000000000..ebacf2fe9a9e --- /dev/null +++ b/test/Transforms/SimplifyCFG/2010-10-24-OnlyUnwindInEntry.ll @@ -0,0 +1,6 @@ +; RUN: opt %s -simplifycfg -disable-output +; PR8445 + +define void @test() { + unwind +} diff --git a/test/Transforms/SimplifyCFG/MagicPointer.ll b/test/Transforms/SimplifyCFG/MagicPointer.ll index 54e5b14880c0..93b9a276eac4 100644 --- a/test/Transforms/SimplifyCFG/MagicPointer.ll +++ b/test/Transforms/SimplifyCFG/MagicPointer.ll @@ -8,7 +8,6 @@ ; CHECK: i64 2, label ; CHECK: i64 3, label ; CHECK: i64 4, label -; CHECK-NOT: br ; CHECK: } target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" diff --git a/test/Transforms/SimplifyCFG/PhiBlockMerge.ll b/test/Transforms/SimplifyCFG/PhiBlockMerge.ll index a648efd1740e..c28d0bac3759 100644 --- a/test/Transforms/SimplifyCFG/PhiBlockMerge.ll +++ b/test/Transforms/SimplifyCFG/PhiBlockMerge.ll @@ -1,12 +1,14 @@ ; Test merging of blocks that only have PHI nodes in them ; -; RUN: opt < %s -simplifycfg -S | not grep N: +; RUN: opt < %s -simplifycfg -S | FileCheck %s ; define i32 @test(i1 %a, i1 %b) { -; <label>:0 +; CHECK: br i1 %a br i1 %a, label %M, label %O O: ; preds = %0 +; CHECK: select i1 %b, i32 0, i32 1 +; CHECK-NOT: phi br i1 %b, label %N, label %Q Q: ; preds = %O br label %N @@ -15,6 +17,7 @@ N: ; preds = %Q, %O %Wp = phi i32 [ 0, %O ], [ 1, %Q ] ; <i32> [#uses=1] br label %M M: ; preds = %N, %0 +; CHECK: %W = phi i32 %W = phi i32 [ %Wp, %N ], [ 2, %0 ] ; <i32> [#uses=1] %R = add i32 %W, 1 ; <i32> [#uses=1] ret i32 %R diff --git a/test/Transforms/SimplifyCFG/PhiEliminate.ll b/test/Transforms/SimplifyCFG/PhiEliminate.ll index 73cf466a4f74..d5ce9a7e6bc8 100644 --- a/test/Transforms/SimplifyCFG/PhiEliminate.ll +++ b/test/Transforms/SimplifyCFG/PhiEliminate.ll @@ -11,20 +11,6 @@ declare void @use(i1) declare void @use.upgrd.1(i32) -define void @test2(i1 %c, i1 %d, i32 %V, i32 %V2) { -; <label>:0 - br i1 %d, label %X, label %F -X: ; preds = %0 - br i1 %c, label %T, label %F -T: ; preds = %X - br label %F -F: ; preds = %T, %X, %0 - %B1 = phi i1 [ true, %0 ], [ false, %T ], [ false, %X ] ; <i1> [#uses=1] - %I7 = phi i32 [ %V, %0 ], [ %V2, %T ], [ %V2, %X ] ; <i32> [#uses=1] - call void @use( i1 %B1 ) - call void @use.upgrd.1( i32 %I7 ) - ret void -} define void @test(i1 %c, i32 %V, i32 %V2) { ; <label>:0 diff --git a/test/Transforms/SimplifyCFG/basictest.ll b/test/Transforms/SimplifyCFG/basictest.ll index 7315ff66bd12..052e10667da5 100644 --- a/test/Transforms/SimplifyCFG/basictest.ll +++ b/test/Transforms/SimplifyCFG/basictest.ll @@ -3,8 +3,7 @@ ; RUN: opt < %s -simplifycfg -S | FileCheck %s define void @test1() { - br label %BB1 -BB1: ; preds = %0 + br label %1 ret void ; CHECK: @test1 ; CHECK-NEXT: ret void @@ -12,7 +11,6 @@ BB1: ; preds = %0 define void @test2() { ret void -BB1: ; No predecessors! ret void ; CHECK: @test2 ; CHECK-NEXT: ret void @@ -20,35 +18,22 @@ BB1: ; No predecessors! } define void @test3(i1 %T) { - br i1 %T, label %BB1, label %BB1 -BB1: ; preds = %0, %0 + br i1 %T, label %1, label %1 ret void ; CHECK: @test3 ; CHECK-NEXT: ret void } -define void @test4() { - br label %return -return: - ret void -; CHECK: @test4 -; CHECK-NEXT: ret void -} -@test4g = global i8* blockaddress(@test4, %return) - - ; PR5795 define void @test5(i32 %A) { switch i32 %A, label %return [ - i32 2, label %bb - i32 10, label %bb1 + i32 2, label %1 + i32 10, label %2 ] -bb: ; preds = %entry ret void -bb1: ; preds = %entry ret void return: ; preds = %entry diff --git a/test/Transforms/SimplifyCFG/indirectbr.ll b/test/Transforms/SimplifyCFG/indirectbr.ll index de4f5b607551..7fb4def5b932 100644 --- a/test/Transforms/SimplifyCFG/indirectbr.ll +++ b/test/Transforms/SimplifyCFG/indirectbr.ll @@ -62,3 +62,121 @@ entry: BB0: ret void } + + +; Make sure the blocks in the next few tests aren't trivially removable as +; successors by taking their addresses. + +@anchor = constant [13 x i8*] [ + i8* blockaddress(@indbrtest3, %L1), i8* blockaddress(@indbrtest3, %L2), i8* blockaddress(@indbrtest3, %L3), + i8* blockaddress(@indbrtest4, %L1), i8* blockaddress(@indbrtest4, %L2), i8* blockaddress(@indbrtest4, %L3), + i8* blockaddress(@indbrtest5, %L1), i8* blockaddress(@indbrtest5, %L2), i8* blockaddress(@indbrtest5, %L3), i8* blockaddress(@indbrtest5, %L4), + i8* blockaddress(@indbrtest6, %L1), i8* blockaddress(@indbrtest6, %L2), i8* blockaddress(@indbrtest6, %L3) +] + +; SimplifyCFG should turn the indirectbr into a conditional branch on the +; condition of the select. + +; CHECK: @indbrtest3 +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 %cond, label %L1, label %L2 +; CHECK-NOT: indirectbr +; CHECK-NOT: br +; CHECK-NOT: L3: +define void @indbrtest3(i1 %cond, i8* %address) nounwind { +entry: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest3, %L1), i8* blockaddress(@indbrtest3, %L2) + indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3] + +L1: + call void @A() + ret void +L2: + call void @C() + ret void +L3: + call void @foo() + ret void +} + +; SimplifyCFG should turn the indirectbr into an unconditional branch to the +; only possible destination. +; As in @indbrtest1, it should really remove the branch entirely, but it doesn't +; because it's in the entry block. + +; CHECK: @indbrtest4 +; CHECK-NEXT: entry: +; CHECK-NEXT: br label %L1 +define void @indbrtest4(i1 %cond) nounwind { +entry: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest4, %L1), i8* blockaddress(@indbrtest4, %L1) + indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3] + +L1: + call void @A() + ret void +L2: + call void @C() + ret void +L3: + call void @foo() + ret void +} + +; SimplifyCFG should turn the indirectbr into an unreachable because neither +; destination is listed as a successor. + +; CHECK: @indbrtest5 +; CHECK-NEXT: entry: +; CHECK-NEXT: unreachable +; CHECK-NEXT: } +define void @indbrtest5(i1 %cond, i8* %anchor) nounwind { +entry: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest5, %L1), i8* blockaddress(@indbrtest5, %L2) +; This needs to have more than one successor for this test, otherwise it gets +; replaced with an unconditional branch to the single successor. + indirectbr i8* %indirect.goto.dest, [label %L3, label %L4] + +L1: + call void @A() + ret void +L2: + call void @C() + ret void +L3: + call void @foo() + ret void +L4: + call void @foo() + +; This keeps blockaddresses not otherwise listed as successors from being zapped +; before SimplifyCFG even looks at the indirectbr. + indirectbr i8* %anchor, [label %L1, label %L2] +} + +; The same as above, except the selected addresses are equal. + +; CHECK: @indbrtest6 +; CHECK-NEXT: entry: +; CHECK-NEXT: unreachable +; CHECK-NEXT: } +define void @indbrtest6(i1 %cond, i8* %anchor) nounwind { +entry: + %indirect.goto.dest = select i1 %cond, i8* blockaddress(@indbrtest6, %L1), i8* blockaddress(@indbrtest6, %L1) +; This needs to have more than one successor for this test, otherwise it gets +; replaced with an unconditional branch to the single successor. + indirectbr i8* %indirect.goto.dest, [label %L2, label %L3] + +L1: + call void @A() + ret void +L2: + call void @C() + ret void +L3: + call void @foo() + +; This keeps blockaddresses not otherwise listed as successors from being zapped +; before SimplifyCFG even looks at the indirectbr. + indirectbr i8* %anchor, [label %L1, label %L2] +} diff --git a/test/Transforms/SimplifyCFG/invoke_unwind.ll b/test/Transforms/SimplifyCFG/invoke_unwind.ll index bbd779beb489..73faa952fba9 100644 --- a/test/Transforms/SimplifyCFG/invoke_unwind.ll +++ b/test/Transforms/SimplifyCFG/invoke_unwind.ll @@ -9,10 +9,9 @@ define i32 @test1() { ; CHECK-NEXT: call void @bar() ; CHECK-NEXT: ret i32 0 invoke void @bar( ) - to label %Ok unwind label %Rethrow -Ok: ; preds = %0 + to label %1 unwind label %Rethrow ret i32 0 -Rethrow: ; preds = %0 +Rethrow: unwind } diff --git a/test/Transforms/SimplifyCFG/speculate-with-offset.ll b/test/Transforms/SimplifyCFG/speculate-with-offset.ll new file mode 100644 index 000000000000..a737d5602e84 --- /dev/null +++ b/test/Transforms/SimplifyCFG/speculate-with-offset.ll @@ -0,0 +1,94 @@ +; RUN: opt -simplifycfg -S < %s | FileCheck %s + +; This load is safe to speculate, as it's from a safe offset +; within an alloca. + +; CHECK: @yes +; CHECK-NOT: br + +define void @yes(i1 %c) nounwind { +entry: + %a = alloca [4 x i64*], align 8 + %__a.addr = getelementptr [4 x i64*]* %a, i64 0, i64 3 + call void @frob(i64** %__a.addr) + br i1 %c, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %return + +if.end: ; preds = %entry + %tmp5 = load i64** %__a.addr, align 8 + br label %return + +return: ; preds = %if.end, %if.then + %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ] + ret void +} + +; CHECK: @no0 +; CHECK: br i1 %c + +define void @no0(i1 %c) nounwind { +entry: + %a = alloca [4 x i64*], align 8 + %__a.addr = getelementptr [4 x i64*]* %a, i64 0, i64 4 + call void @frob(i64** %__a.addr) + br i1 %c, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %return + +if.end: ; preds = %entry + %tmp5 = load i64** %__a.addr, align 8 + br label %return + +return: ; preds = %if.end, %if.then + %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ] + ret void +} + +; CHECK: @no1 +; CHECK: br i1 %c + +define void @no1(i1 %c, i64 %n) nounwind { +entry: + %a = alloca [4 x i64*], align 8 + %__a.addr = getelementptr [4 x i64*]* %a, i64 0, i64 %n + call void @frob(i64** %__a.addr) + br i1 %c, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %return + +if.end: ; preds = %entry + %tmp5 = load i64** %__a.addr, align 8 + br label %return + +return: ; preds = %if.end, %if.then + %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ] + ret void +} + +; CHECK: @no2 +; CHECK: br i1 %c + +define void @no2(i1 %c, i64 %n) nounwind { +entry: + %a = alloca [4 x i64*], align 8 + %__a.addr = getelementptr [4 x i64*]* %a, i64 1, i64 0 + call void @frob(i64** %__a.addr) + br i1 %c, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %return + +if.end: ; preds = %entry + %tmp5 = load i64** %__a.addr, align 8 + br label %return + +return: ; preds = %if.end, %if.then + %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ] + ret void +} + +declare void @frob(i64** nocapture %p) diff --git a/test/Transforms/SimplifyCFG/switch-to-icmp.ll b/test/Transforms/SimplifyCFG/switch-to-icmp.ll new file mode 100644 index 000000000000..414f8475bc23 --- /dev/null +++ b/test/Transforms/SimplifyCFG/switch-to-icmp.ll @@ -0,0 +1,39 @@ +; RUN: opt -S -simplifycfg < %s | FileCheck %s + +define zeroext i1 @test1(i32 %x) nounwind readnone ssp noredzone { +entry: + switch i32 %x, label %lor.rhs [ + i32 2, label %lor.end + i32 1, label %lor.end + i32 3, label %lor.end + ] + +lor.rhs: + br label %lor.end + +lor.end: + %0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ] + ret i1 %0 + +; CHECK: @test1 +; CHECK: %x.off = add i32 %x, -1 +; CHECK: %switch = icmp ult i32 %x.off, 3 +} + +define zeroext i1 @test2(i32 %x) nounwind readnone ssp noredzone { +entry: + switch i32 %x, label %lor.rhs [ + i32 0, label %lor.end + i32 1, label %lor.end + ] + +lor.rhs: + br label %lor.end + +lor.end: + %0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ] + ret i1 %0 + +; CHECK: @test2 +; CHECK: %switch = icmp ult i32 %x, 2 +} diff --git a/test/Transforms/SimplifyCFG/switch_create.ll b/test/Transforms/SimplifyCFG/switch_create.ll index 9b3aaf7f20de..546cc75f2973 100644 --- a/test/Transforms/SimplifyCFG/switch_create.ll +++ b/test/Transforms/SimplifyCFG/switch_create.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -simplifycfg -S | not grep br +; RUN: opt < %s -simplifycfg -S | FileCheck %s declare void @foo1() @@ -15,6 +15,11 @@ T: ; preds = %0 F: ; preds = %0 call void @foo2( ) ret void +; CHECK: @test1 +; CHECK: switch i32 %V, label %F [ +; CHECK: i32 17, label %T +; CHECK: i32 4, label %T +; CHECK: ] } define void @test2(i32 %V) { @@ -28,6 +33,11 @@ T: ; preds = %0 F: ; preds = %0 call void @foo2( ) ret void +; CHECK: @test2 +; CHECK: switch i32 %V, label %T [ +; CHECK: i32 17, label %F +; CHECK: i32 4, label %F +; CHECK: ] } define void @test3(i32 %V) { @@ -42,6 +52,430 @@ T: ; preds = %N, %0 F: ; preds = %N call void @foo2( ) ret void + +; CHECK: @test3 +; CHECK: switch i32 %V, label %F [ +; CHECK: i32 4, label %T +; CHECK: i32 17, label %T +; CHECK: ] } + +define i32 @test4(i8 zeroext %c) nounwind ssp noredzone { +entry: + %cmp = icmp eq i8 %c, 62 + br i1 %cmp, label %lor.end, label %lor.lhs.false + +lor.lhs.false: ; preds = %entry + %cmp4 = icmp eq i8 %c, 34 + br i1 %cmp4, label %lor.end, label %lor.rhs + +lor.rhs: ; preds = %lor.lhs.false + %cmp8 = icmp eq i8 %c, 92 + br label %lor.end + +lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry + %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp8, %lor.rhs ] + %lor.ext = zext i1 %0 to i32 + ret i32 %lor.ext + +; CHECK: @test4 +; CHECK: switch i8 %c, label %lor.rhs [ +; CHECK: i8 62, label %lor.end +; CHECK: i8 34, label %lor.end +; CHECK: i8 92, label %lor.end +; CHECK: ] +} + +define i32 @test5(i8 zeroext %c) nounwind ssp noredzone { +entry: + switch i8 %c, label %lor.rhs [ + i8 62, label %lor.end + i8 34, label %lor.end + i8 92, label %lor.end + ] + +lor.rhs: ; preds = %entry + %V = icmp eq i8 %c, 92 + br label %lor.end + +lor.end: ; preds = %entry, %entry, %entry, %lor.rhs + %0 = phi i1 [ true, %entry ], [ %V, %lor.rhs ], [ true, %entry ], [ true, %entry ] + %lor.ext = zext i1 %0 to i32 + ret i32 %lor.ext +; CHECK: @test5 +; CHECK: switch i8 %c, label %lor.rhs [ +; CHECK: i8 62, label %lor.end +; CHECK: i8 34, label %lor.end +; CHECK: i8 92, label %lor.end +; CHECK: ] +} + + +define i1 @test6({ i32, i32 }* %I) { +entry: + %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1] + %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6] + %tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1] + br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0 +shortcirc_next.0: ; preds = %entry + %tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1] + br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1 +shortcirc_next.1: ; preds = %shortcirc_next.0 + %tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1] + br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2 +shortcirc_next.2: ; preds = %shortcirc_next.1 + %tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1] + br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3 +shortcirc_next.3: ; preds = %shortcirc_next.2 + %tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1] + br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4 +shortcirc_next.4: ; preds = %shortcirc_next.3 + %tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1] + br label %UnifiedReturnBlock +shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry + br label %UnifiedReturnBlock +UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4 + %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1] + ret i1 %UnifiedRetVal + +; CHECK: @test6 +; CHECK: %tmp.2.i.off = add i32 %tmp.2.i, -14 +; CHECK: %switch = icmp ult i32 %tmp.2.i.off, 6 +} + +define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone { +entry: + %cmp = icmp ult i32 %x, 32 + %cmp4 = icmp eq i8 %c, 97 + %or.cond = or i1 %cmp, %cmp4 + %cmp9 = icmp eq i8 %c, 99 + %or.cond11 = or i1 %or.cond, %cmp9 + br i1 %or.cond11, label %if.then, label %if.end + +if.then: ; preds = %entry + tail call void @foo1() nounwind noredzone + ret void + +if.end: ; preds = %entry + ret void + +; CHECK: @test7 +; CHECK: %cmp = icmp ult i32 %x, 32 +; CHECK: br i1 %cmp, label %if.then, label %switch.early.test +; CHECK: switch.early.test: +; CHECK: switch i8 %c, label %if.end [ +; CHECK: i8 99, label %if.then +; CHECK: i8 97, label %if.then +; CHECK: ] +} + +define i32 @test8(i8 zeroext %c, i32 %x, i1 %C) nounwind ssp noredzone { +entry: + br i1 %C, label %N, label %if.then +N: + %cmp = icmp ult i32 %x, 32 + %cmp4 = icmp eq i8 %c, 97 + %or.cond = or i1 %cmp, %cmp4 + %cmp9 = icmp eq i8 %c, 99 + %or.cond11 = or i1 %or.cond, %cmp9 + br i1 %or.cond11, label %if.then, label %if.end + +if.then: ; preds = %entry + %A = phi i32 [0, %entry], [42, %N] + tail call void @foo1() nounwind noredzone + ret i32 %A + +if.end: ; preds = %entry + ret i32 0 + +; CHECK: @test8 +; CHECK: switch.early.test: +; CHECK: switch i8 %c, label %if.end [ +; CHECK: i8 99, label %if.then +; CHECK: i8 97, label %if.then +; CHECK: ] +; CHECK: %A = phi i32 [ 0, %entry ], [ 42, %switch.early.test ], [ 42, %N ], [ 42, %switch.early.test ] +} + +;; This is "Example 7" from http://blog.regehr.org/archives/320 +define i32 @test9(i8 zeroext %c) nounwind ssp noredzone { +entry: + %cmp = icmp ult i8 %c, 33 + br i1 %cmp, label %lor.end, label %lor.lhs.false + +lor.lhs.false: ; preds = %entry + %cmp4 = icmp eq i8 %c, 46 + br i1 %cmp4, label %lor.end, label %lor.lhs.false6 + +lor.lhs.false6: ; preds = %lor.lhs.false + %cmp9 = icmp eq i8 %c, 44 + br i1 %cmp9, label %lor.end, label %lor.lhs.false11 + +lor.lhs.false11: ; preds = %lor.lhs.false6 + %cmp14 = icmp eq i8 %c, 58 + br i1 %cmp14, label %lor.end, label %lor.lhs.false16 + +lor.lhs.false16: ; preds = %lor.lhs.false11 + %cmp19 = icmp eq i8 %c, 59 + br i1 %cmp19, label %lor.end, label %lor.lhs.false21 + +lor.lhs.false21: ; preds = %lor.lhs.false16 + %cmp24 = icmp eq i8 %c, 60 + br i1 %cmp24, label %lor.end, label %lor.lhs.false26 + +lor.lhs.false26: ; preds = %lor.lhs.false21 + %cmp29 = icmp eq i8 %c, 62 + br i1 %cmp29, label %lor.end, label %lor.lhs.false31 + +lor.lhs.false31: ; preds = %lor.lhs.false26 + %cmp34 = icmp eq i8 %c, 34 + br i1 %cmp34, label %lor.end, label %lor.lhs.false36 + +lor.lhs.false36: ; preds = %lor.lhs.false31 + %cmp39 = icmp eq i8 %c, 92 + br i1 %cmp39, label %lor.end, label %lor.rhs + +lor.rhs: ; preds = %lor.lhs.false36 + %cmp43 = icmp eq i8 %c, 39 + br label %lor.end + +lor.end: ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.false31, %lor.lhs.false26, %lor.lhs.false21, %lor.lhs.false16, %lor.lhs.false11, %lor.lhs.false6, %lor.lhs.false, %entry + %0 = phi i1 [ true, %lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false21 ], [ true, %lor.lhs.false16 ], [ true, %lor.lhs.false11 ], [ true, %lor.lhs.false6 ], [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp43, %lor.rhs ] + %conv46 = zext i1 %0 to i32 + ret i32 %conv46 + +; CHECK: @test9 +; CHECK: %cmp = icmp ult i8 %c, 33 +; CHECK: br i1 %cmp, label %lor.end, label %switch.early.test + +; CHECK: switch.early.test: +; CHECK: switch i8 %c, label %lor.rhs [ +; CHECK: i8 92, label %lor.end +; CHECK: i8 62, label %lor.end +; CHECK: i8 60, label %lor.end +; CHECK: i8 59, label %lor.end +; CHECK: i8 58, label %lor.end +; CHECK: i8 46, label %lor.end +; CHECK: i8 44, label %lor.end +; CHECK: i8 34, label %lor.end +; CHECK: i8 39, label %lor.end +; CHECK: ] +} + +define i32 @test10(i32 %mode, i1 %Cond) { + %A = icmp ne i32 %mode, 0 + %B = icmp ne i32 %mode, 51 + %C = and i1 %A, %B + %D = and i1 %C, %Cond + br i1 %D, label %T, label %F +T: + ret i32 123 +F: + ret i32 324 + +; CHECK: @test10 +; CHECK: br i1 %Cond, label %switch.early.test, label %F +; CHECK:switch.early.test: +; CHECK: switch i32 %mode, label %T [ +; CHECK: i32 51, label %F +; CHECK: i32 0, label %F +; CHECK: ] +} + +; PR8780 +define i32 @test11(i32 %bar) nounwind { +entry: + %cmp = icmp eq i32 %bar, 4 + %cmp2 = icmp eq i32 %bar, 35 + %or.cond = or i1 %cmp, %cmp2 + %cmp5 = icmp eq i32 %bar, 53 + %or.cond1 = or i1 %or.cond, %cmp5 + %cmp8 = icmp eq i32 %bar, 24 + %or.cond2 = or i1 %or.cond1, %cmp8 + %cmp11 = icmp eq i32 %bar, 23 + %or.cond3 = or i1 %or.cond2, %cmp11 + %cmp14 = icmp eq i32 %bar, 55 + %or.cond4 = or i1 %or.cond3, %cmp14 + %cmp17 = icmp eq i32 %bar, 12 + %or.cond5 = or i1 %or.cond4, %cmp17 + %cmp20 = icmp eq i32 %bar, 35 + %or.cond6 = or i1 %or.cond5, %cmp20 + br i1 %or.cond6, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %return + +if.end: ; preds = %entry + br label %return + +return: ; preds = %if.end, %if.then + %retval.0 = phi i32 [ 1, %if.then ], [ 0, %if.end ] + ret i32 %retval.0 + +; CHECK: @test11 +; CHECK: switch i32 %bar, label %if.end [ +; CHECK: i32 55, label %return +; CHECK: i32 53, label %return +; CHECK: i32 35, label %return +; CHECK: i32 24, label %return +; CHECK: i32 23, label %return +; CHECK: i32 12, label %return +; CHECK: i32 4, label %return +; CHECK: ] +} + +define void @test12() nounwind { +entry: + br label %bb49.us.us + +bb49.us.us: + %A = icmp eq i32 undef, undef + br i1 %A, label %bb55.us.us, label %malformed + +bb48.us.us: + %B = icmp ugt i32 undef, undef + br i1 %B, label %bb55.us.us, label %bb49.us.us + +bb55.us.us: + br label %bb48.us.us + +malformed: + ret void +; CHECK: @test12 + +} + +; test13 - handle switch formation with ult. +define void @test13(i32 %x) nounwind ssp noredzone { +entry: + %cmp = icmp ult i32 %x, 2 + br i1 %cmp, label %if.then, label %lor.lhs.false3 + +lor.lhs.false3: ; preds = %lor.lhs.false + %cmp5 = icmp eq i32 %x, 3 + br i1 %cmp5, label %if.then, label %lor.lhs.false6 + +lor.lhs.false6: ; preds = %lor.lhs.false3 + %cmp8 = icmp eq i32 %x, 4 + br i1 %cmp8, label %if.then, label %lor.lhs.false9 + +lor.lhs.false9: ; preds = %lor.lhs.false6 + %cmp11 = icmp eq i32 %x, 6 + br i1 %cmp11, label %if.then, label %if.end + +if.then: ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry + call void @foo1() noredzone + br label %if.end + +if.end: ; preds = %if.then, %lor.lhs.false9 + ret void +; CHECK: @test13 +; CHECK: switch i32 %x, label %if.end [ +; CHECK: i32 6, label %if.then +; CHECK: i32 4, label %if.then +; CHECK: i32 3, label %if.then +; CHECK: i32 1, label %if.then +; CHECK: i32 0, label %if.then +; CHECK: ] +} + +; test14 - handle switch formation with ult. +define void @test14(i32 %x) nounwind ssp noredzone { +entry: + %cmp = icmp ugt i32 %x, 2 + br i1 %cmp, label %lor.lhs.false3, label %if.then + +lor.lhs.false3: ; preds = %lor.lhs.false + %cmp5 = icmp ne i32 %x, 3 + br i1 %cmp5, label %lor.lhs.false6, label %if.then + +lor.lhs.false6: ; preds = %lor.lhs.false3 + %cmp8 = icmp ne i32 %x, 4 + br i1 %cmp8, label %lor.lhs.false9, label %if.then + +lor.lhs.false9: ; preds = %lor.lhs.false6 + %cmp11 = icmp ne i32 %x, 6 + br i1 %cmp11, label %if.end, label %if.then + +if.then: ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry + call void @foo1() noredzone + br label %if.end + +if.end: ; preds = %if.then, %lor.lhs.false9 + ret void +; CHECK: @test14 +; CHECK: switch i32 %x, label %if.end [ +; CHECK: i32 6, label %if.then +; CHECK: i32 4, label %if.then +; CHECK: i32 3, label %if.then +; CHECK: i32 1, label %if.then +; CHECK: i32 0, label %if.then +; CHECK: ] +} + +; Don't crash on ginormous ranges. +define void @test15(i128 %x) nounwind { + %cmp = icmp ugt i128 %x, 2 + br i1 %cmp, label %if.end, label %lor.false + +lor.false: + %cmp2 = icmp ne i128 %x, 100000000000000000000 + br i1 %cmp2, label %if.end, label %if.then + +if.then: + call void @foo1() noredzone + br label %if.end + +if.end: + ret void + +; CHECK: @test15 +; CHECK-NOT: switch +; CHECK: ret void +} + +; PR8675 +; rdar://5134905 +define zeroext i1 @test16(i32 %x) nounwind { +entry: +; CHECK: @test16 +; CHECK: %x.off = add i32 %x, -1 +; CHECK: %switch = icmp ult i32 %x.off, 3 + %cmp.i = icmp eq i32 %x, 1 + br i1 %cmp.i, label %lor.end, label %lor.lhs.false + +lor.lhs.false: + %cmp.i2 = icmp eq i32 %x, 2 + br i1 %cmp.i2, label %lor.end, label %lor.rhs + +lor.rhs: + %cmp.i1 = icmp eq i32 %x, 3 + br label %lor.end + +lor.end: + %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp.i1, %lor.rhs ] + ret i1 %0 +} + +; Check that we don't turn an icmp into a switch where it's not useful. +define void @test17(i32 %x, i32 %y) { + %cmp = icmp ult i32 %x, 3 + %switch = icmp ult i32 %y, 2 + %or.cond775 = or i1 %cmp, %switch + br i1 %or.cond775, label %lor.lhs.false8, label %return + +lor.lhs.false8: + tail call void @foo1() + ret void + +return: + ret void + +; CHECK: @test17 +; CHECK-NOT: switch.early.test +; CHECK-NOT: switch i32 +; CHECK: ret void +} + diff --git a/test/Transforms/SimplifyCFG/switch_formation.dbg.ll b/test/Transforms/SimplifyCFG/switch_formation.dbg.ll index f1c820ec43be..2723ec608e1d 100644 --- a/test/Transforms/SimplifyCFG/switch_formation.dbg.ll +++ b/test/Transforms/SimplifyCFG/switch_formation.dbg.ll @@ -1,5 +1,4 @@ -; RUN: opt < %s -simplifycfg -S | not grep br - +; RUN: opt < %s -simplifycfg -S | FileCheck %s %llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } @@ -13,7 +12,10 @@ declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind -define i1 @_ZN4llvm11SetCondInst7classofEPKNS_11InstructionE({ i32, i32 }* %I) { +define i1 @t({ i32, i32 }* %I) { +; CHECK: @t +; CHECK: %tmp.2.i.off = add i32 %tmp.2.i, -14 +; CHECK: %switch = icmp ult i32 %tmp.2.i.off, 6 entry: %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1] %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6] diff --git a/test/Transforms/SimplifyCFG/switch_formation.ll b/test/Transforms/SimplifyCFG/switch_formation.ll deleted file mode 100644 index 787904a5d4f8..000000000000 --- a/test/Transforms/SimplifyCFG/switch_formation.ll +++ /dev/null @@ -1,30 +0,0 @@ -; RUN: opt < %s -simplifycfg -S | not grep br - -define i1 @_ZN4llvm11SetCondInst7classofEPKNS_11InstructionE({ i32, i32 }* %I) { -entry: - %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1] - %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6] - %tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1] - br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0 -shortcirc_next.0: ; preds = %entry - %tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1] - br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1 -shortcirc_next.1: ; preds = %shortcirc_next.0 - %tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1] - br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2 -shortcirc_next.2: ; preds = %shortcirc_next.1 - %tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1] - br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3 -shortcirc_next.3: ; preds = %shortcirc_next.2 - %tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1] - br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4 -shortcirc_next.4: ; preds = %shortcirc_next.3 - %tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1] - br label %UnifiedReturnBlock -shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry - br label %UnifiedReturnBlock -UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4 - %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1] - ret i1 %UnifiedRetVal -} - diff --git a/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll b/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll index cb9819cacea6..f8a0c88d2f89 100644 --- a/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll +++ b/test/Transforms/SimplifyLibCalls/2009-02-12-StrTo.ll @@ -1,7 +1,7 @@ ; RUN: opt < %s -simplify-libcalls -S > %t ; RUN: grep nocapture %t | count 2 ; RUN: grep null %t | grep nocapture | count 1 -; RUN: grep null %t | grep call | grep readonly | count 1 +; RUN: grep null %t | grep call | not grep readonly ; Test that we add nocapture to the declaration, and to the second call only. diff --git a/test/Transforms/SimplifyLibCalls/FPuts.ll b/test/Transforms/SimplifyLibCalls/FPuts.ll new file mode 100644 index 000000000000..1f72ede79614 --- /dev/null +++ b/test/Transforms/SimplifyLibCalls/FPuts.ll @@ -0,0 +1,29 @@ +; Test that the FPutsOptimizer works correctly +; RUN: opt < %s -simplify-libcalls -S | \ +; RUN: not grep {call.*fputs} + +; This transformation requires the pointer size, as it assumes that size_t is +; the size of a pointer. +target datalayout = "-p:64:64:64" + + %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] } + %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 } +@stdout = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=1] +@empty = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] +@len1 = constant [2 x i8] c"A\00" ; <[2 x i8]*> [#uses=1] +@long = constant [7 x i8] c"hello\0A\00" ; <[7 x i8]*> [#uses=1] + +declare i32 @fputs(i8*, %struct._IO_FILE*) + +define i32 @main() { +entry: + %out = load %struct._IO_FILE** @stdout ; <%struct._IO_FILE*> [#uses=3] + %s1 = getelementptr [1 x i8]* @empty, i32 0, i32 0 ; <i8*> [#uses=1] + %s2 = getelementptr [2 x i8]* @len1, i32 0, i32 0 ; <i8*> [#uses=1] + %s3 = getelementptr [7 x i8]* @long, i32 0, i32 0 ; <i8*> [#uses=1] + %a = call i32 @fputs( i8* %s1, %struct._IO_FILE* %out ) ; <i32> [#uses=0] + %b = call i32 @fputs( i8* %s2, %struct._IO_FILE* %out ) ; <i32> [#uses=0] + %c = call i32 @fputs( i8* %s3, %struct._IO_FILE* %out ) ; <i32> [#uses=0] + ret i32 0 +} + diff --git a/test/Transforms/SimplifyLibCalls/Printf.ll b/test/Transforms/SimplifyLibCalls/Printf.ll index 858a09c96f6f..caea311ba142 100644 --- a/test/Transforms/SimplifyLibCalls/Printf.ll +++ b/test/Transforms/SimplifyLibCalls/Printf.ll @@ -1,21 +1,36 @@ -; RUN: opt < %s -simplify-libcalls -S | grep putchar -; RUN: opt < %s -simplify-libcalls -S | \ -; RUN: not grep {call.*printf} +; RUN: opt < %s -simplify-libcalls -S -o %t +; RUN: FileCheck < %t %s @str = internal constant [13 x i8] c"hello world\0A\00" ; <[13 x i8]*> [#uses=1] @str1 = internal constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=1] -define void @foo() { +declare i32 @printf(i8*, ...) + +; CHECK: define void @f0 +; CHECK-NOT: printf +; CHECK: } +define void @f0() { entry: %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([13 x i8]* @str, i32 0, i32 0) ) ; <i32> [#uses=0] ret void } -declare i32 @printf(i8*, ...) - -define void @bar() { +; CHECK: define void @f1 +; CHECK-NOT: printf +; CHECK: } +define void @f1() { entry: %tmp1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([2 x i8]* @str1, i32 0, i32 0) ) ; <i32> [#uses=0] ret void } +; Verify that we don't turn this into a putchar call (thus changing the return +; value). +; +; CHECK: define i32 @f2 +; CHECK: printf +; CHECK: } +define i32 @f2() { + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([2 x i8]* @str1, i32 0, i32 0)) + ret i32 %call +} diff --git a/test/Transforms/SimplifyLibCalls/Puts.ll b/test/Transforms/SimplifyLibCalls/Puts.ll index 47a33c2d98d5..48431434cc61 100644 --- a/test/Transforms/SimplifyLibCalls/Puts.ll +++ b/test/Transforms/SimplifyLibCalls/Puts.ll @@ -1,29 +1,15 @@ -; Test that the PutsCatOptimizer works correctly -; RUN: opt < %s -simplify-libcalls -S | \ -; RUN: not grep {call.*fputs} +; Test that the PutsOptimizer works correctly +; RUN: opt < %s -simplify-libcalls -S | FileCheck %s -; This transformation requires the pointer size, as it assumes that size_t is -; the size of a pointer. target datalayout = "-p:64:64:64" - %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] } - %struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 } -@stdout = external global %struct._IO_FILE* ; <%struct._IO_FILE**> [#uses=1] -@empty = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] -@len1 = constant [2 x i8] c"A\00" ; <[2 x i8]*> [#uses=1] -@long = constant [7 x i8] c"hello\0A\00" ; <[7 x i8]*> [#uses=1] +@.str = private constant [1 x i8] zeroinitializer -declare i32 @fputs(i8*, %struct._IO_FILE*) +declare i32 @puts(i8*) -define i32 @main() { +define void @foo() { entry: - %out = load %struct._IO_FILE** @stdout ; <%struct._IO_FILE*> [#uses=3] - %s1 = getelementptr [1 x i8]* @empty, i32 0, i32 0 ; <i8*> [#uses=1] - %s2 = getelementptr [2 x i8]* @len1, i32 0, i32 0 ; <i8*> [#uses=1] - %s3 = getelementptr [7 x i8]* @long, i32 0, i32 0 ; <i8*> [#uses=1] - %a = call i32 @fputs( i8* %s1, %struct._IO_FILE* %out ) ; <i32> [#uses=0] - %b = call i32 @fputs( i8* %s2, %struct._IO_FILE* %out ) ; <i32> [#uses=0] - %c = call i32 @fputs( i8* %s3, %struct._IO_FILE* %out ) ; <i32> [#uses=0] - ret i32 0 +; CHECK: call i32 @putchar(i32 10) + %call = call i32 @puts(i8* getelementptr inbounds ([1 x i8]* @.str, i32 0, i32 0)) + ret void } - diff --git a/test/Transforms/SimplifyLibCalls/StrChr.ll b/test/Transforms/SimplifyLibCalls/StrChr.ll index 50ca0a6edbf8..eaabeb2feb8f 100644 --- a/test/Transforms/SimplifyLibCalls/StrChr.ll +++ b/test/Transforms/SimplifyLibCalls/StrChr.ll @@ -1,26 +1,26 @@ ; Test that the StrChrOptimizer works correctly -; RUN: opt < %s -simplify-libcalls -S | \ -; RUN: not grep {call.*@strchr} +; RUN: opt < %s -simplify-libcalls -S | FileCheck %s ; This transformation requires the pointer size, as it assumes that size_t is ; the size of a pointer. target datalayout = "-p:64:64:64" -@hello = constant [14 x i8] c"hello world\5Cn\00" ; <[14 x i8]*> [#uses=1] -@null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] +@hello = constant [14 x i8] c"hello world\5Cn\00" +@null = constant [1 x i8] zeroinitializer declare i8* @strchr(i8*, i32) -declare i32 @puts(i8*) - -define i32 @main() { - %hello_p = getelementptr [14 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=2] - %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1] - %world = call i8* @strchr( i8* %hello_p, i32 119 ) ; <i8*> [#uses=1] - %ignore = call i8* @strchr( i8* %null_p, i32 119 ) ; <i8*> [#uses=0] - %len = call i32 @puts( i8* %world ) ; <i32> [#uses=1] - %index = add i32 %len, 112 ; <i32> [#uses=2] - %result = call i8* @strchr( i8* %hello_p, i32 %index ) ; <i8*> [#uses=0] +define i32 @foo(i32 %index) { + %hello_p = getelementptr [14 x i8]* @hello, i32 0, i32 0 + %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 + %world = call i8* @strchr(i8* %hello_p, i32 119) +; CHECK: getelementptr i8* %hello_p, i64 6 + %ignore = call i8* @strchr(i8* %null_p, i32 119) +; CHECK-NOT: call i8* strchr + %null = call i8* @strchr(i8* %hello_p, i32 0) +; CHECK: getelementptr i8* %hello_p, i64 13 + %result = call i8* @strchr(i8* %hello_p, i32 %index) +; CHECK: call i8* @memchr(i8* %hello_p, i32 %index, i64 14) ret i32 %index } diff --git a/test/Transforms/SimplifyLibCalls/StrPBrk.ll b/test/Transforms/SimplifyLibCalls/StrPBrk.ll new file mode 100644 index 000000000000..29c3b7477b47 --- /dev/null +++ b/test/Transforms/SimplifyLibCalls/StrPBrk.ll @@ -0,0 +1,25 @@ +; RUN: opt < %s -simplify-libcalls -S | FileCheck %s + +target datalayout = "-p:64:64:64" + +@hello = constant [12 x i8] c"hello world\00" +@w = constant [2 x i8] c"w\00" +@null = constant [1 x i8] zeroinitializer + +declare i8* @strpbrk(i8*, i8*) + +define void @test(i8* %s1, i8* %s2) { + %hello_p = getelementptr [12 x i8]* @hello, i32 0, i32 0 + %w_p = getelementptr [2 x i8]* @w, i32 0, i32 0 + %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 + %test1 = call i8* @strpbrk(i8* %null_p, i8* %s2) + %test2 = call i8* @strpbrk(i8* %s1, i8* %null_p) +; CHECK-NOT: call i8* @strpbrk + %test3 = call i8* @strpbrk(i8* %s1, i8* %w_p) +; CHECK: call i8* @strchr(i8* %s1, i32 119) + %test4 = call i8* @strpbrk(i8* %hello_p, i8* %w_p) +; CHECK: getelementptr i8* %hello_p, i64 6 + %test5 = call i8* @strpbrk(i8* %s1, i8* %s2) +; CHECK: call i8* @strpbrk(i8* %s1, i8* %s2) + ret void +} diff --git a/test/Transforms/SimplifyLibCalls/StrRChr.ll b/test/Transforms/SimplifyLibCalls/StrRChr.ll new file mode 100644 index 000000000000..2259fc0289fb --- /dev/null +++ b/test/Transforms/SimplifyLibCalls/StrRChr.ll @@ -0,0 +1,23 @@ +; Test that the StrRChrOptimizer works correctly +; RUN: opt < %s -simplify-libcalls -S | FileCheck %s + +target datalayout = "-p:64:64:64" + +@hello = constant [14 x i8] c"hello world\5Cn\00" +@null = constant [1 x i8] zeroinitializer + +declare i8* @strrchr(i8*, i32) + +define void @foo(i8* %bar) { + %hello_p = getelementptr [14 x i8]* @hello, i32 0, i32 0 + %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 + %world = call i8* @strrchr(i8* %hello_p, i32 119) +; CHECK: getelementptr i8* %hello_p, i64 6 + %ignore = call i8* @strrchr(i8* %null_p, i32 119) +; CHECK-NOT: call i8* strrchr + %null = call i8* @strrchr(i8* %hello_p, i32 0) +; CHECK: getelementptr i8* %hello_p, i64 13 + %strchr = call i8* @strrchr(i8* %bar, i32 0) +; CHECK: call i8* @strchr(i8* %bar, i32 0) + ret void +} diff --git a/test/Transforms/SimplifyLibCalls/StrSpn.ll b/test/Transforms/SimplifyLibCalls/StrSpn.ll new file mode 100644 index 000000000000..800c19088337 --- /dev/null +++ b/test/Transforms/SimplifyLibCalls/StrSpn.ll @@ -0,0 +1,41 @@ +; RUN: opt < %s -simplify-libcalls -S | FileCheck %s + +target datalayout = "-p:64:64:64" + +@abcba = constant [6 x i8] c"abcba\00" +@abc = constant [4 x i8] c"abc\00" +@null = constant [1 x i8] zeroinitializer + +declare i64 @strspn(i8*, i8*) + +define i64 @testspn(i8* %s1, i8* %s2) { + %abcba_p = getelementptr [6 x i8]* @abcba, i32 0, i32 0 + %abc_p = getelementptr [4 x i8]* @abc, i32 0, i32 0 + %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 + %test1 = call i64 @strspn(i8* %s1, i8* %null_p) + %test2 = call i64 @strspn(i8* %null_p, i8* %s2) + %test3 = call i64 @strspn(i8* %abcba_p, i8* %abc_p) +; CHECK-NOT: call i64 @strspn + %test4 = call i64 @strspn(i8* %s1, i8* %s2) +; CHECK: call i64 @strspn(i8* %s1, i8* %s2) + ret i64 %test3 +; CHECK: ret i64 5 +} + +declare i64 @strcspn(i8*, i8*) + +define i64 @testcspn(i8* %s1, i8* %s2) { + %abcba_p = getelementptr [6 x i8]* @abcba, i32 0, i32 0 + %abc_p = getelementptr [4 x i8]* @abc, i32 0, i32 0 + %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0 + %test1 = call i64 @strcspn(i8* %s1, i8* %null_p) +; CHECK: call i64 @strlen(i8* %s1) + %test2 = call i64 @strcspn(i8* %null_p, i8* %s2) + %test3 = call i64 @strcspn(i8* %abcba_p, i8* %abc_p) +; CHECK-NOT: call i64 @strcspn + %test4 = call i64 @strcspn(i8* %s1, i8* %s2) +; CHECK: call i64 @strcspn(i8* %s1, i8* %s2) + %add0 = add i64 %test1, %test3 +; CHECK: add i64 %{{.+}}, 0 + ret i64 %add0 +} diff --git a/test/Transforms/SimplifyLibCalls/floor.ll b/test/Transforms/SimplifyLibCalls/floor.ll index a7af5a968639..8780e32e0a0c 100644 --- a/test/Transforms/SimplifyLibCalls/floor.ll +++ b/test/Transforms/SimplifyLibCalls/floor.ll @@ -29,6 +29,8 @@ define float @test_ceil(float %C) { ret float %F } +; PR8466 +; XFAIL: win32 define float @test_nearbyint(float %C) { %D = fpext float %C to double ; <double> [#uses=1] ; --> nearbyintf diff --git a/test/Transforms/Sink/basic.ll b/test/Transforms/Sink/basic.ll index beb9481c840f..54b7f1369de4 100644 --- a/test/Transforms/Sink/basic.ll +++ b/test/Transforms/Sink/basic.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -sink -S | FileCheck %s +; RUN: opt < %s -basicaa -sink -S | FileCheck %s @A = external global i32 @B = external global i32 diff --git a/test/Transforms/TailCallElim/dup_tail.ll b/test/Transforms/TailCallElim/dup_tail.ll new file mode 100644 index 000000000000..93638804f92e --- /dev/null +++ b/test/Transforms/TailCallElim/dup_tail.ll @@ -0,0 +1,23 @@ +; Duplicate the return into if.end to enable TCE. +; RUN: opt %s -tailcallelim -stats -disable-output |& grep {Number of return duplicated} + +define i32 @fib(i32 %n) nounwind ssp { +entry: + %cmp = icmp slt i32 %n, 2 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %return + +if.end: ; preds = %entry + %sub = add nsw i32 %n, -2 + %call = call i32 @fib(i32 %sub) + %sub3 = add nsw i32 %n, -1 + %call4 = call i32 @fib(i32 %sub3) + %add = add nsw i32 %call, %call4 + br label %return + +return: ; preds = %if.end, %if.then + %retval.0 = phi i32 [ 1, %if.then ], [ %add, %if.end ] + ret i32 %retval.0 +} diff --git a/test/Unit/lit.cfg b/test/Unit/lit.cfg index 5fe07324a1ba..35092964a5cd 100644 --- a/test/Unit/lit.cfg +++ b/test/Unit/lit.cfg @@ -21,15 +21,21 @@ if llvm_obj_root is not None: llvm_build_mode = getattr(config, 'llvm_build_mode', "Debug") config.test_format = lit.formats.GoogleTest(llvm_build_mode, 'Tests') +# Propagate the temp directory. Windows requires this because it uses \Windows\ +# if none of these are present. +if 'TMP' in os.environ: + config.environment['TMP'] = os.environ['TMP'] +if 'TEMP' in os.environ: + config.environment['TEMP'] = os.environ['TEMP'] + ### # If necessary, point the dynamic loader at libLLVM.so. if config.enable_shared: - libdir = os.path.join(config.llvm_obj_root, config.llvm_build_mode, 'lib') shlibpath = config.environment.get(config.shlibpath_var,'') if shlibpath: - shlibpath = ':' + shlibpath - shlibpath = libdir + shlibpath + shlibpath = os.pathsep + shlibpath + shlibpath = config.shlibdir + shlibpath config.environment[config.shlibpath_var] = shlibpath # Check that the object root is known. diff --git a/test/Unit/lit.site.cfg.in b/test/Unit/lit.site.cfg.in index 51b5bc416f69..9643507b1640 100644 --- a/test/Unit/lit.site.cfg.in +++ b/test/Unit/lit.site.cfg.in @@ -6,7 +6,17 @@ config.llvm_tools_dir = "@LLVM_TOOLS_DIR@" config.llvmgcc_dir = "@LLVMGCCDIR@" config.llvm_build_mode = "@LLVM_BUILD_MODE@" config.enable_shared = @ENABLE_SHARED@ +config.shlibdir = "@SHLIBDIR@" config.shlibpath_var = "@SHLIBPATH_VAR@" +# Support substitution of the tools_dir and build_mode with user parameters. +# This is used when we can't determine the tool dir at configuration time. +try: + config.llvm_tools_dir = config.llvm_tools_dir % lit.params + config.llvm_build_mode = config.llvm_build_mode % lit.params +except KeyError,e: + key, = e.args + lit.fatal("unable to find %r parameter, use '--param=%s=VALUE'" % (key,key)) + # Let the main config do the real work. lit.load_config(config, "@LLVM_SOURCE_DIR@/test/Unit/lit.cfg") diff --git a/test/lib/llvm.exp b/test/lib/llvm.exp index 19a27296044b..d92503a37337 100644 --- a/test/lib/llvm.exp +++ b/test/lib/llvm.exp @@ -47,7 +47,7 @@ proc execOneLine { test PRS outcome lineno line } { # cases. proc substitute { line test tmpFile } { global srcroot objroot srcdir objdir subdir target_triplet - global llvmgcc llvmgxx ocamlopt + global llvmgcc llvmgxx emitir ocamlopt global gccpath gxxpath compile_c compile_cxx link shlibext llvmlibsdir global llvmdsymutil valgrind grep gas bugpoint_topts set path [file join $srcdir $subdir] @@ -60,9 +60,9 @@ proc substitute { line test tmpFile } { #replace %llvmgcc_only with actual path to llvmgcc regsub -all {%llvmgcc_only} $new_line "$llvmgcc" new_line #replace %llvmgcc with actual path to llvmgcc - regsub -all {%llvmgcc} $new_line "$llvmgcc -emit-llvm -w" new_line + regsub -all {%llvmgcc} $new_line "$llvmgcc $emitir -w" new_line #replace %llvmgxx with actual path to llvmg++ - regsub -all {%llvmgxx} $new_line "$llvmgxx -emit-llvm -w" new_line + regsub -all {%llvmgxx} $new_line "$llvmgxx $emitir -w" new_line #replace %compile_cxx with C++ compilation command regsub -all {%compile_cxx} $new_line "$compile_cxx" new_line #replace %compile_c with C compilation command diff --git a/test/lit.cfg b/test/lit.cfg index f15777c99912..21b0a48be9f1 100644 --- a/test/lit.cfg +++ b/test/lit.cfg @@ -3,6 +3,8 @@ # Configuration file for the 'lit' test runner. import os +import sys +import re # name: The name of this test suite. config.name = 'LLVM' @@ -17,6 +19,18 @@ config.suffixes = [] # test_source_root: The root path where tests are located. config.test_source_root = os.path.dirname(__file__) +# Tweak PATH for Win32 +if sys.platform in ['win32']: + # Seek sane tools in directories and set to $PATH. + path = getattr(config, 'lit_tools_dir', None) + path = lit.getToolsPath(path, + config.environment['PATH'], + ['cmp.exe', 'grep.exe', 'sed.exe']) + if path is not None: + path = os.path.pathsep.join((path, + config.environment['PATH'])) + config.environment['PATH'] = path + # test_exec_root: The root path where tests should be run. llvm_obj_root = getattr(config, 'llvm_obj_root', None) if llvm_obj_root is not None: @@ -25,6 +39,18 @@ if llvm_obj_root is not None: # Tweak the PATH to include the scripts dir, the tools dir, and the llvm-gcc bin # dir (if available). if llvm_obj_root is not None: + # Include llvm-gcc first, as the llvm-gcc binaryies will not appear + # neither in the tools nor in the scripts dir. However it might be + # possible, that some old llvm tools are in the llvm-gcc dir. Adding + # llvm-gcc dir first ensures, that those will always be overwritten + # by the new tools in llvm_tools_dir. So now outdated tools are used + # for testing + llvmgcc_dir = getattr(config, 'llvmgcc_dir', None) + if llvmgcc_dir: + path = os.path.pathsep.join((os.path.join(llvmgcc_dir, 'bin'), + config.environment['PATH'])) + config.environment['PATH'] = path + llvm_src_root = getattr(config, 'llvm_src_root', None) if not llvm_src_root: lit.fatal('No LLVM source root set!') @@ -39,28 +65,29 @@ if llvm_obj_root is not None: path = os.path.pathsep.join((llvm_tools_dir, config.environment['PATH'])) config.environment['PATH'] = path - llvmgcc_dir = getattr(config, 'llvmgcc_dir', None) - if llvmgcc_dir: - path = os.path.pathsep.join((os.path.join(llvmgcc_dir, 'bin'), - config.environment['PATH'])) - config.environment['PATH'] = path - -# Propogate 'HOME' through the environment. +# Propagate 'HOME' through the environment. if 'HOME' in os.environ: config.environment['HOME'] = os.environ['HOME'] -# Propogate 'INCLUDE' through the environment. +# Propagate 'INCLUDE' through the environment. if 'INCLUDE' in os.environ: config.environment['INCLUDE'] = os.environ['INCLUDE'] -# Propogate 'LIB' through the environment. +# Propagate 'LIB' through the environment. if 'LIB' in os.environ: config.environment['LIB'] = os.environ['LIB'] -# Propogate LLVM_SRC_ROOT into the environment. +# Propagate the temp directory. Windows requires this because it uses \Windows\ +# if none of these are present. +if 'TMP' in os.environ: + config.environment['TMP'] = os.environ['TMP'] +if 'TEMP' in os.environ: + config.environment['TEMP'] = os.environ['TEMP'] + +# Propagate LLVM_SRC_ROOT into the environment. config.environment['LLVM_SRC_ROOT'] = getattr(config, 'llvm_src_root', '') -# Propogate PYTHON_EXEUTABLE into the environment +# Propagate PYTHON_EXECUTABLE into the environment config.environment['PYTHON_EXECUTABLE'] = getattr(config, 'python_executable', '') @@ -125,12 +152,13 @@ for line in open(os.path.join(config.llvm_obj_root, 'test', 'site.exp')): # Add substitutions. config.substitutions.append(('%llvmgcc_only', site_exp['llvmgcc'])) -for sub in ['llvmgcc', 'llvmgxx', 'compile_cxx', 'compile_c', +for sub in ['llvmgcc', 'llvmgxx', 'emitir', 'compile_cxx', 'compile_c', 'link', 'shlibext', 'ocamlopt', 'llvmdsymutil', 'llvmlibsdir', + 'llvmshlibdir', 'bugpoint_topts']: if sub in ('llvmgcc', 'llvmgxx'): config.substitutions.append(('%' + sub, - site_exp[sub] + ' -emit-llvm -w')) + site_exp[sub] + ' %emitir -w')) # FIXME: This is a hack to avoid LLVMC tests failing due to a clang driver # warning when passing in "-fexceptions -fno-exceptions". elif sub == 'compile_cxx': @@ -139,6 +167,45 @@ for sub in ['llvmgcc', 'llvmgxx', 'compile_cxx', 'compile_c', else: config.substitutions.append(('%' + sub, site_exp[sub])) +# For each occurrence of an llvm tool name as its own word, replace it +# with the full path to the build directory holding that tool. This +# ensures that we are testing the tools just built and not some random +# tools that might happen to be in the user's PATH. Thus this list +# includes every tool placed in $(LLVM_OBJ_ROOT)/$(BuildMode)/bin +# (llvm_tools_dir in lit parlance). + # Don't match 'bugpoint-' or 'clang-'. + # Don't match '/clang'. +for pattern in [r"\bbugpoint\b(?!-)", r"(?<!/)\bclang\b(?!-)", + r"\bedis\b", r"\bgold\b", + r"\bllc\b", r"\blli\b", + r"\bllvm-ar\b", r"\bllvm-as\b", + r"\bllvm-bcanalyzer\b", r"\bllvm-config\b", + r"\bllvm-diff\b", r"\bllvm-dis\b", + r"\bllvm-extract\b", r"\bllvm-ld\b", + r"\bllvm-link\b", r"\bllvm-mc\b", + r"\bllvm-nm\b", r"\bllvm-prof\b", + r"\bllvm-ranlib\b", r"\bllvm-shlib\b", + r"\bllvm-stub\b", r"\bllvm2cpp\b", + # Don't match '-llvmc'. + r"(?<!-)\bllvmc\b", r"\blto\b", + # Don't match '.opt', '-opt', + # '^opt' or '/opt'. + r"\bmacho-dump\b", r"(?<!\.|-|\^|/)\bopt\b", + r"\btblgen\b", r"\bFileCheck\b", + r"\bFileUpdate\b", r"\bc-index-test\b", + r"\bfpcmp\b", r"\bllvm-PerfectShuffle\b", + # Handle these specially as they are strings searched + # for during testing. + r"\| \bcount\b", r"\| \bnot\b"]: + # Extract the tool name from the pattern. This relies on the tool + # name being surrounded by \b word match operators. If the + # pattern starts with "| ", include it in the string to be + # substituted. + substitution = re.sub(r"^(\\)?((\| )?)\W+b([0-9A-Za-z-_]+)\\b\W*$", + r"\2" + llvm_tools_dir + "/" + r"\4", + pattern) + config.substitutions.append((pattern, substitution)) + excludes = [] # Provide target_triple for use in XFAIL and XTARGET. @@ -214,3 +281,19 @@ def on_clone(parent, cfg, for_path): lit.error('unable to understand %r:\n%s' % (libPath, lib)) config.on_clone = on_clone + +### Features + +# Shell execution +if sys.platform not in ['win32'] or lit.getBashPath() != '': + config.available_features.add('shell') + +# Loadable module +# FIXME: This should be supplied by Makefile or autoconf. +if sys.platform in ['win32', 'cygwin']: + loadable_module = (config.enable_shared == 1) +else: + loadable_module = True + +if loadable_module: + config.available_features.add('loadable_module') diff --git a/test/lit.site.cfg.in b/test/lit.site.cfg.in index 79b2c602a07c..3588aa6245d7 100644 --- a/test/lit.site.cfg.in +++ b/test/lit.site.cfg.in @@ -4,7 +4,17 @@ config.llvm_src_root = "@LLVM_SOURCE_DIR@" config.llvm_obj_root = "@LLVM_BINARY_DIR@" config.llvm_tools_dir = "@LLVM_TOOLS_DIR@" config.llvmgcc_dir = "@LLVMGCCDIR@" +config.lit_tools_dir = "@LLVM_LIT_TOOLS_DIR@" config.python_executable = "@PYTHON_EXECUTABLE@" +config.enable_shared = @ENABLE_SHARED@ + +# Support substitution of the tools_dir with user parameters. This is +# used when we can't determine the tool dir at configuration time. +try: + config.llvm_tools_dir = config.llvm_tools_dir % lit.params +except KeyError,e: + key, = e.args + lit.fatal("unable to find %r parameter, use '--param=%s=VALUE'" % (key,key)) # Let the main config do the real work. lit.load_config(config, "@LLVM_SOURCE_DIR@/test/lit.cfg") diff --git a/test/site.exp.in b/test/site.exp.in index c760c2c1992c..277d54995f6b 100644 --- a/test/site.exp.in +++ b/test/site.exp.in @@ -5,6 +5,7 @@ set TARGETS_TO_BUILD "@TARGETS_TO_BUILD@" set llvmgcc_langs "@LLVMGCC_LANGS@" set llvmtoolsdir "@LLVM_TOOLS_DIR@" set llvmlibsdir "@LLVM_LIBS_DIR@" +set llvmshlibdir "@SHLIBDIR@" set llvm_bindings "@LLVM_BINDINGS@" set srcroot "@LLVM_SOURCE_DIR@" set objroot "@LLVM_BINARY_DIR@" @@ -24,3 +25,4 @@ set valgrind "@VALGRIND@" set grep "@GREP@" set gas "@AS@" set llvmdsymutil "@DSYMUTIL@" +set emitir "@LLVMCC_EMITIR_FLAG@" |