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| author | Dimitry Andric <dim@FreeBSD.org> | 2018-08-02 17:32:43 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2018-08-02 17:32:43 +0000 |
| commit | b7eb8e35e481a74962664b63dfb09483b200209a (patch) | |
| tree | 1937fb4a348458ce2d02ade03ac3bb0aa18d2fcd /tools/llvm-mca/DispatchStage.h | |
| parent | eb11fae6d08f479c0799db45860a98af528fa6e7 (diff) | |
| download | src-b7eb8e35e481a74962664b63dfb09483b200209a.tar.gz src-b7eb8e35e481a74962664b63dfb09483b200209a.zip | |
Vendor import of llvm trunk r338536:vendor/llvm/llvm-trunk-r338536
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=337137
svn path=/vendor/llvm/llvm-trunk-r338536/; revision=337138; tag=vendor/llvm/llvm-trunk-r338536
Diffstat (limited to 'tools/llvm-mca/DispatchStage.h')
| -rw-r--r-- | tools/llvm-mca/DispatchStage.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/llvm-mca/DispatchStage.h b/tools/llvm-mca/DispatchStage.h index f21789a29c50..4262a241c08c 100644 --- a/tools/llvm-mca/DispatchStage.h +++ b/tools/llvm-mca/DispatchStage.h @@ -38,7 +38,7 @@ class Scheduler; // the following conditions are met: // 1) There are enough entries in the reorder buffer (see class // RetireControlUnit) to write the opcodes associated with the instruction. -// 2) There are enough temporaries to rename output register operands. +// 2) There are enough physical registers to rename output register operands. // 3) There are enough entries available in the used buffered resource(s). // // The number of micro opcodes that can be dispatched in one cycle is limited by |