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-rw-r--r--Bindings/clock/renesas,cpg-div6-clocks.txt12
1 files changed, 9 insertions, 3 deletions
diff --git a/Bindings/clock/renesas,cpg-div6-clocks.txt b/Bindings/clock/renesas,cpg-div6-clocks.txt
index 054f65f9319c..ae36ab842919 100644
--- a/Bindings/clock/renesas,cpg-div6-clocks.txt
+++ b/Bindings/clock/renesas,cpg-div6-clocks.txt
@@ -1,7 +1,7 @@
* Renesas CPG DIV6 Clock
The CPG DIV6 clocks are variable factor clocks provided by the Clock Pulse
-Generator (CPG). They clock input is divided by a configurable factor from 1
+Generator (CPG). Their clock input is divided by a configurable factor from 1
to 64.
Required Properties:
@@ -10,14 +10,20 @@ Required Properties:
- "renesas,r8a73a4-div6-clock" for R8A73A4 (R-Mobile APE6) DIV6 clocks
- "renesas,r8a7740-div6-clock" for R8A7740 (R-Mobile A1) DIV6 clocks
- "renesas,r8a7790-div6-clock" for R8A7790 (R-Car H2) DIV6 clocks
- - "renesas,r8a7791-div6-clock" for R8A7791 (R-Car M2) DIV6 clocks
+ - "renesas,r8a7791-div6-clock" for R8A7791 (R-Car M2-W) DIV6 clocks
+ - "renesas,r8a7793-div6-clock" for R8A7793 (R-Car M2-N) DIV6 clocks
+ - "renesas,r8a7794-div6-clock" for R8A7794 (R-Car E2) DIV6 clocks
- "renesas,sh73a0-div6-clock" for SH73A0 (SH-Mobile AG5) DIV6 clocks
- - "renesas,cpg-div6-clock" for generic DIV6 clocks
+ and "renesas,cpg-div6-clock" as a fallback.
- reg: Base address and length of the memory resource used by the DIV6 clock
- clocks: Reference to the parent clock(s); either one, four, or eight
clocks must be specified. For clocks with multiple parents, invalid
settings must be specified as "<0>".
- #clock-cells: Must be 0
+
+
+Optional Properties:
+
- clock-output-names: The name of the clock as a free-form string