1 files changed, 4 insertions, 10 deletions
diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c
index ea3cd38f3e38..7b0de3dc5f31 100644
--- a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c
+++ b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c
@@ -1,14 +1,8 @@
 /** @file
   Internal function to get spin lock alignment.
 
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php.
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
@@ -19,7 +13,7 @@
   requirements for optimal spin lock performance.
 
   @return The architecture specific spin lock alignment.
-  
+
 **/
 UINTN
 InternalGetSpinLockProperties (
@@ -48,7 +42,7 @@ InternalGetSpinLockProperties (
   if (FamilyId == 0x0f) {
     //
     // In processors based on Intel NetBurst microarchitecture, use two cache lines
-    // 
+    //
     ModelId = ModelId | ((RegEax >> 12) & 0xf0);
     if (ModelId <= 0x04 || ModelId == 0x06) {
       CacheLineSize *= 2;