diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/RISCV/RISCVSubtarget.h')
-rw-r--r-- | contrib/llvm-project/llvm/lib/Target/RISCV/RISCVSubtarget.h | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVSubtarget.h b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVSubtarget.h index fe1285f23b15..561b04cc0b44 100644 --- a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVSubtarget.h +++ b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVSubtarget.h @@ -13,10 +13,10 @@ #ifndef LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H #define LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H +#include "MCTargetDesc/RISCVBaseInfo.h" #include "RISCVFrameLowering.h" #include "RISCVISelLowering.h" #include "RISCVInstrInfo.h" -#include "Utils/RISCVBaseInfo.h" #include "llvm/CodeGen/GlobalISel/CallLowering.h" #include "llvm/CodeGen/GlobalISel/InstructionSelector.h" #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" @@ -40,6 +40,7 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { bool HasStdExtD = false; bool HasStdExtC = false; bool HasStdExtB = false; + bool HasStdExtZba = false; bool HasStdExtZbb = false; bool HasStdExtZbc = false; bool HasStdExtZbe = false; @@ -51,6 +52,9 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { bool HasStdExtZbt = false; bool HasStdExtZbproposedc = false; bool HasStdExtV = false; + bool HasStdExtZvlsseg = false; + bool HasStdExtZvamo = false; + bool HasStdExtZfh = false; bool HasRV64 = false; bool IsRV32E = false; bool EnableLinkerRelax = false; @@ -69,17 +73,19 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { /// Initializes using the passed in CPU and feature strings so that we can /// use initializer lists for subtarget initialization. RISCVSubtarget &initializeSubtargetDependencies(const Triple &TT, - StringRef CPU, StringRef FS, + StringRef CPU, + StringRef TuneCPU, + StringRef FS, StringRef ABIName); public: // Initializes the data members to match that of the specified triple. - RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS, - StringRef ABIName, const TargetMachine &TM); + RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU, + StringRef FS, StringRef ABIName, const TargetMachine &TM); // Parses features string setting specified subtarget options. The // definition of this function is auto-generated by tblgen. - void ParseSubtargetFeatures(StringRef CPU, StringRef FS); + void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS); const RISCVFrameLowering *getFrameLowering() const override { return &FrameLowering; @@ -101,6 +107,7 @@ public: bool hasStdExtD() const { return HasStdExtD; } bool hasStdExtC() const { return HasStdExtC; } bool hasStdExtB() const { return HasStdExtB; } + bool hasStdExtZba() const { return HasStdExtZba; } bool hasStdExtZbb() const { return HasStdExtZbb; } bool hasStdExtZbc() const { return HasStdExtZbc; } bool hasStdExtZbe() const { return HasStdExtZbe; } @@ -112,6 +119,9 @@ public: bool hasStdExtZbt() const { return HasStdExtZbt; } bool hasStdExtZbproposedc() const { return HasStdExtZbproposedc; } bool hasStdExtV() const { return HasStdExtV; } + bool hasStdExtZvlsseg() const { return HasStdExtZvlsseg; } + bool hasStdExtZvamo() const { return HasStdExtZvamo; } + bool hasStdExtZfh() const { return HasStdExtZfh; } bool is64Bit() const { return HasRV64; } bool isRV32E() const { return IsRV32E; } bool enableLinkerRelax() const { return EnableLinkerRelax; } |