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-rw-r--r--contrib/llvm-project/llvm/lib/Target/VE/VE.td5
1 files changed, 4 insertions, 1 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/VE/VE.td b/contrib/llvm-project/llvm/lib/Target/VE/VE.td
index 617a6ea458b6..9e8adcd42077 100644
--- a/contrib/llvm-project/llvm/lib/Target/VE/VE.td
+++ b/contrib/llvm-project/llvm/lib/Target/VE/VE.td
@@ -18,6 +18,9 @@ include "llvm/Target/Target.td"
//===----------------------------------------------------------------------===//
// VE Subtarget features.
//
+def FeatureEnableVPU
+ : SubtargetFeature<"vpu", "EnableVPU", "true",
+ "Enable the VPU">;
//===----------------------------------------------------------------------===//
// Register File, Calling Conv, Instruction Descriptions
@@ -43,7 +46,7 @@ def VEAsmParser : AsmParser {
class Proc<string Name, list<SubtargetFeature> Features>
: Processor<Name, NoItineraries, Features>;
-def : Proc<"ve", []>;
+def : Proc<"generic", []>;
//===----------------------------------------------------------------------===//
// Declare the target which we are implementing