diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 42 |
1 files changed, 23 insertions, 19 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp index bf3b6bcb5463..95012a148d83 100644 --- a/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp +++ b/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp @@ -109,7 +109,7 @@ cl::opt<unsigned> X86PadMaxPrefixSize( cl::desc("Maximum number of prefixes to use for padding")); cl::opt<bool> X86PadForAlign( - "x86-pad-for-align", cl::init(true), cl::Hidden, + "x86-pad-for-align", cl::init(false), cl::Hidden, cl::desc("Pad previous instructions to implement align directives")); cl::opt<bool> X86PadForBranchAlign( @@ -207,6 +207,8 @@ public: void finishLayout(MCAssembler const &Asm, MCAsmLayout &Layout) const override; + unsigned getMaximumNopSize() const override; + bool writeNopData(raw_ostream &OS, uint64_t Count) const override; }; } // end anonymous namespace @@ -955,6 +957,9 @@ void X86AsmBackend::finishLayout(MCAssembler const &Asm, if (!X86PadForAlign && !X86PadForBranchAlign) return; + // The processed regions are delimitered by LabeledFragments. -g may have more + // MCSymbols and therefore different relaxation results. X86PadForAlign is + // disabled by default to eliminate the -g vs non -g difference. DenseSet<MCFragment *> LabeledFragments; for (const MCSymbol &S : Asm.symbols()) LabeledFragments.insert(S.getFragment(false)); @@ -1067,6 +1072,21 @@ void X86AsmBackend::finishLayout(MCAssembler const &Asm, } } +unsigned X86AsmBackend::getMaximumNopSize() const { + if (!STI.hasFeature(X86::FeatureNOPL) && !STI.hasFeature(X86::Mode64Bit)) + return 1; + if (STI.getFeatureBits()[X86::FeatureFast7ByteNOP]) + return 7; + if (STI.getFeatureBits()[X86::FeatureFast15ByteNOP]) + return 15; + if (STI.getFeatureBits()[X86::FeatureFast11ByteNOP]) + return 11; + // FIXME: handle 32-bit mode + // 15-bytes is the longest single NOP instruction, but 10-bytes is + // commonly the longest that can be efficiently decoded. + return 10; +} + /// Write a sequence of optimal nops to the output, covering \p Count /// bytes. /// \return - true on success, false on failure @@ -1094,23 +1114,7 @@ bool X86AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const { "\x66\x2e\x0f\x1f\x84\x00\x00\x00\x00\x00", }; - // This CPU doesn't support long nops. If needed add more. - // FIXME: We could generated something better than plain 0x90. - if (!STI.hasFeature(X86::FeatureNOPL) && !STI.hasFeature(X86::Mode64Bit)) { - for (uint64_t i = 0; i < Count; ++i) - OS << '\x90'; - return true; - } - - // 15-bytes is the longest single NOP instruction, but 10-bytes is - // commonly the longest that can be efficiently decoded. - uint64_t MaxNopLength = 10; - if (STI.getFeatureBits()[X86::FeatureFast7ByteNOP]) - MaxNopLength = 7; - else if (STI.getFeatureBits()[X86::FeatureFast15ByteNOP]) - MaxNopLength = 15; - else if (STI.getFeatureBits()[X86::FeatureFast11ByteNOP]) - MaxNopLength = 11; + uint64_t MaxNopLength = (uint64_t)getMaximumNopSize(); // Emit as many MaxNopLength NOPs as needed, then emit a NOP of the remaining // length. @@ -1237,7 +1241,7 @@ namespace CU { UNWIND_FRAMELESS_STACK_REG_PERMUTATION = 0x000003FF }; -} // end CU namespace +} // namespace CU class DarwinX86AsmBackend : public X86AsmBackend { const MCRegisterInfo &MRI; |