1 files changed, 45 insertions, 49 deletions
diff --git a/include/llvm/CodeGen/DFAPacketizer.h b/include/llvm/CodeGen/DFAPacketizer.h
index 40ec201107e8..8de140e91bf3 100644
--- a/include/llvm/CodeGen/DFAPacketizer.h
+++ b/include/llvm/CodeGen/DFAPacketizer.h
@@ -28,6 +28,7 @@
 
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/ScheduleDAGMutation.h"
 #include <map>
 
 namespace llvm {
@@ -80,7 +81,7 @@ private:
   // CachedTable is a map from <FromState, Input> to ToState.
   DenseMap<UnsignPair, unsigned> CachedTable;
 
-  // ReadTable - Read the DFA transition table and update CachedTable.
+  // Read the DFA transition table and update CachedTable.
   void ReadTable(unsigned state);
 
 public:
@@ -92,38 +93,39 @@ public:
     CurrentState = 0;
   }
 
-  // getInsnInput - Return the DFAInput for an instruction class.
+  // Return the DFAInput for an instruction class.
   DFAInput getInsnInput(unsigned InsnClass);
 
-  // getInsnInput - Return the DFAInput for an instruction class input vector.
+  // Return the DFAInput for an instruction class input vector.
   static DFAInput getInsnInput(const std::vector<unsigned> &InsnClass);
 
-  // canReserveResources - Check if the resources occupied by a MCInstrDesc
-  // are available in the current state.
+  // Check if the resources occupied by a MCInstrDesc are available in
+  // the current state.
   bool canReserveResources(const llvm::MCInstrDesc *MID);
 
-  // reserveResources - Reserve the resources occupied by a MCInstrDesc and
-  // change the current state to reflect that change.
+  // Reserve the resources occupied by a MCInstrDesc and change the current
+  // state to reflect that change.
   void reserveResources(const llvm::MCInstrDesc *MID);
 
-  // canReserveResources - Check if the resources occupied by a machine
-  // instruction are available in the current state.
-  bool canReserveResources(llvm::MachineInstr *MI);
+  // Check if the resources occupied by a machine instruction are available
+  // in the current state.
+  bool canReserveResources(llvm::MachineInstr &MI);
 
-  // reserveResources - Reserve the resources occupied by a machine
-  // instruction and change the current state to reflect that change.
-  void reserveResources(llvm::MachineInstr *MI);
+  // Reserve the resources occupied by a machine instruction and change the
+  // current state to reflect that change.
+  void reserveResources(llvm::MachineInstr &MI);
 
   const InstrItineraryData *getInstrItins() const { return InstrItins; }
 };
 
-// VLIWPacketizerList - Implements a simple VLIW packetizer using DFA. The
-// packetizer works on machine basic blocks. For each instruction I in BB, the
-// packetizer consults the DFA to see if machine resources are available to
-// execute I. If so, the packetizer checks if I depends on any instruction J in
-// the current packet. If no dependency is found, I is added to current packet
-// and machine resource is marked as taken. If any dependency is found, a target
-// API call is made to prune the dependence.
+
+// VLIWPacketizerList implements a simple VLIW packetizer using DFA. The
+// packetizer works on machine basic blocks. For each instruction I in BB,
+// the packetizer consults the DFA to see if machine resources are available
+// to execute I. If so, the packetizer checks if I depends on any instruction
+// in the current packet. If no dependency is found, I is added to current
+// packet and the machine resource is marked as taken. If any dependency is
+// found, a target API call is made to prune the dependence.
 class VLIWPacketizerList {
 protected:
   MachineFunction &MF;
@@ -132,13 +134,11 @@ protected:
 
   // The VLIW Scheduler.
   DefaultVLIWScheduler *VLIWScheduler;
-
   // Vector of instructions assigned to the current packet.
   std::vector<MachineInstr*> CurrentPacketMIs;
   // DFA resource tracker.
   DFAPacketizer *ResourceTracker;
-
-  // Generate MI -> SU map.
+  // Map: MI -> SU.
   std::map<MachineInstr*, SUnit*> MIToSUnit;
 
 public:
@@ -148,43 +148,40 @@ public:
 
   virtual ~VLIWPacketizerList();
 
-  // PacketizeMIs - Implement this API in the backend to bundle instructions.
+  // Implement this API in the backend to bundle instructions.
   void PacketizeMIs(MachineBasicBlock *MBB,
                     MachineBasicBlock::iterator BeginItr,
                     MachineBasicBlock::iterator EndItr);
 
-  // getResourceTracker - return ResourceTracker
+  // Return the ResourceTracker.
   DFAPacketizer *getResourceTracker() {return ResourceTracker;}
 
   // addToPacket - Add MI to the current packet.
-  virtual MachineBasicBlock::iterator addToPacket(MachineInstr *MI) {
-    MachineBasicBlock::iterator MII = MI;
-    CurrentPacketMIs.push_back(MI);
+  virtual MachineBasicBlock::iterator addToPacket(MachineInstr &MI) {
+    CurrentPacketMIs.push_back(&MI);
     ResourceTracker->reserveResources(MI);
-    return MII;
+    return MI;
   }
 
   // End the current packet and reset the state of the packetizer.
   // Overriding this function allows the target-specific packetizer
   // to perform custom finalization.
-  virtual void endPacket(MachineBasicBlock *MBB, MachineInstr *MI);
+  virtual void endPacket(MachineBasicBlock *MBB,
+                         MachineBasicBlock::iterator MI);
 
-  // initPacketizerState - perform initialization before packetizing
-  // an instruction. This function is supposed to be overrided by
-  // the target dependent packetizer.
-  virtual void initPacketizerState() { return; }
+  // Perform initialization before packetizing an instruction. This
+  // function is supposed to be overrided by the target dependent packetizer.
+  virtual void initPacketizerState() {}
 
-  // ignorePseudoInstruction - Ignore bundling of pseudo instructions.
-  virtual bool ignorePseudoInstruction(const MachineInstr *I,
+  // Check if the given instruction I should be ignored by the packetizer.
+  virtual bool ignorePseudoInstruction(const MachineInstr &I,
                                        const MachineBasicBlock *MBB) {
     return false;
   }
 
-  // isSoloInstruction - return true if instruction MI can not be packetized
-  // with any other instruction, which means that MI itself is a packet.
-  virtual bool isSoloInstruction(const MachineInstr *MI) {
-    return true;
-  }
+  // Return true if instruction MI can not be packetized with any other
+  // instruction, which means that MI itself is a packet.
+  virtual bool isSoloInstruction(const MachineInstr &MI) { return true; }
 
   // Check if the packetizer should try to add the given instruction to
   // the current packet. One reasons for which it may not be desirable
@@ -192,23 +189,22 @@ public:
   // would cause a stall.
   // If this function returns "false", the current packet will be ended,
   // and the instruction will be added to the next packet.
-  virtual bool shouldAddToPacket(const MachineInstr *MI) {
-    return true;
-  }
+  virtual bool shouldAddToPacket(const MachineInstr &MI) { return true; }
 
-  // isLegalToPacketizeTogether - Is it legal to packetize SUI and SUJ
-  // together.
+  // Check if it is legal to packetize SUI and SUJ together.
   virtual bool isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) {
     return false;
   }
 
-  // isLegalToPruneDependencies - Is it legal to prune dependece between SUI
-  // and SUJ.
+  // Check if it is legal to prune dependece between SUI and SUJ.
   virtual bool isLegalToPruneDependencies(SUnit *SUI, SUnit *SUJ) {
     return false;
   }
 
+  // Add a DAG mutation to be done before the packetization begins.
+  void addMutation(std::unique_ptr<ScheduleDAGMutation> Mutation);
 };
-}
+
+} // namespace llvm
 
 #endif