1 files changed, 28 insertions, 1 deletions
diff --git a/include/llvm/MC/MCInstrAnalysis.h b/include/llvm/MC/MCInstrAnalysis.h
index dd3e1df477b4..484f03b4d854 100644
--- a/include/llvm/MC/MCInstrAnalysis.h
+++ b/include/llvm/MC/MCInstrAnalysis.h
@@ -22,6 +22,8 @@
 
 namespace llvm {
 
+class MCRegisterInfo;
+
 class MCInstrAnalysis {
 protected:
   friend class Target;
@@ -60,7 +62,32 @@ public:
     return Info->get(Inst.getOpcode()).isTerminator();
   }
 
-  /// \brief Given a branch instruction try to get the address the branch
+  /// Returns true if at least one of the register writes performed by
+  /// \param Inst implicitly clears the upper portion of all super-registers.
+  /// 
+  /// Example: on X86-64, a write to EAX implicitly clears the upper half of
+  /// RAX. Also (still on x86) an XMM write perfomed by an AVX 128-bit
+  /// instruction implicitly clears the upper portion of the correspondent
+  /// YMM register.
+  ///
+  /// This method also updates an APInt which is used as mask of register
+  /// writes. There is one bit for every explicit/implicit write performed by
+  /// the instruction. If a write implicitly clears its super-registers, then
+  /// the corresponding bit is set (vic. the corresponding bit is cleared).
+  ///
+  /// The first bits in the APint are related to explicit writes. The remaining
+  /// bits are related to implicit writes. The sequence of writes follows the
+  /// machine operand sequence. For implicit writes, the sequence is defined by
+  /// the MCInstrDesc.
+  ///
+  /// The assumption is that the bit-width of the APInt is correctly set by
+  /// the caller. The default implementation conservatively assumes that none of
+  /// the writes clears the upper portion of a super-register.
+  virtual bool clearsSuperRegisters(const MCRegisterInfo &MRI,
+                                    const MCInst &Inst,
+                                    APInt &Writes) const;
+
+  /// Given a branch instruction try to get the address the branch
   /// targets. Return true on success, and the address in Target.
   virtual bool
   evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,