aboutsummaryrefslogtreecommitdiff
path: root/include/llvm/Target/TargetInstrInfo.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/llvm/Target/TargetInstrInfo.h')
-rw-r--r--include/llvm/Target/TargetInstrInfo.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 43fd54e183a9..1ba6b2f29992 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -514,6 +514,13 @@ public:
return false;
}
+ /// isPredicable - Return true if the specified instruction can be predicated.
+ /// By default, this returns true for every instruction with a
+ /// PredicateOperand.
+ virtual bool isPredicable(MachineInstr *MI) const {
+ return MI->getDesc().isPredicable();
+ }
+
/// isSafeToMoveRegClassDefs - Return true if it's safe to move a machine
/// instruction that defines the specified register class.
virtual bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const {
@@ -536,13 +543,6 @@ public:
/// length.
virtual unsigned getInlineAsmLength(const char *Str,
const MCAsmInfo &MAI) const;
-
- /// TailDuplicationLimit - Returns the limit on the number of instructions
- /// in basic block MBB beyond which it will not be tail-duplicated.
- virtual unsigned TailDuplicationLimit(const MachineBasicBlock &MBB,
- unsigned DefaultLimit) const {
- return DefaultLimit;
- }
};
/// TargetInstrInfoImpl - This is the default implementation of