diff options
Diffstat (limited to 'include/llvm/Target/TargetMachine.h')
| -rw-r--r-- | include/llvm/Target/TargetMachine.h | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index 37a79fe8526f..11b0f5fb77fc 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -29,7 +29,6 @@ class GlobalValue; class MCAsmInfo; class MCCodeGenInfo; class MCContext; -class PassManagerBase; class Target; class DataLayout; class TargetLibraryInfo; @@ -47,6 +46,12 @@ class VectorTargetTransformInfo; class formatted_raw_ostream; class raw_ostream; +// The old pass manager infrastructure is hidden in a legacy namespace now. +namespace legacy { +class PassManagerBase; +} +using legacy::PassManagerBase; + //===----------------------------------------------------------------------===// /// /// TargetMachine - Primary interface to the complete machine description for @@ -70,7 +75,8 @@ protected: // Can only create subclasses. std::string TargetFS; /// CodeGenInfo - Low level target information such as relocation model. - const MCCodeGenInfo *CodeGenInfo; + /// Non-const to allow resetting optimization level per-function. + MCCodeGenInfo *CodeGenInfo; /// AsmInfo - Contains target specific asm information. /// @@ -102,11 +108,14 @@ public: void resetTargetOptions(const MachineFunction *MF) const; // Interfaces to the major aspects of target machine information: + // // -- Instruction opcode and operand information // -- Pipelines and scheduling information // -- Stack frame information // -- Selection DAG lowering information // + // N.B. These objects may change during compilation. It's not safe to cache + // them between functions. virtual const TargetInstrInfo *getInstrInfo() const { return 0; } virtual const TargetFrameLowering *getFrameLowering() const { return 0; } virtual const TargetLowering *getTargetLowering() const { return 0; } @@ -205,6 +214,9 @@ public: /// Default, or Aggressive. CodeGenOpt::Level getOptLevel() const; + /// \brief Overrides the optimization level. + void setOptLevel(CodeGenOpt::Level Level) const; + void setFastISel(bool Enable) { Options.EnableFastISel = Enable; } bool shouldPrintMachineCode() const { return Options.PrintMachineCode; } @@ -252,8 +264,8 @@ public: formatted_raw_ostream &, CodeGenFileType, bool /*DisableVerify*/ = true, - AnalysisID StartAfter = 0, - AnalysisID StopAfter = 0) { + AnalysisID /*StartAfter*/ = 0, + AnalysisID /*StopAfter*/ = 0) { return true; } @@ -292,6 +304,7 @@ protected: // Can only create subclasses. Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL); + void initAsmInfo(); public: /// \brief Register analysis passes for this target with a pass manager. /// |
