diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/Analysis/InstructionSimplify.h | 3 | ||||
| -rw-r--r-- | include/llvm/Analysis/MemoryDependenceAnalysis.h | 6 | ||||
| -rw-r--r-- | include/llvm/Analysis/TargetTransformInfo.h | 7 | ||||
| -rw-r--r-- | include/llvm/Analysis/TargetTransformInfoImpl.h | 2 | ||||
| -rw-r--r-- | include/llvm/BinaryFormat/COFF.h | 2 | ||||
| -rw-r--r-- | include/llvm/CodeGen/BasicTTIImpl.h | 4 | ||||
| -rw-r--r-- | include/llvm/IR/IntrinsicsAMDGPU.td | 3 | ||||
| -rw-r--r-- | include/llvm/ProfileData/SampleProf.h | 4 |
8 files changed, 8 insertions, 23 deletions
diff --git a/include/llvm/Analysis/InstructionSimplify.h b/include/llvm/Analysis/InstructionSimplify.h index 3932a2ec2498..4f896bddff87 100644 --- a/include/llvm/Analysis/InstructionSimplify.h +++ b/include/llvm/Analysis/InstructionSimplify.h @@ -197,6 +197,9 @@ Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS, Value *SimplifyFPBinOp(unsigned Opcode, Value *LHS, Value *RHS, FastMathFlags FMF, const SimplifyQuery &Q); +/// Given a callsite, fold the result or return null. +Value *SimplifyCall(ImmutableCallSite CS, const SimplifyQuery &Q); + /// Given a function and iterators over arguments, fold the result or return /// null. Value *SimplifyCall(ImmutableCallSite CS, Value *V, User::op_iterator ArgBegin, diff --git a/include/llvm/Analysis/MemoryDependenceAnalysis.h b/include/llvm/Analysis/MemoryDependenceAnalysis.h index 391a333594e9..c2974525a6ff 100644 --- a/include/llvm/Analysis/MemoryDependenceAnalysis.h +++ b/include/llvm/Analysis/MemoryDependenceAnalysis.h @@ -407,12 +407,6 @@ public: void getNonLocalPointerDependency(Instruction *QueryInst, SmallVectorImpl<NonLocalDepResult> &Result); - /// Perform a dependency query specifically for QueryInst's access to Loc. - /// The other comments for getNonLocalPointerDependency apply here as well. - void getNonLocalPointerDependencyFrom(Instruction *QueryInst, - const MemoryLocation &Loc, bool isLoad, - SmallVectorImpl<NonLocalDepResult> &Result); - /// Removes an instruction from the dependence analysis, updating the /// dependence of instructions that previously depended on it. void removeInstruction(Instruction *InstToRemove); diff --git a/include/llvm/Analysis/TargetTransformInfo.h b/include/llvm/Analysis/TargetTransformInfo.h index cecd8958e9d9..c20f20cfbe4d 100644 --- a/include/llvm/Analysis/TargetTransformInfo.h +++ b/include/llvm/Analysis/TargetTransformInfo.h @@ -646,9 +646,6 @@ public: /// \brief Additional properties of an operand's values. enum OperandValueProperties { OP_None = 0, OP_PowerOf2 = 1 }; - /// \return True if target can execute instructions out of order. - bool isOutOfOrder() const; - /// \return The number of scalar or vector registers that the target has. /// If 'Vectors' is true, it returns the number of vector registers. If it is /// set to false, it returns the number of scalar registers. @@ -1021,7 +1018,6 @@ public: Type *Ty) = 0; virtual int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty) = 0; - virtual bool isOutOfOrder() const = 0; virtual unsigned getNumberOfRegisters(bool Vector) = 0; virtual unsigned getRegisterBitWidth(bool Vector) const = 0; virtual unsigned getMinVectorRegisterBitWidth() = 0; @@ -1299,9 +1295,6 @@ public: Type *Ty) override { return Impl.getIntImmCost(IID, Idx, Imm, Ty); } - bool isOutOfOrder() const override { - return Impl.isOutOfOrder(); - } unsigned getNumberOfRegisters(bool Vector) override { return Impl.getNumberOfRegisters(Vector); } diff --git a/include/llvm/Analysis/TargetTransformInfoImpl.h b/include/llvm/Analysis/TargetTransformInfoImpl.h index 3625675d53de..4c37402278ef 100644 --- a/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -337,8 +337,6 @@ public: return TTI::TCC_Free; } - bool isOutOfOrder() const { return false; } - unsigned getNumberOfRegisters(bool Vector) { return 8; } unsigned getRegisterBitWidth(bool Vector) const { return 32; } diff --git a/include/llvm/BinaryFormat/COFF.h b/include/llvm/BinaryFormat/COFF.h index e6bb50cadb12..a55c544dfe90 100644 --- a/include/llvm/BinaryFormat/COFF.h +++ b/include/llvm/BinaryFormat/COFF.h @@ -95,7 +95,7 @@ enum MachineTypes : unsigned { MT_Invalid = 0xffff, IMAGE_FILE_MACHINE_UNKNOWN = 0x0, - IMAGE_FILE_MACHINE_AM33 = 0x13, + IMAGE_FILE_MACHINE_AM33 = 0x1D3, IMAGE_FILE_MACHINE_AMD64 = 0x8664, IMAGE_FILE_MACHINE_ARM = 0x1C0, IMAGE_FILE_MACHINE_ARMNT = 0x1C4, diff --git a/include/llvm/CodeGen/BasicTTIImpl.h b/include/llvm/CodeGen/BasicTTIImpl.h index f1f9275b0786..526ddb1b9706 100644 --- a/include/llvm/CodeGen/BasicTTIImpl.h +++ b/include/llvm/CodeGen/BasicTTIImpl.h @@ -402,10 +402,6 @@ public: return BaseT::getInstructionLatency(I); } - bool isOutOfOrder() const { - return getST()->getSchedModel().isOutOfOrder(); - } - /// @} /// \name Vector TTI Implementations diff --git a/include/llvm/IR/IntrinsicsAMDGPU.td b/include/llvm/IR/IntrinsicsAMDGPU.td index d7999cd33231..cc08fe683272 100644 --- a/include/llvm/IR/IntrinsicsAMDGPU.td +++ b/include/llvm/IR/IntrinsicsAMDGPU.td @@ -288,7 +288,8 @@ class AMDGPUAtomicIncIntrin : Intrinsic<[llvm_anyint_ty], llvm_i32_ty, // ordering llvm_i32_ty, // scope llvm_i1_ty], // isVolatile - [IntrArgMemOnly, NoCapture<0>] + [IntrArgMemOnly, NoCapture<0>], "", + [SDNPMemOperand] >; def int_amdgcn_atomic_inc : AMDGPUAtomicIncIntrin; diff --git a/include/llvm/ProfileData/SampleProf.h b/include/llvm/ProfileData/SampleProf.h index 9eccafc65f3a..641631cc4ec9 100644 --- a/include/llvm/ProfileData/SampleProf.h +++ b/include/llvm/ProfileData/SampleProf.h @@ -226,8 +226,8 @@ public: sampleprof_error addCalledTargetSamples(uint32_t LineOffset, uint32_t Discriminator, - const std::string &FName, - uint64_t Num, uint64_t Weight = 1) { + StringRef FName, uint64_t Num, + uint64_t Weight = 1) { return BodySamples[LineLocation(LineOffset, Discriminator)].addCalledTarget( FName, Num, Weight); } |