diff options
Diffstat (limited to 'lib/Target/ARM/ARMCallLowering.cpp')
-rw-r--r-- | lib/Target/ARM/ARMCallLowering.cpp | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMCallLowering.cpp b/lib/Target/ARM/ARMCallLowering.cpp index eab4b3b13f31..47f998b696f5 100644 --- a/lib/Target/ARM/ARMCallLowering.cpp +++ b/lib/Target/ARM/ARMCallLowering.cpp @@ -31,7 +31,6 @@ #include "llvm/CodeGen/MachineMemOperand.h" #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/MachineValueType.h" #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/CodeGen/ValueTypes.h" @@ -43,6 +42,7 @@ #include "llvm/IR/Value.h" #include "llvm/Support/Casting.h" #include "llvm/Support/LowLevelTypeImpl.h" +#include "llvm/Support/MachineValueType.h" #include <algorithm> #include <cassert> #include <cstdint> @@ -469,7 +469,12 @@ bool ARMCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, if (!MBB.empty()) MIRBuilder.setInstr(*MBB.begin()); - return handleAssignments(MIRBuilder, ArgInfos, ArgHandler); + if (!handleAssignments(MIRBuilder, ArgInfos, ArgHandler)) + return false; + + // Move back to the end of the basic block. + MIRBuilder.setMBB(MBB); + return true; } namespace { @@ -521,7 +526,7 @@ bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, if (CalleeReg && !TRI->isPhysicalRegister(CalleeReg)) MIB->getOperand(0).setReg(constrainOperandRegClass( MF, *TRI, MRI, *STI.getInstrInfo(), *STI.getRegBankInfo(), - *MIB.getInstr(), MIB->getDesc(), CalleeReg, 0)); + *MIB.getInstr(), MIB->getDesc(), Callee, 0)); } SmallVector<ArgInfo, 8> ArgInfos; |