diff options
Diffstat (limited to 'lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r-- | lib/Target/ARM/ARMTargetMachine.cpp | 49 |
1 files changed, 33 insertions, 16 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 0f6d1eddc985..519f789fc215 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -22,7 +22,7 @@ #include "llvm/ADT/StringRef.h" #include "llvm/ADT/Triple.h" #include "llvm/Analysis/TargetTransformInfo.h" -#include "llvm/CodeGen/ExecutionDepsFix.h" +#include "llvm/CodeGen/ExecutionDomainFix.h" #include "llvm/CodeGen/GlobalISel/CallLowering.h" #include "llvm/CodeGen/GlobalISel/IRTranslator.h" #include "llvm/CodeGen/GlobalISel/InstructionSelect.h" @@ -34,7 +34,6 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineScheduler.h" #include "llvm/CodeGen/Passes.h" -#include "llvm/CodeGen/TargetLoweringObjectFile.h" #include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/IR/Attributes.h" #include "llvm/IR/DataLayout.h" @@ -45,6 +44,7 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/TargetParser.h" #include "llvm/Support/TargetRegistry.h" +#include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Transforms/Scalar.h" #include <cassert> @@ -75,7 +75,7 @@ EnableGlobalMerge("arm-global-merge", cl::Hidden, cl::desc("Enable the global merge pass")); namespace llvm { - void initializeARMExecutionDepsFixPass(PassRegistry&); + void initializeARMExecutionDomainFixPass(PassRegistry&); } extern "C" void LLVMInitializeARMTarget() { @@ -89,8 +89,10 @@ extern "C" void LLVMInitializeARMTarget() { initializeGlobalISel(Registry); initializeARMLoadStoreOptPass(Registry); initializeARMPreAllocLoadStoreOptPass(Registry); + initializeARMParallelDSPPass(Registry); + initializeARMCodeGenPreparePass(Registry); initializeARMConstantIslandsPass(Registry); - initializeARMExecutionDepsFixPass(Registry); + initializeARMExecutionDomainFixPass(Registry); initializeARMExpandPseudoPass(Registry); initializeThumb2SizeReducePass(Registry); } @@ -214,11 +216,7 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT, // Default to triple-appropriate float ABI if (Options.FloatABIType == FloatABI::Default) { - if (TargetTriple.getEnvironment() == Triple::GNUEABIHF || - TargetTriple.getEnvironment() == Triple::MuslEABIHF || - TargetTriple.getEnvironment() == Triple::EABIHF || - TargetTriple.isOSWindows() || - TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16) + if (isTargetHardFloat()) this->Options.FloatABIType = FloatABI::Hard; else this->Options.FloatABIType = FloatABI::Soft; @@ -238,6 +236,11 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT, this->Options.EABIVersion = EABI::EABI5; } + if (TT.isOSBinFormatMachO()) { + this->Options.TrapUnreachable = true; + this->Options.NoTrapAfterNoreturn = true; + } + initAsmInfo(); } @@ -344,6 +347,7 @@ public: } void addIRPasses() override; + void addCodeGenPrepare() override; bool addPreISel() override; bool addInstSelector() override; bool addIRTranslator() override; @@ -355,20 +359,23 @@ public: void addPreEmitPass() override; }; -class ARMExecutionDepsFix : public ExecutionDepsFix { +class ARMExecutionDomainFix : public ExecutionDomainFix { public: static char ID; - ARMExecutionDepsFix() : ExecutionDepsFix(ID, ARM::DPRRegClass) {} + ARMExecutionDomainFix() : ExecutionDomainFix(ID, ARM::DPRRegClass) {} StringRef getPassName() const override { - return "ARM Execution Dependency Fix"; + return "ARM Execution Domain Fix"; } }; -char ARMExecutionDepsFix::ID; +char ARMExecutionDomainFix::ID; } // end anonymous namespace -INITIALIZE_PASS(ARMExecutionDepsFix, "arm-execution-deps-fix", - "ARM Execution Dependency Fix", false, false) +INITIALIZE_PASS_BEGIN(ARMExecutionDomainFix, "arm-execution-domain-fix", + "ARM Execution Domain Fix", false, false) +INITIALIZE_PASS_DEPENDENCY(ReachingDefAnalysis) +INITIALIZE_PASS_END(ARMExecutionDomainFix, "arm-execution-domain-fix", + "ARM Execution Domain Fix", false, false) TargetPassConfig *ARMBaseTargetMachine::createPassConfig(PassManagerBase &PM) { return new ARMPassConfig(*this, PM); @@ -397,7 +404,16 @@ void ARMPassConfig::addIRPasses() { addPass(createInterleavedAccessPass()); } +void ARMPassConfig::addCodeGenPrepare() { + if (getOptLevel() != CodeGenOpt::None) + addPass(createARMCodeGenPreparePass()); + TargetPassConfig::addCodeGenPrepare(); +} + bool ARMPassConfig::addPreISel() { + if (getOptLevel() != CodeGenOpt::None) + addPass(createARMParallelDSPPass()); + if ((TM->getOptLevel() != CodeGenOpt::None && EnableGlobalMerge == cl::BOU_UNSET) || EnableGlobalMerge == cl::BOU_TRUE) { @@ -462,7 +478,8 @@ void ARMPassConfig::addPreSched2() { if (EnableARMLoadStoreOpt) addPass(createARMLoadStoreOptimizationPass()); - addPass(new ARMExecutionDepsFix()); + addPass(new ARMExecutionDomainFix()); + addPass(createBreakFalseDeps()); } // Expand some pseudo instructions into multiple instructions to allow |