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path: root/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
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Diffstat (limited to 'lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h')
-rw-r--r--lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h18
1 files changed, 17 insertions, 1 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h b/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
index c4480e3da505..b918006fe9e3 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
+++ b/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
@@ -98,6 +98,20 @@ namespace ARM_MB {
}
} // namespace ARM_MB
+namespace ARM_TSB {
+ enum TraceSyncBOpt {
+ CSYNC = 0
+ };
+
+ inline static const char *TraceSyncBOptToString(unsigned val) {
+ switch (val) {
+ default:
+ llvm_unreachable("Unknown trace synchronization barrier operation");
+ case CSYNC: return "csync";
+ }
+ }
+} // namespace ARM_TSB
+
namespace ARM_ISB {
enum InstSyncBOpt {
RESERVED_0 = 0,
@@ -186,7 +200,8 @@ namespace ARMII {
AddrModeT2_so = 13,
AddrModeT2_pc = 14, // +/- i12 for pc relative data
AddrModeT2_i8s4 = 15, // i8 * 4
- AddrMode_i12 = 16
+ AddrMode_i12 = 16,
+ AddrMode5FP16 = 17 // i8 * 2
};
inline static const char *AddrModeToString(AddrMode addrmode) {
@@ -197,6 +212,7 @@ namespace ARMII {
case AddrMode3: return "AddrMode3";
case AddrMode4: return "AddrMode4";
case AddrMode5: return "AddrMode5";
+ case AddrMode5FP16: return "AddrMode5FP16";
case AddrMode6: return "AddrMode6";
case AddrModeT1_1: return "AddrModeT1_1";
case AddrModeT1_2: return "AddrModeT1_2";