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-rw-r--r--lib/Target/Hexagon/HexagonSubtarget.h29
1 files changed, 28 insertions, 1 deletions
diff --git a/lib/Target/Hexagon/HexagonSubtarget.h b/lib/Target/Hexagon/HexagonSubtarget.h
index c7ae139c4346..9b40c130e622 100644
--- a/lib/Target/Hexagon/HexagonSubtarget.h
+++ b/lib/Target/Hexagon/HexagonSubtarget.h
@@ -18,7 +18,6 @@
#include "HexagonISelLowering.h"
#include "HexagonInstrInfo.h"
#include "HexagonSelectionDAGInfo.h"
-#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
@@ -47,6 +46,11 @@ public:
/// default for V60.
bool UseBSBScheduling;
+ class HexagonDAGMutation : public ScheduleDAGMutation {
+ public:
+ void apply(ScheduleDAGInstrs *DAG) override;
+ };
+
private:
std::string CPUString;
HexagonInstrInfo InstrInfo;
@@ -105,6 +109,11 @@ public:
// compiler time and will be removed eventually anyway.
bool enableMachineSchedDefaultSched() const override { return false; }
+ AntiDepBreakMode getAntiDepBreakMode() const override { return ANTIDEP_ALL; }
+ bool enablePostRAScheduler() const override { return true; }
+
+ bool enableSubRegLiveness() const override;
+
const std::string &getCPUString () const { return CPUString; }
// Threshold for small data section
@@ -114,6 +123,24 @@ public:
const HexagonArchEnum &getHexagonArchVersion() const {
return HexagonArchVersion;
}
+
+ void getPostRAMutations(
+ std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations)
+ const override;
+
+ /// \brief Perform target specific adjustments to the latency of a schedule
+ /// dependency.
+ void adjustSchedDependency(SUnit *def, SUnit *use, SDep& dep) const override;
+
+private:
+ // Helper function responsible for increasing the latency only.
+ void updateLatency(MachineInstr *SrcInst, MachineInstr *DstInst, SDep &Dep)
+ const;
+ void changeLatency(SUnit *Src, SmallVector<SDep, 4> &Deps, SUnit *Dst,
+ unsigned Lat) const;
+ bool isBestZeroLatency(SUnit *Src, SUnit *Dst, const HexagonInstrInfo *TII)
+ const;
+ void changePhiLatency(MachineInstr *SrcInst, SUnit *Dst, SDep &Dep) const;
};
} // end namespace llvm