aboutsummaryrefslogtreecommitdiff
path: root/lib/clang/libllvm/Makefile
diff options
context:
space:
mode:
Diffstat (limited to 'lib/clang/libllvm/Makefile')
-rw-r--r--lib/clang/libllvm/Makefile418
1 files changed, 337 insertions, 81 deletions
diff --git a/lib/clang/libllvm/Makefile b/lib/clang/libllvm/Makefile
index 52216847685a..528551aab852 100644
--- a/lib/clang/libllvm/Makefile
+++ b/lib/clang/libllvm/Makefile
@@ -1,12 +1,12 @@
-# $FreeBSD$
-.include <src.opts.mk>
+.include <bsd.init.mk>
.include "../llvm.pre.mk"
LIB= llvm
INTERNALLIB=
CFLAGS+= -I${.OBJDIR}
+CFLAGS+= -I${SRCTOP}/sys/contrib/zstd/lib
.if ${MK_LLVM_TARGET_AARCH64} == "no" && ${MK_LLVM_TARGET_ARM} == "no" && \
${MK_LLVM_TARGET_BPF} == "no" && ${MK_LLVM_TARGET_MIPS} == "no" && \
@@ -23,6 +23,18 @@ CFLAGS+= -I${LLVM_SRCS}/lib/Target/${arch}
. endif
.endfor
+CFLAGS+= -I${LLVM_SRCS}/lib/ObjCopy
+
+TARGET_ARCH?= ${MACHINE_ARCH}
+
+.if ${TARGET_ARCH} != "amd64"
+CFLAGS+= -DBLAKE3_NO_AVX512 -DBLAKE3_NO_AVX2 -DBLAKE3_NO_SSE41 \
+ -DBLAKE3_NO_SSE2
+.endif
+.if ${TARGET_ARCH} != "arm64"
+CFLAGS+= -DBLAKE3_USE_NEON=0
+.endif
+
SRCDIR= llvm/lib
# Explanation of different SRCS variants below:
@@ -35,10 +47,10 @@ SRCDIR= llvm/lib
# SRCS_XDB: required for MK_CLANG_EXTRAS and MK_LLDB
# SRCS_XDL: required for MK_CLANG_EXTRAS, MK_LLD and MK_LLDB
# SRCS_XDW: required for MK_CLANG_EXTRAS and MK_LLDB in world stage
+# SRCS_COV: required for MK_LLVM_COV
SRCS_MIN+= Analysis/AliasAnalysis.cpp
SRCS_MIN+= Analysis/AliasAnalysisEvaluator.cpp
-SRCS_MIN+= Analysis/AliasAnalysisSummary.cpp
SRCS_MIN+= Analysis/AliasSetTracker.cpp
SRCS_EXT+= Analysis/Analysis.cpp
SRCS_MIN+= Analysis/AssumeBundleQueries.cpp
@@ -49,8 +61,7 @@ SRCS_MIN+= Analysis/BlockFrequencyInfoImpl.cpp
SRCS_MIN+= Analysis/BranchProbabilityInfo.cpp
SRCS_MIN+= Analysis/CFG.cpp
SRCS_MIN+= Analysis/CFGPrinter.cpp
-SRCS_MIN+= Analysis/CFLAndersAliasAnalysis.cpp
-SRCS_MIN+= Analysis/CFLSteensAliasAnalysis.cpp
+SRCS_MIN+= Analysis/CFGSCCPrinter.cpp
SRCS_MIN+= Analysis/CGSCCPassManager.cpp
SRCS_MIN+= Analysis/CallGraph.cpp
SRCS_MIN+= Analysis/CallGraphSCCPass.cpp
@@ -68,11 +79,10 @@ SRCS_MIN+= Analysis/Delinearization.cpp
SRCS_MIN+= Analysis/DemandedBits.cpp
SRCS_MIN+= Analysis/DependenceAnalysis.cpp
SRCS_MIN+= Analysis/DependenceGraphBuilder.cpp
-SRCS_MIN+= Analysis/DivergenceAnalysis.cpp
+SRCS_MIN+= Analysis/DomConditionCache.cpp
SRCS_MIN+= Analysis/DomPrinter.cpp
SRCS_MIN+= Analysis/DomTreeUpdater.cpp
SRCS_MIN+= Analysis/DominanceFrontier.cpp
-SRCS_MIN+= Analysis/EHPersonalities.cpp
SRCS_MIN+= Analysis/FunctionPropertiesAnalysis.cpp
SRCS_MIN+= Analysis/GlobalsModRef.cpp
SRCS_MIN+= Analysis/GuardUtils.cpp
@@ -84,19 +94,21 @@ SRCS_MIN+= Analysis/ImportedFunctionsInliningStatistics.cpp
SRCS_MIN+= Analysis/IndirectCallPromotionAnalysis.cpp
SRCS_MIN+= Analysis/InlineAdvisor.cpp
SRCS_MIN+= Analysis/InlineCost.cpp
+SRCS_MIN+= Analysis/InlineOrder.cpp
SRCS_MIN+= Analysis/InlineSizeEstimatorAnalysis.cpp
SRCS_MIN+= Analysis/InstCount.cpp
SRCS_MIN+= Analysis/InstructionPrecedenceTracking.cpp
SRCS_MIN+= Analysis/InstructionSimplify.cpp
+SRCS_MIN+= Analysis/InteractiveModelRunner.cpp
SRCS_MIN+= Analysis/Interval.cpp
SRCS_MIN+= Analysis/IntervalPartition.cpp
SRCS_MIN+= Analysis/LazyBlockFrequencyInfo.cpp
SRCS_MIN+= Analysis/LazyBranchProbabilityInfo.cpp
SRCS_MIN+= Analysis/LazyCallGraph.cpp
SRCS_MIN+= Analysis/LazyValueInfo.cpp
-SRCS_MIN+= Analysis/LegacyDivergenceAnalysis.cpp
SRCS_MIN+= Analysis/Lint.cpp
SRCS_MIN+= Analysis/Loads.cpp
+SRCS_MIN+= Analysis/Local.cpp
SRCS_MIN+= Analysis/LoopAccessAnalysis.cpp
SRCS_MIN+= Analysis/LoopAnalysisManager.cpp
SRCS_MIN+= Analysis/LoopCacheAnalysis.cpp
@@ -104,11 +116,12 @@ SRCS_MIN+= Analysis/LoopInfo.cpp
SRCS_MIN+= Analysis/LoopNestAnalysis.cpp
SRCS_MIN+= Analysis/LoopPass.cpp
SRCS_MIN+= Analysis/LoopUnrollAnalyzer.cpp
-SRCS_MIN+= Analysis/MemDepPrinter.cpp
+SRCS_MIN+= Analysis/MLInlineAdvisor.cpp
SRCS_MIN+= Analysis/MemDerefPrinter.cpp
SRCS_MIN+= Analysis/MemoryBuiltins.cpp
SRCS_MIN+= Analysis/MemoryDependenceAnalysis.cpp
SRCS_MIN+= Analysis/MemoryLocation.cpp
+SRCS_MIN+= Analysis/MemoryProfileInfo.cpp
SRCS_MIN+= Analysis/MemorySSA.cpp
SRCS_MIN+= Analysis/MemorySSAUpdater.cpp
SRCS_MIN+= Analysis/ModuleDebugInfoPrinter.cpp
@@ -136,13 +149,15 @@ SRCS_MIN+= Analysis/ScalarEvolutionNormalization.cpp
SRCS_MIN+= Analysis/ScopedNoAliasAA.cpp
SRCS_MIN+= Analysis/StackLifetime.cpp
SRCS_MIN+= Analysis/StackSafetyAnalysis.cpp
-SRCS_MIN+= Analysis/SyncDependenceAnalysis.cpp
+SRCS_MIN+= Analysis/StructuralHash.cpp
SRCS_MIN+= Analysis/SyntheticCountsUtils.cpp
SRCS_MIN+= Analysis/TargetLibraryInfo.cpp
SRCS_MIN+= Analysis/TargetTransformInfo.cpp
+SRCS_MIN+= Analysis/TensorSpec.cpp
+SRCS_MIN+= Analysis/TrainingLogger.cpp
SRCS_MIN+= Analysis/TypeBasedAliasAnalysis.cpp
SRCS_MIN+= Analysis/TypeMetadataUtils.cpp
-SRCS_MIN+= Analysis/VFABIDemangling.cpp
+SRCS_MIN+= Analysis/UniformityAnalysis.cpp
SRCS_MIN+= Analysis/ValueLattice.cpp
SRCS_MIN+= Analysis/ValueLatticeUtils.cpp
SRCS_MIN+= Analysis/ValueTracking.cpp
@@ -153,8 +168,9 @@ SRCS_MIN+= AsmParser/Parser.cpp
SRCS_MIN+= BinaryFormat/AMDGPUMetadataVerifier.cpp
SRCS_MIN+= BinaryFormat/COFF.cpp
SRCS_MIN+= BinaryFormat/Dwarf.cpp
-SRCS_MIN+= BinaryFormat/Magic.cpp
+SRCS_XDB+= BinaryFormat/ELF.cpp
SRCS_MIN+= BinaryFormat/MachO.cpp
+SRCS_MIN+= BinaryFormat/Magic.cpp
SRCS_MIN+= BinaryFormat/MsgPackDocument.cpp
SRCS_MIN+= BinaryFormat/MsgPackDocumentYAML.cpp
SRCS_MIN+= BinaryFormat/MsgPackReader.cpp
@@ -200,20 +216,26 @@ SRCS_MIN+= CodeGen/AsmPrinter/PseudoProbePrinter.cpp
SRCS_MIN+= CodeGen/AsmPrinter/WasmException.cpp
SRCS_MIN+= CodeGen/AsmPrinter/WinCFGuard.cpp
SRCS_MIN+= CodeGen/AsmPrinter/WinException.cpp
+SRCS_MIN+= CodeGen/AssignmentTrackingAnalysis.cpp
SRCS_MIN+= CodeGen/AtomicExpandPass.cpp
+SRCS_MIN+= CodeGen/BasicBlockPathCloning.cpp
SRCS_MIN+= CodeGen/BasicBlockSections.cpp
+SRCS_MIN+= CodeGen/BasicBlockSectionsProfileReader.cpp
SRCS_MIN+= CodeGen/BasicTargetTransformInfo.cpp
SRCS_MIN+= CodeGen/BranchFolding.cpp
SRCS_MIN+= CodeGen/BranchRelaxation.cpp
SRCS_MIN+= CodeGen/BreakFalseDeps.cpp
SRCS_MIN+= CodeGen/CFGuardLongjmp.cpp
+SRCS_MIN+= CodeGen/CFIFixup.cpp
SRCS_MIN+= CodeGen/CFIInstrInserter.cpp
SRCS_MIN+= CodeGen/CalcSpillWeights.cpp
+SRCS_MIN+= CodeGen/CallBrPrepare.cpp
SRCS_MIN+= CodeGen/CallingConvLower.cpp
SRCS_MIN+= CodeGen/CodeGen.cpp
SRCS_MIN+= CodeGen/CodeGenCommonISel.cpp
SRCS_MIN+= CodeGen/CodeGenPrepare.cpp
SRCS_EXL+= CodeGen/CommandFlags.cpp
+SRCS_MIN+= CodeGen/ComplexDeinterleavingPass.cpp
SRCS_MIN+= CodeGen/CriticalAntiDepBreaker.cpp
SRCS_MIN+= CodeGen/DFAPacketizer.cpp
SRCS_MIN+= CodeGen/DeadMachineInstructionElim.cpp
@@ -223,6 +245,8 @@ SRCS_MIN+= CodeGen/EHContGuardCatchret.cpp
SRCS_MIN+= CodeGen/EarlyIfConversion.cpp
SRCS_MIN+= CodeGen/EdgeBundles.cpp
SRCS_MIN+= CodeGen/ExecutionDomainFix.cpp
+SRCS_MIN+= CodeGen/ExpandLargeDivRem.cpp
+SRCS_MIN+= CodeGen/ExpandLargeFpConvert.cpp
SRCS_MIN+= CodeGen/ExpandMemCmp.cpp
SRCS_MIN+= CodeGen/ExpandPostRAPseudos.cpp
SRCS_MIN+= CodeGen/ExpandReductions.cpp
@@ -232,14 +256,16 @@ SRCS_MIN+= CodeGen/FaultMaps.cpp
SRCS_MIN+= CodeGen/FinalizeISel.cpp
SRCS_MIN+= CodeGen/FixupStatepointCallerSaved.cpp
SRCS_MIN+= CodeGen/FuncletLayout.cpp
+SRCS_MIN+= CodeGen/GCEmptyBasicBlocks.cpp
SRCS_MIN+= CodeGen/GCMetadata.cpp
SRCS_MIN+= CodeGen/GCMetadataPrinter.cpp
SRCS_MIN+= CodeGen/GCRootLowering.cpp
SRCS_MIN+= CodeGen/GlobalISel/CSEInfo.cpp
SRCS_MIN+= CodeGen/GlobalISel/CSEMIRBuilder.cpp
+SRCS_MIN+= CodeGen/GlobalISel/CallLowering.cpp
SRCS_MIN+= CodeGen/GlobalISel/Combiner.cpp
SRCS_MIN+= CodeGen/GlobalISel/CombinerHelper.cpp
-SRCS_MIN+= CodeGen/GlobalISel/CallLowering.cpp
+SRCS_MIN+= CodeGen/GlobalISel/GIMatchTableExecutor.cpp
SRCS_MIN+= CodeGen/GlobalISel/GISelChangeObserver.cpp
SRCS_MIN+= CodeGen/GlobalISel/GISelKnownBits.cpp
SRCS_MIN+= CodeGen/GlobalISel/GlobalISel.cpp
@@ -258,8 +284,6 @@ SRCS_MIN+= CodeGen/GlobalISel/Localizer.cpp
SRCS_MIN+= CodeGen/GlobalISel/LostDebugLocObserver.cpp
SRCS_MIN+= CodeGen/GlobalISel/MachineIRBuilder.cpp
SRCS_MIN+= CodeGen/GlobalISel/RegBankSelect.cpp
-SRCS_MIN+= CodeGen/GlobalISel/RegisterBank.cpp
-SRCS_MIN+= CodeGen/GlobalISel/RegisterBankInfo.cpp
SRCS_MIN+= CodeGen/GlobalISel/Utils.cpp
SRCS_MIN+= CodeGen/GlobalMerge.cpp
SRCS_MIN+= CodeGen/HardwareLoops.cpp
@@ -271,6 +295,8 @@ SRCS_MIN+= CodeGen/InterferenceCache.cpp
SRCS_MIN+= CodeGen/InterleavedAccessPass.cpp
SRCS_MIN+= CodeGen/InterleavedLoadCombinePass.cpp
SRCS_MIN+= CodeGen/IntrinsicLowering.cpp
+SRCS_MIN+= CodeGen/JMCInstrumenter.cpp
+SRCS_MIN+= CodeGen/KCFI.cpp
SRCS_MIN+= CodeGen/LLVMTargetMachine.cpp
SRCS_MIN+= CodeGen/LatencyPriorityQueue.cpp
SRCS_MIN+= CodeGen/LazyMachineBlockFrequencyInfo.cpp
@@ -294,6 +320,7 @@ SRCS_MIN+= CodeGen/LiveVariables.cpp
SRCS_MIN+= CodeGen/LocalStackSlotAllocation.cpp
SRCS_MIN+= CodeGen/LoopTraversal.cpp
SRCS_MIN+= CodeGen/LowLevelType.cpp
+SRCS_MIN+= CodeGen/LowLevelTypeUtils.cpp
SRCS_MIN+= CodeGen/LowerEmuTLS.cpp
SRCS_MIN+= CodeGen/MBFIWrapper.cpp
SRCS_MIN+= CodeGen/MIRCanonicalizerPass.cpp
@@ -306,11 +333,13 @@ SRCS_MIN+= CodeGen/MIRPrinter.cpp
SRCS_MIN+= CodeGen/MIRPrintingPass.cpp
SRCS_MIN+= CodeGen/MIRSampleProfile.cpp
SRCS_MIN+= CodeGen/MIRVRegNamerUtils.cpp
-SRCS_MIN+= CodeGen/MLRegallocEvictAdvisor.cpp
+SRCS_MIN+= CodeGen/MLRegAllocEvictAdvisor.cpp
+SRCS_MIN+= CodeGen/MLRegAllocPriorityAdvisor.cpp
SRCS_MIN+= CodeGen/MachineBasicBlock.cpp
SRCS_MIN+= CodeGen/MachineBlockFrequencyInfo.cpp
SRCS_MIN+= CodeGen/MachineBlockPlacement.cpp
SRCS_MIN+= CodeGen/MachineBranchProbabilityInfo.cpp
+SRCS_MIN+= CodeGen/MachineCFGPrinter.cpp
SRCS_MIN+= CodeGen/MachineCSE.cpp
SRCS_MIN+= CodeGen/MachineCheckDebugify.cpp
SRCS_MIN+= CodeGen/MachineCombiner.cpp
@@ -327,6 +356,7 @@ SRCS_MIN+= CodeGen/MachineFunctionSplitter.cpp
SRCS_MIN+= CodeGen/MachineInstr.cpp
SRCS_MIN+= CodeGen/MachineInstrBundle.cpp
SRCS_MIN+= CodeGen/MachineLICM.cpp
+SRCS_MIN+= CodeGen/MachineLateInstrsCleanup.cpp
SRCS_MIN+= CodeGen/MachineLoopInfo.cpp
SRCS_MIN+= CodeGen/MachineLoopUtils.cpp
SRCS_MIN+= CodeGen/MachineModuleInfo.cpp
@@ -335,6 +365,7 @@ SRCS_MIN+= CodeGen/MachineModuleSlotTracker.cpp
SRCS_MIN+= CodeGen/MachineOperand.cpp
SRCS_MIN+= CodeGen/MachineOptimizationRemarkEmitter.cpp
SRCS_MIN+= CodeGen/MachineOutliner.cpp
+SRCS_MIN+= CodeGen/MachinePassManager.cpp
SRCS_MIN+= CodeGen/MachinePipeliner.cpp
SRCS_MIN+= CodeGen/MachinePostDominators.cpp
SRCS_MIN+= CodeGen/MachineRegionInfo.cpp
@@ -347,10 +378,12 @@ SRCS_MIN+= CodeGen/MachineSizeOpts.cpp
SRCS_MIN+= CodeGen/MachineStableHash.cpp
SRCS_MIN+= CodeGen/MachineStripDebug.cpp
SRCS_MIN+= CodeGen/MachineTraceMetrics.cpp
+SRCS_MIN+= CodeGen/MachineUniformityAnalysis.cpp
SRCS_MIN+= CodeGen/MachineVerifier.cpp
SRCS_MIN+= CodeGen/MacroFusion.cpp
SRCS_MIN+= CodeGen/ModuloSchedule.cpp
SRCS_MIN+= CodeGen/MultiHazardRecognizer.cpp
+SRCS_EXT+= CodeGen/NonRelocatableStringpool.cpp
SRCS_MIN+= CodeGen/OptimizePHIs.cpp
SRCS_MIN+= CodeGen/PHIElimination.cpp
SRCS_MIN+= CodeGen/PHIEliminationUtils.cpp
@@ -364,19 +397,21 @@ SRCS_MIN+= CodeGen/ProcessImplicitDefs.cpp
SRCS_MIN+= CodeGen/PrologEpilogInserter.cpp
SRCS_MIN+= CodeGen/PseudoProbeInserter.cpp
SRCS_MIN+= CodeGen/PseudoSourceValue.cpp
-SRCS_MIN+= CodeGen/ReachingDefAnalysis.cpp
-SRCS_MIN+= CodeGen/ReplaceWithVeclib.cpp
SRCS_MIN+= CodeGen/RDFGraph.cpp
SRCS_MIN+= CodeGen/RDFLiveness.cpp
SRCS_MIN+= CodeGen/RDFRegisters.cpp
+SRCS_MIN+= CodeGen/ReachingDefAnalysis.cpp
SRCS_MIN+= CodeGen/RegAllocBase.cpp
SRCS_MIN+= CodeGen/RegAllocBasic.cpp
SRCS_MIN+= CodeGen/RegAllocEvictionAdvisor.cpp
SRCS_MIN+= CodeGen/RegAllocFast.cpp
SRCS_MIN+= CodeGen/RegAllocGreedy.cpp
SRCS_MIN+= CodeGen/RegAllocPBQP.cpp
+SRCS_MIN+= CodeGen/RegAllocPriorityAdvisor.cpp
SRCS_MIN+= CodeGen/RegUsageInfoCollector.cpp
SRCS_MIN+= CodeGen/RegUsageInfoPropagate.cpp
+SRCS_MIN+= CodeGen/RegisterBank.cpp
+SRCS_MIN+= CodeGen/RegisterBankInfo.cpp
SRCS_MIN+= CodeGen/RegisterClassInfo.cpp
SRCS_MIN+= CodeGen/RegisterCoalescer.cpp
SRCS_MIN+= CodeGen/RegisterPressure.cpp
@@ -384,13 +419,16 @@ SRCS_MIN+= CodeGen/RegisterScavenging.cpp
SRCS_MIN+= CodeGen/RegisterUsageInfo.cpp
SRCS_MIN+= CodeGen/RemoveRedundantDebugValues.cpp
SRCS_MIN+= CodeGen/RenameIndependentSubregs.cpp
+SRCS_MIN+= CodeGen/ReplaceWithVeclib.cpp
SRCS_MIN+= CodeGen/ResetMachineFunctionPass.cpp
SRCS_MIN+= CodeGen/SafeStack.cpp
SRCS_MIN+= CodeGen/SafeStackLayout.cpp
+SRCS_MIN+= CodeGen/SanitizerBinaryMetadata.cpp
SRCS_MIN+= CodeGen/ScheduleDAG.cpp
SRCS_MIN+= CodeGen/ScheduleDAGInstrs.cpp
SRCS_MIN+= CodeGen/ScheduleDAGPrinter.cpp
SRCS_MIN+= CodeGen/ScoreboardHazardRecognizer.cpp
+SRCS_MIN+= CodeGen/SelectOptimize.cpp
SRCS_MIN+= CodeGen/SelectionDAG/DAGCombiner.cpp
SRCS_MIN+= CodeGen/SelectionDAG/FastISel.cpp
SRCS_MIN+= CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -423,6 +461,7 @@ SRCS_MIN+= CodeGen/SlotIndexes.cpp
SRCS_MIN+= CodeGen/SpillPlacement.cpp
SRCS_MIN+= CodeGen/SplitKit.cpp
SRCS_MIN+= CodeGen/StackColoring.cpp
+SRCS_MIN+= CodeGen/StackFrameLayoutAnalysisPass.cpp
SRCS_MIN+= CodeGen/StackMapLivenessAnalysis.cpp
SRCS_MIN+= CodeGen/StackMaps.cpp
SRCS_MIN+= CodeGen/StackProtector.cpp
@@ -448,8 +487,27 @@ SRCS_MIN+= CodeGen/VirtRegMap.cpp
SRCS_MIN+= CodeGen/WasmEHPrepare.cpp
SRCS_MIN+= CodeGen/WinEHPrepare.cpp
SRCS_MIN+= CodeGen/XRayInstrumentation.cpp
+SRCS_EXT+= DWARFLinker/Classic/DWARFLinker.cpp
+SRCS_EXT+= DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
+SRCS_EXT+= DWARFLinker/Classic/DWARFLinkerDeclContext.cpp
+SRCS_EXT+= DWARFLinker/Classic/DWARFStreamer.cpp
+SRCS_EXT+= DWARFLinker/DWARFLinkerBase.cpp
+SRCS_EXT+= DWARFLinker/Parallel/AcceleratorRecordsSaver.cpp
+SRCS_EXT+= DWARFLinker/Parallel/DIEAttributeCloner.cpp
+SRCS_EXT+= DWARFLinker/Parallel/DWARFEmitterImpl.cpp
+SRCS_EXT+= DWARFLinker/Parallel/DWARFLinker.cpp
+SRCS_EXT+= DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
+SRCS_EXT+= DWARFLinker/Parallel/DWARFLinkerImpl.cpp
+SRCS_EXT+= DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
+SRCS_EXT+= DWARFLinker/Parallel/DWARFLinkerUnit.cpp
+SRCS_EXT+= DWARFLinker/Parallel/DependencyTracker.cpp
+SRCS_EXT+= DWARFLinker/Parallel/OutputSections.cpp
+SRCS_EXT+= DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
+SRCS_EXT+= DWARFLinker/Utils.cpp
SRCS_EXT+= DWP/DWP.cpp
SRCS_EXT+= DWP/DWPError.cpp
+SRCS_MIW+= DebugInfo/BTF/BTFContext.cpp
+SRCS_MIW+= DebugInfo/BTF/BTFParser.cpp
SRCS_EXT+= DebugInfo/CodeView/AppendingTypeTableBuilder.cpp
SRCS_MIN+= DebugInfo/CodeView/CVSymbolVisitor.cpp
SRCS_MIN+= DebugInfo/CodeView/CVTypeVisitor.cpp
@@ -479,6 +537,7 @@ SRCS_MIN+= DebugInfo/CodeView/RecordSerialization.cpp
SRCS_MIN+= DebugInfo/CodeView/SimpleTypeSerializer.cpp
SRCS_EXT+= DebugInfo/CodeView/StringsAndChecksums.cpp
SRCS_MIN+= DebugInfo/CodeView/SymbolDumper.cpp
+SRCS_MIN+= DebugInfo/CodeView/SymbolRecordHelpers.cpp
SRCS_MIN+= DebugInfo/CodeView/SymbolRecordMapping.cpp
SRCS_EXT+= DebugInfo/CodeView/SymbolSerializer.cpp
SRCS_MIN+= DebugInfo/CodeView/TypeDumpVisitor.cpp
@@ -512,6 +571,7 @@ SRCS_MIN+= DebugInfo/DWARF/DWARFExpression.cpp
SRCS_MIW+= DebugInfo/DWARF/DWARFFormValue.cpp
SRCS_MIW+= DebugInfo/DWARF/DWARFGdbIndex.cpp
SRCS_MIW+= DebugInfo/DWARF/DWARFListTable.cpp
+SRCS_MIW+= DebugInfo/DWARF/DWARFTypePrinter.cpp
SRCS_MIW+= DebugInfo/DWARF/DWARFTypeUnit.cpp
SRCS_MIW+= DebugInfo/DWARF/DWARFUnit.cpp
SRCS_MIW+= DebugInfo/DWARF/DWARFUnitIndex.cpp
@@ -528,6 +588,7 @@ SRCS_EXT+= DebugInfo/PDB/Native/DbiModuleList.cpp
SRCS_EXT+= DebugInfo/PDB/Native/DbiStream.cpp
SRCS_EXT+= DebugInfo/PDB/Native/DbiStreamBuilder.cpp
SRCS_EXT+= DebugInfo/PDB/Native/EnumTables.cpp
+SRCS_EXT+= DebugInfo/PDB/Native/FormatUtil.cpp
SRCS_EXT+= DebugInfo/PDB/Native/GSIStreamBuilder.cpp
SRCS_EXT+= DebugInfo/PDB/Native/GlobalsStream.cpp
SRCS_EXT+= DebugInfo/PDB/Native/Hash.cpp
@@ -535,6 +596,8 @@ SRCS_EXT+= DebugInfo/PDB/Native/HashTable.cpp
SRCS_EXT+= DebugInfo/PDB/Native/InfoStream.cpp
SRCS_EXT+= DebugInfo/PDB/Native/InfoStreamBuilder.cpp
SRCS_EXT+= DebugInfo/PDB/Native/InjectedSourceStream.cpp
+SRCS_EXT+= DebugInfo/PDB/Native/InputFile.cpp
+SRCS_EXT+= DebugInfo/PDB/Native/LinePrinter.cpp
SRCS_EXT+= DebugInfo/PDB/Native/ModuleDebugStream.cpp
SRCS_EXT+= DebugInfo/PDB/Native/NamedStreamMap.cpp
SRCS_EXT+= DebugInfo/PDB/Native/NativeCompilandSymbol.cpp
@@ -610,13 +673,15 @@ SRCS_EXT+= DebugInfo/PDB/PDBSymbolTypeVTableShape.cpp
SRCS_EXT+= DebugInfo/PDB/PDBSymbolUnknown.cpp
SRCS_EXT+= DebugInfo/PDB/PDBSymbolUsingNamespace.cpp
SRCS_EXT+= DebugInfo/PDB/UDTLayout.cpp
-SRCS_MIW+= DebugInfo/Symbolize/DIFetcher.cpp
SRCS_MIW+= DebugInfo/Symbolize/DIPrinter.cpp
+SRCS_MIW+= DebugInfo/Symbolize/Markup.cpp
+SRCS_MIW+= DebugInfo/Symbolize/MarkupFilter.cpp
SRCS_MIW+= DebugInfo/Symbolize/SymbolizableObjectFile.cpp
SRCS_MIW+= DebugInfo/Symbolize/Symbolize.cpp
-SRCS_MIW+= Debuginfod/DIFetcher.cpp
+SRCS_MIW+= Debuginfod/BuildIDFetcher.cpp
SRCS_MIW+= Debuginfod/Debuginfod.cpp
SRCS_MIW+= Debuginfod/HTTPClient.cpp
+SRCS_MIW+= Debuginfod/HTTPServer.cpp
SRCS_MIN+= Demangle/DLangDemangle.cpp
SRCS_MIN+= Demangle/Demangle.cpp
SRCS_MIN+= Demangle/ItaniumDemangle.cpp
@@ -629,12 +694,21 @@ SRCS_XDB+= ExecutionEngine/GDBRegistrationListener.cpp
SRCS_XDB+= ExecutionEngine/Interpreter/Execution.cpp
SRCS_XDB+= ExecutionEngine/Interpreter/ExternalFunctions.cpp
SRCS_XDB+= ExecutionEngine/Interpreter/Interpreter.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/COFF.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/COFFDirectiveParser.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/COFFLinkGraphBuilder.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/COFF_x86_64.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/DWARFRecordSectionSplitter.cpp
SRCS_EXT+= ExecutionEngine/JITLink/EHFrameSupport.cpp
SRCS_EXT+= ExecutionEngine/JITLink/ELF.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/ELFLinkGraphBuilder.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/ELF_aarch32.cpp
SRCS_EXT+= ExecutionEngine/JITLink/ELF_aarch64.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/ELF_i386.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/ELF_loongarch.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/ELF_ppc64.cpp
SRCS_EXT+= ExecutionEngine/JITLink/ELF_riscv.cpp
SRCS_EXT+= ExecutionEngine/JITLink/ELF_x86_64.cpp
-SRCS_EXT+= ExecutionEngine/JITLink/ELFLinkGraphBuilder.cpp
SRCS_EXT+= ExecutionEngine/JITLink/JITLink.cpp
SRCS_EXT+= ExecutionEngine/JITLink/JITLinkGeneric.cpp
SRCS_EXT+= ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
@@ -642,18 +716,26 @@ SRCS_EXT+= ExecutionEngine/JITLink/MachO.cpp
SRCS_EXT+= ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
SRCS_EXT+= ExecutionEngine/JITLink/MachO_arm64.cpp
SRCS_EXT+= ExecutionEngine/JITLink/MachO_x86_64.cpp
-SRCS_EXT+= ExecutionEngine/JITLink/MemoryFlags.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/aarch32.cpp
SRCS_EXT+= ExecutionEngine/JITLink/aarch64.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/i386.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/loongarch.cpp
+SRCS_EXT+= ExecutionEngine/JITLink/ppc64.cpp
SRCS_EXT+= ExecutionEngine/JITLink/riscv.cpp
SRCS_EXT+= ExecutionEngine/JITLink/x86_64.cpp
SRCS_XDB+= ExecutionEngine/MCJIT/MCJIT.cpp
+SRCS_EXT+= ExecutionEngine/Orc/COFFPlatform.cpp
+SRCS_EXT+= ExecutionEngine/Orc/COFFVCRuntimeSupport.cpp
SRCS_EXT+= ExecutionEngine/Orc/CompileOnDemandLayer.cpp
SRCS_EXT+= ExecutionEngine/Orc/CompileUtils.cpp
SRCS_EXT+= ExecutionEngine/Orc/Core.cpp
SRCS_EXT+= ExecutionEngine/Orc/DebugObjectManagerPlugin.cpp
SRCS_EXT+= ExecutionEngine/Orc/DebugUtils.cpp
+SRCS_EXT+= ExecutionEngine/Orc/Debugging/DebuggerSupport.cpp
+SRCS_EXT+= ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.cpp
SRCS_EXT+= ExecutionEngine/Orc/ELFNixPlatform.cpp
SRCS_EXT+= ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
+SRCS_EXT+= ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
SRCS_EXT+= ExecutionEngine/Orc/EPCEHFrameRegistrar.cpp
SRCS_EXT+= ExecutionEngine/Orc/EPCGenericDylibManager.cpp
SRCS_EXT+= ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
@@ -667,6 +749,7 @@ SRCS_EXT+= ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
SRCS_EXT+= ExecutionEngine/Orc/LLJIT.cpp
SRCS_EXT+= ExecutionEngine/Orc/Layer.cpp
SRCS_EXT+= ExecutionEngine/Orc/LazyReexports.cpp
+SRCS_EXT+= ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
SRCS_EXT+= ExecutionEngine/Orc/MachOPlatform.cpp
SRCS_EXT+= ExecutionEngine/Orc/Mangling.cpp
SRCS_EXT+= ExecutionEngine/Orc/ObjectFileInterface.cpp
@@ -675,6 +758,7 @@ SRCS_EXT+= ExecutionEngine/Orc/ObjectTransformLayer.cpp
SRCS_EXT+= ExecutionEngine/Orc/OrcABISupport.cpp
SRCS_EXT+= ExecutionEngine/Orc/RTDyldObjectLinkingLayer.cpp
SRCS_EXT+= ExecutionEngine/Orc/Shared/AllocationActions.cpp
+SRCS_EXT+= ExecutionEngine/Orc/Shared/ObjectFormats.cpp
SRCS_EXT+= ExecutionEngine/Orc/Shared/OrcError.cpp
SRCS_EXT+= ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
SRCS_EXT+= ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
@@ -695,6 +779,10 @@ SRCS_XDB+= ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp
SRCS_XDB+= ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldELFMips.cpp
SRCS_XDB+= ExecutionEngine/SectionMemoryManager.cpp
SRCS_XDB+= ExecutionEngine/TargetSelect.cpp
+SRCS_MIN+= Frontend/Driver/CodeGenOptions.cpp
+SRCS_MIN+= Frontend/HLSL/HLSLResource.cpp
+SRCS_MIN+= Frontend/Offloading/OffloadWrapper.cpp
+SRCS_MIN+= Frontend/Offloading/Utility.cpp
SRCS_MIN+= Frontend/OpenMP/OMP.cpp
SRCS_MIN+= Frontend/OpenMP/OMPContext.cpp
SRCS_MIN+= Frontend/OpenMP/OMPIRBuilder.cpp
@@ -704,21 +792,25 @@ SRCS_MIN+= IR/Assumptions.cpp
SRCS_MIN+= IR/Attributes.cpp
SRCS_MIN+= IR/AutoUpgrade.cpp
SRCS_MIN+= IR/BasicBlock.cpp
-SRCS_EXT+= IR/BuiltinGCs.cpp
+SRCS_MIN+= IR/BuiltinGCs.cpp
SRCS_MIN+= IR/Comdat.cpp
SRCS_MIN+= IR/ConstantFold.cpp
SRCS_MIN+= IR/ConstantRange.cpp
SRCS_MIN+= IR/Constants.cpp
+SRCS_MIN+= IR/ConvergenceVerifier.cpp
SRCS_MIN+= IR/Core.cpp
+SRCS_MIN+= IR/CycleInfo.cpp
SRCS_MIN+= IR/DIBuilder.cpp
SRCS_MIN+= IR/DataLayout.cpp
SRCS_MIN+= IR/DebugInfo.cpp
SRCS_MIN+= IR/DebugInfoMetadata.cpp
SRCS_MIN+= IR/DebugLoc.cpp
+SRCS_MIN+= IR/DebugProgramInstruction.cpp
SRCS_MIN+= IR/DiagnosticHandler.cpp
SRCS_MIN+= IR/DiagnosticInfo.cpp
SRCS_MIN+= IR/DiagnosticPrinter.cpp
SRCS_MIN+= IR/Dominators.cpp
+SRCS_MIN+= IR/EHPersonalities.cpp
SRCS_MIN+= IR/FPEnv.cpp
SRCS_MIN+= IR/Function.cpp
SRCS_MIN+= IR/GCStrategy.cpp
@@ -747,19 +839,23 @@ SRCS_MIN+= IR/PassManager.cpp
SRCS_MIN+= IR/PassRegistry.cpp
SRCS_MIN+= IR/PassTimingInfo.cpp
SRCS_MIN+= IR/PrintPasses.cpp
+SRCS_MIN+= IR/ProfDataUtils.cpp
SRCS_MIN+= IR/ProfileSummary.cpp
SRCS_MIN+= IR/PseudoProbe.cpp
SRCS_MIN+= IR/ReplaceConstant.cpp
SRCS_MIN+= IR/SSAContext.cpp
SRCS_MIN+= IR/SafepointIRVerifier.cpp
SRCS_MIN+= IR/Statepoint.cpp
+SRCS_MIN+= IR/StructuralHash.cpp
SRCS_MIN+= IR/Type.cpp
SRCS_MIN+= IR/TypeFinder.cpp
SRCS_MIN+= IR/Use.cpp
SRCS_MIN+= IR/User.cpp
+SRCS_MIN+= IR/VFABIDemangler.cpp
SRCS_MIN+= IR/Value.cpp
SRCS_MIN+= IR/ValueSymbolTable.cpp
SRCS_MIN+= IR/Verifier.cpp
+SRCS_MIN+= IRPrinter/IRPrintingPasses.cpp
SRCS_MIN+= IRReader/IRReader.cpp
SRCS_MIN+= LTO/LTO.cpp
SRCS_MIN+= LTO/LTOBackend.cpp
@@ -768,12 +864,13 @@ SRCS_EXL+= LTO/LTOModule.cpp
SRCS_EXL+= LTO/SummaryBasedOptimizations.cpp
SRCS_EXL+= LTO/ThinLTOCodeGenerator.cpp
SRCS_MIN+= LTO/UpdateCompilerUsed.cpp
+SRCS_MIN+= Linker/IRMover.cpp
# Only needed for clangd/clang-query, uncomment once we build those.
# SRCS_XDW+= LineEditor/LineEditor.cpp
-SRCS_MIN+= Linker/IRMover.cpp
SRCS_MIN+= Linker/LinkModules.cpp
SRCS_MIN+= MC/ConstantPools.cpp
SRCS_MIN+= MC/ELFObjectWriter.cpp
+SRCS_MIN+= MC/GOFFObjectWriter.cpp
SRCS_MIN+= MC/MCAsmBackend.cpp
SRCS_MIN+= MC/MCAsmInfo.cpp
SRCS_MIN+= MC/MCAsmInfoCOFF.cpp
@@ -786,6 +883,8 @@ SRCS_MIN+= MC/MCAssembler.cpp
SRCS_MIN+= MC/MCCodeEmitter.cpp
SRCS_MIN+= MC/MCCodeView.cpp
SRCS_MIN+= MC/MCContext.cpp
+SRCS_MIN+= MC/MCDXContainerStreamer.cpp
+SRCS_MIN+= MC/MCDXContainerWriter.cpp
SRCS_XDL+= MC/MCDisassembler/Disassembler.cpp
SRCS_XDW+= MC/MCDisassembler/MCDisassembler.cpp
SRCS_XDW+= MC/MCDisassembler/MCExternalSymbolizer.cpp
@@ -796,6 +895,7 @@ SRCS_MIN+= MC/MCELFObjectTargetWriter.cpp
SRCS_MIN+= MC/MCELFStreamer.cpp
SRCS_MIN+= MC/MCExpr.cpp
SRCS_MIN+= MC/MCFragment.cpp
+SRCS_MIN+= MC/MCGOFFStreamer.cpp
SRCS_MIN+= MC/MCInst.cpp
SRCS_MIN+= MC/MCInstPrinter.cpp
SRCS_MIN+= MC/MCInstrAnalysis.cpp
@@ -822,9 +922,11 @@ SRCS_MIN+= MC/MCParser/WasmAsmParser.cpp
SRCS_MIN+= MC/MCParser/XCOFFAsmParser.cpp
SRCS_MIN+= MC/MCPseudoProbe.cpp
SRCS_MIN+= MC/MCRegisterInfo.cpp
+SRCS_MIN+= MC/MCSPIRVStreamer.cpp
SRCS_MIN+= MC/MCSchedule.cpp
SRCS_MIN+= MC/MCSection.cpp
SRCS_MIN+= MC/MCSectionCOFF.cpp
+SRCS_MIN+= MC/MCSectionDXContainer.cpp
SRCS_MIN+= MC/MCSectionELF.cpp
SRCS_MIN+= MC/MCSectionMachO.cpp
SRCS_MIN+= MC/MCSectionWasm.cpp
@@ -841,11 +943,11 @@ SRCS_MIN+= MC/MCWasmStreamer.cpp
SRCS_MIN+= MC/MCWin64EH.cpp
SRCS_MIN+= MC/MCWinCOFFStreamer.cpp
SRCS_MIN+= MC/MCWinEH.cpp
-SRCS_MIN+= MC/MCXCOFFStreamer.cpp
SRCS_MIN+= MC/MCXCOFFObjectTargetWriter.cpp
+SRCS_MIN+= MC/MCXCOFFStreamer.cpp
SRCS_MIN+= MC/MachObjectWriter.cpp
+SRCS_MIN+= MC/SPIRVObjectWriter.cpp
SRCS_MIN+= MC/StringTableBuilder.cpp
-SRCS_MIN+= MC/SubtargetFeature.cpp
SRCS_MIN+= MC/TargetRegistry.cpp
SRCS_MIN+= MC/WasmObjectWriter.cpp
SRCS_MIN+= MC/WinCOFFObjectWriter.cpp
@@ -873,9 +975,32 @@ SRCS_EXT+= MCA/Stages/RetireStage.cpp
SRCS_EXT+= MCA/Stages/Stage.cpp
SRCS_EXT+= MCA/Support.cpp
SRCS_EXT+= MCA/View.cpp
+SRCS_MIW+= ObjCopy/Archive.cpp
+SRCS_MIW+= ObjCopy/COFF/COFFObjcopy.cpp
+SRCS_MIW+= ObjCopy/COFF/COFFObject.cpp
+SRCS_MIW+= ObjCopy/COFF/COFFReader.cpp
+SRCS_MIW+= ObjCopy/COFF/COFFWriter.cpp
+SRCS_MIW+= ObjCopy/CommonConfig.cpp
+SRCS_MIW+= ObjCopy/ConfigManager.cpp
+SRCS_MIW+= ObjCopy/ELF/ELFObjcopy.cpp
+SRCS_MIW+= ObjCopy/ELF/ELFObject.cpp
+SRCS_MIW+= ObjCopy/MachO/MachOLayoutBuilder.cpp
+SRCS_MIW+= ObjCopy/MachO/MachOObjcopy.cpp
+SRCS_MIW+= ObjCopy/MachO/MachOObject.cpp
+SRCS_MIW+= ObjCopy/MachO/MachOReader.cpp
+SRCS_MIW+= ObjCopy/MachO/MachOWriter.cpp
+SRCS_MIW+= ObjCopy/ObjCopy.cpp
+SRCS_MIW+= ObjCopy/XCOFF/XCOFFObjcopy.cpp
+SRCS_MIW+= ObjCopy/XCOFF/XCOFFReader.cpp
+SRCS_MIW+= ObjCopy/XCOFF/XCOFFWriter.cpp
+SRCS_MIW+= ObjCopy/wasm/WasmObjcopy.cpp
+SRCS_MIW+= ObjCopy/wasm/WasmObject.cpp
+SRCS_MIW+= ObjCopy/wasm/WasmReader.cpp
+SRCS_MIW+= ObjCopy/wasm/WasmWriter.cpp
SRCS_MIN+= Object/Archive.cpp
SRCS_MIN+= Object/ArchiveWriter.cpp
SRCS_MIN+= Object/Binary.cpp
+SRCS_MIW+= Object/BuildID.cpp
SRCS_MIN+= Object/COFFImportFile.cpp
SRCS_MIW+= Object/COFFModuleDefinition.cpp
SRCS_MIN+= Object/COFFObjectFile.cpp
@@ -893,6 +1018,7 @@ SRCS_MIW+= Object/Minidump.cpp
SRCS_MIN+= Object/ModuleSymbolTable.cpp
SRCS_EXT+= Object/Object.cpp
SRCS_MIN+= Object/ObjectFile.cpp
+SRCS_MIW+= Object/OffloadBinary.cpp
SRCS_MIN+= Object/RecordStreamer.cpp
SRCS_MIW+= Object/RelocationResolver.cpp
SRCS_MIW+= Object/SymbolSize.cpp
@@ -928,11 +1054,14 @@ SRCS_MIN+= ProfileData/InstrProf.cpp
SRCS_MIN+= ProfileData/InstrProfCorrelator.cpp
SRCS_MIN+= ProfileData/InstrProfReader.cpp
SRCS_MIN+= ProfileData/InstrProfWriter.cpp
+SRCS_MIN+= ProfileData/ItaniumManglingCanonicalizer.cpp
+SRCS_MIN+= ProfileData/MemProf.cpp
SRCS_MIN+= ProfileData/ProfileSummaryBuilder.cpp
SRCS_MIW+= ProfileData/RawMemProfReader.cpp
SRCS_MIN+= ProfileData/SampleProf.cpp
SRCS_MIN+= ProfileData/SampleProfReader.cpp
SRCS_MIN+= ProfileData/SampleProfWriter.cpp
+SRCS_MIN+= ProfileData/SymbolRemappingReader.cpp
SRCS_MIN+= Remarks/BitstreamRemarkParser.cpp
SRCS_MIN+= Remarks/BitstreamRemarkSerializer.cpp
SRCS_MIN+= Remarks/RemarkFormat.cpp
@@ -942,7 +1071,6 @@ SRCS_MIN+= Remarks/RemarkStreamer.cpp
SRCS_MIN+= Remarks/RemarkStringTable.cpp
SRCS_MIN+= Remarks/YAMLRemarkParser.cpp
SRCS_MIN+= Remarks/YAMLRemarkSerializer.cpp
-SRCS_MIN+= Support/AArch64TargetParser.cpp
SRCS_MIN+= Support/ABIBreak.cpp
SRCS_MIN+= Support/APFixedPoint.cpp
SRCS_MIN+= Support/APFloat.cpp
@@ -950,9 +1078,23 @@ SRCS_MIN+= Support/APInt.cpp
SRCS_MIN+= Support/APSInt.cpp
SRCS_MIN+= Support/ARMAttributeParser.cpp
SRCS_MIN+= Support/ARMBuildAttrs.cpp
-SRCS_MIN+= Support/ARMTargetParser.cpp
SRCS_MIN+= Support/ARMWinEH.cpp
SRCS_MIN+= Support/Allocator.cpp
+SRCS_MIN+= Support/BLAKE3/blake3.c
+.if ${TARGET_ARCH} == "amd64"
+SRCS_MIN+= Support/BLAKE3/blake3_avx2_x86-64_unix.S
+SRCS_MIN+= Support/BLAKE3/blake3_avx512_x86-64_unix.S
+.endif
+SRCS_MIN+= Support/BLAKE3/blake3_dispatch.c
+.if ${TARGET_ARCH} == "aarch64"
+SRCS_MIN+= Support/BLAKE3/blake3_neon.c
+.endif
+SRCS_MIN+= Support/BLAKE3/blake3_portable.c
+.if ${TARGET_ARCH} == "amd64"
+SRCS_MIN+= Support/BLAKE3/blake3_sse2_x86-64_unix.S
+SRCS_MIN+= Support/BLAKE3/blake3_sse41_x86-64_unix.S
+.endif
+SRCS_COV+= Support/BalancedPartitioning.cpp
SRCS_MIN+= Support/BinaryStreamError.cpp
SRCS_MIN+= Support/BinaryStreamReader.cpp
SRCS_MIN+= Support/BinaryStreamRef.cpp
@@ -960,10 +1102,10 @@ SRCS_MIN+= Support/BinaryStreamWriter.cpp
SRCS_MIN+= Support/BlockFrequency.cpp
SRCS_MIN+= Support/BranchProbability.cpp
SRCS_MIN+= Support/BuryPointer.cpp
-SRCS_MIN+= Support/CachePruning.cpp
-SRCS_MIW+= Support/Caching.cpp
SRCS_MIW+= Support/COM.cpp
SRCS_MIN+= Support/CRC.cpp
+SRCS_MIN+= Support/CachePruning.cpp
+SRCS_MIW+= Support/Caching.cpp
SRCS_MIN+= Support/Chrono.cpp
SRCS_MIN+= Support/CodeGenCoverage.cpp
SRCS_MIN+= Support/CommandLine.cpp
@@ -988,25 +1130,23 @@ SRCS_MIN+= Support/ExtensibleRTTI.cpp
SRCS_MIN+= Support/FileCollector.cpp
SRCS_MIW+= Support/FileOutputBuffer.cpp
SRCS_MIN+= Support/FileUtilities.cpp
+SRCS_MIN+= Support/FloatingPointMode.cpp
SRCS_MIN+= Support/FoldingSet.cpp
SRCS_MIN+= Support/FormatVariadic.cpp
SRCS_MIN+= Support/FormattedStream.cpp
SRCS_MIN+= Support/GlobPattern.cpp
SRCS_MIN+= Support/GraphWriter.cpp
SRCS_MIN+= Support/Hashing.cpp
-SRCS_MIN+= Support/Host.cpp
SRCS_MIN+= Support/InitLLVM.cpp
SRCS_MIN+= Support/InstructionCost.cpp
SRCS_MIN+= Support/IntEqClasses.cpp
SRCS_MIN+= Support/IntervalMap.cpp
-SRCS_MIN+= Support/ItaniumManglingCanonicalizer.cpp
SRCS_MIN+= Support/JSON.cpp
SRCS_MIN+= Support/KnownBits.cpp
SRCS_MIN+= Support/LEB128.cpp
SRCS_MIN+= Support/LineIterator.cpp
SRCS_MIN+= Support/Locale.cpp
SRCS_MIN+= Support/LockFileManager.cpp
-SRCS_MIN+= Support/LowLevelType.cpp
SRCS_MIN+= Support/MD5.cpp
SRCS_MIW+= Support/MSP430AttributeParser.cpp
SRCS_MIW+= Support/MSP430Attributes.cpp
@@ -1019,6 +1159,7 @@ SRCS_MIN+= Support/MemoryBufferRef.cpp
SRCS_MIN+= Support/NativeFormatting.cpp
SRCS_MIN+= Support/OptimizedStructLayout.cpp
SRCS_MIN+= Support/Optional.cpp
+SRCS_MIN+= Support/PGOOptions.cpp
SRCS_EXL+= Support/Parallel.cpp
SRCS_MIN+= Support/Path.cpp
SRCS_MIN+= Support/PluginLoader.cpp
@@ -1047,34 +1188,32 @@ SRCS_MIN+= Support/StringMap.cpp
SRCS_MIN+= Support/StringRef.cpp
SRCS_MIN+= Support/StringSaver.cpp
SRCS_MIN+= Support/SuffixTree.cpp
-SRCS_MIN+= Support/SymbolRemappingReader.cpp
+SRCS_MIN+= Support/SuffixTreeNode.cpp
SRCS_EXT+= Support/SystemUtils.cpp
SRCS_LLD+= Support/TarWriter.cpp
-SRCS_MIN+= Support/TargetParser.cpp
-SRCS_MIN+= Support/ThreadLocal.cpp
SRCS_MIW+= Support/ThreadPool.cpp
SRCS_MIN+= Support/Threading.cpp
SRCS_MIN+= Support/TimeProfiler.cpp
SRCS_MIN+= Support/Timer.cpp
SRCS_MIN+= Support/ToolOutputFile.cpp
-SRCS_MIN+= Support/TrigramIndex.cpp
-SRCS_MIN+= Support/Triple.cpp
SRCS_MIN+= Support/Twine.cpp
SRCS_MIN+= Support/TypeSize.cpp
SRCS_MIN+= Support/Unicode.cpp
SRCS_MIN+= Support/UnicodeCaseFold.cpp
+SRCS_MIN+= Support/UnicodeNameToCodepoint.cpp
+SRCS_MIN+= Support/UnicodeNameToCodepointGenerated.cpp
SRCS_MIN+= Support/Valgrind.cpp
-SRCS_MIN+= Support/VirtualFileSystem.cpp
SRCS_MIN+= Support/VersionTuple.cpp
+SRCS_MIN+= Support/VirtualFileSystem.cpp
SRCS_MIN+= Support/Watchdog.cpp
SRCS_MIN+= Support/WithColor.cpp
-SRCS_MIN+= Support/X86TargetParser.cpp
SRCS_MIN+= Support/YAMLParser.cpp
SRCS_MIN+= Support/YAMLTraits.cpp
SRCS_FUL+= Support/Z3Solver.cpp
SRCS_MIN+= Support/circular_raw_ostream.cpp
SRCS_MIN+= Support/raw_os_ostream.cpp
SRCS_MIN+= Support/raw_ostream.cpp
+SRCS_MIN+= Support/raw_socket_stream.cpp
SRCS_MIN+= Support/regcomp.c
SRCS_MIN+= Support/regerror.c
SRCS_MIN+= Support/regexec.c
@@ -1095,6 +1234,7 @@ SRCS_MIN+= TableGen/TableGenBackend.cpp
SRCS_MIN+= Target/AArch64/AArch64A53Fix835769.cpp
SRCS_MIN+= Target/AArch64/AArch64A57FPLoadBalancing.cpp
SRCS_MIN+= Target/AArch64/AArch64AdvSIMDScalarPass.cpp
+SRCS_MIN+= Target/AArch64/AArch64Arm64ECCallLowering.cpp
SRCS_MIN+= Target/AArch64/AArch64AsmPrinter.cpp
SRCS_MIN+= Target/AArch64/AArch64BranchTargets.cpp
SRCS_MIN+= Target/AArch64/AArch64CallingConvention.cpp
@@ -1110,16 +1250,20 @@ SRCS_MIN+= Target/AArch64/AArch64ExpandPseudoInsts.cpp
SRCS_MIN+= Target/AArch64/AArch64FalkorHWPFFix.cpp
SRCS_MIN+= Target/AArch64/AArch64FastISel.cpp
SRCS_MIN+= Target/AArch64/AArch64FrameLowering.cpp
+SRCS_MIN+= Target/AArch64/AArch64GlobalsTagging.cpp
SRCS_MIN+= Target/AArch64/AArch64ISelDAGToDAG.cpp
SRCS_MIN+= Target/AArch64/AArch64ISelLowering.cpp
SRCS_MIN+= Target/AArch64/AArch64InstrInfo.cpp
SRCS_MIN+= Target/AArch64/AArch64LoadStoreOptimizer.cpp
+SRCS_MIN+= Target/AArch64/AArch64LoopIdiomTransform.cpp
SRCS_MIN+= Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
SRCS_MIN+= Target/AArch64/AArch64MCInstLower.cpp
SRCS_MIN+= Target/AArch64/AArch64MIPeepholeOpt.cpp
SRCS_MIN+= Target/AArch64/AArch64MachineFunctionInfo.cpp
+SRCS_MIN+= Target/AArch64/AArch64MachineScheduler.cpp
SRCS_MIN+= Target/AArch64/AArch64MacroFusion.cpp
SRCS_MIN+= Target/AArch64/AArch64PBQPRegAlloc.cpp
+SRCS_MIN+= Target/AArch64/AArch64PointerAuth.cpp
SRCS_MIN+= Target/AArch64/AArch64PromoteConstant.cpp
SRCS_MIN+= Target/AArch64/AArch64RedundantCopyElimination.cpp
SRCS_MIN+= Target/AArch64/AArch64RegisterInfo.cpp
@@ -1142,10 +1286,10 @@ SRCS_MIN+= Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
SRCS_MIN+= Target/AArch64/GISel/AArch64InstructionSelector.cpp
SRCS_MIN+= Target/AArch64/GISel/AArch64LegalizerInfo.cpp
SRCS_MIN+= Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
-SRCS_MIN+= Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
SRCS_MIN+= Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
SRCS_MIN+= Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
SRCS_MIN+= Target/AArch64/GISel/AArch64PostSelectOptimize.cpp
+SRCS_MIN+= Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
SRCS_MIN+= Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
SRCS_MIN+= Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
SRCS_MIN+= Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
@@ -1159,9 +1303,11 @@ SRCS_MIN+= Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
SRCS_MIN+= Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
SRCS_MIN+= Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
SRCS_MIN+= Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
+SRCS_MIN+= Target/AArch64/SMEABIPass.cpp
SRCS_MIN+= Target/AArch64/SVEIntrinsicOpts.cpp
SRCS_MIN+= Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
SRCS_MIN+= Target/AArch64/Utils/AArch64BaseInfo.cpp
+SRCS_MIN+= Target/AArch64/Utils/AArch64SMEAttributes.cpp
.endif # MK_LLVM_TARGET_AARCH64
.if ${MK_LLVM_TARGET_ARM} != "no"
SRCS_MIN+= Target/ARM/A15SDOptimizer.cpp
@@ -1177,6 +1323,7 @@ SRCS_MIN+= Target/ARM/ARMConstantIslandPass.cpp
SRCS_MIN+= Target/ARM/ARMConstantPoolValue.cpp
SRCS_MIN+= Target/ARM/ARMExpandPseudoInsts.cpp
SRCS_MIN+= Target/ARM/ARMFastISel.cpp
+SRCS_MIN+= Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
SRCS_MIN+= Target/ARM/ARMFrameLowering.cpp
SRCS_MIN+= Target/ARM/ARMHazardRecognizer.cpp
SRCS_MIN+= Target/ARM/ARMISelDAGToDAG.cpp
@@ -1246,12 +1393,17 @@ SRCS_MIN+= Target/BPF/BPFMIChecking.cpp
SRCS_MIN+= Target/BPF/BPFMIPeephole.cpp
SRCS_MIN+= Target/BPF/BPFMISimplifyPatchable.cpp
SRCS_MIN+= Target/BPF/BPFPreserveDIType.cpp
+SRCS_MIN+= Target/BPF/BPFPreserveStaticOffset.cpp
SRCS_MIN+= Target/BPF/BPFRegisterInfo.cpp
SRCS_MIN+= Target/BPF/BPFSelectionDAGInfo.cpp
SRCS_MIN+= Target/BPF/BPFSubtarget.cpp
SRCS_MIN+= Target/BPF/BPFTargetMachine.cpp
SRCS_MIN+= Target/BPF/BTFDebug.cpp
SRCS_MIN+= Target/BPF/Disassembler/BPFDisassembler.cpp
+SRCS_MIN+= Target/BPF/GISel/BPFCallLowering.cpp
+SRCS_MIN+= Target/BPF/GISel/BPFInstructionSelector.cpp
+SRCS_MIN+= Target/BPF/GISel/BPFLegalizerInfo.cpp
+SRCS_MIN+= Target/BPF/GISel/BPFRegisterBankInfo.cpp
SRCS_MIN+= Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
SRCS_MIN+= Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp
SRCS_MIN+= Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
@@ -1301,8 +1453,10 @@ SRCS_MIN+= Target/Mips/MipsLegalizerInfo.cpp
SRCS_MIN+= Target/Mips/MipsMCInstLower.cpp
SRCS_MIN+= Target/Mips/MipsMachineFunction.cpp
SRCS_MIN+= Target/Mips/MipsModuleISelDAGToDAG.cpp
+SRCS_MIN+= Target/Mips/MipsMulMulBugPass.cpp
SRCS_MIN+= Target/Mips/MipsOptimizePICCall.cpp
SRCS_MIN+= Target/Mips/MipsOs16.cpp
+SRCS_MIN+= Target/Mips/MipsPostLegalizerCombiner.cpp
SRCS_MIN+= Target/Mips/MipsPreLegalizerCombiner.cpp
SRCS_MIN+= Target/Mips/MipsRegisterBankInfo.cpp
SRCS_MIN+= Target/Mips/MipsRegisterInfo.cpp
@@ -1314,6 +1468,7 @@ SRCS_MIN+= Target/Mips/MipsSERegisterInfo.cpp
SRCS_MIN+= Target/Mips/MipsSubtarget.cpp
SRCS_MIN+= Target/Mips/MipsTargetMachine.cpp
SRCS_MIN+= Target/Mips/MipsTargetObjectFile.cpp
+SRCS_MIN+= Target/Mips/MipsTargetTransformInfo.cpp
SRCS_MIN+= Target/Mips/TargetInfo/MipsTargetInfo.cpp
.endif # MK_LLVM_TARGET_MIPS
.if ${MK_LLVM_TARGET_POWERPC} != "no"
@@ -1340,23 +1495,26 @@ SRCS_MIN+= Target/PowerPC/PPCBranchCoalescing.cpp
SRCS_MIN+= Target/PowerPC/PPCBranchSelector.cpp
SRCS_MIN+= Target/PowerPC/PPCCCState.cpp
SRCS_MIN+= Target/PowerPC/PPCCTRLoops.cpp
+SRCS_MIN+= Target/PowerPC/PPCCTRLoopsVerify.cpp
SRCS_MIN+= Target/PowerPC/PPCCallingConv.cpp
SRCS_MIN+= Target/PowerPC/PPCEarlyReturn.cpp
SRCS_MIN+= Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
SRCS_MIN+= Target/PowerPC/PPCExpandISEL.cpp
SRCS_MIN+= Target/PowerPC/PPCFastISel.cpp
SRCS_MIN+= Target/PowerPC/PPCFrameLowering.cpp
+SRCS_MIN+= Target/PowerPC/PPCGenScalarMASSEntries.cpp
SRCS_MIN+= Target/PowerPC/PPCHazardRecognizers.cpp
SRCS_MIN+= Target/PowerPC/PPCISelDAGToDAG.cpp
SRCS_MIN+= Target/PowerPC/PPCISelLowering.cpp
SRCS_MIN+= Target/PowerPC/PPCInstrInfo.cpp
SRCS_MIN+= Target/PowerPC/PPCLoopInstrFormPrep.cpp
SRCS_MIN+= Target/PowerPC/PPCLowerMASSVEntries.cpp
-SRCS_MIN+= Target/PowerPC/PPCMacroFusion.cpp
SRCS_MIN+= Target/PowerPC/PPCMCInstLower.cpp
SRCS_MIN+= Target/PowerPC/PPCMIPeephole.cpp
SRCS_MIN+= Target/PowerPC/PPCMachineFunctionInfo.cpp
SRCS_MIN+= Target/PowerPC/PPCMachineScheduler.cpp
+SRCS_MIN+= Target/PowerPC/PPCMacroFusion.cpp
+SRCS_MIN+= Target/PowerPC/PPCMergeStringPool.cpp
SRCS_MIN+= Target/PowerPC/PPCPreEmitPeephole.cpp
SRCS_MIN+= Target/PowerPC/PPCReduceCRLogicals.cpp
SRCS_MIN+= Target/PowerPC/PPCRegisterInfo.cpp
@@ -1374,36 +1532,50 @@ SRCS_MIN+= Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
.if ${MK_LLVM_TARGET_RISCV} != "no"
SRCS_MIN+= Target/RISCV/AsmParser/RISCVAsmParser.cpp
SRCS_MIN+= Target/RISCV/Disassembler/RISCVDisassembler.cpp
+SRCS_MIN+= Target/RISCV/GISel/RISCVCallLowering.cpp
+SRCS_MIN+= Target/RISCV/GISel/RISCVInstructionSelector.cpp
+SRCS_MIN+= Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+SRCS_MIN+= Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp
+SRCS_MIN+= Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
+SRCS_MIN+= Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
+SRCS_MIN+= Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
+SRCS_EXT+= Target/RISCV/MCA/RISCVCustomBehaviour.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
-SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCObjectFileInfo.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
+SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
SRCS_MIN+= Target/RISCV/RISCVAsmPrinter.cpp
-SRCS_MIN+= Target/RISCV/RISCVCallLowering.cpp
+SRCS_MIN+= Target/RISCV/RISCVCodeGenPrepare.cpp
+SRCS_MIN+= Target/RISCV/RISCVDeadRegisterDefinitions.cpp
SRCS_MIN+= Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp
SRCS_MIN+= Target/RISCV/RISCVExpandPseudoInsts.cpp
+SRCS_MIN+= Target/RISCV/RISCVFoldMasks.cpp
SRCS_MIN+= Target/RISCV/RISCVFrameLowering.cpp
SRCS_MIN+= Target/RISCV/RISCVGatherScatterLowering.cpp
-SRCS_MIN+= Target/RISCV/RISCVInsertVSETVLI.cpp
-SRCS_MIN+= Target/RISCV/RISCVInstrInfo.cpp
-SRCS_MIN+= Target/RISCV/RISCVInstructionSelector.cpp
SRCS_MIN+= Target/RISCV/RISCVISelDAGToDAG.cpp
SRCS_MIN+= Target/RISCV/RISCVISelLowering.cpp
-SRCS_MIN+= Target/RISCV/RISCVLegalizerInfo.cpp
-SRCS_MIN+= Target/RISCV/RISCVMCInstLower.cpp
+SRCS_MIN+= Target/RISCV/RISCVInsertReadWriteCSR.cpp
+SRCS_MIN+= Target/RISCV/RISCVInsertVSETVLI.cpp
+SRCS_MIN+= Target/RISCV/RISCVInsertWriteVXRM.cpp
+SRCS_MIN+= Target/RISCV/RISCVInstrInfo.cpp
SRCS_MIN+= Target/RISCV/RISCVMachineFunctionInfo.cpp
+SRCS_MIN+= Target/RISCV/RISCVMakeCompressible.cpp
SRCS_MIN+= Target/RISCV/RISCVMergeBaseOffset.cpp
-SRCS_MIN+= Target/RISCV/RISCVRegisterBankInfo.cpp
+SRCS_MIN+= Target/RISCV/RISCVMoveMerger.cpp
+SRCS_MIN+= Target/RISCV/RISCVOptWInstrs.cpp
+SRCS_MIN+= Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp
+SRCS_MIN+= Target/RISCV/RISCVPushPopOptimizer.cpp
+SRCS_MIN+= Target/RISCV/RISCVRVVInitUndef.cpp
+SRCS_MIN+= Target/RISCV/RISCVRedundantCopyElimination.cpp
SRCS_MIN+= Target/RISCV/RISCVRegisterInfo.cpp
-SRCS_MIN+= Target/RISCV/RISCVSExtWRemoval.cpp
SRCS_MIN+= Target/RISCV/RISCVSubtarget.cpp
SRCS_MIN+= Target/RISCV/RISCVTargetMachine.cpp
SRCS_MIN+= Target/RISCV/RISCVTargetObjectFile.cpp
@@ -1417,10 +1589,15 @@ SRCS_MIN+= Target/TargetMachineC.cpp
.if ${MK_LLVM_TARGET_X86} != "no"
SRCS_MIN+= Target/X86/AsmParser/X86AsmParser.cpp
SRCS_XDW+= Target/X86/Disassembler/X86Disassembler.cpp
+SRCS_MIN+= Target/X86/GISel/X86CallLowering.cpp
+SRCS_MIN+= Target/X86/GISel/X86InstructionSelector.cpp
+SRCS_MIN+= Target/X86/GISel/X86LegalizerInfo.cpp
+SRCS_MIN+= Target/X86/GISel/X86RegisterBankInfo.cpp
SRCS_EXT+= Target/X86/MCA/X86CustomBehaviour.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86AsmBackend.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
+SRCS_MIN+= Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86InstComments.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
@@ -1428,33 +1605,39 @@ SRCS_MIN+= Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
+SRCS_MIN+= Target/X86/MCTargetDesc/X86MnemonicTables.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86ShuffleDecode.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
SRCS_MIN+= Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
SRCS_MIN+= Target/X86/TargetInfo/X86TargetInfo.cpp
+SRCS_MIN+= Target/X86/X86ArgumentStackSlotRebase.cpp
SRCS_MIN+= Target/X86/X86AsmPrinter.cpp
SRCS_MIN+= Target/X86/X86AvoidStoreForwardingBlocks.cpp
SRCS_MIN+= Target/X86/X86AvoidTrailingCall.cpp
SRCS_MIN+= Target/X86/X86CallFrameOptimization.cpp
-SRCS_MIN+= Target/X86/X86CallLowering.cpp
SRCS_MIN+= Target/X86/X86CallingConv.cpp
SRCS_MIN+= Target/X86/X86CmovConversion.cpp
+SRCS_MIN+= Target/X86/X86CodeGenPassBuilder.cpp
+SRCS_MIN+= Target/X86/X86CompressEVEX.cpp
SRCS_MIN+= Target/X86/X86DiscriminateMemOps.cpp
SRCS_MIN+= Target/X86/X86DomainReassignment.cpp
SRCS_MIN+= Target/X86/X86DynAllocaExpander.cpp
-SRCS_MIN+= Target/X86/X86EvexToVex.cpp
SRCS_MIN+= Target/X86/X86ExpandPseudo.cpp
SRCS_MIN+= Target/X86/X86FastISel.cpp
+SRCS_MIN+= Target/X86/X86FastPreTileConfig.cpp
SRCS_MIN+= Target/X86/X86FastTileConfig.cpp
SRCS_MIN+= Target/X86/X86FixupBWInsts.cpp
+SRCS_MIN+= Target/X86/X86FixupInstTuning.cpp
SRCS_MIN+= Target/X86/X86FixupLEAs.cpp
SRCS_MIN+= Target/X86/X86FixupSetCC.cpp
+SRCS_MIN+= Target/X86/X86FixupVectorConstants.cpp
SRCS_MIN+= Target/X86/X86FlagsCopyLowering.cpp
SRCS_MIN+= Target/X86/X86FloatingPoint.cpp
SRCS_MIN+= Target/X86/X86FrameLowering.cpp
SRCS_MIN+= Target/X86/X86ISelDAGToDAG.cpp
SRCS_MIN+= Target/X86/X86ISelLowering.cpp
+SRCS_MIN+= Target/X86/X86ISelLoweringCall.cpp
SRCS_MIN+= Target/X86/X86IndirectBranchTracking.cpp
SRCS_MIN+= Target/X86/X86IndirectThunks.cpp
SRCS_MIN+= Target/X86/X86InsertPrefetch.cpp
@@ -1463,9 +1646,7 @@ SRCS_MIN+= Target/X86/X86InstCombineIntrinsic.cpp
SRCS_MIN+= Target/X86/X86InstrFMA3Info.cpp
SRCS_MIN+= Target/X86/X86InstrFoldTables.cpp
SRCS_MIN+= Target/X86/X86InstrInfo.cpp
-SRCS_MIN+= Target/X86/X86InstructionSelector.cpp
SRCS_MIN+= Target/X86/X86InterleavedAccess.cpp
-SRCS_MIN+= Target/X86/X86LegalizerInfo.cpp
SRCS_MIN+= Target/X86/X86LoadValueInjectionLoadHardening.cpp
SRCS_MIN+= Target/X86/X86LoadValueInjectionRetHardening.cpp
SRCS_MIN+= Target/X86/X86LowerAMXIntrinsics.cpp
@@ -1477,10 +1658,9 @@ SRCS_MIN+= Target/X86/X86MacroFusion.cpp
SRCS_MIN+= Target/X86/X86OptimizeLEAs.cpp
SRCS_MIN+= Target/X86/X86PadShortFunction.cpp
SRCS_MIN+= Target/X86/X86PartialReduction.cpp
-SRCS_MIN+= Target/X86/X86PreAMXConfig.cpp
SRCS_MIN+= Target/X86/X86PreTileConfig.cpp
-SRCS_MIN+= Target/X86/X86RegisterBankInfo.cpp
SRCS_MIN+= Target/X86/X86RegisterInfo.cpp
+SRCS_MIN+= Target/X86/X86ReturnThunks.cpp
SRCS_MIN+= Target/X86/X86SelectionDAGInfo.cpp
SRCS_MIN+= Target/X86/X86ShuffleDecodeConstantPool.cpp
SRCS_MIN+= Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp
@@ -1493,25 +1673,45 @@ SRCS_MIN+= Target/X86/X86TileConfig.cpp
SRCS_MIN+= Target/X86/X86VZeroUpper.cpp
SRCS_MIN+= Target/X86/X86WinEHState.cpp
.endif # MK_LLVM_TARGET_X86
+SRCS_MIN+= TargetParser/AArch64TargetParser.cpp
+SRCS_MIN+= TargetParser/ARMTargetParser.cpp
+SRCS_MIN+= TargetParser/ARMTargetParserCommon.cpp
+SRCS_MIN+= TargetParser/CSKYTargetParser.cpp
+SRCS_MIN+= TargetParser/Host.cpp
+SRCS_MIN+= TargetParser/LoongArchTargetParser.cpp
+SRCS_MIN+= TargetParser/RISCVTargetParser.cpp
+SRCS_MIN+= TargetParser/SubtargetFeature.cpp
+SRCS_MIN+= TargetParser/TargetParser.cpp
+SRCS_MIN+= TargetParser/Triple.cpp
+SRCS_MIN+= TargetParser/X86TargetParser.cpp
SRCS_MIW+= TextAPI/Architecture.cpp
SRCS_MIW+= TextAPI/ArchitectureSet.cpp
+SRCS_MIW+= TextAPI/BinaryReader/DylibReader.cpp
SRCS_MIW+= TextAPI/InterfaceFile.cpp
SRCS_MIW+= TextAPI/PackedVersion.cpp
SRCS_MIW+= TextAPI/Platform.cpp
+SRCS_MIW+= TextAPI/RecordVisitor.cpp
+SRCS_MIW+= TextAPI/Symbol.cpp
+SRCS_MIW+= TextAPI/SymbolSet.cpp
SRCS_MIW+= TextAPI/Target.cpp
+SRCS_MIW+= TextAPI/TextAPIError.cpp
SRCS_MIW+= TextAPI/TextStub.cpp
SRCS_MIW+= TextAPI/TextStubCommon.cpp
+SRCS_MIW+= TextAPI/TextStubV5.cpp
+SRCS_MIW+= TextAPI/Utils.cpp
SRCS_MIN+= ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
SRCS_MIW+= ToolDrivers/llvm-lib/LibDriver.cpp
SRCS_MIN+= Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
SRCS_MIN+= Transforms/AggressiveInstCombine/TruncInstCombine.cpp
SRCS_MIN+= Transforms/CFGuard/CFGuard.cpp
SRCS_MIN+= Transforms/Coroutines/CoroCleanup.cpp
+SRCS_MIN+= Transforms/Coroutines/CoroConditionalWrapper.cpp
SRCS_MIN+= Transforms/Coroutines/CoroEarly.cpp
SRCS_MIN+= Transforms/Coroutines/CoroElide.cpp
SRCS_MIN+= Transforms/Coroutines/CoroFrame.cpp
SRCS_MIN+= Transforms/Coroutines/CoroSplit.cpp
SRCS_MIN+= Transforms/Coroutines/Coroutines.cpp
+SRCS_MIN+= Transforms/HipStdPar/HipStdPar.cpp
SRCS_MIN+= Transforms/IPO/AlwaysInliner.cpp
SRCS_MIN+= Transforms/IPO/Annotation2Metadata.cpp
SRCS_MIN+= Transforms/IPO/ArgumentPromotion.cpp
@@ -1524,6 +1724,7 @@ SRCS_MIN+= Transforms/IPO/ConstantMerge.cpp
SRCS_MIN+= Transforms/IPO/CrossDSOCFI.cpp
SRCS_MIN+= Transforms/IPO/DeadArgumentElimination.cpp
SRCS_MIN+= Transforms/IPO/ElimAvailExtern.cpp
+SRCS_MIN+= Transforms/IPO/EmbedBitcodePass.cpp
SRCS_MIN+= Transforms/IPO/ExtractGV.cpp
SRCS_MIN+= Transforms/IPO/ForceFunctionAttrs.cpp
SRCS_MIN+= Transforms/IPO/FunctionAttrs.cpp
@@ -1536,17 +1737,15 @@ SRCS_MIN+= Transforms/IPO/HotColdSplitting.cpp
SRCS_EXT+= Transforms/IPO/IPO.cpp
SRCS_MIN+= Transforms/IPO/IROutliner.cpp
SRCS_MIN+= Transforms/IPO/InferFunctionAttrs.cpp
-SRCS_MIN+= Transforms/IPO/InlineSimple.cpp
SRCS_MIN+= Transforms/IPO/Inliner.cpp
SRCS_MIN+= Transforms/IPO/Internalize.cpp
SRCS_MIN+= Transforms/IPO/LoopExtractor.cpp
SRCS_MIN+= Transforms/IPO/LowerTypeTests.cpp
+SRCS_MIN+= Transforms/IPO/MemProfContextDisambiguation.cpp
SRCS_MIN+= Transforms/IPO/MergeFunctions.cpp
SRCS_MIN+= Transforms/IPO/ModuleInliner.cpp
SRCS_MIN+= Transforms/IPO/OpenMPOpt.cpp
SRCS_MIN+= Transforms/IPO/PartialInlining.cpp
-SRCS_MIN+= Transforms/IPO/PassManagerBuilder.cpp
-SRCS_MIN+= Transforms/IPO/PruneEH.cpp
SRCS_MIN+= Transforms/IPO/SCCP.cpp
SRCS_MIN+= Transforms/IPO/SampleContextTracker.cpp
SRCS_MIN+= Transforms/IPO/SampleProfile.cpp
@@ -1572,6 +1771,7 @@ SRCS_MIN+= Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
SRCS_MIN+= Transforms/InstCombine/InstCombineVectorOps.cpp
SRCS_MIN+= Transforms/InstCombine/InstructionCombining.cpp
SRCS_MIN+= Transforms/Instrumentation/AddressSanitizer.cpp
+SRCS_MIN+= Transforms/Instrumentation/BlockCoverageInference.cpp
SRCS_MIN+= Transforms/Instrumentation/BoundsChecking.cpp
SRCS_MIN+= Transforms/Instrumentation/CGProfile.cpp
SRCS_MIN+= Transforms/Instrumentation/ControlHeightReduction.cpp
@@ -1582,11 +1782,13 @@ SRCS_MIN+= Transforms/Instrumentation/IndirectCallPromotion.cpp
SRCS_MIN+= Transforms/Instrumentation/InstrOrderFile.cpp
SRCS_MIN+= Transforms/Instrumentation/InstrProfiling.cpp
SRCS_MIN+= Transforms/Instrumentation/Instrumentation.cpp
+SRCS_MIN+= Transforms/Instrumentation/KCFI.cpp
SRCS_MIN+= Transforms/Instrumentation/MemProfiler.cpp
SRCS_MIN+= Transforms/Instrumentation/MemorySanitizer.cpp
SRCS_MIN+= Transforms/Instrumentation/PGOInstrumentation.cpp
SRCS_MIN+= Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
SRCS_MIN+= Transforms/Instrumentation/PoisonChecking.cpp
+SRCS_MIN+= Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
SRCS_MIN+= Transforms/Instrumentation/SanitizerCoverage.cpp
SRCS_MIN+= Transforms/Instrumentation/ThreadSanitizer.cpp
SRCS_MIN+= Transforms/Instrumentation/ValueProfileCollector.cpp
@@ -1622,6 +1824,7 @@ SRCS_MIN+= Transforms/Scalar/IVUsersPrinter.cpp
SRCS_MIN+= Transforms/Scalar/IndVarSimplify.cpp
SRCS_MIN+= Transforms/Scalar/InductiveRangeCheckElimination.cpp
SRCS_MIN+= Transforms/Scalar/InferAddressSpaces.cpp
+SRCS_MIN+= Transforms/Scalar/InferAlignment.cpp
SRCS_MIN+= Transforms/Scalar/InstSimplifyPass.cpp
SRCS_MIN+= Transforms/Scalar/JumpThreading.cpp
SRCS_MIN+= Transforms/Scalar/LICM.cpp
@@ -1643,11 +1846,10 @@ SRCS_MIN+= Transforms/Scalar/LoopRotation.cpp
SRCS_MIN+= Transforms/Scalar/LoopSimplifyCFG.cpp
SRCS_MIN+= Transforms/Scalar/LoopSink.cpp
SRCS_MIN+= Transforms/Scalar/LoopStrengthReduce.cpp
-SRCS_MIN+= Transforms/Scalar/LoopUnrollPass.cpp
SRCS_MIN+= Transforms/Scalar/LoopUnrollAndJamPass.cpp
-SRCS_MIN+= Transforms/Scalar/LoopUnswitch.cpp
+SRCS_MIN+= Transforms/Scalar/LoopUnrollPass.cpp
SRCS_MIN+= Transforms/Scalar/LoopVersioningLICM.cpp
-SRCS_MIN+= Transforms/Scalar/LowerAtomic.cpp
+SRCS_MIN+= Transforms/Scalar/LowerAtomicPass.cpp
SRCS_MIN+= Transforms/Scalar/LowerConstantIntrinsics.cpp
SRCS_MIN+= Transforms/Scalar/LowerExpectIntrinsic.cpp
SRCS_MIN+= Transforms/Scalar/LowerGuardIntrinsic.cpp
@@ -1676,6 +1878,7 @@ SRCS_MIN+= Transforms/Scalar/Sink.cpp
SRCS_MIN+= Transforms/Scalar/SpeculativeExecution.cpp
SRCS_MIN+= Transforms/Scalar/StraightLineStrengthReduce.cpp
SRCS_MIN+= Transforms/Scalar/StructurizeCFG.cpp
+SRCS_MIN+= Transforms/Scalar/TLSVariableHoist.cpp
SRCS_MIN+= Transforms/Scalar/TailRecursionElimination.cpp
SRCS_MIN+= Transforms/Scalar/WarnMissedTransforms.cpp
SRCS_MIN+= Transforms/Utils/AMDGPUEmitPrintf.cpp
@@ -1695,7 +1898,9 @@ SRCS_MIN+= Transforms/Utils/CloneModule.cpp
SRCS_MIN+= Transforms/Utils/CodeExtractor.cpp
SRCS_MIN+= Transforms/Utils/CodeLayout.cpp
SRCS_MIN+= Transforms/Utils/CodeMoverUtils.cpp
+SRCS_MIN+= Transforms/Utils/CountVisits.cpp
SRCS_MIN+= Transforms/Utils/CtorUtils.cpp
+SRCS_MIN+= Transforms/Utils/DXILUpgrade.cpp
SRCS_MIN+= Transforms/Utils/Debugify.cpp
SRCS_MIN+= Transforms/Utils/DemoteRegToStack.cpp
SRCS_MIN+= Transforms/Utils/EntryExitInstrumenter.cpp
@@ -1715,21 +1920,29 @@ SRCS_MIN+= Transforms/Utils/IntegerDivision.cpp
SRCS_MIN+= Transforms/Utils/LCSSA.cpp
SRCS_MIN+= Transforms/Utils/LibCallsShrinkWrap.cpp
SRCS_MIN+= Transforms/Utils/Local.cpp
+SRCS_MIN+= Transforms/Utils/LoopConstrainer.cpp
SRCS_MIN+= Transforms/Utils/LoopPeel.cpp
-SRCS_MIN+= Transforms/Utils/LoopSimplify.cpp
SRCS_MIN+= Transforms/Utils/LoopRotationUtils.cpp
+SRCS_MIN+= Transforms/Utils/LoopSimplify.cpp
SRCS_MIN+= Transforms/Utils/LoopUnroll.cpp
SRCS_MIN+= Transforms/Utils/LoopUnrollAndJam.cpp
SRCS_MIN+= Transforms/Utils/LoopUnrollRuntime.cpp
SRCS_MIN+= Transforms/Utils/LoopUtils.cpp
SRCS_MIN+= Transforms/Utils/LoopVersioning.cpp
+SRCS_MIN+= Transforms/Utils/LowerAtomic.cpp
+SRCS_MIN+= Transforms/Utils/LowerGlobalDtors.cpp
+SRCS_MIN+= Transforms/Utils/LowerIFunc.cpp
SRCS_MIN+= Transforms/Utils/LowerInvoke.cpp
+SRCS_MIN+= Transforms/Utils/LowerMemIntrinsics.cpp
SRCS_MIN+= Transforms/Utils/LowerSwitch.cpp
SRCS_MIN+= Transforms/Utils/MatrixUtils.cpp
SRCS_MIN+= Transforms/Utils/Mem2Reg.cpp
-SRCS_MIN+= Transforms/Utils/MetaRenamer.cpp
SRCS_MIN+= Transforms/Utils/MemoryOpRemark.cpp
+SRCS_MIN+= Transforms/Utils/MemoryTaggingSupport.cpp
+SRCS_MIN+= Transforms/Utils/MetaRenamer.cpp
+SRCS_MIN+= Transforms/Utils/MisExpect.cpp
SRCS_MIN+= Transforms/Utils/ModuleUtils.cpp
+SRCS_MIN+= Transforms/Utils/MoveAutoInit.cpp
SRCS_MIN+= Transforms/Utils/NameAnonGlobals.cpp
SRCS_MIN+= Transforms/Utils/PredicateInfo.cpp
SRCS_MIN+= Transforms/Utils/PromoteMemoryToRegister.cpp
@@ -1737,10 +1950,10 @@ SRCS_MIN+= Transforms/Utils/RelLookupTableConverter.cpp
SRCS_MIN+= Transforms/Utils/SCCPSolver.cpp
SRCS_MIN+= Transforms/Utils/SSAUpdater.cpp
SRCS_MIN+= Transforms/Utils/SSAUpdaterBulk.cpp
-SRCS_MIN+= Transforms/Utils/SanitizerStats.cpp
-SRCS_MIN+= Transforms/Utils/ScalarEvolutionExpander.cpp
SRCS_MIN+= Transforms/Utils/SampleProfileInference.cpp
SRCS_MIN+= Transforms/Utils/SampleProfileLoaderBaseUtil.cpp
+SRCS_MIN+= Transforms/Utils/SanitizerStats.cpp
+SRCS_MIN+= Transforms/Utils/ScalarEvolutionExpander.cpp
SRCS_MIN+= Transforms/Utils/SimplifyCFG.cpp
SRCS_MIN+= Transforms/Utils/SimplifyIndVar.cpp
SRCS_MIN+= Transforms/Utils/SimplifyLibCalls.cpp
@@ -1759,12 +1972,14 @@ SRCS_MIN+= Transforms/Vectorize/LoopVectorizationLegality.cpp
SRCS_MIN+= Transforms/Vectorize/LoopVectorize.cpp
SRCS_MIN+= Transforms/Vectorize/SLPVectorizer.cpp
SRCS_MIN+= Transforms/Vectorize/VPlan.cpp
+SRCS_MIN+= Transforms/Vectorize/VPlanAnalysis.cpp
SRCS_MIN+= Transforms/Vectorize/VPlanHCFGBuilder.cpp
-SRCS_MIN+= Transforms/Vectorize/VPlanPredicator.cpp
+SRCS_MIN+= Transforms/Vectorize/VPlanRecipes.cpp
SRCS_MIN+= Transforms/Vectorize/VPlanTransforms.cpp
SRCS_MIN+= Transforms/Vectorize/VPlanVerifier.cpp
SRCS_MIN+= Transforms/Vectorize/VectorCombine.cpp
SRCS_EXT+= Transforms/Vectorize/Vectorize.cpp
+SRCS_MIN+= WindowsDriver/MSVCPaths.cpp
SRCS_EXT+= XRay/BlockIndexer.cpp
SRCS_EXT+= XRay/BlockVerifier.cpp
SRCS_EXT+= XRay/FDRRecordProducer.cpp
@@ -1804,9 +2019,18 @@ SRCS_ALL+= ${SRCS_XDL}
.if ${MK_CLANG_EXTRAS} != "no" || ${MK_LLDB} != "no" || !defined(TOOLS_PREFIX)
SRCS_ALL+= ${SRCS_XDW}
.endif
+.if ${MK_LLVM_COV} != "no"
+SRCS_ALL+= ${SRCS_COV}
+.endif
SRCS+= ${GENSRCS}
SRCS+= ${SRCS_ALL:O}
+llvm/CodeGen/GenVT.inc: ${LLVM_SRCS}/include/llvm/CodeGen/ValueTypes.td
+ ${LLVM_MIN_TBLGEN} -gen-vt \
+ -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
+ ${LLVM_SRCS}/include/llvm/CodeGen/ValueTypes.td
+TGHDRS+= llvm/CodeGen/GenVT.inc
+
llvm/Frontend/OpenMP/OMP.h.inc: ${LLVM_SRCS}/include/llvm/Frontend/OpenMP/OMP.td
${LLVM_TBLGEN} --gen-directive-decl \
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
@@ -1844,9 +2068,10 @@ llvm/IR/IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
TGHDRS+= llvm/IR/IntrinsicImpl.inc
.for arch in \
- AArch64/aarch64 AMDGPU/amdgcn ARM/arm BPF/bpf Hexagon/hexagon \
- Mips/mips NVPTX/nvvm PowerPC/ppc R600/r600 RISCV/riscv S390/s390 \
- VE/ve WebAssembly/wasm X86/x86 XCore/xcore
+ AArch64/aarch64 AMDGPU/amdgcn ARM/arm BPF/bpf DirectX/dx \
+ Hexagon/hexagon LoongArch/loongarch Mips/mips NVPTX/nvvm PowerPC/ppc \
+ R600/r600 RISCV/riscv S390/s390 VE/ve WebAssembly/wasm X86/x86 \
+ XCore/xcore
llvm/IR/Intrinsics${arch:H}.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
${LLVM_TBLGEN} -gen-intrinsic-enums -intrinsic-prefix=${arch:T} \
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
@@ -1854,6 +2079,12 @@ llvm/IR/Intrinsics${arch:H}.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
TGHDRS+= llvm/IR/Intrinsics${arch:H}.h
.endfor
+llvm/TargetParser/RISCVTargetParserDef.inc: ${LLVM_SRCS}/lib/Target/RISCV/RISCV.td
+ ${LLVM_TBLGEN} -gen-riscv-target-def \
+ -I ${LLVM_SRCS}/include -I ${LLVM_SRCS}/lib/Target/RISCV \
+ -d ${.TARGET}.d -o ${.TARGET} ${LLVM_SRCS}/lib/Target/RISCV/RISCV.td
+TGHDRS+= llvm/TargetParser/RISCVTargetParserDef.inc
+
llvm-lib/Options.inc: ${LLVM_SRCS}/lib/ToolDrivers/llvm-lib/Options.td
${LLVM_TBLGEN} -gen-opt-parser-defs \
-I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
@@ -1868,6 +2099,14 @@ llvm-dlltool/Options.inc: ${LLVM_SRCS}/lib/ToolDrivers/llvm-dlltool/Options.td
TGHDRS+= llvm-dlltool/Options.inc
CFLAGS.DlltoolDriver.cpp+= -I${.OBJDIR}/llvm-dlltool
+.if ${MK_CLANG_EXTRAS} != "no"
+COFFOptions.inc: ${LLVM_SRCS}/lib/ExecutionEngine/JITLink/COFFOptions.td
+ ${LLVM_TBLGEN} -gen-opt-parser-defs \
+ -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \
+ ${LLVM_SRCS}/lib/ExecutionEngine/JITLink/COFFOptions.td
+TGHDRS+= COFFOptions.inc
+.endif
+
beforebuild:
# 20170724 remove stale Options.inc file, of which there are two different
# versions after upstream r308421, one for llvm-lib, one for llvm-dlltool
@@ -1888,30 +2127,38 @@ beforebuild:
AsmWriter1/-gen-asm-writer,-asmwriternum=1 \
CallingConv/-gen-callingconv \
CodeEmitter/-gen-emitter \
+ CompressEVEXTables/-gen-x86-compress-evex-tables \
CompressInstEmitter/-gen-compress-inst-emitter \
DAGISel/-gen-dag-isel \
DisassemblerTables/-gen-disassembler \
- EVEX2VEXTables/-gen-x86-EVEX2VEX-tables \
FastISel/-gen-fast-isel \
+ FoldTables/-gen-x86-fold-tables,-asmwriternum=1 \
GlobalISel/-gen-global-isel \
- InstrInfo/-gen-instr-info \
+ InstrInfo/-gen-instr-info${arch:MX86/X86:C/X86\/X86/,-instr-info-expand-mi-operand-info=0/} \
MCCodeEmitter/-gen-emitter \
MCPseudoLowering/-gen-pseudo-lowering \
- O0PreLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}O0PreLegalizerCombinerHelper \
- PostLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PostLegalizerCombinerHelper \
- PostLegalizeGILowering/-gen-global-isel-combiner,-combiners=${arch:H}PostLegalizerLoweringHelper \
- PreLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PreLegalizerCombinerHelper \
+ MacroFusion/-gen-macro-fusion-pred \
+ MnemonicTables/-gen-x86-mnemonic-tables,-asmwriternum=1 \
+ O0PreLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}O0PreLegalizerCombiner \
+ PostLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PostLegalizerCombiner \
+ PostLegalizeGILowering/-gen-global-isel-combiner,-combiners=${arch:H}PostLegalizerLowering \
+ PreLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PreLegalizerCombiner \
RegisterBank/-gen-register-bank \
RegisterInfo/-gen-register-info \
SearchableTables/-gen-searchable-tables \
SubtargetInfo/-gen-subtarget \
SystemOperands/-gen-searchable-tables \
SystemRegister/-gen-searchable-tables
-${arch:T}Gen${hdr:H}.inc: ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
+. if "${arch:T}" == "RISCV" && "${hdr:T:C/(-gen-global-isel).*/\1/}" == "-gen-global-isel"
+tdfile_${arch:T}_${hdr:H}= ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}GISel.td
+. else
+tdfile_${arch:T}_${hdr:H}= ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
+.endif
+${arch:T}Gen${hdr:H}.inc: ${tdfile_${arch:T}_${hdr:H}}
${LLVM_TBLGEN} ${hdr:T:C/,/ /g} \
-I ${LLVM_SRCS}/include -I ${LLVM_SRCS}/lib/Target/${arch:H} \
-d ${.TARGET}.d -o ${.TARGET} \
- ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
+ ${tdfile_${arch:T}_${hdr:H}}
. endfor
.endfor
.if ${MK_LLVM_TARGET_AARCH64} != "no"
@@ -1957,8 +2204,10 @@ TGHDRS+= BPFGenAsmWriter.inc
TGHDRS+= BPFGenCallingConv.inc
TGHDRS+= BPFGenDAGISel.inc
TGHDRS+= BPFGenDisassemblerTables.inc
+TGHDRS+= BPFGenGlobalISel.inc
TGHDRS+= BPFGenInstrInfo.inc
TGHDRS+= BPFGenMCCodeEmitter.inc
+TGHDRS+= BPFGenRegisterBank.inc
TGHDRS+= BPFGenRegisterInfo.inc
TGHDRS+= BPFGenSubtargetInfo.inc
.endif # MK_LLVM_TARGET_BPF
@@ -1973,6 +2222,7 @@ TGHDRS+= MipsGenGlobalISel.inc
TGHDRS+= MipsGenInstrInfo.inc
TGHDRS+= MipsGenMCCodeEmitter.inc
TGHDRS+= MipsGenMCPseudoLowering.inc
+TGHDRS+= MipsGenPostLegalizeGICombiner.inc
TGHDRS+= MipsGenRegisterBank.inc
TGHDRS+= MipsGenRegisterInfo.inc
TGHDRS+= MipsGenSubtargetInfo.inc
@@ -1997,12 +2247,16 @@ TGHDRS+= RISCVGenAsmWriter.inc
TGHDRS+= RISCVGenCallingConv.inc
TGHDRS+= RISCVGenCompressInstEmitter.inc
TGHDRS+= RISCVGenDAGISel.inc
-TGHDRS+= RISCVGenDisassemblerTables.inc
TGHDRS+= RISCVGenDAGISel.inc
+TGHDRS+= RISCVGenDisassemblerTables.inc
TGHDRS+= RISCVGenGlobalISel.inc
TGHDRS+= RISCVGenInstrInfo.inc
TGHDRS+= RISCVGenMCCodeEmitter.inc
TGHDRS+= RISCVGenMCPseudoLowering.inc
+TGHDRS+= RISCVGenMacroFusion.inc
+TGHDRS+= RISCVGenO0PreLegalizeGICombiner.inc
+TGHDRS+= RISCVGenPostLegalizeGICombiner.inc
+TGHDRS+= RISCVGenPreLegalizeGICombiner.inc
TGHDRS+= RISCVGenRegisterBank.inc
TGHDRS+= RISCVGenRegisterInfo.inc
TGHDRS+= RISCVGenSearchableTables.inc
@@ -2014,12 +2268,14 @@ TGHDRS+= X86GenAsmMatcher.inc
TGHDRS+= X86GenAsmWriter.inc
TGHDRS+= X86GenAsmWriter1.inc
TGHDRS+= X86GenCallingConv.inc
+TGHDRS+= X86GenCompressEVEXTables.inc
TGHDRS+= X86GenDAGISel.inc
TGHDRS+= X86GenDisassemblerTables.inc
-TGHDRS+= X86GenEVEX2VEXTables.inc
TGHDRS+= X86GenFastISel.inc
+TGHDRS+= X86GenFoldTables.inc
TGHDRS+= X86GenGlobalISel.inc
TGHDRS+= X86GenInstrInfo.inc
+TGHDRS+= X86GenMnemonicTables.inc
TGHDRS+= X86GenRegisterBank.inc
TGHDRS+= X86GenRegisterInfo.inc
TGHDRS+= X86GenSubtargetInfo.inc
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-24 00:24:30 +0000