1 files changed, 79 insertions, 28 deletions
diff --git a/lib/libpmc/pmc.3 b/lib/libpmc/pmc.3
index 4bf2907db129..9a5b599759ff 100644
--- a/lib/libpmc/pmc.3
+++ b/lib/libpmc/pmc.3
@@ -21,9 +21,7 @@
 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 .\" SUCH DAMAGE.
 .\"
-.\" $FreeBSD$
-.\"
-.Dd August 10, 2021
+.Dd June 23, 2023
 .Dt PMC 3
 .Os
 .Sh NAME
@@ -131,13 +129,47 @@ The CPUs known to the PMC library are named by the
 enumeration.
 Supported CPUs include:
 .Pp
-.Bl -tag -width "Li PMC_CPU_INTEL_CORE2" -compact
-.It Li PMC_CPU_AMD_K7
-.Tn "AMD Athlon"
-CPUs.
+.Bl -tag -width "Li PMC_CPU_ARMV7_CORTEX_A15" -compact
 .It Li PMC_CPU_AMD_K8
 .Tn "AMD Athlon64"
 CPUs.
+.It Li PMC_CPU_ARMV7_CORTEX_A5
+.Tn ARMv7
+.Tn Cortex A5
+CPUs.
+.It Li PMC_CPU_ARMV7_CORTEX_A7
+.Tn ARMv7
+.Tn Cortex A7
+CPUs.
+.It Li PMC_CPU_ARMV7_CORTEX_A8
+.Tn ARMv7
+.Tn Cortex A8
+CPUs.
+.It Li PMC_CPU_ARMV7_CORTEX_A9
+.Tn ARMv7
+.Tn Cortex A9
+CPUs.
+.It Li PMC_CPU_ARMV7_CORTEX_A15
+.Tn ARMv7 Cortex A15
+CPUs.
+.It Li PMC_CPU_ARMV7_CORTEX_A17
+.Tn ARMv7
+.Tn Cortex A17
+CPUs.
+.It Li PMC_CPU_ARMV8_CORTEX_A53
+ARMv8
+.Tn Cortex A53
+CPUs.
+.It Li PMC_CPU_ARMV8_CORTEX_A57
+ARMv8
+.Tn Cortex A57
+CPUs.
+.It Li PMC_CPU_ARMV8_CORTEX_A76
+ARMv8
+.Tn Cortex A76
+CPUs.
+.It Li GENERIC
+Generic
 .It Li PMC_CPU_INTEL_ATOM
 .Tn Intel
 .Tn Atom
@@ -161,14 +193,29 @@ and
 CPUs, and other CPUs conforming to version 2 of the
 .Tn Intel
 performance measurement architecture.
+.It Li PMC_CPU_PPC_7450
+.Tn PowerPC
+MPC7450 CPUs.
+.It Li PMC_CPU_PPC_970
+.Tn IBM
+.Tn PowerPC
+970 CPUs.
+.It Li PMC_CPU_PPC_E500
+.Tn PowerPC
+e500 Core CPUs.
+.It Li PMC_CPU_PPC_POWER8
+.Tn IBM
+.Tn POWER8 and
+.Tn POWER9
+CPUs.
 .El
 .Ss Supported PMCs
-PMC supported by this library are named by the
+PMCs supported by this library are named by the
 .Vt enum pmc_class
 enumeration.
-Supported PMC kinds include:
+Supported PMC classes include:
 .Pp
-.Bl -tag -width "Li PMC_CLASS_IAF" -compact
+.Bl -tag -width "Li PMC_CLASS_POWER8" -compact
 .It Li PMC_CLASS_IAF
 Fixed function hardware counters presents in CPUs conforming to the
 .Tn Intel
@@ -177,16 +224,24 @@ performance measurement architecture version 2 and later.
 Programmable hardware counters present in CPUs conforming to the
 .Tn Intel
 performance measurement architecture version 1 and later.
-.It Li PMC_CLASS_K7
-Programmable hardware counters present in
-.Tn "AMD Athlon"
-CPUs.
 .It Li PMC_CLASS_K8
 Programmable hardware counters present in
 .Tn "AMD Athlon64"
 CPUs.
 .It Li PMC_CLASS_TSC
 The timestamp counter on i386 and amd64 architecture CPUs.
+.It Li PMC_CLASS_ARMV7
+.Tn ARMv7
+.It Li PMC_CLASS_ARMV8
+.Tn ARMv8
+.It Li PMC_CLASS_PPC970
+.Tn IBM
+.Tn PowerPC
+970 class.
+.It Li PMC_CLASS_POWER8
+.Tn IBM
+.Tn POWER8
+class.
 .It Li PMC_CLASS_SOFT
 Software events.
 .El
@@ -200,6 +255,8 @@ Supported capabilities include:
 .Bl -tag -width "Li PMC_CAP_INTERRUPT" -compact
 .It Li PMC_CAP_CASCADE
 The ability to cascade counters.
+.It Li PMC_CAP_DOMWIDE
+Separate counters tied to each NUMA domain.
 .It Li PMC_CAP_EDGE
 The ability to count negated to asserted transitions of the hardware
 conditions being probed for.
@@ -218,6 +275,8 @@ The ability to read from performance counters.
 .It Li PMC_CAP_SYSTEM
 The ability to restrict counting of hardware events to when the CPU is
 running privileged code.
+.It Li PMC_CAP_SYSWIDE
+A single counter aggregating events for the whole system.
 .It Li PMC_CAP_THRESHOLD
 The ability to ignore simultaneous hardware events below a
 programmable threshold.
@@ -357,10 +416,10 @@ driver will send a PMC owning process a
 signal if:
 .Bl -bullet
 .It
-If any process-mode PMC allocated by it loses all its
+any process-mode PMC allocated by it loses all its
 target processes.
 .It
-If the driver encounters an error when writing log data to a
+the driver encounters an error when writing log data to a
 configured log file.
 This error may be retrieved by a subsequent call to
 .Fn pmc_flush_logfile .
@@ -405,7 +464,7 @@ and process scope PMCs are detached from their targets using
 function
 .Fn pmc_detach .
 .It
-Before the process exits, its may release its PMCs using function
+Before the process exits, it may release its PMCs using function
 .Fn pmc_release .
 Any configured log file may be closed using function
 .Fn pmc_configure_logfile .
@@ -432,8 +491,7 @@ following manual pages:
 .It Em "PMC Class"      Ta Em "Manual Page"
 .It Li PMC_CLASS_IAF    Ta Xr pmc.iaf 3
 .It Li PMC_CLASS_IAP    Ta Xr pmc.atom 3 , Xr pmc.core 3 , Xr pmc.core2 3
-.It Li PMC_CLASS_K7     Ta Xr pmc.k7 3
-.It Li PMC_CLASS_K8     Ta Xr pmc.k8 3
+.It Li PMC_CLASS_K8     Ta Xr pmc.amd 3
 .It Li PMC_CLASS_TSC    Ta Xr pmc.tsc 3
 .El
 .Ss Event Name Aliases
@@ -474,12 +532,9 @@ In order to ease forward compatibility with future versions of the
 driver, applications are urged to dynamically link with the
 .Nm pmc
 library.
-.Pp
-The
-.Nm pmc
-API is
-.Ud
+Doing otherwise is unsupported.
 .Sh SEE ALSO
+.Xr pmc.amd 3 ,
 .Xr pmc.atom 3 ,
 .Xr pmc.core 3 ,
 .Xr pmc.core2 3 ,
@@ -489,10 +544,6 @@ API is
 .Xr pmc.iaf 3 ,
 .Xr pmc.ivybridge 3 ,
 .Xr pmc.ivybridgexeon 3 ,
-.Xr pmc.k7 3 ,
-.Xr pmc.k8 3 ,
-.Xr pmc.mips24k 3 ,
-.Xr pmc.octeon 3 ,
 .Xr pmc.sandybridge 3 ,
 .Xr pmc.sandybridgeuc 3 ,
 .Xr pmc.sandybridgexeon 3 ,