diff options
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp index 26fc093d15a7..f14eaacbf071 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -1022,7 +1022,7 @@ bool HexagonInstrInfo::expandPostRAPseudo(MachineInstr &MI) const { return true; }; - auto UseAligned = [&] (const MachineInstr &MI, unsigned NeedAlign) { + auto UseAligned = [&](const MachineInstr &MI, Align NeedAlign) { if (MI.memoperands().empty()) return false; return all_of(MI.memoperands(), [NeedAlign](const MachineMemOperand *MMO) { @@ -1086,7 +1086,7 @@ bool HexagonInstrInfo::expandPostRAPseudo(MachineInstr &MI) const { const MachineOperand &BaseOp = MI.getOperand(1); assert(BaseOp.getSubReg() == 0); int Offset = MI.getOperand(2).getImm(); - unsigned NeedAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); + Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); unsigned NewOpc = UseAligned(MI, NeedAlign) ? Hexagon::V6_vL32b_ai : Hexagon::V6_vL32Ub_ai; BuildMI(MBB, MI, DL, get(NewOpc), DstReg) @@ -1102,7 +1102,7 @@ bool HexagonInstrInfo::expandPostRAPseudo(MachineInstr &MI) const { assert(BaseOp.getSubReg() == 0); int Offset = MI.getOperand(2).getImm(); unsigned VecOffset = HRI.getSpillSize(Hexagon::HvxVRRegClass); - unsigned NeedAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); + Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); unsigned NewOpc = UseAligned(MI, NeedAlign) ? Hexagon::V6_vL32b_ai : Hexagon::V6_vL32Ub_ai; BuildMI(MBB, MI, DL, get(NewOpc), @@ -1124,7 +1124,7 @@ bool HexagonInstrInfo::expandPostRAPseudo(MachineInstr &MI) const { const MachineOperand &BaseOp = MI.getOperand(0); assert(BaseOp.getSubReg() == 0); int Offset = MI.getOperand(1).getImm(); - unsigned NeedAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); + Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); unsigned NewOpc = UseAligned(MI, NeedAlign) ? Hexagon::V6_vS32b_ai : Hexagon::V6_vS32Ub_ai; BuildMI(MBB, MI, DL, get(NewOpc)) @@ -1141,7 +1141,7 @@ bool HexagonInstrInfo::expandPostRAPseudo(MachineInstr &MI) const { assert(BaseOp.getSubReg() == 0); int Offset = MI.getOperand(1).getImm(); unsigned VecOffset = HRI.getSpillSize(Hexagon::HvxVRRegClass); - unsigned NeedAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass); + Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); unsigned NewOpc = UseAligned(MI, NeedAlign) ? Hexagon::V6_vS32b_ai : Hexagon::V6_vS32Ub_ai; BuildMI(MBB, MI, DL, get(NewOpc)) |