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-rw-r--r--llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h
index 27a47220570a..6a709e566f86 100644
--- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h
+++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h
@@ -56,6 +56,9 @@ class HexagonPacketizerList : public VLIWPacketizerList {
// Set to true if the packet contains an instruction that stalls with an
// instruction from the previous packet.
bool PacketStalls = false;
+ // Set to the number of cycles of stall a given instruction will incur
+ // because of dependence on instruction in previous packet.
+ unsigned int PacketStallCycles = 0;
// Set to true if the packet has a duplex pair of sub-instructions.
bool PacketHasDuplex = false;
@@ -156,7 +159,7 @@ protected:
bool hasRegMaskDependence(const MachineInstr &I, const MachineInstr &J);
bool hasDualStoreDependence(const MachineInstr &I, const MachineInstr &J);
bool producesStall(const MachineInstr &MI);
- bool isPureSlot0InsnWithNoSlot1Store(const MachineInstr &MI);
+ unsigned int calcStall(const MachineInstr &MI);
};
} // end namespace llvm