diff options
Diffstat (limited to 'llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp index 5154a0a1e46c..e1c95f1cc920 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp @@ -637,9 +637,9 @@ bool HexagonMCInstrInfo::isOrderedDuplexPair(MCInstrInfo const &MCII, return false; } - if (STI.getCPU().equals_lower("hexagonv5") || - STI.getCPU().equals_lower("hexagonv55") || - STI.getCPU().equals_lower("hexagonv60")) { + if (STI.getCPU().equals_insensitive("hexagonv5") || + STI.getCPU().equals_insensitive("hexagonv55") || + STI.getCPU().equals_insensitive("hexagonv60")) { // If a store appears, it must be in slot 0 (MIa) 1st, and then slot 1 (MIb); // therefore, not duplexable if slot 1 is a store, and slot 0 is not. if ((MIbG == HexagonII::HSIG_S1) || (MIbG == HexagonII::HSIG_S2)) { |