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-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp47
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h13
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp33
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp22
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h2
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp4
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h4
8 files changed, 102 insertions, 25 deletions
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
index fac363cae713..f3f3f096da33 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
@@ -23,18 +23,19 @@ using namespace llvm;
#include "SystemZGenAsmWriter.inc"
-void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp,
- unsigned Index, raw_ostream &O) {
+void SystemZInstPrinter::printAddress(const MCAsmInfo *MAI, unsigned Base,
+ int64_t Disp, unsigned Index,
+ raw_ostream &O) {
O << Disp;
if (Base || Index) {
O << '(';
if (Index) {
- O << '%' << getRegisterName(Index);
+ printFormattedRegName(MAI, Index, O);
if (Base)
O << ',';
}
if (Base)
- O << '%' << getRegisterName(Base);
+ printFormattedRegName(MAI, Base, O);
O << ')';
}
}
@@ -45,7 +46,7 @@ void SystemZInstPrinter::printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
if (!MO.getReg())
O << '0';
else
- O << '%' << getRegisterName(MO.getReg());
+ printFormattedRegName(MAI, MO.getReg(), O);
}
else if (MO.isImm())
O << MO.getImm();
@@ -55,6 +56,17 @@ void SystemZInstPrinter::printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
llvm_unreachable("Invalid operand");
}
+void SystemZInstPrinter::printFormattedRegName(const MCAsmInfo *MAI,
+ unsigned RegNo, raw_ostream &O) {
+ const char *RegName = getRegisterName(RegNo);
+ if (MAI->getAssemblerDialect() == AD_HLASM) {
+ // Skip register prefix so that only register number is left
+ assert(isalpha(RegName[0]) && isdigit(RegName[1]));
+ O << (RegName + 1);
+ } else
+ O << '%' << RegName;
+}
+
void SystemZInstPrinter::printInst(const MCInst *MI, uint64_t Address,
StringRef Annot, const MCSubtargetInfo &STI,
raw_ostream &O) {
@@ -62,10 +74,6 @@ void SystemZInstPrinter::printInst(const MCInst *MI, uint64_t Address,
printAnnotation(O, Annot);
}
-void SystemZInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << '%' << getRegisterName(RegNo);
-}
-
template <unsigned N>
static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
int64_t Value = MI->getOperand(OpNum).getImm();
@@ -186,13 +194,13 @@ void SystemZInstPrinter::printOperand(const MCInst *MI, int OpNum,
void SystemZInstPrinter::printBDAddrOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
- printAddress(MI->getOperand(OpNum).getReg(),
+ printAddress(&MAI, MI->getOperand(OpNum).getReg(),
MI->getOperand(OpNum + 1).getImm(), 0, O);
}
void SystemZInstPrinter::printBDXAddrOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
- printAddress(MI->getOperand(OpNum).getReg(),
+ printAddress(&MAI, MI->getOperand(OpNum).getReg(),
MI->getOperand(OpNum + 1).getImm(),
MI->getOperand(OpNum + 2).getReg(), O);
}
@@ -203,8 +211,10 @@ void SystemZInstPrinter::printBDLAddrOperand(const MCInst *MI, int OpNum,
uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
uint64_t Length = MI->getOperand(OpNum + 2).getImm();
O << Disp << '(' << Length;
- if (Base)
- O << ",%" << getRegisterName(Base);
+ if (Base) {
+ O << ",";
+ printRegName(O, Base);
+ }
O << ')';
}
@@ -213,15 +223,18 @@ void SystemZInstPrinter::printBDRAddrOperand(const MCInst *MI, int OpNum,
unsigned Base = MI->getOperand(OpNum).getReg();
uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
unsigned Length = MI->getOperand(OpNum + 2).getReg();
- O << Disp << "(%" << getRegisterName(Length);
- if (Base)
- O << ",%" << getRegisterName(Base);
+ O << Disp << "(";
+ printRegName(O, Length);
+ if (Base) {
+ O << ",";
+ printRegName(O, Base);
+ }
O << ')';
}
void SystemZInstPrinter::printBDVAddrOperand(const MCInst *MI, int OpNum,
raw_ostream &O) {
- printAddress(MI->getOperand(OpNum).getReg(),
+ printAddress(&MAI, MI->getOperand(OpNum).getReg(),
MI->getOperand(OpNum + 1).getImm(),
MI->getOperand(OpNum + 2).getReg(), O);
}
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
index 0db7279a06c1..0a57ca0082e6 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
@@ -13,6 +13,7 @@
#ifndef LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZINSTPRINTER_H
#define LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZINSTPRINTER_H
+#include "SystemZMCAsmInfo.h"
#include "llvm/MC/MCInstPrinter.h"
#include <cstdint>
@@ -32,15 +33,21 @@ public:
static const char *getRegisterName(unsigned RegNo);
// Print an address with the given base, displacement and index.
- static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
- raw_ostream &O);
+ static void printAddress(const MCAsmInfo *MAI, unsigned Base, int64_t Disp,
+ unsigned Index, raw_ostream &O);
// Print the given operand.
static void printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
raw_ostream &O);
+ static void printFormattedRegName(const MCAsmInfo *MAI, unsigned RegNo,
+ raw_ostream &O);
+
// Override MCInstPrinter.
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ inline void printRegName(raw_ostream &O, unsigned RegNo) const override {
+ printFormattedRegName(&MAI, RegNo, O);
+ }
+
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
index 5f276f793578..134c85e822be 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
@@ -8,6 +8,7 @@
#include "MCTargetDesc/SystemZMCFixups.h"
#include "MCTargetDesc/SystemZMCTargetDesc.h"
+#include "llvm/ADT/StringSwitch.h"
#include "llvm/MC/MCAsmBackend.h"
#include "llvm/MC/MCELFObjectWriter.h"
#include "llvm/MC/MCFixupKindInfo.h"
@@ -49,7 +50,10 @@ public:
unsigned getNumFixupKinds() const override {
return SystemZ::NumTargetFixupKinds;
}
+ Optional<MCFixupKind> getFixupKind(StringRef Name) const override;
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
+ bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
+ const MCValue &Target) override;
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved,
@@ -67,6 +71,22 @@ public:
};
} // end anonymous namespace
+Optional<MCFixupKind> SystemZMCAsmBackend::getFixupKind(StringRef Name) const {
+ unsigned Type = llvm::StringSwitch<unsigned>(Name)
+#define ELF_RELOC(X, Y) .Case(#X, Y)
+#include "llvm/BinaryFormat/ELFRelocs/SystemZ.def"
+#undef ELF_RELOC
+ .Case("BFD_RELOC_NONE", ELF::R_390_NONE)
+ .Case("BFD_RELOC_8", ELF::R_390_8)
+ .Case("BFD_RELOC_16", ELF::R_390_16)
+ .Case("BFD_RELOC_32", ELF::R_390_32)
+ .Case("BFD_RELOC_64", ELF::R_390_64)
+ .Default(-1u);
+ if (Type != -1u)
+ return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
+ return None;
+}
+
const MCFixupKindInfo &
SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = {
@@ -77,6 +97,11 @@ SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
{ "FK_390_TLS_CALL", 0, 0, 0 }
};
+ // Fixup kinds from .reloc directive are like R_390_NONE. They
+ // do not require any extra processing.
+ if (Kind >= FirstLiteralRelocationKind)
+ return MCAsmBackend::getFixupKindInfo(FK_NONE);
+
if (Kind < FirstTargetFixupKind)
return MCAsmBackend::getFixupKindInfo(Kind);
@@ -85,6 +110,12 @@ SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
return Infos[Kind - FirstTargetFixupKind];
}
+bool SystemZMCAsmBackend::shouldForceRelocation(const MCAssembler &,
+ const MCFixup &Fixup,
+ const MCValue &) {
+ return Fixup.getKind() >= FirstLiteralRelocationKind;
+}
+
void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
const MCFixup &Fixup,
const MCValue &Target,
@@ -92,6 +123,8 @@ void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
bool IsResolved,
const MCSubtargetInfo *STI) const {
MCFixupKind Kind = Fixup.getKind();
+ if (Kind >= FirstLiteralRelocationKind)
+ return;
unsigned Offset = Fixup.getOffset();
unsigned BitSize = getFixupKindInfo(Kind).TargetSize;
unsigned Size = (BitSize + 7) / 8;
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
index 76df8cf0f3b2..fa4864299586 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
@@ -17,12 +17,32 @@ SystemZMCAsmInfo::SystemZMCAsmInfo(const Triple &TT) {
CalleeSaveStackSlotSize = 8;
IsLittleEndian = false;
+ AssemblerDialect = TT.isOSzOS() ? AD_HLASM : AD_ATT;
+
MaxInstLength = 6;
- CommentString = "#";
+ CommentString = AssemblerDialect == AD_HLASM ? "*" : "#";
+ RestrictCommentStringToStartOfStatement = (AssemblerDialect == AD_HLASM);
+ AllowAdditionalComments = (AssemblerDialect == AD_ATT);
+ AllowAtAtStartOfIdentifier = (AssemblerDialect == AD_HLASM);
+ AllowDollarAtStartOfIdentifier = (AssemblerDialect == AD_HLASM);
+ AllowHashAtStartOfIdentifier = (AssemblerDialect == AD_HLASM);
+ DotIsPC = (AssemblerDialect == AD_ATT);
+ StarIsPC = (AssemblerDialect == AD_HLASM);
+ EmitGNUAsmStartIndentationMarker = (AssemblerDialect == AD_ATT);
+ AllowAtInName = (AssemblerDialect == AD_HLASM);
+ EmitLabelsInUpperCase = (AssemblerDialect == AD_HLASM);
+
ZeroDirective = "\t.space\t";
Data64bitsDirective = "\t.quad\t";
UsesELFSectionDirectiveForBSS = true;
SupportsDebugInformation = true;
ExceptionsType = ExceptionHandling::DwarfCFI;
}
+
+bool SystemZMCAsmInfo::isAcceptableChar(char C) const {
+ if (AssemblerDialect == AD_ATT)
+ return MCAsmInfo::isAcceptableChar(C);
+
+ return MCAsmInfo::isAcceptableChar(C) || C == '#';
+}
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
index b8818a65f9e3..389575d14679 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
@@ -14,10 +14,12 @@
namespace llvm {
class Triple;
+enum SystemZAsmDialect { AD_ATT = 0, AD_HLASM = 1 };
class SystemZMCAsmInfo : public MCAsmInfoELF {
public:
explicit SystemZMCAsmInfo(const Triple &TT);
+ bool isAcceptableChar(char C) const override;
};
} // end namespace llvm
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp
index 49b6fc490336..0b3e7b15df13 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp
@@ -117,8 +117,10 @@ unsigned SystemZObjectWriter::getRelocType(MCContext &Ctx,
const MCValue &Target,
const MCFixup &Fixup,
bool IsPCRel) const {
- MCSymbolRefExpr::VariantKind Modifier = Target.getAccessVariant();
unsigned Kind = Fixup.getKind();
+ if (Kind >= FirstLiteralRelocationKind)
+ return Kind - FirstLiteralRelocationKind;
+ MCSymbolRefExpr::VariantKind Modifier = Target.getAccessVariant();
switch (Modifier) {
case MCSymbolRefExpr::VK_None:
if (IsPCRel)
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
index 5c191d17ebc5..2a53dda84144 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
@@ -152,7 +152,7 @@ static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(
nullptr, MRI.getDwarfRegNum(SystemZ::R15D, true),
- SystemZMC::CFAOffsetFromInitialSP);
+ SystemZMC::ELFCFAOffsetFromInitialSP);
MAI->addInitialFrameState(Inst);
return MAI;
}
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
index 8f720c5abb34..899fec6c3328 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
@@ -32,10 +32,10 @@ class raw_ostream;
namespace SystemZMC {
// How many bytes are in the ABI-defined, caller-allocated part of
// a stack frame.
-const int64_t CallFrameSize = 160;
+const int64_t ELFCallFrameSize = 160;
// The offset of the DWARF CFA from the incoming stack pointer.
-const int64_t CFAOffsetFromInitialSP = CallFrameSize;
+const int64_t ELFCFAOffsetFromInitialSP = ELFCallFrameSize;
// Maps of asm register numbers to LLVM register numbers, with 0 indicating
// an invalid register. In principle we could use 32-bit and 64-bit register
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-25 10:52:52 +0000