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-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td122
1 files changed, 87 insertions, 35 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
index 2f5a64a87a59..15748067f123 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
@@ -26,10 +26,6 @@ def HasSIMD128 :
Predicate<"Subtarget->hasSIMD128()">,
AssemblerPredicate<(all_of FeatureSIMD128), "simd128">;
-def HasUnimplementedSIMD128 :
- Predicate<"Subtarget->hasUnimplementedSIMD128()">,
- AssemblerPredicate<(all_of FeatureUnimplementedSIMD128), "unimplemented-simd128">;
-
def HasAtomics :
Predicate<"Subtarget->hasAtomics()">,
AssemblerPredicate<(all_of FeatureAtomics), "atomics">;
@@ -76,6 +72,8 @@ def SDT_WebAssemblyCallSeqEnd :
SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
def SDT_WebAssemblyBrTable : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
+def SDT_WebAssemblyLocalGet : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
+def SDT_WebAssemblyLocalSet : SDTypeProfile<0, 2, [SDTCisVT<0, i32>]>;
def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>;
def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
SDTCisPtrTy<0>]>;
@@ -83,6 +81,8 @@ def SDT_WebAssemblyWrapperPIC : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
SDTCisPtrTy<0>]>;
def SDT_WebAssemblyThrow : SDTypeProfile<0, -1, []>;
def SDT_WebAssemblyCatch : SDTypeProfile<1, 1, [SDTCisPtrTy<0>]>;
+def SDT_WebAssemblyGlobalGet : SDTypeProfile<1, 1, [SDTCisPtrTy<1>]>;
+def SDT_WebAssemblyGlobalSet : SDTypeProfile<0, 2, [SDTCisPtrTy<1>]>;
//===----------------------------------------------------------------------===//
// WebAssembly-specific DAG Nodes.
@@ -110,6 +110,18 @@ def WebAssemblythrow : SDNode<"WebAssemblyISD::THROW", SDT_WebAssemblyThrow,
[SDNPHasChain, SDNPVariadic]>;
def WebAssemblycatch : SDNode<"WebAssemblyISD::CATCH", SDT_WebAssemblyCatch,
[SDNPHasChain, SDNPSideEffect]>;
+def WebAssemblyglobal_get :
+ SDNode<"WebAssemblyISD::GLOBAL_GET", SDT_WebAssemblyGlobalGet,
+ [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
+def WebAssemblyglobal_set :
+ SDNode<"WebAssemblyISD::GLOBAL_SET", SDT_WebAssemblyGlobalSet,
+ [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
+def WebAssemblylocal_get :
+ SDNode<"WebAssemblyISD::LOCAL_GET", SDT_WebAssemblyLocalGet,
+ [SDNPHasChain, SDNPMayLoad]>;
+def WebAssemblylocal_set :
+ SDNode<"WebAssemblyISD::LOCAL_SET", SDT_WebAssemblyLocalSet,
+ [SDNPHasChain, SDNPMayStore]>;
//===----------------------------------------------------------------------===//
// WebAssembly-specific Operands.
@@ -117,13 +129,13 @@ def WebAssemblycatch : SDNode<"WebAssemblyISD::CATCH", SDT_WebAssemblyCatch,
// Default Operand has AsmOperandClass "Imm" which is for integers (and
// symbols), so specialize one for floats:
-def FPImmAsmOperand : AsmOperandClass {
- let Name = "FPImm";
+class FPImmAsmOperand<ValueType ty> : AsmOperandClass {
+ let Name = "FPImm" # ty;
let PredicateMethod = "isFPImm";
}
class FPOperand<ValueType ty> : Operand<ty> {
- AsmOperandClass ParserMatchClass = FPImmAsmOperand;
+ AsmOperandClass ParserMatchClass = FPImmAsmOperand<ty>;
}
let OperandNamespace = "WebAssembly" in {
@@ -134,8 +146,14 @@ def bb_op : Operand<OtherVT>;
let OperandType = "OPERAND_LOCAL" in
def local_op : Operand<i32>;
-let OperandType = "OPERAND_GLOBAL" in
-def global_op : Operand<i32>;
+let OperandType = "OPERAND_GLOBAL" in {
+ // The operand to global instructions is always a 32-bit index.
+ def global_op32 : Operand<i32>;
+ // In PIC mode however, we temporarily represent this index as an external
+ // symbol, which to LLVM is a pointer, so in wasm64 mode it is easiest to
+ // pretend we use a 64-bit index for it.
+ def global_op64 : Operand<i64>;
+}
let OperandType = "OPERAND_I32IMM" in
def i32imm_op : Operand<i32>;
@@ -178,8 +196,8 @@ def P2Align : Operand<i32> {
let PrintMethod = "printWebAssemblyP2AlignOperand";
}
-let OperandType = "OPERAND_EVENT" in
-def event_op : Operand<i32>;
+let OperandType = "OPERAND_TAG" in
+def tag_op : Operand<i32>;
} // OperandType = "OPERAND_P2ALIGN"
@@ -198,6 +216,11 @@ def TypeIndex : Operand<i32>;
} // OperandNamespace = "WebAssembly"
+// TODO: Find more places to use this.
+def bool_node : PatLeaf<(i32 I32:$cond), [{
+ return CurDAG->computeKnownBits(SDValue(N, 0)).countMinLeadingZeros() == 31;
+}]>;
+
//===----------------------------------------------------------------------===//
// WebAssembly Register to Stack instruction mapping
//===----------------------------------------------------------------------===//
@@ -212,6 +235,19 @@ def getStackOpcode : InstrMapping {
}
//===----------------------------------------------------------------------===//
+// WebAssembly Stack to Register instruction mapping
+//===----------------------------------------------------------------------===//
+
+class RegisterRel;
+def getRegisterOpcode : InstrMapping {
+ let FilterClass = "RegisterRel";
+ let RowFields = ["BaseName"];
+ let ColFields = ["StackBased"];
+ let KeyCol = ["true"];
+ let ValueCols = [["false"]];
+}
+
+//===----------------------------------------------------------------------===//
// WebAssembly 32 to 64-bit instruction mapping
//===----------------------------------------------------------------------===//
@@ -234,12 +270,12 @@ include "WebAssemblyInstrFormats.td"
// Additional instructions.
//===----------------------------------------------------------------------===//
-multiclass ARGUMENT<WebAssemblyRegClass reg, ValueType vt> {
+multiclass ARGUMENT<WebAssemblyRegClass rc, ValueType vt> {
let hasSideEffects = 1, isCodeGenOnly = 1, Defs = []<Register>,
Uses = [ARGUMENTS] in
defm ARGUMENT_#vt :
- I<(outs reg:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno),
- [(set (vt reg:$res), (WebAssemblyargument timm:$argno))]>;
+ I<(outs rc:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno),
+ [(set (vt rc:$res), (WebAssemblyargument timm:$argno))]>;
}
defm "": ARGUMENT<I32, i32>;
defm "": ARGUMENT<I64, i64>;
@@ -250,7 +286,7 @@ defm "": ARGUMENT<EXTERNREF, externref>;
// local.get and local.set are not generated by instruction selection; they
// are implied by virtual register uses and defs.
-multiclass LOCAL<WebAssemblyRegClass vt> {
+multiclass LOCAL<WebAssemblyRegClass rc, Operand global_op> {
let hasSideEffects = 0 in {
// COPY is not an actual instruction in wasm, but since we allow local.get and
// local.set to be implicit during most of codegen, we can have a COPY which
@@ -258,21 +294,21 @@ multiclass LOCAL<WebAssemblyRegClass vt> {
// and local.set. COPYs are eliminated (and replaced with
// local.get/local.set) in the ExplicitLocals pass.
let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
- defm COPY_#vt : I<(outs vt:$res), (ins vt:$src), (outs), (ins), [],
+ defm COPY_#rc : I<(outs rc:$res), (ins rc:$src), (outs), (ins), [],
"local.copy\t$res, $src", "local.copy">;
// TEE is similar to COPY, but writes two copies of its result. Typically
// this would be used to stackify one result and write the other result to a
// local.
let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
- defm TEE_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), (outs), (ins), [],
+ defm TEE_#rc : I<(outs rc:$res, rc:$also), (ins rc:$src), (outs), (ins), [],
"local.tee\t$res, $also, $src", "local.tee">;
// This is the actual local.get instruction in wasm. These are made explicit
// by the ExplicitLocals pass. It has mayLoad because it reads from a wasm
// local, which is a side effect not otherwise modeled in LLVM.
let mayLoad = 1, isAsCheapAsAMove = 1 in
- defm LOCAL_GET_#vt : I<(outs vt:$res), (ins local_op:$local),
+ defm LOCAL_GET_#rc : I<(outs rc:$res), (ins local_op:$local),
(outs), (ins local_op:$local), [],
"local.get\t$res, $local", "local.get\t$local", 0x20>;
@@ -280,7 +316,7 @@ multiclass LOCAL<WebAssemblyRegClass vt> {
// by the ExplicitLocals pass. It has mayStore because it writes to a wasm
// local, which is a side effect not otherwise modeled in LLVM.
let mayStore = 1, isAsCheapAsAMove = 1 in
- defm LOCAL_SET_#vt : I<(outs), (ins local_op:$local, vt:$src),
+ defm LOCAL_SET_#rc : I<(outs), (ins local_op:$local, rc:$src),
(outs), (ins local_op:$local), [],
"local.set\t$local, $src", "local.set\t$local", 0x21>;
@@ -288,36 +324,48 @@ multiclass LOCAL<WebAssemblyRegClass vt> {
// LOCAL_TEEs by the ExplicitLocals pass. It has mayStore for the same reason
// as LOCAL_SET.
let mayStore = 1, isAsCheapAsAMove = 1 in
- defm LOCAL_TEE_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src),
+ defm LOCAL_TEE_#rc : I<(outs rc:$res), (ins local_op:$local, rc:$src),
(outs), (ins local_op:$local), [],
"local.tee\t$res, $local, $src", "local.tee\t$local",
0x22>;
// Unused values must be dropped in some contexts.
- defm DROP_#vt : I<(outs), (ins vt:$src), (outs), (ins), [],
+ defm DROP_#rc : I<(outs), (ins rc:$src), (outs), (ins), [],
"drop\t$src", "drop", 0x1a>;
let mayLoad = 1 in
- defm GLOBAL_GET_#vt : I<(outs vt:$res), (ins global_op:$local),
- (outs), (ins global_op:$local), [],
- "global.get\t$res, $local", "global.get\t$local",
+ defm GLOBAL_GET_#rc : I<(outs rc:$res), (ins global_op:$addr),
+ (outs), (ins global_op:$addr), [],
+ "global.get\t$res, $addr", "global.get\t$addr",
0x23>;
let mayStore = 1 in
- defm GLOBAL_SET_#vt : I<(outs), (ins global_op:$local, vt:$src),
- (outs), (ins global_op:$local), [],
- "global.set\t$local, $src", "global.set\t$local",
+ defm GLOBAL_SET_#rc : I<(outs), (ins global_op:$addr, rc:$src),
+ (outs), (ins global_op:$addr), [],
+ "global.set\t$addr, $src", "global.set\t$addr",
0x24>;
-} // hasSideEffects = 0
+ } // hasSideEffects = 0
+ foreach vt = rc.RegTypes in {
+ def : Pat<(vt (WebAssemblyglobal_get
+ (WebAssemblywrapper tglobaladdr:$addr))),
+ (!cast<NI>("GLOBAL_GET_" # rc) tglobaladdr:$addr)>;
+ def : Pat<(WebAssemblyglobal_set
+ vt:$src, (WebAssemblywrapper tglobaladdr:$addr)),
+ (!cast<NI>("GLOBAL_SET_" # rc) tglobaladdr:$addr, vt:$src)>;
+ def : Pat<(vt (WebAssemblylocal_get (i32 timm:$local))),
+ (!cast<NI>("LOCAL_GET_" # rc) timm:$local)>;
+ def : Pat<(WebAssemblylocal_set timm:$local, vt:$src),
+ (!cast<NI>("LOCAL_SET_" # rc) timm:$local, vt:$src)>;
+ }
}
-defm "" : LOCAL<I32>;
-defm "" : LOCAL<I64>;
-defm "" : LOCAL<F32>;
-defm "" : LOCAL<F64>;
-defm "" : LOCAL<V128>, Requires<[HasSIMD128]>;
-defm "" : LOCAL<FUNCREF>, Requires<[HasReferenceTypes]>;
-defm "" : LOCAL<EXTERNREF>, Requires<[HasReferenceTypes]>;
+defm "" : LOCAL<I32, global_op32>;
+defm "" : LOCAL<I64, global_op64>; // 64-bit only needed for pointers.
+defm "" : LOCAL<F32, global_op32>;
+defm "" : LOCAL<F64, global_op32>;
+defm "" : LOCAL<V128, global_op32>, Requires<[HasSIMD128]>;
+defm "" : LOCAL<FUNCREF, global_op32>, Requires<[HasReferenceTypes]>;
+defm "" : LOCAL<EXTERNREF, global_op32>, Requires<[HasReferenceTypes]>;
let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in {
defm CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm),
@@ -345,6 +393,8 @@ def : Pat<(i64 (WebAssemblywrapper tglobaladdr:$addr)),
def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)),
(GLOBAL_GET_I32 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr32]>;
+def : Pat<(i64 (WebAssemblywrapper tglobaladdr:$addr)),
+ (GLOBAL_GET_I64 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr64]>;
def : Pat<(i32 (WebAssemblywrapperPIC tglobaladdr:$addr)),
(CONST_I32 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr32]>;
@@ -358,6 +408,8 @@ def : Pat<(i64 (WebAssemblywrapper tglobaltlsaddr:$addr)),
def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)),
(GLOBAL_GET_I32 texternalsym:$addr)>, Requires<[IsPIC, HasAddr32]>;
+def : Pat<(i64 (WebAssemblywrapper texternalsym:$addr)),
+ (GLOBAL_GET_I64 texternalsym:$addr)>, Requires<[IsPIC, HasAddr64]>;
def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)),
(CONST_I32 texternalsym:$addr)>, Requires<[IsNotPIC, HasAddr32]>;