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path: root/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
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Diffstat (limited to 'llvm/utils/TableGen/RISCVCompressInstEmitter.cpp')
-rw-r--r--llvm/utils/TableGen/RISCVCompressInstEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
index 183c8f9494db..e931801f82a4 100644
--- a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
@@ -273,8 +273,8 @@ static bool verifyDagOpCount(CodeGenInstruction &Inst, DagInit *Dag,
// The Instruction might have tied operands so the Dag might have
// a fewer operand count.
unsigned RealCount = Inst.Operands.size();
- for (unsigned i = 0; i < Inst.Operands.size(); i++)
- if (Inst.Operands[i].getTiedRegister() != -1)
+ for (const auto &Operand : Inst.Operands)
+ if (Operand.getTiedRegister() != -1)
--RealCount;
if (Dag->getNumArgs() != RealCount)