diff options
Diffstat (limited to 'share/man/man7/arch.7')
| -rw-r--r-- | share/man/man7/arch.7 | 83 |
1 files changed, 12 insertions, 71 deletions
diff --git a/share/man/man7/arch.7 b/share/man/man7/arch.7 index c7c2e224b33d..35a7b0246389 100644 --- a/share/man/man7/arch.7 +++ b/share/man/man7/arch.7 @@ -24,9 +24,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $FreeBSD$ -.\" -.Dd November 25, 2021 +.Dd September 2, 2023 .Dt ARCH 7 .Os .Sh NAME @@ -97,14 +95,13 @@ release to support each architecture. .It powerpc64 Ta 9.0 .It powerpc64le Ta 13.0 .It riscv64 Ta 12.0 -.It riscv64sf Ta 12.0 .El .Pp Discontinued architectures are shown in the following table. .Bl -column -offset indent "Architecture" "Initial Release" "Final Release" .It Sy Architecture Ta Sy Initial Release Ta Sy Final Release .It alpha Ta 3.2 Ta 6.4 -.It arm Ta 6.0 Ta 12.x +.It arm Ta 6.0 Ta 12.4 .It armeb Ta 8.0 Ta 11.4 .It ia64 Ta 5.0 Ta 10.4 .It mips Ta 8.0 Ta 13.x @@ -117,7 +114,8 @@ Discontinued architectures are shown in the following table. .It mips64elhf Ta 12.0 Ta 13.x .It mips64hf Ta 12.0 Ta 13.x .It pc98 Ta 2.2 Ta 11.4 -.It sparc64 Ta 5.0 Ta 12.x +.It riscv64sf Ta 12.0 Ta 13.x +.It sparc64 Ta 5.0 Ta 12.4 .El .Ss Type sizes All @@ -158,7 +156,6 @@ Examples are: .It Sy LP64 Ta Sy ILP32 counterpart .It Dv amd64 Ta Dv i386 .It Dv powerpc64 Ta Dv powerpc -.It Dv mips64* Ta Dv mips* .It Dv aarch64 Ta Dv armv6/armv7 .El .Pp @@ -169,7 +166,9 @@ or .Dv armv7 binaries if the CPU implements .Dv AArch32 -execution state, however +execution state, however older +.Dv armv4 +and .Dv armv5 binaries aren't supported. .Pp @@ -199,21 +198,11 @@ Machine-dependent type sizes: .It armv6 Ta 4 Ta 8 Ta 8 .It armv7 Ta 4 Ta 8 Ta 8 .It i386 Ta 4 Ta 12 Ta 4 -.It mips Ta 4 Ta 8 Ta 8 -.It mipsel Ta 4 Ta 8 Ta 8 -.It mipselhf Ta 4 Ta 8 Ta 8 -.It mipshf Ta 4 Ta 8 Ta 8 -.It mipsn32 Ta 4 Ta 8 Ta 8 -.It mips64 Ta 8 Ta 8 Ta 8 -.It mips64el Ta 8 Ta 8 Ta 8 -.It mips64elhf Ta 8 Ta 8 Ta 8 -.It mips64hf Ta 8 Ta 8 Ta 8 .It powerpc Ta 4 Ta 8 Ta 8 .It powerpcspe Ta 4 Ta 8 Ta 8 .It powerpc64 Ta 8 Ta 8 Ta 8 .It powerpc64le Ta 8 Ta 8 Ta 8 .It riscv64 Ta 8 Ta 16 Ta 8 -.It riscv64sf Ta 8 Ta 16 Ta 8 .El .Pp .Sy time_t @@ -226,21 +215,11 @@ is 8 bytes on all supported architectures except i386. .It armv6 Ta little Ta unsigned .It armv7 Ta little Ta unsigned .It i386 Ta little Ta signed -.It mips Ta big Ta signed -.It mipsel Ta little Ta signed -.It mipselhf Ta little Ta signed -.It mipshf Ta big Ta signed -.It mipsn32 Ta big Ta signed -.It mips64 Ta big Ta signed -.It mips64el Ta little Ta signed -.It mips64elhf Ta little Ta signed -.It mips64hf Ta big Ta signed .It powerpc Ta big Ta unsigned .It powerpcspe Ta big Ta unsigned .It powerpc64 Ta big Ta unsigned .It powerpc64le Ta little Ta unsigned .It riscv64 Ta little Ta signed -.It riscv64sf Ta little Ta signed .El .Ss Page Size .Bl -column -offset indent "Architecture" "Page Sizes" @@ -250,21 +229,11 @@ is 8 bytes on all supported architectures except i386. .It armv6 Ta 4K, 1M .It armv7 Ta 4K, 1M .It i386 Ta 4K, 2M (PAE), 4M -.It mips Ta 4K -.It mipsel Ta 4K -.It mipselhf Ta 4K -.It mipshf Ta 4K -.It mipsn32 Ta 4K -.It mips64 Ta 4K -.It mips64el Ta 4K -.It mips64elhf Ta 4K -.It mips64hf Ta 4K .It powerpc Ta 4K .It powerpcspe Ta 4K .It powerpc64 Ta 4K .It powerpc64le Ta 4K .It riscv64 Ta 4K, 2M, 1G -.It riscv64sf Ta 4K, 2M, 1G .El .Ss Floating Point .Bl -column -offset indent "Architecture" "float, double" "long double" @@ -274,21 +243,11 @@ is 8 bytes on all supported architectures except i386. .It armv6 Ta hard Ta hard, double precision .It armv7 Ta hard Ta hard, double precision .It i386 Ta hard Ta hard, 80 bit -.It mips Ta soft Ta identical to double -.It mipsel Ta soft Ta identical to double -.It mipselhf Ta hard Ta identical to double -.It mipshf Ta hard Ta identical to double -.It mipsn32 Ta soft Ta identical to double -.It mips64 Ta soft Ta identical to double -.It mips64el Ta soft Ta identical to double -.It mips64elhf Ta hard Ta identical to double -.It mips64hf Ta hard Ta identical to double .It powerpc Ta hard Ta hard, double precision .It powerpcspe Ta hard Ta hard, double precision .It powerpc64 Ta hard Ta hard, double precision .It powerpc64le Ta hard Ta hard, double precision .It riscv64 Ta hard Ta hard, quad precision -.It riscv64sf Ta soft Ta soft, quad precision .El .Ss Default Tool Chain .Fx @@ -319,9 +278,8 @@ or similar things like boot sequences. .It amd64 Ta amd64 Ta amd64 .It arm Ta arm Ta armv6, armv7 .It i386 Ta i386 Ta i386 -.It mips Ta mips Ta mips, mipsel, mips64, mips64el, mipshf, mipselhf, mips64elhf, mipsn32 .It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64, powerpc64le -.It riscv Ta riscv Ta riscv64, riscv64sf +.It riscv Ta riscv Ta riscv64 .El .Ss Predefined Macros The compiler provides a number of predefined macros. @@ -353,21 +311,11 @@ Architecture-specific macros: .It armv6 Ta Dv __arm__ , Dv __ARM_ARCH >= 6 .It armv7 Ta Dv __arm__ , Dv __ARM_ARCH >= 7 .It i386 Ta Dv __i386__ -.It mips Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_o32 -.It mipsel Ta Dv __mips__ , Dv __mips_o32 -.It mipselhf Ta Dv __mips__ , Dv __mips_o32 -.It mipshf Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_o32 -.It mipsn32 Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n32 -.It mips64 Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n64 -.It mips64el Ta Dv __mips__ , Dv __mips_n64 -.It mips64elhf Ta Dv __mips__ , Dv __mips_n64 -.It mips64hf Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n64 .It powerpc Ta Dv __powerpc__ .It powerpcspe Ta Dv __powerpc__ , Dv __SPE__ .It powerpc64 Ta Dv __powerpc__ , Dv __powerpc64__ .It powerpc64le Ta Dv __powerpc__ , Dv __powerpc64__ .It riscv64 Ta Dv __riscv , Dv __riscv_xlen == 64 -.It riscv64sf Ta Dv __riscv , Dv __riscv_xlen == 64 , Dv __riscv_float_abi_soft .El .Pp Compilers may define additional variants of architecture-specific macros. @@ -429,17 +377,13 @@ It may also encode a variation in the size of the integer or pointer. It may also encode a ISA revision. It may also encode hard versus soft floating point ABI and usage. It may also encode a variant ABI when the other factors do not -uniquely define the ABI (e.g., MIPS' n32 ABI). +uniquely define the ABI. It, along with .Dv MACHINE , defines the ABI used by the system. -For example, the MIPS CPU processor family supports 9 different -combinations encoding pointer size, endian and hard versus soft float (for -8 combinations) as well as N32 (which only ever had one variation of -all these). Generally, the plain CPU name specifies the most common (or at least first) variant of the CPU. -This is why mips and mips64 imply 'big endian' while 'armv6' and 'armv7' +This is why powerpc and powerpc64 imply 'big endian' while 'armv6' and 'armv7' imply little endian. If we ever were to support the so-called x32 ABI (using 32-bit pointers on the amd64 architecture), it would most likely be encoded @@ -453,10 +397,6 @@ Represents the source location for a given .Dv MACHINE_ARCH . It is generally the common prefix for all the MACHINE_ARCH that share the same implementation, though 'riscv' breaks this rule. -For example, -.Dv MACHINE_CPUARCH -is defined to be mips for all the flavors of mips that we support -since we support them all with a shared set of sources. While amd64 and i386 are closely related, MACHINE_CPUARCH is not x86 for them. The @@ -491,7 +431,8 @@ it is unused outside of that scope. .El .Sh SEE ALSO .Xr src.conf 5 , -.Xr build 7 +.Xr build 7 , +.Xr simd 7 .Sh HISTORY An .Nm |