diff options
Diffstat (limited to 'src/arm/imx6qdl.dtsi')
| -rw-r--r-- | src/arm/imx6qdl.dtsi | 29 |
1 files changed, 22 insertions, 7 deletions
diff --git a/src/arm/imx6qdl.dtsi b/src/arm/imx6qdl.dtsi index ed613ebe0812..e7d30f45b161 100644 --- a/src/arm/imx6qdl.dtsi +++ b/src/arm/imx6qdl.dtsi @@ -13,9 +13,18 @@ #include <dt-bindings/clock/imx6qdl-clock.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" - / { + #address-cells = <1>; + #size-cells = <1>; + /* + * The decompressor and also some bootloaders rely on a + * pre-existing /chosen node to be available to insert the + * command line and merge other ATAGS info. + * Also for U-Boot there must be a pre-existing /memory node. + */ + chosen {}; + memory { device_type = "memory"; reg = <0 0>; }; + aliases { ethernet0 = &fec; can0 = &can1; @@ -185,6 +194,7 @@ cache-level = <2>; arm,tag-latency = <4 2 3>; arm,data-latency = <4 2 3>; + arm,shared-override; }; pcie: pcie@0x01000000 { @@ -203,9 +213,9 @@ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, <&clks IMX6QDL_CLK_LVDS1_GATE>, <&clks IMX6QDL_CLK_PCIE_REF_125M>; @@ -242,7 +252,7 @@ clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>, <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>, <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>, - <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>, + <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>; clock-names = "core", "rxtx0", "rxtx1", "rxtx2", @@ -1091,15 +1101,20 @@ }; weim: weim@021b8000 { + #address-cells = <2>; + #size-cells = <1>; compatible = "fsl,imx6q-weim"; reg = <0x021b8000 0x4000>; interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_EIM_SLOW>; + fsl,weim-cs-gpr = <&gpr>; + status = "disabled"; }; ocotp: ocotp@021bc000 { compatible = "fsl,imx6q-ocotp", "syscon"; reg = <0x021bc000 0x4000>; + clocks = <&clks IMX6QDL_CLK_IIM>; }; tzasc@021d0000 { /* TZASC1 */ @@ -1255,7 +1270,7 @@ #size-cells = <0>; reg = <3>; - ipu1_di0_disp1: disp1-endpoint { + ipu1_di1_disp1: disp1-endpoint { }; ipu1_di1_hdmi: hdmi-endpoint { |