diff options
Diffstat (limited to 'src/arm/omap5.dtsi')
-rw-r--r-- | src/arm/omap5.dtsi | 47 |
1 files changed, 37 insertions, 10 deletions
diff --git a/src/arm/omap5.dtsi b/src/arm/omap5.dtsi index fb889c5b00c9..a82c96258a93 100644 --- a/src/arm/omap5.dtsi +++ b/src/arm/omap5.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ * * Based on "omap4.dtsi" */ @@ -31,6 +31,8 @@ serial3 = &uart4; serial4 = &uart5; serial5 = &uart6; + rproc0 = &dsp; + rproc1 = &ipu; }; cpus { @@ -216,6 +218,29 @@ }; }; + dsp: dsp { + compatible = "ti,omap5-dsp"; + ti,bootreg = <&scm_conf 0x304 0>; + iommus = <&mmu_dsp>; + resets = <&prm_dsp 0>; + clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>; + firmware-name = "omap5-dsp-fw.xe64T"; + mboxes = <&mailbox &mbox_dsp>; + status = "disabled"; + }; + + ipu: ipu@55020000 { + compatible = "ti,omap5-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; + iommus = <&mmu_ipu>; + resets = <&prm_core 0>, <&prm_core 1>; + clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>; + firmware-name = "omap5-ipu-fw.xem4"; + mboxes = <&mailbox &mbox_ipu>; + status = "disabled"; + }; + dmm@4e000000 { compatible = "ti,omap5-dmm"; reg = <0x4e000000 0x800>; @@ -463,11 +488,11 @@ }; }; - target-module@5000 { + target-module@4000 { compatible = "ti,sysc-omap2", "ti,sysc"; - reg = <0x5000 0x4>, - <0x5010 0x4>, - <0x5014 0x4>; + reg = <0x4000 0x4>, + <0x4010 0x4>, + <0x4014 0x4>; reg-names = "rev", "sysc", "syss"; ti,sysc-sidle = <SYSC_IDLE_FORCE>, <SYSC_IDLE_NO>, @@ -479,7 +504,7 @@ ti,syss-mask = <1>; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0x5000 0x1000>; + ranges = <0 0x4000 0x1000>; dsi1: encoder@0 { compatible = "ti,omap5-dsi"; @@ -489,8 +514,9 @@ reg-names = "proto", "phy", "pll"; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; - clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; - clock-names = "fck"; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>, + <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>; + clock-names = "fck", "sys_clk"; }; }; @@ -520,8 +546,9 @@ reg-names = "proto", "phy", "pll"; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; - clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; - clock-names = "fck"; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>, + <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>; + clock-names = "fck", "sys_clk"; }; }; |