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-rw-r--r--sys/amd64/amd64/elf_machdep.c19
-rw-r--r--sys/amd64/amd64/initcpu.c27
2 files changed, 46 insertions, 0 deletions
diff --git a/sys/amd64/amd64/elf_machdep.c b/sys/amd64/amd64/elf_machdep.c
index 1c3460eb031c..0a2a85144052 100644
--- a/sys/amd64/amd64/elf_machdep.c
+++ b/sys/amd64/amd64/elf_machdep.c
@@ -84,6 +84,25 @@ struct sysentvec elf64_freebsd_sysvec = {
};
INIT_SYSENTVEC(elf64_sysvec, &elf64_freebsd_sysvec);
+void
+amd64_lower_shared_page(struct sysentvec *sv)
+{
+ if (hw_lower_amd64_sharedpage != 0) {
+ sv->sv_maxuser -= PAGE_SIZE;
+ sv->sv_shared_page_base -= PAGE_SIZE;
+ sv->sv_usrstack -= PAGE_SIZE;
+ sv->sv_psstrings -= PAGE_SIZE;
+ }
+}
+
+/*
+ * Do this fixup before INIT_SYSENTVEC (SI_ORDER_ANY) because the latter
+ * uses the value of sv_shared_page_base.
+ */
+SYSINIT(elf64_sysvec_fixup, SI_SUB_EXEC, SI_ORDER_FIRST,
+ (sysinit_cfunc_t) amd64_lower_shared_page,
+ &elf64_freebsd_sysvec);
+
static Elf64_Brandinfo freebsd_brand_info = {
.brand = ELFOSABI_FREEBSD,
.machine = EM_X86_64,
diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c
index 63c0f20f4928..ff3b6be8602e 100644
--- a/sys/amd64/amd64/initcpu.c
+++ b/sys/amd64/amd64/initcpu.c
@@ -48,6 +48,11 @@ __FBSDID("$FreeBSD$");
static int hw_instruction_sse;
SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD,
&hw_instruction_sse, 0, "SIMD/MMX2 instructions available in CPU");
+static int lower_sharedpage_init;
+int hw_lower_amd64_sharedpage;
+SYSCTL_INT(_hw, OID_AUTO, lower_amd64_sharedpage, CTLFLAG_RDTUN,
+ &hw_lower_amd64_sharedpage, 0,
+ "Lower sharedpage to work around Ryzen issue with executing code near the top of user memory");
/*
* -1: automatic (default)
* 0: keep enable CLFLUSH
@@ -122,6 +127,28 @@ init_amd(void)
wrmsr(0xc0011020, msr);
}
}
+
+ /*
+ * Work around a problem on Ryzen that is triggered by executing
+ * code near the top of user memory, in our case the signal
+ * trampoline code in the shared page on amd64.
+ *
+ * This function is executed once for the BSP before tunables take
+ * effect so the value determined here can be overridden by the
+ * tunable. This function is then executed again for each AP and
+ * also on resume. Set a flag the first time so that value set by
+ * the tunable is not overwritten.
+ *
+ * The stepping and/or microcode versions should be checked after
+ * this issue is fixed by AMD so that we don't use this mode if not
+ * needed.
+ */
+ if (lower_sharedpage_init == 0) {
+ lower_sharedpage_init = 1;
+ if (CPUID_TO_FAMILY(cpu_id) == 0x17) {
+ hw_lower_amd64_sharedpage = 1;
+ }
+ }
}
/*