diff options
Diffstat (limited to 'sys/arm/arm/cpufunc.c')
| -rw-r--r-- | sys/arm/arm/cpufunc.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index 8e69c5405ed3..65a2bca18813 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -837,6 +837,11 @@ u_int cpu_reset_needs_v4_MMU_disable; /* flag used in locore.s */ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ defined(CPU_CORTEXA) || defined(CPU_KRAIT) +/* Global cache line sizes, use 32 as default */ +int arm_dcache_min_line_size = 32; +int arm_icache_min_line_size = 32; +int arm_idcache_min_line_size = 32; + static void get_cachetype_cp15(void); /* Additional cache information local to this file. Log2 of some of the @@ -868,6 +873,12 @@ get_cachetype_cp15() goto out; if (CPU_CT_FORMAT(ctype) == CPU_CT_ARMV7) { + /* Resolve minimal cache line sizes */ + arm_dcache_min_line_size = 1 << (CPU_CT_DMINLINE(ctype) + 2); + arm_icache_min_line_size = 1 << (CPU_CT_IMINLINE(ctype) + 2); + arm_idcache_min_line_size = + min(arm_icache_min_line_size, arm_dcache_min_line_size); + __asm __volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (clevel)); arm_cache_level = clevel; |