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Diffstat (limited to 'sys/dev/cxgbe/t4_main.c')
-rw-r--r--sys/dev/cxgbe/t4_main.c18
1 files changed, 13 insertions, 5 deletions
diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
index 9865bd7048ae..eabe52387227 100644
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -9600,7 +9600,9 @@ sysctl_meminfo(SYSCTL_HANDLER_ARGS)
struct sbuf *sb;
int rc, i, n;
uint32_t lo, hi, used, alloc;
- static const char *memory[] = {"EDC0:", "EDC1:", "MC:", "MC0:", "MC1:"};
+ static const char *memory[] = {
+ "EDC0:", "EDC1:", "MC:", "MC0:", "MC1:", "HMA:"
+ };
static const char *region[] = {
"DBQ contexts:", "IMSG contexts:", "FLM cache:", "TCBs:",
"Pstructs:", "Timers:", "Rx FL:", "Tx FL:", "Pstruct FL:",
@@ -9653,19 +9655,25 @@ sysctl_meminfo(SYSCTL_HANDLER_ARGS)
if (lo & F_EXT_MEM_ENABLE) {
hi = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR);
avail[i].base = G_EXT_MEM_BASE(hi) << 20;
- avail[i].limit = avail[i].base +
- (G_EXT_MEM_SIZE(hi) << 20);
+ avail[i].limit = avail[i].base + (G_EXT_MEM_SIZE(hi) << 20);
avail[i].idx = is_t5(sc) ? 3 : 2; /* Call it MC0 for T5 */
i++;
}
if (is_t5(sc) && lo & F_EXT_MEM1_ENABLE) {
hi = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);
avail[i].base = G_EXT_MEM1_BASE(hi) << 20;
- avail[i].limit = avail[i].base +
- (G_EXT_MEM1_SIZE(hi) << 20);
+ avail[i].limit = avail[i].base + (G_EXT_MEM1_SIZE(hi) << 20);
avail[i].idx = 4;
i++;
}
+ if (is_t6(sc) && lo & F_HMA_MUX) {
+ hi = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);
+ avail[i].base = G_EXT_MEM1_BASE(hi) << 20;
+ avail[i].limit = avail[i].base + (G_EXT_MEM1_SIZE(hi) << 20);
+ avail[i].idx = 5;
+ i++;
+ }
+ MPASS(i <= nitems(avail));
if (!i) /* no memory available */
goto done;
qsort(avail, i, sizeof(struct mem_desc), mem_desc_cmp);