diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll')
-rw-r--r-- | test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll | 24 |
1 files changed, 11 insertions, 13 deletions
diff --git a/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll b/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll index 303446b63315..ab76c870796b 100644 --- a/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll +++ b/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll @@ -1,24 +1,22 @@ -; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s ; GCN-LABEL: {{^}}mbcnt_intrinsics: ; GCN: v_mbcnt_lo_u32_b32_e64 [[LO:v[0-9]+]], -1, 0 ; SI: v_mbcnt_hi_u32_b32_e32 {{v[0-9]+}}, -1, [[LO]] ; VI: v_mbcnt_hi_u32_b32_e64 {{v[0-9]+}}, -1, [[LO]] - -define amdgpu_ps void @mbcnt_intrinsics(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg) { +define amdgpu_ps void @mbcnt_intrinsics(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, i32 inreg %arg3) { main_body: - %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #1 - %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lo) #1 - %4 = bitcast i32 %hi to float - call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %4, float %4, float %4, float %4) + %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0 + %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lo) #0 + %tmp = bitcast i32 %hi to float + call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp, float %tmp, float %tmp, float %tmp, i1 true, i1 true) #1 ret void } -declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #1 - -declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #1 - -declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) +declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0 +declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0 +declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1 -attributes #1 = { nounwind readnone } +attributes #0 = { nounwind readnone } +attributes #1 = { nounwind } |